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Fix simd_reduce_* intrinsics
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@ -218,6 +218,7 @@ fn simd_pair_for_each_lane<'tcx>(
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fn simd_reduce<'tcx>(
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fx: &mut FunctionCx<'_, '_, 'tcx>,
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val: CValue<'tcx>,
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acc: Option<Value>,
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ret: CPlace<'tcx>,
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f: impl Fn(&mut FunctionCx<'_, '_, 'tcx>, TyAndLayout<'tcx>, Value, Value) -> Value,
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) {
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@ -225,8 +226,9 @@ fn simd_reduce<'tcx>(
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let lane_layout = fx.layout_of(lane_ty);
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assert_eq!(lane_layout, ret.layout());
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let mut res_val = val.value_lane(fx, 0).load_scalar(fx);
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for lane_idx in 1..lane_count {
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let (mut res_val, start_lane) =
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if let Some(acc) = acc { (acc, 0) } else { (val.value_lane(fx, 0).load_scalar(fx), 1) };
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for lane_idx in start_lane..lane_count {
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let lane = val.value_lane(fx, lane_idx).load_scalar(fx);
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res_val = f(fx, lane_layout, res_val, lane);
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}
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@ -236,9 +236,9 @@ pub(super) fn codegen_simd_intrinsic_call<'tcx>(
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simd_flt_binop!(fx, fmax(x, y) -> ret);
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};
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simd_reduce_add_ordered | simd_reduce_add_unordered, (c v) {
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simd_reduce_add_ordered | simd_reduce_add_unordered, (c v, v acc) {
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validate_simd_type!(fx, intrinsic, span, v.layout().ty);
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simd_reduce(fx, v, ret, |fx, lane_layout, a, b| {
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simd_reduce(fx, v, Some(acc), ret, |fx, lane_layout, a, b| {
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if lane_layout.ty.is_floating_point() {
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fx.bcx.ins().fadd(a, b)
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} else {
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@ -247,9 +247,9 @@ pub(super) fn codegen_simd_intrinsic_call<'tcx>(
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});
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};
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simd_reduce_mul_ordered | simd_reduce_mul_unordered, (c v) {
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simd_reduce_mul_ordered | simd_reduce_mul_unordered, (c v, v acc) {
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validate_simd_type!(fx, intrinsic, span, v.layout().ty);
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simd_reduce(fx, v, ret, |fx, lane_layout, a, b| {
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simd_reduce(fx, v, Some(acc), ret, |fx, lane_layout, a, b| {
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if lane_layout.ty.is_floating_point() {
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fx.bcx.ins().fmul(a, b)
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} else {
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