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Auto merge of #76837 - wesleywiser:disable_consideredequal, r=oli-obk
[mir-opt] Disable the `ConsideredEqual` logic in SimplifyBranchSame opt The logic is currently broken and we need to disable it to fix a beta regression (see #76803) r? `@oli-obk`
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commit
2c69266c06
@ -612,7 +612,7 @@ impl<'a, 'tcx> SimplifyBranchSameOptimizationFinder<'a, 'tcx> {
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&& bb_l.terminator().kind == bb_r.terminator().kind;
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&& bb_l.terminator().kind == bb_r.terminator().kind;
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let statement_check = || {
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let statement_check = || {
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bb_l.statements.iter().zip(&bb_r.statements).try_fold(StatementEquality::TrivialEqual, |acc,(l,r)| {
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bb_l.statements.iter().zip(&bb_r.statements).try_fold(StatementEquality::TrivialEqual, |acc,(l,r)| {
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let stmt_equality = self.statement_equality(*adt_matched_on, &l, bb_l_idx, &r, bb_r_idx);
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let stmt_equality = self.statement_equality(*adt_matched_on, &l, bb_l_idx, &r, bb_r_idx, self.tcx.sess.opts.debugging_opts.mir_opt_level);
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if matches!(stmt_equality, StatementEquality::NotEqual) {
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if matches!(stmt_equality, StatementEquality::NotEqual) {
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// short circuit
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// short circuit
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None
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None
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@ -672,6 +672,7 @@ impl<'a, 'tcx> SimplifyBranchSameOptimizationFinder<'a, 'tcx> {
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x_bb_idx: BasicBlock,
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x_bb_idx: BasicBlock,
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y: &Statement<'tcx>,
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y: &Statement<'tcx>,
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y_bb_idx: BasicBlock,
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y_bb_idx: BasicBlock,
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mir_opt_level: usize,
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) -> StatementEquality {
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) -> StatementEquality {
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let helper = |rhs: &Rvalue<'tcx>,
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let helper = |rhs: &Rvalue<'tcx>,
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place: &Place<'tcx>,
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place: &Place<'tcx>,
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@ -690,7 +691,13 @@ impl<'a, 'tcx> SimplifyBranchSameOptimizationFinder<'a, 'tcx> {
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match rhs {
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match rhs {
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Rvalue::Use(operand) if operand.place() == Some(adt_matched_on) => {
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Rvalue::Use(operand) if operand.place() == Some(adt_matched_on) => {
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StatementEquality::ConsideredEqual(side_to_choose)
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// FIXME(76803): This logic is currently broken because it does not take into
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// account the current discriminant value.
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if mir_opt_level > 2 {
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StatementEquality::ConsideredEqual(side_to_choose)
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} else {
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StatementEquality::NotEqual
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}
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}
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}
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_ => {
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_ => {
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trace!(
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trace!(
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@ -13,27 +13,24 @@
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bb0: {
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bb0: {
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_2 = discriminant(_1); // scope 0 at $DIR/simplify-arm.rs:11:9: 11:16
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_2 = discriminant(_1); // scope 0 at $DIR/simplify-arm.rs:11:9: 11:16
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- switchInt(move _2) -> [0_isize: bb1, 1_isize: bb3, otherwise: bb2]; // scope 0 at $DIR/simplify-arm.rs:11:9: 11:16
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switchInt(move _2) -> [0_isize: bb1, 1_isize: bb3, otherwise: bb2]; // scope 0 at $DIR/simplify-arm.rs:11:9: 11:16
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+ goto -> bb1; // scope 0 at $DIR/simplify-arm.rs:11:9: 11:16
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}
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}
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bb1: {
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bb1: {
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- discriminant(_0) = 0; // scope 0 at $DIR/simplify-arm.rs:12:17: 12:21
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discriminant(_0) = 0; // scope 0 at $DIR/simplify-arm.rs:12:17: 12:21
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- goto -> bb4; // scope 0 at $DIR/simplify-arm.rs:10:5: 13:6
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goto -> bb4; // scope 0 at $DIR/simplify-arm.rs:10:5: 13:6
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- }
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-
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- bb2: {
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- unreachable; // scope 0 at $DIR/simplify-arm.rs:10:11: 10:12
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- }
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-
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- bb3: {
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_0 = move _1; // scope 1 at $DIR/simplify-arm.rs:11:20: 11:27
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- goto -> bb4; // scope 0 at $DIR/simplify-arm.rs:10:5: 13:6
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+ goto -> bb2; // scope 0 at $DIR/simplify-arm.rs:10:5: 13:6
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}
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}
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- bb4: {
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bb2: {
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+ bb2: {
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unreachable; // scope 0 at $DIR/simplify-arm.rs:10:11: 10:12
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}
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bb3: {
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_0 = move _1; // scope 1 at $DIR/simplify-arm.rs:11:20: 11:27
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goto -> bb4; // scope 0 at $DIR/simplify-arm.rs:10:5: 13:6
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}
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bb4: {
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return; // scope 0 at $DIR/simplify-arm.rs:14:2: 14:2
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return; // scope 0 at $DIR/simplify-arm.rs:14:2: 14:2
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}
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}
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}
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}
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19
src/test/ui/mir/issue-76803-branches-not-same.rs
Normal file
19
src/test/ui/mir/issue-76803-branches-not-same.rs
Normal file
@ -0,0 +1,19 @@
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// run-pass
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#[derive(Debug, Eq, PartialEq)]
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pub enum Type {
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A,
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B,
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}
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pub fn encode(v: Type) -> Type {
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match v {
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Type::A => Type::B,
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_ => v,
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}
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}
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fn main() {
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assert_eq!(Type::B, encode(Type::A));
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}
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