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Rollup merge of #82202 - kraj:kraj/riscv-musl, r=estebank
add specs for riscv32/riscv64 musl targets Signed-off-by: Khem Raj <raj.khem@gmail.com>
This commit is contained in:
commit
135a05c5ae
@ -783,9 +783,11 @@ supported_targets! {
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("riscv32imc-unknown-none-elf", riscv32imc_unknown_none_elf),
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("riscv32imc-unknown-none-elf", riscv32imc_unknown_none_elf),
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("riscv32imac-unknown-none-elf", riscv32imac_unknown_none_elf),
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("riscv32imac-unknown-none-elf", riscv32imac_unknown_none_elf),
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("riscv32gc-unknown-linux-gnu", riscv32gc_unknown_linux_gnu),
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("riscv32gc-unknown-linux-gnu", riscv32gc_unknown_linux_gnu),
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("riscv32gc-unknown-linux-musl", riscv32gc_unknown_linux_musl),
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("riscv64imac-unknown-none-elf", riscv64imac_unknown_none_elf),
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("riscv64imac-unknown-none-elf", riscv64imac_unknown_none_elf),
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("riscv64gc-unknown-none-elf", riscv64gc_unknown_none_elf),
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("riscv64gc-unknown-none-elf", riscv64gc_unknown_none_elf),
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("riscv64gc-unknown-linux-gnu", riscv64gc_unknown_linux_gnu),
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("riscv64gc-unknown-linux-gnu", riscv64gc_unknown_linux_gnu),
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("riscv64gc-unknown-linux-musl", riscv64gc_unknown_linux_musl),
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("aarch64-unknown-none", aarch64_unknown_none),
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("aarch64-unknown-none", aarch64_unknown_none),
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("aarch64-unknown-none-softfloat", aarch64_unknown_none_softfloat),
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("aarch64-unknown-none-softfloat", aarch64_unknown_none_softfloat),
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@ -0,0 +1,19 @@
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use crate::spec::{CodeModel, Target, TargetOptions};
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pub fn target() -> Target {
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Target {
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llvm_target: "riscv32-unknown-linux-musl".to_string(),
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pointer_width: 32,
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data_layout: "e-m:e-p:32:32-i64:64-n32-S128".to_string(),
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arch: "riscv32".to_string(),
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options: TargetOptions {
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unsupported_abis: super::riscv_base::unsupported_abis(),
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code_model: Some(CodeModel::Medium),
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cpu: "generic-rv32".to_string(),
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features: "+m,+a,+f,+d,+c".to_string(),
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llvm_abiname: "ilp32d".to_string(),
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max_atomic_width: Some(32),
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..super::linux_musl_base::opts()
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},
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}
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}
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@ -0,0 +1,19 @@
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use crate::spec::{CodeModel, Target, TargetOptions};
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pub fn target() -> Target {
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Target {
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llvm_target: "riscv64-unknown-linux-musl".to_string(),
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pointer_width: 64,
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data_layout: "e-m:e-p:64:64-i64:64-i128:128-n64-S128".to_string(),
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arch: "riscv64".to_string(),
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options: TargetOptions {
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unsupported_abis: super::riscv_base::unsupported_abis(),
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code_model: Some(CodeModel::Medium),
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cpu: "generic-rv64".to_string(),
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features: "+m,+a,+f,+d,+c".to_string(),
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llvm_abiname: "lp64d".to_string(),
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max_atomic_width: Some(64),
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..super::linux_musl_base::opts()
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},
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}
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}
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@ -204,7 +204,9 @@ target | std | host | notes
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`powerpc64-unknown-linux-musl` | ? | |
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`powerpc64-unknown-linux-musl` | ? | |
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`powerpc64-wrs-vxworks` | ? | |
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`powerpc64-wrs-vxworks` | ? | |
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`powerpc64le-unknown-linux-musl` | ? | |
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`powerpc64le-unknown-linux-musl` | ? | |
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`riscv64gc-unknown-linux-musl` | | | RISC-V Linux (kernel 4.20, musl 1.2.0)
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`riscv32gc-unknown-linux-gnu` | | | RISC-V Linux (kernel 5.4, glibc 2.33)
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`riscv32gc-unknown-linux-gnu` | | | RISC-V Linux (kernel 5.4, glibc 2.33)
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`riscv32gc-unknown-linux-musl` | | | RISC-V Linux (kernel 5.4, musl + RISCV32 support patches)
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`sparc-unknown-linux-gnu` | ✓ | | 32-bit SPARC Linux
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`sparc-unknown-linux-gnu` | ✓ | | 32-bit SPARC Linux
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`sparc64-unknown-netbsd` | ✓ | ✓ | NetBSD/sparc64
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`sparc64-unknown-netbsd` | ✓ | ✓ | NetBSD/sparc64
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`sparc64-unknown-openbsd` | ? | |
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`sparc64-unknown-openbsd` | ? | |
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