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spirv_type_constraints: account for OpUCount{Leading,Trailing}ZerosINTEL usage.

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Eduard-Mihai Burtescu 2021-02-18 22:08:51 +02:00 committed by Eduard-Mihai Burtescu
parent 71ef9a25cf
commit d4da7f912d
2 changed files with 8 additions and 3 deletions
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3
crates/rustc_codegen_spirv/src/builder/intrinsics.rs
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@ -379,6 +379,9 @@ impl<'a, 'tcx> IntrinsicCallMethods<'tcx> for Builder<'a, 'tcx> {
if self.kernel_mode {
self.cl_op(CLOp::ctz, ret_ty, [args[0].immediate()])
} else {
self.ext_inst
.borrow_mut()
.import_integer_functions_2_intel(self);
self.emit()
.u_count_trailing_zeros_intel(
args[0].immediate().ty,

8
crates/rustc_codegen_spirv/src/spirv_type_constraints.rs
View File

@ -764,9 +764,11 @@ pub fn instruction_signatures(op: Op) -> Option<&'static [InstSig<'static>]> {
// reserved!(SPV_EXT_demote_to_helper_invocation)
}
// SPV_INTEL_shader_integer_functions2
Op::UCountLeadingZerosINTEL
| Op::UCountTrailingZerosINTEL
| Op::AbsISubINTEL
Op::UCountLeadingZerosINTEL | Op::UCountTrailingZerosINTEL => {
// NOTE(eddyb) we actually use these despite not being in the standard yet.
// reserved!(SPV_INTEL_shader_integer_functions2)
}
Op::AbsISubINTEL
| Op::AbsUSubINTEL
| Op::IAddSatINTEL
| Op::UAddSatINTEL