diff --git a/rspirv-linker/src/mem2reg.rs b/rspirv-linker/src/mem2reg.rs
index acb9af931d..87dad792fe 100644
--- a/rspirv-linker/src/mem2reg.rs
+++ b/rspirv-linker/src/mem2reg.rs
@@ -39,10 +39,12 @@ fn compute_idom(preds: &[Vec<usize>]) -> Vec<usize> {
     fn intersect(doms: &[Option<usize>], mut finger1: usize, mut finger2: usize) -> usize {
         // TODO: This may return an optional result?
         while finger1 != finger2 {
-            while finger1 < finger2 {
+            // Note: The comparisons here are inverted from the paper, because the paper uses
+            // comparison to be postorder index. However, we have reverse postorder indices.
+            while finger1 > finger2 {
                 finger1 = doms[finger1].unwrap();
             }
-            while finger2 < finger1 {
+            while finger2 > finger1 {
                 finger2 = doms[finger2].unwrap();
             }
         }
@@ -57,7 +59,10 @@ fn compute_idom(preds: &[Vec<usize>]) -> Vec<usize> {
         for node in 1..(preds.len()) {
             let mut new_idom: Option<usize> = None;
             for &pred in &preds[node] {
-                new_idom = Some(new_idom.map_or(pred, |new_idom| intersect(&idom, pred, new_idom)));
+                if idom[pred].is_some() {
+                    new_idom =
+                        Some(new_idom.map_or(pred, |new_idom| intersect(&idom, pred, new_idom)));
+                }
             }
             // TODO: This may return an optional result?
             let new_idom = new_idom.unwrap();
diff --git a/rustc_codegen_spirv/build_libcore_test.sh b/rustc_codegen_spirv/build_libcore_test.sh
index 7f30976a12..caf18473b0 100755
--- a/rustc_codegen_spirv/build_libcore_test.sh
+++ b/rustc_codegen_spirv/build_libcore_test.sh
@@ -9,5 +9,5 @@ cargo build
 export RUSTFLAGS="-Zcodegen-backend=$PWD/../target/debug/librustc_codegen_spirv.so"
 
 pushd build_libcore_test
-SPIRV_VAL=1 cargo build -Z build-std=core --target spirv-unknown-unknown --release
+SPIRV_VAL=${SPIRV_VAL-1} cargo build -Z build-std=core --target spirv-unknown-unknown --release
 popd
diff --git a/rustc_codegen_spirv/src/link.rs b/rustc_codegen_spirv/src/link.rs
index 65cbb63aeb..a95481970d 100644
--- a/rustc_codegen_spirv/src/link.rs
+++ b/rustc_codegen_spirv/src/link.rs
@@ -158,7 +158,6 @@ fn do_spirv_val(sess: &Session, filename: &Path, dump_path: String) {
     let output = output.expect("spirv-val failed to execute");
     if !output.status.success() {
         let dump_path = Path::new(&dump_path);
-        sess.err("wau");
         let mut err = sess.struct_err(&format!("spirv-val failed with {}", output.status));
         if !output.stdout.is_empty() {
             err.note(&String::from_utf8(output.stdout).unwrap());
diff --git a/spirv-std/src/lib.rs b/spirv-std/src/lib.rs
index 21a5b3a44d..d6744cc72e 100644
--- a/spirv-std/src/lib.rs
+++ b/spirv-std/src/lib.rs
@@ -61,7 +61,7 @@ pointer_addrspace!("physical_storage_buffer", PhysicalStorageBuffer, true);
 #[allow(non_camel_case_types)]
 #[derive(Debug, Clone, Copy)]
 #[repr(simd)]
-pub struct f32x4(f32, f32, f32, f32);
+pub struct f32x4(pub f32, pub f32, pub f32, pub f32);
 
 /// libcore requires a few external symbols to be defined:
 /// https://github.com/rust-lang/rust/blob/c2bc344eb23d8c1d18e803b3f1e631cf99926fbb/library/core/src/lib.rs#L23-L27