mirror of
https://github.com/NixOS/nixpkgs.git
synced 2024-12-03 20:33:21 +00:00
1f86adbdbf
Signed-off-by: Austin Seipp <aseipp@pobox.com>
78 lines
2.4 KiB
Nix
78 lines
2.4 KiB
Nix
{ stdenv, fetchFromGitHub
|
|
, pkgconfig, bison, flex
|
|
, tcl, readline, libffi, python3
|
|
, protobuf
|
|
}:
|
|
|
|
with builtins;
|
|
|
|
stdenv.mkDerivation rec {
|
|
name = "yosys-${version}";
|
|
version = "2019.04.23";
|
|
|
|
srcs = [
|
|
(fetchFromGitHub {
|
|
owner = "yosyshq";
|
|
repo = "yosys";
|
|
rev = "d9daf09cf3aab202b6da058c5e959f6375a4541e";
|
|
sha256 = "0l27r9l3fvkqhmbqqpjz1f3ny4wdh5mdc7jlnbgy6nxx6vqcmkh0";
|
|
name = "yosys";
|
|
})
|
|
|
|
# NOTE: the version of abc used here is synchronized with
|
|
# the one in the yosys Makefile of the version above;
|
|
# keep them the same for quality purposes.
|
|
(fetchFromGitHub {
|
|
owner = "berkeley-abc";
|
|
repo = "abc";
|
|
rev = "3709744c60696c5e3f4cc123939921ce8107fe04";
|
|
sha256 = "18a9cjng3qfalq8m9az5ck1y5h4l2pf9ycrvkzs9hn82b1j7vrax";
|
|
name = "yosys-abc";
|
|
})
|
|
];
|
|
sourceRoot = "yosys";
|
|
|
|
enableParallelBuilding = true;
|
|
nativeBuildInputs = [ pkgconfig ];
|
|
buildInputs = [ tcl readline libffi python3 bison flex protobuf ];
|
|
|
|
makeFlags = [ "ENABLE_PROTOBUF=1" ];
|
|
|
|
patchPhase = ''
|
|
substituteInPlace ../yosys-abc/Makefile \
|
|
--replace 'CC := gcc' ""
|
|
substituteInPlace ./Makefile \
|
|
--replace 'CXX = clang' "" \
|
|
--replace 'ABCMKARGS = CC="$(CXX)"' 'ABCMKARGS =' \
|
|
--replace 'echo UNKNOWN' 'echo ${substring 0 10 (elemAt srcs 0).rev}'
|
|
'';
|
|
|
|
preBuild = ''
|
|
chmod -R u+w ../yosys-abc
|
|
ln -s ../yosys-abc abc
|
|
make config-${if stdenv.cc.isClang or false then "clang" else "gcc"}
|
|
echo 'ABCREV := default' >> Makefile.conf
|
|
makeFlags="PREFIX=$out $makeFlags"
|
|
|
|
# we have to do this ourselves for some reason...
|
|
(cd misc && ${protobuf}/bin/protoc --cpp_out ../backends/protobuf/ ./yosys.proto)
|
|
'';
|
|
|
|
meta = {
|
|
description = "Framework for RTL synthesis tools";
|
|
longDescription = ''
|
|
Yosys is a framework for RTL synthesis tools. It currently has
|
|
extensive Verilog-2005 support and provides a basic set of
|
|
synthesis algorithms for various application domains.
|
|
Yosys can be adapted to perform any synthesis job by combining
|
|
the existing passes (algorithms) using synthesis scripts and
|
|
adding additional passes as needed by extending the yosys C++
|
|
code base.
|
|
'';
|
|
homepage = http://www.clifford.at/yosys/;
|
|
license = stdenv.lib.licenses.isc;
|
|
maintainers = with stdenv.lib.maintainers; [ shell thoughtpolice ];
|
|
platforms = stdenv.lib.platforms.unix;
|
|
};
|
|
}
|