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5d44c9a222
The testing scheme for vhd2vl is sensitive to subtle shifts in iverilog's parenthesization choices, meaning that the golden test outputs require constant maintenance. The patch previously applied in order to deal with this situation is no longer sufficient, so a patch which is sufficient has been added. Also, the `buildTargets` and `checkTarget` attributes have been set, so future benign failures of this sort can be dealt with through `doCheck=false` in a pinch. |
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adms | ||
alliance | ||
appcsxcad | ||
archimedes | ||
bitscope | ||
caneda | ||
csxcad | ||
diylc | ||
dsview | ||
dwfv | ||
eagle | ||
flatcam | ||
fparser | ||
fped | ||
fritzing | ||
gaw | ||
geda | ||
gerbv | ||
gnucap | ||
gtkwave | ||
hal-hardware-analyzer | ||
horizon-eda | ||
hyp2mat | ||
kicad | ||
lepton-eda | ||
librepcb | ||
magic-vlsi | ||
nanovna-saver | ||
ngspice | ||
openems | ||
openhantek6022 | ||
openroad | ||
pcb | ||
picoscope | ||
pulseview | ||
qfsm | ||
qucs | ||
qucs-s | ||
tkgate | ||
verilator | ||
verilog | ||
vhd2vl | ||
xcircuit | ||
xoscope | ||
xschem | ||
xyce |