Commit Graph

1 Commits

Author SHA1 Message Date
Henner Zeller
5f90d90447
verible: init at 0.0-2172-g238b6df6
Verible is a suite of SystemVerilog developer tools, including a parser,
style-linter, formatter, and language server.

Signed-off-by: Henner Zeller <h.zeller@acm.org>
2022-08-28 16:35:55 -07:00