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Surelog: init at 2022.05.15

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This commit is contained in:
Matt Huszagh 2022-05-15 15:05:27 -07:00
parent 2f9cebbb41
commit 2dcb43e59a
2 changed files with 51 additions and 0 deletions
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49
pkgs/applications/science/logic/surelog/default.nix Normal file
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@ -0,0 +1,49 @@
{ lib
, stdenv
, fetchFromGitHub
, cmake
, python3
, pkg-config
, libuuid
, openjdk11
}:
stdenv.mkDerivation rec {
pname = "Surelog";
version = "2022.05.15";
src = fetchFromGitHub {
owner = "chipsalliance";
repo = pname;
rev = "15d3698ca5c7d45dd95b58c15e76131420cb001c";
hash = "sha256-dfje9yZ8ZR7x1EUxDUpKNcOWKYTPwPG6T4HzudV59R4=";
fetchSubmodules = true;
};
nativeBuildInputs = [
cmake
pkg-config
];
buildInputs = [
libuuid
openjdk11
(python3.withPackages (p: with p; [
psutil
orderedmultidict
]))
];
postInstall = ''
mv $out/lib/surelog/* $out/lib/
rm -rf $out/lib/surelog
'';
meta = {
description = "SystemVerilog 2017 Pre-processor, Parser, Elaborator, UHDM Compiler";
homepage = "https://github.com/chipsalliance/Surelog";
license = lib.licenses.asl20;
maintainers = with lib.maintainers; [ matthuszagh ];
platforms = lib.platforms.all;
};
}

2
pkgs/top-level/all-packages.nix
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@ -33419,6 +33419,8 @@ with pkgs;
uhdm = callPackage ../applications/science/logic/uhdm {};
surelog = callPackage ../applications/science/logic/surelog {};
mcy = callPackage ../applications/science/logic/mcy {};
lingeling = callPackage ../applications/science/logic/lingeling {};