2019-01-08 22:56:16 +00:00
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{ stdenv, fetchFromGitHub
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, python3, boost
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, cmake
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}:
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2018-08-02 08:18:47 +00:00
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let
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2019-01-08 22:56:16 +00:00
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boostWithPython3 = boost.override { python = python3; enablePython = true; };
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2018-08-02 08:18:47 +00:00
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in
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stdenv.mkDerivation rec {
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2019-08-13 23:39:13 +00:00
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pname = "trellis";
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2019-10-13 16:28:14 +00:00
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version = "2019.10.13";
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2019-09-27 14:06:56 +00:00
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# git describe --tags
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2019-08-31 14:04:42 +00:00
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realVersion = with stdenv.lib; with builtins;
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2019-10-13 16:28:14 +00:00
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"1.0-95-g${substring 0 7 (elemAt srcs 0).rev}";
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2018-08-02 08:18:47 +00:00
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2019-01-08 22:56:16 +00:00
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srcs = [
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(fetchFromGitHub {
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2019-10-13 16:28:14 +00:00
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owner = "SymbiFlow";
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2019-01-08 22:56:16 +00:00
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repo = "prjtrellis";
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2019-10-13 16:28:14 +00:00
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rev = "e2e10bfdfaa29fed5d19e83dc7460be9880f5af4";
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sha256 = "0l59nliv75rdxnajl2plilib0r0bzbr3qqzc88cdal841x1m0izs";
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2019-01-08 22:56:16 +00:00
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name = "trellis";
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})
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(fetchFromGitHub {
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2019-10-13 16:28:14 +00:00
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owner = "SymbiFlow";
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2019-01-08 22:56:16 +00:00
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repo = "prjtrellis-db";
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2019-10-13 16:28:14 +00:00
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rev = "5b5bb70bae13e6b8c971b4b2d26931f4a64b51bc";
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sha256 = "1fi963zdny3gxdvq564037qs22i7b4y7mxc3yij2a1ww8rzrnpdj";
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name = "trellis-database";
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2019-01-08 22:56:16 +00:00
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})
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2018-08-02 08:18:47 +00:00
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];
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2019-01-08 22:56:16 +00:00
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sourceRoot = "trellis";
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2018-08-02 08:18:47 +00:00
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2019-01-08 22:56:16 +00:00
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buildInputs = [ boostWithPython3 ];
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nativeBuildInputs = [ cmake python3 ];
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2019-09-27 14:06:56 +00:00
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cmakeFlags = [ "-DCURRENT_GIT_VERSION=${realVersion}" ];
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2018-08-02 08:18:47 +00:00
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2019-01-08 22:56:16 +00:00
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preConfigure = with builtins; ''
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rmdir database && ln -sfv ${elemAt srcs 1} ./database
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2018-08-02 08:18:47 +00:00
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source environment.sh
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cd libtrellis
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'';
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2019-01-08 22:56:16 +00:00
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meta = with stdenv.lib; {
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description = "Documentation and bitstream tools for Lattice ECP5 FPGAs";
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2018-08-02 08:18:47 +00:00
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longDescription = ''
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Project Trellis documents the Lattice ECP5 architecture
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to enable development of open-source tools. Its goal is
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to provide sufficient information to develop a free and
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open Verilog to bitstream toolchain for these devices.
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'';
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2019-01-08 22:56:16 +00:00
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homepage = https://github.com/symbiflow/prjtrellis;
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license = stdenv.lib.licenses.isc;
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2019-08-20 05:02:29 +00:00
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maintainers = with maintainers; [ q3k thoughtpolice emily ];
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platforms = stdenv.lib.platforms.all;
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2018-08-02 08:18:47 +00:00
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};
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}
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