mirror of
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124 lines
4.9 KiB
Diff
124 lines
4.9 KiB
Diff
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# HG changeset patch
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# User John Paul Adrian Glaubitz <glaubitz@physik.fu-berlin.de>
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# Date 1592464269 0
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# Thu Jun 18 07:11:09 2020 +0000
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# Node ID 5de7d747a962df5f8aefc016a62d7270ac18879e
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# Parent e4b11f027efc1f8c2710ae3f52487a8f10a8fb39
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Bug 1318905 - build: Add riscv64 as target architecture to mozbuild r=glandium
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Adds the basic definitions for riscv64 to mozbuild, allowing to build Spidermonkey.
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Differential Revision: https://phabricator.services.mozilla.com/D78623
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diff -r e4b11f027efc -r 5de7d747a962 build/moz.configure/init.configure
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--- a/build/moz.configure/init.configure Sun May 31 17:11:57 2020 +0000
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+++ b/build/moz.configure/init.configure Thu Jun 18 07:11:09 2020 +0000
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@@ -741,6 +741,9 @@
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elif cpu.startswith('aarch64'):
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canonical_cpu = 'aarch64'
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endianness = 'little'
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+ elif cpu in ('riscv64', 'riscv64gc'):
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+ canonical_cpu = 'riscv64'
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+ endianness = 'little'
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elif cpu == 'sh4':
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canonical_cpu = 'sh4'
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endianness = 'little'
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diff -r e4b11f027efc -r 5de7d747a962 python/mozbuild/mozbuild/configure/constants.py
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--- a/python/mozbuild/mozbuild/configure/constants.py Sun May 31 17:11:57 2020 +0000
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+++ b/python/mozbuild/mozbuild/configure/constants.py Thu Jun 18 07:11:09 2020 +0000
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@@ -49,6 +49,7 @@
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'mips64': 64,
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'ppc': 32,
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'ppc64': 64,
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+ 'riscv64': 64,
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's390': 32,
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's390x': 64,
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'sh4': 32,
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@@ -87,6 +88,7 @@
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('sparc', '__sparc__'),
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('mips64', '__mips64'),
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('mips32', '__mips__'),
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+ ('riscv64', '__riscv && __riscv_xlen == 64'),
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('sh4', '__sh__'),
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))
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diff -r e4b11f027efc -r 5de7d747a962 python/mozbuild/mozbuild/test/configure/test_toolchain_configure.py
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--- a/python/mozbuild/mozbuild/test/configure/test_toolchain_configure.py Sun May 31 17:11:57 2020 +0000
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+++ b/python/mozbuild/mozbuild/test/configure/test_toolchain_configure.py Thu Jun 18 07:11:09 2020 +0000
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@@ -1208,6 +1208,10 @@
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'mips-unknown-linux-gnu': big_endian + {
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'__mips__': 1,
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},
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+ 'riscv64-unknown-linux-gnu': little_endian + {
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+ '__riscv': 1,
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+ '__riscv_xlen': 64,
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+ },
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'sh4-unknown-linux-gnu': little_endian + {
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'__sh__': 1,
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},
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# HG changeset patch
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# User John Paul Adrian Glaubitz <glaubitz@physik.fu-berlin.de>
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# Date 1592464269 0
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# Thu Jun 18 07:11:09 2020 +0000
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# Node ID e3d924797cb2d508ff938414168e98ccf66f07fe
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# Parent 5de7d747a962df5f8aefc016a62d7270ac18879e
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Bug 1318905 - js:jit: Enable AtomicOperations-feeling-lucky.h on riscv64 r=lth
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This allows the build on riscv64 to use the atomic operations provided by GCC.
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Differential Revision: https://phabricator.services.mozilla.com/D78624
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diff -r 5de7d747a962 -r e3d924797cb2 js/src/jit/AtomicOperations.h
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--- a/js/src/jit/AtomicOperations.h Thu Jun 18 07:11:09 2020 +0000
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+++ b/js/src/jit/AtomicOperations.h Thu Jun 18 07:11:09 2020 +0000
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@@ -391,7 +391,7 @@
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#elif defined(__ppc__) || defined(__PPC__) || defined(__sparc__) || \
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defined(__ppc64__) || defined(__PPC64__) || defined(__ppc64le__) || \
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defined(__PPC64LE__) || defined(__alpha__) || defined(__hppa__) || \
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- defined(__sh__) || defined(__s390__) || defined(__s390x__)
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+ defined(__sh__) || defined(__s390__) || defined(__s390x__) || defined(__riscv)
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# include "jit/shared/AtomicOperations-feeling-lucky.h"
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#else
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# error "No AtomicOperations support provided for this platform"
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diff -r 5de7d747a962 -r e3d924797cb2 js/src/jit/shared/AtomicOperations-feeling-lucky-gcc.h
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--- a/js/src/jit/shared/AtomicOperations-feeling-lucky-gcc.h Thu Jun 18 07:11:09 2020 +0000
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+++ b/js/src/jit/shared/AtomicOperations-feeling-lucky-gcc.h Thu Jun 18 07:11:09 2020 +0000
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@@ -63,6 +63,11 @@
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# define HAS_64BIT_LOCKFREE
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#endif
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+#if defined(__riscv) && __riscv_xlen == 64
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+# define HAS_64BIT_ATOMICS
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+# define HAS_64BIT_LOCKFREE
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+#endif
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+
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#ifdef __sparc__
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# ifdef __LP64__
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# define HAS_64BIT_ATOMICS
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# HG changeset patch
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# User John Paul Adrian Glaubitz <glaubitz@physik.fu-berlin.de>
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# Date 1592464269 0
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# Thu Jun 18 07:11:09 2020 +0000
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# Node ID 3f652d12b8bc0bd213020d488ecb4d3710bb11fa
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# Parent e3d924797cb2d508ff938414168e98ccf66f07fe
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Bug 1318905 - mfbt:tests: Define RETURN_INSTR for riscv64 in TestPoisonArea r=glandium
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Define RETURN_INSTR for riscv64 in TestPoisonArea, i.e. the riscv64 assembly
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opcodes for "ret ; ret".
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Differential Revision: https://phabricator.services.mozilla.com/D78625
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diff -r e3d924797cb2 -r 3f652d12b8bc mfbt/tests/TestPoisonArea.cpp
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--- a/mfbt/tests/TestPoisonArea.cpp Thu Jun 18 07:11:09 2020 +0000
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+++ b/mfbt/tests/TestPoisonArea.cpp Thu Jun 18 07:11:09 2020 +0000
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@@ -132,6 +132,9 @@
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#elif defined _ARCH_PPC || defined _ARCH_PWR || defined _ARCH_PWR2
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# define RETURN_INSTR 0x4E800020 /* blr */
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+#elif defined __riscv
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+# define RETURN_INSTR 0x80828082 /* ret; ret */
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+
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#elif defined __sparc || defined __sparcv9
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# define RETURN_INSTR 0x81c3e008 /* retl */
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