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Create compile-commands.json with Make
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@ -142,6 +142,7 @@ GTAGS
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# auto-generated compilation database
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compile_commands.json
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*.compile_commands.json
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nix-rust/target
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11
mk/compilation-database.mk
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11
mk/compilation-database.mk
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@ -0,0 +1,11 @@
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compile-commands-json-files :=
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define write-compile-commands
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_srcs := $$(sort $$(foreach src, $$($(1)_SOURCES), $$(src)))
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$(1)_COMPILE_COMMANDS_JSON := $$(addprefix $(buildprefix), $$(addsuffix .compile_commands.json, $$(basename $$(_srcs))))
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compile-commands-json-files += $$($(1)_COMPILE_COMMANDS_JSON)
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clean-files += $$($(1)_COMPILE_COMMANDS_JSON)
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endef
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@ -68,6 +68,7 @@ include mk/patterns.mk
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include mk/templates.mk
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include mk/cxx-big-literal.mk
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include mk/tests.mk
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include mk/compilation-database.mk
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# Include all sub-Makefiles.
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@ -97,6 +98,13 @@ $(foreach test-group, $(install-tests-groups), \
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$(eval $(call run-test,$(test),$(install_test_init))) \
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$(eval $(test-group).test-group: $(test).test)))
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# Compilation database.
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$(foreach lib, $(libraries), $(eval $(call write-compile-commands,$(lib))))
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$(foreach prog, $(programs), $(eval $(call write-compile-commands,$(prog))))
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compile_commands.json: $(compile-commands-json-files)
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@jq --slurp '.' $^ >$@
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# Include makefiles requiring built programs.
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$(foreach mf, $(makefiles-late), $(eval $(call include-sub-makefile,$(mf))))
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@ -1,11 +1,41 @@
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# These are the complete command lines we use to compile C and C++ files.
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# - $< is the source file.
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# - $1 is the object file to create.
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CC_CMD=$(CC) -o $1 -c $< $(CPPFLAGS) $(GLOBAL_CFLAGS) $(CFLAGS) $($1_CFLAGS) -MMD -MF $(call filename-to-dep,$1) -MP
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CXX_CMD=$(CXX) -o $1 -c $< $(CPPFLAGS) $(GLOBAL_CXXFLAGS_PCH) $(GLOBAL_CXXFLAGS) $(CXXFLAGS) $($1_CXXFLAGS) $(ERROR_SWITCH_ENUM) -MMD -MF $(call filename-to-dep,$1) -MP
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# We use COMPILE_COMMANDS_JSON_CMD to turn a compilation command (like CC_CMD
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# or CXX_CMD above) into a comple_commands.json file. We rely on bash native
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# word splitting to define the positional arguments.
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# - $< is the source file being compiled.
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COMPILE_COMMANDS_JSON_CMD=jq --null-input '{ directory: $$ENV.PWD, file: "$<", arguments: $$ARGS.positional }' --args --
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$(buildprefix)%.o: %.cc
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@mkdir -p "$(dir $@)"
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$(trace-cxx) $(CXX) -o $@ -c $< $(CPPFLAGS) $(GLOBAL_CXXFLAGS_PCH) $(GLOBAL_CXXFLAGS) $(CXXFLAGS) $($@_CXXFLAGS) $(ERROR_SWITCH_ENUM) -MMD -MF $(call filename-to-dep, $@) -MP
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$(trace-cxx) $(call CXX_CMD,$@)
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$(buildprefix)%.o: %.cpp
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@mkdir -p "$(dir $@)"
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$(trace-cxx) $(CXX) -o $@ -c $< $(CPPFLAGS) $(GLOBAL_CXXFLAGS_PCH) $(GLOBAL_CXXFLAGS) $(CXXFLAGS) $($@_CXXFLAGS) $(ERROR_SWITCH_ENUM) -MMD -MF $(call filename-to-dep, $@) -MP
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$(trace-cxx) $(call CXX_CMD,$@)
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$(buildprefix)%.o: %.c
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@mkdir -p "$(dir $@)"
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$(trace-cc) $(CC) -o $@ -c $< $(CPPFLAGS) $(GLOBAL_CFLAGS) $(CFLAGS) $($@_CFLAGS) -MMD -MF $(call filename-to-dep, $@) -MP
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$(trace-cc) $(call CC_CMD,$@)
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# In the following we need to replace the .compile_commands.json extension in $@ with .o
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# to make the object file. This is needed because CC_CMD and CXX_CMD do further expansions
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# based on the object file name (i.e. *_CXXFLAGS and filename-to-dep).
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$(buildprefix)%.compile_commands.json: %.cc
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@mkdir -p "$(dir $@)"
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$(trace-jq) $(COMPILE_COMMANDS_JSON_CMD) $(call CXX_CMD,$(@:.compile_commands.json=.o)) > $@
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$(buildprefix)%.compile_commands.json: %.cpp
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@mkdir -p "$(dir $@)"
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$(trace-jq) $(COMPILE_COMMANDS_JSON_CMD) $(call CXX_CMD,$(@:.compile_commands.json=.o)) > $@
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$(buildprefix)%.compile_commands.json: %.c
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@mkdir -p "$(dir $@)"
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$(trace-jq) $(COMPILE_COMMANDS_JSON_CMD) $(call CC_CMD,$(@:.compile_commands.json=.o)) > $@
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@ -10,6 +10,8 @@ ifeq ($(V), 0)
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trace-install = @echo " INST " $@;
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trace-mkdir = @echo " MKDIR " $@;
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trace-test = @echo " TEST " $@;
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trace-sh = @echo " SH " $@;
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trace-jq = @echo " JQ " $@;
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suppress = @
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