diff --git a/embassy-stm32/src/tsc/acquisition_banks.rs b/embassy-stm32/src/tsc/acquisition_banks.rs
index 21a5c3f87..6791ef6c1 100644
--- a/embassy-stm32/src/tsc/acquisition_banks.rs
+++ b/embassy-stm32/src/tsc/acquisition_banks.rs
@@ -1,69 +1,69 @@
+use super::io_pin::*;
 #[cfg(any(tsc_v2, tsc_v3))]
 use super::pin_groups::G7;
 #[cfg(tsc_v3)]
 use super::pin_groups::G8;
-use super::pin_groups::{tsc_pin_roles, G1, G2, G3, G4, G5, G6};
-use super::tsc_io_pin::*;
+use super::pin_groups::{pin_roles, G1, G2, G3, G4, G5, G6};
 use super::types::{Group, GroupStatus};
 use super::TSC_NUM_GROUPS;
 
 /// Represents a collection of TSC (Touch Sensing Controller) pins for an acquisition bank.
 ///
-/// This struct holds optional `TscIOPin` values for each TSC group, allowing for flexible
+/// This struct holds optional `tsc::IOPin` values for each TSC group, allowing for flexible
 /// configuration of TSC acquisition banks. Each field corresponds to a specific TSC group
-/// and can be set to `Some(TscIOPin)` if that group is to be included in the acquisition,
+/// and can be set to `Some(tsc::IOPin)` if that group is to be included in the acquisition,
 /// or `None` if it should be excluded.
 #[allow(missing_docs)]
 #[derive(Default)]
-pub struct TscAcquisitionBankPins {
-    pub g1_pin: Option<TscIOPinWithRole<G1, tsc_pin_roles::Channel>>,
-    pub g2_pin: Option<TscIOPinWithRole<G2, tsc_pin_roles::Channel>>,
-    pub g3_pin: Option<TscIOPinWithRole<G3, tsc_pin_roles::Channel>>,
-    pub g4_pin: Option<TscIOPinWithRole<G4, tsc_pin_roles::Channel>>,
-    pub g5_pin: Option<TscIOPinWithRole<G5, tsc_pin_roles::Channel>>,
-    pub g6_pin: Option<TscIOPinWithRole<G6, tsc_pin_roles::Channel>>,
+pub struct AcquisitionBankPins {
+    pub g1_pin: Option<IOPinWithRole<G1, pin_roles::Channel>>,
+    pub g2_pin: Option<IOPinWithRole<G2, pin_roles::Channel>>,
+    pub g3_pin: Option<IOPinWithRole<G3, pin_roles::Channel>>,
+    pub g4_pin: Option<IOPinWithRole<G4, pin_roles::Channel>>,
+    pub g5_pin: Option<IOPinWithRole<G5, pin_roles::Channel>>,
+    pub g6_pin: Option<IOPinWithRole<G6, pin_roles::Channel>>,
     #[cfg(any(tsc_v2, tsc_v3))]
-    pub g7_pin: Option<TscIOPinWithRole<G7, tsc_pin_roles::Channel>>,
+    pub g7_pin: Option<IOPinWithRole<G7, pin_roles::Channel>>,
     #[cfg(tsc_v3)]
-    pub g8_pin: Option<TscIOPinWithRole<G8, tsc_pin_roles::Channel>>,
+    pub g8_pin: Option<IOPinWithRole<G8, pin_roles::Channel>>,
 }
 
-impl TscAcquisitionBankPins {
+impl AcquisitionBankPins {
     /// Returns an iterator over the pins in this acquisition bank.
     ///
     /// This method allows for easy traversal of all configured pins in the bank.
-    pub fn iter(&self) -> TscAcquisitionBankPinsIterator {
-        TscAcquisitionBankPinsIterator(TscAcquisitionBankIterator::new(self))
+    pub fn iter(&self) -> AcquisitionBankPinsIterator {
+        AcquisitionBankPinsIterator(AcquisitionBankIterator::new(self))
     }
 }
 
 /// Iterator for TSC acquisition banks.
 ///
-/// This iterator allows traversing through the pins of a `TscAcquisitionBankPins` struct,
+/// This iterator allows traversing through the pins of a `AcquisitionBankPins` struct,
 /// yielding each configured pin in order of the TSC groups.
-pub struct TscAcquisitionBankIterator<'a> {
-    pins: &'a TscAcquisitionBankPins,
+pub struct AcquisitionBankIterator<'a> {
+    pins: &'a AcquisitionBankPins,
     current_group: u8,
 }
 
-impl<'a> TscAcquisitionBankIterator<'a> {
-    fn new(pins: &'a TscAcquisitionBankPins) -> Self {
+impl<'a> AcquisitionBankIterator<'a> {
+    fn new(pins: &'a AcquisitionBankPins) -> Self {
         Self { pins, current_group: 0 }
     }
 
-    fn next_pin(&mut self) -> Option<TscIOPin> {
+    fn next_pin(&mut self) -> Option<IOPin> {
         while self.current_group < TSC_NUM_GROUPS as u8 {
             let pin = match self.current_group {
-                0 => self.pins.g1_pin.map(TscIOPinWithRole::get_pin),
-                1 => self.pins.g2_pin.map(TscIOPinWithRole::get_pin),
-                2 => self.pins.g3_pin.map(TscIOPinWithRole::get_pin),
-                3 => self.pins.g4_pin.map(TscIOPinWithRole::get_pin),
-                4 => self.pins.g5_pin.map(TscIOPinWithRole::get_pin),
-                5 => self.pins.g6_pin.map(TscIOPinWithRole::get_pin),
+                0 => self.pins.g1_pin.map(IOPinWithRole::get_pin),
+                1 => self.pins.g2_pin.map(IOPinWithRole::get_pin),
+                2 => self.pins.g3_pin.map(IOPinWithRole::get_pin),
+                3 => self.pins.g4_pin.map(IOPinWithRole::get_pin),
+                4 => self.pins.g5_pin.map(IOPinWithRole::get_pin),
+                5 => self.pins.g6_pin.map(IOPinWithRole::get_pin),
                 #[cfg(any(tsc_v2, tsc_v3))]
-                6 => self.pins.g7_pin.map(TscIOPinWithRole::get_pin),
+                6 => self.pins.g7_pin.map(IOPinWithRole::get_pin),
                 #[cfg(tsc_v3)]
-                7 => self.pins.g8_pin.map(TscIOPinWithRole::get_pin),
+                7 => self.pins.g8_pin.map(IOPinWithRole::get_pin),
                 _ => None,
             };
             self.current_group += 1;
@@ -77,21 +77,21 @@ impl<'a> TscAcquisitionBankIterator<'a> {
 
 /// Iterator for TSC acquisition bank pins.
 ///
-/// This iterator yields `TscIOPin` values for each configured pin in the acquisition bank.
-pub struct TscAcquisitionBankPinsIterator<'a>(TscAcquisitionBankIterator<'a>);
+/// This iterator yields `tsc::IOPin` values for each configured pin in the acquisition bank.
+pub struct AcquisitionBankPinsIterator<'a>(AcquisitionBankIterator<'a>);
 
-impl<'a> Iterator for TscAcquisitionBankPinsIterator<'a> {
-    type Item = TscIOPin;
+impl<'a> Iterator for AcquisitionBankPinsIterator<'a> {
+    type Item = IOPin;
 
     fn next(&mut self) -> Option<Self::Item> {
         self.0.next_pin()
     }
 }
 
-impl TscAcquisitionBankPins {
+impl AcquisitionBankPins {
     /// Returns an iterator over the available pins in the bank
-    pub fn pins_iterator(&self) -> TscAcquisitionBankPinsIterator {
-        TscAcquisitionBankPinsIterator(TscAcquisitionBankIterator::new(self))
+    pub fn pins_iterator(&self) -> AcquisitionBankPinsIterator {
+        AcquisitionBankPinsIterator(AcquisitionBankIterator::new(self))
     }
 }
 
@@ -100,14 +100,14 @@ impl TscAcquisitionBankPins {
 /// This struct contains a set of pins to be used in a TSC acquisition with a pre-computed and
 /// verified mask for efficiently setting up the TSC peripheral before performing an acquisition.
 /// It ensures that only one channel pin per TSC group is included, adhering to hardware limitations.
-pub struct TscAcquisitionBank {
-    pub(super) pins: TscAcquisitionBankPins,
+pub struct AcquisitionBank {
+    pub(super) pins: AcquisitionBankPins,
     pub(super) mask: u32,
 }
 
-impl TscAcquisitionBank {
+impl AcquisitionBank {
     /// Returns an iterator over the available pins in the bank.
-    pub fn pins_iterator(&self) -> TscAcquisitionBankPinsIterator {
+    pub fn pins_iterator(&self) -> AcquisitionBankPinsIterator {
         self.pins.pins_iterator()
     }
 
@@ -122,8 +122,8 @@ impl TscAcquisitionBank {
     /// * `group` - The TSC group to retrieve the pin for.
     ///
     /// # Returns
-    /// An `Option<TscIOPin>` containing the pin if it exists for the given group, or `None` if not.
-    pub fn get_pin(&self, group: Group) -> Option<TscIOPin> {
+    /// An `Option<tsc::IOPin>` containing the pin if it exists for the given group, or `None` if not.
+    pub fn get_pin(&self, group: Group) -> Option<IOPin> {
         match group {
             Group::One => self.pins.g1_pin.map(|p| p.pin),
             Group::Two => self.pins.g2_pin.map(|p| p.pin),
@@ -141,11 +141,11 @@ impl TscAcquisitionBank {
 
 /// Represents the status of all TSC groups in an acquisition bank
 #[derive(Default)]
-pub struct TscAcquisitionBankStatus {
+pub struct AcquisitionBankStatus {
     pub(super) groups: [Option<GroupStatus>; TSC_NUM_GROUPS],
 }
 
-impl TscAcquisitionBankStatus {
+impl AcquisitionBankStatus {
     /// Check if all groups in the bank are complete
     pub fn all_complete(&self) -> bool {
         self.groups
@@ -174,36 +174,36 @@ impl TscAcquisitionBankStatus {
 
 /// Represents the result of a Touch Sensing Controller (TSC) acquisition for a specific pin.
 ///
-/// This struct contains a reference to the `TscIOPin` from which a value was read,
+/// This struct contains a reference to the `tsc::IOPin` from which a value was read,
 /// along with the actual sensor reading for that pin. It provides a convenient way
 /// to associate TSC readings with their corresponding pins after an acquisition.
 #[cfg_attr(feature = "defmt", derive(defmt::Format))]
 #[derive(Clone, Copy, Debug)]
-pub struct TscChannelReading {
+pub struct ChannelReading {
     /// The sensor reading value obtained from the TSC acquisition.
     /// Lower values typically indicate a detected touch, while higher values indicate no touch.
     pub sensor_value: u16,
 
-    /// The `TscIOPin` associated with this reading.
+    /// The `tsc::IOPin` associated with this reading.
     /// This allows for easy identification of which pin the reading corresponds to.
-    pub tsc_pin: TscIOPin,
+    pub tsc_pin: IOPin,
 }
 
 /// Represents the readings from all TSC groups
 #[derive(Default)]
-pub struct TscAcquisitionBankReadings {
-    pub(super) groups: [Option<TscChannelReading>; TSC_NUM_GROUPS],
+pub struct AcquisitionBankReadings {
+    pub(super) groups: [Option<ChannelReading>; TSC_NUM_GROUPS],
 }
 
-impl TscAcquisitionBankReadings {
+impl AcquisitionBankReadings {
     /// Get the reading for a specific group, if the group is present in the bank
-    pub fn get_group_reading(&self, group: Group) -> Option<TscChannelReading> {
+    pub fn get_group_reading(&self, group: Group) -> Option<ChannelReading> {
         let index: usize = group.into();
         self.groups[index]
     }
 
     /// Iterator for readings for groups present in the bank
-    pub fn iter(&self) -> impl Iterator<Item = TscChannelReading> + '_ {
+    pub fn iter(&self) -> impl Iterator<Item = ChannelReading> + '_ {
         self.groups.iter().filter_map(|&x| x)
     }
 }
diff --git a/embassy-stm32/src/tsc/io_pin.rs b/embassy-stm32/src/tsc/io_pin.rs
new file mode 100644
index 000000000..ad2010ed7
--- /dev/null
+++ b/embassy-stm32/src/tsc/io_pin.rs
@@ -0,0 +1,200 @@
+use core::marker::PhantomData;
+use core::ops::{BitAnd, BitOr, BitOrAssign};
+
+use super::pin_roles;
+use super::types::Group;
+
+/// Pin defines
+#[allow(missing_docs)]
+#[cfg_attr(feature = "defmt", derive(defmt::Format))]
+#[derive(PartialEq, Clone, Copy, Debug)]
+pub enum IOPin {
+    Group1Io1,
+    Group1Io2,
+    Group1Io3,
+    Group1Io4,
+    Group2Io1,
+    Group2Io2,
+    Group2Io3,
+    Group2Io4,
+    Group3Io1,
+    Group3Io2,
+    Group3Io3,
+    Group3Io4,
+    Group4Io1,
+    Group4Io2,
+    Group4Io3,
+    Group4Io4,
+    Group5Io1,
+    Group5Io2,
+    Group5Io3,
+    Group5Io4,
+    Group6Io1,
+    Group6Io2,
+    Group6Io3,
+    Group6Io4,
+    #[cfg(any(tsc_v2, tsc_v3))]
+    Group7Io1,
+    #[cfg(any(tsc_v2, tsc_v3))]
+    Group7Io2,
+    #[cfg(any(tsc_v2, tsc_v3))]
+    Group7Io3,
+    #[cfg(any(tsc_v2, tsc_v3))]
+    Group7Io4,
+    #[cfg(tsc_v3)]
+    Group8Io1,
+    #[cfg(tsc_v3)]
+    Group8Io2,
+    #[cfg(tsc_v3)]
+    Group8Io3,
+    #[cfg(tsc_v3)]
+    Group8Io4,
+}
+
+/// Represents a TSC I/O pin with associated group and role information.
+///
+/// This type combines an `tsc::IOPin` with phantom type parameters to statically
+/// encode the pin's group and role. This allows for type-safe operations
+/// on TSC pins within their specific contexts.
+///
+/// - `Group`: A type parameter representing the TSC group (e.g., `G1`, `G2`).
+/// - `Role`: A type parameter representing the pin's role (e.g., `Channel`, `Sample`).
+#[derive(Clone, Copy, Debug)]
+pub struct IOPinWithRole<Group, Role: pin_roles::Role> {
+    /// The underlying TSC I/O pin.
+    pub pin: IOPin,
+    pub(super) phantom: PhantomData<(Group, Role)>,
+}
+
+impl<G, R: pin_roles::Role> IOPinWithRole<G, R> {
+    pub(super) fn get_pin(wrapped_pin: IOPinWithRole<G, R>) -> IOPin {
+        wrapped_pin.pin
+    }
+}
+
+impl IOPin {
+    /// Maps this IOPin to the Group it belongs to.
+    ///
+    /// This method provides a convenient way to determine which Group
+    /// a specific TSC I/O pin is associated with.
+    pub const fn group(&self) -> Group {
+        match self {
+            IOPin::Group1Io1 | IOPin::Group1Io2 | IOPin::Group1Io3 | IOPin::Group1Io4 => Group::One,
+            IOPin::Group2Io1 | IOPin::Group2Io2 | IOPin::Group2Io3 | IOPin::Group2Io4 => Group::Two,
+            IOPin::Group3Io1 | IOPin::Group3Io2 | IOPin::Group3Io3 | IOPin::Group3Io4 => Group::Three,
+            IOPin::Group4Io1 | IOPin::Group4Io2 | IOPin::Group4Io3 | IOPin::Group4Io4 => Group::Four,
+            IOPin::Group5Io1 | IOPin::Group5Io2 | IOPin::Group5Io3 | IOPin::Group5Io4 => Group::Five,
+            IOPin::Group6Io1 | IOPin::Group6Io2 | IOPin::Group6Io3 | IOPin::Group6Io4 => Group::Six,
+            #[cfg(any(tsc_v2, tsc_v3))]
+            IOPin::Group7Io1 | IOPin::Group7Io2 | IOPin::Group7Io3 | IOPin::Group7Io4 => Group::Seven,
+            #[cfg(tsc_v3)]
+            IOPin::Group8Io1 | IOPin::Group8Io2 | IOPin::Group8Io3 | IOPin::Group8Io4 => Group::Eight,
+        }
+    }
+
+    /// Returns the `Group` associated with the given `IOPin`.
+    pub fn get_group(pin: IOPin) -> Group {
+        pin.group()
+    }
+}
+
+impl BitOr<IOPin> for u32 {
+    type Output = u32;
+    fn bitor(self, rhs: IOPin) -> Self::Output {
+        let rhs: u32 = rhs.into();
+        self | rhs
+    }
+}
+
+impl BitOr<u32> for IOPin {
+    type Output = u32;
+    fn bitor(self, rhs: u32) -> Self::Output {
+        let val: u32 = self.into();
+        val | rhs
+    }
+}
+
+impl BitOr for IOPin {
+    type Output = u32;
+    fn bitor(self, rhs: Self) -> Self::Output {
+        let val: u32 = self.into();
+        let rhs: u32 = rhs.into();
+        val | rhs
+    }
+}
+
+impl BitOrAssign<IOPin> for u32 {
+    fn bitor_assign(&mut self, rhs: IOPin) {
+        let rhs: u32 = rhs.into();
+        *self |= rhs;
+    }
+}
+
+impl BitAnd<IOPin> for u32 {
+    type Output = u32;
+    fn bitand(self, rhs: IOPin) -> Self::Output {
+        let rhs: u32 = rhs.into();
+        self & rhs
+    }
+}
+
+impl BitAnd<u32> for IOPin {
+    type Output = u32;
+    fn bitand(self, rhs: u32) -> Self::Output {
+        let val: u32 = self.into();
+        val & rhs
+    }
+}
+
+impl IOPin {
+    const fn to_u32(self) -> u32 {
+        match self {
+            IOPin::Group1Io1 => 0x00000001,
+            IOPin::Group1Io2 => 0x00000002,
+            IOPin::Group1Io3 => 0x00000004,
+            IOPin::Group1Io4 => 0x00000008,
+            IOPin::Group2Io1 => 0x00000010,
+            IOPin::Group2Io2 => 0x00000020,
+            IOPin::Group2Io3 => 0x00000040,
+            IOPin::Group2Io4 => 0x00000080,
+            IOPin::Group3Io1 => 0x00000100,
+            IOPin::Group3Io2 => 0x00000200,
+            IOPin::Group3Io3 => 0x00000400,
+            IOPin::Group3Io4 => 0x00000800,
+            IOPin::Group4Io1 => 0x00001000,
+            IOPin::Group4Io2 => 0x00002000,
+            IOPin::Group4Io3 => 0x00004000,
+            IOPin::Group4Io4 => 0x00008000,
+            IOPin::Group5Io1 => 0x00010000,
+            IOPin::Group5Io2 => 0x00020000,
+            IOPin::Group5Io3 => 0x00040000,
+            IOPin::Group5Io4 => 0x00080000,
+            IOPin::Group6Io1 => 0x00100000,
+            IOPin::Group6Io2 => 0x00200000,
+            IOPin::Group6Io3 => 0x00400000,
+            IOPin::Group6Io4 => 0x00800000,
+            #[cfg(any(tsc_v2, tsc_v3))]
+            IOPin::Group7Io1 => 0x01000000,
+            #[cfg(any(tsc_v2, tsc_v3))]
+            IOPin::Group7Io2 => 0x02000000,
+            #[cfg(any(tsc_v2, tsc_v3))]
+            IOPin::Group7Io3 => 0x04000000,
+            #[cfg(any(tsc_v2, tsc_v3))]
+            IOPin::Group7Io4 => 0x08000000,
+            #[cfg(tsc_v3)]
+            IOPin::Group8Io1 => 0x10000000,
+            #[cfg(tsc_v3)]
+            IOPin::Group8Io2 => 0x20000000,
+            #[cfg(tsc_v3)]
+            IOPin::Group8Io3 => 0x40000000,
+            #[cfg(tsc_v3)]
+            IOPin::Group8Io4 => 0x80000000,
+        }
+    }
+}
+
+impl Into<u32> for IOPin {
+    fn into(self) -> u32 {
+        self.to_u32()
+    }
+}
diff --git a/embassy-stm32/src/tsc/mod.rs b/embassy-stm32/src/tsc/mod.rs
index 2df3847bc..0d5c27465 100644
--- a/embassy-stm32/src/tsc/mod.rs
+++ b/embassy-stm32/src/tsc/mod.rs
@@ -80,7 +80,7 @@ pub mod config;
 pub mod pin_groups;
 
 /// Definitions and implementations for individual TSC I/O pins.
-pub mod tsc_io_pin;
+pub mod io_pin;
 
 /// Structures and implementations for TSC acquisition banks.
 pub mod acquisition_banks;
@@ -100,9 +100,9 @@ pub use acquisition_banks::*;
 pub use config::*;
 use embassy_sync::waitqueue::AtomicWaker;
 pub use errors::*;
+pub use io_pin::*;
 pub use pin_groups::*;
 pub use tsc::*;
-pub use tsc_io_pin::*;
 pub use types::*;
 
 use crate::rcc::RccPeripheral;
diff --git a/embassy-stm32/src/tsc/pin_groups.rs b/embassy-stm32/src/tsc/pin_groups.rs
index b15890d6f..1f3aafa35 100644
--- a/embassy-stm32/src/tsc/pin_groups.rs
+++ b/embassy-stm32/src/tsc/pin_groups.rs
@@ -4,7 +4,7 @@ use core::ops::BitOr;
 use embassy_hal_internal::{into_ref, PeripheralRef};
 
 use super::errors::GroupError;
-use super::tsc_io_pin::*;
+use super::io_pin::*;
 use super::Instance;
 use crate::gpio::{AfType, AnyPin, OutputType, Speed};
 use crate::Peripheral;
@@ -22,14 +22,14 @@ pub enum PinType {
 
 /// Pin struct that maintains usage
 #[allow(missing_docs)]
-pub struct TscPin<'d, T, Group> {
+pub struct Pin<'d, T, Group> {
     _pin: PeripheralRef<'d, AnyPin>,
     role: PinType,
-    tsc_io_pin: TscIOPin,
+    tsc_io_pin: IOPin,
     phantom: PhantomData<(T, Group)>,
 }
 
-impl<'d, T, Group> TscPin<'d, T, Group> {
+impl<'d, T, Group> Pin<'d, T, Group> {
     /// Returns the role of this TSC pin.
     ///
     /// The role indicates whether this pin is configured as a channel,
@@ -47,8 +47,8 @@ impl<'d, T, Group> TscPin<'d, T, Group> {
     /// which includes information about the pin's group and position within that group.
     ///
     /// # Returns
-    /// The `TscIOPin` representing this pin's TSC-specific configuration.
-    pub fn tsc_io_pin(&self) -> TscIOPin {
+    /// The `IOPin` representing this pin's TSC-specific configuration.
+    pub fn tsc_io_pin(&self) -> IOPin {
         self.tsc_io_pin
     }
 }
@@ -71,10 +71,10 @@ impl<'d, T, Group> TscPin<'d, T, Group> {
 /// - No more than one shield pin is allowed across all groups.
 #[allow(missing_docs)]
 pub struct PinGroup<'d, T, Group> {
-    pin1: Option<TscPin<'d, T, Group>>,
-    pin2: Option<TscPin<'d, T, Group>>,
-    pin3: Option<TscPin<'d, T, Group>>,
-    pin4: Option<TscPin<'d, T, Group>>,
+    pin1: Option<Pin<'d, T, Group>>,
+    pin2: Option<Pin<'d, T, Group>>,
+    pin3: Option<Pin<'d, T, Group>>,
+    pin4: Option<Pin<'d, T, Group>>,
 }
 
 impl<'d, T, G> Default for PinGroup<'d, T, G> {
@@ -92,7 +92,7 @@ impl<'d, T, G> Default for PinGroup<'d, T, G> {
 ///
 /// This module contains marker types and traits that represent different roles
 /// a TSC pin can have, such as channel, sample, or shield.
-pub mod tsc_pin_roles {
+pub mod pin_roles {
     use super::{OutputType, PinType};
 
     /// Marker type for a TSC channel pin.
@@ -162,10 +162,10 @@ pub struct PinGroupWithRoles<
     'd,
     T: Instance,
     G,
-    R1 = tsc_pin_roles::Channel,
-    R2 = tsc_pin_roles::Channel,
-    R3 = tsc_pin_roles::Channel,
-    R4 = tsc_pin_roles::Channel,
+    R1 = pin_roles::Channel,
+    R2 = pin_roles::Channel,
+    R3 = pin_roles::Channel,
+    R4 = pin_roles::Channel,
 > {
     /// The underlying pin group without role information.
     pub pin_group: PinGroup<'d, T, G>,
@@ -230,38 +230,38 @@ impl<'d, T: Instance, G> PinGroup<'d, T, G> {
     }
 
     /// Returns a reference to the first pin in the group, if configured.
-    pub fn pin1(&self) -> Option<&TscPin<'d, T, G>> {
+    pub fn pin1(&self) -> Option<&Pin<'d, T, G>> {
         self.pin1.as_ref()
     }
 
     /// Returns a reference to the second pin in the group, if configured.
-    pub fn pin2(&self) -> Option<&TscPin<'d, T, G>> {
+    pub fn pin2(&self) -> Option<&Pin<'d, T, G>> {
         self.pin2.as_ref()
     }
 
     /// Returns a reference to the third pin in the group, if configured.
-    pub fn pin3(&self) -> Option<&TscPin<'d, T, G>> {
+    pub fn pin3(&self) -> Option<&Pin<'d, T, G>> {
         self.pin3.as_ref()
     }
 
     /// Returns a reference to the fourth pin in the group, if configured.
-    pub fn pin4(&self) -> Option<&TscPin<'d, T, G>> {
+    pub fn pin4(&self) -> Option<&Pin<'d, T, G>> {
         self.pin4.as_ref()
     }
 
-    fn sample_pins(&self) -> impl Iterator<Item = TscIOPin> + '_ {
+    fn sample_pins(&self) -> impl Iterator<Item = IOPin> + '_ {
         self.pins_filtered(PinType::Sample)
     }
 
-    fn shield_pins(&self) -> impl Iterator<Item = TscIOPin> + '_ {
+    fn shield_pins(&self) -> impl Iterator<Item = IOPin> + '_ {
         self.pins_filtered(PinType::Shield)
     }
 
-    fn channel_pins(&self) -> impl Iterator<Item = TscIOPin> + '_ {
+    fn channel_pins(&self) -> impl Iterator<Item = IOPin> + '_ {
         self.pins_filtered(PinType::Channel)
     }
 
-    fn pins_filtered(&self, pin_type: PinType) -> impl Iterator<Item = TscIOPin> + '_ {
+    fn pins_filtered(&self, pin_type: PinType) -> impl Iterator<Item = IOPin> + '_ {
         self.pins().into_iter().filter_map(move |pin| {
             pin.as_ref()
                 .and_then(|p| if p.role == pin_type { Some(p.tsc_io_pin) } else { None })
@@ -280,11 +280,11 @@ impl<'d, T: Instance, G> PinGroup<'d, T, G> {
         self.sample_pins().fold(0, u32::bitor)
     }
 
-    fn pins(&self) -> [&Option<TscPin<'d, T, G>>; 4] {
+    fn pins(&self) -> [&Option<Pin<'d, T, G>>; 4] {
         [&self.pin1, &self.pin2, &self.pin3, &self.pin4]
     }
 
-    fn pins_mut(&mut self) -> [&mut Option<TscPin<'d, T, G>>; 4] {
+    fn pins_mut(&mut self) -> [&mut Option<Pin<'d, T, G>>; 4] {
         [&mut self.pin1, &mut self.pin2, &mut self.pin3, &mut self.pin4]
     }
 }
@@ -317,132 +317,132 @@ macro_rules! TSC_V3_GUARD {
     }};
 }
 
-macro_rules! trait_to_tsc_io_pin {
+macro_rules! trait_to_io_pin {
     (G1IO1Pin) => {
-        TscIOPin::Group1Io1
+        IOPin::Group1Io1
     };
     (G1IO2Pin) => {
-        TscIOPin::Group1Io2
+        IOPin::Group1Io2
     };
     (G1IO3Pin) => {
-        TscIOPin::Group1Io3
+        IOPin::Group1Io3
     };
     (G1IO4Pin) => {
-        TscIOPin::Group1Io4
+        IOPin::Group1Io4
     };
 
     (G2IO1Pin) => {
-        TscIOPin::Group2Io1
+        IOPin::Group2Io1
     };
     (G2IO2Pin) => {
-        TscIOPin::Group2Io2
+        IOPin::Group2Io2
     };
     (G2IO3Pin) => {
-        TscIOPin::Group2Io3
+        IOPin::Group2Io3
     };
     (G2IO4Pin) => {
-        TscIOPin::Group2Io4
+        IOPin::Group2Io4
     };
 
     (G3IO1Pin) => {
-        TscIOPin::Group3Io1
+        IOPin::Group3Io1
     };
     (G3IO2Pin) => {
-        TscIOPin::Group3Io2
+        IOPin::Group3Io2
     };
     (G3IO3Pin) => {
-        TscIOPin::Group3Io3
+        IOPin::Group3Io3
     };
     (G3IO4Pin) => {
-        TscIOPin::Group3Io4
+        IOPin::Group3Io4
     };
 
     (G4IO1Pin) => {
-        TscIOPin::Group4Io1
+        IOPin::Group4Io1
     };
     (G4IO2Pin) => {
-        TscIOPin::Group4Io2
+        IOPin::Group4Io2
     };
     (G4IO3Pin) => {
-        TscIOPin::Group4Io3
+        IOPin::Group4Io3
     };
     (G4IO4Pin) => {
-        TscIOPin::Group4Io4
+        IOPin::Group4Io4
     };
 
     (G5IO1Pin) => {
-        TscIOPin::Group5Io1
+        IOPin::Group5Io1
     };
     (G5IO2Pin) => {
-        TscIOPin::Group5Io2
+        IOPin::Group5Io2
     };
     (G5IO3Pin) => {
-        TscIOPin::Group5Io3
+        IOPin::Group5Io3
     };
     (G5IO4Pin) => {
-        TscIOPin::Group5Io4
+        IOPin::Group5Io4
     };
 
     (G6IO1Pin) => {
-        TscIOPin::Group6Io1
+        IOPin::Group6Io1
     };
     (G6IO2Pin) => {
-        TscIOPin::Group6Io2
+        IOPin::Group6Io2
     };
     (G6IO3Pin) => {
-        TscIOPin::Group6Io3
+        IOPin::Group6Io3
     };
     (G6IO4Pin) => {
-        TscIOPin::Group6Io4
+        IOPin::Group6Io4
     };
 
     (G7IO1Pin) => {
-        TSC_V2_V3_GUARD!(TscIOPin::Group7Io1)
+        TSC_V2_V3_GUARD!(IOPin::Group7Io1)
     };
     (G7IO2Pin) => {
-        TSC_V2_V3_GUARD!(TscIOPin::Group7Io2)
+        TSC_V2_V3_GUARD!(IOPin::Group7Io2)
     };
     (G7IO3Pin) => {
-        TSC_V2_V3_GUARD!(TscIOPin::Group7Io3)
+        TSC_V2_V3_GUARD!(IOPin::Group7Io3)
     };
     (G7IO4Pin) => {
-        TSC_V2_V3_GUARD!(TscIOPin::Group7Io4)
+        TSC_V2_V3_GUARD!(IOPin::Group7Io4)
     };
 
     (G8IO1Pin) => {
-        TSC_V3_GUARD!(TscIOPin::Group8Io1)
+        TSC_V3_GUARD!(IOPin::Group8Io1)
     };
     (G8IO2Pin) => {
-        TSC_V3_GUARD!(TscIOPin::Group8Io2)
+        TSC_V3_GUARD!(IOPin::Group8Io2)
     };
     (G8IO3Pin) => {
-        TSC_V3_GUARD!(TscIOPin::Group8Io3)
+        TSC_V3_GUARD!(IOPin::Group8Io3)
     };
     (G8IO4Pin) => {
-        TSC_V3_GUARD!(TscIOPin::Group8Io4)
+        TSC_V3_GUARD!(IOPin::Group8Io4)
     };
 }
 
 macro_rules! impl_set_io {
     ($method:ident, $group:ident, $trait:ident, $index:expr) => {
         #[doc = concat!("Create a new pin1 for ", stringify!($group), " TSC group instance.")]
-        pub fn $method<Role: tsc_pin_roles::Role>(
+        pub fn $method<Role: pin_roles::Role>(
             &mut self,
             pin: impl Peripheral<P = impl $trait<T>> + 'd,
-        ) -> TscIOPinWithRole<$group, Role> {
+        ) -> IOPinWithRole<$group, Role> {
             into_ref!(pin);
             critical_section::with(|_| {
                 pin.set_low();
                 pin.set_as_af(pin.af_num(), AfType::output(Role::output_type(), Speed::VeryHigh));
-                let tsc_io_pin = trait_to_tsc_io_pin!($trait);
-                let new_pin = TscPin {
+                let tsc_io_pin = trait_to_io_pin!($trait);
+                let new_pin = Pin {
                     _pin: pin.map_into(),
                     role: Role::pin_type(),
                     tsc_io_pin,
                     phantom: PhantomData,
                 };
                 *self.pin_group.pins_mut()[$index] = Some(new_pin);
-                TscIOPinWithRole {
+                IOPinWithRole {
                     pin: tsc_io_pin,
                     phantom: PhantomData,
                 }
@@ -453,14 +453,8 @@ macro_rules! impl_set_io {
 
 macro_rules! group_impl {
     ($group:ident, $trait1:ident, $trait2:ident, $trait3:ident, $trait4:ident) => {
-        impl<
-                'd,
-                T: Instance,
-                R1: tsc_pin_roles::Role,
-                R2: tsc_pin_roles::Role,
-                R3: tsc_pin_roles::Role,
-                R4: tsc_pin_roles::Role,
-            > PinGroupWithRoles<'d, T, $group, R1, R2, R3, R4>
+        impl<'d, T: Instance, R1: pin_roles::Role, R2: pin_roles::Role, R3: pin_roles::Role, R4: pin_roles::Role>
+            PinGroupWithRoles<'d, T, $group, R1, R2, R3, R4>
         {
             impl_set_io!(set_io1, $group, $trait1, 0);
             impl_set_io!(set_io2, $group, $trait2, 1);
diff --git a/embassy-stm32/src/tsc/tsc.rs b/embassy-stm32/src/tsc/tsc.rs
index 58f9d9d2e..17d2da82f 100644
--- a/embassy-stm32/src/tsc/tsc.rs
+++ b/embassy-stm32/src/tsc/tsc.rs
@@ -8,8 +8,8 @@ use embassy_hal_internal::{into_ref, PeripheralRef};
 use super::acquisition_banks::*;
 use super::config::*;
 use super::errors::*;
+use super::io_pin::*;
 use super::pin_groups::*;
-use super::tsc_io_pin::*;
 use super::types::*;
 use super::{Instance, InterruptHandler, TSC_NUM_GROUPS};
 use crate::interrupt::typelevel::Interrupt;
@@ -20,7 +20,7 @@ use crate::{interrupt, rcc, Peripheral};
 ///
 /// These masks are used during the initial configuration of the TSC peripheral
 /// and for validating pin types during operations like creating acquisition banks.
-struct TscIOMasks {
+struct IOMasks {
     /// Mask representing all configured channel IOs
     channel_ios: u32,
     /// Mask representing all configured shield IOs
@@ -35,19 +35,19 @@ pub struct Tsc<'d, T: Instance, K: PeriMode> {
     _pin_groups: PinGroups<'d, T>,
     state: State,
     config: Config,
-    masks: TscIOMasks,
+    masks: IOMasks,
     _kind: PhantomData<K>,
 }
 
 impl<'d, T: Instance, K: PeriMode> Tsc<'d, T, K> {
     // Helper method to check if a pin is a channel pin
-    fn is_channel_pin(&self, pin: TscIOPin) -> bool {
+    fn is_channel_pin(&self, pin: IOPin) -> bool {
         (self.masks.channel_ios & pin) != 0
     }
 
-    /// Get the status of all groups involved in a TscAcquisitionBank
-    pub fn get_acquisition_bank_status(&self, bank: &TscAcquisitionBank) -> TscAcquisitionBankStatus {
-        let mut bank_status = TscAcquisitionBankStatus::default();
+    /// Get the status of all groups involved in a AcquisitionBank
+    pub fn get_acquisition_bank_status(&self, bank: &AcquisitionBank) -> AcquisitionBankStatus {
+        let mut bank_status = AcquisitionBankStatus::default();
         for pin in bank.pins_iterator() {
             let group = pin.group();
             let group_status = self.group_get_status(group);
@@ -57,13 +57,13 @@ impl<'d, T: Instance, K: PeriMode> Tsc<'d, T, K> {
         bank_status
     }
 
-    /// Get the values for all channels involved in a TscAcquisitionBank
-    pub fn get_acquisition_bank_values(&self, bank: &TscAcquisitionBank) -> TscAcquisitionBankReadings {
-        let mut bank_readings = TscAcquisitionBankReadings::default();
+    /// Get the values for all channels involved in a AcquisitionBank
+    pub fn get_acquisition_bank_values(&self, bank: &AcquisitionBank) -> AcquisitionBankReadings {
+        let mut bank_readings = AcquisitionBankReadings::default();
         for pin in bank.pins_iterator() {
             let group = pin.group();
             let value = self.group_get_value(group);
-            let reading = TscChannelReading {
+            let reading = ChannelReading {
                 sensor_value: value,
                 tsc_pin: pin,
             };
@@ -75,7 +75,7 @@ impl<'d, T: Instance, K: PeriMode> Tsc<'d, T, K> {
 
     /// Creates a new TSC acquisition bank from the provided pin configuration.
     ///
-    /// This method creates a `TscAcquisitionBank` that can be used for efficient,
+    /// This method creates a `AcquisitionBank` that can be used for efficient,
     /// repeated TSC acquisitions. It automatically generates the appropriate mask
     /// for the provided pins.
     ///
@@ -87,16 +87,16 @@ impl<'d, T: Instance, K: PeriMode> Tsc<'d, T, K> {
     /// * `acquisition_bank_pins` - The pin configuration for the acquisition bank.
     ///
     /// # Returns
-    /// A new `TscAcquisitionBank` instance.
+    /// A new `AcquisitionBank` instance.
     ///
     /// # Example
     ///
     /// ```
     /// let tsc = // ... initialize TSC
-    /// let tsc_sensor1: TscIOPinWithRole<G1, tsc_pin_roles::Channel> = ...;
-    /// let tsc_sensor2: TscIOPinWithRole<G2, tsc_pin_roles::Channel> = ...;
+    /// let tsc_sensor1: tsc::IOPinWithRole<G1, tsc_pin_roles::Channel> = ...;
+    /// let tsc_sensor2: tsc::IOPinWithRole<G2, tsc_pin_roles::Channel> = ...;
     ///
-    /// let bank = tsc.create_acquisition_bank(TscAcquisitionBankPins {
+    /// let bank = tsc.create_acquisition_bank(AcquisitionBankPins {
     ///     g1_pin: Some(tsc_sensor1),
     ///     g2_pin: Some(tsc_sensor2),
     ///     ..Default::default()
@@ -107,10 +107,10 @@ impl<'d, T: Instance, K: PeriMode> Tsc<'d, T, K> {
     /// tsc.start();
     /// // ... perform acquisition ...
     /// ```
-    pub fn create_acquisition_bank(&self, acquisition_bank_pins: TscAcquisitionBankPins) -> TscAcquisitionBank {
+    pub fn create_acquisition_bank(&self, acquisition_bank_pins: AcquisitionBankPins) -> AcquisitionBank {
         let bank_mask = acquisition_bank_pins.iter().fold(0u32, BitOr::bitor);
 
-        TscAcquisitionBank {
+        AcquisitionBank {
             pins: acquisition_bank_pins,
             mask: bank_mask,
         }
@@ -118,7 +118,7 @@ impl<'d, T: Instance, K: PeriMode> Tsc<'d, T, K> {
 
     fn make_channels_mask<Itt>(&self, channels: Itt) -> Result<u32, AcquisitionBankError>
     where
-        Itt: IntoIterator<Item = TscIOPin>,
+        Itt: IntoIterator<Item = IOPin>,
     {
         let mut group_mask = 0u32;
         let mut channel_mask = 0u32;
@@ -144,7 +144,7 @@ impl<'d, T: Instance, K: PeriMode> Tsc<'d, T, K> {
     /// Sets the active channels for the next TSC acquisition.
     ///
     /// This is a low-level method that directly sets the channel mask. For most use cases,
-    /// consider using `set_active_channels_bank` with a `TscAcquisitionBank` instead, which
+    /// consider using `set_active_channels_bank` with a `AcquisitionBank` instead, which
     /// provides a higher-level interface and additional safety checks.
     ///
     /// This method configures which sensor channels will be read during the next
@@ -167,9 +167,9 @@ impl<'d, T: Instance, K: PeriMode> Tsc<'d, T, K> {
         T::regs().ioccr().write(|w| w.0 = mask | self.masks.shield_ios);
     }
 
-    /// Convenience method for setting active channels directly from a slice of TscIOPin.
+    /// Convenience method for setting active channels directly from a slice of tsc::IOPin.
     /// This method performs safety checks but is less efficient for repeated use.
-    pub fn set_active_channels(&mut self, channels: &[TscIOPin]) -> Result<(), AcquisitionBankError> {
+    pub fn set_active_channels(&mut self, channels: &[IOPin]) -> Result<(), AcquisitionBankError> {
         let mask = self.make_channels_mask(channels.iter().cloned())?;
         self.set_active_channels_mask(mask);
         Ok(())
@@ -178,21 +178,21 @@ impl<'d, T: Instance, K: PeriMode> Tsc<'d, T, K> {
     /// Sets the active channels for the next TSC acquisition using a pre-configured acquisition bank.
     ///
     /// This method efficiently configures the TSC peripheral to read the channels specified
-    /// in the provided `TscAcquisitionBank`. It's the recommended way to set up
+    /// in the provided `AcquisitionBank`. It's the recommended way to set up
     /// channel configurations for acquisition, especially when using the same set of channels repeatedly.
     ///
     /// # Arguments
     ///
-    /// * `bank` - A reference to a `TscAcquisitionBank` containing the pre-configured
+    /// * `bank` - A reference to a `AcquisitionBank` containing the pre-configured
     ///            TSC channel mask.
     ///
     /// # Example
     ///
     /// ```
-    /// let tsc_sensor1: TscIOPinWithRole<G1, Channel> = ...;
-    /// let tsc_sensor2: TscIOPinWithRole<G5, Channel> = ...;
+    /// let tsc_sensor1: tsc::IOPinWithRole<G1, Channel> = ...;
+    /// let tsc_sensor2: tsc::IOPinWithRole<G5, Channel> = ...;
     /// let mut touch_controller: Tsc<'_, TSC, Async> = ...;
-    /// let bank = touch_controller.create_acquisition_bank(TscAcquisitionBankPins {
+    /// let bank = touch_controller.create_acquisition_bank(AcquisitionBankPins {
     ///     g1_pin: Some(tsc_sensor1),
     ///     g2_pin: Some(tsc_sensor2),
     ///     ..Default::default()
@@ -204,7 +204,7 @@ impl<'d, T: Instance, K: PeriMode> Tsc<'d, T, K> {
     /// ```
     ///
     /// This method should be called before starting a new acquisition with the `start()` method.
-    pub fn set_active_channels_bank(&mut self, bank: &TscAcquisitionBank) {
+    pub fn set_active_channels_bank(&mut self, bank: &AcquisitionBank) {
         self.set_active_channels_mask(bank.mask)
     }
 
@@ -227,7 +227,7 @@ impl<'d, T: Instance, K: PeriMode> Tsc<'d, T, K> {
 
         pin_groups.check()?;
 
-        let masks = TscIOMasks {
+        let masks = IOMasks {
             channel_ios: pin_groups.make_channel_ios_mask(),
             shield_ios: pin_groups.make_shield_ios_mask(),
             sampling_ios: pin_groups.make_sample_ios_mask(),
diff --git a/embassy-stm32/src/tsc/tsc_io_pin.rs b/embassy-stm32/src/tsc/tsc_io_pin.rs
deleted file mode 100644
index 38b27d0b3..000000000
--- a/embassy-stm32/src/tsc/tsc_io_pin.rs
+++ /dev/null
@@ -1,200 +0,0 @@
-use core::marker::PhantomData;
-use core::ops::{BitAnd, BitOr, BitOrAssign};
-
-use super::tsc_pin_roles;
-use super::types::Group;
-
-/// Pin defines
-#[allow(missing_docs)]
-#[cfg_attr(feature = "defmt", derive(defmt::Format))]
-#[derive(PartialEq, Clone, Copy, Debug)]
-pub enum TscIOPin {
-    Group1Io1,
-    Group1Io2,
-    Group1Io3,
-    Group1Io4,
-    Group2Io1,
-    Group2Io2,
-    Group2Io3,
-    Group2Io4,
-    Group3Io1,
-    Group3Io2,
-    Group3Io3,
-    Group3Io4,
-    Group4Io1,
-    Group4Io2,
-    Group4Io3,
-    Group4Io4,
-    Group5Io1,
-    Group5Io2,
-    Group5Io3,
-    Group5Io4,
-    Group6Io1,
-    Group6Io2,
-    Group6Io3,
-    Group6Io4,
-    #[cfg(any(tsc_v2, tsc_v3))]
-    Group7Io1,
-    #[cfg(any(tsc_v2, tsc_v3))]
-    Group7Io2,
-    #[cfg(any(tsc_v2, tsc_v3))]
-    Group7Io3,
-    #[cfg(any(tsc_v2, tsc_v3))]
-    Group7Io4,
-    #[cfg(tsc_v3)]
-    Group8Io1,
-    #[cfg(tsc_v3)]
-    Group8Io2,
-    #[cfg(tsc_v3)]
-    Group8Io3,
-    #[cfg(tsc_v3)]
-    Group8Io4,
-}
-
-/// Represents a TSC I/O pin with associated group and role information.
-///
-/// This type combines a `TscIOPin` with phantom type parameters to statically
-/// encode the pin's group and role. This allows for type-safe operations
-/// on TSC pins within their specific contexts.
-///
-/// - `Group`: A type parameter representing the TSC group (e.g., `G1`, `G2`).
-/// - `Role`: A type parameter representing the pin's role (e.g., `Channel`, `Sample`).
-#[derive(Clone, Copy, Debug)]
-pub struct TscIOPinWithRole<Group, Role: tsc_pin_roles::Role> {
-    /// The underlying TSC I/O pin.
-    pub pin: TscIOPin,
-    pub(super) phantom: PhantomData<(Group, Role)>,
-}
-
-impl<G, R: tsc_pin_roles::Role> TscIOPinWithRole<G, R> {
-    pub(super) fn get_pin(wrapped_pin: TscIOPinWithRole<G, R>) -> TscIOPin {
-        wrapped_pin.pin
-    }
-}
-
-impl TscIOPin {
-    /// Maps this TscIOPin to the Group it belongs to.
-    ///
-    /// This method provides a convenient way to determine which Group
-    /// a specific TSC I/O pin is associated with.
-    pub const fn group(&self) -> Group {
-        match self {
-            TscIOPin::Group1Io1 | TscIOPin::Group1Io2 | TscIOPin::Group1Io3 | TscIOPin::Group1Io4 => Group::One,
-            TscIOPin::Group2Io1 | TscIOPin::Group2Io2 | TscIOPin::Group2Io3 | TscIOPin::Group2Io4 => Group::Two,
-            TscIOPin::Group3Io1 | TscIOPin::Group3Io2 | TscIOPin::Group3Io3 | TscIOPin::Group3Io4 => Group::Three,
-            TscIOPin::Group4Io1 | TscIOPin::Group4Io2 | TscIOPin::Group4Io3 | TscIOPin::Group4Io4 => Group::Four,
-            TscIOPin::Group5Io1 | TscIOPin::Group5Io2 | TscIOPin::Group5Io3 | TscIOPin::Group5Io4 => Group::Five,
-            TscIOPin::Group6Io1 | TscIOPin::Group6Io2 | TscIOPin::Group6Io3 | TscIOPin::Group6Io4 => Group::Six,
-            #[cfg(any(tsc_v2, tsc_v3))]
-            TscIOPin::Group7Io1 | TscIOPin::Group7Io2 | TscIOPin::Group7Io3 | TscIOPin::Group7Io4 => Group::Seven,
-            #[cfg(tsc_v3)]
-            TscIOPin::Group8Io1 | TscIOPin::Group8Io2 | TscIOPin::Group8Io3 | TscIOPin::Group8Io4 => Group::Eight,
-        }
-    }
-
-    /// Returns the `Group` associated with the given `TscIOPin`.
-    pub fn get_group(pin: TscIOPin) -> Group {
-        pin.group()
-    }
-}
-
-impl BitOr<TscIOPin> for u32 {
-    type Output = u32;
-    fn bitor(self, rhs: TscIOPin) -> Self::Output {
-        let rhs: u32 = rhs.into();
-        self | rhs
-    }
-}
-
-impl BitOr<u32> for TscIOPin {
-    type Output = u32;
-    fn bitor(self, rhs: u32) -> Self::Output {
-        let val: u32 = self.into();
-        val | rhs
-    }
-}
-
-impl BitOr for TscIOPin {
-    type Output = u32;
-    fn bitor(self, rhs: Self) -> Self::Output {
-        let val: u32 = self.into();
-        let rhs: u32 = rhs.into();
-        val | rhs
-    }
-}
-
-impl BitOrAssign<TscIOPin> for u32 {
-    fn bitor_assign(&mut self, rhs: TscIOPin) {
-        let rhs: u32 = rhs.into();
-        *self |= rhs;
-    }
-}
-
-impl BitAnd<TscIOPin> for u32 {
-    type Output = u32;
-    fn bitand(self, rhs: TscIOPin) -> Self::Output {
-        let rhs: u32 = rhs.into();
-        self & rhs
-    }
-}
-
-impl BitAnd<u32> for TscIOPin {
-    type Output = u32;
-    fn bitand(self, rhs: u32) -> Self::Output {
-        let val: u32 = self.into();
-        val & rhs
-    }
-}
-
-impl TscIOPin {
-    const fn to_u32(self) -> u32 {
-        match self {
-            TscIOPin::Group1Io1 => 0x00000001,
-            TscIOPin::Group1Io2 => 0x00000002,
-            TscIOPin::Group1Io3 => 0x00000004,
-            TscIOPin::Group1Io4 => 0x00000008,
-            TscIOPin::Group2Io1 => 0x00000010,
-            TscIOPin::Group2Io2 => 0x00000020,
-            TscIOPin::Group2Io3 => 0x00000040,
-            TscIOPin::Group2Io4 => 0x00000080,
-            TscIOPin::Group3Io1 => 0x00000100,
-            TscIOPin::Group3Io2 => 0x00000200,
-            TscIOPin::Group3Io3 => 0x00000400,
-            TscIOPin::Group3Io4 => 0x00000800,
-            TscIOPin::Group4Io1 => 0x00001000,
-            TscIOPin::Group4Io2 => 0x00002000,
-            TscIOPin::Group4Io3 => 0x00004000,
-            TscIOPin::Group4Io4 => 0x00008000,
-            TscIOPin::Group5Io1 => 0x00010000,
-            TscIOPin::Group5Io2 => 0x00020000,
-            TscIOPin::Group5Io3 => 0x00040000,
-            TscIOPin::Group5Io4 => 0x00080000,
-            TscIOPin::Group6Io1 => 0x00100000,
-            TscIOPin::Group6Io2 => 0x00200000,
-            TscIOPin::Group6Io3 => 0x00400000,
-            TscIOPin::Group6Io4 => 0x00800000,
-            #[cfg(any(tsc_v2, tsc_v3))]
-            TscIOPin::Group7Io1 => 0x01000000,
-            #[cfg(any(tsc_v2, tsc_v3))]
-            TscIOPin::Group7Io2 => 0x02000000,
-            #[cfg(any(tsc_v2, tsc_v3))]
-            TscIOPin::Group7Io3 => 0x04000000,
-            #[cfg(any(tsc_v2, tsc_v3))]
-            TscIOPin::Group7Io4 => 0x08000000,
-            #[cfg(tsc_v3)]
-            TscIOPin::Group8Io1 => 0x10000000,
-            #[cfg(tsc_v3)]
-            TscIOPin::Group8Io2 => 0x20000000,
-            #[cfg(tsc_v3)]
-            TscIOPin::Group8Io3 => 0x40000000,
-            #[cfg(tsc_v3)]
-            TscIOPin::Group8Io4 => 0x80000000,
-        }
-    }
-}
-
-impl Into<u32> for TscIOPin {
-    fn into(self) -> u32 {
-        self.to_u32()
-    }
-}
diff --git a/examples/stm32f3/src/bin/tsc_blocking.rs b/examples/stm32f3/src/bin/tsc_blocking.rs
index fa7f718e6..2c33838e5 100644
--- a/examples/stm32f3/src/bin/tsc_blocking.rs
+++ b/examples/stm32f3/src/bin/tsc_blocking.rs
@@ -64,9 +64,9 @@ async fn main(_spawner: embassy_executor::Spawner) {
 
     let mut g: PinGroupWithRoles<peripherals::TSC, G4> = PinGroupWithRoles::default();
     // D68 on the STM32F303ZE nucleo-board
-    g.set_io2::<tsc_pin_roles::Sample>(context.PA10);
+    g.set_io2::<tsc::pin_roles::Sample>(context.PA10);
     // D69 on the STM32F303ZE nucleo-board
-    let tsc_sensor = g.set_io1::<tsc_pin_roles::Channel>(context.PA9);
+    let tsc_sensor = g.set_io1::<tsc::pin_roles::Channel>(context.PA9);
 
     let pin_groups: PinGroups<peripherals::TSC> = PinGroups {
         g4: Some(g.pin_group),
@@ -119,7 +119,7 @@ const MAX_GROUP_STATUS_READ_ATTEMPTS: usize = 10;
 // attempt to read group status and delay when still ongoing
 async fn read_touch_value(
     touch_controller: &mut tsc::Tsc<'_, peripherals::TSC, mode::Blocking>,
-    sensor_pin: TscIOPin,
+    sensor_pin: tsc::IOPin,
 ) -> Option<u16> {
     for _ in 0..MAX_GROUP_STATUS_READ_ATTEMPTS {
         match touch_controller.group_get_status(sensor_pin.group()) {
diff --git a/examples/stm32l0/src/bin/tsc_async.rs b/examples/stm32l0/src/bin/tsc_async.rs
index cebe9712f..dae351c2e 100644
--- a/examples/stm32l0/src/bin/tsc_async.rs
+++ b/examples/stm32l0/src/bin/tsc_async.rs
@@ -58,8 +58,8 @@ async fn main(_spawner: embassy_executor::Spawner) {
     let context = embassy_stm32::init(device_config);
 
     let mut pin_group: PinGroupWithRoles<peripherals::TSC, G1> = PinGroupWithRoles::default();
-    pin_group.set_io1::<tsc_pin_roles::Sample>(context.PA0);
-    let sensor = pin_group.set_io2::<tsc_pin_roles::Channel>(context.PA1);
+    pin_group.set_io1::<tsc::pin_roles::Sample>(context.PA0);
+    let sensor = pin_group.set_io2::<tsc::pin_roles::Channel>(context.PA1);
 
     let tsc_conf = Config {
         ct_pulse_high_length: ChargeTransferPulseCycle::_4,
diff --git a/examples/stm32l0/src/bin/tsc_blocking.rs b/examples/stm32l0/src/bin/tsc_blocking.rs
index 65203925c..e1f24639b 100644
--- a/examples/stm32l0/src/bin/tsc_blocking.rs
+++ b/examples/stm32l0/src/bin/tsc_blocking.rs
@@ -69,8 +69,8 @@ async fn main(_spawner: embassy_executor::Spawner) {
     };
 
     let mut g1: PinGroupWithRoles<peripherals::TSC, G1> = PinGroupWithRoles::default();
-    g1.set_io1::<tsc_pin_roles::Sample>(context.PA0);
-    let tsc_sensor = g1.set_io2::<tsc_pin_roles::Channel>(context.PA1);
+    g1.set_io1::<tsc::pin_roles::Sample>(context.PA0);
+    let tsc_sensor = g1.set_io2::<tsc::pin_roles::Channel>(context.PA1);
 
     let pin_groups: PinGroups<peripherals::TSC> = PinGroups {
         g1: Some(g1.pin_group),
@@ -123,7 +123,7 @@ const MAX_GROUP_STATUS_READ_ATTEMPTS: usize = 10;
 // attempt to read group status and delay when still ongoing
 async fn read_touch_value(
     touch_controller: &mut tsc::Tsc<'_, peripherals::TSC, mode::Blocking>,
-    sensor_pin: TscIOPin,
+    sensor_pin: tsc::IOPin,
 ) -> Option<u16> {
     for _ in 0..MAX_GROUP_STATUS_READ_ATTEMPTS {
         match touch_controller.group_get_status(sensor_pin.group()) {
diff --git a/examples/stm32l0/src/bin/tsc_multipin.rs b/examples/stm32l0/src/bin/tsc_multipin.rs
index 85feb50b0..bf75a5657 100644
--- a/examples/stm32l0/src/bin/tsc_multipin.rs
+++ b/examples/stm32l0/src/bin/tsc_multipin.rs
@@ -78,7 +78,7 @@ const SENSOR_THRESHOLD: u16 = 35;
 
 async fn acquire_sensors(
     touch_controller: &mut Tsc<'static, peripherals::TSC, mode::Async>,
-    tsc_acquisition_bank: &TscAcquisitionBank,
+    tsc_acquisition_bank: &AcquisitionBank,
 ) {
     touch_controller.set_active_channels_mask(tsc_acquisition_bank.mask());
     touch_controller.start();
@@ -95,11 +95,11 @@ async fn main(_spawner: embassy_executor::Spawner) {
 
     // ---------- initial configuration of TSC ----------
     let mut pin_group1: PinGroupWithRoles<peripherals::TSC, G1> = PinGroupWithRoles::default();
-    pin_group1.set_io1::<tsc_pin_roles::Sample>(context.PA0);
+    pin_group1.set_io1::<tsc::pin_roles::Sample>(context.PA0);
     let tsc_sensor0 = pin_group1.set_io2(context.PA1);
 
     let mut pin_group5: PinGroupWithRoles<peripherals::TSC, G5> = PinGroupWithRoles::default();
-    pin_group5.set_io1::<tsc_pin_roles::Sample>(context.PB3);
+    pin_group5.set_io1::<tsc::pin_roles::Sample>(context.PB3);
     let tsc_sensor1 = pin_group5.set_io2(context.PB4);
     let tsc_sensor2 = pin_group5.set_io3(context.PB6);
 
@@ -128,14 +128,14 @@ async fn main(_spawner: embassy_executor::Spawner) {
     // ---------- setting up acquisition banks ----------
     // sensor0 and sensor1 in this example belong to different TSC-groups,
     // therefore we can acquire and read them both in one go.
-    let bank1 = touch_controller.create_acquisition_bank(TscAcquisitionBankPins {
+    let bank1 = touch_controller.create_acquisition_bank(AcquisitionBankPins {
         g1_pin: Some(tsc_sensor0),
         g5_pin: Some(tsc_sensor1),
         ..Default::default()
     });
     // `sensor1` and `sensor2` belongs to the same TSC-group, therefore we must make sure to
     // acquire them one at the time. Therefore, we organize them into different acquisition banks.
-    let bank2 = touch_controller.create_acquisition_bank(TscAcquisitionBankPins {
+    let bank2 = touch_controller.create_acquisition_bank(AcquisitionBankPins {
         g5_pin: Some(tsc_sensor2),
         ..Default::default()
     });
diff --git a/examples/stm32l4/src/bin/tsc_async.rs b/examples/stm32l4/src/bin/tsc_async.rs
index ada2c468f..b9a059e2e 100644
--- a/examples/stm32l4/src/bin/tsc_async.rs
+++ b/examples/stm32l4/src/bin/tsc_async.rs
@@ -50,9 +50,9 @@ async fn main(_spawner: embassy_executor::Spawner) {
 
     let mut pin_group: PinGroupWithRoles<peripherals::TSC, G2> = PinGroupWithRoles::default();
     // D25
-    pin_group.set_io1::<tsc_pin_roles::Sample>(context.PB4);
+    pin_group.set_io1::<tsc::pin_roles::Sample>(context.PB4);
     // D21
-    let tsc_sensor = pin_group.set_io2::<tsc_pin_roles::Channel>(context.PB5);
+    let tsc_sensor = pin_group.set_io2::<tsc::pin_roles::Channel>(context.PB5);
 
     let pin_groups: PinGroups<peripherals::TSC> = PinGroups {
         g2: Some(pin_group.pin_group),
diff --git a/examples/stm32l4/src/bin/tsc_blocking.rs b/examples/stm32l4/src/bin/tsc_blocking.rs
index 76aba55ba..12084f8e2 100644
--- a/examples/stm32l4/src/bin/tsc_blocking.rs
+++ b/examples/stm32l4/src/bin/tsc_blocking.rs
@@ -74,9 +74,9 @@ async fn main(_spawner: embassy_executor::Spawner) {
 
     let mut g2: PinGroupWithRoles<peripherals::TSC, G2> = PinGroupWithRoles::default();
     // D25
-    g2.set_io1::<tsc_pin_roles::Sample>(context.PB4);
+    g2.set_io1::<tsc::pin_roles::Sample>(context.PB4);
     // D21
-    let tsc_sensor = g2.set_io2::<tsc_pin_roles::Channel>(context.PB5);
+    let tsc_sensor = g2.set_io2::<tsc::pin_roles::Channel>(context.PB5);
 
     let pin_groups: PinGroups<peripherals::TSC> = PinGroups {
         g2: Some(g2.pin_group),
@@ -128,7 +128,7 @@ const MAX_GROUP_STATUS_READ_ATTEMPTS: usize = 10;
 // attempt to read group status and delay when still ongoing
 async fn read_touch_value(
     touch_controller: &mut tsc::Tsc<'_, peripherals::TSC, mode::Blocking>,
-    sensor_pin: TscIOPin,
+    sensor_pin: tsc::IOPin,
 ) -> Option<u16> {
     for _ in 0..MAX_GROUP_STATUS_READ_ATTEMPTS {
         match touch_controller.group_get_status(sensor_pin.group()) {
diff --git a/examples/stm32l4/src/bin/tsc_multipin.rs b/examples/stm32l4/src/bin/tsc_multipin.rs
index f26a6f4eb..2fadbe16a 100644
--- a/examples/stm32l4/src/bin/tsc_multipin.rs
+++ b/examples/stm32l4/src/bin/tsc_multipin.rs
@@ -74,7 +74,7 @@ const SENSOR_THRESHOLD: u16 = 20;
 
 async fn acquire_sensors(
     touch_controller: &mut Tsc<'static, peripherals::TSC, mode::Async>,
-    tsc_acquisition_bank: &TscAcquisitionBank,
+    tsc_acquisition_bank: &AcquisitionBank,
 ) {
     touch_controller.set_active_channels_mask(tsc_acquisition_bank.mask());
     touch_controller.start();
@@ -91,11 +91,11 @@ async fn main(_spawner: embassy_executor::Spawner) {
 
     // ---------- initial configuration of TSC ----------
     let mut g1: PinGroupWithRoles<peripherals::TSC, G1> = PinGroupWithRoles::default();
-    g1.set_io1::<tsc_pin_roles::Sample>(context.PB12);
-    let sensor0 = g1.set_io2::<tsc_pin_roles::Channel>(context.PB13);
+    g1.set_io1::<tsc::pin_roles::Sample>(context.PB12);
+    let sensor0 = g1.set_io2::<tsc::pin_roles::Channel>(context.PB13);
 
     let mut g2: PinGroupWithRoles<peripherals::TSC, G2> = PinGroupWithRoles::default();
-    g2.set_io1::<tsc_pin_roles::Sample>(context.PB4);
+    g2.set_io1::<tsc::pin_roles::Sample>(context.PB4);
     let sensor1 = g2.set_io2(context.PB5);
     let sensor2 = g2.set_io3(context.PB6);
 
@@ -124,14 +124,14 @@ async fn main(_spawner: embassy_executor::Spawner) {
     // ---------- setting up acquisition banks ----------
     // sensor0 and sensor1 belong to different TSC-groups, therefore we can acquire and
     // read them both in one go.
-    let bank1 = touch_controller.create_acquisition_bank(TscAcquisitionBankPins {
+    let bank1 = touch_controller.create_acquisition_bank(AcquisitionBankPins {
         g1_pin: Some(sensor0),
         g2_pin: Some(sensor1),
         ..Default::default()
     });
     // `sensor1` and `sensor2` belongs to the same TSC-group, therefore we must make sure to
     // acquire them one at the time. We do this by organizing them into different acquisition banks.
-    let bank2 = touch_controller.create_acquisition_bank(TscAcquisitionBankPins {
+    let bank2 = touch_controller.create_acquisition_bank(AcquisitionBankPins {
         g2_pin: Some(sensor2),
         ..Default::default()
     });
diff --git a/examples/stm32u5/src/bin/tsc.rs b/examples/stm32u5/src/bin/tsc.rs
index 800486665..a85acc4c7 100644
--- a/examples/stm32u5/src/bin/tsc.rs
+++ b/examples/stm32u5/src/bin/tsc.rs
@@ -36,15 +36,15 @@ async fn main(_spawner: embassy_executor::Spawner) {
     };
 
     let mut g1: PinGroupWithRoles<peripherals::TSC, G1> = PinGroupWithRoles::default();
-    g1.set_io2::<tsc_pin_roles::Sample>(context.PB13);
-    g1.set_io3::<tsc_pin_roles::Shield>(context.PB14);
+    g1.set_io2::<tsc::pin_roles::Sample>(context.PB13);
+    g1.set_io3::<tsc::pin_roles::Shield>(context.PB14);
 
     let mut g2: PinGroupWithRoles<peripherals::TSC, G2> = PinGroupWithRoles::default();
-    g2.set_io1::<tsc_pin_roles::Sample>(context.PB4);
+    g2.set_io1::<tsc::pin_roles::Sample>(context.PB4);
     let sensor0 = g2.set_io2(context.PB5);
 
     let mut g7: PinGroupWithRoles<peripherals::TSC, G7> = PinGroupWithRoles::default();
-    g7.set_io2::<tsc_pin_roles::Sample>(context.PE3);
+    g7.set_io2::<tsc::pin_roles::Sample>(context.PE3);
     let sensor1 = g7.set_io3(context.PE4);
 
     let pin_groups: PinGroups<peripherals::TSC> = PinGroups {
@@ -56,7 +56,7 @@ async fn main(_spawner: embassy_executor::Spawner) {
 
     let mut touch_controller = tsc::Tsc::new_async(context.TSC, pin_groups, config, Irqs).unwrap();
 
-    let acquisition_bank = touch_controller.create_acquisition_bank(TscAcquisitionBankPins {
+    let acquisition_bank = touch_controller.create_acquisition_bank(AcquisitionBankPins {
         g2_pin: Some(sensor0),
         g7_pin: Some(sensor1),
         ..Default::default()