Merge pull request #229 from embassy-rs/buildrs-macrotables

Use macrotables from build.rs
This commit is contained in:
Dario Nieuwenhuis 2021-06-07 05:18:53 +02:00 committed by GitHub
commit f752700df5
No known key found for this signature in database
GPG Key ID: 4AEE18F83AFDEB23
5 changed files with 9 additions and 16 deletions

View File

@ -27,6 +27,7 @@ stm32-metapac = { version = "0.1.0", path = "../stm32-metapac", features = ["rt"
cfg-if = "1.0.0"
[build-dependencies]
stm32-metapac = { version = "0.1.0", path = "../stm32-metapac", default-features = false }
serde = { version = "1.0.123", features = [ "derive" ]}
serde_yaml = "0.8.15"

View File

@ -23,10 +23,13 @@ fn main() {
panic!("gen.py exited with {:?}", exit_code)
}
for s in env::var("DEP_STM32_METAPAC_V0.1_CFGS").unwrap().split(",") {
println!("cargo:rustc-cfg={}", s);
}
println!("cargo:rerun-if-env-changed=DEP_STM32_METAPAC_V0.1_CFGS");
stm32_metapac::peripheral_versions!(
($peri:ident, $version:ident) => {
println!("cargo:rustc-cfg={}", stringify!($peri));
println!("cargo:rustc-cfg={}_{}", stringify!($peri), stringify!($version));
};
);
println!("cargo:rerun-if-changed=build.rs");
println!("cargo:rerun-if-changed=gen.py");
}

View File

@ -79,7 +79,7 @@ impl<T: Instance> Clock<T> {
// TODO: Temporary until clock code generation is in place
pub fn start_tim2(&'static self) {
cfg_if::cfg_if! {
if #[cfg(stm32l0)] {
if #[cfg(rcc_l0)] {
unsafe {
let rcc = crate::pac::RCC;
rcc.apb1enr()

View File

@ -2,7 +2,6 @@
name = "stm32-metapac"
version = "0.1.0"
edition = "2018"
links = "stm32-metapac-v0.1"
resolver = "2"
[dependencies]

View File

@ -132,7 +132,6 @@ fn main() {
};
let mut peripheral_versions: HashMap<String, String> = HashMap::new();
let mut cfgs: HashSet<String> = HashSet::new();
let mut pin_table: Vec<Vec<String>> = Vec::new();
let mut interrupt_table: Vec<Vec<String>> = Vec::new();
let mut peripherals_table: Vec<Vec<String>> = Vec::new();
@ -148,8 +147,6 @@ fn main() {
let gpio_base = chip.peripherals.get(&"GPIOA".to_string()).unwrap().address;
let gpio_stride = 0x400;
cfgs.insert(chip.family.to_ascii_lowercase().replace("+", "plus"));
for (name, p) in &chip.peripherals {
let mut ir_peri = ir::Peripheral {
name: name.clone(),
@ -176,8 +173,6 @@ fn main() {
peripheral_pins_table.push(row);
}
cfgs.insert(bi.module.clone());
cfgs.insert(format!("{}_{}", bi.module, bi.version));
let mut peripheral_row = Vec::new();
peripheral_row.push(bi.module.clone());
peripheral_row.push(name.clone());
@ -319,9 +314,4 @@ fn main() {
.unwrap();
println!("cargo:rustc-link-search={}", out.display());
println!("cargo:rerun-if-changed=build.rs");
println!(
"cargo:cfgs={}",
cfgs.into_iter().collect::<Vec<_>>().join(",")
);
}