From f6645750c95ac008f74b980b553117e7a390a833 Mon Sep 17 00:00:00 2001 From: Caleb Garrett <47389035+caleb-garrett@users.noreply.github.com> Date: Thu, 8 Feb 2024 17:24:27 -0500 Subject: [PATCH] Removed hash DMA from unsupported configs. --- embassy-stm32/Cargo.toml | 4 +- embassy-stm32/src/hash/mod.rs | 7 +- embassy-stm32/src/hash/{v1.rs => v1v3v4.rs} | 77 +++++++++++++++++++-- embassy-stm32/src/hash/{v2v3.rs => v2.rs} | 6 +- examples/stm32f7/.cargo/config.toml | 2 +- examples/stm32f7/src/bin/hash.rs | 9 ++- 6 files changed, 89 insertions(+), 16 deletions(-) rename embassy-stm32/src/hash/{v1.rs => v1v3v4.rs} (84%) rename embassy-stm32/src/hash/{v2v3.rs => v2.rs} (98%) diff --git a/embassy-stm32/Cargo.toml b/embassy-stm32/Cargo.toml index ef6063656..87815c63a 100644 --- a/embassy-stm32/Cargo.toml +++ b/embassy-stm32/Cargo.toml @@ -68,7 +68,7 @@ rand_core = "0.6.3" sdio-host = "0.5.0" critical-section = "1.1" #stm32-metapac = { version = "15" } -stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-5674011dd7db845c9d70d6a20a16129221026d25" } +stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-36a3262735a169e31b702bcb0ac6c0067c3f078e" } vcell = "0.1.3" bxcan = "0.7.0" nb = "1.0.0" @@ -89,7 +89,7 @@ critical-section = { version = "1.1", features = ["std"] } proc-macro2 = "1.0.36" quote = "1.0.15" #stm32-metapac = { version = "15", default-features = false, features = ["metadata"]} -stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-5674011dd7db845c9d70d6a20a16129221026d25", default-features = false, features = ["metadata"]} +stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-36a3262735a169e31b702bcb0ac6c0067c3f078e", default-features = false, features = ["metadata"]} [features] diff --git a/embassy-stm32/src/hash/mod.rs b/embassy-stm32/src/hash/mod.rs index 6b23f3b55..64c1a0a8c 100644 --- a/embassy-stm32/src/hash/mod.rs +++ b/embassy-stm32/src/hash/mod.rs @@ -1,7 +1,8 @@ //! Hash Accelerator (HASH) -#[cfg_attr(hash_v1, path = "v1.rs")] -#[cfg_attr(hash_v2, path = "v2v3.rs")] -#[cfg_attr(hash_v3, path = "v2v3.rs")] +#[cfg_attr(hash_v1, path = "v1v3v4.rs")] +#[cfg_attr(hash_v2, path = "v2.rs")] +#[cfg_attr(hash_v3, path = "v1v3v4.rs")] +#[cfg_attr(hash_v4, path = "v1v3v4.rs")] mod _version; pub use _version::*; diff --git a/embassy-stm32/src/hash/v1.rs b/embassy-stm32/src/hash/v1v3v4.rs similarity index 84% rename from embassy-stm32/src/hash/v1.rs rename to embassy-stm32/src/hash/v1v3v4.rs index 36beb7c3e..771144b11 100644 --- a/embassy-stm32/src/hash/v1.rs +++ b/embassy-stm32/src/hash/v1v3v4.rs @@ -13,10 +13,16 @@ use crate::peripherals::HASH; use crate::rcc::sealed::RccPeripheral; use crate::{interrupt, pac, peripherals, Peripheral}; +#[cfg(hash_v1)] const NUM_CONTEXT_REGS: usize = 51; -const HASH_BUFFER_LEN: usize = 68; -const DIGEST_BLOCK_SIZE: usize = 64; -const MAX_DIGEST_SIZE: usize = 20; +#[cfg(hash_v3)] +const NUM_CONTEXT_REGS: usize = 103; +#[cfg(hash_v4)] +const NUM_CONTEXT_REGS: usize = 54; + +const HASH_BUFFER_LEN: usize = 132; +const DIGEST_BLOCK_SIZE: usize = 128; +const MAX_DIGEST_SIZE: usize = 128; static HASH_WAKER: AtomicWaker = AtomicWaker::new(); @@ -40,12 +46,36 @@ impl interrupt::typelevel::Handler for InterruptHandl } ///Hash algorithm selection -#[derive(PartialEq)] +#[derive(Clone, Copy, PartialEq)] pub enum Algorithm { /// SHA-1 Algorithm SHA1 = 0, + + #[cfg(any(hash_v1, hash_v4))] /// MD5 Algorithm MD5 = 1, + + /// SHA-224 Algorithm + SHA224 = 2, + + /// SHA-256 Algorithm + SHA256 = 3, + + #[cfg(hash_v3)] + /// SHA-384 Algorithm + SHA384 = 12, + + #[cfg(hash_v3)] + /// SHA-512/224 Algorithm + SHA512_224 = 13, + + #[cfg(hash_v3)] + /// SHA-512/256 Algorithm + SHA512_256 = 14, + + #[cfg(hash_v3)] + /// SHA-256 Algorithm + SHA512 = 15, } /// Input data width selection @@ -83,7 +113,10 @@ pub struct Hash<'d, T: Instance> { impl<'d, T: Instance> Hash<'d, T> { /// Instantiates, resets, and enables the HASH peripheral. - pub fn new(peripheral: impl Peripheral

+ 'd) -> Self { + pub fn new( + peripheral: impl Peripheral

+ 'd, + _irq: impl interrupt::typelevel::Binding> + 'd, + ) -> Self { HASH::enable_and_reset(); into_ref!(peripheral); let instance = Self { @@ -115,10 +148,31 @@ impl<'d, T: Instance> Hash<'d, T> { T::regs().cr().modify(|w| w.set_datatype(ctx.format as u8)); // Select the algorithm. + #[cfg(hash_v1)] if ctx.algo == Algorithm::MD5 { T::regs().cr().modify(|w| w.set_algo(true)); } + #[cfg(hash_v2)] + { + // Select the algorithm. + let mut algo0 = false; + let mut algo1 = false; + if ctx.algo == Algorithm::MD5 || ctx.algo == Algorithm::SHA256 { + algo0 = true; + } + if ctx.algo == Algorithm::SHA224 || ctx.algo == Algorithm::SHA256 { + algo1 = true; + } + T::regs().cr().modify(|w| w.set_algo0(algo0)); + T::regs().cr().modify(|w| w.set_algo1(algo1)); + } + + #[cfg(any(hash_v3, hash_v4))] + T::regs().cr().modify(|w| w.set_algo(ctx.algo as u8)); + + T::regs().cr().modify(|w| w.set_init(true)); + // Store and return the state of the peripheral. self.store_context(&mut ctx).await; ctx @@ -174,7 +228,7 @@ impl<'d, T: Instance> Hash<'d, T> { ilen_remaining -= copy_len; input_start += copy_len; } - self.accumulate(&ctx.buffer[0..64]); + self.accumulate(&ctx.buffer[0..DIGEST_BLOCK_SIZE]); ctx.buflen = 0; // Move any extra data to the now-empty buffer. @@ -229,7 +283,18 @@ impl<'d, T: Instance> Hash<'d, T> { // Return the digest. let digest_words = match ctx.algo { Algorithm::SHA1 => 5, + #[cfg(any(hash_v1, hash_v4))] Algorithm::MD5 => 4, + Algorithm::SHA224 => 7, + Algorithm::SHA256 => 8, + #[cfg(hash_v3)] + Algorithm::SHA384 => 12, + #[cfg(hash_v3)] + Algorithm::SHA512_224 => 7, + #[cfg(hash_v3)] + Algorithm::SHA512_256 => 8, + #[cfg(hash_v3)] + Algorithm::SHA512 => 16, }; let mut i = 0; while i < digest_words { diff --git a/embassy-stm32/src/hash/v2v3.rs b/embassy-stm32/src/hash/v2.rs similarity index 98% rename from embassy-stm32/src/hash/v2v3.rs rename to embassy-stm32/src/hash/v2.rs index ba1e05f0c..b8104c825 100644 --- a/embassy-stm32/src/hash/v2v3.rs +++ b/embassy-stm32/src/hash/v2.rs @@ -111,7 +111,11 @@ pub struct Hash<'d, T: Instance, D: Dma> { impl<'d, T: Instance, D: Dma> Hash<'d, T, D> { /// Instantiates, resets, and enables the HASH peripheral. - pub fn new(peripheral: impl Peripheral

+ 'd, dma: impl Peripheral

+ 'd) -> Self { + pub fn new( + peripheral: impl Peripheral

+ 'd, + dma: impl Peripheral

+ 'd, + _irq: impl interrupt::typelevel::Binding> + 'd, + ) -> Self { HASH::enable_and_reset(); into_ref!(peripheral, dma); let instance = Self { diff --git a/examples/stm32f7/.cargo/config.toml b/examples/stm32f7/.cargo/config.toml index 9088eea6e..086da2d78 100644 --- a/examples/stm32f7/.cargo/config.toml +++ b/examples/stm32f7/.cargo/config.toml @@ -1,6 +1,6 @@ [target.'cfg(all(target_arch = "arm", target_os = "none"))'] # replace STM32F429ZITx with your chip as listed in `probe-rs chip list` -runner = "probe-rs run --chip STM32F767ZITx" +runner = "probe-rs run --chip STM32F777ZITx" [build] target = "thumbv7em-none-eabihf" diff --git a/examples/stm32f7/src/bin/hash.rs b/examples/stm32f7/src/bin/hash.rs index 4bd9b4e2e..7d96bd49c 100644 --- a/examples/stm32f7/src/bin/hash.rs +++ b/examples/stm32f7/src/bin/hash.rs @@ -3,12 +3,15 @@ use defmt::info; use embassy_executor::Spawner; -use embassy_stm32::hash::*; -use embassy_stm32::Config; +use embassy_stm32::{bind_interrupts, Config, hash, hash::*, peripherals}; use embassy_time::Instant; use sha2::{Digest, Sha256}; use {defmt_rtt as _, panic_probe as _}; +bind_interrupts!(struct Irqs { + HASH_RNG => hash::InterruptHandler; +}); + #[embassy_executor::main] async fn main(_spawner: Spawner) -> ! { let config = Config::default(); @@ -17,7 +20,7 @@ async fn main(_spawner: Spawner) -> ! { let test_1: &[u8] = b"as;dfhaslfhas;oifvnasd;nifvnhasd;nifvhndlkfghsd;nvfnahssdfgsdafgsasdfasdfasdfasdfasdfghjklmnbvcalskdjghalskdjgfbaslkdjfgbalskdjgbalskdjbdfhsdfhsfghsfghfgh"; let test_2: &[u8] = b"fdhalksdjfhlasdjkfhalskdjfhgal;skdjfgalskdhfjgalskdjfglafgadfgdfgdafgaadsfgfgdfgadrgsyfthxfgjfhklhjkfgukhulkvhlvhukgfhfsrghzdhxyfufynufyuszeradrtydyytserr"; - let mut hw_hasher = Hash::new(p.HASH, p.DMA2_CH7); + let mut hw_hasher = Hash::new(p.HASH, p.DMA2_CH7, Irqs); let hw_start_time = Instant::now();