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stm32/usart: set refcount even if initialization failed
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664e4a5c03
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@ -315,6 +315,7 @@ impl<'d> BufferedUart<'d> {
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) -> Result<(), ConfigError> {
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let info = self.rx.info;
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let state = self.rx.state;
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state.tx_rx_refcount.store(2, Ordering::Relaxed);
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info.rcc.enable_and_reset();
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@ -339,7 +340,6 @@ impl<'d> BufferedUart<'d> {
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info.interrupt.unpend();
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unsafe { info.interrupt.enable() };
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state.tx_rx_refcount.store(2, Ordering::Relaxed);
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Ok(())
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}
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@ -446,6 +446,7 @@ impl<'d, M: Mode> UartTx<'d, M> {
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fn enable_and_configure(&mut self, config: &Config) -> Result<(), ConfigError> {
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let info = self.info;
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let state = self.state;
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state.tx_rx_refcount.store(1, Ordering::Relaxed);
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info.rcc.enable_and_reset();
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@ -454,7 +455,6 @@ impl<'d, M: Mode> UartTx<'d, M> {
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});
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configure(info, self.kernel_clock, config, false, true)?;
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state.tx_rx_refcount.store(1, Ordering::Relaxed);
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Ok(())
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}
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@ -798,6 +798,7 @@ impl<'d, M: Mode> UartRx<'d, M> {
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fn enable_and_configure(&mut self, config: &Config) -> Result<(), ConfigError> {
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let info = self.info;
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let state = self.state;
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state.tx_rx_refcount.store(1, Ordering::Relaxed);
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info.rcc.enable_and_reset();
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@ -809,7 +810,6 @@ impl<'d, M: Mode> UartRx<'d, M> {
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info.interrupt.unpend();
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unsafe { info.interrupt.enable() };
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state.tx_rx_refcount.store(1, Ordering::Relaxed);
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Ok(())
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}
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@ -1271,6 +1271,7 @@ impl<'d, M: Mode> Uart<'d, M> {
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fn enable_and_configure(&mut self, config: &Config) -> Result<(), ConfigError> {
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let info = self.rx.info;
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let state = self.rx.state;
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state.tx_rx_refcount.store(2, Ordering::Relaxed);
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info.rcc.enable_and_reset();
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@ -1285,7 +1286,6 @@ impl<'d, M: Mode> Uart<'d, M> {
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info.interrupt.unpend();
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unsafe { info.interrupt.enable() };
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state.tx_rx_refcount.store(2, Ordering::Relaxed);
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Ok(())
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}
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