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Add feature gate for f7

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This commit is contained in:
Joël Schulz-Ansres 2024-05-02 15:39:53 +02:00
parent 4c55931b6a
commit f29deb2488
2 changed files with 10 additions and 2 deletions
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3
embassy-stm32/src/dsihost.rs
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@ -1,11 +1,12 @@
//! DSI HOST
use crate::rcc::RccPeripheral;
use core::marker::PhantomData;
use embassy_hal_internal::{into_ref, PeripheralRef};
//use crate::gpio::{AnyPin, SealedPin};
use crate::gpio::{AFType, AnyPin, Pull, Speed};
use crate::rcc::RccPeripheral;
use crate::{peripherals, Peripheral};
/// Performs a busy-wait delay for a specified number of microseconds.

9
embassy-stm32/src/ltdc.rs
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@ -1,7 +1,8 @@
//! LTDC
use core::marker::PhantomData;
use crate::rcc::RccPeripheral;
use crate::{peripherals, Peripheral};
use core::marker::PhantomData;
/// LTDC driver.
pub struct Ltdc<'d, T: Instance> {
@ -47,6 +48,12 @@ impl<'d, T: Instance> Ltdc<'d, T> {
critical_section::with(|_cs| {
// RM says the pllsaidivr should only be changed when pllsai is off. But this could have other unintended side effects. So let's just give it a try like this.
// According to the debugger, this bit gets set, anyway.
#[cfg(stm32f7)]
stm32_metapac::RCC
.dckcfgr1()
.modify(|w| w.set_pllsaidivr(stm32_metapac::rcc::vals::Pllsaidivr::DIV2));
#[cfg(not(stm32f7))]
stm32_metapac::RCC
.dckcfgr()
.modify(|w| w.set_pllsaidivr(stm32_metapac::rcc::vals::Pllsaidivr::DIV2));