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Merge #685

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685: Fix STM32 timer interrupt bug r=Dirbaio a=chemicstry

Previously timer overflow interrupts were not firing correctly, because Update Interrupt Enable (UIE) was not set.

The timers still worked somewhat correclty, because overflow was handled together with other interrupts.

Co-authored-by: chemicstry <chemicstry@gmail.com>
This commit is contained in:
bors[bot] 2022-03-29 22:13:30 +00:00 committed by GitHub
commit f028b0064b
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1 changed files with 6 additions and 2 deletions
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8
embassy-stm32/src/time_driver.rs
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@ -172,8 +172,11 @@ impl RtcDriver {
// Mid-way point
r.ccr(0).write(|w| w.set_ccr(0x8000));
// Enable CC0, disable others
r.dier().write(|w| w.set_ccie(0, true));
// Enable overflow and half-overflow interrupts
r.dier().write(|w| {
w.set_uie(true);
w.set_ccie(0, true);
});
let irq: <T as BasicInstance>::Interrupt = core::mem::transmute(());
irq.unpend();
@ -197,6 +200,7 @@ impl RtcDriver {
// miss interrupts.
r.sr().write_value(regs::SrGp(!sr.0));
// Overflow
if sr.uif() {
self.next_period();
}