diff --git a/embassy-rp/src/clocks.rs b/embassy-rp/src/clocks.rs index 976d06de7..a33980230 100644 --- a/embassy-rp/src/clocks.rs +++ b/embassy-rp/src/clocks.rs @@ -702,7 +702,7 @@ impl<'d, T: Pin> Gpin<'d, T> { pub fn new(gpin: impl Peripheral

+ 'd) -> Gpin<'d, P> { into_ref!(gpin); - gpin.io().ctrl().write(|w| w.set_funcsel(0x08)); + gpin.gpio().ctrl().write(|w| w.set_funcsel(0x08)); Gpin { gpin: gpin.map_into(), @@ -718,7 +718,7 @@ impl<'d, T: Pin> Gpin<'d, T> { impl<'d, T: Pin> Drop for Gpin<'d, T> { fn drop(&mut self) { self.gpin - .io() + .gpio() .ctrl() .write(|w| w.set_funcsel(pac::io::vals::Gpio0ctrlFuncsel::NULL as _)); } @@ -766,7 +766,7 @@ impl<'d, T: GpoutPin> Gpout<'d, T> { pub fn new(gpout: impl Peripheral

+ 'd) -> Self { into_ref!(gpout); - gpout.io().ctrl().write(|w| w.set_funcsel(0x08)); + gpout.gpio().ctrl().write(|w| w.set_funcsel(0x08)); Self { gpout } } @@ -831,7 +831,7 @@ impl<'d, T: GpoutPin> Drop for Gpout<'d, T> { fn drop(&mut self) { self.disable(); self.gpout - .io() + .gpio() .ctrl() .write(|w| w.set_funcsel(pac::io::vals::Gpio0ctrlFuncsel::NULL as _)); } diff --git a/embassy-rp/src/gpio.rs b/embassy-rp/src/gpio.rs index 2807eb678..7153325d3 100644 --- a/embassy-rp/src/gpio.rs +++ b/embassy-rp/src/gpio.rs @@ -451,7 +451,7 @@ impl<'d, T: Pin> Flex<'d, T> { w.set_ie(true); }); - pin.io().ctrl().write(|w| { + pin.gpio().ctrl().write(|w| { w.set_funcsel(pac::io::vals::Gpio0ctrlFuncsel::SIO_0 as _); }); @@ -617,7 +617,7 @@ impl<'d, T: Pin> Drop for Flex<'d, T> { #[inline] fn drop(&mut self) { self.pin.pad_ctrl().write(|_| {}); - self.pin.io().ctrl().write(|w| { + self.pin.gpio().ctrl().write(|w| { w.set_funcsel(pac::io::vals::Gpio0ctrlFuncsel::NULL as _); }); } @@ -643,7 +643,7 @@ pub(crate) mod sealed { } } - fn io(&self) -> pac::io::Gpio { + fn gpio(&self) -> pac::io::Gpio { let block = match self._bank() { Bank::Bank0 => crate::pac::IO_BANK0, Bank::Qspi => crate::pac::IO_QSPI, diff --git a/embassy-rp/src/i2c.rs b/embassy-rp/src/i2c.rs index 536ad747d..7a5ddd325 100644 --- a/embassy-rp/src/i2c.rs +++ b/embassy-rp/src/i2c.rs @@ -353,8 +353,8 @@ impl<'d, T: Instance + 'd, M: Mode> I2c<'d, T, M> { p.ic_rx_tl().write(|w| w.set_rx_tl(0)); // Configure SCL & SDA pins - scl.io().ctrl().write(|w| w.set_funcsel(3)); - sda.io().ctrl().write(|w| w.set_funcsel(3)); + scl.gpio().ctrl().write(|w| w.set_funcsel(3)); + sda.gpio().ctrl().write(|w| w.set_funcsel(3)); scl.pad_ctrl().write(|w| { w.set_schmitt(true); diff --git a/embassy-rp/src/pio.rs b/embassy-rp/src/pio.rs index 3de398af7..c09d09143 100644 --- a/embassy-rp/src/pio.rs +++ b/embassy-rp/src/pio.rs @@ -852,7 +852,7 @@ impl<'d, PIO: Instance> Common<'d, PIO> { /// of [`Pio`] do not keep pin registrations alive.** pub fn make_pio_pin(&mut self, pin: impl Peripheral

+ 'd) -> Pin<'d, PIO> { into_ref!(pin); - pin.io().ctrl().write(|w| w.set_funcsel(PIO::FUNCSEL as _)); + pin.gpio().ctrl().write(|w| w.set_funcsel(PIO::FUNCSEL as _)); // we can be relaxed about this because we're &mut here and nothing is cached PIO::state().used_pins.fetch_or(1 << pin.pin_bank(), Ordering::Relaxed); Pin { diff --git a/embassy-rp/src/pwm.rs b/embassy-rp/src/pwm.rs index c0ddb2a90..c297d69a2 100644 --- a/embassy-rp/src/pwm.rs +++ b/embassy-rp/src/pwm.rs @@ -79,10 +79,10 @@ impl<'d, T: Channel> Pwm<'d, T> { Self::configure(p, &config); if let Some(pin) = &a { - pin.io().ctrl().write(|w| w.set_funcsel(4)); + pin.gpio().ctrl().write(|w| w.set_funcsel(4)); } if let Some(pin) = &b { - pin.io().ctrl().write(|w| w.set_funcsel(4)); + pin.gpio().ctrl().write(|w| w.set_funcsel(4)); } Self { inner, @@ -243,10 +243,10 @@ impl<'d, T: Channel> Drop for Pwm<'d, T> { fn drop(&mut self) { self.inner.regs().csr().write_clear(|w| w.set_en(false)); if let Some(pin) = &self.pin_a { - pin.io().ctrl().write(|w| w.set_funcsel(31)); + pin.gpio().ctrl().write(|w| w.set_funcsel(31)); } if let Some(pin) = &self.pin_b { - pin.io().ctrl().write(|w| w.set_funcsel(31)); + pin.gpio().ctrl().write(|w| w.set_funcsel(31)); } } } diff --git a/embassy-rp/src/spi.rs b/embassy-rp/src/spi.rs index 544b542e8..46c440b84 100644 --- a/embassy-rp/src/spi.rs +++ b/embassy-rp/src/spi.rs @@ -100,16 +100,16 @@ impl<'d, T: Instance, M: Mode> Spi<'d, T, M> { p.cr1().write(|w| w.set_sse(true)); if let Some(pin) = &clk { - pin.io().ctrl().write(|w| w.set_funcsel(1)); + pin.gpio().ctrl().write(|w| w.set_funcsel(1)); } if let Some(pin) = &mosi { - pin.io().ctrl().write(|w| w.set_funcsel(1)); + pin.gpio().ctrl().write(|w| w.set_funcsel(1)); } if let Some(pin) = &miso { - pin.io().ctrl().write(|w| w.set_funcsel(1)); + pin.gpio().ctrl().write(|w| w.set_funcsel(1)); } if let Some(pin) = &cs { - pin.io().ctrl().write(|w| w.set_funcsel(1)); + pin.gpio().ctrl().write(|w| w.set_funcsel(1)); } Self { inner, diff --git a/embassy-rp/src/uart/mod.rs b/embassy-rp/src/uart/mod.rs index 69c6ac2f1..00070b80a 100644 --- a/embassy-rp/src/uart/mod.rs +++ b/embassy-rp/src/uart/mod.rs @@ -565,7 +565,7 @@ impl<'d, T: Instance + 'd, M: Mode> Uart<'d, T, M> { ) { let r = T::regs(); if let Some(pin) = &tx { - pin.io().ctrl().write(|w| { + pin.gpio().ctrl().write(|w| { w.set_funcsel(2); w.set_outover(if config.invert_tx { Outover::INVERT @@ -576,7 +576,7 @@ impl<'d, T: Instance + 'd, M: Mode> Uart<'d, T, M> { pin.pad_ctrl().write(|w| w.set_ie(true)); } if let Some(pin) = &rx { - pin.io().ctrl().write(|w| { + pin.gpio().ctrl().write(|w| { w.set_funcsel(2); w.set_inover(if config.invert_rx { Inover::INVERT @@ -587,7 +587,7 @@ impl<'d, T: Instance + 'd, M: Mode> Uart<'d, T, M> { pin.pad_ctrl().write(|w| w.set_ie(true)); } if let Some(pin) = &cts { - pin.io().ctrl().write(|w| { + pin.gpio().ctrl().write(|w| { w.set_funcsel(2); w.set_inover(if config.invert_cts { Inover::INVERT @@ -598,7 +598,7 @@ impl<'d, T: Instance + 'd, M: Mode> Uart<'d, T, M> { pin.pad_ctrl().write(|w| w.set_ie(true)); } if let Some(pin) = &rts { - pin.io().ctrl().write(|w| { + pin.gpio().ctrl().write(|w| { w.set_funcsel(2); w.set_outover(if config.invert_rts { Outover::INVERT