Merge pull request #3028 from embassy-rs/check-cfg-fix

stm32/spi: restrict txonly_nosck to SPIv1, it hangs in other versions.

embassy-stm32/src/spi/mod.rs

@@ -465,6 +465,7 @@ impl<'d> Spi<'d, Blocking> {
     /// Create a new SPI driver, in TX-only mode, without SCK pin.
     ///
     /// This can be useful for bit-banging non-SPI protocols.
+    #[cfg(any(spi_v1, spi_f1))] // no SCK pin causes it to hang on spiv2+ for unknown reasons.
     pub fn new_blocking_txonly_nosck<T: Instance>(
         peri: impl Peripheral<P = T> + 'd,
         mosi: impl Peripheral<P = impl MosiPin<T>> + 'd,
@@ -549,6 +550,7 @@ impl<'d> Spi<'d, Async> {
     /// Create a new SPI driver, in TX-only mode, without SCK pin.
     ///
     /// This can be useful for bit-banging non-SPI protocols.
+    #[cfg(any(spi_v1, spi_f1))] // no SCK pin causes it to hang on spiv2+ for unknown reasons.
     pub fn new_txonly_nosck<T: Instance>(
         peri: impl Peripheral<P = T> + 'd,
         mosi: impl Peripheral<P = impl MosiPin<T>> + 'd,

examples/stm32g0/src/bin/spi_neopixel.rs

@@ -76,7 +76,7 @@ async fn main(_spawner: Spawner) {
 
     let mut config = Config::default();
     config.frequency = Hertz(4_000_000);
-    let mut spi = Spi::new_txonly_nosck(p.SPI1, p.PB5, p.DMA1_CH3, config);
+    let mut spi = Spi::new_txonly(p.SPI1, p.PB3, p.PB5, p.DMA1_CH3, config); // SCK is unused.
 
     let mut neopixels = Ws2812::new();
 

tests/stm32/Cargo.toml

@@ -7,34 +7,36 @@ autobins = false
 
 [features]
 stm32c031c6 = ["embassy-stm32/stm32c031c6", "cm0", "not-gpdma"]
-stm32f103c8 = ["embassy-stm32/stm32f103c8", "not-gpdma"]
+stm32f103c8 = ["embassy-stm32/stm32f103c8", "spi-v1", "not-gpdma"]
-stm32f207zg = ["embassy-stm32/stm32f207zg", "chrono", "not-gpdma", "eth", "rng"]
+stm32f207zg = ["embassy-stm32/stm32f207zg", "spi-v1", "chrono", "not-gpdma", "eth", "rng"]
 stm32f303ze = ["embassy-stm32/stm32f303ze", "chrono", "not-gpdma"]
-stm32f429zi = ["embassy-stm32/stm32f429zi", "chrono", "eth", "stop", "can", "not-gpdma", "dac", "rng"]
+stm32f429zi = ["embassy-stm32/stm32f429zi", "spi-v1", "chrono", "eth", "stop", "can", "not-gpdma", "dac", "rng"]
-stm32f446re = ["embassy-stm32/stm32f446re", "chrono", "stop", "can", "not-gpdma", "dac", "sdmmc"]
+stm32f446re = ["embassy-stm32/stm32f446re", "spi-v1", "chrono", "stop", "can", "not-gpdma", "dac", "sdmmc"]
 stm32f767zi = ["embassy-stm32/stm32f767zi", "chrono", "not-gpdma", "eth", "rng"]
 stm32g071rb = ["embassy-stm32/stm32g071rb", "cm0", "not-gpdma", "dac", "ucpd"]
 stm32g491re = ["embassy-stm32/stm32g491re", "chrono", "stop", "not-gpdma", "rng", "fdcan", "cordic"]
-stm32h563zi = ["embassy-stm32/stm32h563zi", "chrono", "eth", "rng", "fdcan", "hash", "cordic", "stop"]
+stm32h563zi = ["embassy-stm32/stm32h563zi", "spi-v345", "chrono", "eth", "rng", "fdcan", "hash", "cordic", "stop"]
-stm32h753zi = ["embassy-stm32/stm32h753zi", "chrono", "not-gpdma", "eth", "rng", "fdcan", "hash", "cryp"]
+stm32h753zi = ["embassy-stm32/stm32h753zi", "spi-v345", "chrono", "not-gpdma", "eth", "rng", "fdcan", "hash", "cryp"]
-stm32h755zi = ["embassy-stm32/stm32h755zi-cm7", "chrono", "not-gpdma", "eth", "dac", "rng", "fdcan", "hash", "cryp"]
+stm32h755zi = ["embassy-stm32/stm32h755zi-cm7", "spi-v345", "chrono", "not-gpdma", "eth", "dac", "rng", "fdcan", "hash", "cryp"]
-stm32h7a3zi = ["embassy-stm32/stm32h7a3zi", "not-gpdma", "rng", "fdcan"]
+stm32h7a3zi = ["embassy-stm32/stm32h7a3zi", "spi-v345", "not-gpdma", "rng", "fdcan"]
 stm32l073rz = ["embassy-stm32/stm32l073rz", "cm0", "not-gpdma", "rng"]
-stm32l152re = ["embassy-stm32/stm32l152re", "chrono", "not-gpdma"]
+stm32l152re = ["embassy-stm32/stm32l152re", "spi-v1", "chrono", "not-gpdma"]
 stm32l496zg = ["embassy-stm32/stm32l496zg", "not-gpdma", "rng"]
 stm32l4a6zg = ["embassy-stm32/stm32l4a6zg", "chrono", "not-gpdma", "rng", "hash"]
 stm32l4r5zi = ["embassy-stm32/stm32l4r5zi", "chrono", "not-gpdma", "rng"]
 stm32l552ze = ["embassy-stm32/stm32l552ze", "not-gpdma", "rng", "hash"]
-stm32u585ai = ["embassy-stm32/stm32u585ai", "chrono", "rng", "hash", "cordic"]
+stm32u585ai = ["embassy-stm32/stm32u585ai", "spi-v345", "chrono", "rng", "hash", "cordic"]
-stm32u5a5zj = ["embassy-stm32/stm32u5a5zj", "chrono", "rng", "hash"] # FIXME: cordic test cause it crash
+stm32u5a5zj = ["embassy-stm32/stm32u5a5zj", "spi-v345", "chrono", "rng", "hash"] # FIXME: cordic test cause it crash
 stm32wb55rg = ["embassy-stm32/stm32wb55rg", "chrono", "not-gpdma", "ble", "mac" , "rng"]
-stm32wba52cg = ["embassy-stm32/stm32wba52cg", "chrono", "rng", "hash"]
+stm32wba52cg = ["embassy-stm32/stm32wba52cg", "spi-v345", "chrono", "rng", "hash"]
 stm32wl55jc = ["embassy-stm32/stm32wl55jc-cm4", "not-gpdma", "rng", "chrono"]
 stm32f091rc = ["embassy-stm32/stm32f091rc", "cm0", "not-gpdma", "chrono"]
-stm32h503rb = ["embassy-stm32/stm32h503rb", "rng", "stop"]
+stm32h503rb = ["embassy-stm32/stm32h503rb", "spi-v345", "rng", "stop"]
-stm32h7s3l8 = ["embassy-stm32/stm32h7s3l8", "rng", "cordic", "hash"] # TODO: fdcan crashes, cryp dma hangs.
+stm32h7s3l8 = ["embassy-stm32/stm32h7s3l8", "spi-v345", "rng", "cordic", "hash"] # TODO: fdcan crashes, cryp dma hangs.
 stm32u083rc = ["embassy-stm32/stm32u083rc", "cm0", "rng", "chrono"]
 
+spi-v1 = []
+spi-v345 = []
 cryp = []
 hash = []
 eth = ["embassy-executor/task-arena-size-16384"]

tests/stm32/src/bin/spi.rs

@@ -62,27 +62,51 @@ async fn main(_spawner: Spawner) {
 
     // Assert the RCC bit gets disabled on drop.
     #[cfg(feature = "stm32f429zi")]
-    {
     defmt::assert!(embassy_stm32::pac::RCC.apb2enr().read().spi1en());
     drop(spi);
+    #[cfg(feature = "stm32f429zi")]
     defmt::assert!(!embassy_stm32::pac::RCC.apb2enr().read().spi1en());
-    }
-
-    #[cfg(not(feature = "stm32f429zi"))]
-    core::mem::drop(spi);
 
     // test rx-only configuration
     let mut spi = Spi::new_blocking_rxonly(&mut spi_peri, &mut sck, &mut miso, spi_config);
-
+    let mut mosi_out = Output::new(&mut mosi, Level::Low, Speed::VeryHigh);
-    let mut mosi = Output::new(&mut mosi, Level::Low, Speed::VeryHigh);
+    mosi_out.set_high();
-
-    mosi.set_high();
     spi.blocking_read(&mut buf).unwrap();
     assert_eq!(buf, [0xff; 9]);
-
+    mosi_out.set_low();
-    mosi.set_low();
     spi.blocking_read(&mut buf).unwrap();
     assert_eq!(buf, [0x00; 9]);
+    spi.blocking_read::<u8>(&mut []).unwrap();
+    spi.blocking_read::<u8>(&mut []).unwrap();
+    drop(mosi_out);
+    drop(spi);
+
+    // Test tx-only. Just check it doesn't hang, not much else we can do without using SPI slave.
+    let mut spi = Spi::new_blocking_txonly(&mut spi_peri, &mut sck, &mut mosi, spi_config);
+    spi.blocking_transfer(&mut buf, &data).unwrap();
+    spi.blocking_transfer_in_place(&mut buf).unwrap();
+    spi.blocking_write(&buf).unwrap();
+    spi.blocking_read(&mut buf).unwrap();
+    spi.blocking_transfer::<u8>(&mut [], &[]).unwrap();
+    spi.blocking_transfer_in_place::<u8>(&mut []).unwrap();
+    spi.blocking_read::<u8>(&mut []).unwrap();
+    spi.blocking_write::<u8>(&[]).unwrap();
+    drop(spi);
+
+    // Test tx-only nosck.
+    #[cfg(feature = "spi-v1")]
+    {
+        let mut spi = Spi::new_blocking_txonly_nosck(&mut spi_peri, &mut mosi, spi_config);
+        spi.blocking_transfer(&mut buf, &data).unwrap();
+        spi.blocking_transfer_in_place(&mut buf).unwrap();
+        spi.blocking_write(&buf).unwrap();
+        spi.blocking_read(&mut buf).unwrap();
+        spi.blocking_transfer::<u8>(&mut [], &[]).unwrap();
+        spi.blocking_transfer_in_place::<u8>(&mut []).unwrap();
+        spi.blocking_read::<u8>(&mut []).unwrap();
+        spi.blocking_write::<u8>(&[]).unwrap();
+        drop(spi);
+    }
 
     info!("Test OK");
     cortex_m::asm::bkpt();

tests/stm32/src/bin/spi_dma.rs

@@ -63,8 +63,12 @@ async fn main(_spawner: Spawner) {
     spi.transfer_in_place::<u8>(&mut []).await.unwrap();
     spi.read::<u8>(&mut []).await.unwrap();
     spi.write::<u8>(&[]).await.unwrap();
+    spi.blocking_transfer::<u8>(&mut [], &[]).unwrap();
+    spi.blocking_transfer_in_place::<u8>(&mut []).unwrap();
+    spi.blocking_read::<u8>(&mut []).unwrap();
+    spi.blocking_write::<u8>(&[]).unwrap();
 
-    // === Check mixing blocking with async.
+    // Check mixing blocking with async.
     spi.blocking_transfer(&mut buf, &data).unwrap();
     assert_eq!(buf, data);
     spi.transfer(&mut buf, &data).await.unwrap();
@@ -88,31 +92,59 @@ async fn main(_spawner: Spawner) {
         &mut sck,
         &mut miso,
         // SPIv1/f1 requires txdma even if rxonly.
-        #[cfg(not(any(
+        #[cfg(not(feature = "spi-v345"))]
-            feature = "stm32h503rb",
-            feature = "stm32h563zi",
-            feature = "stm32h753zi",
-            feature = "stm32h755zi",
-            feature = "stm32h7a3zi",
-            feature = "stm32h7s3l8",
-            feature = "stm32u585ai",
-            feature = "stm32u5a5zj",
-            feature = "stm32wba52cg",
-        )))]
         &mut tx_dma,
         &mut rx_dma,
         spi_config,
     );
-
+    let mut mosi_out = Output::new(&mut mosi, Level::Low, Speed::VeryHigh);
-    let mut mosi = Output::new(&mut mosi, Level::Low, Speed::VeryHigh);
+    mosi_out.set_high();
-
-    mosi.set_high();
     spi.read(&mut buf).await.unwrap();
     assert_eq!(buf, [0xff; 9]);
-
+    spi.blocking_read(&mut buf).unwrap();
-    mosi.set_low();
+    assert_eq!(buf, [0xff; 9]);
+    spi.read(&mut buf).await.unwrap();
+    assert_eq!(buf, [0xff; 9]);
+    spi.read(&mut buf).await.unwrap();
+    assert_eq!(buf, [0xff; 9]);
+    spi.blocking_read(&mut buf).unwrap();
+    assert_eq!(buf, [0xff; 9]);
+    spi.blocking_read(&mut buf).unwrap();
+    assert_eq!(buf, [0xff; 9]);
+    mosi_out.set_low();
     spi.read(&mut buf).await.unwrap();
     assert_eq!(buf, [0x00; 9]);
+    spi.read::<u8>(&mut []).await.unwrap();
+    spi.blocking_read::<u8>(&mut []).unwrap();
+    drop(mosi_out);
+    drop(spi);
+
+    // Test tx-only. Just check it doesn't hang, not much else we can do without using SPI slave.
+    let mut spi = Spi::new_txonly(&mut spi_peri, &mut sck, &mut mosi, &mut tx_dma, spi_config);
+    spi.blocking_write(&buf).unwrap();
+    spi.write(&buf).await.unwrap();
+    spi.blocking_write(&buf).unwrap();
+    spi.blocking_write(&buf).unwrap();
+    spi.write(&buf).await.unwrap();
+    spi.write(&buf).await.unwrap();
+    spi.write::<u8>(&[]).await.unwrap();
+    spi.blocking_write::<u8>(&[]).unwrap();
+    drop(spi);
+
+    // Test tx-only nosck.
+    #[cfg(feature = "spi-v1")]
+    {
+        let mut spi = Spi::new_txonly_nosck(&mut spi_peri, &mut mosi, &mut tx_dma, spi_config);
+        spi.blocking_write(&buf).unwrap();
+        spi.write(&buf).await.unwrap();
+        spi.blocking_write(&buf).unwrap();
+        spi.blocking_write(&buf).unwrap();
+        spi.write(&buf).await.unwrap();
+        spi.write(&buf).await.unwrap();
+        spi.write::<u8>(&[]).await.unwrap();
+        spi.blocking_write::<u8>(&[]).unwrap();
+        drop(spi);
+    }
 
     info!("Test OK");
     cortex_m::asm::bkpt();