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feat(stm32f7): restore rtc configuration for stm32f7 series
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624f786203
commit
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@ -1,6 +1,7 @@
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use crate::pac::pwr::vals::Vos;
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use crate::pac::rcc::vals::{Hpre, Ppre, Sw};
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use crate::pac::{FLASH, PWR, RCC};
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use crate::rcc::bd::{BackupDomain, RtcClockSource};
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use crate::rcc::{set_freqs, Clocks};
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use crate::time::Hertz;
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@ -22,6 +23,9 @@ pub struct Config {
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pub pclk2: Option<Hertz>,
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pub pll48: bool,
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pub rtc: Option<RtcClockSource>,
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pub lsi: bool,
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pub lse: Option<Hertz>,
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}
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fn setup_pll(pllsrcclk: u32, use_hse: bool, pllsysclk: Option<u32>, pll48clk: bool) -> PllResults {
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@ -259,6 +263,18 @@ pub(crate) unsafe fn init(config: Config) {
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})
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});
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BackupDomain::configure_ls(
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config.rtc.unwrap_or(RtcClockSource::NOCLOCK),
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config.lsi,
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config.lse.map(|_| Default::default()),
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);
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let rtc = match config.rtc {
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Some(RtcClockSource::LSI) => Some(LSI_FREQ),
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Some(RtcClockSource::LSE) => Some(config.lse.unwrap()),
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_ => None,
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};
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set_freqs(Clocks {
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sys: Hertz(sysclk),
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apb1: Hertz(pclk1),
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@ -272,6 +288,8 @@ pub(crate) unsafe fn init(config: Config) {
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ahb3: Hertz(hclk),
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pll48: plls.pll48clk.map(Hertz),
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rtc,
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});
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}
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@ -97,7 +97,7 @@ pub struct Clocks {
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#[cfg(stm32f334)]
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pub hrtim: Option<Hertz>,
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#[cfg(any(rcc_wb, rcc_f4, rcc_f410))]
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#[cfg(any(rcc_wb, rcc_f4, rcc_f410, rcc_f7))]
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/// Set only if the lsi or lse is configured, indicates stop is supported
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pub rtc: Option<Hertz>,
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