From e139a4e076b2f61ddf0cdfa2ed5484ecb327afad Mon Sep 17 00:00:00 2001
From: Rafael Bachmann <rafael.bachmann@paessler.com>
Date: Mon, 25 Mar 2024 15:09:41 +0100
Subject: [PATCH] fix: CI

---
 embassy-rp/src/clocks.rs  | 2 ++
 embassy-rp/src/pio/mod.rs | 4 ++--
 2 files changed, 4 insertions(+), 2 deletions(-)

diff --git a/embassy-rp/src/clocks.rs b/embassy-rp/src/clocks.rs
index b02f3796f..b7f6aeac9 100644
--- a/embassy-rp/src/clocks.rs
+++ b/embassy-rp/src/clocks.rs
@@ -1,4 +1,5 @@
 //! Clock configuration for the RP2040
+use core::arch::asm;
 use core::marker::PhantomData;
 use core::sync::atomic::{AtomicU16, AtomicU32, Ordering};
 
@@ -7,6 +8,7 @@ use pac::clocks::vals::*;
 
 use crate::gpio::sealed::Pin;
 use crate::gpio::AnyPin;
+use crate::pac::common::{Reg, RW};
 use crate::{pac, reset, Peripheral};
 
 // NOTE: all gpin handling is commented out for future reference.
diff --git a/embassy-rp/src/pio/mod.rs b/embassy-rp/src/pio/mod.rs
index 804a7636d..7eca700ba 100644
--- a/embassy-rp/src/pio/mod.rs
+++ b/embassy-rp/src/pio/mod.rs
@@ -749,7 +749,7 @@ impl<'d, PIO: Instance + 'd, const SM: usize> StateMachine<'d, PIO, SM> {
                     w.set_set_count(1);
                 });
                 // SET PINDIRS, (dir)
-                unsafe { sm.exec_instr(0b1110_0000_1000_0000 | dir as u16) };
+                unsafe { sm.exec_instr(0b111_00000_100_00000 | dir as u16) };
             }
         });
     }
@@ -764,7 +764,7 @@ impl<'d, PIO: Instance + 'd, const SM: usize> StateMachine<'d, PIO, SM> {
                     w.set_set_count(1);
                 });
                 // SET PINS, (dir)
-                unsafe { sm.exec_instr(0b1110_0000_0000_0000 | level as u16) };
+                unsafe { sm.exec_instr(0b11100_000_000_00000 | level as u16) };
             }
         });
     }