From d8b4922b3ced8645a6225dcb0e8b873364bc8337 Mon Sep 17 00:00:00 2001 From: Caleb Garrett <47389035+caleb-garrett@users.noreply.github.com> Date: Mon, 12 Feb 2024 20:33:04 -0500 Subject: [PATCH] Add STM32 HMAC function. --- embassy-stm32/src/hash/mod.rs | 73 ++++++++++++++++++++++++++------ examples/stm32f7/src/bin/hash.rs | 2 +- 2 files changed, 61 insertions(+), 14 deletions(-) diff --git a/embassy-stm32/src/hash/mod.rs b/embassy-stm32/src/hash/mod.rs index f0c2c839a..bae538b5f 100644 --- a/embassy-stm32/src/hash/mod.rs +++ b/embassy-stm32/src/hash/mod.rs @@ -100,8 +100,9 @@ pub enum DataType { /// Stores the state of the HASH peripheral for suspending/resuming /// digest calculation. -pub struct Context { +pub struct Context<'c> { first_word_sent: bool, + key_sent: bool, buffer: [u8; HASH_BUFFER_LEN], buflen: usize, algo: Algorithm, @@ -110,8 +111,11 @@ pub struct Context { str: u32, cr: u32, csr: [u32; NUM_CONTEXT_REGS], + key: HmacKey<'c>, } +type HmacKey<'k> = Option<&'k [u8]>; + /// HASH driver. pub struct Hash<'d, T: Instance, D = NoDma> { _peripheral: PeripheralRef<'d, T>, @@ -140,10 +144,11 @@ impl<'d, T: Instance, D> Hash<'d, T, D> { } /// Starts computation of a new hash and returns the saved peripheral state. - pub fn start(&mut self, algorithm: Algorithm, format: DataType) -> Context { + pub fn start<'c>(&mut self, algorithm: Algorithm, format: DataType, key: HmacKey<'c>) -> Context<'c> { // Define a context for this new computation. let mut ctx = Context { first_word_sent: false, + key_sent: false, buffer: [0; HASH_BUFFER_LEN], buflen: 0, algo: algorithm, @@ -152,6 +157,7 @@ impl<'d, T: Instance, D> Hash<'d, T, D> { str: 0, cr: 0, csr: [0; NUM_CONTEXT_REGS], + key, }; // Set the data type in the peripheral. @@ -181,6 +187,14 @@ impl<'d, T: Instance, D> Hash<'d, T, D> { #[cfg(any(hash_v3, hash_v4))] T::regs().cr().modify(|w| w.set_algo(ctx.algo as u8)); + // Configure HMAC mode if a key is provided. + if let Some(key) = ctx.key { + T::regs().cr().modify(|w| w.set_mode(true)); + if key.len() > 64 { + T::regs().cr().modify(|w| w.set_lkey(true)); + } + } + T::regs().cr().modify(|w| w.set_init(true)); // Store and return the state of the peripheral. @@ -191,18 +205,30 @@ impl<'d, T: Instance, D> Hash<'d, T, D> { /// Restores the peripheral state using the given context, /// then updates the state with the provided data. /// Peripheral state is saved upon return. - pub fn update_blocking(&mut self, ctx: &mut Context, input: &[u8]) { + pub fn update_blocking<'c>(&mut self, ctx: &mut Context<'c>, input: &[u8]) { + // Restore the peripheral state. + self.load_context(&ctx); + + // Load the HMAC key if provided. + if !ctx.key_sent { + if let Some(key) = ctx.key { + self.accumulate_blocking(key); + T::regs().str().write(|w| w.set_dcal(true)); + // Block waiting for digest. + while !T::regs().sr().read().dcis() {} + } + ctx.key_sent = true; + } + let mut data_waiting = input.len() + ctx.buflen; if data_waiting < DIGEST_BLOCK_SIZE || (data_waiting < ctx.buffer.len() && !ctx.first_word_sent) { // There isn't enough data to digest a block, so append it to the buffer. ctx.buffer[ctx.buflen..ctx.buflen + input.len()].copy_from_slice(input); ctx.buflen += input.len(); + self.store_context(ctx); return; } - // Restore the peripheral state. - self.load_context(&ctx); - let mut ilen_remaining = input.len(); let mut input_start = 0; @@ -261,21 +287,30 @@ impl<'d, T: Instance, D> Hash<'d, T, D> { /// then updates the state with the provided data. /// Peripheral state is saved upon return. #[cfg(hash_v2)] - pub async fn update(&mut self, ctx: &mut Context, input: &[u8]) + pub async fn update<'c>(&mut self, ctx: &mut Context<'c>, input: &[u8]) where D: crate::hash::Dma, { + // Restore the peripheral state. + self.load_context(&ctx); + + // Load the HMAC key if provided. + if !ctx.key_sent { + if let Some(key) = ctx.key { + self.accumulate(key).await; + } + ctx.key_sent = true; + } + let data_waiting = input.len() + ctx.buflen; if data_waiting < DIGEST_BLOCK_SIZE { // There isn't enough data to digest a block, so append it to the buffer. ctx.buffer[ctx.buflen..ctx.buflen + input.len()].copy_from_slice(input); ctx.buflen += input.len(); + self.store_context(ctx); return; } - // Restore the peripheral state. - self.load_context(&ctx); - // Enable multiple DMA transfers. T::regs().cr().modify(|w| w.set_mdmat(true)); @@ -319,7 +354,7 @@ impl<'d, T: Instance, D> Hash<'d, T, D> { /// The digest buffer must be large enough to accomodate a digest for the selected algorithm. /// The largest returned digest size is 128 bytes for SHA-512. /// Panics if the supplied digest buffer is too short. - pub fn finish_blocking(&mut self, mut ctx: Context, digest: &mut [u8]) -> usize { + pub fn finish_blocking<'c>(&mut self, mut ctx: Context<'c>, digest: &mut [u8]) -> usize { // Restore the peripheral state. self.load_context(&ctx); @@ -333,6 +368,13 @@ impl<'d, T: Instance, D> Hash<'d, T, D> { // Block waiting for digest. while !T::regs().sr().read().dcis() {} + // Load the HMAC key if provided. + if let Some(key) = ctx.key { + self.accumulate_blocking(key); + T::regs().str().write(|w| w.set_dcal(true)); + while !T::regs().sr().read().dcis() {} + } + // Return the digest. let digest_words = match ctx.algo { Algorithm::SHA1 => 5, @@ -370,7 +412,7 @@ impl<'d, T: Instance, D> Hash<'d, T, D> { /// The largest returned digest size is 128 bytes for SHA-512. /// Panics if the supplied digest buffer is too short. #[cfg(hash_v2)] - pub async fn finish(&mut self, mut ctx: Context, digest: &mut [u8]) -> usize + pub async fn finish<'c>(&mut self, mut ctx: Context<'c>, digest: &mut [u8]) -> usize where D: crate::hash::Dma, { @@ -384,6 +426,11 @@ impl<'d, T: Instance, D> Hash<'d, T, D> { self.accumulate(&ctx.buffer[0..ctx.buflen]).await; ctx.buflen = 0; + // Load the HMAC key if provided. + if let Some(key) = ctx.key { + self.accumulate(key).await; + } + // Wait for completion. poll_fn(|cx| { // Check if already done. @@ -484,7 +531,7 @@ impl<'d, T: Instance, D> Hash<'d, T, D> { } /// Save the peripheral state to a context. - fn store_context(&mut self, ctx: &mut Context) { + fn store_context<'c>(&mut self, ctx: &mut Context<'c>) { // Block waiting for data in ready. while !T::regs().sr().read().dinis() {} diff --git a/examples/stm32f7/src/bin/hash.rs b/examples/stm32f7/src/bin/hash.rs index 96e50f84b..cbb880353 100644 --- a/examples/stm32f7/src/bin/hash.rs +++ b/examples/stm32f7/src/bin/hash.rs @@ -26,7 +26,7 @@ async fn main(_spawner: Spawner) -> ! { let hw_start_time = Instant::now(); // Compute a digest in hardware. - let mut context = hw_hasher.start(Algorithm::SHA256, DataType::Width8); + let mut context = hw_hasher.start(Algorithm::SHA256, DataType::Width8, None); hw_hasher.update(&mut context, test_1).await; hw_hasher.update(&mut context, test_2).await; let mut hw_digest: [u8; 32] = [0; 32];