From 663fa2addd30463328f6186e14f98680b4a35c9b Mon Sep 17 00:00:00 2001 From: Frostie314159 Date: Mon, 11 Dec 2023 13:27:55 +0100 Subject: [PATCH 001/581] Introduce reset_{at|after} functions for Ticker. --- embassy-time/src/timer.rs | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/embassy-time/src/timer.rs b/embassy-time/src/timer.rs index 574d715da..3444d3e24 100644 --- a/embassy-time/src/timer.rs +++ b/embassy-time/src/timer.rs @@ -184,6 +184,16 @@ impl Ticker { self.expires_at = Instant::now() + self.duration; } + /// Reset the ticker to fire for the next time on the deadline. + pub fn reset_at(&mut self, deadline: Instant) { + self.expires_at = deadline; + } + + /// Resets the ticker, after the specified duration has passed. + pub fn reset_after(&mut self, after: Duration) { + self.expires_at = Instant::now() + after; + } + /// Waits for the next tick. pub fn next(&mut self) -> impl Future + '_ { poll_fn(|cx| { From 8707462ec23807782796fbac4295bc5bce9ff136 Mon Sep 17 00:00:00 2001 From: Frostie314159 Date: Mon, 11 Dec 2023 16:11:57 +0100 Subject: [PATCH 002/581] Adjusted documentation and reset_after behaviour. --- embassy-time/src/timer.rs | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/embassy-time/src/timer.rs b/embassy-time/src/timer.rs index 3444d3e24..fe0e93951 100644 --- a/embassy-time/src/timer.rs +++ b/embassy-time/src/timer.rs @@ -185,13 +185,15 @@ impl Ticker { } /// Reset the ticker to fire for the next time on the deadline. + /// If the deadline is in the past, the ticker will fire instantly. pub fn reset_at(&mut self, deadline: Instant) { self.expires_at = deadline; } /// Resets the ticker, after the specified duration has passed. + /// If the specified duration is zero, the next tick will be after the duration of the ticker. pub fn reset_after(&mut self, after: Duration) { - self.expires_at = Instant::now() + after; + self.expires_at = Instant::now() + after + self.duration; } /// Waits for the next tick. From 2ab1b2ac9a13ae0436f1a2c32f984c01a67ebde7 Mon Sep 17 00:00:00 2001 From: Karun Date: Fri, 26 Jan 2024 20:40:05 -0500 Subject: [PATCH 003/581] Update stm-32 build script to include ospi traits --- embassy-stm32/build.rs | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/embassy-stm32/build.rs b/embassy-stm32/build.rs index 948ce3aff..f1ead6d46 100644 --- a/embassy-stm32/build.rs +++ b/embassy-stm32/build.rs @@ -891,6 +891,18 @@ fn main() { (("quadspi", "BK2_IO3"), quote!(crate::qspi::BK2D3Pin)), (("quadspi", "BK2_NCS"), quote!(crate::qspi::BK2NSSPin)), (("quadspi", "CLK"), quote!(crate::qspi::SckPin)), + (("octospi", "IO0"), quote!(crate::ospi::D0Pin)), + (("octospi", "IO1"), quote!(crate::ospi::D1Pin)), + (("octospi", "IO2"), quote!(crate::ospi::D2Pin)), + (("octospi", "IO3"), quote!(crate::ospi::D3Pin)), + (("octospi", "IO4"), quote!(crate::ospi::D4Pin)), + (("octospi", "IO5"), quote!(crate::ospi::D5Pin)), + (("octospi", "IO6"), quote!(crate::ospi::D6Pin)), + (("octospi", "IO7"), quote!(crate::ospi::D7Pin)), + (("octospi", "DQS"), quote!(crate::ospi::DQSPin)), + (("octospi", "NCS"), quote!(crate::ospi::NSSPin)), + (("octospi", "CLK"), quote!(crate::ospi::SckPin)), + (("octospi", "NCLK"), quote!(crate::ospi::NckPin)), ].into(); for p in METADATA.peripherals { @@ -1012,6 +1024,7 @@ fn main() { // SDMMCv1 uses the same channel for both directions, so just implement for RX (("sdmmc", "RX"), quote!(crate::sdmmc::SdmmcDma)), (("quadspi", "QUADSPI"), quote!(crate::qspi::QuadDma)), + (("octospi", "OCTOSPI1"), quote!(crate::ospi::OctoDma)), (("dac", "CH1"), quote!(crate::dac::DacDma1)), (("dac", "CH2"), quote!(crate::dac::DacDma2)), (("timer", "UP"), quote!(crate::timer::UpDma)), From 9905bbe9f7ed195932bb7d14dd363a9624aabdc7 Mon Sep 17 00:00:00 2001 From: Karun Date: Fri, 26 Jan 2024 20:40:32 -0500 Subject: [PATCH 004/581] Update peripheral crate to updated octospi pac --- embassy-stm32/Cargo.toml | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/embassy-stm32/Cargo.toml b/embassy-stm32/Cargo.toml index 865970dfb..b80509098 100644 --- a/embassy-stm32/Cargo.toml +++ b/embassy-stm32/Cargo.toml @@ -67,8 +67,8 @@ futures = { version = "0.3.17", default-features = false, features = ["async-awa rand_core = "0.6.3" sdio-host = "0.5.0" critical-section = "1.1" -stm32-metapac = { version = "15" } -#stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-656ecf6714fa34fdfb3b3e2f2cd034bffed3f303" } +# stm32-metapac = { version = "15" } +stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-2d51fbe7363a376606cb670cc2cec0f634251022" } vcell = "0.1.3" bxcan = "0.7.0" nb = "1.0.0" @@ -86,8 +86,8 @@ critical-section = { version = "1.1", features = ["std"] } [build-dependencies] proc-macro2 = "1.0.36" quote = "1.0.15" -stm32-metapac = { version = "15", default-features = false, features = ["metadata"]} -#stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-656ecf6714fa34fdfb3b3e2f2cd034bffed3f303", default-features = false, features = ["metadata"]} +# stm32-metapac = { version = "15", default-features = false, features = ["metadata"]} +stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-2d51fbe7363a376606cb670cc2cec0f634251022", default-features = false, features = ["metadata"]} [features] From f3609f2842d95bf1408e3bef108e0bd30f87f9d5 Mon Sep 17 00:00:00 2001 From: Karun Date: Fri, 26 Jan 2024 20:40:48 -0500 Subject: [PATCH 005/581] Add initial octopsi module --- embassy-stm32/src/lib.rs | 2 + embassy-stm32/src/ospi/mod.rs | 178 ++++++++++++++++++++++++++++++++++ 2 files changed, 180 insertions(+) create mode 100644 embassy-stm32/src/ospi/mod.rs diff --git a/embassy-stm32/src/lib.rs b/embassy-stm32/src/lib.rs index a465fccd8..e18b16935 100644 --- a/embassy-stm32/src/lib.rs +++ b/embassy-stm32/src/lib.rs @@ -57,6 +57,8 @@ pub mod ipcc; pub mod low_power; #[cfg(opamp)] pub mod opamp; +#[cfg(octospi)] +pub mod ospi; #[cfg(quadspi)] pub mod qspi; #[cfg(rng)] diff --git a/embassy-stm32/src/ospi/mod.rs b/embassy-stm32/src/ospi/mod.rs new file mode 100644 index 000000000..44824e42a --- /dev/null +++ b/embassy-stm32/src/ospi/mod.rs @@ -0,0 +1,178 @@ +//! OCTOSPI Serial Peripheral Interface +//! + +#![macro_use] + +use core::ptr; + +use embassy_embedded_hal::SetConfig; +use embassy_futures::join::join; +use embassy_hal_internal::{into_ref, PeripheralRef}; +pub use embedded_hal_02::spi::{Mode, Phase, Polarity, MODE_0, MODE_1, MODE_2, MODE_3}; + +use crate::dma::{slice_ptr_parts, word, Transfer}; +use crate::gpio::sealed::{AFType, Pin as _}; +use crate::gpio::{AnyPin, Pull}; +use crate::pac::octospi::{regs, vals, Octospi as Regs}; +use crate::rcc::RccPeripheral; +use crate::time::Hertz; +use crate::{peripherals, Peripheral}; + +pub struct Config; + +pub struct Ospi<'d, T: Instance, Dma> { + _peri: PeripheralRef<'d, T>, + sck: Option>, + d0: Option>, + d1: Option>, + d2: Option>, + d3: Option>, + d4: Option>, + d5: Option>, + d6: Option>, + d7: Option>, + nss: Option>, + dqs: Option>, + dma: PeripheralRef<'d, Dma>, + config: Config, +} + +impl<'d, T: Instance, Dma> Ospi<'d, T, Dma> { + /// Create new OSPI driver for a dualspi external chip + pub fn new_dualspi( + peri: impl Peripheral

+ 'd, + sck: impl Peripheral

> + 'd, + d0: impl Peripheral

> + 'd, + d1: impl Peripheral

> + 'd, + nss: impl Peripheral

> + 'd, + dma: impl Peripheral

+ 'd, + config: Config, + ) -> Self { + into_ref!(peri, sck, d0, d1, nss); + + sck.set_as_af_pull(sck.af_num(), AFType::OutputPushPull, Pull::None); + sck.set_speed(crate::gpio::Speed::VeryHigh); + nss.set_as_af_pull(nss.af_num(), AFType::OutputPushPull, Pull::Up); + nss.set_speed(crate::gpio::Speed::VeryHigh); + d0.set_as_af_pull(d0.af_num(), AFType::OutputPushPull, Pull::None); + d0.set_speed(crate::gpio::Speed::VeryHigh); + d1.set_as_af_pull(d1.af_num(), AFType::OutputPushPull, Pull::None); + d1.set_speed(crate::gpio::Speed::VeryHigh); + + Self::new_inner( + peri, + Some(d0.map_into()), + Some(d1.map_into()), + None, + None, + None, + None, + None, + None, + Some(sck.map_into()), + Some(nss.map_into()), + None, + dma, + config, + ) + } + + fn new_inner( + peri: impl Peripheral

+ 'd, + d0: Option>, + d1: Option>, + d2: Option>, + d3: Option>, + d4: Option>, + d5: Option>, + d6: Option>, + d7: Option>, + sck: Option>, + nss: Option>, + dqs: Option>, + dma: impl Peripheral

+ 'd, + config: Config, + ) -> Self { + into_ref!(peri, dma); + + T::enable_and_reset(); + T::REGS.sr().read().busy(); + + T::REGS.cr().modify(|w| { + w.set_en(true); + }); + + #[cfg(octospi_v1)] + { + T::REGS.ccr().modify(|w| { + w.set_imode(vals::PhaseMode::TWOLINES); + w.set_admode(vals::PhaseMode::TWOLINES); + w.set_abmode(vals::PhaseMode::TWOLINES); + w.set_dmode(vals::PhaseMode::TWOLINES); + }); + T::REGS.wccr().modify(|w| { + w.set_imode(vals::PhaseMode::TWOLINES); + w.set_admode(vals::PhaseMode::TWOLINES); + w.set_abmode(vals::PhaseMode::TWOLINES); + w.set_dmode(vals::PhaseMode::TWOLINES); + }); + } + + // + + // while T::REGS::sr().read().busy() {} + + Self { + _peri: peri, + sck, + d0, + d1, + d2, + d3, + d4, + d5, + d6, + d7, + nss, + dqs, + dma, + config, + } + } +} + +pub(crate) mod sealed { + use super::*; + + pub trait Instance { + const REGS: Regs; + } +} + +/// OSPI instance trait. +pub trait Instance: Peripheral

+ sealed::Instance + RccPeripheral {} + +pin_trait!(SckPin, Instance); +pin_trait!(NckPin, Instance); +pin_trait!(D0Pin, Instance); +pin_trait!(D1Pin, Instance); +pin_trait!(D2Pin, Instance); +pin_trait!(D3Pin, Instance); +pin_trait!(D4Pin, Instance); +pin_trait!(D5Pin, Instance); +pin_trait!(D6Pin, Instance); +pin_trait!(D7Pin, Instance); +pin_trait!(DQSPin, Instance); +pin_trait!(NSSPin, Instance); + +dma_trait!(OctoDma, Instance); + +foreach_peripheral!( + (octospi, $inst:ident) => { + impl sealed::Instance for peripherals::$inst { + const REGS: Regs = crate::pac::$inst; + } + + impl Instance for peripherals::$inst {} + }; +); From 9ed8d01b1102c574e23ffb4994a0b377fb762af2 Mon Sep 17 00:00:00 2001 From: Karun Date: Mon, 5 Feb 2024 21:23:03 -0500 Subject: [PATCH 006/581] Add transfer config, trait, functional initial configuration and read from memory --- embassy-stm32/src/ospi/mod.rs | 218 ++++++++++++++++++++++++++++++---- 1 file changed, 198 insertions(+), 20 deletions(-) diff --git a/embassy-stm32/src/ospi/mod.rs b/embassy-stm32/src/ospi/mod.rs index 44824e42a..547de65d9 100644 --- a/embassy-stm32/src/ospi/mod.rs +++ b/embassy-stm32/src/ospi/mod.rs @@ -3,12 +3,17 @@ #![macro_use] +pub mod enums; + +use core::ops::Add; use core::ptr; use embassy_embedded_hal::SetConfig; use embassy_futures::join::join; use embassy_hal_internal::{into_ref, PeripheralRef}; +use embedded_hal_02::blocking::i2c::Operation; pub use embedded_hal_02::spi::{Mode, Phase, Polarity, MODE_0, MODE_1, MODE_2, MODE_3}; +use enums::*; use crate::dma::{slice_ptr_parts, word, Transfer}; use crate::gpio::sealed::{AFType, Pin as _}; @@ -18,8 +23,109 @@ use crate::rcc::RccPeripheral; use crate::time::Hertz; use crate::{peripherals, Peripheral}; +/// OPSI driver config. pub struct Config; +/// OSPI transfer configuration. +pub struct TransferConfig { + /// Instruction width (IMODE) + pub iwidth: OspiWidth, + /// Instruction Id + pub instruction: Option, + /// Number of Instruction Bytes + pub isize: AddressSize, + /// Instruction Double Transfer rate enable + pub idtr: bool, + + /// Address width (ADMODE) + pub adwidth: OspiWidth, + /// Device memory address + pub address: Option, + /// Number of Address Bytes + pub adsize: AddressSize, + /// Address Double Transfer rate enable + pub addtr: bool, + + /// Alternate bytes width (ABMODE) + pub abwidth: OspiWidth, + /// Alternate Bytes + pub alternate_bytes: Option, + /// Number of Alternate Bytes + pub absize: AddressSize, + /// Alternate Bytes Double Transfer rate enable + pub abdtr: bool, + + /// Data width (DMODE) + pub dwidth: OspiWidth, + /// Length of data + pub data_len: Option, + /// Data buffer + pub ddtr: bool, + + /// Number of dummy cycles (DCYC) + pub dummy: DummyCycles, +} + +impl Default for TransferConfig { + fn default() -> Self { + Self { + iwidth: OspiWidth::NONE, + instruction: None, + isize: AddressSize::_8Bit, + idtr: false, + + adwidth: OspiWidth::NONE, + address: None, + adsize: AddressSize::_8Bit, + addtr: false, + + abwidth: OspiWidth::NONE, + alternate_bytes: None, + absize: AddressSize::_8Bit, + abdtr: false, + + dwidth: OspiWidth::NONE, + data_len: None, + ddtr: false, + + dummy: DummyCycles::_0, + } + } +} + +pub enum OspiError { + Test, +} + +pub trait Error {} + +pub trait ErrorType { + type Error: Error; +} + +impl ErrorType for &mut T { + type Error = T::Error; +} + +/// MultiSpi interface trait +pub trait MultiSpi: ErrorType { + /// Transaction configuration for specific multispi implementation + type Config; + + /// Command function used for a configuration operation, when no user data is + /// supplied to or read from the target device. + async fn command(&mut self, config: Self::Config) -> Result<(), Self::Error>; + + /// Read function used to read data from the target device following the supplied transaction + /// configuration. + async fn read(&mut self, data: &mut [u8], config: Self::Config) -> Result<(), Self::Error>; + + /// Write function used to send data to the target device following the supplied transaction + /// configuration. + async fn write(&mut self, data: &mut [u8], config: Self::Config) -> Result<(), Self::Error>; +} + +/// OSPI driver. pub struct Ospi<'d, T: Instance, Dma> { _peri: PeripheralRef<'d, T>, sck: Option>, @@ -37,6 +143,28 @@ pub struct Ospi<'d, T: Instance, Dma> { config: Config, } +impl Error for OspiError {} + +impl<'d, T: Instance, Dma> ErrorType for Ospi<'d, T, Dma> { + type Error = OspiError; +} + +impl<'d, T: Instance, Dma: OctoDma> MultiSpi for Ospi<'d, T, Dma> { + type Config = TransferConfig; + + async fn command(&mut self, config: Self::Config) -> Result<(), Self::Error> { + Ok(()) + } + + async fn read(&mut self, data: &mut [u8], config: Self::Config) -> Result<(), Self::Error> { + Ok(()) + } + + async fn write(&mut self, data: &mut [u8], config: Self::Config) -> Result<(), Self::Error> { + Ok(()) + } +} + impl<'d, T: Instance, Dma> Ospi<'d, T, Dma> { /// Create new OSPI driver for a dualspi external chip pub fn new_dualspi( @@ -54,11 +182,29 @@ impl<'d, T: Instance, Dma> Ospi<'d, T, Dma> { sck.set_speed(crate::gpio::Speed::VeryHigh); nss.set_as_af_pull(nss.af_num(), AFType::OutputPushPull, Pull::Up); nss.set_speed(crate::gpio::Speed::VeryHigh); + // nss.set_as_af_pull(nss.af_num(), AFType::OutputPushPull, Pull::Down); + // nss.set_speed(crate::gpio::Speed::VeryHigh); d0.set_as_af_pull(d0.af_num(), AFType::OutputPushPull, Pull::None); d0.set_speed(crate::gpio::Speed::VeryHigh); d1.set_as_af_pull(d1.af_num(), AFType::OutputPushPull, Pull::None); d1.set_speed(crate::gpio::Speed::VeryHigh); + #[cfg(octospi_v1)] + { + T::REGS.ccr().modify(|w| { + w.set_imode(vals::PhaseMode::TWOLINES); + w.set_admode(vals::PhaseMode::TWOLINES); + w.set_abmode(vals::PhaseMode::TWOLINES); + w.set_dmode(vals::PhaseMode::TWOLINES); + }); + T::REGS.wccr().modify(|w| { + w.set_imode(vals::PhaseMode::TWOLINES); + w.set_admode(vals::PhaseMode::TWOLINES); + w.set_abmode(vals::PhaseMode::TWOLINES); + w.set_dmode(vals::PhaseMode::TWOLINES); + }); + } + Self::new_inner( peri, Some(d0.map_into()), @@ -96,31 +242,18 @@ impl<'d, T: Instance, Dma> Ospi<'d, T, Dma> { into_ref!(peri, dma); T::enable_and_reset(); - T::REGS.sr().read().busy(); + while T::REGS.sr().read().busy() {} T::REGS.cr().modify(|w| { w.set_en(true); }); - #[cfg(octospi_v1)] - { - T::REGS.ccr().modify(|w| { - w.set_imode(vals::PhaseMode::TWOLINES); - w.set_admode(vals::PhaseMode::TWOLINES); - w.set_abmode(vals::PhaseMode::TWOLINES); - w.set_dmode(vals::PhaseMode::TWOLINES); - }); - T::REGS.wccr().modify(|w| { - w.set_imode(vals::PhaseMode::TWOLINES); - w.set_admode(vals::PhaseMode::TWOLINES); - w.set_abmode(vals::PhaseMode::TWOLINES); - w.set_dmode(vals::PhaseMode::TWOLINES); - }); - } - - // - - // while T::REGS::sr().read().busy() {} + T::REGS.dcr1().modify(|w| { + w.set_devsize(23); + w.set_mtyp(vals::MemType::MACRONIX); + w.set_ckmode(false); + // w.se + }); Self { _peri: peri, @@ -139,6 +272,51 @@ impl<'d, T: Instance, Dma> Ospi<'d, T, Dma> { config, } } + + pub fn blocking_read(&mut self, transaction: TransferConfig) -> Result<(), ()> { + Ok(()) + } + + fn configure_command(&mut self, command: &TransferConfig) -> Result<(), ()> { + Ok(()) + } + + /// Poor attempt to read data from memory + pub fn receive(&mut self, buf: &mut [u8], intruction: u8, data_len: usize) -> Result<(), ()> { + T::REGS.cr().modify(|w| { + w.set_fmode(vals::FunctionalMode::INDIRECTREAD); + }); + + T::REGS.ccr().modify(|w| { + w.set_imode(vals::PhaseMode::ONELINE); + w.set_admode(vals::PhaseMode::NONE); + w.set_abmode(vals::PhaseMode::NONE); + + w.set_dmode(vals::PhaseMode::ONELINE); + }); + + T::REGS.dlr().modify(|w| { + w.set_dl((data_len - 1) as u32); + }); + + // set instruction + T::REGS.ir().modify(|w| w.set_instruction(intruction as u32)); + + // read bytes + // for idx in 0..data_len { + // while !T::REGS.sr().read().tcf() && !T::REGS.sr().read().ftf() {} + // buf[idx] = unsafe { (T::REGS.dr().as_ptr() as *mut u8).read_volatile() }; + // } + // wait for finish + while !T::REGS.sr().read().tcf() {} + + let fifo_count = T::REGS.sr().read().flevel(); + for idx in 0..(fifo_count as usize) { + buf[idx] = unsafe { (T::REGS.dr().as_ptr() as *mut u8).read_volatile() }; + } + + Ok(()) + } } pub(crate) mod sealed { From a0b70672054784276d6c370b87fd4635314656ae Mon Sep 17 00:00:00 2001 From: Karun Date: Mon, 5 Feb 2024 21:24:33 -0500 Subject: [PATCH 007/581] Add user enums for transaction configuration --- embassy-stm32/src/ospi/enums.rs | 336 ++++++++++++++++++++++++++++++++ 1 file changed, 336 insertions(+) create mode 100644 embassy-stm32/src/ospi/enums.rs diff --git a/embassy-stm32/src/ospi/enums.rs b/embassy-stm32/src/ospi/enums.rs new file mode 100644 index 000000000..2209d7b94 --- /dev/null +++ b/embassy-stm32/src/ospi/enums.rs @@ -0,0 +1,336 @@ +//! Enums used in Ospi configuration. + +#[allow(dead_code)] +#[derive(Copy, Clone)] +pub(crate) enum OspiMode { + IndirectWrite, + IndirectRead, + AutoPolling, + MemoryMapped, +} + +impl Into for OspiMode { + fn into(self) -> u8 { + match self { + OspiMode::IndirectWrite => 0b00, + OspiMode::IndirectRead => 0b01, + OspiMode::AutoPolling => 0b10, + OspiMode::MemoryMapped => 0b11, + } + } +} + +/// Ospi lane width +#[allow(dead_code)] +#[derive(Copy, Clone)] +pub enum OspiWidth { + /// None + NONE, + /// Single lane + SING, + /// Dual lanes + DUAL, + /// Quad lanes + QUAD, + /// Eight lanes + OCTO, +} + +impl Into for OspiWidth { + fn into(self) -> u8 { + match self { + OspiWidth::NONE => 0b00, + OspiWidth::SING => 0b01, + OspiWidth::DUAL => 0b10, + OspiWidth::QUAD => 0b11, + OspiWidth::OCTO => 0b100, + } + } +} + +/// Flash bank selection +#[allow(dead_code)] +#[derive(Copy, Clone)] +pub enum FlashSelection { + /// Bank 1 + Flash1, + /// Bank 2 + Flash2, +} + +impl Into for FlashSelection { + fn into(self) -> bool { + match self { + FlashSelection::Flash1 => false, + FlashSelection::Flash2 => true, + } + } +} + +/// Ospi memory size. +#[allow(missing_docs)] +#[derive(Copy, Clone)] +pub enum MemorySize { + _1KiB, + _2KiB, + _4KiB, + _8KiB, + _16KiB, + _32KiB, + _64KiB, + _128KiB, + _256KiB, + _512KiB, + _1MiB, + _2MiB, + _4MiB, + _8MiB, + _16MiB, + _32MiB, + _64MiB, + _128MiB, + _256MiB, + _512MiB, + _1GiB, + _2GiB, + _4GiB, + Other(u8), +} + +impl Into for MemorySize { + fn into(self) -> u8 { + match self { + MemorySize::_1KiB => 9, + MemorySize::_2KiB => 10, + MemorySize::_4KiB => 11, + MemorySize::_8KiB => 12, + MemorySize::_16KiB => 13, + MemorySize::_32KiB => 14, + MemorySize::_64KiB => 15, + MemorySize::_128KiB => 16, + MemorySize::_256KiB => 17, + MemorySize::_512KiB => 18, + MemorySize::_1MiB => 19, + MemorySize::_2MiB => 20, + MemorySize::_4MiB => 21, + MemorySize::_8MiB => 22, + MemorySize::_16MiB => 23, + MemorySize::_32MiB => 24, + MemorySize::_64MiB => 25, + MemorySize::_128MiB => 26, + MemorySize::_256MiB => 27, + MemorySize::_512MiB => 28, + MemorySize::_1GiB => 29, + MemorySize::_2GiB => 30, + MemorySize::_4GiB => 31, + MemorySize::Other(val) => val, + } + } +} + +/// Ospi Address size +#[derive(Copy, Clone)] +pub enum AddressSize { + /// 8-bit address + _8Bit, + /// 16-bit address + _16Bit, + /// 24-bit address + _24bit, + /// 32-bit address + _32bit, +} + +impl Into for AddressSize { + fn into(self) -> u8 { + match self { + AddressSize::_8Bit => 0b00, + AddressSize::_16Bit => 0b01, + AddressSize::_24bit => 0b10, + AddressSize::_32bit => 0b11, + } + } +} + +/// Time the Chip Select line stays high. +#[allow(missing_docs)] +#[derive(Copy, Clone)] +pub enum ChipSelectHighTime { + _1Cycle, + _2Cycle, + _3Cycle, + _4Cycle, + _5Cycle, + _6Cycle, + _7Cycle, + _8Cycle, +} + +impl Into for ChipSelectHighTime { + fn into(self) -> u8 { + match self { + ChipSelectHighTime::_1Cycle => 0, + ChipSelectHighTime::_2Cycle => 1, + ChipSelectHighTime::_3Cycle => 2, + ChipSelectHighTime::_4Cycle => 3, + ChipSelectHighTime::_5Cycle => 4, + ChipSelectHighTime::_6Cycle => 5, + ChipSelectHighTime::_7Cycle => 6, + ChipSelectHighTime::_8Cycle => 7, + } + } +} + +/// FIFO threshold. +#[allow(missing_docs)] +#[derive(Copy, Clone)] +pub enum FIFOThresholdLevel { + _1Bytes, + _2Bytes, + _3Bytes, + _4Bytes, + _5Bytes, + _6Bytes, + _7Bytes, + _8Bytes, + _9Bytes, + _10Bytes, + _11Bytes, + _12Bytes, + _13Bytes, + _14Bytes, + _15Bytes, + _16Bytes, + _17Bytes, + _18Bytes, + _19Bytes, + _20Bytes, + _21Bytes, + _22Bytes, + _23Bytes, + _24Bytes, + _25Bytes, + _26Bytes, + _27Bytes, + _28Bytes, + _29Bytes, + _30Bytes, + _31Bytes, + _32Bytes, +} + +impl Into for FIFOThresholdLevel { + fn into(self) -> u8 { + match self { + FIFOThresholdLevel::_1Bytes => 0, + FIFOThresholdLevel::_2Bytes => 1, + FIFOThresholdLevel::_3Bytes => 2, + FIFOThresholdLevel::_4Bytes => 3, + FIFOThresholdLevel::_5Bytes => 4, + FIFOThresholdLevel::_6Bytes => 5, + FIFOThresholdLevel::_7Bytes => 6, + FIFOThresholdLevel::_8Bytes => 7, + FIFOThresholdLevel::_9Bytes => 8, + FIFOThresholdLevel::_10Bytes => 9, + FIFOThresholdLevel::_11Bytes => 10, + FIFOThresholdLevel::_12Bytes => 11, + FIFOThresholdLevel::_13Bytes => 12, + FIFOThresholdLevel::_14Bytes => 13, + FIFOThresholdLevel::_15Bytes => 14, + FIFOThresholdLevel::_16Bytes => 15, + FIFOThresholdLevel::_17Bytes => 16, + FIFOThresholdLevel::_18Bytes => 17, + FIFOThresholdLevel::_19Bytes => 18, + FIFOThresholdLevel::_20Bytes => 19, + FIFOThresholdLevel::_21Bytes => 20, + FIFOThresholdLevel::_22Bytes => 21, + FIFOThresholdLevel::_23Bytes => 22, + FIFOThresholdLevel::_24Bytes => 23, + FIFOThresholdLevel::_25Bytes => 24, + FIFOThresholdLevel::_26Bytes => 25, + FIFOThresholdLevel::_27Bytes => 26, + FIFOThresholdLevel::_28Bytes => 27, + FIFOThresholdLevel::_29Bytes => 28, + FIFOThresholdLevel::_30Bytes => 29, + FIFOThresholdLevel::_31Bytes => 30, + FIFOThresholdLevel::_32Bytes => 31, + } + } +} + +/// Dummy cycle count +#[allow(missing_docs)] +#[derive(Copy, Clone)] +pub enum DummyCycles { + _0, + _1, + _2, + _3, + _4, + _5, + _6, + _7, + _8, + _9, + _10, + _11, + _12, + _13, + _14, + _15, + _16, + _17, + _18, + _19, + _20, + _21, + _22, + _23, + _24, + _25, + _26, + _27, + _28, + _29, + _30, + _31, +} + +impl Into for DummyCycles { + fn into(self) -> u8 { + match self { + DummyCycles::_0 => 0, + DummyCycles::_1 => 1, + DummyCycles::_2 => 2, + DummyCycles::_3 => 3, + DummyCycles::_4 => 4, + DummyCycles::_5 => 5, + DummyCycles::_6 => 6, + DummyCycles::_7 => 7, + DummyCycles::_8 => 8, + DummyCycles::_9 => 9, + DummyCycles::_10 => 10, + DummyCycles::_11 => 11, + DummyCycles::_12 => 12, + DummyCycles::_13 => 13, + DummyCycles::_14 => 14, + DummyCycles::_15 => 15, + DummyCycles::_16 => 16, + DummyCycles::_17 => 17, + DummyCycles::_18 => 18, + DummyCycles::_19 => 19, + DummyCycles::_20 => 20, + DummyCycles::_21 => 21, + DummyCycles::_22 => 22, + DummyCycles::_23 => 23, + DummyCycles::_24 => 24, + DummyCycles::_25 => 25, + DummyCycles::_26 => 26, + DummyCycles::_27 => 27, + DummyCycles::_28 => 28, + DummyCycles::_29 => 29, + DummyCycles::_30 => 30, + DummyCycles::_31 => 31, + } + } +} From b86a1f07009dfac8849cdc1beeb621fea348ccd5 Mon Sep 17 00:00:00 2001 From: Karun Date: Wed, 21 Feb 2024 10:43:49 -0500 Subject: [PATCH 008/581] Add constructors Add transfer configuration Update command configuration Add peripheral width consideration Add drop impl --- embassy-stm32/src/ospi/enums.rs | 23 + embassy-stm32/src/ospi/mod.rs | 718 +++++++++++++++++++++++++++++--- 2 files changed, 673 insertions(+), 68 deletions(-) diff --git a/embassy-stm32/src/ospi/enums.rs b/embassy-stm32/src/ospi/enums.rs index 2209d7b94..e52f1f54d 100644 --- a/embassy-stm32/src/ospi/enums.rs +++ b/embassy-stm32/src/ospi/enums.rs @@ -67,6 +67,29 @@ impl Into for FlashSelection { } } +/// Wrap Size +#[allow(dead_code)] +#[derive(Copy, Clone)] +pub enum WrapSize { + None, + _16Bytes, + _32Bytes, + _64Bytes, + _128Bytes, +} + +impl Into for WrapSize { + fn into(self) -> u8 { + match self { + WrapSize::None => 0x00, + WrapSize::_16Bytes => 0x02, + WrapSize::_32Bytes => 0x03, + WrapSize::_64Bytes => 0x04, + WrapSize::_128Bytes => 0x05, + } + } +} + /// Ospi memory size. #[allow(missing_docs)] #[derive(Copy, Clone)] diff --git a/embassy-stm32/src/ospi/mod.rs b/embassy-stm32/src/ospi/mod.rs index 547de65d9..48b1ef789 100644 --- a/embassy-stm32/src/ospi/mod.rs +++ b/embassy-stm32/src/ospi/mod.rs @@ -11,20 +11,79 @@ use core::ptr; use embassy_embedded_hal::SetConfig; use embassy_futures::join::join; use embassy_hal_internal::{into_ref, PeripheralRef}; -use embedded_hal_02::blocking::i2c::Operation; -pub use embedded_hal_02::spi::{Mode, Phase, Polarity, MODE_0, MODE_1, MODE_2, MODE_3}; -use enums::*; +// use embedded_hal_02::spi; +pub use enums::*; +use stm32_metapac::octospi::vals::{MemType, PhaseMode, SizeInBits}; use crate::dma::{slice_ptr_parts, word, Transfer}; use crate::gpio::sealed::{AFType, Pin as _}; use crate::gpio::{AnyPin, Pull}; use crate::pac::octospi::{regs, vals, Octospi as Regs}; use crate::rcc::RccPeripheral; -use crate::time::Hertz; use crate::{peripherals, Peripheral}; /// OPSI driver config. -pub struct Config; +pub struct Config { + /// Fifo threshold used by the peripheral to generate the interrupt indicating data + /// or space is available in the FIFO + pub fifo_threshold: FIFOThresholdLevel, + /// Enables dual-quad mode which allows access to two devices simultaneously to + /// increase throughput + pub dual_quad: bool, + /// Indicates the type of external device connected + pub memory_type: MemType, // Need to add an additional enum to provide this public interface + /// Defines the size of the external device connected to the OSPI corresponding + /// to the number of address bits required to access the device + pub device_size: MemorySize, + /// Sets the minimum number of clock cycles that the chip select signal must be held high + /// between commands + pub chip_select_high_time: ChipSelectHighTime, + /// Enables the free running clock + pub free_running_clock: bool, + /// Sets the clock level when the device is not selected + pub clock_mode: bool, + /// Indicates the wrap size corresponding to the external device configuration + pub wrap_size: WrapSize, + /// Specified the prescaler factor used for generating the external clock based + /// on the AHB clock + pub clock_prescaler: u8, + /// Allows the delay of 1/2 cycle the data sampling to account for external + /// signal delays + pub sample_shifting: bool, + /// Allows hold to 1/4 cycle the data + pub delay_hold_quarter_cycle: bool, + /// Enables the transaction boundary feature and defines the boundary to release + /// the chip select + pub chip_select_boundary: u8, + /// Enbales the delay block bypass so the sampling is not affected by the delay block + pub delay_block_bypass: bool, + /// Enables communication regulation feature. Chip select is released when the other + /// OctoSpi requests access to the bus + pub max_transfer: u8, + /// Enables the refresh feature, chip select is released every refresh + 1 clock cycles + pub refresh: u32, +} +impl Default for Config { + fn default() -> Self { + Self { + fifo_threshold: FIFOThresholdLevel::_16Bytes, // 32 bytes FIFO, half capacity + dual_quad: false, + memory_type: MemType::B_STANDARD, + device_size: MemorySize::Other(0), + chip_select_high_time: ChipSelectHighTime::_5Cycle, + free_running_clock: false, + clock_mode: false, + wrap_size: WrapSize::None, + clock_prescaler: 0, + sample_shifting: false, + delay_hold_quarter_cycle: false, + chip_select_boundary: 0, // Acceptable range 0 to 31 + delay_block_bypass: true, + max_transfer: 0, + refresh: 0, + } + } +} /// OSPI transfer configuration. pub struct TransferConfig { @@ -94,7 +153,8 @@ impl Default for TransferConfig { } pub enum OspiError { - Test, + InvalidConfiguration, + InvalidCommand, } pub trait Error {} @@ -122,7 +182,7 @@ pub trait MultiSpi: ErrorType { /// Write function used to send data to the target device following the supplied transaction /// configuration. - async fn write(&mut self, data: &mut [u8], config: Self::Config) -> Result<(), Self::Error>; + async fn write(&mut self, data: &[u8], config: Self::Config) -> Result<(), Self::Error>; } /// OSPI driver. @@ -141,6 +201,7 @@ pub struct Ospi<'d, T: Instance, Dma> { dqs: Option>, dma: PeripheralRef<'d, Dma>, config: Config, + width: OspiWidth, } impl Error for OspiError {} @@ -153,21 +214,21 @@ impl<'d, T: Instance, Dma: OctoDma> MultiSpi for Ospi<'d, T, Dma> { type Config = TransferConfig; async fn command(&mut self, config: Self::Config) -> Result<(), Self::Error> { - Ok(()) + self.command(&config).await } async fn read(&mut self, data: &mut [u8], config: Self::Config) -> Result<(), Self::Error> { - Ok(()) + self.read(data, config).await } - async fn write(&mut self, data: &mut [u8], config: Self::Config) -> Result<(), Self::Error> { - Ok(()) + async fn write(&mut self, data: &[u8], config: Self::Config) -> Result<(), Self::Error> { + self.write(data, config).await } } impl<'d, T: Instance, Dma> Ospi<'d, T, Dma> { /// Create new OSPI driver for a dualspi external chip - pub fn new_dualspi( + pub fn new_spi( peri: impl Peripheral

+ 'd, sck: impl Peripheral

> + 'd, d0: impl Peripheral

> + 'd, @@ -182,29 +243,11 @@ impl<'d, T: Instance, Dma> Ospi<'d, T, Dma> { sck.set_speed(crate::gpio::Speed::VeryHigh); nss.set_as_af_pull(nss.af_num(), AFType::OutputPushPull, Pull::Up); nss.set_speed(crate::gpio::Speed::VeryHigh); - // nss.set_as_af_pull(nss.af_num(), AFType::OutputPushPull, Pull::Down); - // nss.set_speed(crate::gpio::Speed::VeryHigh); d0.set_as_af_pull(d0.af_num(), AFType::OutputPushPull, Pull::None); d0.set_speed(crate::gpio::Speed::VeryHigh); - d1.set_as_af_pull(d1.af_num(), AFType::OutputPushPull, Pull::None); + d1.set_as_af_pull(d1.af_num(), AFType::Input, Pull::None); d1.set_speed(crate::gpio::Speed::VeryHigh); - #[cfg(octospi_v1)] - { - T::REGS.ccr().modify(|w| { - w.set_imode(vals::PhaseMode::TWOLINES); - w.set_admode(vals::PhaseMode::TWOLINES); - w.set_abmode(vals::PhaseMode::TWOLINES); - w.set_dmode(vals::PhaseMode::TWOLINES); - }); - T::REGS.wccr().modify(|w| { - w.set_imode(vals::PhaseMode::TWOLINES); - w.set_admode(vals::PhaseMode::TWOLINES); - w.set_abmode(vals::PhaseMode::TWOLINES); - w.set_dmode(vals::PhaseMode::TWOLINES); - }); - } - Self::new_inner( peri, Some(d0.map_into()), @@ -220,6 +263,209 @@ impl<'d, T: Instance, Dma> Ospi<'d, T, Dma> { None, dma, config, + OspiWidth::SING, + ) + } + + /// Create new OSPI driver for a dualspi external chip + pub fn new_dualspi( + peri: impl Peripheral

+ 'd, + sck: impl Peripheral

> + 'd, + d0: impl Peripheral

> + 'd, + d1: impl Peripheral

> + 'd, + nss: impl Peripheral

> + 'd, + dma: impl Peripheral

+ 'd, + config: Config, + ) -> Self { + into_ref!(peri, sck, d0, d1, nss); + + sck.set_as_af_pull(sck.af_num(), AFType::OutputPushPull, Pull::None); + sck.set_speed(crate::gpio::Speed::VeryHigh); + nss.set_as_af_pull(nss.af_num(), AFType::OutputPushPull, Pull::Up); + nss.set_speed(crate::gpio::Speed::VeryHigh); + d0.set_as_af_pull(d0.af_num(), AFType::OutputPushPull, Pull::None); + d0.set_speed(crate::gpio::Speed::VeryHigh); + d1.set_as_af_pull(d1.af_num(), AFType::OutputPushPull, Pull::None); + d1.set_speed(crate::gpio::Speed::VeryHigh); + + Self::new_inner( + peri, + Some(d0.map_into()), + Some(d1.map_into()), + None, + None, + None, + None, + None, + None, + Some(sck.map_into()), + Some(nss.map_into()), + None, + dma, + config, + OspiWidth::DUAL, + ) + } + + /// Create new OSPI driver for a quadspi external chip + pub fn new_quadspi( + peri: impl Peripheral

+ 'd, + sck: impl Peripheral

> + 'd, + d0: impl Peripheral

> + 'd, + d1: impl Peripheral

> + 'd, + d2: impl Peripheral

> + 'd, + d3: impl Peripheral

> + 'd, + nss: impl Peripheral

> + 'd, + dma: impl Peripheral

+ 'd, + config: Config, + ) -> Self { + into_ref!(peri, sck, d0, d1, d2, d3, nss); + + sck.set_as_af_pull(sck.af_num(), AFType::OutputPushPull, Pull::None); + sck.set_speed(crate::gpio::Speed::VeryHigh); + nss.set_as_af_pull(nss.af_num(), AFType::OutputPushPull, Pull::Up); + nss.set_speed(crate::gpio::Speed::VeryHigh); + d0.set_as_af_pull(d0.af_num(), AFType::OutputPushPull, Pull::None); + d0.set_speed(crate::gpio::Speed::VeryHigh); + d1.set_as_af_pull(d1.af_num(), AFType::OutputPushPull, Pull::None); + d1.set_speed(crate::gpio::Speed::VeryHigh); + d2.set_as_af_pull(d2.af_num(), AFType::OutputPushPull, Pull::None); + d2.set_speed(crate::gpio::Speed::VeryHigh); + d3.set_as_af_pull(d3.af_num(), AFType::OutputPushPull, Pull::None); + d3.set_speed(crate::gpio::Speed::VeryHigh); + + Self::new_inner( + peri, + Some(d0.map_into()), + Some(d1.map_into()), + Some(d2.map_into()), + Some(d3.map_into()), + None, + None, + None, + None, + Some(sck.map_into()), + Some(nss.map_into()), + None, + dma, + config, + OspiWidth::QUAD, + ) + } + + /// Create new OSPI driver for two quadspi external chips + pub fn new_dualquadspi( + peri: impl Peripheral

+ 'd, + sck: impl Peripheral

> + 'd, + d0: impl Peripheral

> + 'd, + d1: impl Peripheral

> + 'd, + d2: impl Peripheral

> + 'd, + d3: impl Peripheral

> + 'd, + d4: impl Peripheral

> + 'd, + d5: impl Peripheral

> + 'd, + d6: impl Peripheral

> + 'd, + d7: impl Peripheral

> + 'd, + nss: impl Peripheral

> + 'd, + dma: impl Peripheral

+ 'd, + config: Config, + ) -> Self { + into_ref!(peri, sck, d0, d1, d2, d3, d4, d5, d6, d7, nss); + + sck.set_as_af_pull(sck.af_num(), AFType::OutputPushPull, Pull::None); + sck.set_speed(crate::gpio::Speed::VeryHigh); + nss.set_as_af_pull(nss.af_num(), AFType::OutputPushPull, Pull::Up); + nss.set_speed(crate::gpio::Speed::VeryHigh); + d0.set_as_af_pull(d0.af_num(), AFType::OutputPushPull, Pull::None); + d0.set_speed(crate::gpio::Speed::VeryHigh); + d1.set_as_af_pull(d1.af_num(), AFType::OutputPushPull, Pull::None); + d1.set_speed(crate::gpio::Speed::VeryHigh); + d2.set_as_af_pull(d2.af_num(), AFType::OutputPushPull, Pull::None); + d2.set_speed(crate::gpio::Speed::VeryHigh); + d3.set_as_af_pull(d3.af_num(), AFType::OutputPushPull, Pull::None); + d3.set_speed(crate::gpio::Speed::VeryHigh); + d4.set_as_af_pull(d4.af_num(), AFType::OutputPushPull, Pull::None); + d4.set_speed(crate::gpio::Speed::VeryHigh); + d5.set_as_af_pull(d5.af_num(), AFType::OutputPushPull, Pull::None); + d5.set_speed(crate::gpio::Speed::VeryHigh); + d6.set_as_af_pull(d6.af_num(), AFType::OutputPushPull, Pull::None); + d6.set_speed(crate::gpio::Speed::VeryHigh); + d7.set_as_af_pull(d7.af_num(), AFType::OutputPushPull, Pull::None); + d7.set_speed(crate::gpio::Speed::VeryHigh); + + Self::new_inner( + peri, + Some(d0.map_into()), + Some(d1.map_into()), + Some(d2.map_into()), + Some(d3.map_into()), + Some(d4.map_into()), + Some(d5.map_into()), + Some(d6.map_into()), + Some(d7.map_into()), + Some(sck.map_into()), + Some(nss.map_into()), + None, + dma, + config, + OspiWidth::QUAD, + ) + } + + /// Create new OSPI driver for two quadspi external chips + pub fn new_octospi( + peri: impl Peripheral

+ 'd, + sck: impl Peripheral

> + 'd, + d0: impl Peripheral

> + 'd, + d1: impl Peripheral

> + 'd, + d2: impl Peripheral

> + 'd, + d3: impl Peripheral

> + 'd, + d4: impl Peripheral

> + 'd, + d5: impl Peripheral

> + 'd, + d6: impl Peripheral

> + 'd, + d7: impl Peripheral

> + 'd, + nss: impl Peripheral

> + 'd, + dma: impl Peripheral

+ 'd, + config: Config, + ) -> Self { + into_ref!(peri, sck, d0, d1, d2, d3, d4, d5, d6, d7, nss); + + sck.set_as_af_pull(sck.af_num(), AFType::OutputPushPull, Pull::None); + sck.set_speed(crate::gpio::Speed::VeryHigh); + nss.set_as_af_pull(nss.af_num(), AFType::OutputPushPull, Pull::Up); + nss.set_speed(crate::gpio::Speed::VeryHigh); + d0.set_as_af_pull(d0.af_num(), AFType::OutputPushPull, Pull::None); + d0.set_speed(crate::gpio::Speed::VeryHigh); + d1.set_as_af_pull(d1.af_num(), AFType::OutputPushPull, Pull::None); + d1.set_speed(crate::gpio::Speed::VeryHigh); + d2.set_as_af_pull(d2.af_num(), AFType::OutputPushPull, Pull::None); + d2.set_speed(crate::gpio::Speed::VeryHigh); + d3.set_as_af_pull(d3.af_num(), AFType::OutputPushPull, Pull::None); + d3.set_speed(crate::gpio::Speed::VeryHigh); + d4.set_as_af_pull(d4.af_num(), AFType::OutputPushPull, Pull::None); + d4.set_speed(crate::gpio::Speed::VeryHigh); + d5.set_as_af_pull(d5.af_num(), AFType::OutputPushPull, Pull::None); + d5.set_speed(crate::gpio::Speed::VeryHigh); + d6.set_as_af_pull(d6.af_num(), AFType::OutputPushPull, Pull::None); + d6.set_speed(crate::gpio::Speed::VeryHigh); + d7.set_as_af_pull(d7.af_num(), AFType::OutputPushPull, Pull::None); + d7.set_speed(crate::gpio::Speed::VeryHigh); + + Self::new_inner( + peri, + Some(d0.map_into()), + Some(d1.map_into()), + Some(d2.map_into()), + Some(d3.map_into()), + Some(d4.map_into()), + Some(d5.map_into()), + Some(d6.map_into()), + Some(d7.map_into()), + Some(sck.map_into()), + Some(nss.map_into()), + None, + dma, + config, + OspiWidth::OCTO, ) } @@ -238,22 +484,71 @@ impl<'d, T: Instance, Dma> Ospi<'d, T, Dma> { dqs: Option>, dma: impl Peripheral

+ 'd, config: Config, + width: OspiWidth, ) -> Self { into_ref!(peri, dma); + // System configuration T::enable_and_reset(); while T::REGS.sr().read().busy() {} + // Device configuration + T::REGS.dcr1().modify(|w| { + w.set_devsize(config.device_size.into()); + w.set_mtyp(config.memory_type); + w.set_csht(config.chip_select_high_time.into()); + w.set_dlybyp(config.delay_block_bypass); + w.set_frck(false); + w.set_ckmode(config.clock_mode); + }); + + T::REGS.dcr2().modify(|w| { + w.set_wrapsize(config.wrap_size.into()); + }); + + T::REGS.dcr3().modify(|w| { + w.set_csbound(config.chip_select_boundary); + w.set_maxtran(config.max_transfer); + }); + + T::REGS.dcr4().modify(|w| { + w.set_refresh(config.refresh); + }); + + T::REGS.cr().modify(|w| { + w.set_fthres(vals::Threshold(config.fifo_threshold.into())); + }); + + // Wait for busy flag to clear + while T::REGS.sr().read().busy() {} + + T::REGS.dcr2().modify(|w| { + w.set_prescaler(config.clock_prescaler); + }); + + T::REGS.cr().modify(|w| { + w.set_dmm(config.dual_quad); + }); + + T::REGS.tcr().modify(|w| { + w.set_sshift(match config.sample_shifting { + true => vals::SampleShift::HALFCYCLE, + false => vals::SampleShift::NONE, + }); + w.set_dhqc(config.delay_hold_quarter_cycle); + }); + + // Enable peripheral T::REGS.cr().modify(|w| { w.set_en(true); }); - T::REGS.dcr1().modify(|w| { - w.set_devsize(23); - w.set_mtyp(vals::MemType::MACRONIX); - w.set_ckmode(false); - // w.se - }); + // Free running clock needs to be set after peripheral enable + if config.free_running_clock { + T::REGS.dcr1().modify(|w| { + w.set_frck(config.free_running_clock); + }); + } Self { _peri: peri, @@ -270,53 +565,341 @@ impl<'d, T: Instance, Dma> Ospi<'d, T, Dma> { dqs, dma, config, + width, } } - pub fn blocking_read(&mut self, transaction: TransferConfig) -> Result<(), ()> { - Ok(()) - } + // Function to configure the peripheral for the requested command + fn configure_command(&mut self, command: &TransferConfig) -> Result<(), OspiError> { + // Check that transaction doesn't use more than hardware initialized pins + if >::into(command.iwidth) > >::into(self.width) + || >::into(command.adwidth) > >::into(self.width) + || >::into(command.abwidth) > >::into(self.width) + || >::into(command.dwidth) > >::into(self.width) + { + return Err(OspiError::InvalidCommand); + } - fn configure_command(&mut self, command: &TransferConfig) -> Result<(), ()> { - Ok(()) - } - - /// Poor attempt to read data from memory - pub fn receive(&mut self, buf: &mut [u8], intruction: u8, data_len: usize) -> Result<(), ()> { T::REGS.cr().modify(|w| { - w.set_fmode(vals::FunctionalMode::INDIRECTREAD); + w.set_fmode(0.into()); }); + // Configure alternate bytes + if let Some(ab) = command.alternate_bytes { + T::REGS.abr().write(|v| v.set_alternate(ab)); + T::REGS.ccr().modify(|w| { + w.set_abmode(PhaseMode::from_bits(command.abwidth.into())); + w.set_abdtr(command.abdtr); + w.set_absize(SizeInBits::from_bits(command.absize.into())); + }) + } + + // Configure dummy cycles + T::REGS.tcr().modify(|w| { + w.set_dcyc(command.dummy.into()); + }); + + // Configure data + if let Some(data_length) = command.data_len { + T::REGS.dlr().write(|v| { + v.set_dl((data_length - 1) as u32); + }) + } + + // Configure instruction/address/data modes T::REGS.ccr().modify(|w| { - w.set_imode(vals::PhaseMode::ONELINE); - w.set_admode(vals::PhaseMode::NONE); - w.set_abmode(vals::PhaseMode::NONE); + w.set_imode(PhaseMode::from_bits(command.iwidth.into())); + w.set_idtr(command.idtr); + w.set_isize(SizeInBits::from_bits(command.isize.into())); - w.set_dmode(vals::PhaseMode::ONELINE); + w.set_admode(PhaseMode::from_bits(command.adwidth.into())); + w.set_addtr(command.idtr); + w.set_adsize(SizeInBits::from_bits(command.adsize.into())); + + w.set_dmode(PhaseMode::from_bits(command.dwidth.into())); + w.set_ddtr(command.ddtr); }); - T::REGS.dlr().modify(|w| { - w.set_dl((data_len - 1) as u32); - }); + // Set informationrequired to initiate transaction + if let Some(instruction) = command.instruction { + if let Some(address) = command.address { + T::REGS.ir().write(|v| { + v.set_instruction(instruction); + }); - // set instruction - T::REGS.ir().modify(|w| w.set_instruction(intruction as u32)); + T::REGS.ar().write(|v| { + v.set_address(address); + }); + } else { + // Double check requirements for delay hold and sample shifting + // if let None = command.data_len { + // if self.config.delay_hold_quarter_cycle && command.idtr { + // T::REGS.ccr().modify(|w| { + // w.set_ddtr(true); + // }); + // } + // } - // read bytes - // for idx in 0..data_len { - // while !T::REGS.sr().read().tcf() && !T::REGS.sr().read().ftf() {} - // buf[idx] = unsafe { (T::REGS.dr().as_ptr() as *mut u8).read_volatile() }; - // } - // wait for finish - while !T::REGS.sr().read().tcf() {} - - let fifo_count = T::REGS.sr().read().flevel(); - for idx in 0..(fifo_count as usize) { - buf[idx] = unsafe { (T::REGS.dr().as_ptr() as *mut u8).read_volatile() }; + T::REGS.ir().write(|v| { + v.set_instruction(instruction); + }); + } + } else { + if let Some(address) = command.address { + T::REGS.ar().write(|v| { + v.set_address(address); + }); + } else { + // The only single phase transaction supported is instruction only + return Err(OspiError::InvalidCommand); + } } Ok(()) } + + /// Function used to control or configure the target device without data transfer + pub async fn command(&mut self, command: &TransferConfig) -> Result<(), OspiError> { + // Prevent a transaction from being set with expected data transmission or reception + if let Some(_) = command.data_len { + return Err(OspiError::InvalidCommand); + }; + while T::REGS.sr().read().busy() {} + + // Need additional validation that command configuration doesn't have data set + self.configure_command(command)?; + + // Transaction initiated by setting final configuration, i.e the instruction register + while !T::REGS.sr().read().tcf() {} + T::REGS.fcr().write(|w| { + w.set_ctcf(true); + }); + + Ok(()) + } + + /// Blocking read with byte by byte data transfer + pub fn blocking_read(&mut self, buf: &mut [u8], transaction: TransferConfig) -> Result<(), OspiError> { + // Wait for peripheral to be free + while T::REGS.sr().read().busy() {} + + // Ensure DMA is not enabled for this transaction + T::REGS.cr().modify(|w| { + w.set_dmaen(false); + }); + + self.configure_command(&transaction)?; + + if let Some(len) = transaction.data_len { + let current_address = T::REGS.ar().read().address(); + let current_instruction = T::REGS.ir().read().instruction(); + + // For a indirect read transaction, the transaction begins when the instruction/address is set + T::REGS.cr().modify(|v| v.set_fmode(vals::FunctionalMode::INDIRECTREAD)); + if T::REGS.ccr().read().admode() == vals::PhaseMode::NONE { + T::REGS.ir().write(|v| v.set_instruction(current_instruction)); + } else { + T::REGS.ar().write(|v| v.set_address(current_address)); + } + + for idx in 0..len { + while !T::REGS.sr().read().tcf() && !T::REGS.sr().read().ftf() {} + buf[idx] = unsafe { (T::REGS.dr().as_ptr() as *mut u8).read_volatile() }; + } + } + + while !T::REGS.sr().read().tcf() {} + T::REGS.fcr().write(|v| v.set_ctcf(true)); + + Ok(()) + } + + /// Blocking write with byte by byte data transfer + pub fn blocking_write(&mut self, buf: &[u8], transaction: TransferConfig) -> Result<(), OspiError> { + T::REGS.cr().modify(|w| { + w.set_dmaen(false); + }); + self.configure_command(&transaction)?; + + if let Some(len) = transaction.data_len { + T::REGS + .cr() + .modify(|v| v.set_fmode(vals::FunctionalMode::INDIRECTWRITE)); + + for idx in 0..len { + while !T::REGS.sr().read().ftf() {} + unsafe { (T::REGS.dr().as_ptr() as *mut u8).write_volatile(buf[idx]) }; + } + } + + while !T::REGS.sr().read().tcf() {} + T::REGS.fcr().write(|v| v.set_ctcf(true)); + + Ok(()) + } + + /// Blocking read with DMA transfer + pub fn blocking_read_dma(&mut self, buf: &mut [u8], transaction: TransferConfig) -> Result<(), OspiError> + where + Dma: OctoDma, + { + self.configure_command(&transaction)?; + + let current_address = T::REGS.ar().read().address(); + let current_instruction = T::REGS.ir().read().instruction(); + + // For a indirect read transaction, the transaction begins when the instruction/address is set + T::REGS.cr().modify(|v| v.set_fmode(vals::FunctionalMode::INDIRECTREAD)); + if T::REGS.ccr().read().admode() == vals::PhaseMode::NONE { + T::REGS.ir().write(|v| v.set_instruction(current_instruction)); + } else { + T::REGS.ar().write(|v| v.set_address(current_address)); + } + + let request = self.dma.request(); + let transfer = unsafe { + Transfer::new_read( + &mut self.dma, + request, + T::REGS.dr().as_ptr() as *mut u8, + buf, + Default::default(), + ) + }; + + T::REGS.cr().modify(|w| w.set_dmaen(true)); + + transfer.blocking_wait(); + + finish_dma(T::REGS); + + Ok(()) + } + + /// Blocking write with DMA transfer + pub fn blocking_write_dma(&mut self, buf: &[u8], transaction: TransferConfig) -> Result<(), OspiError> + where + Dma: OctoDma, + { + self.configure_command(&transaction)?; + T::REGS + .cr() + .modify(|v| v.set_fmode(vals::FunctionalMode::INDIRECTWRITE)); + + let request = self.dma.request(); + let transfer = unsafe { + Transfer::new_write( + &mut self.dma, + request, + buf, + T::REGS.dr().as_ptr() as *mut u8, + Default::default(), + ) + }; + + T::REGS.cr().modify(|w| w.set_dmaen(true)); + + transfer.blocking_wait(); + + finish_dma(T::REGS); + + Ok(()) + } + + /// Asynchronous read from external device + pub async fn read(&mut self, buf: &mut [u8], transaction: TransferConfig) -> Result<(), OspiError> + where + Dma: OctoDma, + { + self.configure_command(&transaction)?; + + let current_address = T::REGS.ar().read().address(); + let current_instruction = T::REGS.ir().read().instruction(); + + // For a indirect read transaction, the transaction begins when the instruction/address is set + T::REGS.cr().modify(|v| v.set_fmode(vals::FunctionalMode::INDIRECTREAD)); + if T::REGS.ccr().read().admode() == vals::PhaseMode::NONE { + T::REGS.ir().write(|v| v.set_instruction(current_instruction)); + } else { + T::REGS.ar().write(|v| v.set_address(current_address)); + } + + let request = self.dma.request(); + let transfer = unsafe { + Transfer::new_read( + &mut self.dma, + request, + T::REGS.dr().as_ptr() as *mut u8, + buf, + Default::default(), + ) + }; + + T::REGS.cr().modify(|w| w.set_dmaen(true)); + + transfer.await; + + finish_dma(T::REGS); + + Ok(()) + } + + /// Asynchronous write to external device + pub async fn write(&mut self, buf: &[u8], transaction: TransferConfig) -> Result<(), OspiError> + where + Dma: OctoDma, + { + self.configure_command(&transaction)?; + T::REGS + .cr() + .modify(|v| v.set_fmode(vals::FunctionalMode::INDIRECTWRITE)); + + let request = self.dma.request(); + let transfer = unsafe { + Transfer::new_write( + &mut self.dma, + request, + buf, + T::REGS.dr().as_ptr() as *mut u8, + Default::default(), + ) + }; + + T::REGS.cr().modify(|w| w.set_dmaen(true)); + + transfer.await; + + finish_dma(T::REGS); + + Ok(()) + } +} + +impl<'d, T: Instance, Dma> Drop for Ospi<'d, T, Dma> { + fn drop(&mut self) { + self.sck.as_ref().map(|x| x.set_as_disconnected()); + self.d0.as_ref().map(|x| x.set_as_disconnected()); + self.d1.as_ref().map(|x| x.set_as_disconnected()); + self.d2.as_ref().map(|x| x.set_as_disconnected()); + self.d3.as_ref().map(|x| x.set_as_disconnected()); + self.d4.as_ref().map(|x| x.set_as_disconnected()); + self.d5.as_ref().map(|x| x.set_as_disconnected()); + self.d6.as_ref().map(|x| x.set_as_disconnected()); + self.d7.as_ref().map(|x| x.set_as_disconnected()); + self.nss.as_ref().map(|x| x.set_as_disconnected()); + self.dqs.as_ref().map(|x| x.set_as_disconnected()); + + T::disable(); + } +} + +fn finish_dma(regs: Regs) { + while !regs.sr().read().tcf() {} + regs.fcr().write(|v| v.set_ctcf(true)); + + regs.cr().modify(|w| { + w.set_dmaen(false); + }); } pub(crate) mod sealed { @@ -342,7 +925,6 @@ pin_trait!(D6Pin, Instance); pin_trait!(D7Pin, Instance); pin_trait!(DQSPin, Instance); pin_trait!(NSSPin, Instance); - dma_trait!(OctoDma, Instance); foreach_peripheral!( From e163572bec221f3367f96ec720d45bc22b985efe Mon Sep 17 00:00:00 2001 From: Karun Date: Thu, 7 Mar 2024 12:04:26 -0500 Subject: [PATCH 009/581] Add get and set config trait implementations --- embassy-stm32/src/ospi/mod.rs | 107 +++++++++++++++++++++++++++++++++- 1 file changed, 106 insertions(+), 1 deletion(-) diff --git a/embassy-stm32/src/ospi/mod.rs b/embassy-stm32/src/ospi/mod.rs index 48b1ef789..8fb5f06e4 100644 --- a/embassy-stm32/src/ospi/mod.rs +++ b/embassy-stm32/src/ospi/mod.rs @@ -8,7 +8,7 @@ pub mod enums; use core::ops::Add; use core::ptr; -use embassy_embedded_hal::SetConfig; +use embassy_embedded_hal::{GetConfig, SetConfig}; use embassy_futures::join::join; use embassy_hal_internal::{into_ref, PeripheralRef}; // use embedded_hal_02::spi; @@ -23,6 +23,7 @@ use crate::rcc::RccPeripheral; use crate::{peripherals, Peripheral}; /// OPSI driver config. +#[derive(Clone, Copy)] pub struct Config { /// Fifo threshold used by the peripheral to generate the interrupt indicating data /// or space is available in the FIFO @@ -63,6 +64,7 @@ pub struct Config { /// Enables the refresh feature, chip select is released every refresh + 1 clock cycles pub refresh: u32, } + impl Default for Config { fn default() -> Self { Self { @@ -873,6 +875,83 @@ impl<'d, T: Instance, Dma> Ospi<'d, T, Dma> { Ok(()) } + + /// Set new bus configuration + pub fn set_config(&mut self, config: &Config) -> Result<(), ()> { + // Wait for busy flag to clear + while T::REGS.sr().read().busy() {} + + // Disable DMA channel while configuring the peripheral + T::REGS.cr().modify(|w| { + w.set_dmaen(false); + }); + + // Device configuration + T::REGS.dcr1().modify(|w| { + w.set_devsize(config.device_size.into()); + w.set_mtyp(config.memory_type); + w.set_csht(config.chip_select_high_time.into()); + w.set_dlybyp(config.delay_block_bypass); + w.set_frck(false); + w.set_ckmode(config.clock_mode); + }); + + T::REGS.dcr2().modify(|w| { + w.set_wrapsize(config.wrap_size.into()); + }); + + T::REGS.dcr3().modify(|w| { + w.set_csbound(config.chip_select_boundary); + w.set_maxtran(config.max_transfer); + }); + + T::REGS.dcr4().modify(|w| { + w.set_refresh(config.refresh); + }); + + T::REGS.cr().modify(|w| { + w.set_fthres(vals::Threshold(config.fifo_threshold.into())); + }); + + // Wait for busy flag to clear + while T::REGS.sr().read().busy() {} + + T::REGS.dcr2().modify(|w| { + w.set_prescaler(config.clock_prescaler); + }); + + T::REGS.cr().modify(|w| { + w.set_dmm(config.dual_quad); + }); + + T::REGS.tcr().modify(|w| { + w.set_sshift(match config.sample_shifting { + true => vals::SampleShift::HALFCYCLE, + false => vals::SampleShift::NONE, + }); + w.set_dhqc(config.delay_hold_quarter_cycle); + }); + + // Enable peripheral + T::REGS.cr().modify(|w| { + w.set_en(true); + }); + + // Free running clock needs to be set after peripheral enable + if config.free_running_clock { + T::REGS.dcr1().modify(|w| { + w.set_frck(config.free_running_clock); + }); + } + + self.config = *config; + Ok(()) + } + + /// Get current configuration + pub fn get_config(&self) -> Config { + self.config + } } impl<'d, T: Instance, Dma> Drop for Ospi<'d, T, Dma> { @@ -902,6 +981,17 @@ fn finish_dma(regs: Regs) { }); } +trait RegsExt { + fn dr_ptr(&self) -> *mut W; +} + +impl RegsExt for Regs { + fn dr_ptr(&self) -> *mut W { + let dr = self.dr(); + dr.as_ptr() as *mut W + } +} + pub(crate) mod sealed { use super::*; @@ -936,3 +1026,18 @@ foreach_peripheral!( impl Instance for peripherals::$inst {} }; ); + +impl<'d, T: Instance, Dma> SetConfig for Ospi<'d, T, Dma> { + type Config = Config; + type ConfigError = (); + fn set_config(&mut self, config: &Self::Config) -> Result<(), ()> { + self.set_config(config) + } +} + +impl<'d, T: Instance, Dma> GetConfig for Ospi<'d, T, Dma> { + type Config = Config; + fn get_config(&self) -> Self::Config { + self.get_config() + } +} From 3b1d87050e2a30b598e92979b6f202b67664a29c Mon Sep 17 00:00:00 2001 From: Karun Date: Thu, 7 Mar 2024 12:46:19 -0500 Subject: [PATCH 010/581] Update trait definitions Make operations generic against valid data widths --- embassy-stm32/src/ospi/enums.rs | 27 ++++++++ embassy-stm32/src/ospi/mod.rs | 114 +++++++++++++++++++++----------- 2 files changed, 102 insertions(+), 39 deletions(-) diff --git a/embassy-stm32/src/ospi/enums.rs b/embassy-stm32/src/ospi/enums.rs index e52f1f54d..4021f7ce3 100644 --- a/embassy-stm32/src/ospi/enums.rs +++ b/embassy-stm32/src/ospi/enums.rs @@ -69,6 +69,7 @@ impl Into for FlashSelection { /// Wrap Size #[allow(dead_code)] +#[allow(missing_docs)] #[derive(Copy, Clone)] pub enum WrapSize { None, @@ -90,6 +91,32 @@ impl Into for WrapSize { } } +/// Memory Type +#[allow(missing_docs)] +#[allow(dead_code)] +#[derive(Copy, Clone)] +pub enum MemoryType { + Micron, + Macronix, + Standard, + MacronixRam, + HyperBusMemory, + HyperBusRegister, +} + +impl Into for MemoryType { + fn into(self) -> u8 { + match self { + MemoryType::Micron => 0x00, + MemoryType::Macronix => 0x01, + MemoryType::Standard => 0x02, + MemoryType::MacronixRam => 0x03, + MemoryType::HyperBusMemory => 0x04, + MemoryType::HyperBusRegister => 0x04, + } + } +} + /// Ospi memory size. #[allow(missing_docs)] #[derive(Copy, Clone)] diff --git a/embassy-stm32/src/ospi/mod.rs b/embassy-stm32/src/ospi/mod.rs index 8fb5f06e4..3d458ba79 100644 --- a/embassy-stm32/src/ospi/mod.rs +++ b/embassy-stm32/src/ospi/mod.rs @@ -5,13 +5,9 @@ pub mod enums; -use core::ops::Add; -use core::ptr; - use embassy_embedded_hal::{GetConfig, SetConfig}; -use embassy_futures::join::join; use embassy_hal_internal::{into_ref, PeripheralRef}; -// use embedded_hal_02::spi; +use embedded_hal_1::spi::ErrorKind; pub use enums::*; use stm32_metapac::octospi::vals::{MemType, PhaseMode, SizeInBits}; @@ -32,7 +28,7 @@ pub struct Config { /// increase throughput pub dual_quad: bool, /// Indicates the type of external device connected - pub memory_type: MemType, // Need to add an additional enum to provide this public interface + pub memory_type: MemoryType, // Need to add an additional enum to provide this public interface /// Defines the size of the external device connected to the OSPI corresponding /// to the number of address bits required to access the device pub device_size: MemorySize, @@ -70,7 +66,7 @@ impl Default for Config { Self { fifo_threshold: FIFOThresholdLevel::_16Bytes, // 32 bytes FIFO, half capacity dual_quad: false, - memory_type: MemType::B_STANDARD, + memory_type: MemoryType::Micron, device_size: MemorySize::Other(0), chip_select_high_time: ChipSelectHighTime::_5Cycle, free_running_clock: false, @@ -154,23 +150,17 @@ impl Default for TransferConfig { } } +/// Error used for Octospi implementation +#[derive(Debug)] pub enum OspiError { + /// Peripheral configuration is invalid InvalidConfiguration, + /// Operation configuration is invalid InvalidCommand, } -pub trait Error {} - -pub trait ErrorType { - type Error: Error; -} - -impl ErrorType for &mut T { - type Error = T::Error; -} - /// MultiSpi interface trait -pub trait MultiSpi: ErrorType { +pub trait MultiSpiBus: embedded_hal_1::spi::ErrorType { /// Transaction configuration for specific multispi implementation type Config; @@ -180,11 +170,27 @@ pub trait MultiSpi: ErrorType { /// Read function used to read data from the target device following the supplied transaction /// configuration. - async fn read(&mut self, data: &mut [u8], config: Self::Config) -> Result<(), Self::Error>; + async fn read(&mut self, data: &mut [Word], config: Self::Config) -> Result<(), Self::Error>; /// Write function used to send data to the target device following the supplied transaction /// configuration. - async fn write(&mut self, data: &[u8], config: Self::Config) -> Result<(), Self::Error>; + async fn write(&mut self, data: &[Word], config: Self::Config) -> Result<(), Self::Error>; +} + +impl + ?Sized, Word: Copy + 'static> MultiSpiBus for &mut T { + type Config = T::Config; + #[inline] + async fn command(&mut self, config: Self::Config) -> Result<(), Self::Error> { + T::command(self, config).await + } + + async fn read(&mut self, data: &mut [Word], config: Self::Config) -> Result<(), Self::Error> { + T::read(self, data, config).await + } + + async fn write(&mut self, data: &[Word], config: Self::Config) -> Result<(), Self::Error> { + T::write(self, data, config).await + } } /// OSPI driver. @@ -206,24 +212,28 @@ pub struct Ospi<'d, T: Instance, Dma> { width: OspiWidth, } -impl Error for OspiError {} +impl embedded_hal_1::spi::Error for OspiError { + fn kind(&self) -> ErrorKind { + ErrorKind::Other + } +} -impl<'d, T: Instance, Dma> ErrorType for Ospi<'d, T, Dma> { +impl<'d, T: Instance, Dma> embedded_hal_1::spi::ErrorType for Ospi<'d, T, Dma> { type Error = OspiError; } -impl<'d, T: Instance, Dma: OctoDma> MultiSpi for Ospi<'d, T, Dma> { +impl<'d, T: Instance, Dma: OctoDma, W: Word> MultiSpiBus for Ospi<'d, T, Dma> { type Config = TransferConfig; async fn command(&mut self, config: Self::Config) -> Result<(), Self::Error> { self.command(&config).await } - async fn read(&mut self, data: &mut [u8], config: Self::Config) -> Result<(), Self::Error> { + async fn read(&mut self, data: &mut [W], config: Self::Config) -> Result<(), Self::Error> { self.read(data, config).await } - async fn write(&mut self, data: &[u8], config: Self::Config) -> Result<(), Self::Error> { + async fn write(&mut self, data: &[W], config: Self::Config) -> Result<(), Self::Error> { self.write(data, config).await } } @@ -497,7 +507,7 @@ impl<'d, T: Instance, Dma> Ospi<'d, T, Dma> { // Device configuration T::REGS.dcr1().modify(|w| { w.set_devsize(config.device_size.into()); - w.set_mtyp(config.memory_type); + w.set_mtyp(vals::MemType::from_bits(config.memory_type.into())); w.set_csht(config.chip_select_high_time.into()); w.set_dlybyp(config.delay_block_bypass); w.set_frck(false); @@ -681,7 +691,7 @@ impl<'d, T: Instance, Dma> Ospi<'d, T, Dma> { } /// Blocking read with byte by byte data transfer - pub fn blocking_read(&mut self, buf: &mut [u8], transaction: TransferConfig) -> Result<(), OspiError> { + pub fn blocking_read(&mut self, buf: &mut [W], transaction: TransferConfig) -> Result<(), OspiError> { // Wait for peripheral to be free while T::REGS.sr().read().busy() {} @@ -706,7 +716,7 @@ impl<'d, T: Instance, Dma> Ospi<'d, T, Dma> { for idx in 0..len { while !T::REGS.sr().read().tcf() && !T::REGS.sr().read().ftf() {} - buf[idx] = unsafe { (T::REGS.dr().as_ptr() as *mut u8).read_volatile() }; + buf[idx] = unsafe { (T::REGS.dr().as_ptr() as *mut W).read_volatile() }; } } @@ -717,7 +727,7 @@ impl<'d, T: Instance, Dma> Ospi<'d, T, Dma> { } /// Blocking write with byte by byte data transfer - pub fn blocking_write(&mut self, buf: &[u8], transaction: TransferConfig) -> Result<(), OspiError> { + pub fn blocking_write(&mut self, buf: &[W], transaction: TransferConfig) -> Result<(), OspiError> { T::REGS.cr().modify(|w| { w.set_dmaen(false); }); @@ -730,7 +740,7 @@ impl<'d, T: Instance, Dma> Ospi<'d, T, Dma> { for idx in 0..len { while !T::REGS.sr().read().ftf() {} - unsafe { (T::REGS.dr().as_ptr() as *mut u8).write_volatile(buf[idx]) }; + unsafe { (T::REGS.dr().as_ptr() as *mut W).write_volatile(buf[idx]) }; } } @@ -741,7 +751,7 @@ impl<'d, T: Instance, Dma> Ospi<'d, T, Dma> { } /// Blocking read with DMA transfer - pub fn blocking_read_dma(&mut self, buf: &mut [u8], transaction: TransferConfig) -> Result<(), OspiError> + pub fn blocking_read_dma(&mut self, buf: &mut [W], transaction: TransferConfig) -> Result<(), OspiError> where Dma: OctoDma, { @@ -763,7 +773,7 @@ impl<'d, T: Instance, Dma> Ospi<'d, T, Dma> { Transfer::new_read( &mut self.dma, request, - T::REGS.dr().as_ptr() as *mut u8, + T::REGS.dr().as_ptr() as *mut W, buf, Default::default(), ) @@ -779,7 +789,7 @@ impl<'d, T: Instance, Dma> Ospi<'d, T, Dma> { } /// Blocking write with DMA transfer - pub fn blocking_write_dma(&mut self, buf: &[u8], transaction: TransferConfig) -> Result<(), OspiError> + pub fn blocking_write_dma(&mut self, buf: &[W], transaction: TransferConfig) -> Result<(), OspiError> where Dma: OctoDma, { @@ -794,7 +804,7 @@ impl<'d, T: Instance, Dma> Ospi<'d, T, Dma> { &mut self.dma, request, buf, - T::REGS.dr().as_ptr() as *mut u8, + T::REGS.dr().as_ptr() as *mut W, Default::default(), ) }; @@ -809,7 +819,7 @@ impl<'d, T: Instance, Dma> Ospi<'d, T, Dma> { } /// Asynchronous read from external device - pub async fn read(&mut self, buf: &mut [u8], transaction: TransferConfig) -> Result<(), OspiError> + pub async fn read(&mut self, buf: &mut [W], transaction: TransferConfig) -> Result<(), OspiError> where Dma: OctoDma, { @@ -831,7 +841,7 @@ impl<'d, T: Instance, Dma> Ospi<'d, T, Dma> { Transfer::new_read( &mut self.dma, request, - T::REGS.dr().as_ptr() as *mut u8, + T::REGS.dr().as_ptr() as *mut W, buf, Default::default(), ) @@ -847,7 +857,7 @@ impl<'d, T: Instance, Dma> Ospi<'d, T, Dma> { } /// Asynchronous write to external device - pub async fn write(&mut self, buf: &[u8], transaction: TransferConfig) -> Result<(), OspiError> + pub async fn write(&mut self, buf: &[W], transaction: TransferConfig) -> Result<(), OspiError> where Dma: OctoDma, { @@ -862,7 +872,7 @@ impl<'d, T: Instance, Dma> Ospi<'d, T, Dma> { &mut self.dma, request, buf, - T::REGS.dr().as_ptr() as *mut u8, + T::REGS.dr().as_ptr() as *mut W, Default::default(), ) }; @@ -889,7 +899,7 @@ impl<'d, T: Instance, Dma> Ospi<'d, T, Dma> { // Device configuration T::REGS.dcr1().modify(|w| { w.set_devsize(config.device_size.into()); - w.set_mtyp(config.memory_type); + w.set_mtyp(vals::MemType::from_bits(config.memory_type.into())); w.set_csht(config.chip_select_high_time.into()); w.set_dlybyp(config.delay_block_bypass); w.set_frck(false); @@ -998,6 +1008,10 @@ pub(crate) mod sealed { pub trait Instance { const REGS: Regs; } + + pub trait Word { + const CONFIG: word_impl::Config; + } } /// OSPI instance trait. @@ -1041,3 +1055,25 @@ impl<'d, T: Instance, Dma> GetConfig for Ospi<'d, T, Dma> { self.get_config() } } + +/// Word sizes usable for OSPI. +pub trait Word: word::Word + sealed::Word {} + +macro_rules! impl_word { + ($T:ty, $config:expr) => { + impl sealed::Word for $T { + const CONFIG: Config = $config; + } + impl Word for $T {} + }; +} + +mod word_impl { + use super::*; + + pub type Config = u8; + + impl_word!(u8, 8); + impl_word!(u16, 16); + impl_word!(u32, 32); +} From fda6e3fb8ccae9b92d619fefa01d334177edb12a Mon Sep 17 00:00:00 2001 From: Karun Date: Thu, 7 Mar 2024 15:23:45 -0500 Subject: [PATCH 011/581] Resolve rustfmt issue and unused import errors --- embassy-stm32/build.rs | 1 - embassy-stm32/src/ospi/mod.rs | 6 +++--- 2 files changed, 3 insertions(+), 4 deletions(-) diff --git a/embassy-stm32/build.rs b/embassy-stm32/build.rs index 3a30ba2fd..6217a3309 100644 --- a/embassy-stm32/build.rs +++ b/embassy-stm32/build.rs @@ -1010,7 +1010,6 @@ fn main() { (("octospi", "NCLK"), quote!(crate::ospi::NckPin)), ].into(); - for p in METADATA.peripherals { if let Some(regs) = &p.registers { for pin in p.pins { diff --git a/embassy-stm32/src/ospi/mod.rs b/embassy-stm32/src/ospi/mod.rs index 3d458ba79..794bdd127 100644 --- a/embassy-stm32/src/ospi/mod.rs +++ b/embassy-stm32/src/ospi/mod.rs @@ -9,12 +9,12 @@ use embassy_embedded_hal::{GetConfig, SetConfig}; use embassy_hal_internal::{into_ref, PeripheralRef}; use embedded_hal_1::spi::ErrorKind; pub use enums::*; -use stm32_metapac::octospi::vals::{MemType, PhaseMode, SizeInBits}; +use stm32_metapac::octospi::vals::{PhaseMode, SizeInBits}; -use crate::dma::{slice_ptr_parts, word, Transfer}; +use crate::dma::{word, Transfer}; use crate::gpio::sealed::{AFType, Pin as _}; use crate::gpio::{AnyPin, Pull}; -use crate::pac::octospi::{regs, vals, Octospi as Regs}; +use crate::pac::octospi::{vals, Octospi as Regs}; use crate::rcc::RccPeripheral; use crate::{peripherals, Peripheral}; From cf065d439efed2141aaf09454beb445e80dc7539 Mon Sep 17 00:00:00 2001 From: eZio Pan Date: Tue, 12 Mar 2024 00:54:26 +0800 Subject: [PATCH 012/581] stm32 CORDIC: ZeroOverhead q1.31 1 arg 1 res mode --- embassy-stm32/src/cordic.rs | 460 ++++++++++++++++++++++++++++++++++++ embassy-stm32/src/lib.rs | 2 + 2 files changed, 462 insertions(+) create mode 100644 embassy-stm32/src/cordic.rs diff --git a/embassy-stm32/src/cordic.rs b/embassy-stm32/src/cordic.rs new file mode 100644 index 000000000..952ee187a --- /dev/null +++ b/embassy-stm32/src/cordic.rs @@ -0,0 +1,460 @@ +//! CORDIC co-processor + +use crate::peripherals; +use embassy_hal_internal::{into_ref, Peripheral, PeripheralRef}; + +pub use enums::*; + +mod enums { + /// CORDIC function + #[allow(missing_docs)] + #[derive(Clone, Copy)] + pub enum Function { + Cos = 0, + Sin, + Phase, + Modulus, + Arctan, + Cosh, + Sinh, + Arctanh, + Ln, + Sqrt, + } + + /// CORDIC precision + #[allow(missing_docs)] + #[derive(Clone, Copy)] + pub enum Precision { + Iters4 = 1, + Iters8, + Iters12, + Iters16, + Iters20, + Iters24, + Iters28, + Iters32, + Iters36, + Iters40, + Iters44, + Iters48, + Iters52, + Iters56, + Iters60, + } + + /// CORDIC scale + #[allow(non_camel_case_types)] + #[allow(missing_docs)] + #[derive(Clone, Copy, Default)] + pub enum Scale { + #[default] + A1_R1 = 0, + A1o2_R2, + A1o4_R4, + A1o8_R8, + A1o16_R16, + A1o32_R32, + A1o64_R64, + A1o128_R128, + } + + /// CORDIC argument/result count + #[allow(missing_docs)] + #[derive(Clone, Copy, Default)] + pub enum Count { + #[default] + One, + Two, + } + + /// CORDIC argument/result data width + #[allow(missing_docs)] + #[derive(Clone, Copy)] + pub enum Width { + Bits32, + Bits16, + } + + /// Cordic driver running mode + #[derive(Clone, Copy)] + pub enum Mode { + /// After caculation start, a read to RDATA register will block AHB until the caculation finished + ZeroOverhead, + + /// Use CORDIC interrupt to trigger a read result value + Interrupt, + + /// Use DMA to write/read value + Dma, + } +} + +/// Low-level CORDIC access. +#[cfg(feature = "unstable-pac")] +pub mod low_level { + pub use super::sealed::*; +} + +pub(crate) mod sealed { + use super::*; + use crate::pac::cordic::vals; + + /// Cordic instance + pub trait Instance { + /// Get access to CORDIC registers + fn regs() -> crate::pac::cordic::Cordic; + + /// Set Function value + fn set_func(&self, func: Function) { + Self::regs() + .csr() + .modify(|v| v.set_func(vals::Func::from_bits(func as u8))); + } + + /// Set Precision value + fn set_precision(&self, precision: Precision) { + Self::regs() + .csr() + .modify(|v| v.set_precision(vals::Precision::from_bits(precision as u8))) + } + + /// Set Scale value + fn set_scale(&self, scale: Scale) { + Self::regs() + .csr() + .modify(|v| v.set_scale(vals::Scale::from_bits(scale as u8))) + } + + /// Enable global interrupt + fn enable_irq(&self) { + Self::regs().csr().modify(|v| v.set_ien(true)) + } + + /// Disable global interrupt + fn disable_irq(&self) { + Self::regs().csr().modify(|v| v.set_ien(false)) + } + + /// Enable Read DMA + fn enable_read_dma(&self) { + Self::regs().csr().modify(|v| { + v.set_dmaren(true); + }) + } + + /// Disable Read DMA + fn disable_read_dma(&self) { + Self::regs().csr().modify(|v| { + v.set_dmaren(false); + }) + } + + /// Enable Write DMA + fn enable_write_dma(&self) { + Self::regs().csr().modify(|v| { + v.set_dmawen(true); + }) + } + + /// Disable Write DMA + fn disable_write_dma(&self) { + Self::regs().csr().modify(|v| { + v.set_dmawen(false); + }) + } + + /// Set NARGS value + fn set_argument_count(&self, n: Count) { + Self::regs().csr().modify(|v| { + v.set_nargs(match n { + Count::One => vals::Num::NUM1, + Count::Two => vals::Num::NUM2, + }) + }) + } + + /// Set NRES value + fn set_result_count(&self, n: Count) { + Self::regs().csr().modify(|v| { + v.set_nres(match n { + Count::One => vals::Num::NUM1, + Count::Two => vals::Num::NUM2, + }); + }) + } + + /// Set ARGSIZE and RESSIZE value + fn set_data_width(&self, arg: Width, res: Width) { + Self::regs().csr().modify(|v| { + v.set_argsize(match arg { + Width::Bits32 => vals::Size::BITS32, + Width::Bits16 => vals::Size::BITS16, + }); + v.set_ressize(match res { + Width::Bits32 => vals::Size::BITS32, + Width::Bits16 => vals::Size::BITS16, + }) + }) + } + + /// Read RRDY flag + fn ready_to_read(&self) -> bool { + Self::regs().csr().read().rrdy() + } + + /// Write value to WDATA + fn write_argument(&self, arg: u32) { + Self::regs().wdata().write_value(arg) + } + + /// Read value from RDATA + fn read_result(&self) -> u32 { + Self::regs().rdata().read() + } + } +} + +/// CORDIC driver +pub struct Cordic<'d, T: Instance> { + cordic: PeripheralRef<'d, T>, + config: Config, + //state: State, +} + +/// CORDIC instance trait +pub trait Instance: sealed::Instance + Peripheral

+ crate::rcc::RccPeripheral {} + +/// CORDIC configuration +pub struct Config { + function: Function, + precision: Precision, + scale: Scale, + mode: Mode, + first_result: bool, +} + +// CORDIC running state +//struct State { +// input_buf: [u32; 8], +// buf_len: usize, +//} + +impl Config { + /// Create a config for Cordic driver + pub fn new(function: Function, precision: Precision, scale: Option, mode: Mode, first_result: bool) -> Self { + Self { + function, + precision, + scale: scale.unwrap_or_default(), + mode, + first_result, + } + } + + fn check_scale(&self) -> bool { + let scale_raw = self.scale as u8; + + match self.function { + Function::Cos | Function::Sin | Function::Phase | Function::Modulus => 0 == scale_raw, + Function::Arctan => (0..=7).contains(&scale_raw), + Function::Cosh | Function::Sinh | Function::Arctanh => 1 == scale_raw, + Function::Ln => (1..=4).contains(&scale_raw), + Function::Sqrt => (0..=2).contains(&scale_raw), + } + } +} + +impl<'d, T: Instance> Cordic<'d, T> { + /// Create a Cordic driver instance + /// + /// Note: + /// If you need a periperhal -> CORDIC -> peripehral mode, + /// you may want to set Cordic into [Mode::ZeroOverhead] mode, and add extra arguemnts with [Self::extra_config] + pub fn new(cordic: impl Peripheral

+ 'd, config: Config) -> Self { + T::enable_and_reset(); + + into_ref!(cordic); + + if !config.check_scale() { + panic!("Scale value is not compatible with Function") + } + + let mut instance = Self { + cordic, + config, + // state: State { + // input_buf: [0u32; 8], + // buf_len: 0, + // }, + }; + + instance.reconfigure(); + + instance + } + + /// Set a new config for Cordic driver + pub fn set_config(&mut self, config: Config) { + self.config = config; + self.reconfigure(); + } + + /// Set extra config for data count and data width. + pub fn extra_config(&mut self, arg_cnt: Count, arg_width: Width, res_width: Width) { + let peri = &self.cordic; + peri.set_argument_count(arg_cnt); + peri.set_data_width(arg_width, res_width); + } + + fn reconfigure(&mut self) { + let peri = &self.cordic; + let config = &self.config; + + if peri.ready_to_read() { + warn!("At least 1 result hasn't been read, reconfigure will cause DATA LOST"); + }; + + peri.disable_irq(); + peri.disable_write_dma(); + peri.disable_read_dma(); + + // clean RRDY flag + while peri.ready_to_read() { + peri.read_result(); + } + + peri.set_func(config.function); + peri.set_precision(config.precision); + peri.set_scale(config.scale); + if config.first_result { + peri.set_result_count(Count::One) + } else { + peri.set_result_count(Count::Two) + } + + match config.mode { + Mode::ZeroOverhead => (), + Mode::Interrupt => { + peri.enable_irq(); + } + Mode::Dma => { + peri.enable_write_dma(); + peri.enable_read_dma(); + } + } + + //self.state.input_buf.fill(0u32); + } + + /// Run a CORDIC calculation + pub fn calc_32bit(&mut self, arg1s: &[f64], arg2s: Option<&[f64]>, output: &mut [f64]) -> usize { + match self.config.mode { + Mode::ZeroOverhead => { + if arg2s.is_none() { + self.cordic.set_argument_count(Count::One); + + self.cordic.set_result_count(if self.config.first_result { + if output.len() < arg1s.len() { + panic!("Output buf length is not long enough") + } + Count::One + } else { + if output.len() < 2 * arg1s.len() { + panic!("Output buf length is not long enough") + } + Count::Two + }); + + let mut cnt = 0; + + for &arg in arg1s.iter() { + self.cordic.write_argument(f64_to_q1_31(arg)); + output[cnt] = q1_31_to_f64(self.cordic.read_result()); + cnt += 1; + } + + cnt + } else { + todo!() + } + } + Mode::Interrupt => todo!(), + Mode::Dma => todo!(), + } + } +} + +impl<'d, T: Instance> Drop for Cordic<'d, T> { + fn drop(&mut self) { + T::disable(); + } +} + +foreach_interrupt!( + ($inst:ident, cordic, CORDIC, GLOBAL, $irq:ident) => { + impl Instance for peripherals::$inst { + } + + impl sealed::Instance for peripherals::$inst { + fn regs() -> crate::pac::cordic::Cordic { + crate::pac::$inst + } + } + }; +); + +macro_rules! floating_fixed_convert { + ($f_to_q:ident, $q_to_f:ident, $unsigned_bin_typ:ty, $signed_bin_typ:ty, $float_ty:ty, $offset:literal, $min_positive:literal) => { + /// convert float point to fixed point format + pub fn $f_to_q(value: $float_ty) -> $unsigned_bin_typ { + const MIN_POSITIVE: $float_ty = unsafe { core::mem::transmute($min_positive) }; + + assert!( + (-1.0 as $float_ty) <= value, + "input value {} should be equal or greater than -1", + value + ); + + let value = if value == 1.0 as $float_ty{ + (1.0 as $float_ty) - MIN_POSITIVE + } else { + assert!( + value <= (1.0 as $float_ty) - MIN_POSITIVE, + "input value {} should be equal or less than 1-2^(-{})", + value, $offset + ); + value + }; + + (value * ((1 as $unsigned_bin_typ << $offset) as $float_ty)) as $unsigned_bin_typ + } + + #[inline(always)] + /// convert fixed point to float point format + pub fn $q_to_f(value: $unsigned_bin_typ) -> $float_ty { + // It's needed to convert from unsigned to signed first, for correct result. + -(value as $signed_bin_typ as $float_ty) / ((1 as $unsigned_bin_typ << $offset) as $float_ty) + } + }; +} + +floating_fixed_convert!( + f64_to_q1_31, + q1_31_to_f64, + u32, + i32, + f64, + 31, + 0x3E00_0000_0000_0000u64 // binary form of 1f64^(-31) +); + +floating_fixed_convert!( + f32_to_q1_15, + q1_15_to_f32, + u16, + i16, + f32, + 15, + 0x3800_0000u32 // binary form of 1f32^(-15) +); diff --git a/embassy-stm32/src/lib.rs b/embassy-stm32/src/lib.rs index 6a3d1c463..ae2e95435 100644 --- a/embassy-stm32/src/lib.rs +++ b/embassy-stm32/src/lib.rs @@ -32,6 +32,8 @@ pub mod timer; pub mod adc; #[cfg(can)] pub mod can; +#[cfg(cordic)] +pub mod cordic; #[cfg(crc)] pub mod crc; #[cfg(cryp)] From b595d942442a8b267e1311bcadedc8558183aa61 Mon Sep 17 00:00:00 2001 From: eZio Pan Date: Fri, 15 Mar 2024 15:12:51 +0800 Subject: [PATCH 013/581] stm32 CORDIC: split into multiple files --- embassy-stm32/src/cordic.rs | 460 ----------------------------- embassy-stm32/src/cordic/enums.rs | 82 +++++ embassy-stm32/src/cordic/mod.rs | 206 +++++++++++++ embassy-stm32/src/cordic/sealed.rs | 116 ++++++++ embassy-stm32/src/cordic/utils.rs | 59 ++++ 5 files changed, 463 insertions(+), 460 deletions(-) delete mode 100644 embassy-stm32/src/cordic.rs create mode 100644 embassy-stm32/src/cordic/enums.rs create mode 100644 embassy-stm32/src/cordic/mod.rs create mode 100644 embassy-stm32/src/cordic/sealed.rs create mode 100644 embassy-stm32/src/cordic/utils.rs diff --git a/embassy-stm32/src/cordic.rs b/embassy-stm32/src/cordic.rs deleted file mode 100644 index 952ee187a..000000000 --- a/embassy-stm32/src/cordic.rs +++ /dev/null @@ -1,460 +0,0 @@ -//! CORDIC co-processor - -use crate::peripherals; -use embassy_hal_internal::{into_ref, Peripheral, PeripheralRef}; - -pub use enums::*; - -mod enums { - /// CORDIC function - #[allow(missing_docs)] - #[derive(Clone, Copy)] - pub enum Function { - Cos = 0, - Sin, - Phase, - Modulus, - Arctan, - Cosh, - Sinh, - Arctanh, - Ln, - Sqrt, - } - - /// CORDIC precision - #[allow(missing_docs)] - #[derive(Clone, Copy)] - pub enum Precision { - Iters4 = 1, - Iters8, - Iters12, - Iters16, - Iters20, - Iters24, - Iters28, - Iters32, - Iters36, - Iters40, - Iters44, - Iters48, - Iters52, - Iters56, - Iters60, - } - - /// CORDIC scale - #[allow(non_camel_case_types)] - #[allow(missing_docs)] - #[derive(Clone, Copy, Default)] - pub enum Scale { - #[default] - A1_R1 = 0, - A1o2_R2, - A1o4_R4, - A1o8_R8, - A1o16_R16, - A1o32_R32, - A1o64_R64, - A1o128_R128, - } - - /// CORDIC argument/result count - #[allow(missing_docs)] - #[derive(Clone, Copy, Default)] - pub enum Count { - #[default] - One, - Two, - } - - /// CORDIC argument/result data width - #[allow(missing_docs)] - #[derive(Clone, Copy)] - pub enum Width { - Bits32, - Bits16, - } - - /// Cordic driver running mode - #[derive(Clone, Copy)] - pub enum Mode { - /// After caculation start, a read to RDATA register will block AHB until the caculation finished - ZeroOverhead, - - /// Use CORDIC interrupt to trigger a read result value - Interrupt, - - /// Use DMA to write/read value - Dma, - } -} - -/// Low-level CORDIC access. -#[cfg(feature = "unstable-pac")] -pub mod low_level { - pub use super::sealed::*; -} - -pub(crate) mod sealed { - use super::*; - use crate::pac::cordic::vals; - - /// Cordic instance - pub trait Instance { - /// Get access to CORDIC registers - fn regs() -> crate::pac::cordic::Cordic; - - /// Set Function value - fn set_func(&self, func: Function) { - Self::regs() - .csr() - .modify(|v| v.set_func(vals::Func::from_bits(func as u8))); - } - - /// Set Precision value - fn set_precision(&self, precision: Precision) { - Self::regs() - .csr() - .modify(|v| v.set_precision(vals::Precision::from_bits(precision as u8))) - } - - /// Set Scale value - fn set_scale(&self, scale: Scale) { - Self::regs() - .csr() - .modify(|v| v.set_scale(vals::Scale::from_bits(scale as u8))) - } - - /// Enable global interrupt - fn enable_irq(&self) { - Self::regs().csr().modify(|v| v.set_ien(true)) - } - - /// Disable global interrupt - fn disable_irq(&self) { - Self::regs().csr().modify(|v| v.set_ien(false)) - } - - /// Enable Read DMA - fn enable_read_dma(&self) { - Self::regs().csr().modify(|v| { - v.set_dmaren(true); - }) - } - - /// Disable Read DMA - fn disable_read_dma(&self) { - Self::regs().csr().modify(|v| { - v.set_dmaren(false); - }) - } - - /// Enable Write DMA - fn enable_write_dma(&self) { - Self::regs().csr().modify(|v| { - v.set_dmawen(true); - }) - } - - /// Disable Write DMA - fn disable_write_dma(&self) { - Self::regs().csr().modify(|v| { - v.set_dmawen(false); - }) - } - - /// Set NARGS value - fn set_argument_count(&self, n: Count) { - Self::regs().csr().modify(|v| { - v.set_nargs(match n { - Count::One => vals::Num::NUM1, - Count::Two => vals::Num::NUM2, - }) - }) - } - - /// Set NRES value - fn set_result_count(&self, n: Count) { - Self::regs().csr().modify(|v| { - v.set_nres(match n { - Count::One => vals::Num::NUM1, - Count::Two => vals::Num::NUM2, - }); - }) - } - - /// Set ARGSIZE and RESSIZE value - fn set_data_width(&self, arg: Width, res: Width) { - Self::regs().csr().modify(|v| { - v.set_argsize(match arg { - Width::Bits32 => vals::Size::BITS32, - Width::Bits16 => vals::Size::BITS16, - }); - v.set_ressize(match res { - Width::Bits32 => vals::Size::BITS32, - Width::Bits16 => vals::Size::BITS16, - }) - }) - } - - /// Read RRDY flag - fn ready_to_read(&self) -> bool { - Self::regs().csr().read().rrdy() - } - - /// Write value to WDATA - fn write_argument(&self, arg: u32) { - Self::regs().wdata().write_value(arg) - } - - /// Read value from RDATA - fn read_result(&self) -> u32 { - Self::regs().rdata().read() - } - } -} - -/// CORDIC driver -pub struct Cordic<'d, T: Instance> { - cordic: PeripheralRef<'d, T>, - config: Config, - //state: State, -} - -/// CORDIC instance trait -pub trait Instance: sealed::Instance + Peripheral

+ crate::rcc::RccPeripheral {} - -/// CORDIC configuration -pub struct Config { - function: Function, - precision: Precision, - scale: Scale, - mode: Mode, - first_result: bool, -} - -// CORDIC running state -//struct State { -// input_buf: [u32; 8], -// buf_len: usize, -//} - -impl Config { - /// Create a config for Cordic driver - pub fn new(function: Function, precision: Precision, scale: Option, mode: Mode, first_result: bool) -> Self { - Self { - function, - precision, - scale: scale.unwrap_or_default(), - mode, - first_result, - } - } - - fn check_scale(&self) -> bool { - let scale_raw = self.scale as u8; - - match self.function { - Function::Cos | Function::Sin | Function::Phase | Function::Modulus => 0 == scale_raw, - Function::Arctan => (0..=7).contains(&scale_raw), - Function::Cosh | Function::Sinh | Function::Arctanh => 1 == scale_raw, - Function::Ln => (1..=4).contains(&scale_raw), - Function::Sqrt => (0..=2).contains(&scale_raw), - } - } -} - -impl<'d, T: Instance> Cordic<'d, T> { - /// Create a Cordic driver instance - /// - /// Note: - /// If you need a periperhal -> CORDIC -> peripehral mode, - /// you may want to set Cordic into [Mode::ZeroOverhead] mode, and add extra arguemnts with [Self::extra_config] - pub fn new(cordic: impl Peripheral

+ 'd, config: Config) -> Self { - T::enable_and_reset(); - - into_ref!(cordic); - - if !config.check_scale() { - panic!("Scale value is not compatible with Function") - } - - let mut instance = Self { - cordic, - config, - // state: State { - // input_buf: [0u32; 8], - // buf_len: 0, - // }, - }; - - instance.reconfigure(); - - instance - } - - /// Set a new config for Cordic driver - pub fn set_config(&mut self, config: Config) { - self.config = config; - self.reconfigure(); - } - - /// Set extra config for data count and data width. - pub fn extra_config(&mut self, arg_cnt: Count, arg_width: Width, res_width: Width) { - let peri = &self.cordic; - peri.set_argument_count(arg_cnt); - peri.set_data_width(arg_width, res_width); - } - - fn reconfigure(&mut self) { - let peri = &self.cordic; - let config = &self.config; - - if peri.ready_to_read() { - warn!("At least 1 result hasn't been read, reconfigure will cause DATA LOST"); - }; - - peri.disable_irq(); - peri.disable_write_dma(); - peri.disable_read_dma(); - - // clean RRDY flag - while peri.ready_to_read() { - peri.read_result(); - } - - peri.set_func(config.function); - peri.set_precision(config.precision); - peri.set_scale(config.scale); - if config.first_result { - peri.set_result_count(Count::One) - } else { - peri.set_result_count(Count::Two) - } - - match config.mode { - Mode::ZeroOverhead => (), - Mode::Interrupt => { - peri.enable_irq(); - } - Mode::Dma => { - peri.enable_write_dma(); - peri.enable_read_dma(); - } - } - - //self.state.input_buf.fill(0u32); - } - - /// Run a CORDIC calculation - pub fn calc_32bit(&mut self, arg1s: &[f64], arg2s: Option<&[f64]>, output: &mut [f64]) -> usize { - match self.config.mode { - Mode::ZeroOverhead => { - if arg2s.is_none() { - self.cordic.set_argument_count(Count::One); - - self.cordic.set_result_count(if self.config.first_result { - if output.len() < arg1s.len() { - panic!("Output buf length is not long enough") - } - Count::One - } else { - if output.len() < 2 * arg1s.len() { - panic!("Output buf length is not long enough") - } - Count::Two - }); - - let mut cnt = 0; - - for &arg in arg1s.iter() { - self.cordic.write_argument(f64_to_q1_31(arg)); - output[cnt] = q1_31_to_f64(self.cordic.read_result()); - cnt += 1; - } - - cnt - } else { - todo!() - } - } - Mode::Interrupt => todo!(), - Mode::Dma => todo!(), - } - } -} - -impl<'d, T: Instance> Drop for Cordic<'d, T> { - fn drop(&mut self) { - T::disable(); - } -} - -foreach_interrupt!( - ($inst:ident, cordic, CORDIC, GLOBAL, $irq:ident) => { - impl Instance for peripherals::$inst { - } - - impl sealed::Instance for peripherals::$inst { - fn regs() -> crate::pac::cordic::Cordic { - crate::pac::$inst - } - } - }; -); - -macro_rules! floating_fixed_convert { - ($f_to_q:ident, $q_to_f:ident, $unsigned_bin_typ:ty, $signed_bin_typ:ty, $float_ty:ty, $offset:literal, $min_positive:literal) => { - /// convert float point to fixed point format - pub fn $f_to_q(value: $float_ty) -> $unsigned_bin_typ { - const MIN_POSITIVE: $float_ty = unsafe { core::mem::transmute($min_positive) }; - - assert!( - (-1.0 as $float_ty) <= value, - "input value {} should be equal or greater than -1", - value - ); - - let value = if value == 1.0 as $float_ty{ - (1.0 as $float_ty) - MIN_POSITIVE - } else { - assert!( - value <= (1.0 as $float_ty) - MIN_POSITIVE, - "input value {} should be equal or less than 1-2^(-{})", - value, $offset - ); - value - }; - - (value * ((1 as $unsigned_bin_typ << $offset) as $float_ty)) as $unsigned_bin_typ - } - - #[inline(always)] - /// convert fixed point to float point format - pub fn $q_to_f(value: $unsigned_bin_typ) -> $float_ty { - // It's needed to convert from unsigned to signed first, for correct result. - -(value as $signed_bin_typ as $float_ty) / ((1 as $unsigned_bin_typ << $offset) as $float_ty) - } - }; -} - -floating_fixed_convert!( - f64_to_q1_31, - q1_31_to_f64, - u32, - i32, - f64, - 31, - 0x3E00_0000_0000_0000u64 // binary form of 1f64^(-31) -); - -floating_fixed_convert!( - f32_to_q1_15, - q1_15_to_f32, - u16, - i16, - f32, - 15, - 0x3800_0000u32 // binary form of 1f32^(-15) -); diff --git a/embassy-stm32/src/cordic/enums.rs b/embassy-stm32/src/cordic/enums.rs new file mode 100644 index 000000000..4697a1df1 --- /dev/null +++ b/embassy-stm32/src/cordic/enums.rs @@ -0,0 +1,82 @@ +/// CORDIC function +#[allow(missing_docs)] +#[derive(Clone, Copy)] +pub enum Function { + Cos = 0, + Sin, + Phase, + Modulus, + Arctan, + Cosh, + Sinh, + Arctanh, + Ln, + Sqrt, +} + +/// CORDIC precision +#[allow(missing_docs)] +#[derive(Clone, Copy)] +pub enum Precision { + Iters4 = 1, + Iters8, + Iters12, + Iters16, + Iters20, + Iters24, + Iters28, + Iters32, + Iters36, + Iters40, + Iters44, + Iters48, + Iters52, + Iters56, + Iters60, +} + +/// CORDIC scale +#[allow(non_camel_case_types)] +#[allow(missing_docs)] +#[derive(Clone, Copy, Default)] +pub enum Scale { + #[default] + A1_R1 = 0, + A1o2_R2, + A1o4_R4, + A1o8_R8, + A1o16_R16, + A1o32_R32, + A1o64_R64, + A1o128_R128, +} + +/// CORDIC argument/result count +#[allow(missing_docs)] +#[derive(Clone, Copy, Default)] +pub enum Count { + #[default] + One, + Two, +} + +/// CORDIC argument/result data width +#[allow(missing_docs)] +#[derive(Clone, Copy)] +pub enum Width { + Bits32, + Bits16, +} + +/// Cordic driver running mode +#[derive(Clone, Copy)] +pub enum Mode { + /// After caculation start, a read to RDATA register will block AHB until the caculation finished + ZeroOverhead, + + /// Use CORDIC interrupt to trigger a read result value + Interrupt, + + /// Use DMA to write/read value + Dma, +} diff --git a/embassy-stm32/src/cordic/mod.rs b/embassy-stm32/src/cordic/mod.rs new file mode 100644 index 000000000..c0a69b757 --- /dev/null +++ b/embassy-stm32/src/cordic/mod.rs @@ -0,0 +1,206 @@ +//! CORDIC co-processor + +use crate::peripherals; +use embassy_hal_internal::{into_ref, Peripheral, PeripheralRef}; + +mod enums; +pub use enums::*; + +pub mod utils; + +pub(crate) mod sealed; + +/// Low-level CORDIC access. +#[cfg(feature = "unstable-pac")] +pub mod low_level { + pub use super::sealed::*; +} + +/// CORDIC driver +pub struct Cordic<'d, T: Instance> { + cordic: PeripheralRef<'d, T>, + config: Config, + //state: State, +} + +/// CORDIC instance trait +pub trait Instance: sealed::Instance + Peripheral

+ crate::rcc::RccPeripheral {} + +/// CORDIC configuration +pub struct Config { + function: Function, + precision: Precision, + scale: Scale, + mode: Mode, + first_result: bool, +} + +// CORDIC running state +//struct State { +// input_buf: [u32; 8], +// buf_len: usize, +//} + +impl Config { + /// Create a config for Cordic driver + pub fn new(function: Function, precision: Precision, scale: Option, mode: Mode, first_result: bool) -> Self { + Self { + function, + precision, + scale: scale.unwrap_or_default(), + mode, + first_result, + } + } + + fn check_scale(&self) -> bool { + let scale_raw = self.scale as u8; + + match self.function { + Function::Cos | Function::Sin | Function::Phase | Function::Modulus => 0 == scale_raw, + Function::Arctan => (0..=7).contains(&scale_raw), + Function::Cosh | Function::Sinh | Function::Arctanh => 1 == scale_raw, + Function::Ln => (1..=4).contains(&scale_raw), + Function::Sqrt => (0..=2).contains(&scale_raw), + } + } +} + +impl<'d, T: Instance> Cordic<'d, T> { + /// Create a Cordic driver instance + /// + /// Note: + /// If you need a periperhal -> CORDIC -> peripehral mode, + /// you may want to set Cordic into [Mode::ZeroOverhead] mode, and add extra arguemnts with [Self::extra_config] + pub fn new(cordic: impl Peripheral

+ 'd, config: Config) -> Self { + T::enable_and_reset(); + + into_ref!(cordic); + + if !config.check_scale() { + panic!("Scale value is not compatible with Function") + } + + let mut instance = Self { + cordic, + config, + // state: State { + // input_buf: [0u32; 8], + // buf_len: 0, + // }, + }; + + instance.reconfigure(); + + instance + } + + /// Set a new config for Cordic driver + pub fn set_config(&mut self, config: Config) { + self.config = config; + self.reconfigure(); + } + + /// Set extra config for data count and data width. + pub fn extra_config(&mut self, arg_cnt: Count, arg_width: Width, res_width: Width) { + let peri = &self.cordic; + peri.set_argument_count(arg_cnt); + peri.set_data_width(arg_width, res_width); + } + + fn reconfigure(&mut self) { + let peri = &self.cordic; + let config = &self.config; + + if peri.ready_to_read() { + warn!("At least 1 result hasn't been read, reconfigure will cause DATA LOST"); + }; + + peri.disable_irq(); + peri.disable_write_dma(); + peri.disable_read_dma(); + + // clean RRDY flag + while peri.ready_to_read() { + peri.read_result(); + } + + peri.set_func(config.function); + peri.set_precision(config.precision); + peri.set_scale(config.scale); + if config.first_result { + peri.set_result_count(Count::One) + } else { + peri.set_result_count(Count::Two) + } + + match config.mode { + Mode::ZeroOverhead => (), + Mode::Interrupt => { + peri.enable_irq(); + } + Mode::Dma => { + peri.enable_write_dma(); + peri.enable_read_dma(); + } + } + + //self.state.input_buf.fill(0u32); + } + + /// Run a CORDIC calculation + pub fn calc_32bit(&mut self, arg1s: &[f64], arg2s: Option<&[f64]>, output: &mut [f64]) -> usize { + match self.config.mode { + Mode::ZeroOverhead => { + if arg2s.is_none() { + self.cordic.set_argument_count(Count::One); + + self.cordic.set_result_count(if self.config.first_result { + if output.len() < arg1s.len() { + panic!("Output buf length is not long enough") + } + Count::One + } else { + if output.len() < 2 * arg1s.len() { + panic!("Output buf length is not long enough") + } + Count::Two + }); + + let mut cnt = 0; + + for &arg in arg1s.iter() { + self.cordic.write_argument(utils::f64_to_q1_31(arg)); + output[cnt] = utils::q1_31_to_f64(self.cordic.read_result()); + cnt += 1; + } + + cnt + } else { + todo!() + } + } + Mode::Interrupt => todo!(), + Mode::Dma => todo!(), + } + } +} + +impl<'d, T: Instance> Drop for Cordic<'d, T> { + fn drop(&mut self) { + T::disable(); + } +} + +foreach_interrupt!( + ($inst:ident, cordic, CORDIC, GLOBAL, $irq:ident) => { + impl Instance for peripherals::$inst { + } + + impl sealed::Instance for peripherals::$inst { + fn regs() -> crate::pac::cordic::Cordic { + crate::pac::$inst + } + } + }; +); diff --git a/embassy-stm32/src/cordic/sealed.rs b/embassy-stm32/src/cordic/sealed.rs new file mode 100644 index 000000000..0f00e380c --- /dev/null +++ b/embassy-stm32/src/cordic/sealed.rs @@ -0,0 +1,116 @@ +use super::*; +use crate::pac::cordic::vals; + +/// Cordic instance +pub trait Instance { + /// Get access to CORDIC registers + fn regs() -> crate::pac::cordic::Cordic; + + /// Set Function value + fn set_func(&self, func: Function) { + Self::regs() + .csr() + .modify(|v| v.set_func(vals::Func::from_bits(func as u8))); + } + + /// Set Precision value + fn set_precision(&self, precision: Precision) { + Self::regs() + .csr() + .modify(|v| v.set_precision(vals::Precision::from_bits(precision as u8))) + } + + /// Set Scale value + fn set_scale(&self, scale: Scale) { + Self::regs() + .csr() + .modify(|v| v.set_scale(vals::Scale::from_bits(scale as u8))) + } + + /// Enable global interrupt + fn enable_irq(&self) { + Self::regs().csr().modify(|v| v.set_ien(true)) + } + + /// Disable global interrupt + fn disable_irq(&self) { + Self::regs().csr().modify(|v| v.set_ien(false)) + } + + /// Enable Read DMA + fn enable_read_dma(&self) { + Self::regs().csr().modify(|v| { + v.set_dmaren(true); + }) + } + + /// Disable Read DMA + fn disable_read_dma(&self) { + Self::regs().csr().modify(|v| { + v.set_dmaren(false); + }) + } + + /// Enable Write DMA + fn enable_write_dma(&self) { + Self::regs().csr().modify(|v| { + v.set_dmawen(true); + }) + } + + /// Disable Write DMA + fn disable_write_dma(&self) { + Self::regs().csr().modify(|v| { + v.set_dmawen(false); + }) + } + + /// Set NARGS value + fn set_argument_count(&self, n: Count) { + Self::regs().csr().modify(|v| { + v.set_nargs(match n { + Count::One => vals::Num::NUM1, + Count::Two => vals::Num::NUM2, + }) + }) + } + + /// Set NRES value + fn set_result_count(&self, n: Count) { + Self::regs().csr().modify(|v| { + v.set_nres(match n { + Count::One => vals::Num::NUM1, + Count::Two => vals::Num::NUM2, + }); + }) + } + + /// Set ARGSIZE and RESSIZE value + fn set_data_width(&self, arg: Width, res: Width) { + Self::regs().csr().modify(|v| { + v.set_argsize(match arg { + Width::Bits32 => vals::Size::BITS32, + Width::Bits16 => vals::Size::BITS16, + }); + v.set_ressize(match res { + Width::Bits32 => vals::Size::BITS32, + Width::Bits16 => vals::Size::BITS16, + }) + }) + } + + /// Read RRDY flag + fn ready_to_read(&self) -> bool { + Self::regs().csr().read().rrdy() + } + + /// Write value to WDATA + fn write_argument(&self, arg: u32) { + Self::regs().wdata().write_value(arg) + } + + /// Read value from RDATA + fn read_result(&self) -> u32 { + Self::regs().rdata().read() + } +} diff --git a/embassy-stm32/src/cordic/utils.rs b/embassy-stm32/src/cordic/utils.rs new file mode 100644 index 000000000..3f055c34b --- /dev/null +++ b/embassy-stm32/src/cordic/utils.rs @@ -0,0 +1,59 @@ +//! Common match utils + +macro_rules! floating_fixed_convert { + ($f_to_q:ident, $q_to_f:ident, $unsigned_bin_typ:ty, $signed_bin_typ:ty, $float_ty:ty, $offset:literal, $min_positive:literal) => { + /// convert float point to fixed point format + pub fn $f_to_q(value: $float_ty) -> $unsigned_bin_typ { + const MIN_POSITIVE: $float_ty = unsafe { core::mem::transmute($min_positive) }; + + assert!( + (-1.0 as $float_ty) <= value, + "input value {} should be equal or greater than -1", + value + ); + + + let value = if value == 1.0 as $float_ty{ + // make a exception for user specifing exact 1.0 float point, + // convert 1.0 to max representable value of q1.x format + (1.0 as $float_ty) - MIN_POSITIVE + } else { + assert!( + value <= (1.0 as $float_ty) - MIN_POSITIVE, + "input value {} should be equal or less than 1-2^(-{})", + value, $offset + ); + value + }; + + (value * ((1 as $unsigned_bin_typ << $offset) as $float_ty)) as $unsigned_bin_typ + } + + #[inline(always)] + /// convert fixed point to float point format + pub fn $q_to_f(value: $unsigned_bin_typ) -> $float_ty { + // It's needed to convert from unsigned to signed first, for correct result. + -(value as $signed_bin_typ as $float_ty) / ((1 as $unsigned_bin_typ << $offset) as $float_ty) + } + }; +} + +floating_fixed_convert!( + f64_to_q1_31, + q1_31_to_f64, + u32, + i32, + f64, + 31, + 0x3E00_0000_0000_0000u64 // binary form of 1f64^(-31) +); + +floating_fixed_convert!( + f32_to_q1_15, + q1_15_to_f32, + u16, + i16, + f32, + 15, + 0x3800_0000u32 // binary form of 1f32^(-15) +); From a1ca9088b4e3b4644428eab80e8502a55b2cbe8f Mon Sep 17 00:00:00 2001 From: eZio Pan Date: Fri, 15 Mar 2024 19:34:55 +0800 Subject: [PATCH 014/581] stm32 CORDIC: ZeroOverhead q1.31 mode --- embassy-stm32/src/cordic/enums.rs | 7 +- embassy-stm32/src/cordic/mod.rs | 290 ++++++++++++++++++++++++------ 2 files changed, 241 insertions(+), 56 deletions(-) diff --git a/embassy-stm32/src/cordic/enums.rs b/embassy-stm32/src/cordic/enums.rs index 4697a1df1..3e1c47f7f 100644 --- a/embassy-stm32/src/cordic/enums.rs +++ b/embassy-stm32/src/cordic/enums.rs @@ -16,14 +16,15 @@ pub enum Function { /// CORDIC precision #[allow(missing_docs)] -#[derive(Clone, Copy)] +#[derive(Clone, Copy, Default)] pub enum Precision { Iters4 = 1, Iters8, Iters12, Iters16, Iters20, - Iters24, + #[default] + Iters24, // this value is recomended by Reference Manual Iters28, Iters32, Iters36, @@ -38,7 +39,7 @@ pub enum Precision { /// CORDIC scale #[allow(non_camel_case_types)] #[allow(missing_docs)] -#[derive(Clone, Copy, Default)] +#[derive(Clone, Copy, Default, PartialEq)] pub enum Scale { #[default] A1_R1 = 0, diff --git a/embassy-stm32/src/cordic/mod.rs b/embassy-stm32/src/cordic/mod.rs index c0a69b757..b15521ca6 100644 --- a/embassy-stm32/src/cordic/mod.rs +++ b/embassy-stm32/src/cordic/mod.rs @@ -10,6 +10,10 @@ pub mod utils; pub(crate) mod sealed; +// length of pre-allocated [u32] memory for CORDIC input, +// length should be multiple of 2 +const INPUT_BUF_LEN: usize = 8; + /// Low-level CORDIC access. #[cfg(feature = "unstable-pac")] pub mod low_level { @@ -20,7 +24,7 @@ pub mod low_level { pub struct Cordic<'d, T: Instance> { cordic: PeripheralRef<'d, T>, config: Config, - //state: State, + state: State, } /// CORDIC instance trait @@ -28,27 +32,33 @@ pub trait Instance: sealed::Instance + Peripheral

+ crate::rcc::RccPer /// CORDIC configuration pub struct Config { + mode: Mode, function: Function, precision: Precision, scale: Scale, - mode: Mode, first_result: bool, } // CORDIC running state -//struct State { -// input_buf: [u32; 8], -// buf_len: usize, -//} +struct State { + input_buf: [u32; INPUT_BUF_LEN], + buf_index: usize, +} impl Config { /// Create a config for Cordic driver - pub fn new(function: Function, precision: Precision, scale: Option, mode: Mode, first_result: bool) -> Self { + pub fn new( + mode: Mode, + function: Function, + precision: Option, + scale: Option, + first_result: bool, + ) -> Self { Self { - function, - precision, - scale: scale.unwrap_or_default(), mode, + function, + precision: precision.unwrap_or_default(), + scale: scale.unwrap_or_default(), first_result, } } @@ -66,6 +76,7 @@ impl Config { } } +// common method impl<'d, T: Instance> Cordic<'d, T> { /// Create a Cordic driver instance /// @@ -84,10 +95,10 @@ impl<'d, T: Instance> Cordic<'d, T> { let mut instance = Self { cordic, config, - // state: State { - // input_buf: [0u32; 8], - // buf_len: 0, - // }, + state: State { + input_buf: [0u32; 8], + buf_index: 0, + }, }; instance.reconfigure(); @@ -128,6 +139,7 @@ impl<'d, T: Instance> Cordic<'d, T> { peri.set_func(config.function); peri.set_precision(config.precision); peri.set_scale(config.scale); + if config.first_result { peri.set_result_count(Count::One) } else { @@ -145,44 +157,8 @@ impl<'d, T: Instance> Cordic<'d, T> { } } - //self.state.input_buf.fill(0u32); - } - - /// Run a CORDIC calculation - pub fn calc_32bit(&mut self, arg1s: &[f64], arg2s: Option<&[f64]>, output: &mut [f64]) -> usize { - match self.config.mode { - Mode::ZeroOverhead => { - if arg2s.is_none() { - self.cordic.set_argument_count(Count::One); - - self.cordic.set_result_count(if self.config.first_result { - if output.len() < arg1s.len() { - panic!("Output buf length is not long enough") - } - Count::One - } else { - if output.len() < 2 * arg1s.len() { - panic!("Output buf length is not long enough") - } - Count::Two - }); - - let mut cnt = 0; - - for &arg in arg1s.iter() { - self.cordic.write_argument(utils::f64_to_q1_31(arg)); - output[cnt] = utils::q1_31_to_f64(self.cordic.read_result()); - cnt += 1; - } - - cnt - } else { - todo!() - } - } - Mode::Interrupt => todo!(), - Mode::Dma => todo!(), - } + self.state.input_buf.fill(0u32); + self.state.buf_index = 0; } } @@ -192,8 +168,216 @@ impl<'d, T: Instance> Drop for Cordic<'d, T> { } } +// q1.31 related +impl<'d, T: Instance> Cordic<'d, T> { + /// Run a CORDIC calculation + pub fn calc_32bit(&mut self, arg1s: &[f64], arg2s: Option<&[f64]>, output: &mut [f64]) -> usize { + let peri = &self.cordic; + let config = &self.config; + + assert!( + match config.first_result { + true => output.len() >= arg1s.len(), + false => output.len() >= 2 * arg1s.len(), + }, + "Output buf length is not long enough" + ); + + self.check_input_f64(arg1s, arg2s); + + peri.set_result_count(if config.first_result { Count::One } else { Count::Two }); + peri.set_data_width(Width::Bits32, Width::Bits32); + + let state = &mut self.state; + + let mut output_count = 0; + + let mut consumed_input_len = 0; + + match config.mode { + Mode::ZeroOverhead => { + // put double input into cordic + if arg2s.is_some() && !arg2s.unwrap().is_empty() { + let arg2s = arg2s.unwrap(); + + peri.set_argument_count(Count::Two); + + let double_value = arg1s.iter().zip(arg2s); + consumed_input_len = double_value.len(); + + for (arg1, arg2) in double_value { + // if input_buf is full, send values to cordic + if state.buf_index == INPUT_BUF_LEN - 1 { + for arg in state.input_buf.chunks(2) { + peri.write_argument(arg[0]); + peri.write_argument(arg[1]); + + output[output_count] = utils::q1_31_to_f64(peri.read_result()); + output_count += 1; + + if !config.first_result { + output[output_count] = utils::q1_31_to_f64(peri.read_result()); + output_count += 1; + } + } + + state.buf_index = 0; + } + + for &&arg in [arg1, arg2].iter() { + state.input_buf[state.buf_index] = utils::f64_to_q1_31(arg); + state.buf_index += 1; + } + } + + // put left paired args into cordic + if state.buf_index > 0 { + for arg in state.input_buf[..state.buf_index].chunks(2) { + peri.write_argument(arg[0]); + peri.write_argument(arg[1]); + + output[output_count] = utils::q1_31_to_f64(peri.read_result()); + output_count += 1; + + if !config.first_result { + output[output_count] = utils::q1_31_to_f64(peri.read_result()); + output_count += 1; + } + } + + state.buf_index = 0; + } + } + + // put single input into cordic + let input_left = &arg1s[consumed_input_len..]; + + if !input_left.is_empty() { + peri.set_argument_count(Count::One); + + for &arg in input_left.iter() { + peri.write_argument(utils::f64_to_q1_31(arg)); + + output[output_count] = utils::q1_31_to_f64(peri.read_result()); + output_count += 1; + + if !config.first_result { + output[output_count] = utils::q1_31_to_f64(peri.read_result()); + output_count += 1; + } + } + } + + output_count + } + Mode::Interrupt => todo!(), + Mode::Dma => todo!(), + } + } + + fn check_input_f64(&self, arg1s: &[f64], arg2s: Option<&[f64]>) { + let config = &self.config; + + use Function::*; + + // check SCALE value + match config.function { + Cos | Sin | Phase | Modulus => assert!(Scale::A1_R1 == config.scale, "SCALE should be 0"), + Arctan => assert!( + (0..=7).contains(&(config.scale as u8)), + "SCALE should be: 0 <= SCALE <= 7" + ), + Cosh | Sinh | Arctanh => assert!(Scale::A1o2_R2 == config.scale, "SCALE should be 1"), + + Ln => assert!( + (1..=4).contains(&(config.scale as u8)), + "SCALE should be: 1 <= SCALE <= 4" + ), + Sqrt => assert!( + (0..=2).contains(&(config.scale as u8)), + "SCALE should be: 0 <= SCALE <= 2" + ), + } + + // check ARG1 value + match config.function { + Cos | Sin | Phase | Modulus | Arctan => { + assert!( + arg1s.iter().all(|v| (-1.0..=1.0).contains(v)), + "ARG1 should be: -1 <= ARG1 <= 1" + ); + } + + Cosh | Sinh => assert!( + arg1s.iter().all(|v| (-0.559..=0.559).contains(v)), + "ARG1 should be: -0.559 <= ARG1 <= 0.559" + ), + + Arctanh => assert!( + arg1s.iter().all(|v| (-0.403..=0.403).contains(v)), + "ARG1 should be: -0.403 <= ARG1 <= 0.403" + ), + + Ln => { + match config.scale { + Scale::A1o2_R2 => assert!( + arg1s.iter().all(|v| (0.05354..0.5).contains(v)), + "When SCALE set to 1, ARG1 should be: 0.05354 <= ARG1 < 0.5" + ), + Scale::A1o4_R4 => assert!( + arg1s.iter().all(|v| (0.25..0.75).contains(v)), + "When SCALE set to 2, ARG1 should be: 0.25 <= ARG1 < 0.75" + ), + Scale::A1o8_R8 => assert!( + arg1s.iter().all(|v| (0.375..0.875).contains(v)), + "When SCALE set to 3, ARG1 should be: 0.375 <= ARG1 < 0.875" + ), + Scale::A1o16_R16 => assert!( + arg1s.iter().all(|v| (0.4375f64..0.584f64).contains(v)), + "When SCALE set to 4, ARG1 should be: 0.4375 <= ARG1 < 0.584" + ), + _ => unreachable!(), + }; + } + + Function::Sqrt => match config.scale { + Scale::A1_R1 => assert!( + arg1s.iter().all(|v| (0.027..0.75).contains(v)), + "When SCALE set to 0, ARG1 should be: 0.027 <= ARG1 < 0.75" + ), + Scale::A1o2_R2 => assert!( + arg1s.iter().all(|v| (0.375..0.875).contains(v)), + "When SCALE set to 1, ARG1 should be: 0.375 <= ARG1 < 0.875" + ), + Scale::A1o4_R4 => assert!( + arg1s.iter().all(|v| (0.4375..0.585).contains(v)), + "When SCALE set to 2, ARG1 should be: 0.4375 <= ARG1 < 0.585" + ), + _ => unreachable!(), + }, + } + + // check ARG2 value + if let Some(arg2s) = arg2s { + match config.function { + Cos | Sin => assert!( + arg2s.iter().all(|v| (0.0..=1.0).contains(v)), + "ARG2 should be: 0 <= ARG2 <= 1" + ), + + Phase | Modulus => assert!( + arg2s.iter().all(|v| (-1.0..=1.0).contains(v)), + "ARG2 should be: -1 <= ARG2 <= 1" + ), + + _ => (), + } + } + } +} + foreach_interrupt!( - ($inst:ident, cordic, CORDIC, GLOBAL, $irq:ident) => { + ($inst:ident, cordic, $block:ident, GLOBAL, $irq:ident) => { impl Instance for peripherals::$inst { } From 5d12f594303bdb76bf2356d9fc0661826e2e658e Mon Sep 17 00:00:00 2001 From: eZio Pan Date: Sat, 16 Mar 2024 00:25:38 +0800 Subject: [PATCH 015/581] stm32 CORDIC: make use of "preload" feature --- embassy-stm32/src/cordic/mod.rs | 180 +++++++++++++++----------------- 1 file changed, 85 insertions(+), 95 deletions(-) diff --git a/embassy-stm32/src/cordic/mod.rs b/embassy-stm32/src/cordic/mod.rs index b15521ca6..997ace113 100644 --- a/embassy-stm32/src/cordic/mod.rs +++ b/embassy-stm32/src/cordic/mod.rs @@ -22,9 +22,8 @@ pub mod low_level { /// CORDIC driver pub struct Cordic<'d, T: Instance> { - cordic: PeripheralRef<'d, T>, + peri: PeripheralRef<'d, T>, config: Config, - state: State, } /// CORDIC instance trait @@ -83,23 +82,16 @@ impl<'d, T: Instance> Cordic<'d, T> { /// Note: /// If you need a periperhal -> CORDIC -> peripehral mode, /// you may want to set Cordic into [Mode::ZeroOverhead] mode, and add extra arguemnts with [Self::extra_config] - pub fn new(cordic: impl Peripheral

+ 'd, config: Config) -> Self { + pub fn new(peri: impl Peripheral

+ 'd, config: Config) -> Self { T::enable_and_reset(); - into_ref!(cordic); + into_ref!(peri); if !config.check_scale() { panic!("Scale value is not compatible with Function") } - let mut instance = Self { - cordic, - config, - state: State { - input_buf: [0u32; 8], - buf_index: 0, - }, - }; + let mut instance = Self { peri, config }; instance.reconfigure(); @@ -114,51 +106,71 @@ impl<'d, T: Instance> Cordic<'d, T> { /// Set extra config for data count and data width. pub fn extra_config(&mut self, arg_cnt: Count, arg_width: Width, res_width: Width) { - let peri = &self.cordic; - peri.set_argument_count(arg_cnt); - peri.set_data_width(arg_width, res_width); + self.peri.set_argument_count(arg_cnt); + self.peri.set_data_width(arg_width, res_width); } fn reconfigure(&mut self) { - let peri = &self.cordic; - let config = &self.config; - - if peri.ready_to_read() { + if self.peri.ready_to_read() { warn!("At least 1 result hasn't been read, reconfigure will cause DATA LOST"); }; - peri.disable_irq(); - peri.disable_write_dma(); - peri.disable_read_dma(); + self.peri.disable_irq(); + self.peri.disable_write_dma(); + self.peri.disable_read_dma(); // clean RRDY flag - while peri.ready_to_read() { - peri.read_result(); + while self.peri.ready_to_read() { + self.peri.read_result(); } - peri.set_func(config.function); - peri.set_precision(config.precision); - peri.set_scale(config.scale); + self.peri.set_func(self.config.function); + self.peri.set_precision(self.config.precision); + self.peri.set_scale(self.config.scale); - if config.first_result { - peri.set_result_count(Count::One) + if self.config.first_result { + self.peri.set_result_count(Count::One) } else { - peri.set_result_count(Count::Two) + self.peri.set_result_count(Count::Two) } - match config.mode { + match self.config.mode { Mode::ZeroOverhead => (), Mode::Interrupt => { - peri.enable_irq(); + self.peri.enable_irq(); } Mode::Dma => { - peri.enable_write_dma(); - peri.enable_read_dma(); + self.peri.enable_write_dma(); + self.peri.enable_read_dma(); } } + } - self.state.input_buf.fill(0u32); - self.state.buf_index = 0; + fn blocking_read_f64(&mut self) -> (f64, Option) { + let res1 = utils::q1_31_to_f64(self.peri.read_result()); + + let res2 = if !self.config.first_result { + Some(utils::q1_31_to_f64(self.peri.read_result())) + } else { + None + }; + + (res1, res2) + } + + fn blocking_read_f64_to_buf(&mut self, result_buf: &mut [f64], result_index: &mut usize) { + let (res1, res2) = self.blocking_read_f64(); + result_buf[*result_index] = res1; + *result_index += 1; + + if let Some(res2) = res2 { + result_buf[*result_index] = res2; + *result_index += 1; + } + } + + fn blocking_write_f64(&mut self, arg: f64) { + self.peri.write_argument(utils::f64_to_q1_31(arg)); } } @@ -172,11 +184,8 @@ impl<'d, T: Instance> Drop for Cordic<'d, T> { impl<'d, T: Instance> Cordic<'d, T> { /// Run a CORDIC calculation pub fn calc_32bit(&mut self, arg1s: &[f64], arg2s: Option<&[f64]>, output: &mut [f64]) -> usize { - let peri = &self.cordic; - let config = &self.config; - assert!( - match config.first_result { + match self.config.first_result { true => output.len() >= arg1s.len(), false => output.len() >= 2 * arg1s.len(), }, @@ -185,87 +194,68 @@ impl<'d, T: Instance> Cordic<'d, T> { self.check_input_f64(arg1s, arg2s); - peri.set_result_count(if config.first_result { Count::One } else { Count::Two }); - peri.set_data_width(Width::Bits32, Width::Bits32); + self.peri.set_result_count(if self.config.first_result { + Count::One + } else { + Count::Two + }); - let state = &mut self.state; + self.peri.set_data_width(Width::Bits32, Width::Bits32); let mut output_count = 0; let mut consumed_input_len = 0; - match config.mode { + match self.config.mode { Mode::ZeroOverhead => { // put double input into cordic if arg2s.is_some() && !arg2s.unwrap().is_empty() { let arg2s = arg2s.unwrap(); - peri.set_argument_count(Count::Two); + self.peri.set_argument_count(Count::Two); - let double_value = arg1s.iter().zip(arg2s); - consumed_input_len = double_value.len(); + // Skip 1st value from arg1s, this value will be manually "preload" to cordic, to make use of cordic preload function. + // And we preserve last value from arg2s, since it need to manually write to cordic, and read the result out. + let double_input = arg1s.iter().skip(1).zip(&arg2s[..arg2s.len() - 1]); + // Since we preload 1st value from arg1s, the consumed input length is double_input length + 1. + consumed_input_len = double_input.len() + 1; - for (arg1, arg2) in double_value { - // if input_buf is full, send values to cordic - if state.buf_index == INPUT_BUF_LEN - 1 { - for arg in state.input_buf.chunks(2) { - peri.write_argument(arg[0]); - peri.write_argument(arg[1]); + // preload first value from arg1 to cordic + self.blocking_write_f64(arg1s[0]); - output[output_count] = utils::q1_31_to_f64(peri.read_result()); - output_count += 1; + for (&arg1, &arg2) in double_input { + // Since we manually preload a value before, + // we will write arg2 (from the actual last pair) first, (at this moment, cordic start to calculating,) + // and write arg1 (from the actual next pair), then read the result, to "keep preloading" - if !config.first_result { - output[output_count] = utils::q1_31_to_f64(peri.read_result()); - output_count += 1; - } - } - - state.buf_index = 0; - } - - for &&arg in [arg1, arg2].iter() { - state.input_buf[state.buf_index] = utils::f64_to_q1_31(arg); - state.buf_index += 1; - } + self.blocking_write_f64(arg2); + self.blocking_write_f64(arg1); + self.blocking_read_f64_to_buf(output, &mut output_count); } - // put left paired args into cordic - if state.buf_index > 0 { - for arg in state.input_buf[..state.buf_index].chunks(2) { - peri.write_argument(arg[0]); - peri.write_argument(arg[1]); - - output[output_count] = utils::q1_31_to_f64(peri.read_result()); - output_count += 1; - - if !config.first_result { - output[output_count] = utils::q1_31_to_f64(peri.read_result()); - output_count += 1; - } - } - - state.buf_index = 0; - } + // write last input value from arg2s, then read out the result + self.blocking_write_f64(arg2s[arg2s.len() - 1]); + self.blocking_read_f64_to_buf(output, &mut output_count); } // put single input into cordic let input_left = &arg1s[consumed_input_len..]; if !input_left.is_empty() { - peri.set_argument_count(Count::One); + self.peri.set_argument_count(Count::One); - for &arg in input_left.iter() { - peri.write_argument(utils::f64_to_q1_31(arg)); + // "preload" value to cordic (at this moment, cordic start to calculating) + self.blocking_write_f64(input_left[0]); - output[output_count] = utils::q1_31_to_f64(peri.read_result()); - output_count += 1; - - if !config.first_result { - output[output_count] = utils::q1_31_to_f64(peri.read_result()); - output_count += 1; - } + for &arg in input_left.iter().skip(1) { + // this line write arg for next round caculation to cordic, + // and read result from last round + self.blocking_write_f64(arg); + self.blocking_read_f64_to_buf(output, &mut output_count); } + + // read the last output + self.blocking_read_f64_to_buf(output, &mut output_count); } output_count From c9f759bb21782eb0487c96a59500310d1283694c Mon Sep 17 00:00:00 2001 From: eZio Pan Date: Sat, 16 Mar 2024 21:20:17 +0800 Subject: [PATCH 016/581] stm32 CORDIC: ZeroOverhead for q1.31 and q1.15 --- embassy-stm32/src/cordic/enums.rs | 13 - embassy-stm32/src/cordic/mod.rs | 468 ++++++++++++++++++------------ embassy-stm32/src/cordic/utils.rs | 4 +- 3 files changed, 278 insertions(+), 207 deletions(-) diff --git a/embassy-stm32/src/cordic/enums.rs b/embassy-stm32/src/cordic/enums.rs index 3e1c47f7f..37c73f549 100644 --- a/embassy-stm32/src/cordic/enums.rs +++ b/embassy-stm32/src/cordic/enums.rs @@ -68,16 +68,3 @@ pub enum Width { Bits32, Bits16, } - -/// Cordic driver running mode -#[derive(Clone, Copy)] -pub enum Mode { - /// After caculation start, a read to RDATA register will block AHB until the caculation finished - ZeroOverhead, - - /// Use CORDIC interrupt to trigger a read result value - Interrupt, - - /// Use DMA to write/read value - Dma, -} diff --git a/embassy-stm32/src/cordic/mod.rs b/embassy-stm32/src/cordic/mod.rs index 997ace113..61277d7e1 100644 --- a/embassy-stm32/src/cordic/mod.rs +++ b/embassy-stm32/src/cordic/mod.rs @@ -1,8 +1,9 @@ //! CORDIC co-processor -use crate::peripherals; use embassy_hal_internal::{into_ref, Peripheral, PeripheralRef}; +use crate::peripherals; + mod enums; pub use enums::*; @@ -10,10 +11,6 @@ pub mod utils; pub(crate) mod sealed; -// length of pre-allocated [u32] memory for CORDIC input, -// length should be multiple of 2 -const INPUT_BUF_LEN: usize = 8; - /// Low-level CORDIC access. #[cfg(feature = "unstable-pac")] pub mod low_level { @@ -31,30 +28,16 @@ pub trait Instance: sealed::Instance + Peripheral

+ crate::rcc::RccPer /// CORDIC configuration pub struct Config { - mode: Mode, function: Function, precision: Precision, scale: Scale, first_result: bool, } -// CORDIC running state -struct State { - input_buf: [u32; INPUT_BUF_LEN], - buf_index: usize, -} - impl Config { /// Create a config for Cordic driver - pub fn new( - mode: Mode, - function: Function, - precision: Option, - scale: Option, - first_result: bool, - ) -> Self { + pub fn new(function: Function, precision: Option, scale: Option, first_result: bool) -> Self { Self { - mode, function, precision: precision.unwrap_or_default(), scale: scale.unwrap_or_default(), @@ -133,22 +116,123 @@ impl<'d, T: Instance> Cordic<'d, T> { } else { self.peri.set_result_count(Count::Two) } + } - match self.config.mode { - Mode::ZeroOverhead => (), - Mode::Interrupt => { - self.peri.enable_irq(); - } - Mode::Dma => { - self.peri.enable_write_dma(); - self.peri.enable_read_dma(); - } + fn blocking_read_f32(&mut self) -> (f32, Option) { + let reg_value = self.peri.read_result(); + + let res1 = utils::q1_15_to_f32((reg_value & ((1u32 << 16) - 1)) as u16); + + // We don't care about whether the function return 1 or 2 results, + // the only thing matter is whether user want 1 or 2 results. + let res2 = if !self.config.first_result { + Some(utils::q1_15_to_f32((reg_value >> 16) as u16)) + } else { + None + }; + + (res1, res2) + } +} + +impl<'d, T: Instance> Drop for Cordic<'d, T> { + fn drop(&mut self) { + T::disable(); + } +} + +// q1.31 related +impl<'d, T: Instance> Cordic<'d, T> { + /// Run a CORDIC calculation + pub fn blocking_calc_32bit(&mut self, arg1s: &[f64], arg2s: Option<&[f64]>, output: &mut [f64]) -> usize { + if arg1s.is_empty() { + return 0; } + + assert!( + match self.config.first_result { + true => output.len() >= arg1s.len(), + false => output.len() >= 2 * arg1s.len(), + }, + "Output buf length is not long enough" + ); + + self.check_input_f64(arg1s, arg2s); + + self.peri.disable_irq(); + self.peri.disable_write_dma(); + self.peri.disable_read_dma(); + + self.peri.set_result_count(if self.config.first_result { + Count::One + } else { + Count::Two + }); + + self.peri.set_data_width(Width::Bits32, Width::Bits32); + + let mut output_count = 0; + + let mut consumed_input_len = 0; + + // put double input into cordic + if arg2s.is_some() && !arg2s.expect("It's infailable").is_empty() { + let arg2s = arg2s.expect("It's infailable"); + + self.peri.set_argument_count(Count::Two); + + // Skip 1st value from arg1s, this value will be manually "preload" to cordic, to make use of cordic preload function. + // And we preserve last value from arg2s, since it need to manually write to cordic, and read the result out. + let double_input = arg1s.iter().skip(1).zip(&arg2s[..arg2s.len() - 1]); + // Since we preload 1st value from arg1s, the consumed input length is double_input length + 1. + consumed_input_len = double_input.len() + 1; + + // preload first value from arg1 to cordic + self.blocking_write_f64(arg1s[0]); + + for (&arg1, &arg2) in double_input { + // Since we manually preload a value before, + // we will write arg2 (from the actual last pair) first, (at this moment, cordic start to calculating,) + // and write arg1 (from the actual next pair), then read the result, to "keep preloading" + + self.blocking_write_f64(arg2); + self.blocking_write_f64(arg1); + self.blocking_read_f64_to_buf(output, &mut output_count); + } + + // write last input value from arg2s, then read out the result + self.blocking_write_f64(arg2s[arg2s.len() - 1]); + self.blocking_read_f64_to_buf(output, &mut output_count); + } + + // put single input into cordic + let input_left = &arg1s[consumed_input_len..]; + + if !input_left.is_empty() { + self.peri.set_argument_count(Count::One); + + // "preload" value to cordic (at this moment, cordic start to calculating) + self.blocking_write_f64(input_left[0]); + + for &arg in input_left.iter().skip(1) { + // this line write arg for next round caculation to cordic, + // and read result from last round + self.blocking_write_f64(arg); + self.blocking_read_f64_to_buf(output, &mut output_count); + } + + // read the last output + self.blocking_read_f64_to_buf(output, &mut output_count); + } + + output_count } fn blocking_read_f64(&mut self) -> (f64, Option) { let res1 = utils::q1_31_to_f64(self.peri.read_result()); + // We don't care about whether the function return 1 or 2 results, + // the only thing matter is whether user want 1 or 2 results. let res2 = if !self.config.first_result { Some(utils::q1_31_to_f64(self.peri.read_result())) } else { @@ -174,16 +258,14 @@ impl<'d, T: Instance> Cordic<'d, T> { } } -impl<'d, T: Instance> Drop for Cordic<'d, T> { - fn drop(&mut self) { - T::disable(); - } -} - -// q1.31 related +// q1.15 related impl<'d, T: Instance> Cordic<'d, T> { /// Run a CORDIC calculation - pub fn calc_32bit(&mut self, arg1s: &[f64], arg2s: Option<&[f64]>, output: &mut [f64]) -> usize { + pub fn blocking_calc_16bit(&mut self, arg1s: &[f32], arg2s: Option<&[f32]>, output: &mut [f32]) -> usize { + if arg1s.is_empty() { + return 0; + } + assert!( match self.config.first_result { true => output.len() >= arg1s.len(), @@ -192,180 +274,182 @@ impl<'d, T: Instance> Cordic<'d, T> { "Output buf length is not long enough" ); - self.check_input_f64(arg1s, arg2s); + self.check_input_f32(arg1s, arg2s); - self.peri.set_result_count(if self.config.first_result { - Count::One - } else { - Count::Two - }); + self.peri.disable_irq(); + self.peri.disable_write_dma(); + self.peri.disable_read_dma(); - self.peri.set_data_width(Width::Bits32, Width::Bits32); + // In q1.15 mode, 1 write/read to access 2 arguments/results + self.peri.set_argument_count(Count::One); + self.peri.set_result_count(Count::One); + + self.peri.set_data_width(Width::Bits16, Width::Bits16); let mut output_count = 0; - let mut consumed_input_len = 0; + // In q1.15 mode, we always fill 1 pair of 16bit value into WDATA register. + // If arg2s is None or empty array, we assume arg2 value always 1.0 (as reset value for ARG2). + // If arg2s has some value, and but not as long as arg1s, + // we fill the reset of arg2 values with last value from arg2s (as q1.31 version does) - match self.config.mode { - Mode::ZeroOverhead => { - // put double input into cordic - if arg2s.is_some() && !arg2s.unwrap().is_empty() { - let arg2s = arg2s.unwrap(); + let arg2_default_value = match arg2s { + Some(arg2s) if !arg2s.is_empty() => arg2s[arg2s.len() - 1], + _ => 1.0, + }; - self.peri.set_argument_count(Count::Two); + let mut args = arg1s.iter().zip( + arg2s + .unwrap_or(&[]) + .iter() + .chain(core::iter::repeat(&arg2_default_value)), + ); - // Skip 1st value from arg1s, this value will be manually "preload" to cordic, to make use of cordic preload function. - // And we preserve last value from arg2s, since it need to manually write to cordic, and read the result out. - let double_input = arg1s.iter().skip(1).zip(&arg2s[..arg2s.len() - 1]); - // Since we preload 1st value from arg1s, the consumed input length is double_input length + 1. - consumed_input_len = double_input.len() + 1; + let (&arg1, &arg2) = args + .next() + .expect("This should be infallible, since arg1s is not empty"); - // preload first value from arg1 to cordic - self.blocking_write_f64(arg1s[0]); + // preloading 1 pair of arguments + self.blocking_write_f32(arg1, arg2); - for (&arg1, &arg2) in double_input { - // Since we manually preload a value before, - // we will write arg2 (from the actual last pair) first, (at this moment, cordic start to calculating,) - // and write arg1 (from the actual next pair), then read the result, to "keep preloading" - - self.blocking_write_f64(arg2); - self.blocking_write_f64(arg1); - self.blocking_read_f64_to_buf(output, &mut output_count); - } - - // write last input value from arg2s, then read out the result - self.blocking_write_f64(arg2s[arg2s.len() - 1]); - self.blocking_read_f64_to_buf(output, &mut output_count); - } - - // put single input into cordic - let input_left = &arg1s[consumed_input_len..]; - - if !input_left.is_empty() { - self.peri.set_argument_count(Count::One); - - // "preload" value to cordic (at this moment, cordic start to calculating) - self.blocking_write_f64(input_left[0]); - - for &arg in input_left.iter().skip(1) { - // this line write arg for next round caculation to cordic, - // and read result from last round - self.blocking_write_f64(arg); - self.blocking_read_f64_to_buf(output, &mut output_count); - } - - // read the last output - self.blocking_read_f64_to_buf(output, &mut output_count); - } - - output_count - } - Mode::Interrupt => todo!(), - Mode::Dma => todo!(), + for (&arg1, &arg2) in args { + self.blocking_write_f32(arg1, arg2); + self.blocking_read_f32_to_buf(output, &mut output_count); } + + // read last pair of value from cordic + self.blocking_read_f32_to_buf(output, &mut output_count); + + output_count } - fn check_input_f64(&self, arg1s: &[f64], arg2s: Option<&[f64]>) { - let config = &self.config; + fn blocking_write_f32(&mut self, arg1: f32, arg2: f32) { + let reg_value: u32 = utils::f32_to_q1_15(arg1) as u32 + ((utils::f32_to_q1_15(arg2) as u32) << 16); + self.peri.write_argument(reg_value); + } - use Function::*; + fn blocking_read_f32_to_buf(&mut self, result_buf: &mut [f32], result_index: &mut usize) { + let (res1, res2) = self.blocking_read_f32(); + result_buf[*result_index] = res1; + *result_index += 1; - // check SCALE value - match config.function { - Cos | Sin | Phase | Modulus => assert!(Scale::A1_R1 == config.scale, "SCALE should be 0"), - Arctan => assert!( - (0..=7).contains(&(config.scale as u8)), - "SCALE should be: 0 <= SCALE <= 7" - ), - Cosh | Sinh | Arctanh => assert!(Scale::A1o2_R2 == config.scale, "SCALE should be 1"), - - Ln => assert!( - (1..=4).contains(&(config.scale as u8)), - "SCALE should be: 1 <= SCALE <= 4" - ), - Sqrt => assert!( - (0..=2).contains(&(config.scale as u8)), - "SCALE should be: 0 <= SCALE <= 2" - ), - } - - // check ARG1 value - match config.function { - Cos | Sin | Phase | Modulus | Arctan => { - assert!( - arg1s.iter().all(|v| (-1.0..=1.0).contains(v)), - "ARG1 should be: -1 <= ARG1 <= 1" - ); - } - - Cosh | Sinh => assert!( - arg1s.iter().all(|v| (-0.559..=0.559).contains(v)), - "ARG1 should be: -0.559 <= ARG1 <= 0.559" - ), - - Arctanh => assert!( - arg1s.iter().all(|v| (-0.403..=0.403).contains(v)), - "ARG1 should be: -0.403 <= ARG1 <= 0.403" - ), - - Ln => { - match config.scale { - Scale::A1o2_R2 => assert!( - arg1s.iter().all(|v| (0.05354..0.5).contains(v)), - "When SCALE set to 1, ARG1 should be: 0.05354 <= ARG1 < 0.5" - ), - Scale::A1o4_R4 => assert!( - arg1s.iter().all(|v| (0.25..0.75).contains(v)), - "When SCALE set to 2, ARG1 should be: 0.25 <= ARG1 < 0.75" - ), - Scale::A1o8_R8 => assert!( - arg1s.iter().all(|v| (0.375..0.875).contains(v)), - "When SCALE set to 3, ARG1 should be: 0.375 <= ARG1 < 0.875" - ), - Scale::A1o16_R16 => assert!( - arg1s.iter().all(|v| (0.4375f64..0.584f64).contains(v)), - "When SCALE set to 4, ARG1 should be: 0.4375 <= ARG1 < 0.584" - ), - _ => unreachable!(), - }; - } - - Function::Sqrt => match config.scale { - Scale::A1_R1 => assert!( - arg1s.iter().all(|v| (0.027..0.75).contains(v)), - "When SCALE set to 0, ARG1 should be: 0.027 <= ARG1 < 0.75" - ), - Scale::A1o2_R2 => assert!( - arg1s.iter().all(|v| (0.375..0.875).contains(v)), - "When SCALE set to 1, ARG1 should be: 0.375 <= ARG1 < 0.875" - ), - Scale::A1o4_R4 => assert!( - arg1s.iter().all(|v| (0.4375..0.585).contains(v)), - "When SCALE set to 2, ARG1 should be: 0.4375 <= ARG1 < 0.585" - ), - _ => unreachable!(), - }, - } - - // check ARG2 value - if let Some(arg2s) = arg2s { - match config.function { - Cos | Sin => assert!( - arg2s.iter().all(|v| (0.0..=1.0).contains(v)), - "ARG2 should be: 0 <= ARG2 <= 1" - ), - - Phase | Modulus => assert!( - arg2s.iter().all(|v| (-1.0..=1.0).contains(v)), - "ARG2 should be: -1 <= ARG2 <= 1" - ), - - _ => (), - } + if let Some(res2) = res2 { + result_buf[*result_index] = res2; + *result_index += 1; } } } +// check input value ARG1, ARG2, SCALE and FUNCTION are compatible with each other +macro_rules! check_input_value { + ($func_name:ident, $float_type:ty) => { + impl<'d, T: Instance> Cordic<'d, T> { + fn $func_name(&self, arg1s: &[$float_type], arg2s: Option<&[$float_type]>) { + let config = &self.config; + + use Function::*; + + // check SCALE value + match config.function { + Cos | Sin | Phase | Modulus => assert!(Scale::A1_R1 == config.scale, "SCALE should be 0"), + Arctan => assert!( + (0..=7).contains(&(config.scale as u8)), + "SCALE should be: 0 <= SCALE <= 7" + ), + Cosh | Sinh | Arctanh => assert!(Scale::A1o2_R2 == config.scale, "SCALE should be 1"), + + Ln => assert!( + (1..=4).contains(&(config.scale as u8)), + "SCALE should be: 1 <= SCALE <= 4" + ), + Sqrt => assert!( + (0..=2).contains(&(config.scale as u8)), + "SCALE should be: 0 <= SCALE <= 2" + ), + } + + // check ARG1 value + match config.function { + Cos | Sin | Phase | Modulus | Arctan => { + assert!( + arg1s.iter().all(|v| (-1.0..=1.0).contains(v)), + "ARG1 should be: -1 <= ARG1 <= 1" + ); + } + + Cosh | Sinh => assert!( + arg1s.iter().all(|v| (-0.559..=0.559).contains(v)), + "ARG1 should be: -0.559 <= ARG1 <= 0.559" + ), + + Arctanh => assert!( + arg1s.iter().all(|v| (-0.403..=0.403).contains(v)), + "ARG1 should be: -0.403 <= ARG1 <= 0.403" + ), + + Ln => { + match config.scale { + Scale::A1o2_R2 => assert!( + arg1s.iter().all(|v| (0.05354..0.5).contains(v)), + "When SCALE set to 1, ARG1 should be: 0.05354 <= ARG1 < 0.5" + ), + Scale::A1o4_R4 => assert!( + arg1s.iter().all(|v| (0.25..0.75).contains(v)), + "When SCALE set to 2, ARG1 should be: 0.25 <= ARG1 < 0.75" + ), + Scale::A1o8_R8 => assert!( + arg1s.iter().all(|v| (0.375..0.875).contains(v)), + "When SCALE set to 3, ARG1 should be: 0.375 <= ARG1 < 0.875" + ), + Scale::A1o16_R16 => assert!( + arg1s.iter().all(|v| (0.4375..0.584).contains(v)), + "When SCALE set to 4, ARG1 should be: 0.4375 <= ARG1 < 0.584" + ), + _ => unreachable!(), + }; + } + + Function::Sqrt => match config.scale { + Scale::A1_R1 => assert!( + arg1s.iter().all(|v| (0.027..0.75).contains(v)), + "When SCALE set to 0, ARG1 should be: 0.027 <= ARG1 < 0.75" + ), + Scale::A1o2_R2 => assert!( + arg1s.iter().all(|v| (0.375..0.875).contains(v)), + "When SCALE set to 1, ARG1 should be: 0.375 <= ARG1 < 0.875" + ), + Scale::A1o4_R4 => assert!( + arg1s.iter().all(|v| (0.4375..0.585).contains(v)), + "When SCALE set to 2, ARG1 should be: 0.4375 <= ARG1 < 0.585" + ), + _ => unreachable!(), + }, + } + + // check ARG2 value + if let Some(arg2s) = arg2s { + match config.function { + Cos | Sin => assert!( + arg2s.iter().all(|v| (0.0..=1.0).contains(v)), + "ARG2 should be: 0 <= ARG2 <= 1" + ), + + Phase | Modulus => assert!( + arg2s.iter().all(|v| (-1.0..=1.0).contains(v)), + "ARG2 should be: -1 <= ARG2 <= 1" + ), + + _ => (), + } + } + } + } + }; +} + +check_input_value!(check_input_f64, f64); +check_input_value!(check_input_f32, f32); + foreach_interrupt!( ($inst:ident, cordic, $block:ident, GLOBAL, $irq:ident) => { impl Instance for peripherals::$inst { diff --git a/embassy-stm32/src/cordic/utils.rs b/embassy-stm32/src/cordic/utils.rs index 3f055c34b..2f4b5c5e8 100644 --- a/embassy-stm32/src/cordic/utils.rs +++ b/embassy-stm32/src/cordic/utils.rs @@ -3,7 +3,7 @@ macro_rules! floating_fixed_convert { ($f_to_q:ident, $q_to_f:ident, $unsigned_bin_typ:ty, $signed_bin_typ:ty, $float_ty:ty, $offset:literal, $min_positive:literal) => { /// convert float point to fixed point format - pub fn $f_to_q(value: $float_ty) -> $unsigned_bin_typ { + pub(crate) fn $f_to_q(value: $float_ty) -> $unsigned_bin_typ { const MIN_POSITIVE: $float_ty = unsafe { core::mem::transmute($min_positive) }; assert!( @@ -31,7 +31,7 @@ macro_rules! floating_fixed_convert { #[inline(always)] /// convert fixed point to float point format - pub fn $q_to_f(value: $unsigned_bin_typ) -> $float_ty { + pub(crate) fn $q_to_f(value: $unsigned_bin_typ) -> $float_ty { // It's needed to convert from unsigned to signed first, for correct result. -(value as $signed_bin_typ as $float_ty) / ((1 as $unsigned_bin_typ << $offset) as $float_ty) } From 2fa04d93ed93bed97c7575019aea32c2543e322c Mon Sep 17 00:00:00 2001 From: eZio Pan Date: Mon, 18 Mar 2024 23:09:18 +0800 Subject: [PATCH 017/581] stm32 CORDIC: DMA for q1.31 --- embassy-stm32/build.rs | 4 +- embassy-stm32/src/cordic/mod.rs | 207 ++++++++++++++++++++++++++++++-- 2 files changed, 199 insertions(+), 12 deletions(-) diff --git a/embassy-stm32/build.rs b/embassy-stm32/build.rs index 15bb8ea62..e224cc5a2 100644 --- a/embassy-stm32/build.rs +++ b/embassy-stm32/build.rs @@ -484,7 +484,7 @@ fn main() { let expr = if let Some(mux) = self.chained_muxes.get(&v.name) { self.gen_mux(mux) } else { - self.gen_clock(&v.name) + self.gen_clock(v.name) }; match_arms.extend(quote! { crate::pac::rcc::vals::#enum_name::#variant_name => #expr, @@ -1139,6 +1139,8 @@ fn main() { (("timer", "CH2"), quote!(crate::timer::Ch2Dma)), (("timer", "CH3"), quote!(crate::timer::Ch3Dma)), (("timer", "CH4"), quote!(crate::timer::Ch4Dma)), + (("cordic", "WRITE"), quote!(crate::cordic::WriteDma)), + (("cordic", "READ"), quote!(crate::cordic::ReadDma)), ] .into(); diff --git a/embassy-stm32/src/cordic/mod.rs b/embassy-stm32/src/cordic/mod.rs index 61277d7e1..9875d73bb 100644 --- a/embassy-stm32/src/cordic/mod.rs +++ b/embassy-stm32/src/cordic/mod.rs @@ -2,7 +2,7 @@ use embassy_hal_internal::{into_ref, Peripheral, PeripheralRef}; -use crate::peripherals; +use crate::{dma, peripherals}; mod enums; pub use enums::*; @@ -17,6 +17,8 @@ pub mod low_level { pub use super::sealed::*; } +const INPUT_BUF_MAX_LEN: usize = 16; + /// CORDIC driver pub struct Cordic<'d, T: Instance> { peri: PeripheralRef<'d, T>, @@ -98,7 +100,6 @@ impl<'d, T: Instance> Cordic<'d, T> { warn!("At least 1 result hasn't been read, reconfigure will cause DATA LOST"); }; - self.peri.disable_irq(); self.peri.disable_write_dma(); self.peri.disable_read_dma(); @@ -111,11 +112,8 @@ impl<'d, T: Instance> Cordic<'d, T> { self.peri.set_precision(self.config.precision); self.peri.set_scale(self.config.scale); - if self.config.first_result { - self.peri.set_result_count(Count::One) - } else { - self.peri.set_result_count(Count::Two) - } + // we don't set NRES in here, but to make sure NRES is set each time user call "calc"-ish functions, + // since each "calc"-ish functions can have different ARGSIZE and RESSIZE, thus NRES should be change accrodingly. } fn blocking_read_f32(&mut self) -> (f32, Option) { @@ -143,7 +141,7 @@ impl<'d, T: Instance> Drop for Cordic<'d, T> { // q1.31 related impl<'d, T: Instance> Cordic<'d, T> { - /// Run a CORDIC calculation + /// Run a blocking CORDIC calculation pub fn blocking_calc_32bit(&mut self, arg1s: &[f64], arg2s: Option<&[f64]>, output: &mut [f64]) -> usize { if arg1s.is_empty() { return 0; @@ -159,7 +157,6 @@ impl<'d, T: Instance> Cordic<'d, T> { self.check_input_f64(arg1s, arg2s); - self.peri.disable_irq(); self.peri.disable_write_dma(); self.peri.disable_read_dma(); @@ -256,6 +253,192 @@ impl<'d, T: Instance> Cordic<'d, T> { fn blocking_write_f64(&mut self, arg: f64) { self.peri.write_argument(utils::f64_to_q1_31(arg)); } + + /// Run a async CORDIC calculation + pub async fn async_calc_32bit( + &mut self, + write_dma: impl Peripheral

>, + read_dma: impl Peripheral

>, + arg1s: &[f64], + arg2s: Option<&[f64]>, + output: &mut [f64], + ) -> usize { + if arg1s.is_empty() { + return 0; + } + + assert!( + match self.config.first_result { + true => output.len() >= arg1s.len(), + false => output.len() >= 2 * arg1s.len(), + }, + "Output buf length is not long enough" + ); + + self.check_input_f64(arg1s, arg2s); + + into_ref!(write_dma, read_dma); + + self.peri.set_result_count(if self.config.first_result { + Count::One + } else { + Count::Two + }); + + self.peri.set_data_width(Width::Bits32, Width::Bits32); + + let mut output_count = 0; + let mut consumed_input_len = 0; + let mut input_buf = [0u32; INPUT_BUF_MAX_LEN]; + let mut input_buf_len = 0; + + self.peri.enable_write_dma(); + self.peri.enable_read_dma(); + + if !arg2s.unwrap_or_default().is_empty() { + let arg2s = arg2s.expect("It's infailable"); + + self.peri.set_argument_count(Count::Two); + + let double_input = arg1s.iter().zip(arg2s); + + consumed_input_len = double_input.len(); + + for (&arg1, &arg2) in double_input { + for &arg in [arg1, arg2].iter() { + input_buf[input_buf_len] = utils::f64_to_q1_31(arg); + input_buf_len += 1; + } + + if input_buf_len == INPUT_BUF_MAX_LEN { + self.dma_calc_32bit( + &mut write_dma, + &mut read_dma, + true, + &input_buf[..input_buf_len], + output, + &mut output_count, + ) + .await; + + input_buf_len = 0; + } + } + + if input_buf_len % 2 != 0 { + panic!("input buf len should be multiple of 2 in double mode") + } + + if input_buf_len > 0 { + self.dma_calc_32bit( + &mut write_dma, + &mut read_dma, + true, + &input_buf[..input_buf_len], + output, + &mut output_count, + ) + .await; + + input_buf_len = 0; + } + } + + // single input + + if arg1s.len() > consumed_input_len { + let input_remain = &arg1s[consumed_input_len..]; + + self.peri.set_argument_count(Count::One); + + for &arg in input_remain { + input_buf[input_buf_len] = utils::f64_to_q1_31(arg); + input_buf_len += 1; + + if input_buf_len == INPUT_BUF_MAX_LEN { + self.dma_calc_32bit( + &mut write_dma, + &mut read_dma, + false, + &input_buf[..input_buf_len], + output, + &mut output_count, + ) + .await; + + input_buf_len = 0; + } + } + + if input_buf_len > 0 { + self.dma_calc_32bit( + &mut write_dma, + &mut read_dma, + false, + &input_buf[..input_buf_len], + output, + &mut output_count, + ) + .await; + + // input_buf_len = 0; + } + } + + output_count + } + + async fn dma_calc_32bit( + &mut self, + write_dma: impl Peripheral

>, + read_dma: impl Peripheral

>, + double_input: bool, + input_buf: &[u32], + output: &mut [f64], + output_start_index: &mut usize, + ) { + into_ref!(write_dma, read_dma); + + let write_req = write_dma.request(); + let read_req = read_dma.request(); + + let mut output_buf = [0u32; INPUT_BUF_MAX_LEN * 2]; // make output_buf long enough + + let mut output_buf_size = input_buf.len(); + if !self.config.first_result { + output_buf_size *= 2; + }; + if double_input { + output_buf_size /= 2; + } + + let active_output_buf = &mut output_buf[..output_buf_size]; + + unsafe { + let write_transfer = dma::Transfer::new_write( + &mut write_dma, + write_req, + input_buf, + T::regs().wdata().as_ptr() as *mut _, + Default::default(), + ); + + let read_transfer = dma::Transfer::new_read( + &mut read_dma, + read_req, + T::regs().rdata().as_ptr() as *mut _, + active_output_buf, + Default::default(), + ); + + embassy_futures::join::join(write_transfer, read_transfer).await; + } + + for &mut output_u32 in active_output_buf { + output[*output_start_index] = utils::q1_31_to_f64(output_u32); + *output_start_index += 1; + } + } } // q1.15 related @@ -276,7 +459,6 @@ impl<'d, T: Instance> Cordic<'d, T> { self.check_input_f32(arg1s, arg2s); - self.peri.disable_irq(); self.peri.disable_write_dma(); self.peri.disable_read_dma(); @@ -409,7 +591,7 @@ macro_rules! check_input_value { }; } - Function::Sqrt => match config.scale { + Sqrt => match config.scale { Scale::A1_R1 => assert!( arg1s.iter().all(|v| (0.027..0.75).contains(v)), "When SCALE set to 0, ARG1 should be: 0.027 <= ARG1 < 0.75" @@ -462,3 +644,6 @@ foreach_interrupt!( } }; ); + +dma_trait!(WriteDma, Instance); +dma_trait!(ReadDma, Instance); From 10a9cce855fbf383a8f0ea5511526777062a03c4 Mon Sep 17 00:00:00 2001 From: eZio Pan Date: Tue, 19 Mar 2024 20:09:36 +0800 Subject: [PATCH 018/581] stm32 CORDIC: DMA for q1.31 and q1.15 --- embassy-stm32/src/cordic/mod.rs | 264 ++++++++++++++++++++++-------- embassy-stm32/src/cordic/utils.rs | 13 ++ 2 files changed, 209 insertions(+), 68 deletions(-) diff --git a/embassy-stm32/src/cordic/mod.rs b/embassy-stm32/src/cordic/mod.rs index 9875d73bb..a4b98a770 100644 --- a/embassy-stm32/src/cordic/mod.rs +++ b/embassy-stm32/src/cordic/mod.rs @@ -1,5 +1,6 @@ //! CORDIC co-processor +use embassy_hal_internal::drop::OnDrop; use embassy_hal_internal::{into_ref, Peripheral, PeripheralRef}; use crate::{dma, peripherals}; @@ -100,9 +101,6 @@ impl<'d, T: Instance> Cordic<'d, T> { warn!("At least 1 result hasn't been read, reconfigure will cause DATA LOST"); }; - self.peri.disable_write_dma(); - self.peri.disable_read_dma(); - // clean RRDY flag while self.peri.ready_to_read() { self.peri.read_result(); @@ -115,22 +113,6 @@ impl<'d, T: Instance> Cordic<'d, T> { // we don't set NRES in here, but to make sure NRES is set each time user call "calc"-ish functions, // since each "calc"-ish functions can have different ARGSIZE and RESSIZE, thus NRES should be change accrodingly. } - - fn blocking_read_f32(&mut self) -> (f32, Option) { - let reg_value = self.peri.read_result(); - - let res1 = utils::q1_15_to_f32((reg_value & ((1u32 << 16) - 1)) as u16); - - // We don't care about whether the function return 1 or 2 results, - // the only thing matter is whether user want 1 or 2 results. - let res2 = if !self.config.first_result { - Some(utils::q1_15_to_f32((reg_value >> 16) as u16)) - } else { - None - }; - - (res1, res2) - } } impl<'d, T: Instance> Drop for Cordic<'d, T> { @@ -141,7 +123,7 @@ impl<'d, T: Instance> Drop for Cordic<'d, T> { // q1.31 related impl<'d, T: Instance> Cordic<'d, T> { - /// Run a blocking CORDIC calculation + /// Run a blocking CORDIC calculation in q1.31 format pub fn blocking_calc_32bit(&mut self, arg1s: &[f64], arg2s: Option<&[f64]>, output: &mut [f64]) -> usize { if arg1s.is_empty() { return 0; @@ -157,9 +139,6 @@ impl<'d, T: Instance> Cordic<'d, T> { self.check_input_f64(arg1s, arg2s); - self.peri.disable_write_dma(); - self.peri.disable_read_dma(); - self.peri.set_result_count(if self.config.first_result { Count::One } else { @@ -172,7 +151,10 @@ impl<'d, T: Instance> Cordic<'d, T> { let mut consumed_input_len = 0; - // put double input into cordic + // + // handle 2 input args calculation + // + if arg2s.is_some() && !arg2s.expect("It's infailable").is_empty() { let arg2s = arg2s.expect("It's infailable"); @@ -202,7 +184,10 @@ impl<'d, T: Instance> Cordic<'d, T> { self.blocking_read_f64_to_buf(output, &mut output_count); } - // put single input into cordic + // + // handle 1 input arg calculation + // + let input_left = &arg1s[consumed_input_len..]; if !input_left.is_empty() { @@ -225,27 +210,14 @@ impl<'d, T: Instance> Cordic<'d, T> { output_count } - fn blocking_read_f64(&mut self) -> (f64, Option) { - let res1 = utils::q1_31_to_f64(self.peri.read_result()); + fn blocking_read_f64_to_buf(&mut self, result_buf: &mut [f64], result_index: &mut usize) { + result_buf[*result_index] = utils::q1_31_to_f64(self.peri.read_result()); + *result_index += 1; // We don't care about whether the function return 1 or 2 results, // the only thing matter is whether user want 1 or 2 results. - let res2 = if !self.config.first_result { - Some(utils::q1_31_to_f64(self.peri.read_result())) - } else { - None - }; - - (res1, res2) - } - - fn blocking_read_f64_to_buf(&mut self, result_buf: &mut [f64], result_index: &mut usize) { - let (res1, res2) = self.blocking_read_f64(); - result_buf[*result_index] = res1; - *result_index += 1; - - if let Some(res2) = res2 { - result_buf[*result_index] = res2; + if !self.config.first_result { + result_buf[*result_index] = utils::q1_31_to_f64(self.peri.read_result()); *result_index += 1; } } @@ -254,7 +226,7 @@ impl<'d, T: Instance> Cordic<'d, T> { self.peri.write_argument(utils::f64_to_q1_31(arg)); } - /// Run a async CORDIC calculation + /// Run a async CORDIC calculation in q.1.31 format pub async fn async_calc_32bit( &mut self, write_dma: impl Peripheral

>, @@ -292,8 +264,9 @@ impl<'d, T: Instance> Cordic<'d, T> { let mut input_buf = [0u32; INPUT_BUF_MAX_LEN]; let mut input_buf_len = 0; - self.peri.enable_write_dma(); - self.peri.enable_read_dma(); + // + // handle 2 input args calculation + // if !arg2s.unwrap_or_default().is_empty() { let arg2s = arg2s.expect("It's infailable"); @@ -311,7 +284,7 @@ impl<'d, T: Instance> Cordic<'d, T> { } if input_buf_len == INPUT_BUF_MAX_LEN { - self.dma_calc_32bit( + self.inner_dma_calc_32bit( &mut write_dma, &mut read_dma, true, @@ -325,12 +298,8 @@ impl<'d, T: Instance> Cordic<'d, T> { } } - if input_buf_len % 2 != 0 { - panic!("input buf len should be multiple of 2 in double mode") - } - if input_buf_len > 0 { - self.dma_calc_32bit( + self.inner_dma_calc_32bit( &mut write_dma, &mut read_dma, true, @@ -344,7 +313,9 @@ impl<'d, T: Instance> Cordic<'d, T> { } } - // single input + // + // handle 1 input arg calculation + // if arg1s.len() > consumed_input_len { let input_remain = &arg1s[consumed_input_len..]; @@ -356,7 +327,7 @@ impl<'d, T: Instance> Cordic<'d, T> { input_buf_len += 1; if input_buf_len == INPUT_BUF_MAX_LEN { - self.dma_calc_32bit( + self.inner_dma_calc_32bit( &mut write_dma, &mut read_dma, false, @@ -371,7 +342,7 @@ impl<'d, T: Instance> Cordic<'d, T> { } if input_buf_len > 0 { - self.dma_calc_32bit( + self.inner_dma_calc_32bit( &mut write_dma, &mut read_dma, false, @@ -388,32 +359,47 @@ impl<'d, T: Instance> Cordic<'d, T> { output_count } - async fn dma_calc_32bit( + // this function is highly coupled with async_calc_32bit, and is not intended to use in other place + async fn inner_dma_calc_32bit( &mut self, write_dma: impl Peripheral

>, read_dma: impl Peripheral

>, - double_input: bool, - input_buf: &[u32], - output: &mut [f64], - output_start_index: &mut usize, + double_input: bool, // gether extra info to calc output_buf size + input_buf: &[u32], // input_buf, its content should be extact values and length for calculation + output: &mut [f64], // caller uses should this as a final output array + output_start_index: &mut usize, // the index of start point of the output for this round of calculation ) { into_ref!(write_dma, read_dma); let write_req = write_dma.request(); let read_req = read_dma.request(); - let mut output_buf = [0u32; INPUT_BUF_MAX_LEN * 2]; // make output_buf long enough + // output_buf is the place to store raw value from CORDIC (via DMA). + // For buf size, we assume in this round of calculation: + // all input is 1 arg, and all calculation need 2 output, + // thus output_buf will always be long enough. + let mut output_buf = [0u32; INPUT_BUF_MAX_LEN * 2]; let mut output_buf_size = input_buf.len(); if !self.config.first_result { + // if we need 2 result for 1 input, then output_buf length should be 2x long. output_buf_size *= 2; }; if double_input { + // if input itself is 2 args for 1 calculation, then output_buf length should be /2. output_buf_size /= 2; } let active_output_buf = &mut output_buf[..output_buf_size]; + self.peri.enable_write_dma(); + self.peri.enable_read_dma(); + + let on_drop = OnDrop::new(|| { + self.peri.disable_write_dma(); + self.peri.disable_read_dma(); + }); + unsafe { let write_transfer = dma::Transfer::new_write( &mut write_dma, @@ -434,6 +420,8 @@ impl<'d, T: Instance> Cordic<'d, T> { embassy_futures::join::join(write_transfer, read_transfer).await; } + drop(on_drop); + for &mut output_u32 in active_output_buf { output[*output_start_index] = utils::q1_31_to_f64(output_u32); *output_start_index += 1; @@ -443,7 +431,7 @@ impl<'d, T: Instance> Cordic<'d, T> { // q1.15 related impl<'d, T: Instance> Cordic<'d, T> { - /// Run a CORDIC calculation + /// Run a blocking CORDIC calculation in q1.15 format pub fn blocking_calc_16bit(&mut self, arg1s: &[f32], arg2s: Option<&[f32]>, output: &mut [f32]) -> usize { if arg1s.is_empty() { return 0; @@ -459,9 +447,6 @@ impl<'d, T: Instance> Cordic<'d, T> { self.check_input_f32(arg1s, arg2s); - self.peri.disable_write_dma(); - self.peri.disable_read_dma(); - // In q1.15 mode, 1 write/read to access 2 arguments/results self.peri.set_argument_count(Count::One); self.peri.set_result_count(Count::One); @@ -506,20 +491,163 @@ impl<'d, T: Instance> Cordic<'d, T> { } fn blocking_write_f32(&mut self, arg1: f32, arg2: f32) { - let reg_value: u32 = utils::f32_to_q1_15(arg1) as u32 + ((utils::f32_to_q1_15(arg2) as u32) << 16); + let reg_value: u32 = utils::f32_args_to_u32(arg1, arg2); self.peri.write_argument(reg_value); } fn blocking_read_f32_to_buf(&mut self, result_buf: &mut [f32], result_index: &mut usize) { - let (res1, res2) = self.blocking_read_f32(); + let reg_value = self.peri.read_result(); + + let (res1, res2) = utils::u32_to_f32_res(reg_value); + result_buf[*result_index] = res1; *result_index += 1; - if let Some(res2) = res2 { + // We don't care about whether the function return 1 or 2 results, + // the only thing matter is whether user want 1 or 2 results. + if !self.config.first_result { result_buf[*result_index] = res2; *result_index += 1; } } + + /// Run a async CORDIC calculation in q1.15 format + pub async fn async_calc_16bit( + &mut self, + write_dma: impl Peripheral

>, + read_dma: impl Peripheral

>, + arg1s: &[f32], + arg2s: Option<&[f32]>, + output: &mut [f32], + ) -> usize { + if arg1s.is_empty() { + return 0; + } + + assert!( + match self.config.first_result { + true => output.len() >= arg1s.len(), + false => output.len() >= 2 * arg1s.len(), + }, + "Output buf length is not long enough" + ); + + self.check_input_f32(arg1s, arg2s); + + into_ref!(write_dma, read_dma); + + // In q1.15 mode, 1 write/read to access 2 arguments/results + self.peri.set_argument_count(Count::One); + self.peri.set_result_count(Count::One); + + self.peri.set_data_width(Width::Bits16, Width::Bits16); + + let mut output_count = 0; + let mut input_buf = [0u32; INPUT_BUF_MAX_LEN]; + let mut input_buf_len = 0; + + // In q1.15 mode, we always fill 1 pair of 16bit value into WDATA register. + // If arg2s is None or empty array, we assume arg2 value always 1.0 (as reset value for ARG2). + // If arg2s has some value, and but not as long as arg1s, + // we fill the reset of arg2 values with last value from arg2s (as q1.31 version does) + + let arg2_default_value = match arg2s { + Some(arg2s) if !arg2s.is_empty() => arg2s[arg2s.len() - 1], + _ => 1.0, + }; + + let args = arg1s.iter().zip( + arg2s + .unwrap_or(&[]) + .iter() + .chain(core::iter::repeat(&arg2_default_value)), + ); + + for (&arg1, &arg2) in args { + input_buf[input_buf_len] = utils::f32_args_to_u32(arg1, arg2); + input_buf_len += 1; + + if input_buf_len == INPUT_BUF_MAX_LEN { + self.inner_dma_calc_16bit(&mut write_dma, &mut read_dma, &input_buf, output, &mut output_count) + .await; + } + } + + if input_buf_len > 0 { + self.inner_dma_calc_16bit( + &mut write_dma, + &mut read_dma, + &input_buf[..input_buf_len], + output, + &mut output_count, + ) + .await; + } + + output_count + } + + // this function is highly coupled with async_calc_16bit, and is not intended to use in other place + async fn inner_dma_calc_16bit( + &mut self, + write_dma: impl Peripheral

>, + read_dma: impl Peripheral

>, + input_buf: &[u32], // input_buf, its content should be extact values and length for calculation + output: &mut [f32], // caller uses should this as a final output array + output_start_index: &mut usize, // the index of start point of the output for this round of calculation + ) { + into_ref!(write_dma, read_dma); + + let write_req = write_dma.request(); + let read_req = read_dma.request(); + + // output_buf is the place to store raw value from CORDIC (via DMA). + let mut output_buf = [0u32; INPUT_BUF_MAX_LEN]; + + let active_output_buf = &mut output_buf[..input_buf.len()]; + + self.peri.enable_write_dma(); + self.peri.enable_read_dma(); + + let on_drop = OnDrop::new(|| { + self.peri.disable_write_dma(); + self.peri.disable_read_dma(); + }); + + unsafe { + let write_transfer = dma::Transfer::new_write( + &mut write_dma, + write_req, + input_buf, + T::regs().wdata().as_ptr() as *mut _, + Default::default(), + ); + + let read_transfer = dma::Transfer::new_read( + &mut read_dma, + read_req, + T::regs().rdata().as_ptr() as *mut _, + active_output_buf, + Default::default(), + ); + + embassy_futures::join::join(write_transfer, read_transfer).await; + } + + drop(on_drop); + + for &mut output_u32 in active_output_buf { + let (res1, res2) = utils::u32_to_f32_res(output_u32); + + output[*output_start_index] = res1; + *output_start_index += 1; + + if !self.config.first_result { + output[*output_start_index] = res2; + *output_start_index += 1; + } + } + } } // check input value ARG1, ARG2, SCALE and FUNCTION are compatible with each other diff --git a/embassy-stm32/src/cordic/utils.rs b/embassy-stm32/src/cordic/utils.rs index 2f4b5c5e8..79bef6b97 100644 --- a/embassy-stm32/src/cordic/utils.rs +++ b/embassy-stm32/src/cordic/utils.rs @@ -57,3 +57,16 @@ floating_fixed_convert!( 15, 0x3800_0000u32 // binary form of 1f32^(-15) ); + +#[inline(always)] +pub(crate) fn f32_args_to_u32(arg1: f32, arg2: f32) -> u32 { + f32_to_q1_15(arg1) as u32 + ((f32_to_q1_15(arg2) as u32) << 16) +} + +#[inline(always)] +pub(crate) fn u32_to_f32_res(reg_value: u32) -> (f32, f32) { + let res1 = q1_15_to_f32((reg_value & ((1u32 << 16) - 1)) as u16); + let res2 = q1_15_to_f32((reg_value >> 16) as u16); + + (res1, res2) +} From 641da3602e1d7565d08180e0f5608f1ab81c309a Mon Sep 17 00:00:00 2001 From: eZio Pan Date: Tue, 19 Mar 2024 22:19:06 +0800 Subject: [PATCH 019/581] stm32 CORDIC: error handle --- embassy-stm32/src/cordic/enums.rs | 29 +- embassy-stm32/src/cordic/errors.rs | 95 ++++++ embassy-stm32/src/cordic/mod.rs | 510 +++++++++++++++-------------- embassy-stm32/src/cordic/sealed.rs | 12 +- 4 files changed, 385 insertions(+), 261 deletions(-) create mode 100644 embassy-stm32/src/cordic/errors.rs diff --git a/embassy-stm32/src/cordic/enums.rs b/embassy-stm32/src/cordic/enums.rs index 37c73f549..4b92a6cf8 100644 --- a/embassy-stm32/src/cordic/enums.rs +++ b/embassy-stm32/src/cordic/enums.rs @@ -1,6 +1,7 @@ /// CORDIC function #[allow(missing_docs)] -#[derive(Clone, Copy)] +#[derive(Debug, Clone, Copy)] +#[cfg_attr(feature = "defmt", derive(defmt::Format))] pub enum Function { Cos = 0, Sin, @@ -16,7 +17,7 @@ pub enum Function { /// CORDIC precision #[allow(missing_docs)] -#[derive(Clone, Copy, Default)] +#[derive(Debug, Clone, Copy, Default)] pub enum Precision { Iters4 = 1, Iters8, @@ -37,25 +38,25 @@ pub enum Precision { } /// CORDIC scale -#[allow(non_camel_case_types)] #[allow(missing_docs)] -#[derive(Clone, Copy, Default, PartialEq)] +#[derive(Debug, Clone, Copy, Default, PartialEq)] +#[cfg_attr(feature = "defmt", derive(defmt::Format))] pub enum Scale { #[default] - A1_R1 = 0, - A1o2_R2, - A1o4_R4, - A1o8_R8, - A1o16_R16, - A1o32_R32, - A1o64_R64, - A1o128_R128, + Arg1Res1 = 0, + Arg1o2Res2, + Arg1o4Res4, + Arg1o8Res8, + Arg1o16Res16, + Arg1o32Res32, + Arg1o64Res64, + Arg1o128Res128, } -/// CORDIC argument/result count +/// CORDIC argument/result register access count #[allow(missing_docs)] #[derive(Clone, Copy, Default)] -pub enum Count { +pub enum AccessCount { #[default] One, Two, diff --git a/embassy-stm32/src/cordic/errors.rs b/embassy-stm32/src/cordic/errors.rs new file mode 100644 index 000000000..d0b2dc618 --- /dev/null +++ b/embassy-stm32/src/cordic/errors.rs @@ -0,0 +1,95 @@ +use super::{Function, Scale}; + +/// Error for [Cordic](super::Cordic) +#[derive(Debug)] +pub enum CordicError { + /// Config error + ConfigError(ConfigError), + /// Argument error + ArgError(ArgError), + /// Output buffer length error + OutputLengthNotEnough, +} + +#[cfg(feature = "defmt")] +impl defmt::Format for CordicError { + fn format(&self, fmt: defmt::Formatter) { + use CordicError::*; + + match self { + ConfigError(e) => defmt::write!(fmt, "{}", e), + ArgError(e) => defmt::write!(fmt, "{}", e), + OutputLengthNotEnough => defmt::write!(fmt, "Output buffer length is not long enough"), + } + } +} + +/// Error dring parsing [Cordic::Config](super::Config) +#[derive(Debug)] +pub struct ConfigError { + pub(super) func: Function, + pub(super) scale_range: [u8; 2], +} + +#[cfg(feature = "defmt")] +impl defmt::Format for ConfigError { + fn format(&self, fmt: defmt::Formatter) { + defmt::write!(fmt, "For FUNCTION: {},", self.func); + + if self.scale_range[0] == self.scale_range[1] { + defmt::write!(fmt, " SCALE value should be {}", self.scale_range[0]) + } else { + defmt::write!( + fmt, + " SCALE value should be {} <= SCALE <= {}", + self.scale_range[0], + self.scale_range[1] + ) + } + } +} + +/// Error on checking input arguments +#[derive(Debug)] +pub struct ArgError { + pub(super) func: Function, + pub(super) scale: Option, + pub(super) arg_range: [f32; 2], // only for debug display, f32 is ok + pub(super) inclusive_upper_bound: bool, + pub(super) arg_type: ArgType, +} + +#[cfg(feature = "defmt")] +impl defmt::Format for ArgError { + fn format(&self, fmt: defmt::Formatter) { + defmt::write!(fmt, "For FUNCTION: {},", self.func); + + if let Some(scale) = self.scale { + defmt::write!(fmt, " when SCALE is {},", scale); + } + + let arg_string = match self.arg_type { + ArgType::Arg1 => "ARG1", + ArgType::Arg2 => "ARG2", + }; + + defmt::write!(fmt, " {} should be", arg_string); + + let inclusive_string = if self.inclusive_upper_bound { "=" } else { "" }; + + defmt::write!( + fmt, + " {} <= {} <{} {}", + self.arg_range[0], + arg_string, + inclusive_string, + self.arg_range[1] + ) + } +} + +#[derive(Debug)] +pub(super) enum ArgType { + Arg1, + Arg2, +} diff --git a/embassy-stm32/src/cordic/mod.rs b/embassy-stm32/src/cordic/mod.rs index a4b98a770..5ac9addd8 100644 --- a/embassy-stm32/src/cordic/mod.rs +++ b/embassy-stm32/src/cordic/mod.rs @@ -1,4 +1,4 @@ -//! CORDIC co-processor +//! coordinate rotation digital computer (CORDIC) use embassy_hal_internal::drop::OnDrop; use embassy_hal_internal::{into_ref, Peripheral, PeripheralRef}; @@ -8,6 +8,9 @@ use crate::{dma, peripherals}; mod enums; pub use enums::*; +mod errors; +pub use errors::*; + pub mod utils; pub(crate) mod sealed; @@ -30,33 +33,55 @@ pub struct Cordic<'d, T: Instance> { pub trait Instance: sealed::Instance + Peripheral

+ crate::rcc::RccPeripheral {} /// CORDIC configuration +#[derive(Debug)] pub struct Config { function: Function, precision: Precision, scale: Scale, - first_result: bool, + res1_only: bool, } impl Config { /// Create a config for Cordic driver - pub fn new(function: Function, precision: Option, scale: Option, first_result: bool) -> Self { - Self { + pub fn new(function: Function, precision: Precision, scale: Scale, res1_only: bool) -> Result { + let config = Self { function, - precision: precision.unwrap_or_default(), - scale: scale.unwrap_or_default(), - first_result, - } + precision, + scale, + res1_only, + }; + + config.check_scale()?; + + Ok(config) } - fn check_scale(&self) -> bool { + fn check_scale(&self) -> Result<(), CordicError> { + use Function::*; + let scale_raw = self.scale as u8; - match self.function { - Function::Cos | Function::Sin | Function::Phase | Function::Modulus => 0 == scale_raw, - Function::Arctan => (0..=7).contains(&scale_raw), - Function::Cosh | Function::Sinh | Function::Arctanh => 1 == scale_raw, - Function::Ln => (1..=4).contains(&scale_raw), - Function::Sqrt => (0..=2).contains(&scale_raw), + let err_range = match self.function { + Cos | Sin | Phase | Modulus if !(0..=0).contains(&scale_raw) => Some([0, 0]), + + Arctan if !(0..=7).contains(&scale_raw) => Some([0, 7]), + + Cosh | Sinh | Arctanh if !(1..=1).contains(&scale_raw) => Some([1, 1]), + + Ln if !(1..=4).contains(&scale_raw) => Some([1, 4]), + + Sqrt if !(0..=2).contains(&scale_raw) => Some([0, 2]), + + Cos | Sin | Phase | Modulus | Arctan | Cosh | Sinh | Arctanh | Ln | Sqrt => None, + }; + + if let Some(range) = err_range { + Err(CordicError::ConfigError(ConfigError { + func: self.function, + scale_range: range, + })) + } else { + Ok(()) } } } @@ -73,10 +98,6 @@ impl<'d, T: Instance> Cordic<'d, T> { into_ref!(peri); - if !config.check_scale() { - panic!("Scale value is not compatible with Function") - } - let mut instance = Self { peri, config }; instance.reconfigure(); @@ -91,21 +112,12 @@ impl<'d, T: Instance> Cordic<'d, T> { } /// Set extra config for data count and data width. - pub fn extra_config(&mut self, arg_cnt: Count, arg_width: Width, res_width: Width) { + pub fn extra_config(&mut self, arg_cnt: AccessCount, arg_width: Width, res_width: Width) { self.peri.set_argument_count(arg_cnt); self.peri.set_data_width(arg_width, res_width); } fn reconfigure(&mut self) { - if self.peri.ready_to_read() { - warn!("At least 1 result hasn't been read, reconfigure will cause DATA LOST"); - }; - - // clean RRDY flag - while self.peri.ready_to_read() { - self.peri.read_result(); - } - self.peri.set_func(self.config.function); self.peri.set_precision(self.config.precision); self.peri.set_scale(self.config.scale); @@ -113,6 +125,47 @@ impl<'d, T: Instance> Cordic<'d, T> { // we don't set NRES in here, but to make sure NRES is set each time user call "calc"-ish functions, // since each "calc"-ish functions can have different ARGSIZE and RESSIZE, thus NRES should be change accrodingly. } + + async fn launch_a_dma_transfer( + &mut self, + write_dma: impl Peripheral

>, + read_dma: impl Peripheral

>, + input: &[u32], + output: &mut [u32], + ) { + into_ref!(write_dma, read_dma); + + let write_req = write_dma.request(); + let read_req = read_dma.request(); + + self.peri.enable_write_dma(); + self.peri.enable_read_dma(); + + let _on_drop = OnDrop::new(|| { + self.peri.disable_write_dma(); + self.peri.disable_read_dma(); + }); + + unsafe { + let write_transfer = dma::Transfer::new_write( + &mut write_dma, + write_req, + input, + T::regs().wdata().as_ptr() as *mut _, + Default::default(), + ); + + let read_transfer = dma::Transfer::new_read( + &mut read_dma, + read_req, + T::regs().rdata().as_ptr() as *mut _, + output, + Default::default(), + ); + + embassy_futures::join::join(write_transfer, read_transfer).await; + } + } } impl<'d, T: Instance> Drop for Cordic<'d, T> { @@ -124,25 +177,31 @@ impl<'d, T: Instance> Drop for Cordic<'d, T> { // q1.31 related impl<'d, T: Instance> Cordic<'d, T> { /// Run a blocking CORDIC calculation in q1.31 format - pub fn blocking_calc_32bit(&mut self, arg1s: &[f64], arg2s: Option<&[f64]>, output: &mut [f64]) -> usize { + pub fn blocking_calc_32bit( + &mut self, + arg1s: &[f64], + arg2s: Option<&[f64]>, + output: &mut [f64], + ) -> Result { if arg1s.is_empty() { - return 0; + return Ok(0); } - assert!( - match self.config.first_result { - true => output.len() >= arg1s.len(), - false => output.len() >= 2 * arg1s.len(), - }, - "Output buf length is not long enough" - ); + let output_length_enough = match self.config.res1_only { + true => output.len() >= arg1s.len(), + false => output.len() >= 2 * arg1s.len(), + }; - self.check_input_f64(arg1s, arg2s); + if !output_length_enough { + return Err(CordicError::OutputLengthNotEnough); + } - self.peri.set_result_count(if self.config.first_result { - Count::One + self.check_input_f64(arg1s, arg2s)?; + + self.peri.set_result_count(if self.config.res1_only { + AccessCount::One } else { - Count::Two + AccessCount::Two }); self.peri.set_data_width(Width::Bits32, Width::Bits32); @@ -155,10 +214,10 @@ impl<'d, T: Instance> Cordic<'d, T> { // handle 2 input args calculation // - if arg2s.is_some() && !arg2s.expect("It's infailable").is_empty() { - let arg2s = arg2s.expect("It's infailable"); + if arg2s.is_some() && !arg2s.unwrap().is_empty() { + let arg2s = arg2s.unwrap(); - self.peri.set_argument_count(Count::Two); + self.peri.set_argument_count(AccessCount::Two); // Skip 1st value from arg1s, this value will be manually "preload" to cordic, to make use of cordic preload function. // And we preserve last value from arg2s, since it need to manually write to cordic, and read the result out. @@ -191,7 +250,7 @@ impl<'d, T: Instance> Cordic<'d, T> { let input_left = &arg1s[consumed_input_len..]; if !input_left.is_empty() { - self.peri.set_argument_count(Count::One); + self.peri.set_argument_count(AccessCount::One); // "preload" value to cordic (at this moment, cordic start to calculating) self.blocking_write_f64(input_left[0]); @@ -207,7 +266,7 @@ impl<'d, T: Instance> Cordic<'d, T> { self.blocking_read_f64_to_buf(output, &mut output_count); } - output_count + Ok(output_count) } fn blocking_read_f64_to_buf(&mut self, result_buf: &mut [f64], result_index: &mut usize) { @@ -216,7 +275,7 @@ impl<'d, T: Instance> Cordic<'d, T> { // We don't care about whether the function return 1 or 2 results, // the only thing matter is whether user want 1 or 2 results. - if !self.config.first_result { + if !self.config.res1_only { result_buf[*result_index] = utils::q1_31_to_f64(self.peri.read_result()); *result_index += 1; } @@ -234,27 +293,28 @@ impl<'d, T: Instance> Cordic<'d, T> { arg1s: &[f64], arg2s: Option<&[f64]>, output: &mut [f64], - ) -> usize { + ) -> Result { if arg1s.is_empty() { - return 0; + return Ok(0); } - assert!( - match self.config.first_result { - true => output.len() >= arg1s.len(), - false => output.len() >= 2 * arg1s.len(), - }, - "Output buf length is not long enough" - ); + let output_length_enough = match self.config.res1_only { + true => output.len() >= arg1s.len(), + false => output.len() >= 2 * arg1s.len(), + }; - self.check_input_f64(arg1s, arg2s); + if !output_length_enough { + return Err(CordicError::OutputLengthNotEnough); + } + + self.check_input_f64(arg1s, arg2s)?; into_ref!(write_dma, read_dma); - self.peri.set_result_count(if self.config.first_result { - Count::One + self.peri.set_result_count(if self.config.res1_only { + AccessCount::One } else { - Count::Two + AccessCount::Two }); self.peri.set_data_width(Width::Bits32, Width::Bits32); @@ -269,9 +329,9 @@ impl<'d, T: Instance> Cordic<'d, T> { // if !arg2s.unwrap_or_default().is_empty() { - let arg2s = arg2s.expect("It's infailable"); + let arg2s = arg2s.unwrap(); - self.peri.set_argument_count(Count::Two); + self.peri.set_argument_count(AccessCount::Two); let double_input = arg1s.iter().zip(arg2s); @@ -320,7 +380,7 @@ impl<'d, T: Instance> Cordic<'d, T> { if arg1s.len() > consumed_input_len { let input_remain = &arg1s[consumed_input_len..]; - self.peri.set_argument_count(Count::One); + self.peri.set_argument_count(AccessCount::One); for &arg in input_remain { input_buf[input_buf_len] = utils::f64_to_q1_31(arg); @@ -356,7 +416,7 @@ impl<'d, T: Instance> Cordic<'d, T> { } } - output_count + Ok(output_count) } // this function is highly coupled with async_calc_32bit, and is not intended to use in other place @@ -369,11 +429,6 @@ impl<'d, T: Instance> Cordic<'d, T> { output: &mut [f64], // caller uses should this as a final output array output_start_index: &mut usize, // the index of start point of the output for this round of calculation ) { - into_ref!(write_dma, read_dma); - - let write_req = write_dma.request(); - let read_req = read_dma.request(); - // output_buf is the place to store raw value from CORDIC (via DMA). // For buf size, we assume in this round of calculation: // all input is 1 arg, and all calculation need 2 output, @@ -381,7 +436,7 @@ impl<'d, T: Instance> Cordic<'d, T> { let mut output_buf = [0u32; INPUT_BUF_MAX_LEN * 2]; let mut output_buf_size = input_buf.len(); - if !self.config.first_result { + if !self.config.res1_only { // if we need 2 result for 1 input, then output_buf length should be 2x long. output_buf_size *= 2; }; @@ -392,35 +447,8 @@ impl<'d, T: Instance> Cordic<'d, T> { let active_output_buf = &mut output_buf[..output_buf_size]; - self.peri.enable_write_dma(); - self.peri.enable_read_dma(); - - let on_drop = OnDrop::new(|| { - self.peri.disable_write_dma(); - self.peri.disable_read_dma(); - }); - - unsafe { - let write_transfer = dma::Transfer::new_write( - &mut write_dma, - write_req, - input_buf, - T::regs().wdata().as_ptr() as *mut _, - Default::default(), - ); - - let read_transfer = dma::Transfer::new_read( - &mut read_dma, - read_req, - T::regs().rdata().as_ptr() as *mut _, - active_output_buf, - Default::default(), - ); - - embassy_futures::join::join(write_transfer, read_transfer).await; - } - - drop(on_drop); + self.launch_a_dma_transfer(write_dma, read_dma, input_buf, active_output_buf) + .await; for &mut output_u32 in active_output_buf { output[*output_start_index] = utils::q1_31_to_f64(output_u32); @@ -432,24 +460,30 @@ impl<'d, T: Instance> Cordic<'d, T> { // q1.15 related impl<'d, T: Instance> Cordic<'d, T> { /// Run a blocking CORDIC calculation in q1.15 format - pub fn blocking_calc_16bit(&mut self, arg1s: &[f32], arg2s: Option<&[f32]>, output: &mut [f32]) -> usize { + pub fn blocking_calc_16bit( + &mut self, + arg1s: &[f32], + arg2s: Option<&[f32]>, + output: &mut [f32], + ) -> Result { if arg1s.is_empty() { - return 0; + return Ok(0); } - assert!( - match self.config.first_result { - true => output.len() >= arg1s.len(), - false => output.len() >= 2 * arg1s.len(), - }, - "Output buf length is not long enough" - ); + let output_length_enough = match self.config.res1_only { + true => output.len() >= arg1s.len(), + false => output.len() >= 2 * arg1s.len(), + }; - self.check_input_f32(arg1s, arg2s); + if !output_length_enough { + return Err(CordicError::OutputLengthNotEnough); + } + + self.check_input_f32(arg1s, arg2s)?; // In q1.15 mode, 1 write/read to access 2 arguments/results - self.peri.set_argument_count(Count::One); - self.peri.set_result_count(Count::One); + self.peri.set_argument_count(AccessCount::One); + self.peri.set_result_count(AccessCount::One); self.peri.set_data_width(Width::Bits16, Width::Bits16); @@ -472,9 +506,7 @@ impl<'d, T: Instance> Cordic<'d, T> { .chain(core::iter::repeat(&arg2_default_value)), ); - let (&arg1, &arg2) = args - .next() - .expect("This should be infallible, since arg1s is not empty"); + let (&arg1, &arg2) = args.next().unwrap(); // preloading 1 pair of arguments self.blocking_write_f32(arg1, arg2); @@ -487,7 +519,7 @@ impl<'d, T: Instance> Cordic<'d, T> { // read last pair of value from cordic self.blocking_read_f32_to_buf(output, &mut output_count); - output_count + Ok(output_count) } fn blocking_write_f32(&mut self, arg1: f32, arg2: f32) { @@ -505,7 +537,7 @@ impl<'d, T: Instance> Cordic<'d, T> { // We don't care about whether the function return 1 or 2 results, // the only thing matter is whether user want 1 or 2 results. - if !self.config.first_result { + if !self.config.res1_only { result_buf[*result_index] = res2; *result_index += 1; } @@ -519,26 +551,27 @@ impl<'d, T: Instance> Cordic<'d, T> { arg1s: &[f32], arg2s: Option<&[f32]>, output: &mut [f32], - ) -> usize { + ) -> Result { if arg1s.is_empty() { - return 0; + return Ok(0); } - assert!( - match self.config.first_result { - true => output.len() >= arg1s.len(), - false => output.len() >= 2 * arg1s.len(), - }, - "Output buf length is not long enough" - ); + let output_length_enough = match self.config.res1_only { + true => output.len() >= arg1s.len(), + false => output.len() >= 2 * arg1s.len(), + }; - self.check_input_f32(arg1s, arg2s); + if !output_length_enough { + return Err(CordicError::OutputLengthNotEnough); + } + + self.check_input_f32(arg1s, arg2s)?; into_ref!(write_dma, read_dma); // In q1.15 mode, 1 write/read to access 2 arguments/results - self.peri.set_argument_count(Count::One); - self.peri.set_result_count(Count::One); + self.peri.set_argument_count(AccessCount::One); + self.peri.set_result_count(AccessCount::One); self.peri.set_data_width(Width::Bits16, Width::Bits16); @@ -584,7 +617,7 @@ impl<'d, T: Instance> Cordic<'d, T> { .await; } - output_count + Ok(output_count) } // this function is highly coupled with async_calc_16bit, and is not intended to use in other place @@ -596,45 +629,13 @@ impl<'d, T: Instance> Cordic<'d, T> { output: &mut [f32], // caller uses should this as a final output array output_start_index: &mut usize, // the index of start point of the output for this round of calculation ) { - into_ref!(write_dma, read_dma); - - let write_req = write_dma.request(); - let read_req = read_dma.request(); - // output_buf is the place to store raw value from CORDIC (via DMA). let mut output_buf = [0u32; INPUT_BUF_MAX_LEN]; let active_output_buf = &mut output_buf[..input_buf.len()]; - self.peri.enable_write_dma(); - self.peri.enable_read_dma(); - - let on_drop = OnDrop::new(|| { - self.peri.disable_write_dma(); - self.peri.disable_read_dma(); - }); - - unsafe { - let write_transfer = dma::Transfer::new_write( - &mut write_dma, - write_req, - input_buf, - T::regs().wdata().as_ptr() as *mut _, - Default::default(), - ); - - let read_transfer = dma::Transfer::new_read( - &mut read_dma, - read_req, - T::regs().rdata().as_ptr() as *mut _, - active_output_buf, - Default::default(), - ); - - embassy_futures::join::join(write_transfer, read_transfer).await; - } - - drop(on_drop); + self.launch_a_dma_transfer(write_dma, read_dma, input_buf, active_output_buf) + .await; for &mut output_u32 in active_output_buf { let (res1, res2) = utils::u32_to_f32_res(output_u32); @@ -642,7 +643,7 @@ impl<'d, T: Instance> Cordic<'d, T> { output[*output_start_index] = res1; *output_start_index += 1; - if !self.config.first_result { + if !self.config.res1_only { output[*output_start_index] = res2; *output_start_index += 1; } @@ -654,104 +655,131 @@ impl<'d, T: Instance> Cordic<'d, T> { macro_rules! check_input_value { ($func_name:ident, $float_type:ty) => { impl<'d, T: Instance> Cordic<'d, T> { - fn $func_name(&self, arg1s: &[$float_type], arg2s: Option<&[$float_type]>) { + fn $func_name(&self, arg1s: &[$float_type], arg2s: Option<&[$float_type]>) -> Result<(), CordicError> { let config = &self.config; use Function::*; - // check SCALE value - match config.function { - Cos | Sin | Phase | Modulus => assert!(Scale::A1_R1 == config.scale, "SCALE should be 0"), - Arctan => assert!( - (0..=7).contains(&(config.scale as u8)), - "SCALE should be: 0 <= SCALE <= 7" - ), - Cosh | Sinh | Arctanh => assert!(Scale::A1o2_R2 == config.scale, "SCALE should be 1"), - - Ln => assert!( - (1..=4).contains(&(config.scale as u8)), - "SCALE should be: 1 <= SCALE <= 4" - ), - Sqrt => assert!( - (0..=2).contains(&(config.scale as u8)), - "SCALE should be: 0 <= SCALE <= 2" - ), + struct Arg1ErrInfo { + scale: Option, + range: [f32; 2], + inclusive_upper_bound: bool, } // check ARG1 value - match config.function { - Cos | Sin | Phase | Modulus | Arctan => { - assert!( - arg1s.iter().all(|v| (-1.0..=1.0).contains(v)), - "ARG1 should be: -1 <= ARG1 <= 1" - ); + let err_info = match config.function { + Cos | Sin | Phase | Modulus | Arctan if arg1s.iter().any(|v| !(-1.0..=1.0).contains(v)) => { + Some(Arg1ErrInfo { + scale: None, + range: [-1.0, 1.0], + inclusive_upper_bound: true, + }) } - Cosh | Sinh => assert!( - arg1s.iter().all(|v| (-0.559..=0.559).contains(v)), - "ARG1 should be: -0.559 <= ARG1 <= 0.559" - ), + Cosh | Sinh if arg1s.iter().any(|v| !(-0.559..=0.559).contains(v)) => Some(Arg1ErrInfo { + scale: None, + range: [-0.559, 0.559], + inclusive_upper_bound: true, + }), - Arctanh => assert!( - arg1s.iter().all(|v| (-0.403..=0.403).contains(v)), - "ARG1 should be: -0.403 <= ARG1 <= 0.403" - ), + Arctanh if arg1s.iter().any(|v| !(-0.403..=0.403).contains(v)) => Some(Arg1ErrInfo { + scale: None, + range: [-0.403, 0.403], + inclusive_upper_bound: true, + }), - Ln => { - match config.scale { - Scale::A1o2_R2 => assert!( - arg1s.iter().all(|v| (0.05354..0.5).contains(v)), - "When SCALE set to 1, ARG1 should be: 0.05354 <= ARG1 < 0.5" - ), - Scale::A1o4_R4 => assert!( - arg1s.iter().all(|v| (0.25..0.75).contains(v)), - "When SCALE set to 2, ARG1 should be: 0.25 <= ARG1 < 0.75" - ), - Scale::A1o8_R8 => assert!( - arg1s.iter().all(|v| (0.375..0.875).contains(v)), - "When SCALE set to 3, ARG1 should be: 0.375 <= ARG1 < 0.875" - ), - Scale::A1o16_R16 => assert!( - arg1s.iter().all(|v| (0.4375..0.584).contains(v)), - "When SCALE set to 4, ARG1 should be: 0.4375 <= ARG1 < 0.584" - ), - _ => unreachable!(), - }; - } + Ln => match config.scale { + Scale::Arg1o2Res2 if arg1s.iter().any(|v| !(0.0535..0.5).contains(v)) => Some(Arg1ErrInfo { + scale: Some(Scale::Arg1o2Res2), + range: [0.0535, 0.5], + inclusive_upper_bound: false, + }), + Scale::Arg1o4Res4 if arg1s.iter().any(|v| !(0.25..0.75).contains(v)) => Some(Arg1ErrInfo { + scale: Some(Scale::Arg1o4Res4), + range: [0.25, 0.75], + inclusive_upper_bound: false, + }), + Scale::Arg1o8Res8 if arg1s.iter().any(|v| !(0.375..0.875).contains(v)) => Some(Arg1ErrInfo { + scale: Some(Scale::Arg1o8Res8), + range: [0.375, 0.875], + inclusive_upper_bound: false, + }), + Scale::Arg1o16Res16 if arg1s.iter().any(|v| !(0.4375..0.584).contains(v)) => { + Some(Arg1ErrInfo { + scale: Some(Scale::Arg1o16Res16), + range: [0.4375, 0.584], + inclusive_upper_bound: false, + }) + } + + Scale::Arg1o2Res2 | Scale::Arg1o4Res4 | Scale::Arg1o8Res8 | Scale::Arg1o16Res16 => None, - Sqrt => match config.scale { - Scale::A1_R1 => assert!( - arg1s.iter().all(|v| (0.027..0.75).contains(v)), - "When SCALE set to 0, ARG1 should be: 0.027 <= ARG1 < 0.75" - ), - Scale::A1o2_R2 => assert!( - arg1s.iter().all(|v| (0.375..0.875).contains(v)), - "When SCALE set to 1, ARG1 should be: 0.375 <= ARG1 < 0.875" - ), - Scale::A1o4_R4 => assert!( - arg1s.iter().all(|v| (0.4375..0.585).contains(v)), - "When SCALE set to 2, ARG1 should be: 0.4375 <= ARG1 < 0.585" - ), _ => unreachable!(), }, + + Sqrt => match config.scale { + Scale::Arg1Res1 if arg1s.iter().any(|v| !(0.027..0.75).contains(v)) => Some(Arg1ErrInfo { + scale: Some(Scale::Arg1Res1), + range: [0.027, 0.75], + inclusive_upper_bound: false, + }), + Scale::Arg1o2Res2 if arg1s.iter().any(|v| !(0.375..0.875).contains(v)) => Some(Arg1ErrInfo { + scale: Some(Scale::Arg1o2Res2), + range: [0.375, 0.875], + inclusive_upper_bound: false, + }), + Scale::Arg1o4Res4 if arg1s.iter().any(|v| !(0.4375..0.584).contains(v)) => Some(Arg1ErrInfo { + scale: Some(Scale::Arg1o4Res4), + range: [0.4375, 0.584], + inclusive_upper_bound: false, + }), + Scale::Arg1Res1 | Scale::Arg1o2Res2 | Scale::Arg1o4Res4 => None, + _ => unreachable!(), + }, + + Cos | Sin | Phase | Modulus | Arctan | Cosh | Sinh | Arctanh => None, + }; + + if let Some(err) = err_info { + return Err(CordicError::ArgError(ArgError { + func: config.function, + scale: err.scale, + arg_range: err.range, + inclusive_upper_bound: err.inclusive_upper_bound, + arg_type: ArgType::Arg1, + })); } // check ARG2 value if let Some(arg2s) = arg2s { - match config.function { - Cos | Sin => assert!( - arg2s.iter().all(|v| (0.0..=1.0).contains(v)), - "ARG2 should be: 0 <= ARG2 <= 1" - ), + struct Arg2ErrInfo { + range: [f32; 2], + } - Phase | Modulus => assert!( - arg2s.iter().all(|v| (-1.0..=1.0).contains(v)), - "ARG2 should be: -1 <= ARG2 <= 1" - ), + let err_info = match config.function { + Cos | Sin if arg2s.iter().any(|v| !(0.0..=1.0).contains(v)) => { + Some(Arg2ErrInfo { range: [0.0, 1.0] }) + } - _ => (), + Phase | Modulus if arg2s.iter().any(|v| !(-1.0..=1.0).contains(v)) => { + Some(Arg2ErrInfo { range: [-1.0, 1.0] }) + } + + Cos | Sin | Phase | Modulus | Arctan | Cosh | Sinh | Arctanh | Ln | Sqrt => None, + }; + + if let Some(err) = err_info { + return Err(CordicError::ArgError(ArgError { + func: config.function, + scale: None, + arg_range: err.range, + inclusive_upper_bound: true, + arg_type: ArgType::Arg2, + })); } } + + Ok(()) } } }; diff --git a/embassy-stm32/src/cordic/sealed.rs b/embassy-stm32/src/cordic/sealed.rs index 0f00e380c..f9521ff7a 100644 --- a/embassy-stm32/src/cordic/sealed.rs +++ b/embassy-stm32/src/cordic/sealed.rs @@ -66,21 +66,21 @@ pub trait Instance { } /// Set NARGS value - fn set_argument_count(&self, n: Count) { + fn set_argument_count(&self, n: AccessCount) { Self::regs().csr().modify(|v| { v.set_nargs(match n { - Count::One => vals::Num::NUM1, - Count::Two => vals::Num::NUM2, + AccessCount::One => vals::Num::NUM1, + AccessCount::Two => vals::Num::NUM2, }) }) } /// Set NRES value - fn set_result_count(&self, n: Count) { + fn set_result_count(&self, n: AccessCount) { Self::regs().csr().modify(|v| { v.set_nres(match n { - Count::One => vals::Num::NUM1, - Count::Two => vals::Num::NUM2, + AccessCount::One => vals::Num::NUM1, + AccessCount::Two => vals::Num::NUM2, }); }) } From c42d9f9eaae546faae46c4d1121f1fbc393c2073 Mon Sep 17 00:00:00 2001 From: eZio Pan Date: Thu, 21 Mar 2024 13:25:40 +0800 Subject: [PATCH 020/581] stm32 CORDIC: bug fix --- embassy-stm32/src/cordic/errors.rs | 76 +++++++++++++++++++++++------- embassy-stm32/src/cordic/mod.rs | 53 ++++++++++----------- embassy-stm32/src/cordic/utils.rs | 43 +++++++++-------- 3 files changed, 109 insertions(+), 63 deletions(-) diff --git a/embassy-stm32/src/cordic/errors.rs b/embassy-stm32/src/cordic/errors.rs index d0b2dc618..2c0aca4a2 100644 --- a/embassy-stm32/src/cordic/errors.rs +++ b/embassy-stm32/src/cordic/errors.rs @@ -9,6 +9,26 @@ pub enum CordicError { ArgError(ArgError), /// Output buffer length error OutputLengthNotEnough, + /// Input value is out of range for Q1.x format + NumberOutOfRange(NumberOutOfRange), +} + +impl From for CordicError { + fn from(value: ConfigError) -> Self { + Self::ConfigError(value) + } +} + +impl From for CordicError { + fn from(value: ArgError) -> Self { + Self::ArgError(value) + } +} + +impl From for CordicError { + fn from(value: NumberOutOfRange) -> Self { + Self::NumberOutOfRange(value) + } } #[cfg(feature = "defmt")] @@ -19,6 +39,7 @@ impl defmt::Format for CordicError { match self { ConfigError(e) => defmt::write!(fmt, "{}", e), ArgError(e) => defmt::write!(fmt, "{}", e), + NumberOutOfRange(e) => defmt::write!(fmt, "{}", e), OutputLengthNotEnough => defmt::write!(fmt, "Output buffer length is not long enough"), } } @@ -68,28 +89,51 @@ impl defmt::Format for ArgError { defmt::write!(fmt, " when SCALE is {},", scale); } - let arg_string = match self.arg_type { - ArgType::Arg1 => "ARG1", - ArgType::Arg2 => "ARG2", + defmt::write!(fmt, " {} should be", self.arg_type); + + if self.inclusive_upper_bound { + defmt::write!( + fmt, + " {} <= {} <= {}", + self.arg_range[0], + self.arg_type, + self.arg_range[1] + ) + } else { + defmt::write!( + fmt, + " {} <= {} < {}", + self.arg_range[0], + self.arg_type, + self.arg_range[1] + ) }; - - defmt::write!(fmt, " {} should be", arg_string); - - let inclusive_string = if self.inclusive_upper_bound { "=" } else { "" }; - - defmt::write!( - fmt, - " {} <= {} <{} {}", - self.arg_range[0], - arg_string, - inclusive_string, - self.arg_range[1] - ) } } #[derive(Debug)] +#[cfg_attr(feature = "defmt", derive(defmt::Format))] pub(super) enum ArgType { Arg1, Arg2, } + +/// Input value is out of range for Q1.x format +#[allow(missing_docs)] +#[derive(Debug)] +pub enum NumberOutOfRange { + BelowLowerBound, + AboveUpperBound, +} + +#[cfg(feature = "defmt")] +impl defmt::Format for NumberOutOfRange { + fn format(&self, fmt: defmt::Formatter) { + use NumberOutOfRange::*; + + match self { + BelowLowerBound => defmt::write!(fmt, "input value should be equal or greater than -1"), + AboveUpperBound => defmt::write!(fmt, "input value should be equal or less than 1"), + } + } +} diff --git a/embassy-stm32/src/cordic/mod.rs b/embassy-stm32/src/cordic/mod.rs index 5ac9addd8..b0db3f060 100644 --- a/embassy-stm32/src/cordic/mod.rs +++ b/embassy-stm32/src/cordic/mod.rs @@ -56,7 +56,7 @@ impl Config { Ok(config) } - fn check_scale(&self) -> Result<(), CordicError> { + fn check_scale(&self) -> Result<(), ConfigError> { use Function::*; let scale_raw = self.scale as u8; @@ -76,10 +76,10 @@ impl Config { }; if let Some(range) = err_range { - Err(CordicError::ConfigError(ConfigError { + Err(ConfigError { func: self.function, scale_range: range, - })) + }) } else { Ok(()) } @@ -226,20 +226,20 @@ impl<'d, T: Instance> Cordic<'d, T> { consumed_input_len = double_input.len() + 1; // preload first value from arg1 to cordic - self.blocking_write_f64(arg1s[0]); + self.blocking_write_f64(arg1s[0])?; for (&arg1, &arg2) in double_input { // Since we manually preload a value before, // we will write arg2 (from the actual last pair) first, (at this moment, cordic start to calculating,) // and write arg1 (from the actual next pair), then read the result, to "keep preloading" - self.blocking_write_f64(arg2); - self.blocking_write_f64(arg1); + self.blocking_write_f64(arg2)?; + self.blocking_write_f64(arg1)?; self.blocking_read_f64_to_buf(output, &mut output_count); } // write last input value from arg2s, then read out the result - self.blocking_write_f64(arg2s[arg2s.len() - 1]); + self.blocking_write_f64(arg2s[arg2s.len() - 1])?; self.blocking_read_f64_to_buf(output, &mut output_count); } @@ -253,12 +253,12 @@ impl<'d, T: Instance> Cordic<'d, T> { self.peri.set_argument_count(AccessCount::One); // "preload" value to cordic (at this moment, cordic start to calculating) - self.blocking_write_f64(input_left[0]); + self.blocking_write_f64(input_left[0])?; for &arg in input_left.iter().skip(1) { // this line write arg for next round caculation to cordic, // and read result from last round - self.blocking_write_f64(arg); + self.blocking_write_f64(arg)?; self.blocking_read_f64_to_buf(output, &mut output_count); } @@ -281,8 +281,9 @@ impl<'d, T: Instance> Cordic<'d, T> { } } - fn blocking_write_f64(&mut self, arg: f64) { - self.peri.write_argument(utils::f64_to_q1_31(arg)); + fn blocking_write_f64(&mut self, arg: f64) -> Result<(), NumberOutOfRange> { + self.peri.write_argument(utils::f64_to_q1_31(arg)?); + Ok(()) } /// Run a async CORDIC calculation in q.1.31 format @@ -339,7 +340,7 @@ impl<'d, T: Instance> Cordic<'d, T> { for (&arg1, &arg2) in double_input { for &arg in [arg1, arg2].iter() { - input_buf[input_buf_len] = utils::f64_to_q1_31(arg); + input_buf[input_buf_len] = utils::f64_to_q1_31(arg)?; input_buf_len += 1; } @@ -383,7 +384,7 @@ impl<'d, T: Instance> Cordic<'d, T> { self.peri.set_argument_count(AccessCount::One); for &arg in input_remain { - input_buf[input_buf_len] = utils::f64_to_q1_31(arg); + input_buf[input_buf_len] = utils::f64_to_q1_31(arg)?; input_buf_len += 1; if input_buf_len == INPUT_BUF_MAX_LEN { @@ -509,10 +510,10 @@ impl<'d, T: Instance> Cordic<'d, T> { let (&arg1, &arg2) = args.next().unwrap(); // preloading 1 pair of arguments - self.blocking_write_f32(arg1, arg2); + self.blocking_write_f32(arg1, arg2)?; for (&arg1, &arg2) in args { - self.blocking_write_f32(arg1, arg2); + self.blocking_write_f32(arg1, arg2)?; self.blocking_read_f32_to_buf(output, &mut output_count); } @@ -522,15 +523,13 @@ impl<'d, T: Instance> Cordic<'d, T> { Ok(output_count) } - fn blocking_write_f32(&mut self, arg1: f32, arg2: f32) { - let reg_value: u32 = utils::f32_args_to_u32(arg1, arg2); - self.peri.write_argument(reg_value); + fn blocking_write_f32(&mut self, arg1: f32, arg2: f32) -> Result<(), NumberOutOfRange> { + self.peri.write_argument(utils::f32_args_to_u32(arg1, arg2)?); + Ok(()) } fn blocking_read_f32_to_buf(&mut self, result_buf: &mut [f32], result_index: &mut usize) { - let reg_value = self.peri.read_result(); - - let (res1, res2) = utils::u32_to_f32_res(reg_value); + let (res1, res2) = utils::u32_to_f32_res(self.peri.read_result()); result_buf[*result_index] = res1; *result_index += 1; @@ -597,7 +596,7 @@ impl<'d, T: Instance> Cordic<'d, T> { ); for (&arg1, &arg2) in args { - input_buf[input_buf_len] = utils::f32_args_to_u32(arg1, arg2); + input_buf[input_buf_len] = utils::f32_args_to_u32(arg1, arg2)?; input_buf_len += 1; if input_buf_len == INPUT_BUF_MAX_LEN { @@ -655,7 +654,7 @@ impl<'d, T: Instance> Cordic<'d, T> { macro_rules! check_input_value { ($func_name:ident, $float_type:ty) => { impl<'d, T: Instance> Cordic<'d, T> { - fn $func_name(&self, arg1s: &[$float_type], arg2s: Option<&[$float_type]>) -> Result<(), CordicError> { + fn $func_name(&self, arg1s: &[$float_type], arg2s: Option<&[$float_type]>) -> Result<(), ArgError> { let config = &self.config; use Function::*; @@ -741,13 +740,13 @@ macro_rules! check_input_value { }; if let Some(err) = err_info { - return Err(CordicError::ArgError(ArgError { + return Err(ArgError { func: config.function, scale: err.scale, arg_range: err.range, inclusive_upper_bound: err.inclusive_upper_bound, arg_type: ArgType::Arg1, - })); + }); } // check ARG2 value @@ -769,13 +768,13 @@ macro_rules! check_input_value { }; if let Some(err) = err_info { - return Err(CordicError::ArgError(ArgError { + return Err(ArgError { func: config.function, scale: None, arg_range: err.range, inclusive_upper_bound: true, arg_type: ArgType::Arg2, - })); + }); } } diff --git a/embassy-stm32/src/cordic/utils.rs b/embassy-stm32/src/cordic/utils.rs index 79bef6b97..3c3ed224f 100644 --- a/embassy-stm32/src/cordic/utils.rs +++ b/embassy-stm32/src/cordic/utils.rs @@ -1,39 +1,42 @@ //! Common match utils +use super::errors::NumberOutOfRange; macro_rules! floating_fixed_convert { ($f_to_q:ident, $q_to_f:ident, $unsigned_bin_typ:ty, $signed_bin_typ:ty, $float_ty:ty, $offset:literal, $min_positive:literal) => { /// convert float point to fixed point format - pub(crate) fn $f_to_q(value: $float_ty) -> $unsigned_bin_typ { + pub fn $f_to_q(value: $float_ty) -> Result<$unsigned_bin_typ, NumberOutOfRange> { const MIN_POSITIVE: $float_ty = unsafe { core::mem::transmute($min_positive) }; - assert!( - (-1.0 as $float_ty) <= value, - "input value {} should be equal or greater than -1", - value - ); + if value < -1.0 { + return Err(NumberOutOfRange::BelowLowerBound) + } + + if value > 1.0 { + return Err(NumberOutOfRange::AboveUpperBound) + } - let value = if value == 1.0 as $float_ty{ - // make a exception for user specifing exact 1.0 float point, - // convert 1.0 to max representable value of q1.x format + let value = if 1.0 - MIN_POSITIVE < value && value <= 1.0 { + // make a exception for value between (1.0^{-x} , 1.0] float point, + // convert it to max representable value of q1.x format (1.0 as $float_ty) - MIN_POSITIVE } else { - assert!( - value <= (1.0 as $float_ty) - MIN_POSITIVE, - "input value {} should be equal or less than 1-2^(-{})", - value, $offset - ); value }; - (value * ((1 as $unsigned_bin_typ << $offset) as $float_ty)) as $unsigned_bin_typ + // It's necessary to cast the float value to signed integer, before convert it to a unsigned value. + // Since value from register is actually a "signed value", a "as" cast will keep original binary format but mark it as unsgined value. + // see https://doc.rust-lang.org/reference/expressions/operator-expr.html#numeric-cast + Ok((value * ((1 as $unsigned_bin_typ << $offset) as $float_ty)) as $signed_bin_typ as $unsigned_bin_typ) } #[inline(always)] /// convert fixed point to float point format - pub(crate) fn $q_to_f(value: $unsigned_bin_typ) -> $float_ty { - // It's needed to convert from unsigned to signed first, for correct result. - -(value as $signed_bin_typ as $float_ty) / ((1 as $unsigned_bin_typ << $offset) as $float_ty) + pub fn $q_to_f(value: $unsigned_bin_typ) -> $float_ty { + // It's necessary to cast the unsigned integer to signed integer, before convert it to a float value. + // Since value from register is actually a "signed value", a "as" cast will keep original binary format but mark it as signed value. + // see https://doc.rust-lang.org/reference/expressions/operator-expr.html#numeric-cast + (value as $signed_bin_typ as $float_ty) / ((1 as $unsigned_bin_typ << $offset) as $float_ty) } }; } @@ -59,8 +62,8 @@ floating_fixed_convert!( ); #[inline(always)] -pub(crate) fn f32_args_to_u32(arg1: f32, arg2: f32) -> u32 { - f32_to_q1_15(arg1) as u32 + ((f32_to_q1_15(arg2) as u32) << 16) +pub(crate) fn f32_args_to_u32(arg1: f32, arg2: f32) -> Result { + Ok(f32_to_q1_15(arg1)? as u32 + ((f32_to_q1_15(arg2)? as u32) << 16)) } #[inline(always)] From 0d065ab2d658ebfad0c6e4bba562e474d6ca1012 Mon Sep 17 00:00:00 2001 From: eZio Pan Date: Thu, 21 Mar 2024 16:06:34 +0800 Subject: [PATCH 021/581] stm32 CORDIC: add HIL test --- embassy-stm32/src/cordic/errors.rs | 2 + tests/stm32/Cargo.toml | 13 ++- tests/stm32/gen_test.py | 2 +- tests/stm32/src/bin/cordic.rs | 152 +++++++++++++++++++++++++++++ 4 files changed, 165 insertions(+), 4 deletions(-) create mode 100644 tests/stm32/src/bin/cordic.rs diff --git a/embassy-stm32/src/cordic/errors.rs b/embassy-stm32/src/cordic/errors.rs index 2c0aca4a2..9020d8467 100644 --- a/embassy-stm32/src/cordic/errors.rs +++ b/embassy-stm32/src/cordic/errors.rs @@ -46,6 +46,7 @@ impl defmt::Format for CordicError { } /// Error dring parsing [Cordic::Config](super::Config) +#[allow(dead_code)] #[derive(Debug)] pub struct ConfigError { pub(super) func: Function, @@ -71,6 +72,7 @@ impl defmt::Format for ConfigError { } /// Error on checking input arguments +#[allow(dead_code)] #[derive(Debug)] pub struct ArgError { pub(super) func: Function, diff --git a/tests/stm32/Cargo.toml b/tests/stm32/Cargo.toml index e42470004..345c72a03 100644 --- a/tests/stm32/Cargo.toml +++ b/tests/stm32/Cargo.toml @@ -15,7 +15,7 @@ stm32f446re = ["embassy-stm32/stm32f446re", "chrono", "stop", "can", "not-gpdma" stm32f767zi = ["embassy-stm32/stm32f767zi", "chrono", "not-gpdma", "eth", "rng"] stm32g071rb = ["embassy-stm32/stm32g071rb", "cm0", "not-gpdma", "dac", "ucpd"] stm32g491re = ["embassy-stm32/stm32g491re", "chrono", "stop", "not-gpdma", "rng", "fdcan"] -stm32h563zi = ["embassy-stm32/stm32h563zi", "chrono", "eth", "rng", "hash"] +stm32h563zi = ["embassy-stm32/stm32h563zi", "chrono", "eth", "rng", "hash", "cordic"] stm32h753zi = ["embassy-stm32/stm32h753zi", "chrono", "not-gpdma", "eth", "rng", "fdcan", "hash", "cryp"] stm32h755zi = ["embassy-stm32/stm32h755zi-cm7", "chrono", "not-gpdma", "eth", "dac", "rng", "fdcan", "hash", "cryp"] stm32h7a3zi = ["embassy-stm32/stm32h7a3zi", "not-gpdma", "rng", "fdcan"] @@ -25,8 +25,8 @@ stm32l496zg = ["embassy-stm32/stm32l496zg", "not-gpdma", "rng"] stm32l4a6zg = ["embassy-stm32/stm32l4a6zg", "chrono", "not-gpdma", "rng", "hash"] stm32l4r5zi = ["embassy-stm32/stm32l4r5zi", "chrono", "not-gpdma", "rng"] stm32l552ze = ["embassy-stm32/stm32l552ze", "not-gpdma", "rng", "hash"] -stm32u585ai = ["embassy-stm32/stm32u585ai", "chrono", "rng", "hash"] -stm32u5a5zj = ["embassy-stm32/stm32u5a5zj", "chrono", "rng", "hash"] +stm32u585ai = ["embassy-stm32/stm32u585ai", "chrono", "rng", "hash", "cordic"] +stm32u5a5zj = ["embassy-stm32/stm32u5a5zj", "chrono", "rng", "hash", "cordic"] stm32wb55rg = ["embassy-stm32/stm32wb55rg", "chrono", "not-gpdma", "ble", "mac" , "rng"] stm32wba52cg = ["embassy-stm32/stm32wba52cg", "chrono", "rng", "hash"] stm32wl55jc = ["embassy-stm32/stm32wl55jc-cm4", "not-gpdma", "rng", "chrono"] @@ -48,6 +48,7 @@ embassy-stm32-wpan = [] not-gpdma = [] dac = [] ucpd = [] +cordic = ["dep:num-traits"] cm0 = ["portable-atomic/unsafe-assume-single-core"] @@ -83,6 +84,7 @@ chrono = { version = "^0.4", default-features = false, optional = true} sha2 = { version = "0.10.8", default-features = false } hmac = "0.12.1" aes-gcm = {version = "0.10.3", default-features = false, features = ["aes", "heapless"] } +num-traits = {version="0.2", default-features = false,features = ["libm"], optional = true} # BEGIN TESTS # Generated by gen_test.py. DO NOT EDIT. @@ -91,6 +93,11 @@ name = "can" path = "src/bin/can.rs" required-features = [ "can",] +[[bin]] +name = "cordic" +path = "src/bin/cordic.rs" +required-features = [ "rng", "cordic",] + [[bin]] name = "cryp" path = "src/bin/cryp.rs" diff --git a/tests/stm32/gen_test.py b/tests/stm32/gen_test.py index 8ff156c0e..daf714376 100644 --- a/tests/stm32/gen_test.py +++ b/tests/stm32/gen_test.py @@ -14,7 +14,7 @@ for f in sorted(glob('./src/bin/*.rs')): with open(f, 'r') as f: for line in f: if line.startswith('// required-features:'): - features = line.split(':', 2)[1].strip().split(',') + features = [feature.strip() for feature in line.split(':', 2)[1].strip().split(',')] tests[name] = features diff --git a/tests/stm32/src/bin/cordic.rs b/tests/stm32/src/bin/cordic.rs new file mode 100644 index 000000000..b580cc79b --- /dev/null +++ b/tests/stm32/src/bin/cordic.rs @@ -0,0 +1,152 @@ +// required-features: rng, cordic + +// Test Cordic driver, with Q1.31 format, Sin function, at 24 iterations (aka PRECISION = 6), using DMA transfer + +// Only test on STM32H563ZI, STM32U585AI and STM32U5a5JI. +// STM32G491RE is not tested, since it memory.x has less memory size than it actually has, +// and the test seems use much memory than memory.x suggest. +// see https://github.com/embassy-rs/stm32-data/issues/301#issuecomment-1925412561 + +#![no_std] +#![no_main] + +use defmt::*; +use embassy_executor::Spawner; +use embassy_stm32::{bind_interrupts, cordic, peripherals, rng}; +use num_traits::Float; +use {defmt_rtt as _, panic_probe as _}; + +bind_interrupts!(struct Irqs { + RNG => rng::InterruptHandler; +}); + +/* input value control, can be changed */ + +const ARG1_LENGTH: usize = 9; +const ARG2_LENGTH: usize = 4; // this might not be the exact length of ARG2, since ARG2 need to be inside [0, 1] + +const INPUT_Q1_31_LENGHT: usize = ARG1_LENGTH + ARG2_LENGTH; +const INPUT_U8_LENGTH: usize = 4 * INPUT_Q1_31_LENGHT; + +#[embassy_executor::main] +async fn main(_spawner: Spawner) { + let dp = embassy_stm32::init(Default::default()); + + // + // use RNG generate random Q1.31 value + // + // we don't generate floating-point value, since not all binary value are valid floating-point value, + // and Q1.31 only accept a fixed range of value. + + let mut rng = rng::Rng::new(dp.RNG, Irqs); + + let mut input_buf_u8 = [0u8; INPUT_U8_LENGTH]; + unwrap!(rng.async_fill_bytes(&mut input_buf_u8).await); + + // convert every [u8; 4] to a u32, for a Q1.31 value + let input_q1_31 = unsafe { core::mem::transmute::<[u8; INPUT_U8_LENGTH], [u32; INPUT_Q1_31_LENGHT]>(input_buf_u8) }; + + let mut input_f64_buf = [0f64; INPUT_Q1_31_LENGHT]; + + let mut cordic_output_f64_buf = [0f64; ARG1_LENGTH * 2]; + + // convert Q1.31 value back to f64, for software calculation verify + for (val_u32, val_f64) in input_q1_31.iter().zip(input_f64_buf.iter_mut()) { + *val_f64 = cordic::utils::q1_31_to_f64(*val_u32); + } + + let mut arg2_f64_buf = [0f64; ARG2_LENGTH]; + let mut arg2_f64_len = 0; + + // check if ARG2 is in range [0, 1] (limited by CORDIC peripheral with Sin mode) + for &arg2 in &input_f64_buf[ARG1_LENGTH..] { + if arg2 >= 0.0 { + arg2_f64_buf[arg2_f64_len] = arg2; + arg2_f64_len += 1; + } + } + + // the actal value feed to CORDIC + let arg1_f64_ls = &input_f64_buf[..ARG1_LENGTH]; + let arg2_f64_ls = &arg2_f64_buf[..arg2_f64_len]; + + let mut cordic = cordic::Cordic::new( + dp.CORDIC, + unwrap!(cordic::Config::new( + cordic::Function::Sin, + Default::default(), + Default::default(), + false, + )), + ); + + //#[cfg(feature = "stm32g491re")] + //let (mut write_dma, mut read_dma) = (dp.DMA1_CH4, dp.DMA1_CH5); + + #[cfg(any(feature = "stm32h563zi", feature = "stm32u585ai", feature = "stm32u5a5zj"))] + let (mut write_dma, mut read_dma) = (dp.GPDMA1_CH4, dp.GPDMA1_CH5); + + let cordic_start_point = embassy_time::Instant::now(); + + let cnt = unwrap!( + cordic + .async_calc_32bit( + &mut write_dma, + &mut read_dma, + arg1_f64_ls, + Some(arg2_f64_ls), + &mut cordic_output_f64_buf, + ) + .await + ); + + let cordic_end_point = embassy_time::Instant::now(); + + // since we get 2 output for 1 calculation, the output length should be ARG1_LENGTH * 2 + defmt::assert!(cnt == ARG1_LENGTH * 2); + + let mut software_output_f64_buf = [0f64; ARG1_LENGTH * 2]; + + // for software calc, if there is no ARG2 value, insert a 1.0 as value (the reset value for ARG2 in CORDIC) + let arg2_f64_ls = if arg2_f64_len == 0 { &[1.0] } else { arg2_f64_ls }; + + let software_inputs = arg1_f64_ls + .iter() + .zip( + arg2_f64_ls + .iter() + .chain(core::iter::repeat(&arg2_f64_ls[arg2_f64_ls.len() - 1])), + ) + .zip(software_output_f64_buf.chunks_mut(2)); + + let software_start_point = embassy_time::Instant::now(); + + for ((arg1, arg2), res) in software_inputs { + let (raw_res1, raw_res2) = (arg1 * core::f64::consts::PI).sin_cos(); + + (res[0], res[1]) = (raw_res1 * arg2, raw_res2 * arg2); + } + + let software_end_point = embassy_time::Instant::now(); + + for (cordic_res, software_res) in cordic_output_f64_buf[..cnt] + .chunks(2) + .zip(software_output_f64_buf.chunks(2)) + { + for (cord_res, soft_res) in cordic_res.iter().zip(software_res.iter()) { + defmt::assert!((cord_res - soft_res).abs() <= 2.0.powi(-19)); + } + } + + // This comparsion is just for fun. Since it not a equal compare: + // software use 64-bit floating point, but CORDIC use 32-bit fixed point. + trace!( + "calculate count: {}, Cordic time: {} us, software time: {} us", + ARG1_LENGTH, + (cordic_end_point - cordic_start_point).as_micros(), + (software_end_point - software_start_point).as_micros() + ); + + info!("Test OK"); + cortex_m::asm::bkpt(); +} From fac4f9aa2f67aa6c7f522a10a4c546434a39883e Mon Sep 17 00:00:00 2001 From: eZio Pan Date: Fri, 22 Mar 2024 00:24:53 +0800 Subject: [PATCH 022/581] stm32 CORDIC: typo fix --- embassy-stm32/src/cordic/enums.rs | 2 +- embassy-stm32/src/cordic/errors.rs | 2 +- embassy-stm32/src/cordic/mod.rs | 18 +++++++++--------- embassy-stm32/src/cordic/utils.rs | 4 ++-- 4 files changed, 13 insertions(+), 13 deletions(-) diff --git a/embassy-stm32/src/cordic/enums.rs b/embassy-stm32/src/cordic/enums.rs index 4b92a6cf8..e8695fac7 100644 --- a/embassy-stm32/src/cordic/enums.rs +++ b/embassy-stm32/src/cordic/enums.rs @@ -25,7 +25,7 @@ pub enum Precision { Iters16, Iters20, #[default] - Iters24, // this value is recomended by Reference Manual + Iters24, // this value is recommended by Reference Manual Iters28, Iters32, Iters36, diff --git a/embassy-stm32/src/cordic/errors.rs b/embassy-stm32/src/cordic/errors.rs index 9020d8467..653014290 100644 --- a/embassy-stm32/src/cordic/errors.rs +++ b/embassy-stm32/src/cordic/errors.rs @@ -45,7 +45,7 @@ impl defmt::Format for CordicError { } } -/// Error dring parsing [Cordic::Config](super::Config) +/// Error during parsing [Cordic::Config](super::Config) #[allow(dead_code)] #[derive(Debug)] pub struct ConfigError { diff --git a/embassy-stm32/src/cordic/mod.rs b/embassy-stm32/src/cordic/mod.rs index b0db3f060..f12efe2eb 100644 --- a/embassy-stm32/src/cordic/mod.rs +++ b/embassy-stm32/src/cordic/mod.rs @@ -91,8 +91,8 @@ impl<'d, T: Instance> Cordic<'d, T> { /// Create a Cordic driver instance /// /// Note: - /// If you need a periperhal -> CORDIC -> peripehral mode, - /// you may want to set Cordic into [Mode::ZeroOverhead] mode, and add extra arguemnts with [Self::extra_config] + /// If you need a peripheral -> CORDIC -> peripheral mode, + /// you may want to set Cordic into [Mode::ZeroOverhead] mode, and add extra arguments with [Self::extra_config] pub fn new(peri: impl Peripheral

+ 'd, config: Config) -> Self { T::enable_and_reset(); @@ -123,7 +123,7 @@ impl<'d, T: Instance> Cordic<'d, T> { self.peri.set_scale(self.config.scale); // we don't set NRES in here, but to make sure NRES is set each time user call "calc"-ish functions, - // since each "calc"-ish functions can have different ARGSIZE and RESSIZE, thus NRES should be change accrodingly. + // since each "calc"-ish functions can have different ARGSIZE and RESSIZE, thus NRES should be change accordingly. } async fn launch_a_dma_transfer( @@ -256,7 +256,7 @@ impl<'d, T: Instance> Cordic<'d, T> { self.blocking_write_f64(input_left[0])?; for &arg in input_left.iter().skip(1) { - // this line write arg for next round caculation to cordic, + // this line write arg for next round calculation to cordic, // and read result from last round self.blocking_write_f64(arg)?; self.blocking_read_f64_to_buf(output, &mut output_count); @@ -426,8 +426,8 @@ impl<'d, T: Instance> Cordic<'d, T> { write_dma: impl Peripheral

>, read_dma: impl Peripheral

>, double_input: bool, // gether extra info to calc output_buf size - input_buf: &[u32], // input_buf, its content should be extact values and length for calculation - output: &mut [f64], // caller uses should this as a final output array + input_buf: &[u32], // input_buf, its content should be exact length for calculation + output: &mut [f64], // caller should uses this buf as a final output array output_start_index: &mut usize, // the index of start point of the output for this round of calculation ) { // output_buf is the place to store raw value from CORDIC (via DMA). @@ -581,7 +581,7 @@ impl<'d, T: Instance> Cordic<'d, T> { // In q1.15 mode, we always fill 1 pair of 16bit value into WDATA register. // If arg2s is None or empty array, we assume arg2 value always 1.0 (as reset value for ARG2). // If arg2s has some value, and but not as long as arg1s, - // we fill the reset of arg2 values with last value from arg2s (as q1.31 version does) + // we fill the reset of arg2 values with last value from arg2s (as CORDIC behavior on q1.31 format) let arg2_default_value = match arg2s { Some(arg2s) if !arg2s.is_empty() => arg2s[arg2s.len() - 1], @@ -624,8 +624,8 @@ impl<'d, T: Instance> Cordic<'d, T> { &mut self, write_dma: impl Peripheral

>, read_dma: impl Peripheral

>, - input_buf: &[u32], // input_buf, its content should be extact values and length for calculation - output: &mut [f32], // caller uses should this as a final output array + input_buf: &[u32], // input_buf, its content should be exact length for calculation + output: &mut [f32], // caller should uses this buf as a final output array output_start_index: &mut usize, // the index of start point of the output for this round of calculation ) { // output_buf is the place to store raw value from CORDIC (via DMA). diff --git a/embassy-stm32/src/cordic/utils.rs b/embassy-stm32/src/cordic/utils.rs index 3c3ed224f..41821d6e2 100644 --- a/embassy-stm32/src/cordic/utils.rs +++ b/embassy-stm32/src/cordic/utils.rs @@ -25,7 +25,7 @@ macro_rules! floating_fixed_convert { }; // It's necessary to cast the float value to signed integer, before convert it to a unsigned value. - // Since value from register is actually a "signed value", a "as" cast will keep original binary format but mark it as unsgined value. + // Since value from register is actually a "signed value", a "as" cast will keep original binary format but mark it as a unsigned value for register writing. // see https://doc.rust-lang.org/reference/expressions/operator-expr.html#numeric-cast Ok((value * ((1 as $unsigned_bin_typ << $offset) as $float_ty)) as $signed_bin_typ as $unsigned_bin_typ) } @@ -34,7 +34,7 @@ macro_rules! floating_fixed_convert { /// convert fixed point to float point format pub fn $q_to_f(value: $unsigned_bin_typ) -> $float_ty { // It's necessary to cast the unsigned integer to signed integer, before convert it to a float value. - // Since value from register is actually a "signed value", a "as" cast will keep original binary format but mark it as signed value. + // Since value from register is actually a "signed value", a "as" cast will keep original binary format but mark it as a signed value. // see https://doc.rust-lang.org/reference/expressions/operator-expr.html#numeric-cast (value as $signed_bin_typ as $float_ty) / ((1 as $unsigned_bin_typ << $offset) as $float_ty) } From 441aa4c8cede2b63cc55b51db6eb89b1e35671f9 Mon Sep 17 00:00:00 2001 From: eZio Pan Date: Fri, 22 Mar 2024 00:39:43 +0800 Subject: [PATCH 023/581] stm32 CORDIC: make HIL run --- tests/stm32/src/bin/cordic.rs | 26 ++++++++++++++------------ 1 file changed, 14 insertions(+), 12 deletions(-) diff --git a/tests/stm32/src/bin/cordic.rs b/tests/stm32/src/bin/cordic.rs index b580cc79b..cd2e9d6f7 100644 --- a/tests/stm32/src/bin/cordic.rs +++ b/tests/stm32/src/bin/cordic.rs @@ -4,13 +4,15 @@ // Only test on STM32H563ZI, STM32U585AI and STM32U5a5JI. // STM32G491RE is not tested, since it memory.x has less memory size than it actually has, -// and the test seems use much memory than memory.x suggest. +// and the test seems use more memory than memory.x suggest. // see https://github.com/embassy-rs/stm32-data/issues/301#issuecomment-1925412561 #![no_std] #![no_main] -use defmt::*; +#[path = "../common.rs"] +mod common; +use common::*; use embassy_executor::Spawner; use embassy_stm32::{bind_interrupts, cordic, peripherals, rng}; use num_traits::Float; @@ -25,12 +27,12 @@ bind_interrupts!(struct Irqs { const ARG1_LENGTH: usize = 9; const ARG2_LENGTH: usize = 4; // this might not be the exact length of ARG2, since ARG2 need to be inside [0, 1] -const INPUT_Q1_31_LENGHT: usize = ARG1_LENGTH + ARG2_LENGTH; -const INPUT_U8_LENGTH: usize = 4 * INPUT_Q1_31_LENGHT; +const INPUT_Q1_31_LENGTH: usize = ARG1_LENGTH + ARG2_LENGTH; +const INPUT_U8_LENGTH: usize = 4 * INPUT_Q1_31_LENGTH; #[embassy_executor::main] async fn main(_spawner: Spawner) { - let dp = embassy_stm32::init(Default::default()); + let dp = embassy_stm32::init(config()); // // use RNG generate random Q1.31 value @@ -41,12 +43,12 @@ async fn main(_spawner: Spawner) { let mut rng = rng::Rng::new(dp.RNG, Irqs); let mut input_buf_u8 = [0u8; INPUT_U8_LENGTH]; - unwrap!(rng.async_fill_bytes(&mut input_buf_u8).await); + defmt::unwrap!(rng.async_fill_bytes(&mut input_buf_u8).await); // convert every [u8; 4] to a u32, for a Q1.31 value - let input_q1_31 = unsafe { core::mem::transmute::<[u8; INPUT_U8_LENGTH], [u32; INPUT_Q1_31_LENGHT]>(input_buf_u8) }; + let input_q1_31 = unsafe { core::mem::transmute::<[u8; INPUT_U8_LENGTH], [u32; INPUT_Q1_31_LENGTH]>(input_buf_u8) }; - let mut input_f64_buf = [0f64; INPUT_Q1_31_LENGHT]; + let mut input_f64_buf = [0f64; INPUT_Q1_31_LENGTH]; let mut cordic_output_f64_buf = [0f64; ARG1_LENGTH * 2]; @@ -66,13 +68,13 @@ async fn main(_spawner: Spawner) { } } - // the actal value feed to CORDIC + // the actual value feed to CORDIC let arg1_f64_ls = &input_f64_buf[..ARG1_LENGTH]; let arg2_f64_ls = &arg2_f64_buf[..arg2_f64_len]; let mut cordic = cordic::Cordic::new( dp.CORDIC, - unwrap!(cordic::Config::new( + defmt::unwrap!(cordic::Config::new( cordic::Function::Sin, Default::default(), Default::default(), @@ -138,9 +140,9 @@ async fn main(_spawner: Spawner) { } } - // This comparsion is just for fun. Since it not a equal compare: + // This comparison is just for fun. Since it not a equal compare: // software use 64-bit floating point, but CORDIC use 32-bit fixed point. - trace!( + defmt::trace!( "calculate count: {}, Cordic time: {} us, software time: {} us", ARG1_LENGTH, (cordic_end_point - cordic_start_point).as_micros(), From 83069e7b49bd181236e6a68005ad6119d39b39c3 Mon Sep 17 00:00:00 2001 From: eZio Pan Date: Fri, 22 Mar 2024 00:58:03 +0800 Subject: [PATCH 024/581] stm32 CORDIC: add example --- examples/stm32h5/src/bin/cordic.rs | 35 ++++++++++++++++++++++++++++++ 1 file changed, 35 insertions(+) create mode 100644 examples/stm32h5/src/bin/cordic.rs diff --git a/examples/stm32h5/src/bin/cordic.rs b/examples/stm32h5/src/bin/cordic.rs new file mode 100644 index 000000000..d49f75b8f --- /dev/null +++ b/examples/stm32h5/src/bin/cordic.rs @@ -0,0 +1,35 @@ +#![no_std] +#![no_main] + +use defmt::*; +use embassy_executor::Spawner; +use embassy_stm32::cordic; +use {defmt_rtt as _, panic_probe as _}; + +#[embassy_executor::main] +async fn main(_spawner: Spawner) { + let mut dp = embassy_stm32::init(Default::default()); + + let mut cordic = cordic::Cordic::new( + &mut dp.CORDIC, + unwrap!(cordic::Config::new( + cordic::Function::Sin, + Default::default(), + Default::default(), + false, + )), + ); + + let mut output = [0f64; 16]; + + let arg1 = [1.0, 0.0, -1.0]; // for trigonometric function, the ARG1 value [-pi, pi] should be map to [-1, 1] + let arg2 = [0.5, 1.0]; + + let cnt = unwrap!( + cordic + .async_calc_32bit(&mut dp.GPDMA1_CH0, &mut dp.GPDMA1_CH1, &arg1, Some(&arg2), &mut output,) + .await + ); + + println!("async calc 32bit: {}", output[..cnt]); +} From 0abcccee966af0b12e62fc7fae8499fa03194823 Mon Sep 17 00:00:00 2001 From: eZio Pan Date: Fri, 22 Mar 2024 17:29:10 +0800 Subject: [PATCH 025/581] stm32 CORDIC: re-design API --- embassy-stm32/src/cordic/errors.rs | 67 +-- embassy-stm32/src/cordic/mod.rs | 781 +++++++++++------------------ embassy-stm32/src/cordic/utils.rs | 15 +- examples/stm32h5/src/bin/cordic.rs | 59 ++- tests/stm32/src/bin/cordic.rs | 110 ++-- 5 files changed, 434 insertions(+), 598 deletions(-) diff --git a/embassy-stm32/src/cordic/errors.rs b/embassy-stm32/src/cordic/errors.rs index 653014290..3c70fc9e7 100644 --- a/embassy-stm32/src/cordic/errors.rs +++ b/embassy-stm32/src/cordic/errors.rs @@ -5,12 +5,14 @@ use super::{Function, Scale}; pub enum CordicError { /// Config error ConfigError(ConfigError), - /// Argument error - ArgError(ArgError), - /// Output buffer length error - OutputLengthNotEnough, + /// Argument length is incorrect + ArgumentLengthIncorrect, + /// Result buffer length error + ResultLengthNotEnough, /// Input value is out of range for Q1.x format NumberOutOfRange(NumberOutOfRange), + /// Argument error + ArgError(ArgError), } impl From for CordicError { @@ -19,18 +21,18 @@ impl From for CordicError { } } -impl From for CordicError { - fn from(value: ArgError) -> Self { - Self::ArgError(value) - } -} - impl From for CordicError { fn from(value: NumberOutOfRange) -> Self { Self::NumberOutOfRange(value) } } +impl From for CordicError { + fn from(value: ArgError) -> Self { + Self::ArgError(value) + } +} + #[cfg(feature = "defmt")] impl defmt::Format for CordicError { fn format(&self, fmt: defmt::Formatter) { @@ -38,9 +40,10 @@ impl defmt::Format for CordicError { match self { ConfigError(e) => defmt::write!(fmt, "{}", e), - ArgError(e) => defmt::write!(fmt, "{}", e), + ResultLengthNotEnough => defmt::write!(fmt, "Output buffer length is not long enough"), + ArgumentLengthIncorrect => defmt::write!(fmt, "Argument length incorrect"), NumberOutOfRange(e) => defmt::write!(fmt, "{}", e), - OutputLengthNotEnough => defmt::write!(fmt, "Output buffer length is not long enough"), + ArgError(e) => defmt::write!(fmt, "{}", e), } } } @@ -71,6 +74,26 @@ impl defmt::Format for ConfigError { } } +/// Input value is out of range for Q1.x format +#[allow(missing_docs)] +#[derive(Debug)] +pub enum NumberOutOfRange { + BelowLowerBound, + AboveUpperBound, +} + +#[cfg(feature = "defmt")] +impl defmt::Format for NumberOutOfRange { + fn format(&self, fmt: defmt::Formatter) { + use NumberOutOfRange::*; + + match self { + BelowLowerBound => defmt::write!(fmt, "input value should be equal or greater than -1"), + AboveUpperBound => defmt::write!(fmt, "input value should be equal or less than 1"), + } + } +} + /// Error on checking input arguments #[allow(dead_code)] #[derive(Debug)] @@ -119,23 +142,3 @@ pub(super) enum ArgType { Arg1, Arg2, } - -/// Input value is out of range for Q1.x format -#[allow(missing_docs)] -#[derive(Debug)] -pub enum NumberOutOfRange { - BelowLowerBound, - AboveUpperBound, -} - -#[cfg(feature = "defmt")] -impl defmt::Format for NumberOutOfRange { - fn format(&self, fmt: defmt::Formatter) { - use NumberOutOfRange::*; - - match self { - BelowLowerBound => defmt::write!(fmt, "input value should be equal or greater than -1"), - AboveUpperBound => defmt::write!(fmt, "input value should be equal or less than 1"), - } - } -} diff --git a/embassy-stm32/src/cordic/mod.rs b/embassy-stm32/src/cordic/mod.rs index f12efe2eb..2479e1b27 100644 --- a/embassy-stm32/src/cordic/mod.rs +++ b/embassy-stm32/src/cordic/mod.rs @@ -21,8 +21,6 @@ pub mod low_level { pub use super::sealed::*; } -const INPUT_BUF_MAX_LEN: usize = 16; - /// CORDIC driver pub struct Cordic<'d, T: Instance> { peri: PeripheralRef<'d, T>, @@ -38,17 +36,15 @@ pub struct Config { function: Function, precision: Precision, scale: Scale, - res1_only: bool, } impl Config { /// Create a config for Cordic driver - pub fn new(function: Function, precision: Precision, scale: Scale, res1_only: bool) -> Result { + pub fn new(function: Function, precision: Precision, scale: Scale) -> Result { let config = Self { function, precision, scale, - res1_only, }; config.check_scale()?; @@ -117,7 +113,32 @@ impl<'d, T: Instance> Cordic<'d, T> { self.peri.set_data_width(arg_width, res_width); } - fn reconfigure(&mut self) { + fn clean_rrdy_flag(&mut self) { + while self.peri.ready_to_read() { + self.peri.read_result(); + } + } + + /// Disable IRQ and DMA, clean RRDY, and set ARG2 to +1 (0x7FFFFFFF) + pub fn reconfigure(&mut self) { + // reset ARG2 to +1 + { + self.peri.disable_irq(); + self.peri.disable_read_dma(); + self.peri.disable_write_dma(); + self.clean_rrdy_flag(); + + self.peri.set_func(Function::Cos); + self.peri.set_precision(Precision::Iters4); + self.peri.set_scale(Scale::Arg1Res1); + self.peri.set_argument_count(AccessCount::Two); + self.peri.set_data_width(Width::Bits32, Width::Bits32); + self.peri.write_argument(0x0u32); + self.peri.write_argument(0x7FFFFFFFu32); + + self.clean_rrdy_flag(); + } + self.peri.set_func(self.config.function); self.peri.set_precision(self.config.precision); self.peri.set_scale(self.config.scale); @@ -125,16 +146,154 @@ impl<'d, T: Instance> Cordic<'d, T> { // we don't set NRES in here, but to make sure NRES is set each time user call "calc"-ish functions, // since each "calc"-ish functions can have different ARGSIZE and RESSIZE, thus NRES should be change accordingly. } +} - async fn launch_a_dma_transfer( +impl<'d, T: Instance> Drop for Cordic<'d, T> { + fn drop(&mut self) { + T::disable(); + } +} + +// q1.31 related +impl<'d, T: Instance> Cordic<'d, T> { + /// Run a blocking CORDIC calculation in q1.31 format + /// + /// Notice: + /// If you set `arg1_only` to `true`, please be sure ARG2 value has been set to desired value before. + /// This function won't set ARG2 to +1 before or after each round of calculation. + /// If you want to make sure ARG2 is set to +1, consider run [.reconfigure()](Self::reconfigure). + pub fn blocking_calc_32bit( + &mut self, + arg: &[u32], + res: &mut [u32], + arg1_only: bool, + res1_only: bool, + ) -> Result { + if arg.is_empty() { + return Ok(0); + } + + let res_cnt = Self::check_arg_res_length_32bit(arg.len(), res.len(), arg1_only, res1_only)?; + + self.peri + .set_argument_count(if arg1_only { AccessCount::One } else { AccessCount::Two }); + + self.peri + .set_result_count(if res1_only { AccessCount::One } else { AccessCount::Two }); + + self.peri.set_data_width(Width::Bits32, Width::Bits32); + + let mut cnt = 0; + + match arg1_only { + true => { + // To use cordic preload function, the first value is special. + // It is loaded to CORDIC WDATA register out side of loop + let first_value = arg[0]; + + // preload 1st value to CORDIC, to start the CORDIC calc + self.peri.write_argument(first_value); + + for &arg1 in &arg[1..] { + // preload arg1 (for next calc) + self.peri.write_argument(arg1); + + // then read current result out + res[cnt] = self.peri.read_result(); + cnt += 1; + if !res1_only { + res[cnt] = self.peri.read_result(); + cnt += 1; + } + } + + // read the last result + res[cnt] = self.peri.read_result(); + cnt += 1; + if !res1_only { + res[cnt] = self.peri.read_result(); + // cnt += 1; + } + } + false => { + // To use cordic preload function, the first and last value is special. + // They are load to CORDIC WDATA register out side of loop + let first_value = arg[0]; + let last_value = arg[arg.len() - 1]; + + let paired_args = &arg[1..arg.len() - 1]; + + // preload 1st value to CORDIC + self.peri.write_argument(first_value); + + for args in paired_args.chunks(2) { + let arg2 = args[0]; + let arg1 = args[1]; + + // load arg2 (for current calc) first, to start the CORDIC calc + self.peri.write_argument(arg2); + + // preload arg1 (for next calc) + self.peri.write_argument(arg1); + + // then read current result out + res[cnt] = self.peri.read_result(); + cnt += 1; + if !res1_only { + res[cnt] = self.peri.read_result(); + cnt += 1; + } + } + + // load last value to CORDIC, and finish the calculation + self.peri.write_argument(last_value); + res[cnt] = self.peri.read_result(); + cnt += 1; + if !res1_only { + res[cnt] = self.peri.read_result(); + // cnt += 1; + } + } + } + + // at this point cnt should be equal to res_cnt + + Ok(res_cnt) + } + + /// Run a async CORDIC calculation in q.1.31 format + /// + /// Notice: + /// If you set `arg1_only` to `true`, please be sure ARG2 value has been set to desired value before. + /// This function won't set ARG2 to +1 before or after each round of calculation. + /// If you want to make sure ARG2 is set to +1, consider run [.reconfigure()](Self::reconfigure). + pub async fn async_calc_32bit( &mut self, write_dma: impl Peripheral

>, read_dma: impl Peripheral

>, - input: &[u32], - output: &mut [u32], - ) { + arg: &[u32], + res: &mut [u32], + arg1_only: bool, + res1_only: bool, + ) -> Result { + if arg.is_empty() { + return Ok(0); + } + + let res_cnt = Self::check_arg_res_length_32bit(arg.len(), res.len(), arg1_only, res1_only)?; + + let active_res_buf = &mut res[..res_cnt]; + into_ref!(write_dma, read_dma); + self.peri + .set_argument_count(if arg1_only { AccessCount::One } else { AccessCount::Two }); + + self.peri + .set_result_count(if res1_only { AccessCount::One } else { AccessCount::Two }); + + self.peri.set_data_width(Width::Bits32, Width::Bits32); + let write_req = write_dma.request(); let read_req = read_dma.request(); @@ -150,7 +309,7 @@ impl<'d, T: Instance> Cordic<'d, T> { let write_transfer = dma::Transfer::new_write( &mut write_dma, write_req, - input, + arg, T::regs().wdata().as_ptr() as *mut _, Default::default(), ); @@ -159,328 +318,60 @@ impl<'d, T: Instance> Cordic<'d, T> { &mut read_dma, read_req, T::regs().rdata().as_ptr() as *mut _, - output, + active_res_buf, Default::default(), ); embassy_futures::join::join(write_transfer, read_transfer).await; } - } -} -impl<'d, T: Instance> Drop for Cordic<'d, T> { - fn drop(&mut self) { - T::disable(); + Ok(res_cnt) } -} -// q1.31 related -impl<'d, T: Instance> Cordic<'d, T> { - /// Run a blocking CORDIC calculation in q1.31 format - pub fn blocking_calc_32bit( - &mut self, - arg1s: &[f64], - arg2s: Option<&[f64]>, - output: &mut [f64], + fn check_arg_res_length_32bit( + arg_len: usize, + res_len: usize, + arg1_only: bool, + res1_only: bool, ) -> Result { - if arg1s.is_empty() { - return Ok(0); + if !arg1_only && arg_len % 2 != 0 { + return Err(CordicError::ArgumentLengthIncorrect); } - let output_length_enough = match self.config.res1_only { - true => output.len() >= arg1s.len(), - false => output.len() >= 2 * arg1s.len(), - }; + let mut minimal_res_length = arg_len; - if !output_length_enough { - return Err(CordicError::OutputLengthNotEnough); + if !res1_only { + minimal_res_length *= 2; } - self.check_input_f64(arg1s, arg2s)?; - - self.peri.set_result_count(if self.config.res1_only { - AccessCount::One - } else { - AccessCount::Two - }); - - self.peri.set_data_width(Width::Bits32, Width::Bits32); - - let mut output_count = 0; - - let mut consumed_input_len = 0; - - // - // handle 2 input args calculation - // - - if arg2s.is_some() && !arg2s.unwrap().is_empty() { - let arg2s = arg2s.unwrap(); - - self.peri.set_argument_count(AccessCount::Two); - - // Skip 1st value from arg1s, this value will be manually "preload" to cordic, to make use of cordic preload function. - // And we preserve last value from arg2s, since it need to manually write to cordic, and read the result out. - let double_input = arg1s.iter().skip(1).zip(&arg2s[..arg2s.len() - 1]); - // Since we preload 1st value from arg1s, the consumed input length is double_input length + 1. - consumed_input_len = double_input.len() + 1; - - // preload first value from arg1 to cordic - self.blocking_write_f64(arg1s[0])?; - - for (&arg1, &arg2) in double_input { - // Since we manually preload a value before, - // we will write arg2 (from the actual last pair) first, (at this moment, cordic start to calculating,) - // and write arg1 (from the actual next pair), then read the result, to "keep preloading" - - self.blocking_write_f64(arg2)?; - self.blocking_write_f64(arg1)?; - self.blocking_read_f64_to_buf(output, &mut output_count); - } - - // write last input value from arg2s, then read out the result - self.blocking_write_f64(arg2s[arg2s.len() - 1])?; - self.blocking_read_f64_to_buf(output, &mut output_count); + if !arg1_only { + minimal_res_length /= 2 } - // - // handle 1 input arg calculation - // - - let input_left = &arg1s[consumed_input_len..]; - - if !input_left.is_empty() { - self.peri.set_argument_count(AccessCount::One); - - // "preload" value to cordic (at this moment, cordic start to calculating) - self.blocking_write_f64(input_left[0])?; - - for &arg in input_left.iter().skip(1) { - // this line write arg for next round calculation to cordic, - // and read result from last round - self.blocking_write_f64(arg)?; - self.blocking_read_f64_to_buf(output, &mut output_count); - } - - // read the last output - self.blocking_read_f64_to_buf(output, &mut output_count); + if minimal_res_length > res_len { + return Err(CordicError::ResultLengthNotEnough); } - Ok(output_count) - } - - fn blocking_read_f64_to_buf(&mut self, result_buf: &mut [f64], result_index: &mut usize) { - result_buf[*result_index] = utils::q1_31_to_f64(self.peri.read_result()); - *result_index += 1; - - // We don't care about whether the function return 1 or 2 results, - // the only thing matter is whether user want 1 or 2 results. - if !self.config.res1_only { - result_buf[*result_index] = utils::q1_31_to_f64(self.peri.read_result()); - *result_index += 1; - } - } - - fn blocking_write_f64(&mut self, arg: f64) -> Result<(), NumberOutOfRange> { - self.peri.write_argument(utils::f64_to_q1_31(arg)?); - Ok(()) - } - - /// Run a async CORDIC calculation in q.1.31 format - pub async fn async_calc_32bit( - &mut self, - write_dma: impl Peripheral

>, - read_dma: impl Peripheral

>, - arg1s: &[f64], - arg2s: Option<&[f64]>, - output: &mut [f64], - ) -> Result { - if arg1s.is_empty() { - return Ok(0); - } - - let output_length_enough = match self.config.res1_only { - true => output.len() >= arg1s.len(), - false => output.len() >= 2 * arg1s.len(), - }; - - if !output_length_enough { - return Err(CordicError::OutputLengthNotEnough); - } - - self.check_input_f64(arg1s, arg2s)?; - - into_ref!(write_dma, read_dma); - - self.peri.set_result_count(if self.config.res1_only { - AccessCount::One - } else { - AccessCount::Two - }); - - self.peri.set_data_width(Width::Bits32, Width::Bits32); - - let mut output_count = 0; - let mut consumed_input_len = 0; - let mut input_buf = [0u32; INPUT_BUF_MAX_LEN]; - let mut input_buf_len = 0; - - // - // handle 2 input args calculation - // - - if !arg2s.unwrap_or_default().is_empty() { - let arg2s = arg2s.unwrap(); - - self.peri.set_argument_count(AccessCount::Two); - - let double_input = arg1s.iter().zip(arg2s); - - consumed_input_len = double_input.len(); - - for (&arg1, &arg2) in double_input { - for &arg in [arg1, arg2].iter() { - input_buf[input_buf_len] = utils::f64_to_q1_31(arg)?; - input_buf_len += 1; - } - - if input_buf_len == INPUT_BUF_MAX_LEN { - self.inner_dma_calc_32bit( - &mut write_dma, - &mut read_dma, - true, - &input_buf[..input_buf_len], - output, - &mut output_count, - ) - .await; - - input_buf_len = 0; - } - } - - if input_buf_len > 0 { - self.inner_dma_calc_32bit( - &mut write_dma, - &mut read_dma, - true, - &input_buf[..input_buf_len], - output, - &mut output_count, - ) - .await; - - input_buf_len = 0; - } - } - - // - // handle 1 input arg calculation - // - - if arg1s.len() > consumed_input_len { - let input_remain = &arg1s[consumed_input_len..]; - - self.peri.set_argument_count(AccessCount::One); - - for &arg in input_remain { - input_buf[input_buf_len] = utils::f64_to_q1_31(arg)?; - input_buf_len += 1; - - if input_buf_len == INPUT_BUF_MAX_LEN { - self.inner_dma_calc_32bit( - &mut write_dma, - &mut read_dma, - false, - &input_buf[..input_buf_len], - output, - &mut output_count, - ) - .await; - - input_buf_len = 0; - } - } - - if input_buf_len > 0 { - self.inner_dma_calc_32bit( - &mut write_dma, - &mut read_dma, - false, - &input_buf[..input_buf_len], - output, - &mut output_count, - ) - .await; - - // input_buf_len = 0; - } - } - - Ok(output_count) - } - - // this function is highly coupled with async_calc_32bit, and is not intended to use in other place - async fn inner_dma_calc_32bit( - &mut self, - write_dma: impl Peripheral

>, - read_dma: impl Peripheral

>, - double_input: bool, // gether extra info to calc output_buf size - input_buf: &[u32], // input_buf, its content should be exact length for calculation - output: &mut [f64], // caller should uses this buf as a final output array - output_start_index: &mut usize, // the index of start point of the output for this round of calculation - ) { - // output_buf is the place to store raw value from CORDIC (via DMA). - // For buf size, we assume in this round of calculation: - // all input is 1 arg, and all calculation need 2 output, - // thus output_buf will always be long enough. - let mut output_buf = [0u32; INPUT_BUF_MAX_LEN * 2]; - - let mut output_buf_size = input_buf.len(); - if !self.config.res1_only { - // if we need 2 result for 1 input, then output_buf length should be 2x long. - output_buf_size *= 2; - }; - if double_input { - // if input itself is 2 args for 1 calculation, then output_buf length should be /2. - output_buf_size /= 2; - } - - let active_output_buf = &mut output_buf[..output_buf_size]; - - self.launch_a_dma_transfer(write_dma, read_dma, input_buf, active_output_buf) - .await; - - for &mut output_u32 in active_output_buf { - output[*output_start_index] = utils::q1_31_to_f64(output_u32); - *output_start_index += 1; - } + Ok(minimal_res_length) } } // q1.15 related impl<'d, T: Instance> Cordic<'d, T> { - /// Run a blocking CORDIC calculation in q1.15 format - pub fn blocking_calc_16bit( - &mut self, - arg1s: &[f32], - arg2s: Option<&[f32]>, - output: &mut [f32], - ) -> Result { - if arg1s.is_empty() { + /// Run a blocking CORDIC calculation in q1.15 format + /// + /// Notice:: + /// User will take respond to merge two u16 arguments into one u32 data, and/or split one u32 data into two u16 results. + pub fn blocking_calc_16bit(&mut self, arg: &[u32], res: &mut [u32]) -> Result { + if arg.is_empty() { return Ok(0); } - let output_length_enough = match self.config.res1_only { - true => output.len() >= arg1s.len(), - false => output.len() >= 2 * arg1s.len(), - }; - - if !output_length_enough { - return Err(CordicError::OutputLengthNotEnough); + if arg.len() > res.len() { + return Err(CordicError::ResultLengthNotEnough); } - self.check_input_f32(arg1s, arg2s)?; + let res_cnt = arg.len(); // In q1.15 mode, 1 write/read to access 2 arguments/results self.peri.set_argument_count(AccessCount::One); @@ -488,83 +379,53 @@ impl<'d, T: Instance> Cordic<'d, T> { self.peri.set_data_width(Width::Bits16, Width::Bits16); - let mut output_count = 0; + // To use cordic preload function, the first value is special. + // It is loaded to CORDIC WDATA register out side of loop + let first_value = arg[0]; - // In q1.15 mode, we always fill 1 pair of 16bit value into WDATA register. - // If arg2s is None or empty array, we assume arg2 value always 1.0 (as reset value for ARG2). - // If arg2s has some value, and but not as long as arg1s, - // we fill the reset of arg2 values with last value from arg2s (as q1.31 version does) + // preload 1st value to CORDIC, to start the CORDIC calc + self.peri.write_argument(first_value); - let arg2_default_value = match arg2s { - Some(arg2s) if !arg2s.is_empty() => arg2s[arg2s.len() - 1], - _ => 1.0, - }; + let mut cnt = 0; - let mut args = arg1s.iter().zip( - arg2s - .unwrap_or(&[]) - .iter() - .chain(core::iter::repeat(&arg2_default_value)), - ); + for &arg_val in &arg[1..] { + // preload arg_val (for next calc) + self.peri.write_argument(arg_val); - let (&arg1, &arg2) = args.next().unwrap(); - - // preloading 1 pair of arguments - self.blocking_write_f32(arg1, arg2)?; - - for (&arg1, &arg2) in args { - self.blocking_write_f32(arg1, arg2)?; - self.blocking_read_f32_to_buf(output, &mut output_count); + // then read current result out + res[cnt] = self.peri.read_result(); + cnt += 1; } - // read last pair of value from cordic - self.blocking_read_f32_to_buf(output, &mut output_count); + // read last result out + res[cnt] = self.peri.read_result(); + // cnt += 1; - Ok(output_count) + Ok(res_cnt) } - fn blocking_write_f32(&mut self, arg1: f32, arg2: f32) -> Result<(), NumberOutOfRange> { - self.peri.write_argument(utils::f32_args_to_u32(arg1, arg2)?); - Ok(()) - } - - fn blocking_read_f32_to_buf(&mut self, result_buf: &mut [f32], result_index: &mut usize) { - let (res1, res2) = utils::u32_to_f32_res(self.peri.read_result()); - - result_buf[*result_index] = res1; - *result_index += 1; - - // We don't care about whether the function return 1 or 2 results, - // the only thing matter is whether user want 1 or 2 results. - if !self.config.res1_only { - result_buf[*result_index] = res2; - *result_index += 1; - } - } - - /// Run a async CORDIC calculation in q1.15 format + /// Run a async CORDIC calculation in q1.15 format + /// + /// Notice:: + /// User will take respond to merge two u16 arguments into one u32 data, and/or split one u32 data into two u16 results. pub async fn async_calc_16bit( &mut self, write_dma: impl Peripheral

>, read_dma: impl Peripheral

>, - arg1s: &[f32], - arg2s: Option<&[f32]>, - output: &mut [f32], + arg: &[u32], + res: &mut [u32], ) -> Result { - if arg1s.is_empty() { + if arg.is_empty() { return Ok(0); } - let output_length_enough = match self.config.res1_only { - true => output.len() >= arg1s.len(), - false => output.len() >= 2 * arg1s.len(), - }; - - if !output_length_enough { - return Err(CordicError::OutputLengthNotEnough); + if arg.len() > res.len() { + return Err(CordicError::ResultLengthNotEnough); } - self.check_input_f32(arg1s, arg2s)?; + let res_cnt = arg.len(); + + let active_res_buf = &mut res[..res_cnt]; into_ref!(write_dma, read_dma); @@ -574,142 +435,96 @@ impl<'d, T: Instance> Cordic<'d, T> { self.peri.set_data_width(Width::Bits16, Width::Bits16); - let mut output_count = 0; - let mut input_buf = [0u32; INPUT_BUF_MAX_LEN]; - let mut input_buf_len = 0; + let write_req = write_dma.request(); + let read_req = read_dma.request(); - // In q1.15 mode, we always fill 1 pair of 16bit value into WDATA register. - // If arg2s is None or empty array, we assume arg2 value always 1.0 (as reset value for ARG2). - // If arg2s has some value, and but not as long as arg1s, - // we fill the reset of arg2 values with last value from arg2s (as CORDIC behavior on q1.31 format) + self.peri.enable_write_dma(); + self.peri.enable_read_dma(); - let arg2_default_value = match arg2s { - Some(arg2s) if !arg2s.is_empty() => arg2s[arg2s.len() - 1], - _ => 1.0, - }; + let _on_drop = OnDrop::new(|| { + self.peri.disable_write_dma(); + self.peri.disable_read_dma(); + }); - let args = arg1s.iter().zip( - arg2s - .unwrap_or(&[]) - .iter() - .chain(core::iter::repeat(&arg2_default_value)), - ); - - for (&arg1, &arg2) in args { - input_buf[input_buf_len] = utils::f32_args_to_u32(arg1, arg2)?; - input_buf_len += 1; - - if input_buf_len == INPUT_BUF_MAX_LEN { - self.inner_dma_calc_16bit(&mut write_dma, &mut read_dma, &input_buf, output, &mut output_count) - .await; - } - } - - if input_buf_len > 0 { - self.inner_dma_calc_16bit( + unsafe { + let write_transfer = dma::Transfer::new_write( &mut write_dma, + write_req, + arg, + T::regs().wdata().as_ptr() as *mut _, + Default::default(), + ); + + let read_transfer = dma::Transfer::new_read( &mut read_dma, - &input_buf[..input_buf_len], - output, - &mut output_count, - ) - .await; + read_req, + T::regs().rdata().as_ptr() as *mut _, + active_res_buf, + Default::default(), + ); + + embassy_futures::join::join(write_transfer, read_transfer).await; } - Ok(output_count) - } - - // this function is highly coupled with async_calc_16bit, and is not intended to use in other place - async fn inner_dma_calc_16bit( - &mut self, - write_dma: impl Peripheral

>, - read_dma: impl Peripheral

>, - input_buf: &[u32], // input_buf, its content should be exact length for calculation - output: &mut [f32], // caller should uses this buf as a final output array - output_start_index: &mut usize, // the index of start point of the output for this round of calculation - ) { - // output_buf is the place to store raw value from CORDIC (via DMA). - let mut output_buf = [0u32; INPUT_BUF_MAX_LEN]; - - let active_output_buf = &mut output_buf[..input_buf.len()]; - - self.launch_a_dma_transfer(write_dma, read_dma, input_buf, active_output_buf) - .await; - - for &mut output_u32 in active_output_buf { - let (res1, res2) = utils::u32_to_f32_res(output_u32); - - output[*output_start_index] = res1; - *output_start_index += 1; - - if !self.config.res1_only { - output[*output_start_index] = res2; - *output_start_index += 1; - } - } + Ok(res_cnt) } } -// check input value ARG1, ARG2, SCALE and FUNCTION are compatible with each other -macro_rules! check_input_value { - ($func_name:ident, $float_type:ty) => { +macro_rules! check_arg_value { + ($func_arg1_name:ident, $func_arg2_name:ident, $float_type:ty) => { impl<'d, T: Instance> Cordic<'d, T> { - fn $func_name(&self, arg1s: &[$float_type], arg2s: Option<&[$float_type]>) -> Result<(), ArgError> { + /// check input value ARG1, SCALE and FUNCTION are compatible with each other + pub fn $func_arg1_name(&self, arg: $float_type) -> Result<(), ArgError> { let config = &self.config; use Function::*; struct Arg1ErrInfo { scale: Option, - range: [f32; 2], + range: [f32; 2], // f32 is ok, it only used in error display inclusive_upper_bound: bool, } - // check ARG1 value let err_info = match config.function { - Cos | Sin | Phase | Modulus | Arctan if arg1s.iter().any(|v| !(-1.0..=1.0).contains(v)) => { - Some(Arg1ErrInfo { - scale: None, - range: [-1.0, 1.0], - inclusive_upper_bound: true, - }) - } + Cos | Sin | Phase | Modulus | Arctan if !(-1.0..=1.0).contains(arg) => Some(Arg1ErrInfo { + scale: None, + range: [-1.0, 1.0], + inclusive_upper_bound: true, + }), - Cosh | Sinh if arg1s.iter().any(|v| !(-0.559..=0.559).contains(v)) => Some(Arg1ErrInfo { + Cosh | Sinh if !(-0.559..=0.559).contains(arg) => Some(Arg1ErrInfo { scale: None, range: [-0.559, 0.559], inclusive_upper_bound: true, }), - Arctanh if arg1s.iter().any(|v| !(-0.403..=0.403).contains(v)) => Some(Arg1ErrInfo { + Arctanh if !(-0.403..=0.403).contains(arg) => Some(Arg1ErrInfo { scale: None, range: [-0.403, 0.403], inclusive_upper_bound: true, }), Ln => match config.scale { - Scale::Arg1o2Res2 if arg1s.iter().any(|v| !(0.0535..0.5).contains(v)) => Some(Arg1ErrInfo { + Scale::Arg1o2Res2 if !(0.0535..0.5).contains(arg) => Some(Arg1ErrInfo { scale: Some(Scale::Arg1o2Res2), range: [0.0535, 0.5], inclusive_upper_bound: false, }), - Scale::Arg1o4Res4 if arg1s.iter().any(|v| !(0.25..0.75).contains(v)) => Some(Arg1ErrInfo { + Scale::Arg1o4Res4 if !(0.25..0.75).contains(arg) => Some(Arg1ErrInfo { scale: Some(Scale::Arg1o4Res4), range: [0.25, 0.75], inclusive_upper_bound: false, }), - Scale::Arg1o8Res8 if arg1s.iter().any(|v| !(0.375..0.875).contains(v)) => Some(Arg1ErrInfo { + Scale::Arg1o8Res8 if !(0.375..0.875).contains(arg) => Some(Arg1ErrInfo { scale: Some(Scale::Arg1o8Res8), range: [0.375, 0.875], inclusive_upper_bound: false, }), - Scale::Arg1o16Res16 if arg1s.iter().any(|v| !(0.4375..0.584).contains(v)) => { - Some(Arg1ErrInfo { - scale: Some(Scale::Arg1o16Res16), - range: [0.4375, 0.584], - inclusive_upper_bound: false, - }) - } + Scale::Arg1o16Res16 if !(0.4375..0.584).contains(arg) => Some(Arg1ErrInfo { + scale: Some(Scale::Arg1o16Res16), + range: [0.4375, 0.584], + inclusive_upper_bound: false, + }), Scale::Arg1o2Res2 | Scale::Arg1o4Res4 | Scale::Arg1o8Res8 | Scale::Arg1o16Res16 => None, @@ -717,17 +532,17 @@ macro_rules! check_input_value { }, Sqrt => match config.scale { - Scale::Arg1Res1 if arg1s.iter().any(|v| !(0.027..0.75).contains(v)) => Some(Arg1ErrInfo { + Scale::Arg1Res1 if !(0.027..0.75).contains(arg) => Some(Arg1ErrInfo { scale: Some(Scale::Arg1Res1), range: [0.027, 0.75], inclusive_upper_bound: false, }), - Scale::Arg1o2Res2 if arg1s.iter().any(|v| !(0.375..0.875).contains(v)) => Some(Arg1ErrInfo { + Scale::Arg1o2Res2 if !(0.375..0.875).contains(arg) => Some(Arg1ErrInfo { scale: Some(Scale::Arg1o2Res2), range: [0.375, 0.875], inclusive_upper_bound: false, }), - Scale::Arg1o4Res4 if arg1s.iter().any(|v| !(0.4375..0.584).contains(v)) => Some(Arg1ErrInfo { + Scale::Arg1o4Res4 if !(0.4375..0.584).contains(arg) => Some(Arg1ErrInfo { scale: Some(Scale::Arg1o4Res4), range: [0.4375, 0.584], inclusive_upper_bound: false, @@ -749,33 +564,35 @@ macro_rules! check_input_value { }); } - // check ARG2 value - if let Some(arg2s) = arg2s { - struct Arg2ErrInfo { - range: [f32; 2], - } + Ok(()) + } - let err_info = match config.function { - Cos | Sin if arg2s.iter().any(|v| !(0.0..=1.0).contains(v)) => { - Some(Arg2ErrInfo { range: [0.0, 1.0] }) - } + /// check input value ARG2 and FUNCTION are compatible with each other + pub fn $func_arg2_name(&self, arg: $float_type) -> Result<(), ArgError> { + let config = &self.config; - Phase | Modulus if arg2s.iter().any(|v| !(-1.0..=1.0).contains(v)) => { - Some(Arg2ErrInfo { range: [-1.0, 1.0] }) - } + use Function::*; - Cos | Sin | Phase | Modulus | Arctan | Cosh | Sinh | Arctanh | Ln | Sqrt => None, - }; + struct Arg2ErrInfo { + range: [f32; 2], // f32 is ok, it only used in error display + } - if let Some(err) = err_info { - return Err(ArgError { - func: config.function, - scale: None, - arg_range: err.range, - inclusive_upper_bound: true, - arg_type: ArgType::Arg2, - }); - } + let err_info = match config.function { + Cos | Sin if !(0.0..=1.0).contains(arg) => Some(Arg2ErrInfo { range: [0.0, 1.0] }), + + Phase | Modulus if !(-1.0..=1.0).contains(arg) => Some(Arg2ErrInfo { range: [-1.0, 1.0] }), + + Cos | Sin | Phase | Modulus | Arctan | Cosh | Sinh | Arctanh | Ln | Sqrt => None, + }; + + if let Some(err) = err_info { + return Err(ArgError { + func: config.function, + scale: None, + arg_range: err.range, + inclusive_upper_bound: true, + arg_type: ArgType::Arg2, + }); } Ok(()) @@ -784,8 +601,8 @@ macro_rules! check_input_value { }; } -check_input_value!(check_input_f64, f64); -check_input_value!(check_input_f32, f32); +check_arg_value!(check_f64_arg1, check_f64_arg2, &f64); +check_arg_value!(check_f32_arg1, check_f32_arg2, &f32); foreach_interrupt!( ($inst:ident, cordic, $block:ident, GLOBAL, $irq:ident) => { diff --git a/embassy-stm32/src/cordic/utils.rs b/embassy-stm32/src/cordic/utils.rs index 41821d6e2..008f50270 100644 --- a/embassy-stm32/src/cordic/utils.rs +++ b/embassy-stm32/src/cordic/utils.rs @@ -1,4 +1,4 @@ -//! Common match utils +//! Common math utils use super::errors::NumberOutOfRange; macro_rules! floating_fixed_convert { @@ -60,16 +60,3 @@ floating_fixed_convert!( 15, 0x3800_0000u32 // binary form of 1f32^(-15) ); - -#[inline(always)] -pub(crate) fn f32_args_to_u32(arg1: f32, arg2: f32) -> Result { - Ok(f32_to_q1_15(arg1)? as u32 + ((f32_to_q1_15(arg2)? as u32) << 16)) -} - -#[inline(always)] -pub(crate) fn u32_to_f32_res(reg_value: u32) -> (f32, f32) { - let res1 = q1_15_to_f32((reg_value & ((1u32 << 16) - 1)) as u16); - let res2 = q1_15_to_f32((reg_value >> 16) as u16); - - (res1, res2) -} diff --git a/examples/stm32h5/src/bin/cordic.rs b/examples/stm32h5/src/bin/cordic.rs index d49f75b8f..73e873574 100644 --- a/examples/stm32h5/src/bin/cordic.rs +++ b/examples/stm32h5/src/bin/cordic.rs @@ -3,7 +3,7 @@ use defmt::*; use embassy_executor::Spawner; -use embassy_stm32::cordic; +use embassy_stm32::cordic::{self, utils}; use {defmt_rtt as _, panic_probe as _}; #[embassy_executor::main] @@ -16,20 +16,63 @@ async fn main(_spawner: Spawner) { cordic::Function::Sin, Default::default(), Default::default(), - false, )), ); - let mut output = [0f64; 16]; + // for output buf, the length is not that strict, larger than minimal required is ok. + let mut output_f64 = [0f64; 19]; + let mut output_u32 = [0u32; 21]; - let arg1 = [1.0, 0.0, -1.0]; // for trigonometric function, the ARG1 value [-pi, pi] should be map to [-1, 1] - let arg2 = [0.5, 1.0]; + // tips: + // CORDIC peripheral has some strict on input value, you can also use ".check_argX_fXX()" methods + // to make sure your input values are compatible with current CORDIC setup. + let arg1 = [-1.0, -0.5, 0.0, 0.5, 1.0]; // for trigonometric function, the ARG1 value [-pi, pi] should be map to [-1, 1] + let arg2 = [0.5]; // and for Sin function, ARG2 should be in [0, 1] - let cnt = unwrap!( + let mut input_buf = [0u32; 9]; + + // convert input from floating point to fixed point + input_buf[0] = unwrap!(utils::f64_to_q1_31(arg1[0])); + input_buf[1] = unwrap!(utils::f64_to_q1_31(arg2[0])); + + // If input length is small, blocking mode can be used to minimize overhead. + let cnt0 = unwrap!(cordic.blocking_calc_32bit( + &input_buf[..2], // input length is strict, since driver use its length to detect calculation count + &mut output_u32, + false, + false + )); + + // convert result from fixed point into floating point + for (&u32_val, f64_val) in output_u32[..cnt0].iter().zip(output_f64.iter_mut()) { + *f64_val = utils::q1_31_to_f64(u32_val); + } + + // convert input from floating point to fixed point + // + // first value from arg1 is used, so truncate to arg1[1..] + for (&f64_val, u32_val) in arg1[1..].iter().zip(input_buf.iter_mut()) { + *u32_val = unwrap!(utils::f64_to_q1_31(f64_val)); + } + + // If calculation is a little longer, async mode can make use of DMA, and let core do some other stuff. + let cnt1 = unwrap!( cordic - .async_calc_32bit(&mut dp.GPDMA1_CH0, &mut dp.GPDMA1_CH1, &arg1, Some(&arg2), &mut output,) + .async_calc_32bit( + &mut dp.GPDMA1_CH0, + &mut dp.GPDMA1_CH1, + &input_buf[..arg1.len() - 1], // limit input buf to its actual length + &mut output_u32, + true, + false + ) .await ); - println!("async calc 32bit: {}", output[..cnt]); + // convert result from fixed point into floating point + for (&u32_val, f64_val) in output_u32[..cnt1].iter().zip(output_f64[cnt0..cnt0 + cnt1].iter_mut()) { + *f64_val = utils::q1_31_to_f64(u32_val); + } + + println!("result: {}", output_f64[..cnt0 + cnt1]); } diff --git a/tests/stm32/src/bin/cordic.rs b/tests/stm32/src/bin/cordic.rs index cd2e9d6f7..669fd96ab 100644 --- a/tests/stm32/src/bin/cordic.rs +++ b/tests/stm32/src/bin/cordic.rs @@ -14,6 +14,7 @@ mod common; use common::*; use embassy_executor::Spawner; +use embassy_stm32::cordic::utils; use embassy_stm32::{bind_interrupts, cordic, peripherals, rng}; use num_traits::Float; use {defmt_rtt as _, panic_probe as _}; @@ -24,11 +25,12 @@ bind_interrupts!(struct Irqs { /* input value control, can be changed */ -const ARG1_LENGTH: usize = 9; -const ARG2_LENGTH: usize = 4; // this might not be the exact length of ARG2, since ARG2 need to be inside [0, 1] +const INPUT_U32_COUNT: usize = 9; +const INPUT_U8_COUNT: usize = 4 * INPUT_U32_COUNT; -const INPUT_Q1_31_LENGTH: usize = ARG1_LENGTH + ARG2_LENGTH; -const INPUT_U8_LENGTH: usize = 4 * INPUT_Q1_31_LENGTH; +// Assume first calculation needs 2 arguments, the reset needs 1 argument. +// And all calculation generate 2 results. +const OUTPUT_LENGTH: usize = (INPUT_U32_COUNT - 1) * 2; #[embassy_executor::main] async fn main(_spawner: Spawner) { @@ -42,43 +44,28 @@ async fn main(_spawner: Spawner) { let mut rng = rng::Rng::new(dp.RNG, Irqs); - let mut input_buf_u8 = [0u8; INPUT_U8_LENGTH]; + let mut input_buf_u8 = [0u8; INPUT_U8_COUNT]; defmt::unwrap!(rng.async_fill_bytes(&mut input_buf_u8).await); // convert every [u8; 4] to a u32, for a Q1.31 value - let input_q1_31 = unsafe { core::mem::transmute::<[u8; INPUT_U8_LENGTH], [u32; INPUT_Q1_31_LENGTH]>(input_buf_u8) }; + let mut input_q1_31 = unsafe { core::mem::transmute::<[u8; INPUT_U8_COUNT], [u32; INPUT_U32_COUNT]>(input_buf_u8) }; - let mut input_f64_buf = [0f64; INPUT_Q1_31_LENGTH]; + // ARG2 for Sin function should be inside [0, 1], set MSB to 0 of a Q1.31 value, will make sure it's no less than 0. + input_q1_31[1] &= !(1u32 << 31); - let mut cordic_output_f64_buf = [0f64; ARG1_LENGTH * 2]; + // + // CORDIC calculation + // - // convert Q1.31 value back to f64, for software calculation verify - for (val_u32, val_f64) in input_q1_31.iter().zip(input_f64_buf.iter_mut()) { - *val_f64 = cordic::utils::q1_31_to_f64(*val_u32); - } - - let mut arg2_f64_buf = [0f64; ARG2_LENGTH]; - let mut arg2_f64_len = 0; - - // check if ARG2 is in range [0, 1] (limited by CORDIC peripheral with Sin mode) - for &arg2 in &input_f64_buf[ARG1_LENGTH..] { - if arg2 >= 0.0 { - arg2_f64_buf[arg2_f64_len] = arg2; - arg2_f64_len += 1; - } - } - - // the actual value feed to CORDIC - let arg1_f64_ls = &input_f64_buf[..ARG1_LENGTH]; - let arg2_f64_ls = &arg2_f64_buf[..arg2_f64_len]; + let mut output_q1_31 = [0u32; OUTPUT_LENGTH]; + // setup Cordic driver let mut cordic = cordic::Cordic::new( dp.CORDIC, defmt::unwrap!(cordic::Config::new( cordic::Function::Sin, Default::default(), Default::default(), - false, )), ); @@ -88,67 +75,66 @@ async fn main(_spawner: Spawner) { #[cfg(any(feature = "stm32h563zi", feature = "stm32u585ai", feature = "stm32u5a5zj"))] let (mut write_dma, mut read_dma) = (dp.GPDMA1_CH4, dp.GPDMA1_CH5); - let cordic_start_point = embassy_time::Instant::now(); + // calculate first result using blocking mode + let cnt0 = defmt::unwrap!(cordic.blocking_calc_32bit(&input_q1_31[..2], &mut output_q1_31, false, false)); - let cnt = unwrap!( + // calculate rest results using async mode + let cnt1 = defmt::unwrap!( cordic .async_calc_32bit( &mut write_dma, &mut read_dma, - arg1_f64_ls, - Some(arg2_f64_ls), - &mut cordic_output_f64_buf, + &input_q1_31[2..], + &mut output_q1_31[cnt0..], + true, + false, ) .await ); - let cordic_end_point = embassy_time::Instant::now(); + // all output value length should be the same as our output buffer size + defmt::assert_eq!(cnt0 + cnt1, output_q1_31.len()); - // since we get 2 output for 1 calculation, the output length should be ARG1_LENGTH * 2 - defmt::assert!(cnt == ARG1_LENGTH * 2); + let mut cordic_result_f64 = [0.0f64; OUTPUT_LENGTH]; - let mut software_output_f64_buf = [0f64; ARG1_LENGTH * 2]; + for (f64_val, u32_val) in cordic_result_f64.iter_mut().zip(output_q1_31) { + *f64_val = utils::q1_31_to_f64(u32_val); + } - // for software calc, if there is no ARG2 value, insert a 1.0 as value (the reset value for ARG2 in CORDIC) - let arg2_f64_ls = if arg2_f64_len == 0 { &[1.0] } else { arg2_f64_ls }; + // + // software calculation + // - let software_inputs = arg1_f64_ls + let mut software_result_f64 = [0.0f64; OUTPUT_LENGTH]; + + let arg2 = utils::q1_31_to_f64(input_q1_31[1]); + + for (&arg1, res) in input_q1_31 .iter() - .zip( - arg2_f64_ls - .iter() - .chain(core::iter::repeat(&arg2_f64_ls[arg2_f64_ls.len() - 1])), - ) - .zip(software_output_f64_buf.chunks_mut(2)); + .enumerate() + .filter_map(|(idx, val)| if idx != 1 { Some(val) } else { None }) + .zip(software_result_f64.chunks_mut(2)) + { + let arg1 = utils::q1_31_to_f64(arg1); - let software_start_point = embassy_time::Instant::now(); - - for ((arg1, arg2), res) in software_inputs { let (raw_res1, raw_res2) = (arg1 * core::f64::consts::PI).sin_cos(); - (res[0], res[1]) = (raw_res1 * arg2, raw_res2 * arg2); } - let software_end_point = embassy_time::Instant::now(); + // + // check result are the same + // - for (cordic_res, software_res) in cordic_output_f64_buf[..cnt] + for (cordic_res, software_res) in cordic_result_f64[..cnt0 + cnt1] .chunks(2) - .zip(software_output_f64_buf.chunks(2)) + .zip(software_result_f64.chunks(2)) { for (cord_res, soft_res) in cordic_res.iter().zip(software_res.iter()) { + // 2.0.powi(-19) is the max residual error for Sin function, in q1.31 format, with 24 iterations (aka PRECISION = 6) defmt::assert!((cord_res - soft_res).abs() <= 2.0.powi(-19)); } } - // This comparison is just for fun. Since it not a equal compare: - // software use 64-bit floating point, but CORDIC use 32-bit fixed point. - defmt::trace!( - "calculate count: {}, Cordic time: {} us, software time: {} us", - ARG1_LENGTH, - (cordic_end_point - cordic_start_point).as_micros(), - (software_end_point - software_start_point).as_micros() - ); - info!("Test OK"); cortex_m::asm::bkpt(); } From 8fa1d06a6a7bf3d00ac87319ac71953237535c43 Mon Sep 17 00:00:00 2001 From: eZio Pan Date: Sat, 23 Mar 2024 09:04:09 +0800 Subject: [PATCH 026/581] stm32 CORDIC: use private_bounds for sealed traits. --- embassy-stm32/src/cordic/mod.rs | 16 ++++++---------- embassy-stm32/src/cordic/sealed.rs | 2 +- 2 files changed, 7 insertions(+), 11 deletions(-) diff --git a/embassy-stm32/src/cordic/mod.rs b/embassy-stm32/src/cordic/mod.rs index 2479e1b27..6bbc48f2b 100644 --- a/embassy-stm32/src/cordic/mod.rs +++ b/embassy-stm32/src/cordic/mod.rs @@ -11,16 +11,11 @@ pub use enums::*; mod errors; pub use errors::*; +mod sealed; +use self::sealed::SealedInstance; + pub mod utils; -pub(crate) mod sealed; - -/// Low-level CORDIC access. -#[cfg(feature = "unstable-pac")] -pub mod low_level { - pub use super::sealed::*; -} - /// CORDIC driver pub struct Cordic<'d, T: Instance> { peri: PeripheralRef<'d, T>, @@ -28,7 +23,8 @@ pub struct Cordic<'d, T: Instance> { } /// CORDIC instance trait -pub trait Instance: sealed::Instance + Peripheral

+ crate::rcc::RccPeripheral {} +#[allow(private_bounds)] +pub trait Instance: SealedInstance + Peripheral

+ crate::rcc::RccPeripheral {} /// CORDIC configuration #[derive(Debug)] @@ -609,7 +605,7 @@ foreach_interrupt!( impl Instance for peripherals::$inst { } - impl sealed::Instance for peripherals::$inst { + impl SealedInstance for peripherals::$inst { fn regs() -> crate::pac::cordic::Cordic { crate::pac::$inst } diff --git a/embassy-stm32/src/cordic/sealed.rs b/embassy-stm32/src/cordic/sealed.rs index f9521ff7a..8f0bd1830 100644 --- a/embassy-stm32/src/cordic/sealed.rs +++ b/embassy-stm32/src/cordic/sealed.rs @@ -2,7 +2,7 @@ use super::*; use crate::pac::cordic::vals; /// Cordic instance -pub trait Instance { +pub(super) trait SealedInstance { /// Get access to CORDIC registers fn regs() -> crate::pac::cordic::Cordic; From 79eabc95aa3b627dcfec92491979b433e25a09ba Mon Sep 17 00:00:00 2001 From: eZio Pan Date: Sat, 23 Mar 2024 09:53:19 +0800 Subject: [PATCH 027/581] stm32 CORDIC: add g491re back to cordic test --- tests/stm32/Cargo.toml | 2 +- tests/stm32/src/bin/cordic.rs | 11 +++-------- 2 files changed, 4 insertions(+), 9 deletions(-) diff --git a/tests/stm32/Cargo.toml b/tests/stm32/Cargo.toml index 345c72a03..b19af98a0 100644 --- a/tests/stm32/Cargo.toml +++ b/tests/stm32/Cargo.toml @@ -14,7 +14,7 @@ stm32f429zi = ["embassy-stm32/stm32f429zi", "chrono", "eth", "stop", "can", "not stm32f446re = ["embassy-stm32/stm32f446re", "chrono", "stop", "can", "not-gpdma", "dac", "sdmmc"] stm32f767zi = ["embassy-stm32/stm32f767zi", "chrono", "not-gpdma", "eth", "rng"] stm32g071rb = ["embassy-stm32/stm32g071rb", "cm0", "not-gpdma", "dac", "ucpd"] -stm32g491re = ["embassy-stm32/stm32g491re", "chrono", "stop", "not-gpdma", "rng", "fdcan"] +stm32g491re = ["embassy-stm32/stm32g491re", "chrono", "stop", "not-gpdma", "rng", "fdcan", "cordic"] stm32h563zi = ["embassy-stm32/stm32h563zi", "chrono", "eth", "rng", "hash", "cordic"] stm32h753zi = ["embassy-stm32/stm32h753zi", "chrono", "not-gpdma", "eth", "rng", "fdcan", "hash", "cryp"] stm32h755zi = ["embassy-stm32/stm32h755zi-cm7", "chrono", "not-gpdma", "eth", "dac", "rng", "fdcan", "hash", "cryp"] diff --git a/tests/stm32/src/bin/cordic.rs b/tests/stm32/src/bin/cordic.rs index 669fd96ab..400e10207 100644 --- a/tests/stm32/src/bin/cordic.rs +++ b/tests/stm32/src/bin/cordic.rs @@ -2,11 +2,6 @@ // Test Cordic driver, with Q1.31 format, Sin function, at 24 iterations (aka PRECISION = 6), using DMA transfer -// Only test on STM32H563ZI, STM32U585AI and STM32U5a5JI. -// STM32G491RE is not tested, since it memory.x has less memory size than it actually has, -// and the test seems use more memory than memory.x suggest. -// see https://github.com/embassy-rs/stm32-data/issues/301#issuecomment-1925412561 - #![no_std] #![no_main] @@ -69,11 +64,11 @@ async fn main(_spawner: Spawner) { )), ); - //#[cfg(feature = "stm32g491re")] - //let (mut write_dma, mut read_dma) = (dp.DMA1_CH4, dp.DMA1_CH5); + #[cfg(feature = "stm32g491re")] + let (mut write_dma, mut read_dma) = (dp.DMA1_CH4, dp.DMA1_CH5); #[cfg(any(feature = "stm32h563zi", feature = "stm32u585ai", feature = "stm32u5a5zj"))] - let (mut write_dma, mut read_dma) = (dp.GPDMA1_CH4, dp.GPDMA1_CH5); + let (mut write_dma, mut read_dma) = (dp.GPDMA1_CH0, dp.GPDMA1_CH1); // calculate first result using blocking mode let cnt0 = defmt::unwrap!(cordic.blocking_calc_32bit(&input_q1_31[..2], &mut output_q1_31, false, false)); From 6b2e15e318c05a66f17575cde4987353a52108a4 Mon Sep 17 00:00:00 2001 From: eZio Pan Date: Tue, 26 Mar 2024 14:43:09 +0800 Subject: [PATCH 028/581] stm32 CORDIC: exclude stm32u5a --- embassy-stm32/build.rs | 9 +++++++-- embassy-stm32/src/lib.rs | 5 +++-- tests/stm32/Cargo.toml | 2 +- 3 files changed, 11 insertions(+), 5 deletions(-) diff --git a/embassy-stm32/build.rs b/embassy-stm32/build.rs index e224cc5a2..057c4cee2 100644 --- a/embassy-stm32/build.rs +++ b/embassy-stm32/build.rs @@ -1139,13 +1139,18 @@ fn main() { (("timer", "CH2"), quote!(crate::timer::Ch2Dma)), (("timer", "CH3"), quote!(crate::timer::Ch3Dma)), (("timer", "CH4"), quote!(crate::timer::Ch4Dma)), - (("cordic", "WRITE"), quote!(crate::cordic::WriteDma)), - (("cordic", "READ"), quote!(crate::cordic::ReadDma)), + (("cordic", "WRITE"), quote!(crate::cordic::WriteDma)), // FIXME: stm32u5a crash on Cordic driver + (("cordic", "READ"), quote!(crate::cordic::ReadDma)), // FIXME: stm32u5a crash on Cordic driver ] .into(); for p in METADATA.peripherals { if let Some(regs) = &p.registers { + // FIXME: stm32u5a crash on Cordic driver + if chip_name.starts_with("stm32u5a") && regs.kind == "cordic" { + continue; + } + let mut dupe = HashSet::new(); for ch in p.dma_channels { // Some chips have multiple request numbers for the same (peri, signal, channel) combos. diff --git a/embassy-stm32/src/lib.rs b/embassy-stm32/src/lib.rs index ae2e95435..dd4aef51e 100644 --- a/embassy-stm32/src/lib.rs +++ b/embassy-stm32/src/lib.rs @@ -32,7 +32,8 @@ pub mod timer; pub mod adc; #[cfg(can)] pub mod can; -#[cfg(cordic)] +// FIXME: Cordic driver cause stm32u5a5zj crash +#[cfg(all(cordic, not(any(stm32u5a5, stm32u5a9))))] pub mod cordic; #[cfg(crc)] pub mod crc; @@ -236,7 +237,7 @@ pub fn init(config: Config) -> Peripherals { #[cfg(dbgmcu)] crate::pac::DBGMCU.cr().modify(|cr| { - #[cfg(any(dbgmcu_h5))] + #[cfg(dbgmcu_h5)] { cr.set_stop(config.enable_debug_during_sleep); cr.set_standby(config.enable_debug_during_sleep); diff --git a/tests/stm32/Cargo.toml b/tests/stm32/Cargo.toml index b19af98a0..e09083111 100644 --- a/tests/stm32/Cargo.toml +++ b/tests/stm32/Cargo.toml @@ -26,7 +26,7 @@ stm32l4a6zg = ["embassy-stm32/stm32l4a6zg", "chrono", "not-gpdma", "rng", "hash" stm32l4r5zi = ["embassy-stm32/stm32l4r5zi", "chrono", "not-gpdma", "rng"] stm32l552ze = ["embassy-stm32/stm32l552ze", "not-gpdma", "rng", "hash"] stm32u585ai = ["embassy-stm32/stm32u585ai", "chrono", "rng", "hash", "cordic"] -stm32u5a5zj = ["embassy-stm32/stm32u5a5zj", "chrono", "rng", "hash", "cordic"] +stm32u5a5zj = ["embassy-stm32/stm32u5a5zj", "chrono", "rng", "hash"] # FIXME: cordic test cause it crash stm32wb55rg = ["embassy-stm32/stm32wb55rg", "chrono", "not-gpdma", "ble", "mac" , "rng"] stm32wba52cg = ["embassy-stm32/stm32wba52cg", "chrono", "rng", "hash"] stm32wl55jc = ["embassy-stm32/stm32wl55jc-cm4", "not-gpdma", "rng", "chrono"] From 1acc34bfaa43dfc3410396cb20e371128e693d1a Mon Sep 17 00:00:00 2001 From: Emilie Burgun Date: Tue, 26 Mar 2024 17:43:22 +0100 Subject: [PATCH 029/581] Remove the need for TxDma to be a DMA channel in the blocking UartTx impl --- embassy-stm32/src/usart/mod.rs | 2 -- 1 file changed, 2 deletions(-) diff --git a/embassy-stm32/src/usart/mod.rs b/embassy-stm32/src/usart/mod.rs index 7ab33043a..62ea717b3 100644 --- a/embassy-stm32/src/usart/mod.rs +++ b/embassy-stm32/src/usart/mod.rs @@ -1260,7 +1260,6 @@ where impl embedded_io::Write for Uart<'_, T, TxDma, RxDma> where T: BasicInstance, - TxDma: crate::usart::TxDma, { fn write(&mut self, buf: &[u8]) -> Result { self.blocking_write(buf)?; @@ -1275,7 +1274,6 @@ where impl embedded_io::Write for UartTx<'_, T, TxDma> where T: BasicInstance, - TxDma: crate::usart::TxDma, { fn write(&mut self, buf: &[u8]) -> Result { self.blocking_write(buf)?; From cf11d28d628f48e8f3b048deae76e7d18c0a2eec Mon Sep 17 00:00:00 2001 From: eZio Pan Date: Wed, 27 Mar 2024 00:55:44 +0800 Subject: [PATCH 030/581] stm32 H5: LSE low drive mode is not functional --- embassy-stm32/src/rcc/bd.rs | 2 ++ 1 file changed, 2 insertions(+) diff --git a/embassy-stm32/src/rcc/bd.rs b/embassy-stm32/src/rcc/bd.rs index 39407b28c..54d3c662b 100644 --- a/embassy-stm32/src/rcc/bd.rs +++ b/embassy-stm32/src/rcc/bd.rs @@ -24,6 +24,7 @@ pub struct LseConfig { #[allow(dead_code)] #[derive(Default, Clone, Copy)] pub enum LseDrive { + #[cfg(not(stm32h5))] // ES0565: LSE Low drive mode is not functional Low = 0, MediumLow = 0x01, #[default] @@ -38,6 +39,7 @@ impl From for crate::pac::rcc::vals::Lsedrv { use crate::pac::rcc::vals::Lsedrv; match value { + #[cfg(not(stm32h5))] // ES0565: LSE Low drive mode is not functional LseDrive::Low => Lsedrv::LOW, LseDrive::MediumLow => Lsedrv::MEDIUMLOW, LseDrive::MediumHigh => Lsedrv::MEDIUMHIGH, From 82046c46913dd9a45ec035805eb504d54edfefd5 Mon Sep 17 00:00:00 2001 From: schmettow Date: Tue, 26 Mar 2024 22:26:44 +0100 Subject: [PATCH 031/581] Added YLab project to "in the wild" YLab uses Embassy --- docs/modules/ROOT/pages/embassy_in_the_wild.adoc | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/docs/modules/ROOT/pages/embassy_in_the_wild.adoc b/docs/modules/ROOT/pages/embassy_in_the_wild.adoc index 85ad7f4a2..75208a883 100644 --- a/docs/modules/ROOT/pages/embassy_in_the_wild.adoc +++ b/docs/modules/ROOT/pages/embassy_in_the_wild.adoc @@ -9,3 +9,11 @@ Here are known examples of real-world projects which make use of Embassy. Feel f * The link:https://github.com/lora-rs/lora-rs[lora-rs] project includes link:https://github.com/lora-rs/lora-rs/tree/main/examples/stm32l0/src/bin[various standalone examples] for NRF52840, RP2040, STM32L0 and STM32WL ** link:https://github.com/matoushybl/air-force-one[Air force one: A simple air quality monitoring system] *** Targets nRF52 and uses nrf-softdevice + +* link:https://github.com/schmettow/ylab-edge-go[YLab Edge Go] and link:https://github.com/schmettow/ylab-edge-pro[YLab Edge Pro] projects develop +firmware (RP2040, STM32) for capturing physiological data in behavioural science research. Included so far are: +** biopotentials (analog ports) +** motion capture (6-axis accelerometers) +** air quality (CO2, Temp, Humidity) +** comes with an app for capturing and visualizing data [link:https://github.com/schmettow/ystudio[Ystudio]] + From 746ded94b13d037c5be16071d2d9d195b979c0c7 Mon Sep 17 00:00:00 2001 From: Sebastian Goll Date: Wed, 20 Mar 2024 19:52:36 +0100 Subject: [PATCH 032/581] Fix minor typos --- embassy-stm32/src/i2c/v1.rs | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/embassy-stm32/src/i2c/v1.rs b/embassy-stm32/src/i2c/v1.rs index 9f29ed5e0..563bbfdaf 100644 --- a/embassy-stm32/src/i2c/v1.rs +++ b/embassy-stm32/src/i2c/v1.rs @@ -58,10 +58,10 @@ pub unsafe fn on_interrupt() { /// - `ST` = start condition /// - `SR` = repeated start condition /// - `SP` = stop condition +/// - `ACK`/`NACK` = last byte in read operation #[derive(Copy, Clone)] enum FrameOptions { - /// `[ST/SR]+[NACK]+[SP]` First frame (of this type) in operation and last frame overall in this - /// transaction. + /// `[ST/SR]+[NACK]+[SP]` First frame (of this type) in transaction and also last frame overall. FirstAndLastFrame, /// `[ST/SR]+[NACK]` First frame of this type in transaction, last frame in a read operation but /// not the last frame overall. From 0885c102d3c332591b2d913113cde08fca8fe41b Mon Sep 17 00:00:00 2001 From: Sebastian Goll Date: Wed, 20 Mar 2024 20:11:59 +0100 Subject: [PATCH 033/581] Refactor async I2C transfers to use frame options --- embassy-stm32/src/i2c/v1.rs | 341 +++++++++++++++++++----------------- 1 file changed, 183 insertions(+), 158 deletions(-) diff --git a/embassy-stm32/src/i2c/v1.rs b/embassy-stm32/src/i2c/v1.rs index 563bbfdaf..2751d443f 100644 --- a/embassy-stm32/src/i2c/v1.rs +++ b/embassy-stm32/src/i2c/v1.rs @@ -459,7 +459,7 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> { }); } - async fn write_with_stop(&mut self, address: u8, write: &[u8], send_stop: bool) -> Result<(), Error> + async fn write_frame(&mut self, address: u8, write: &[u8], frame: FrameOptions) -> Result<(), Error> where TXDMA: crate::i2c::TxDma, { @@ -487,74 +487,76 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> { }) }); - Self::enable_interrupts(); - - // Send a START condition - T::regs().cr1().modify(|reg| { - reg.set_start(true); - }); - let state = T::state(); - // Wait until START condition was generated - poll_fn(|cx| { - state.waker.register(cx.waker()); + if frame.send_start() { + // Send a START condition + Self::enable_interrupts(); + T::regs().cr1().modify(|reg| { + reg.set_start(true); + }); - match Self::check_and_clear_error_flags() { - Err(e) => Poll::Ready(Err(e)), - Ok(sr1) => { - if sr1.start() { - Poll::Ready(Ok(())) - } else { - Poll::Pending + // Wait until START condition was generated + poll_fn(|cx| { + state.waker.register(cx.waker()); + + match Self::check_and_clear_error_flags() { + Err(e) => Poll::Ready(Err(e)), + Ok(sr1) => { + if sr1.start() { + Poll::Ready(Ok(())) + } else { + Poll::Pending + } } } - } - }) - .await?; + }) + .await?; - // Also wait until signalled we're master and everything is waiting for us - Self::enable_interrupts(); - poll_fn(|cx| { - state.waker.register(cx.waker()); + // Also wait until signalled we're master and everything is waiting for us + Self::enable_interrupts(); + poll_fn(|cx| { + state.waker.register(cx.waker()); - match Self::check_and_clear_error_flags() { - Err(e) => Poll::Ready(Err(e)), - Ok(_) => { - let sr2 = T::regs().sr2().read(); - if !sr2.msl() && !sr2.busy() { - Poll::Pending - } else { - Poll::Ready(Ok(())) + match Self::check_and_clear_error_flags() { + Err(e) => Poll::Ready(Err(e)), + Ok(_) => { + let sr2 = T::regs().sr2().read(); + if !sr2.msl() && !sr2.busy() { + Poll::Pending + } else { + Poll::Ready(Ok(())) + } } } - } - }) - .await?; + }) + .await?; - // Set up current address, we're trying to talk to - Self::enable_interrupts(); - T::regs().dr().write(|reg| reg.set_dr(address << 1)); + // Set up current address, we're trying to talk to + Self::enable_interrupts(); + T::regs().dr().write(|reg| reg.set_dr(address << 1)); - poll_fn(|cx| { - state.waker.register(cx.waker()); - match Self::check_and_clear_error_flags() { - Err(e) => Poll::Ready(Err(e)), - Ok(sr1) => { - if sr1.addr() { - // Clear the ADDR condition by reading SR2. - T::regs().sr2().read(); - Poll::Ready(Ok(())) - } else { - // If we need to go around, then re-enable the interrupts, otherwise nothing - // can wake us up and we'll hang. - Self::enable_interrupts(); - Poll::Pending + poll_fn(|cx| { + state.waker.register(cx.waker()); + match Self::check_and_clear_error_flags() { + Err(e) => Poll::Ready(Err(e)), + Ok(sr1) => { + if sr1.addr() { + // Clear the ADDR condition by reading SR2. + T::regs().sr2().read(); + Poll::Ready(Ok(())) + } else { + // If we need to go around, then re-enable the interrupts, otherwise nothing + // can wake us up and we'll hang. + Self::enable_interrupts(); + Poll::Pending + } } } - } - }) - .await?; + }) + .await?; + } + Self::enable_interrupts(); let poll_error = poll_fn(|cx| { state.waker.register(cx.waker()); @@ -591,7 +593,7 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> { Err(e) => Poll::Ready(Err(e)), Ok(sr1) => { if sr1.btf() { - if send_stop { + if frame.send_stop() { T::regs().cr1().modify(|w| { w.set_stop(true); }); @@ -606,6 +608,21 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> { }) .await?; + if frame.send_stop() { + // Wait for STOP condition to transmit. + Self::enable_interrupts(); + poll_fn(|cx| { + T::state().waker.register(cx.waker()); + // TODO: error interrupts are enabled here, should we additional check for and return errors? + if T::regs().cr1().read().stop() { + Poll::Pending + } else { + Poll::Ready(Ok(())) + } + }) + .await?; + } + drop(on_drop); // Fallthrough is success @@ -617,26 +634,24 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> { where TXDMA: crate::i2c::TxDma, { - self.write_with_stop(address, write, true).await?; - - // Wait for STOP condition to transmit. - Self::enable_interrupts(); - poll_fn(|cx| { - T::state().waker.register(cx.waker()); - // TODO: error interrupts are enabled here, should we additional check for and return errors? - if T::regs().cr1().read().stop() { - Poll::Pending - } else { - Poll::Ready(Ok(())) - } - }) - .await?; + self.write_frame(address, write, FrameOptions::FirstAndLastFrame) + .await?; Ok(()) } /// Read. pub async fn read(&mut self, address: u8, buffer: &mut [u8]) -> Result<(), Error> + where + RXDMA: crate::i2c::RxDma, + { + self.read_frame(address, buffer, FrameOptions::FirstAndLastFrame) + .await?; + + Ok(()) + } + + async fn read_frame(&mut self, address: u8, buffer: &mut [u8], frame: FrameOptions) -> Result<(), Error> where RXDMA: crate::i2c::RxDma, { @@ -667,98 +682,99 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> { }) }); - Self::enable_interrupts(); + if frame.send_start() { + // Send a START condition and set ACK bit + Self::enable_interrupts(); + T::regs().cr1().modify(|reg| { + reg.set_start(true); + reg.set_ack(true); + }); - // Send a START condition and set ACK bit - T::regs().cr1().modify(|reg| { - reg.set_start(true); - reg.set_ack(true); - }); + // Wait until START condition was generated + poll_fn(|cx| { + state.waker.register(cx.waker()); - // Wait until START condition was generated - poll_fn(|cx| { - state.waker.register(cx.waker()); - - match Self::check_and_clear_error_flags() { - Err(e) => Poll::Ready(Err(e)), - Ok(sr1) => { - if sr1.start() { - Poll::Ready(Ok(())) - } else { - Poll::Pending - } - } - } - }) - .await?; - - // Also wait until signalled we're master and everything is waiting for us - Self::enable_interrupts(); - poll_fn(|cx| { - state.waker.register(cx.waker()); - - // blocking read didn’t have a check_and_clear call here, but blocking write did so - // I’m adding it here in case that was an oversight. - match Self::check_and_clear_error_flags() { - Err(e) => Poll::Ready(Err(e)), - Ok(_) => { - let sr2 = T::regs().sr2().read(); - if !sr2.msl() && !sr2.busy() { - Poll::Pending - } else { - Poll::Ready(Ok(())) - } - } - } - }) - .await?; - - // Set up current address, we're trying to talk to - T::regs().dr().write(|reg| reg.set_dr((address << 1) + 1)); - - // Wait for the address to be acknowledged - - Self::enable_interrupts(); - poll_fn(|cx| { - state.waker.register(cx.waker()); - - match Self::check_and_clear_error_flags() { - Err(e) => Poll::Ready(Err(e)), - Ok(sr1) => { - if sr1.addr() { - // 18.3.8: When a single byte must be received: the NACK must be programmed during EV6 - // event, i.e. program ACK=0 when ADDR=1, before clearing ADDR flag. - if buffer_len == 1 { - T::regs().cr1().modify(|w| { - w.set_ack(false); - }); + match Self::check_and_clear_error_flags() { + Err(e) => Poll::Ready(Err(e)), + Ok(sr1) => { + if sr1.start() { + Poll::Ready(Ok(())) + } else { + Poll::Pending } - Poll::Ready(Ok(())) - } else { - Poll::Pending } } - } - }) - .await?; + }) + .await?; - // Clear ADDR condition by reading SR2 - T::regs().sr2().read(); + // Also wait until signalled we're master and everything is waiting for us + Self::enable_interrupts(); + poll_fn(|cx| { + state.waker.register(cx.waker()); + + // blocking read didn’t have a check_and_clear call here, but blocking write did so + // I’m adding it here in case that was an oversight. + match Self::check_and_clear_error_flags() { + Err(e) => Poll::Ready(Err(e)), + Ok(_) => { + let sr2 = T::regs().sr2().read(); + if !sr2.msl() && !sr2.busy() { + Poll::Pending + } else { + Poll::Ready(Ok(())) + } + } + } + }) + .await?; + + // Set up current address, we're trying to talk to + T::regs().dr().write(|reg| reg.set_dr((address << 1) + 1)); + + // Wait for the address to be acknowledged + + Self::enable_interrupts(); + poll_fn(|cx| { + state.waker.register(cx.waker()); + + match Self::check_and_clear_error_flags() { + Err(e) => Poll::Ready(Err(e)), + Ok(sr1) => { + if sr1.addr() { + // 18.3.8: When a single byte must be received: the NACK must be programmed during EV6 + // event, i.e. program ACK=0 when ADDR=1, before clearing ADDR flag. + if buffer_len == 1 && frame.send_nack() { + T::regs().cr1().modify(|w| { + w.set_ack(false); + }); + } + Poll::Ready(Ok(())) + } else { + Poll::Pending + } + } + } + }) + .await?; + + // Clear ADDR condition by reading SR2 + T::regs().sr2().read(); + } // 18.3.8: When a single byte must be received: [snip] Then the // user can program the STOP condition either after clearing ADDR flag, or in the // DMA Transfer Complete interrupt routine. - if buffer_len == 1 { + if buffer_len == 1 && frame.send_stop() { T::regs().cr1().modify(|w| { w.set_stop(true); }); - } else { + } else if buffer_len != 1 && frame.send_nack() { // If, in the I2C_CR2 register, the LAST bit is set, I2C // automatically sends a NACK after the next byte following EOT_1. The user can // generate a Stop condition in the DMA Transfer Complete interrupt routine if enabled. T::regs().cr2().modify(|w| { w.set_last(true); - }) + }); } // Wait for bytes to be received, or an error to occur. @@ -777,18 +793,27 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> { _ => Ok(()), }?; - // Wait for the STOP to be sent (STOP bit cleared). - Self::enable_interrupts(); - poll_fn(|cx| { - state.waker.register(cx.waker()); - // TODO: error interrupts are enabled here, should we additional check for and return errors? - if T::regs().cr1().read().stop() { - Poll::Pending - } else { - Poll::Ready(Ok(())) + if frame.send_stop() { + if buffer_len != 1 { + T::regs().cr1().modify(|w| { + w.set_stop(true); + }); } - }) - .await?; + + // Wait for the STOP to be sent (STOP bit cleared). + Self::enable_interrupts(); + poll_fn(|cx| { + state.waker.register(cx.waker()); + // TODO: error interrupts are enabled here, should we additional check for and return errors? + if T::regs().cr1().read().stop() { + Poll::Pending + } else { + Poll::Ready(Ok(())) + } + }) + .await?; + } + drop(on_drop); // Fallthrough is success @@ -801,8 +826,8 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> { RXDMA: crate::i2c::RxDma, TXDMA: crate::i2c::TxDma, { - self.write_with_stop(address, write, false).await?; - self.read(address, read).await + self.write_frame(address, write, FrameOptions::FirstFrame).await?; + self.read_frame(address, read, FrameOptions::FirstAndLastFrame).await } } From 9c00a40e73f49aa0d46a47259fe8adc8c3f248b8 Mon Sep 17 00:00:00 2001 From: Sebastian Goll Date: Thu, 21 Mar 2024 00:25:39 +0100 Subject: [PATCH 034/581] Extract frame options generation into iterator to reuse in async --- embassy-stm32/src/i2c/v1.rs | 102 ++++++++++++++++++++---------------- 1 file changed, 58 insertions(+), 44 deletions(-) diff --git a/embassy-stm32/src/i2c/v1.rs b/embassy-stm32/src/i2c/v1.rs index 2751d443f..dd2cea6b8 100644 --- a/embassy-stm32/src/i2c/v1.rs +++ b/embassy-stm32/src/i2c/v1.rs @@ -5,7 +5,7 @@ //! All other devices (as of 2023-12-28) use [`v2`](super::v2) instead. use core::future::poll_fn; -use core::task::Poll; +use core::{iter, task::Poll}; use embassy_embedded_hal::SetConfig; use embassy_futures::select::{select, Either}; @@ -103,6 +103,62 @@ impl FrameOptions { } } +/// Iterates over operations in transaction. +/// +/// Returns necessary frame options for each operation to uphold the [transaction contract] and have +/// the right start/stop/(N)ACK conditions on the wire. +/// +/// [transaction contract]: embedded_hal_1::i2c::I2c::transaction +fn operation_frames<'a, 'b: 'a>( + operations: &'a mut [Operation<'b>], +) -> impl IntoIterator, FrameOptions)> { + let mut operations = operations.iter_mut().peekable(); + + let mut next_first_frame = true; + + iter::from_fn(move || { + let Some(op) = operations.next() else { + return None; + }; + + // Is `op` first frame of its type? + let first_frame = next_first_frame; + let next_op = operations.peek(); + + // Get appropriate frame options as combination of the following properties: + // + // - For each first operation of its type, generate a (repeated) start condition. + // - For the last operation overall in the entire transaction, generate a stop condition. + // - For read operations, check the next operation: if it is also a read operation, we merge + // these and send ACK for all bytes in the current operation; send NACK only for the final + // read operation's last byte (before write or end of entire transaction) to indicate last + // byte read and release the bus for transmission of the bus master's next byte (or stop). + // + // We check the third property unconditionally, i.e. even for write opeartions. This is okay + // because the resulting frame options are identical for write operations. + let frame = match (first_frame, next_op) { + (true, None) => FrameOptions::FirstAndLastFrame, + (true, Some(Operation::Read(_))) => FrameOptions::FirstAndNextFrame, + (true, Some(Operation::Write(_))) => FrameOptions::FirstFrame, + // + (false, None) => FrameOptions::LastFrame, + (false, Some(Operation::Read(_))) => FrameOptions::NextFrame, + (false, Some(Operation::Write(_))) => FrameOptions::LastFrameNoStop, + }; + + // Pre-calculate if `next_op` is the first operation of its type. We do this here and not at + // the beginning of the loop because we hand out `op` as iterator value and cannot access it + // anymore in the next iteration. + next_first_frame = match (&op, next_op) { + (_, None) => false, + (Operation::Read(_), Some(Operation::Write(_))) | (Operation::Write(_), Some(Operation::Read(_))) => true, + (Operation::Read(_), Some(Operation::Read(_))) | (Operation::Write(_), Some(Operation::Write(_))) => false, + }; + + Some((op, frame)) + }) +} + impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> { pub(crate) fn init(&mut self, freq: Hertz, _config: Config) { T::regs().cr1().modify(|reg| { @@ -397,53 +453,11 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> { let timeout = self.timeout(); - let mut operations = operations.iter_mut(); - - let mut prev_op: Option<&mut Operation<'_>> = None; - let mut next_op = operations.next(); - - while let Some(op) = next_op { - next_op = operations.next(); - - // Check if this is the first frame of this type. This is the case for the first overall - // frame in the transaction and whenever the type of operation changes. - let first_frame = - match (prev_op.as_ref(), &op) { - (None, _) => true, - (Some(Operation::Read(_)), Operation::Write(_)) - | (Some(Operation::Write(_)), Operation::Read(_)) => true, - (Some(Operation::Read(_)), Operation::Read(_)) - | (Some(Operation::Write(_)), Operation::Write(_)) => false, - }; - - let frame = match (first_frame, next_op.as_ref()) { - // If this is the first frame of this type, we generate a (repeated) start condition - // but have to consider the next operation: if it is the last, we generate the final - // stop condition. Otherwise, we branch on the operation: with read operations, only - // the last byte overall (before a write operation or the end of the transaction) is - // to be NACK'd, i.e. if another read operation follows, we must ACK this last byte. - (true, None) => FrameOptions::FirstAndLastFrame, - // Make sure to keep sending ACK for last byte in read operation when it is followed - // by another consecutive read operation. If the current operation is write, this is - // identical to `FirstFrame`. - (true, Some(Operation::Read(_))) => FrameOptions::FirstAndNextFrame, - // Otherwise, send NACK for last byte (in read operation). (For write, this does not - // matter and could also be `FirstAndNextFrame`.) - (true, Some(Operation::Write(_))) => FrameOptions::FirstFrame, - - // If this is not the first frame of its type, we do not generate a (repeated) start - // condition. Otherwise, we branch the same way as above. - (false, None) => FrameOptions::LastFrame, - (false, Some(Operation::Read(_))) => FrameOptions::NextFrame, - (false, Some(Operation::Write(_))) => FrameOptions::LastFrameNoStop, - }; - + for (op, frame) in operation_frames(operations) { match op { Operation::Read(read) => self.blocking_read_timeout(addr, read, timeout, frame)?, Operation::Write(write) => self.write_bytes(addr, write, timeout, frame)?, } - - prev_op = Some(op); } Ok(()) From accec7a84076ff26f9bdad388809b96537cf31da Mon Sep 17 00:00:00 2001 From: Sebastian Goll Date: Thu, 21 Mar 2024 00:30:53 +0100 Subject: [PATCH 035/581] Implement asynchronous transaction for I2C v1 --- embassy-stm32/src/i2c/mod.rs | 4 +- embassy-stm32/src/i2c/v1.rs | 214 ++++++++++++++++++++--------------- 2 files changed, 123 insertions(+), 95 deletions(-) diff --git a/embassy-stm32/src/i2c/mod.rs b/embassy-stm32/src/i2c/mod.rs index f1b11cc44..6700f0f7d 100644 --- a/embassy-stm32/src/i2c/mod.rs +++ b/embassy-stm32/src/i2c/mod.rs @@ -332,8 +332,6 @@ impl<'d, T: Instance, TXDMA: TxDma, RXDMA: RxDma> embedded_hal_async::i2c: address: u8, operations: &mut [embedded_hal_1::i2c::Operation<'_>], ) -> Result<(), Self::Error> { - let _ = address; - let _ = operations; - todo!() + self.transaction(address, operations).await } } diff --git a/embassy-stm32/src/i2c/v1.rs b/embassy-stm32/src/i2c/v1.rs index dd2cea6b8..a740ab834 100644 --- a/embassy-stm32/src/i2c/v1.rs +++ b/embassy-stm32/src/i2c/v1.rs @@ -111,12 +111,21 @@ impl FrameOptions { /// [transaction contract]: embedded_hal_1::i2c::I2c::transaction fn operation_frames<'a, 'b: 'a>( operations: &'a mut [Operation<'b>], -) -> impl IntoIterator, FrameOptions)> { +) -> Result, FrameOptions)>, Error> { + // Check empty read buffer before starting transaction. Otherwise, we would risk halting with an + // error in the middle of the transaction. + if operations.iter().any(|op| match op { + Operation::Read(read) => read.is_empty(), + Operation::Write(_) => false, + }) { + return Err(Error::Overrun); + } + let mut operations = operations.iter_mut().peekable(); let mut next_first_frame = true; - iter::from_fn(move || { + Ok(iter::from_fn(move || { let Some(op) = operations.next() else { return None; }; @@ -156,7 +165,7 @@ fn operation_frames<'a, 'b: 'a>( }; Some((op, frame)) - }) + })) } impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> { @@ -442,18 +451,9 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> { /// /// [transaction contract]: embedded_hal_1::i2c::I2c::transaction pub fn blocking_transaction(&mut self, addr: u8, operations: &mut [Operation<'_>]) -> Result<(), Error> { - // Check empty read buffer before starting transaction. Otherwise, we would not generate the - // stop condition below. - if operations.iter().any(|op| match op { - Operation::Read(read) => read.is_empty(), - Operation::Write(_) => false, - }) { - return Err(Error::Overrun); - } - let timeout = self.timeout(); - for (op, frame) in operation_frames(operations) { + for (op, frame) in operation_frames(operations)? { match op { Operation::Read(read) => self.blocking_read_timeout(addr, read, timeout, frame)?, Operation::Write(write) => self.write_bytes(addr, write, timeout, frame)?, @@ -480,9 +480,12 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> { let dma_transfer = unsafe { let regs = T::regs(); regs.cr2().modify(|w| { + // Note: Do not enable the ITBUFEN bit in the I2C_CR2 register if DMA is used for reception. + w.set_itbufen(false); // DMA mode can be enabled for transmission by setting the DMAEN bit in the I2C_CR2 register. w.set_dmaen(true); - w.set_itbufen(false); + // Sending NACK is not necessary (nor possible) for write transfer. + w.set_last(false); }); // Set the I2C_DR register address in the DMA_SxPAR register. The data will be moved to this address from the memory after each TxE event. let dst = regs.dr().as_ptr() as *mut u8; @@ -520,6 +523,9 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> { if sr1.start() { Poll::Ready(Ok(())) } else { + // If we need to go around, then re-enable the interrupts, otherwise nothing + // can wake us up and we'll hang. + Self::enable_interrupts(); Poll::Pending } } @@ -537,6 +543,9 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> { Ok(_) => { let sr2 = T::regs().sr2().read(); if !sr2.msl() && !sr2.busy() { + // If we need to go around, then re-enable the interrupts, otherwise nothing + // can wake us up and we'll hang. + Self::enable_interrupts(); Poll::Pending } else { Poll::Ready(Ok(())) @@ -550,14 +559,14 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> { Self::enable_interrupts(); T::regs().dr().write(|reg| reg.set_dr(address << 1)); + // Wait for the address to be acknowledged poll_fn(|cx| { state.waker.register(cx.waker()); + match Self::check_and_clear_error_flags() { Err(e) => Poll::Ready(Err(e)), Ok(sr1) => { if sr1.addr() { - // Clear the ADDR condition by reading SR2. - T::regs().sr2().read(); Poll::Ready(Ok(())) } else { // If we need to go around, then re-enable the interrupts, otherwise nothing @@ -569,8 +578,12 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> { } }) .await?; + + // Clear condition by reading SR2 + T::regs().sr2().read(); } + // Wait for bytes to be sent, or an error to occur. Self::enable_interrupts(); let poll_error = poll_fn(|cx| { state.waker.register(cx.waker()); @@ -579,7 +592,12 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> { // Unclear why the Err turbofish is necessary here? The compiler didn’t require it in the other // identical poll_fn check_and_clear matches. Err(e) => Poll::Ready(Err::(e)), - Ok(_) => Poll::Pending, + Ok(_) => { + // If we need to go around, then re-enable the interrupts, otherwise nothing + // can wake us up and we'll hang. + Self::enable_interrupts(); + Poll::Pending + } } }); @@ -589,52 +607,38 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> { _ => Ok(()), }?; - // The I2C transfer itself will take longer than the DMA transfer, so wait for that to finish too. - - // 18.3.8 “Master transmitter: In the interrupt routine after the EOT interrupt, disable DMA - // requests then wait for a BTF event before programming the Stop condition.†- - // TODO: If this has to be done “in the interrupt routine after the EOT interruptâ€, where to put it? T::regs().cr2().modify(|w| { w.set_dmaen(false); }); - Self::enable_interrupts(); - poll_fn(|cx| { - state.waker.register(cx.waker()); - - match Self::check_and_clear_error_flags() { - Err(e) => Poll::Ready(Err(e)), - Ok(sr1) => { - if sr1.btf() { - if frame.send_stop() { - T::regs().cr1().modify(|w| { - w.set_stop(true); - }); - } - - Poll::Ready(Ok(())) - } else { - Poll::Pending - } - } - } - }) - .await?; - if frame.send_stop() { - // Wait for STOP condition to transmit. + // The I2C transfer itself will take longer than the DMA transfer, so wait for that to finish too. + + // 18.3.8 “Master transmitter: In the interrupt routine after the EOT interrupt, disable DMA + // requests then wait for a BTF event before programming the Stop condition.†Self::enable_interrupts(); poll_fn(|cx| { - T::state().waker.register(cx.waker()); - // TODO: error interrupts are enabled here, should we additional check for and return errors? - if T::regs().cr1().read().stop() { - Poll::Pending - } else { - Poll::Ready(Ok(())) + state.waker.register(cx.waker()); + + match Self::check_and_clear_error_flags() { + Err(e) => Poll::Ready(Err(e)), + Ok(sr1) => { + if sr1.btf() { + Poll::Ready(Ok(())) + } else { + // If we need to go around, then re-enable the interrupts, otherwise nothing + // can wake us up and we'll hang. + Self::enable_interrupts(); + Poll::Pending + } + } } }) .await?; + + T::regs().cr1().modify(|w| { + w.set_stop(true); + }); } drop(on_drop); @@ -669,15 +673,19 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> { where RXDMA: crate::i2c::RxDma, { - let state = T::state(); let buffer_len = buffer.len(); let dma_transfer = unsafe { let regs = T::regs(); regs.cr2().modify(|w| { - // DMA mode can be enabled for transmission by setting the DMAEN bit in the I2C_CR2 register. + // Note: Do not enable the ITBUFEN bit in the I2C_CR2 register if DMA is used for reception. w.set_itbufen(false); + // DMA mode can be enabled for transmission by setting the DMAEN bit in the I2C_CR2 register. w.set_dmaen(true); + // If, in the I2C_CR2 register, the LAST bit is set, I2C + // automatically sends a NACK after the next byte following EOT_1. The user can + // generate a Stop condition in the DMA Transfer Complete interrupt routine if enabled. + w.set_last(frame.send_nack() && buffer_len != 1); }); // Set the I2C_DR register address in the DMA_SxPAR register. The data will be moved to this address from the memory after each TxE event. let src = regs.dr().as_ptr() as *mut u8; @@ -696,6 +704,8 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> { }) }); + let state = T::state(); + if frame.send_start() { // Send a START condition and set ACK bit Self::enable_interrupts(); @@ -714,6 +724,9 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> { if sr1.start() { Poll::Ready(Ok(())) } else { + // If we need to go around, then re-enable the interrupts, otherwise nothing + // can wake us up and we'll hang. + Self::enable_interrupts(); Poll::Pending } } @@ -733,6 +746,9 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> { Ok(_) => { let sr2 = T::regs().sr2().read(); if !sr2.msl() && !sr2.busy() { + // If we need to go around, then re-enable the interrupts, otherwise nothing + // can wake us up and we'll hang. + Self::enable_interrupts(); Poll::Pending } else { Poll::Ready(Ok(())) @@ -743,11 +759,10 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> { .await?; // Set up current address, we're trying to talk to + Self::enable_interrupts(); T::regs().dr().write(|reg| reg.set_dr((address << 1) + 1)); // Wait for the address to be acknowledged - - Self::enable_interrupts(); poll_fn(|cx| { state.waker.register(cx.waker()); @@ -755,15 +770,11 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> { Err(e) => Poll::Ready(Err(e)), Ok(sr1) => { if sr1.addr() { - // 18.3.8: When a single byte must be received: the NACK must be programmed during EV6 - // event, i.e. program ACK=0 when ADDR=1, before clearing ADDR flag. - if buffer_len == 1 && frame.send_nack() { - T::regs().cr1().modify(|w| { - w.set_ack(false); - }); - } Poll::Ready(Ok(())) } else { + // If we need to go around, then re-enable the interrupts, otherwise nothing + // can wake us up and we'll hang. + Self::enable_interrupts(); Poll::Pending } } @@ -771,24 +782,29 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> { }) .await?; - // Clear ADDR condition by reading SR2 + // 18.3.8: When a single byte must be received: the NACK must be programmed during EV6 + // event, i.e. program ACK=0 when ADDR=1, before clearing ADDR flag. + if frame.send_nack() && buffer_len == 1 { + T::regs().cr1().modify(|w| { + w.set_ack(false); + }); + } + + // Clear condition by reading SR2 T::regs().sr2().read(); + } else if frame.send_nack() && buffer_len == 1 { + T::regs().cr1().modify(|w| { + w.set_ack(false); + }); } // 18.3.8: When a single byte must be received: [snip] Then the // user can program the STOP condition either after clearing ADDR flag, or in the // DMA Transfer Complete interrupt routine. - if buffer_len == 1 && frame.send_stop() { + if frame.send_stop() && buffer_len == 1 { T::regs().cr1().modify(|w| { w.set_stop(true); }); - } else if buffer_len != 1 && frame.send_nack() { - // If, in the I2C_CR2 register, the LAST bit is set, I2C - // automatically sends a NACK after the next byte following EOT_1. The user can - // generate a Stop condition in the DMA Transfer Complete interrupt routine if enabled. - T::regs().cr2().modify(|w| { - w.set_last(true); - }); } // Wait for bytes to be received, or an error to occur. @@ -798,7 +814,12 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> { match Self::check_and_clear_error_flags() { Err(e) => Poll::Ready(Err::(e)), - _ => Poll::Pending, + _ => { + // If we need to go around, then re-enable the interrupts, otherwise nothing + // can wake us up and we'll hang. + Self::enable_interrupts(); + Poll::Pending + } } }); @@ -807,25 +828,14 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> { _ => Ok(()), }?; - if frame.send_stop() { - if buffer_len != 1 { - T::regs().cr1().modify(|w| { - w.set_stop(true); - }); - } + T::regs().cr2().modify(|w| { + w.set_dmaen(false); + }); - // Wait for the STOP to be sent (STOP bit cleared). - Self::enable_interrupts(); - poll_fn(|cx| { - state.waker.register(cx.waker()); - // TODO: error interrupts are enabled here, should we additional check for and return errors? - if T::regs().cr1().read().stop() { - Poll::Pending - } else { - Poll::Ready(Ok(())) - } - }) - .await?; + if frame.send_stop() && buffer_len != 1 { + T::regs().cr1().modify(|w| { + w.set_stop(true); + }); } drop(on_drop); @@ -843,6 +853,26 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> { self.write_frame(address, write, FrameOptions::FirstFrame).await?; self.read_frame(address, read, FrameOptions::FirstAndLastFrame).await } + + /// Transaction with operations. + /// + /// Consecutive operations of same type are merged. See [transaction contract] for details. + /// + /// [transaction contract]: embedded_hal_1::i2c::I2c::transaction + pub async fn transaction(&mut self, addr: u8, operations: &mut [Operation<'_>]) -> Result<(), Error> + where + RXDMA: crate::i2c::RxDma, + TXDMA: crate::i2c::TxDma, + { + for (op, frame) in operation_frames(operations)? { + match op { + Operation::Read(read) => self.read_frame(addr, read, frame).await?, + Operation::Write(write) => self.write_frame(addr, write, frame).await?, + } + } + + Ok(()) + } } impl<'d, T: Instance, TXDMA, RXDMA> Drop for I2c<'d, T, TXDMA, RXDMA> { From c1175bf7d850d6e9091853e6e9980b11407b5a21 Mon Sep 17 00:00:00 2001 From: Sebastian Goll Date: Wed, 27 Mar 2024 00:04:35 +0100 Subject: [PATCH 036/581] It is not necessary to wait for STOP to be fully generated --- embassy-stm32/src/i2c/v1.rs | 11 ----------- 1 file changed, 11 deletions(-) diff --git a/embassy-stm32/src/i2c/v1.rs b/embassy-stm32/src/i2c/v1.rs index a740ab834..1e2205389 100644 --- a/embassy-stm32/src/i2c/v1.rs +++ b/embassy-stm32/src/i2c/v1.rs @@ -296,10 +296,6 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> { if frame.send_stop() { // Send a STOP condition T::regs().cr1().modify(|reg| reg.set_stop(true)); - // Wait for STOP condition to transmit. - while T::regs().cr1().read().stop() { - timeout.check()?; - } } // Fallthrough is success @@ -405,13 +401,6 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> { // Receive last byte *last = self.recv_byte(timeout)?; - if frame.send_stop() { - // Wait for the STOP to be sent. - while T::regs().cr1().read().stop() { - timeout.check()?; - } - } - // Fallthrough is success Ok(()) } From 2e2986c67b3a7a6a87695a359d630864c9eb6194 Mon Sep 17 00:00:00 2001 From: Sebastian Goll Date: Wed, 27 Mar 2024 00:17:12 +0100 Subject: [PATCH 037/581] It is not necessary to wait for SB and MSL sequentially --- embassy-stm32/src/i2c/v1.rs | 72 ++++++++----------------------------- 1 file changed, 14 insertions(+), 58 deletions(-) diff --git a/embassy-stm32/src/i2c/v1.rs b/embassy-stm32/src/i2c/v1.rs index 1e2205389..1e0eea33c 100644 --- a/embassy-stm32/src/i2c/v1.rs +++ b/embassy-stm32/src/i2c/v1.rs @@ -264,14 +264,9 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> { timeout.check()?; } - // Also wait until signalled we're master and everything is waiting for us - while { - Self::check_and_clear_error_flags()?; - - let sr2 = T::regs().sr2().read(); - !sr2.msl() && !sr2.busy() - } { - timeout.check()?; + // Check if we were the ones to generate START + if T::regs().cr1().read().start() || !T::regs().sr2().read().msl() { + return Err(Error::Arbitration); } // Set up current address, we're trying to talk to @@ -362,12 +357,9 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> { timeout.check()?; } - // Also wait until signalled we're master and everything is waiting for us - while { - let sr2 = T::regs().sr2().read(); - !sr2.msl() && !sr2.busy() - } { - timeout.check()?; + // Check if we were the ones to generate START + if T::regs().cr1().read().start() || !T::regs().sr2().read().msl() { + return Err(Error::Arbitration); } // Set up current address, we're trying to talk to @@ -522,27 +514,10 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> { }) .await?; - // Also wait until signalled we're master and everything is waiting for us - Self::enable_interrupts(); - poll_fn(|cx| { - state.waker.register(cx.waker()); - - match Self::check_and_clear_error_flags() { - Err(e) => Poll::Ready(Err(e)), - Ok(_) => { - let sr2 = T::regs().sr2().read(); - if !sr2.msl() && !sr2.busy() { - // If we need to go around, then re-enable the interrupts, otherwise nothing - // can wake us up and we'll hang. - Self::enable_interrupts(); - Poll::Pending - } else { - Poll::Ready(Ok(())) - } - } - } - }) - .await?; + // Check if we were the ones to generate START + if T::regs().cr1().read().start() || !T::regs().sr2().read().msl() { + return Err(Error::Arbitration); + } // Set up current address, we're trying to talk to Self::enable_interrupts(); @@ -723,29 +698,10 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> { }) .await?; - // Also wait until signalled we're master and everything is waiting for us - Self::enable_interrupts(); - poll_fn(|cx| { - state.waker.register(cx.waker()); - - // blocking read didn’t have a check_and_clear call here, but blocking write did so - // I’m adding it here in case that was an oversight. - match Self::check_and_clear_error_flags() { - Err(e) => Poll::Ready(Err(e)), - Ok(_) => { - let sr2 = T::regs().sr2().read(); - if !sr2.msl() && !sr2.busy() { - // If we need to go around, then re-enable the interrupts, otherwise nothing - // can wake us up and we'll hang. - Self::enable_interrupts(); - Poll::Pending - } else { - Poll::Ready(Ok(())) - } - } - } - }) - .await?; + // Check if we were the ones to generate START + if T::regs().cr1().read().start() || !T::regs().sr2().read().msl() { + return Err(Error::Arbitration); + } // Set up current address, we're trying to talk to Self::enable_interrupts(); From b299266cd240d73bf6ec36d6a0710523ce5eb139 Mon Sep 17 00:00:00 2001 From: Sebastian Goll Date: Wed, 27 Mar 2024 00:20:29 +0100 Subject: [PATCH 038/581] It is not necessary to enable interrupts before registering waker --- embassy-stm32/src/i2c/v1.rs | 28 +++++++--------------------- 1 file changed, 7 insertions(+), 21 deletions(-) diff --git a/embassy-stm32/src/i2c/v1.rs b/embassy-stm32/src/i2c/v1.rs index 1e0eea33c..7c0bb31d6 100644 --- a/embassy-stm32/src/i2c/v1.rs +++ b/embassy-stm32/src/i2c/v1.rs @@ -489,7 +489,6 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> { if frame.send_start() { // Send a START condition - Self::enable_interrupts(); T::regs().cr1().modify(|reg| { reg.set_start(true); }); @@ -504,8 +503,7 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> { if sr1.start() { Poll::Ready(Ok(())) } else { - // If we need to go around, then re-enable the interrupts, otherwise nothing - // can wake us up and we'll hang. + // When pending, (re-)enable interrupts to wake us up. Self::enable_interrupts(); Poll::Pending } @@ -520,7 +518,6 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> { } // Set up current address, we're trying to talk to - Self::enable_interrupts(); T::regs().dr().write(|reg| reg.set_dr(address << 1)); // Wait for the address to be acknowledged @@ -533,8 +530,7 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> { if sr1.addr() { Poll::Ready(Ok(())) } else { - // If we need to go around, then re-enable the interrupts, otherwise nothing - // can wake us up and we'll hang. + // When pending, (re-)enable interrupts to wake us up. Self::enable_interrupts(); Poll::Pending } @@ -548,7 +544,6 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> { } // Wait for bytes to be sent, or an error to occur. - Self::enable_interrupts(); let poll_error = poll_fn(|cx| { state.waker.register(cx.waker()); @@ -557,8 +552,7 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> { // identical poll_fn check_and_clear matches. Err(e) => Poll::Ready(Err::(e)), Ok(_) => { - // If we need to go around, then re-enable the interrupts, otherwise nothing - // can wake us up and we'll hang. + // When pending, (re-)enable interrupts to wake us up. Self::enable_interrupts(); Poll::Pending } @@ -580,7 +574,6 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> { // 18.3.8 “Master transmitter: In the interrupt routine after the EOT interrupt, disable DMA // requests then wait for a BTF event before programming the Stop condition.†- Self::enable_interrupts(); poll_fn(|cx| { state.waker.register(cx.waker()); @@ -590,8 +583,7 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> { if sr1.btf() { Poll::Ready(Ok(())) } else { - // If we need to go around, then re-enable the interrupts, otherwise nothing - // can wake us up and we'll hang. + // When pending, (re-)enable interrupts to wake us up. Self::enable_interrupts(); Poll::Pending } @@ -672,7 +664,6 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> { if frame.send_start() { // Send a START condition and set ACK bit - Self::enable_interrupts(); T::regs().cr1().modify(|reg| { reg.set_start(true); reg.set_ack(true); @@ -688,8 +679,7 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> { if sr1.start() { Poll::Ready(Ok(())) } else { - // If we need to go around, then re-enable the interrupts, otherwise nothing - // can wake us up and we'll hang. + // When pending, (re-)enable interrupts to wake us up. Self::enable_interrupts(); Poll::Pending } @@ -704,7 +694,6 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> { } // Set up current address, we're trying to talk to - Self::enable_interrupts(); T::regs().dr().write(|reg| reg.set_dr((address << 1) + 1)); // Wait for the address to be acknowledged @@ -717,8 +706,7 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> { if sr1.addr() { Poll::Ready(Ok(())) } else { - // If we need to go around, then re-enable the interrupts, otherwise nothing - // can wake us up and we'll hang. + // When pending, (re-)enable interrupts to wake us up. Self::enable_interrupts(); Poll::Pending } @@ -753,15 +741,13 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> { } // Wait for bytes to be received, or an error to occur. - Self::enable_interrupts(); let poll_error = poll_fn(|cx| { state.waker.register(cx.waker()); match Self::check_and_clear_error_flags() { Err(e) => Poll::Ready(Err::(e)), _ => { - // If we need to go around, then re-enable the interrupts, otherwise nothing - // can wake us up and we'll hang. + // When pending, (re-)enable interrupts to wake us up. Self::enable_interrupts(); Poll::Pending } From 7e44db099ca6a475af9f22fd0ebb85845553a570 Mon Sep 17 00:00:00 2001 From: Sebastian Goll Date: Wed, 27 Mar 2024 00:33:04 +0100 Subject: [PATCH 039/581] Move FrameOptions and related function to module itself --- embassy-stm32/src/i2c/mod.rs | 130 +++++++++++++++++++++++++++++++++++ embassy-stm32/src/i2c/v1.rs | 129 +--------------------------------- 2 files changed, 131 insertions(+), 128 deletions(-) diff --git a/embassy-stm32/src/i2c/mod.rs b/embassy-stm32/src/i2c/mod.rs index 6700f0f7d..85381047d 100644 --- a/embassy-stm32/src/i2c/mod.rs +++ b/embassy-stm32/src/i2c/mod.rs @@ -6,6 +6,7 @@ mod _version; use core::future::Future; +use core::iter; use core::marker::PhantomData; use embassy_hal_internal::{into_ref, Peripheral, PeripheralRef}; @@ -335,3 +336,132 @@ impl<'d, T: Instance, TXDMA: TxDma, RXDMA: RxDma> embedded_hal_async::i2c: self.transaction(address, operations).await } } + +/// Frame type in I2C transaction. +/// +/// This tells each method what kind of framing to use, to generate a (repeated) start condition (ST +/// or SR), and/or a stop condition (SP). For read operations, this also controls whether to send an +/// ACK or NACK after the last byte received. +/// +/// For write operations, the following options are identical because they differ only in the (N)ACK +/// treatment relevant for read operations: +/// +/// - `FirstFrame` and `FirstAndNextFrame` +/// - `NextFrame` and `LastFrameNoStop` +/// +/// Abbreviations used below: +/// +/// - `ST` = start condition +/// - `SR` = repeated start condition +/// - `SP` = stop condition +/// - `ACK`/`NACK` = last byte in read operation +#[derive(Copy, Clone)] +enum FrameOptions { + /// `[ST/SR]+[NACK]+[SP]` First frame (of this type) in transaction and also last frame overall. + FirstAndLastFrame, + /// `[ST/SR]+[NACK]` First frame of this type in transaction, last frame in a read operation but + /// not the last frame overall. + FirstFrame, + /// `[ST/SR]+[ACK]` First frame of this type in transaction, neither last frame overall nor last + /// frame in a read operation. + FirstAndNextFrame, + /// `[ACK]` Middle frame in a read operation (neither first nor last). + NextFrame, + /// `[NACK]+[SP]` Last frame overall in this transaction but not the first frame. + LastFrame, + /// `[NACK]` Last frame in a read operation but not last frame overall in this transaction. + LastFrameNoStop, +} + +impl FrameOptions { + /// Sends start or repeated start condition before transfer. + fn send_start(self) -> bool { + match self { + Self::FirstAndLastFrame | Self::FirstFrame | Self::FirstAndNextFrame => true, + Self::NextFrame | Self::LastFrame | Self::LastFrameNoStop => false, + } + } + + /// Sends stop condition after transfer. + fn send_stop(self) -> bool { + match self { + Self::FirstAndLastFrame | Self::LastFrame => true, + Self::FirstFrame | Self::FirstAndNextFrame | Self::NextFrame | Self::LastFrameNoStop => false, + } + } + + /// Sends NACK after last byte received, indicating end of read operation. + fn send_nack(self) -> bool { + match self { + Self::FirstAndLastFrame | Self::FirstFrame | Self::LastFrame | Self::LastFrameNoStop => true, + Self::FirstAndNextFrame | Self::NextFrame => false, + } + } +} + +/// Iterates over operations in transaction. +/// +/// Returns necessary frame options for each operation to uphold the [transaction contract] and have +/// the right start/stop/(N)ACK conditions on the wire. +/// +/// [transaction contract]: embedded_hal_1::i2c::I2c::transaction +fn operation_frames<'a, 'b: 'a>( + operations: &'a mut [embedded_hal_1::i2c::Operation<'b>], +) -> Result, FrameOptions)>, Error> { + use embedded_hal_1::i2c::Operation; + + // Check empty read buffer before starting transaction. Otherwise, we would risk halting with an + // error in the middle of the transaction. + if operations.iter().any(|op| match op { + Operation::Read(read) => read.is_empty(), + Operation::Write(_) => false, + }) { + return Err(Error::Overrun); + } + + let mut operations = operations.iter_mut().peekable(); + + let mut next_first_frame = true; + + Ok(iter::from_fn(move || { + let Some(op) = operations.next() else { + return None; + }; + + // Is `op` first frame of its type? + let first_frame = next_first_frame; + let next_op = operations.peek(); + + // Get appropriate frame options as combination of the following properties: + // + // - For each first operation of its type, generate a (repeated) start condition. + // - For the last operation overall in the entire transaction, generate a stop condition. + // - For read operations, check the next operation: if it is also a read operation, we merge + // these and send ACK for all bytes in the current operation; send NACK only for the final + // read operation's last byte (before write or end of entire transaction) to indicate last + // byte read and release the bus for transmission of the bus master's next byte (or stop). + // + // We check the third property unconditionally, i.e. even for write opeartions. This is okay + // because the resulting frame options are identical for write operations. + let frame = match (first_frame, next_op) { + (true, None) => FrameOptions::FirstAndLastFrame, + (true, Some(Operation::Read(_))) => FrameOptions::FirstAndNextFrame, + (true, Some(Operation::Write(_))) => FrameOptions::FirstFrame, + // + (false, None) => FrameOptions::LastFrame, + (false, Some(Operation::Read(_))) => FrameOptions::NextFrame, + (false, Some(Operation::Write(_))) => FrameOptions::LastFrameNoStop, + }; + + // Pre-calculate if `next_op` is the first operation of its type. We do this here and not at + // the beginning of the loop because we hand out `op` as iterator value and cannot access it + // anymore in the next iteration. + next_first_frame = match (&op, next_op) { + (_, None) => false, + (Operation::Read(_), Some(Operation::Write(_))) | (Operation::Write(_), Some(Operation::Read(_))) => true, + (Operation::Read(_), Some(Operation::Read(_))) | (Operation::Write(_), Some(Operation::Write(_))) => false, + }; + + Some((op, frame)) + })) +} diff --git a/embassy-stm32/src/i2c/v1.rs b/embassy-stm32/src/i2c/v1.rs index 7c0bb31d6..be7f91a9a 100644 --- a/embassy-stm32/src/i2c/v1.rs +++ b/embassy-stm32/src/i2c/v1.rs @@ -5,7 +5,7 @@ //! All other devices (as of 2023-12-28) use [`v2`](super::v2) instead. use core::future::poll_fn; -use core::{iter, task::Poll}; +use core::task::Poll; use embassy_embedded_hal::SetConfig; use embassy_futures::select::{select, Either}; @@ -41,133 +41,6 @@ pub unsafe fn on_interrupt() { }); } -/// Frame type in I2C transaction. -/// -/// This tells each method what kind of framing to use, to generate a (repeated) start condition (ST -/// or SR), and/or a stop condition (SP). For read operations, this also controls whether to send an -/// ACK or NACK after the last byte received. -/// -/// For write operations, the following options are identical because they differ only in the (N)ACK -/// treatment relevant for read operations: -/// -/// - `FirstFrame` and `FirstAndNextFrame` -/// - `NextFrame` and `LastFrameNoStop` -/// -/// Abbreviations used below: -/// -/// - `ST` = start condition -/// - `SR` = repeated start condition -/// - `SP` = stop condition -/// - `ACK`/`NACK` = last byte in read operation -#[derive(Copy, Clone)] -enum FrameOptions { - /// `[ST/SR]+[NACK]+[SP]` First frame (of this type) in transaction and also last frame overall. - FirstAndLastFrame, - /// `[ST/SR]+[NACK]` First frame of this type in transaction, last frame in a read operation but - /// not the last frame overall. - FirstFrame, - /// `[ST/SR]+[ACK]` First frame of this type in transaction, neither last frame overall nor last - /// frame in a read operation. - FirstAndNextFrame, - /// `[ACK]` Middle frame in a read operation (neither first nor last). - NextFrame, - /// `[NACK]+[SP]` Last frame overall in this transaction but not the first frame. - LastFrame, - /// `[NACK]` Last frame in a read operation but not last frame overall in this transaction. - LastFrameNoStop, -} - -impl FrameOptions { - /// Sends start or repeated start condition before transfer. - fn send_start(self) -> bool { - match self { - Self::FirstAndLastFrame | Self::FirstFrame | Self::FirstAndNextFrame => true, - Self::NextFrame | Self::LastFrame | Self::LastFrameNoStop => false, - } - } - - /// Sends stop condition after transfer. - fn send_stop(self) -> bool { - match self { - Self::FirstAndLastFrame | Self::LastFrame => true, - Self::FirstFrame | Self::FirstAndNextFrame | Self::NextFrame | Self::LastFrameNoStop => false, - } - } - - /// Sends NACK after last byte received, indicating end of read operation. - fn send_nack(self) -> bool { - match self { - Self::FirstAndLastFrame | Self::FirstFrame | Self::LastFrame | Self::LastFrameNoStop => true, - Self::FirstAndNextFrame | Self::NextFrame => false, - } - } -} - -/// Iterates over operations in transaction. -/// -/// Returns necessary frame options for each operation to uphold the [transaction contract] and have -/// the right start/stop/(N)ACK conditions on the wire. -/// -/// [transaction contract]: embedded_hal_1::i2c::I2c::transaction -fn operation_frames<'a, 'b: 'a>( - operations: &'a mut [Operation<'b>], -) -> Result, FrameOptions)>, Error> { - // Check empty read buffer before starting transaction. Otherwise, we would risk halting with an - // error in the middle of the transaction. - if operations.iter().any(|op| match op { - Operation::Read(read) => read.is_empty(), - Operation::Write(_) => false, - }) { - return Err(Error::Overrun); - } - - let mut operations = operations.iter_mut().peekable(); - - let mut next_first_frame = true; - - Ok(iter::from_fn(move || { - let Some(op) = operations.next() else { - return None; - }; - - // Is `op` first frame of its type? - let first_frame = next_first_frame; - let next_op = operations.peek(); - - // Get appropriate frame options as combination of the following properties: - // - // - For each first operation of its type, generate a (repeated) start condition. - // - For the last operation overall in the entire transaction, generate a stop condition. - // - For read operations, check the next operation: if it is also a read operation, we merge - // these and send ACK for all bytes in the current operation; send NACK only for the final - // read operation's last byte (before write or end of entire transaction) to indicate last - // byte read and release the bus for transmission of the bus master's next byte (or stop). - // - // We check the third property unconditionally, i.e. even for write opeartions. This is okay - // because the resulting frame options are identical for write operations. - let frame = match (first_frame, next_op) { - (true, None) => FrameOptions::FirstAndLastFrame, - (true, Some(Operation::Read(_))) => FrameOptions::FirstAndNextFrame, - (true, Some(Operation::Write(_))) => FrameOptions::FirstFrame, - // - (false, None) => FrameOptions::LastFrame, - (false, Some(Operation::Read(_))) => FrameOptions::NextFrame, - (false, Some(Operation::Write(_))) => FrameOptions::LastFrameNoStop, - }; - - // Pre-calculate if `next_op` is the first operation of its type. We do this here and not at - // the beginning of the loop because we hand out `op` as iterator value and cannot access it - // anymore in the next iteration. - next_first_frame = match (&op, next_op) { - (_, None) => false, - (Operation::Read(_), Some(Operation::Write(_))) | (Operation::Write(_), Some(Operation::Read(_))) => true, - (Operation::Read(_), Some(Operation::Read(_))) | (Operation::Write(_), Some(Operation::Write(_))) => false, - }; - - Some((op, frame)) - })) -} - impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> { pub(crate) fn init(&mut self, freq: Hertz, _config: Config) { T::regs().cr1().modify(|reg| { From 54d7d495135a2d4a17457d7fdb5d9306f598acc2 Mon Sep 17 00:00:00 2001 From: Sebastian Goll Date: Wed, 27 Mar 2024 01:07:42 +0100 Subject: [PATCH 040/581] Refactor DMA implementation of I2C v1, clarify flow of code --- embassy-stm32/src/i2c/v1.rs | 131 ++++++++++++++++++++---------------- 1 file changed, 73 insertions(+), 58 deletions(-) diff --git a/embassy-stm32/src/i2c/v1.rs b/embassy-stm32/src/i2c/v1.rs index be7f91a9a..5c57a9ccc 100644 --- a/embassy-stm32/src/i2c/v1.rs +++ b/embassy-stm32/src/i2c/v1.rs @@ -142,7 +142,7 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> { return Err(Error::Arbitration); } - // Set up current address, we're trying to talk to + // Set up current address we're trying to talk to T::regs().dr().write(|reg| reg.set_dr(addr << 1)); // Wait until address was sent @@ -235,7 +235,7 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> { return Err(Error::Arbitration); } - // Set up current address, we're trying to talk to + // Set up current address we're trying to talk to T::regs().dr().write(|reg| reg.set_dr((addr << 1) + 1)); // Wait until address was sent @@ -331,27 +331,21 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> { where TXDMA: crate::i2c::TxDma, { - let dma_transfer = unsafe { - let regs = T::regs(); - regs.cr2().modify(|w| { - // Note: Do not enable the ITBUFEN bit in the I2C_CR2 register if DMA is used for reception. - w.set_itbufen(false); - // DMA mode can be enabled for transmission by setting the DMAEN bit in the I2C_CR2 register. - w.set_dmaen(true); - // Sending NACK is not necessary (nor possible) for write transfer. - w.set_last(false); - }); - // Set the I2C_DR register address in the DMA_SxPAR register. The data will be moved to this address from the memory after each TxE event. - let dst = regs.dr().as_ptr() as *mut u8; - - let ch = &mut self.tx_dma; - let request = ch.request(); - Transfer::new_write(ch, request, write, dst, Default::default()) - }; + T::regs().cr2().modify(|w| { + // Note: Do not enable the ITBUFEN bit in the I2C_CR2 register if DMA is used for + // reception. + w.set_itbufen(false); + // DMA mode can be enabled for transmission by setting the DMAEN bit in the I2C_CR2 + // register. + w.set_dmaen(true); + // Sending NACK is not necessary (nor possible) for write transfer. + w.set_last(false); + }); + // Sentinel to disable transfer when an error occurs or future is canceled. + // TODO: Generate STOP condition on cancel? let on_drop = OnDrop::new(|| { - let regs = T::regs(); - regs.cr2().modify(|w| { + T::regs().cr2().modify(|w| { w.set_dmaen(false); w.set_iterren(false); w.set_itevten(false); @@ -390,7 +384,7 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> { return Err(Error::Arbitration); } - // Set up current address, we're trying to talk to + // Set up current address we're trying to talk to T::regs().dr().write(|reg| reg.set_dr(address << 1)); // Wait for the address to be acknowledged @@ -416,14 +410,22 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> { T::regs().sr2().read(); } + let dma_transfer = unsafe { + // Set the I2C_DR register address in the DMA_SxPAR register. The data will be moved to + // this address from the memory after each TxE event. + let dst = T::regs().dr().as_ptr() as *mut u8; + + let ch = &mut self.tx_dma; + let request = ch.request(); + Transfer::new_write(ch, request, write, dst, Default::default()) + }; + // Wait for bytes to be sent, or an error to occur. let poll_error = poll_fn(|cx| { state.waker.register(cx.waker()); match Self::check_and_clear_error_flags() { - // Unclear why the Err turbofish is necessary here? The compiler didn’t require it in the other - // identical poll_fn check_and_clear matches. - Err(e) => Poll::Ready(Err::(e)), + Err(e) => Poll::Ready(Err::<(), Error>(e)), Ok(_) => { // When pending, (re-)enable interrupts to wake us up. Self::enable_interrupts(); @@ -502,31 +504,30 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> { where RXDMA: crate::i2c::RxDma, { - let buffer_len = buffer.len(); + if buffer.is_empty() { + return Err(Error::Overrun); + } - let dma_transfer = unsafe { - let regs = T::regs(); - regs.cr2().modify(|w| { - // Note: Do not enable the ITBUFEN bit in the I2C_CR2 register if DMA is used for reception. - w.set_itbufen(false); - // DMA mode can be enabled for transmission by setting the DMAEN bit in the I2C_CR2 register. - w.set_dmaen(true); - // If, in the I2C_CR2 register, the LAST bit is set, I2C - // automatically sends a NACK after the next byte following EOT_1. The user can - // generate a Stop condition in the DMA Transfer Complete interrupt routine if enabled. - w.set_last(frame.send_nack() && buffer_len != 1); - }); - // Set the I2C_DR register address in the DMA_SxPAR register. The data will be moved to this address from the memory after each TxE event. - let src = regs.dr().as_ptr() as *mut u8; + // Some branches below depend on whether the buffer contains only a single byte. + let single_byte = buffer.len() == 1; - let ch = &mut self.rx_dma; - let request = ch.request(); - Transfer::new_read(ch, request, src, buffer, Default::default()) - }; + T::regs().cr2().modify(|w| { + // Note: Do not enable the ITBUFEN bit in the I2C_CR2 register if DMA is used for + // reception. + w.set_itbufen(false); + // DMA mode can be enabled for transmission by setting the DMAEN bit in the I2C_CR2 + // register. + w.set_dmaen(true); + // If, in the I2C_CR2 register, the LAST bit is set, I2C automatically sends a NACK + // after the next byte following EOT_1. The user can generate a Stop condition in + // the DMA Transfer Complete interrupt routine if enabled. + w.set_last(frame.send_nack() && !single_byte); + }); + // Sentinel to disable transfer when an error occurs or future is canceled. + // TODO: Generate STOP condition on cancel? let on_drop = OnDrop::new(|| { - let regs = T::regs(); - regs.cr2().modify(|w| { + T::regs().cr2().modify(|w| { w.set_dmaen(false); w.set_iterren(false); w.set_itevten(false); @@ -566,7 +567,7 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> { return Err(Error::Arbitration); } - // Set up current address, we're trying to talk to + // Set up current address we're trying to talk to T::regs().dr().write(|reg| reg.set_dr((address << 1) + 1)); // Wait for the address to be acknowledged @@ -590,7 +591,7 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> { // 18.3.8: When a single byte must be received: the NACK must be programmed during EV6 // event, i.e. program ACK=0 when ADDR=1, before clearing ADDR flag. - if frame.send_nack() && buffer_len == 1 { + if frame.send_nack() && single_byte { T::regs().cr1().modify(|w| { w.set_ack(false); }); @@ -598,27 +599,41 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> { // Clear condition by reading SR2 T::regs().sr2().read(); - } else if frame.send_nack() && buffer_len == 1 { - T::regs().cr1().modify(|w| { - w.set_ack(false); - }); + } else { + // Before starting reception of single byte (but without START condition, i.e. in case + // of continued frame), program NACK to emit at end of this byte. + if frame.send_nack() && single_byte { + T::regs().cr1().modify(|w| { + w.set_ack(false); + }); + } } - // 18.3.8: When a single byte must be received: [snip] Then the - // user can program the STOP condition either after clearing ADDR flag, or in the - // DMA Transfer Complete interrupt routine. - if frame.send_stop() && buffer_len == 1 { + // 18.3.8: When a single byte must be received: [snip] Then the user can program the STOP + // condition either after clearing ADDR flag, or in the DMA Transfer Complete interrupt + // routine. + if frame.send_stop() && single_byte { T::regs().cr1().modify(|w| { w.set_stop(true); }); } + let dma_transfer = unsafe { + // Set the I2C_DR register address in the DMA_SxPAR register. The data will be moved + // from this address from the memory after each RxE event. + let src = T::regs().dr().as_ptr() as *mut u8; + + let ch = &mut self.rx_dma; + let request = ch.request(); + Transfer::new_read(ch, request, src, buffer, Default::default()) + }; + // Wait for bytes to be received, or an error to occur. let poll_error = poll_fn(|cx| { state.waker.register(cx.waker()); match Self::check_and_clear_error_flags() { - Err(e) => Poll::Ready(Err::(e)), + Err(e) => Poll::Ready(Err::<(), Error>(e)), _ => { // When pending, (re-)enable interrupts to wake us up. Self::enable_interrupts(); @@ -636,7 +651,7 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> { w.set_dmaen(false); }); - if frame.send_stop() && buffer_len != 1 { + if frame.send_stop() && !single_byte { T::regs().cr1().modify(|w| { w.set_stop(true); }); From 0cfb65abc225cafa89562eb80d8e61389465d7ef Mon Sep 17 00:00:00 2001 From: Sebastian Goll Date: Wed, 27 Mar 2024 01:30:27 +0100 Subject: [PATCH 041/581] Add transaction stub to I2C v2 --- embassy-stm32/src/i2c/v2.rs | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/embassy-stm32/src/i2c/v2.rs b/embassy-stm32/src/i2c/v2.rs index 8baf2849d..da3b0ee30 100644 --- a/embassy-stm32/src/i2c/v2.rs +++ b/embassy-stm32/src/i2c/v2.rs @@ -557,6 +557,21 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> { Ok(()) } + /// Transaction with operations. + /// + /// Consecutive operations of same type are merged. See [transaction contract] for details. + /// + /// [transaction contract]: embedded_hal_1::i2c::I2c::transaction + pub async fn transaction(&mut self, addr: u8, operations: &mut [Operation<'_>]) -> Result<(), Error> + where + RXDMA: crate::i2c::RxDma, + TXDMA: crate::i2c::TxDma, + { + let _ = addr; + let _ = operations; + todo!() + } + // ========================= // Blocking public API From 13636556d969314843a04907d22e2921b1be388d Mon Sep 17 00:00:00 2001 From: Sebastian Goll Date: Wed, 27 Mar 2024 01:41:13 +0100 Subject: [PATCH 042/581] Mark shared data structure as dead_code for I2C v2 branch --- embassy-stm32/src/i2c/mod.rs | 3 +++ 1 file changed, 3 insertions(+) diff --git a/embassy-stm32/src/i2c/mod.rs b/embassy-stm32/src/i2c/mod.rs index 85381047d..9a91e2f25 100644 --- a/embassy-stm32/src/i2c/mod.rs +++ b/embassy-stm32/src/i2c/mod.rs @@ -356,6 +356,7 @@ impl<'d, T: Instance, TXDMA: TxDma, RXDMA: RxDma> embedded_hal_async::i2c: /// - `SP` = stop condition /// - `ACK`/`NACK` = last byte in read operation #[derive(Copy, Clone)] +#[allow(dead_code)] enum FrameOptions { /// `[ST/SR]+[NACK]+[SP]` First frame (of this type) in transaction and also last frame overall. FirstAndLastFrame, @@ -373,6 +374,7 @@ enum FrameOptions { LastFrameNoStop, } +#[allow(dead_code)] impl FrameOptions { /// Sends start or repeated start condition before transfer. fn send_start(self) -> bool { @@ -405,6 +407,7 @@ impl FrameOptions { /// the right start/stop/(N)ACK conditions on the wire. /// /// [transaction contract]: embedded_hal_1::i2c::I2c::transaction +#[allow(dead_code)] fn operation_frames<'a, 'b: 'a>( operations: &'a mut [embedded_hal_1::i2c::Operation<'b>], ) -> Result, FrameOptions)>, Error> { From b52e9a60eb929facd21eab2d524781e127f3e04b Mon Sep 17 00:00:00 2001 From: Sebastian Goll Date: Wed, 27 Mar 2024 10:39:33 +0100 Subject: [PATCH 043/581] Add missing check for empty buffer in asynchronous read_write() --- embassy-stm32/src/i2c/mod.rs | 4 ++++ embassy-stm32/src/i2c/v1.rs | 6 ++++++ 2 files changed, 10 insertions(+) diff --git a/embassy-stm32/src/i2c/mod.rs b/embassy-stm32/src/i2c/mod.rs index 9a91e2f25..d4d4aec5d 100644 --- a/embassy-stm32/src/i2c/mod.rs +++ b/embassy-stm32/src/i2c/mod.rs @@ -415,6 +415,10 @@ fn operation_frames<'a, 'b: 'a>( // Check empty read buffer before starting transaction. Otherwise, we would risk halting with an // error in the middle of the transaction. + // + // In principle, we could allow empty read frames within consecutive read operations, as long as + // at least one byte remains in the final (merged) read operation, but that makes the logic more + // complicated and error-prone. if operations.iter().any(|op| match op { Operation::Read(read) => read.is_empty(), Operation::Write(_) => false, diff --git a/embassy-stm32/src/i2c/v1.rs b/embassy-stm32/src/i2c/v1.rs index 5c57a9ccc..d45c48b24 100644 --- a/embassy-stm32/src/i2c/v1.rs +++ b/embassy-stm32/src/i2c/v1.rs @@ -669,6 +669,12 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> { RXDMA: crate::i2c::RxDma, TXDMA: crate::i2c::TxDma, { + // Check empty read buffer before starting transaction. Otherwise, we would not generate the + // stop condition below. + if read.is_empty() { + return Err(Error::Overrun); + } + self.write_frame(address, write, FrameOptions::FirstFrame).await?; self.read_frame(address, read, FrameOptions::FirstAndLastFrame).await } From bb5fcce0a095431de063aedd6eb12161d94805db Mon Sep 17 00:00:00 2001 From: Sebastian Goll Date: Wed, 27 Mar 2024 10:42:38 +0100 Subject: [PATCH 044/581] Use named imports within function to make code easier to read --- embassy-stm32/src/i2c/mod.rs | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git a/embassy-stm32/src/i2c/mod.rs b/embassy-stm32/src/i2c/mod.rs index d4d4aec5d..a46061d54 100644 --- a/embassy-stm32/src/i2c/mod.rs +++ b/embassy-stm32/src/i2c/mod.rs @@ -411,7 +411,7 @@ impl FrameOptions { fn operation_frames<'a, 'b: 'a>( operations: &'a mut [embedded_hal_1::i2c::Operation<'b>], ) -> Result, FrameOptions)>, Error> { - use embedded_hal_1::i2c::Operation; + use embedded_hal_1::i2c::Operation::{Read, Write}; // Check empty read buffer before starting transaction. Otherwise, we would risk halting with an // error in the middle of the transaction. @@ -420,8 +420,8 @@ fn operation_frames<'a, 'b: 'a>( // at least one byte remains in the final (merged) read operation, but that makes the logic more // complicated and error-prone. if operations.iter().any(|op| match op { - Operation::Read(read) => read.is_empty(), - Operation::Write(_) => false, + Read(read) => read.is_empty(), + Write(_) => false, }) { return Err(Error::Overrun); } @@ -452,12 +452,12 @@ fn operation_frames<'a, 'b: 'a>( // because the resulting frame options are identical for write operations. let frame = match (first_frame, next_op) { (true, None) => FrameOptions::FirstAndLastFrame, - (true, Some(Operation::Read(_))) => FrameOptions::FirstAndNextFrame, - (true, Some(Operation::Write(_))) => FrameOptions::FirstFrame, + (true, Some(Read(_))) => FrameOptions::FirstAndNextFrame, + (true, Some(Write(_))) => FrameOptions::FirstFrame, // (false, None) => FrameOptions::LastFrame, - (false, Some(Operation::Read(_))) => FrameOptions::NextFrame, - (false, Some(Operation::Write(_))) => FrameOptions::LastFrameNoStop, + (false, Some(Read(_))) => FrameOptions::NextFrame, + (false, Some(Write(_))) => FrameOptions::LastFrameNoStop, }; // Pre-calculate if `next_op` is the first operation of its type. We do this here and not at @@ -465,8 +465,8 @@ fn operation_frames<'a, 'b: 'a>( // anymore in the next iteration. next_first_frame = match (&op, next_op) { (_, None) => false, - (Operation::Read(_), Some(Operation::Write(_))) | (Operation::Write(_), Some(Operation::Read(_))) => true, - (Operation::Read(_), Some(Operation::Read(_))) | (Operation::Write(_), Some(Operation::Write(_))) => false, + (Read(_), Some(Write(_))) | (Write(_), Some(Read(_))) => true, + (Read(_), Some(Read(_))) | (Write(_), Some(Write(_))) => false, }; Some((op, frame)) From e3ef7cd99faf2fe46463882b35d00ef0f2a34481 Mon Sep 17 00:00:00 2001 From: Emilie Burgun Date: Wed, 27 Mar 2024 11:10:16 +0100 Subject: [PATCH 045/581] Document why embedded_io::Read cannot be implemented for the base Uart --- embassy-stm32/src/usart/mod.rs | 44 +++++++++++++++++++++++++++++++--- 1 file changed, 41 insertions(+), 3 deletions(-) diff --git a/embassy-stm32/src/usart/mod.rs b/embassy-stm32/src/usart/mod.rs index 62ea717b3..7c0523a25 100644 --- a/embassy-stm32/src/usart/mod.rs +++ b/embassy-stm32/src/usart/mod.rs @@ -209,7 +209,14 @@ enum ReadCompletionEvent { Idle(usize), } -/// Bidirectional UART Driver +/// Bidirectional UART Driver, which acts as a combination of [`UartTx`] and [`UartRx`]. +/// +/// ### Notes on [`embedded_io::Read`] +/// +/// `embedded_io::Read` requires guarantees that the base [`UartRx`] cannot provide. +/// +/// See [`UartRx`] for more details, and see [`BufferedUart`] and [`RingBufferedUartRx`] +/// as alternatives that do provide the necessary guarantees for `embedded_io::Read`. pub struct Uart<'d, T: BasicInstance, TxDma = NoDma, RxDma = NoDma> { tx: UartTx<'d, T, TxDma>, rx: UartRx<'d, T, RxDma>, @@ -225,7 +232,10 @@ impl<'d, T: BasicInstance, TxDma, RxDma> SetConfig for Uart<'d, T, TxDma, RxDma> } } -/// Tx-only UART Driver +/// Tx-only UART Driver. +/// +/// Can be obtained from [`Uart::split`], or can be constructed independently, +/// if you do not need the receiving half of the driver. pub struct UartTx<'d, T: BasicInstance, TxDma = NoDma> { phantom: PhantomData<&'d mut T>, tx_dma: PeripheralRef<'d, TxDma>, @@ -240,7 +250,35 @@ impl<'d, T: BasicInstance, TxDma> SetConfig for UartTx<'d, T, TxDma> { } } -/// Rx-only UART Driver +/// Rx-only UART Driver. +/// +/// Can be obtained from [`Uart::split`], or can be constructed independently, +/// if you do not need the transmitting half of the driver. +/// +/// ### Notes on [`embedded_io::Read`] +/// +/// `embedded_io::Read` requires guarantees that this struct cannot provide: +/// +/// - Any data received between calls to [`UartRx::read`] or [`UartRx::blocking_read`] +/// will be thrown away, as `UartRx` is unbuffered. +/// Users of `embedded_io::Read` are likely to not expect this behavior +/// (for instance if they read multiple small chunks in a row). +/// - [`UartRx::read`] and [`UartRx::blocking_read`] only return once the entire buffer has been +/// filled, whereas `embedded_io::Read` requires us to fill the buffer with what we already +/// received, and only block/wait until the first byte arrived. +///
+/// While [`UartRx::read_until_idle`] does return early, it will still eagerly wait for data until +/// the buffer is full or no data has been transmitted in a while, +/// which may not be what users of `embedded_io::Read` expect. +/// +/// [`UartRx::into_ring_buffered`] can be called to equip `UartRx` with a buffer, +/// that it can then use to store data received between calls to `read`, +/// provided you are using DMA already. +/// +/// Alternatively, you can use [`BufferedUartRx`], which is interrupt-based and which can also +/// store data received between calls. +/// +/// Also see [this github comment](https://github.com/embassy-rs/embassy/pull/2185#issuecomment-1810047043). pub struct UartRx<'d, T: BasicInstance, RxDma = NoDma> { _peri: PeripheralRef<'d, T>, rx_dma: PeripheralRef<'d, RxDma>, From c0590626273f020893a8fedf7bffa1cb9a9a6d77 Mon Sep 17 00:00:00 2001 From: Maarten de Vries Date: Wed, 27 Mar 2024 15:39:44 +0100 Subject: [PATCH 046/581] embassy_stm32: Preseve the RTR flag in messages. --- embassy-stm32/src/can/bx/mod.rs | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/embassy-stm32/src/can/bx/mod.rs b/embassy-stm32/src/can/bx/mod.rs index a369ae6fd..121da1bb2 100644 --- a/embassy-stm32/src/can/bx/mod.rs +++ b/embassy-stm32/src/can/bx/mod.rs @@ -776,13 +776,13 @@ where let mb = self.canregs.tx(idx); - let id = IdReg(mb.tir().read().0).id(); + let id = IdReg(mb.tir().read().0); let mut data = [0xff; 8]; data[0..4].copy_from_slice(&mb.tdlr().read().0.to_ne_bytes()); data[4..8].copy_from_slice(&mb.tdhr().read().0.to_ne_bytes()); let len = mb.tdtr().read().dlc(); - Some(Frame::new(Header::new(id, len, false), &data).unwrap()) + Some(Frame::new(Header::new(id.id(), len, id.rtr()), &data).unwrap()) } else { // Abort request failed because the frame was already sent (or being sent) on // the bus. All mailboxes are now free. This can happen for small prescaler @@ -915,7 +915,7 @@ fn receive_fifo(canregs: crate::pac::can::Can, fifo_nr: usize) -> nb::Result nb::Result Date: Sun, 24 Mar 2024 07:19:00 +1000 Subject: [PATCH 047/581] CAN: Move some FDCAN definitions into a module to share with BXCAN. --- embassy-stm32/src/can/common.rs | 51 +++++++++++++++++++++++++++ embassy-stm32/src/can/fdcan.rs | 62 ++++++--------------------------- 2 files changed, 61 insertions(+), 52 deletions(-) create mode 100644 embassy-stm32/src/can/common.rs diff --git a/embassy-stm32/src/can/common.rs b/embassy-stm32/src/can/common.rs new file mode 100644 index 000000000..1de54e5a1 --- /dev/null +++ b/embassy-stm32/src/can/common.rs @@ -0,0 +1,51 @@ +use embassy_sync::channel::{DynamicReceiver, DynamicSender}; + +use crate::can::_version::frame::*; +use crate::can::_version::Timestamp; +use crate::can::_version::enums::*; + +pub(crate) struct ClassicBufferedRxInner { + pub rx_sender: DynamicSender<'static, Result<(ClassicFrame, Timestamp), BusError>>, +} +pub(crate) struct ClassicBufferedTxInner { + pub tx_receiver: DynamicReceiver<'static, ClassicFrame>, +} + +pub(crate) struct FdBufferedRxInner { + pub rx_sender: DynamicSender<'static, Result<(FdFrame, Timestamp), BusError>>, +} +pub(crate) struct FdBufferedTxInner { + pub tx_receiver: DynamicReceiver<'static, FdFrame>, +} + +/// Sender that can be used for sending CAN frames. +#[derive(Copy, Clone)] +pub struct BufferedCanSender { + pub(crate) tx_buf: embassy_sync::channel::DynamicSender<'static, ClassicFrame>, + pub(crate) waker: fn(), +} + +impl BufferedCanSender { + /// Async write frame to TX buffer. + pub fn try_write(&mut self, frame: ClassicFrame) -> Result<(), embassy_sync::channel::TrySendError> { + self.tx_buf.try_send(frame)?; + (self.waker)(); + Ok(()) + } + + /// Async write frame to TX buffer. + pub async fn write(&mut self, frame: ClassicFrame) { + self.tx_buf.send(frame).await; + (self.waker)(); + } + + /// Allows a poll_fn to poll until the channel is ready to write + pub fn poll_ready_to_send(&self, cx: &mut core::task::Context<'_>) -> core::task::Poll<()> { + self.tx_buf.poll_ready_to_send(cx) + } +} + +/// Receiver that can be used for receiving CAN frames. Note, each CAN frame will only be received by one receiver. +pub type BufferedCanReceiver = + embassy_sync::channel::DynamicReceiver<'static, Result<(ClassicFrame, Timestamp), BusError>>; + diff --git a/embassy-stm32/src/can/fdcan.rs b/embassy-stm32/src/can/fdcan.rs index 4ea036ab4..c42c42853 100644 --- a/embassy-stm32/src/can/fdcan.rs +++ b/embassy-stm32/src/can/fdcan.rs @@ -14,6 +14,7 @@ use crate::interrupt::typelevel::Interrupt; use crate::rcc::RccPeripheral; use crate::{interrupt, peripherals, Peripheral}; +mod common; pub mod enums; pub(crate) mod fd; pub mod frame; @@ -24,6 +25,7 @@ use fd::config::*; use fd::filter::*; pub use fd::{config, filter}; use frame::*; +pub use self::common::{BufferedCanSender, BufferedCanReceiver}; /// Timestamp for incoming packets. Use Embassy time when enabled. #[cfg(feature = "time")] @@ -414,36 +416,6 @@ pub struct BufferedCan<'d, T: Instance, const TX_BUF_SIZE: usize, const RX_BUF_S rx_buf: &'static RxBuf, } -/// Sender that can be used for sending CAN frames. -#[derive(Copy, Clone)] -pub struct BufferedCanSender { - tx_buf: embassy_sync::channel::DynamicSender<'static, ClassicFrame>, - waker: fn(), -} - -impl BufferedCanSender { - /// Async write frame to TX buffer. - pub fn try_write(&mut self, frame: ClassicFrame) -> Result<(), embassy_sync::channel::TrySendError> { - self.tx_buf.try_send(frame)?; - (self.waker)(); - Ok(()) - } - - /// Async write frame to TX buffer. - pub async fn write(&mut self, frame: ClassicFrame) { - self.tx_buf.send(frame).await; - (self.waker)(); - } - - /// Allows a poll_fn to poll until the channel is ready to write - pub fn poll_ready_to_send(&self, cx: &mut core::task::Context<'_>) -> core::task::Poll<()> { - self.tx_buf.poll_ready_to_send(cx) - } -} - -/// Receiver that can be used for receiving CAN frames. Note, each CAN frame will only be received by one receiver. -pub type BufferedCanReceiver = - embassy_sync::channel::DynamicReceiver<'static, Result<(ClassicFrame, Timestamp), BusError>>; impl<'c, 'd, T: Instance, const TX_BUF_SIZE: usize, const RX_BUF_SIZE: usize> BufferedCan<'d, T, TX_BUF_SIZE, RX_BUF_SIZE> @@ -468,10 +440,10 @@ impl<'c, 'd, T: Instance, const TX_BUF_SIZE: usize, const RX_BUF_SIZE: usize> fn setup(self) -> Self { // We don't want interrupts being processed while we change modes. critical_section::with(|_| unsafe { - let rx_inner = ClassicBufferedRxInner { + let rx_inner = self::common::ClassicBufferedRxInner { rx_sender: self.rx_buf.sender().into(), }; - let tx_inner = ClassicBufferedTxInner { + let tx_inner = self::common::ClassicBufferedTxInner { tx_receiver: self.tx_buf.receiver().into(), }; T::mut_state().rx_mode = RxMode::ClassicBuffered(rx_inner); @@ -586,10 +558,10 @@ impl<'c, 'd, T: Instance, const TX_BUF_SIZE: usize, const RX_BUF_SIZE: usize> fn setup(self) -> Self { // We don't want interrupts being processed while we change modes. critical_section::with(|_| unsafe { - let rx_inner = FdBufferedRxInner { + let rx_inner = self::common::FdBufferedRxInner { rx_sender: self.rx_buf.sender().into(), }; - let tx_inner = FdBufferedTxInner { + let tx_inner = self::common::FdBufferedTxInner { tx_receiver: self.tx_buf.receiver().into(), }; T::mut_state().rx_mode = RxMode::FdBuffered(rx_inner); @@ -678,24 +650,10 @@ impl<'c, 'd, T: Instance> FdcanRx<'d, T> { } } -struct ClassicBufferedRxInner { - rx_sender: DynamicSender<'static, Result<(ClassicFrame, Timestamp), BusError>>, -} -struct ClassicBufferedTxInner { - tx_receiver: DynamicReceiver<'static, ClassicFrame>, -} - -struct FdBufferedRxInner { - rx_sender: DynamicSender<'static, Result<(FdFrame, Timestamp), BusError>>, -} -struct FdBufferedTxInner { - tx_receiver: DynamicReceiver<'static, FdFrame>, -} - enum RxMode { NonBuffered(AtomicWaker), - ClassicBuffered(ClassicBufferedRxInner), - FdBuffered(FdBufferedRxInner), + ClassicBuffered(self::common::ClassicBufferedRxInner), + FdBuffered(self::common::FdBufferedRxInner), } impl RxMode { @@ -765,8 +723,8 @@ impl RxMode { enum TxMode { NonBuffered(AtomicWaker), - ClassicBuffered(ClassicBufferedTxInner), - FdBuffered(FdBufferedTxInner), + ClassicBuffered(self::common::ClassicBufferedTxInner), + FdBuffered(self::common::FdBufferedTxInner), } impl TxMode { From 32065d7719e8dd2f5da7787d4b7edf3109c632ba Mon Sep 17 00:00:00 2001 From: Corey Schuhen Date: Thu, 14 Mar 2024 21:13:19 +1000 Subject: [PATCH 048/581] BXCAN: Cut out more that wasn't required from BXCAN crate. --- embassy-stm32/src/can/bx/mod.rs | 123 +++----------------------------- embassy-stm32/src/can/bxcan.rs | 7 +- 2 files changed, 11 insertions(+), 119 deletions(-) diff --git a/embassy-stm32/src/can/bx/mod.rs b/embassy-stm32/src/can/bx/mod.rs index 121da1bb2..5ea0471c9 100644 --- a/embassy-stm32/src/can/bx/mod.rs +++ b/embassy-stm32/src/can/bx/mod.rs @@ -602,54 +602,14 @@ where unsafe { Tx::::conjure(self.canregs).abort(mailbox) } } - /// Returns a received frame if available. - /// - /// This will first check FIFO 0 for a message or error. If none are available, FIFO 1 is - /// checked. - /// - /// Returns `Err` when a frame was lost due to buffer overrun. - pub fn receive(&mut self) -> nb::Result { - // Safety: We have a `&mut self` and have unique access to the peripheral. - let mut rx0 = unsafe { Rx0::::conjure(self.canregs) }; - let mut rx1 = unsafe { Rx1::::conjure(self.canregs) }; - match rx0.receive() { - Err(nb::Error::WouldBlock) => rx1.receive(), - result => result, - } - } - - /// Returns a reference to the RX FIFO 0. - pub fn rx0(&mut self) -> Rx0 { - // Safety: We take `&mut self` and the return value lifetimes are tied to `self`'s lifetime. - unsafe { Rx0::conjure(self.canregs) } - } - - /// Returns a reference to the RX FIFO 1. - pub fn rx1(&mut self) -> Rx1 { - // Safety: We take `&mut self` and the return value lifetimes are tied to `self`'s lifetime. - unsafe { Rx1::conjure(self.canregs) } - } - - pub(crate) fn split_by_ref(&mut self) -> (Tx, Rx0, Rx1) { + pub(crate) fn split_by_ref(&mut self) -> (Tx, Rx) { // Safety: We take `&mut self` and the return value lifetimes are tied to `self`'s lifetime. let tx = unsafe { Tx::conjure(self.canregs) }; - let rx0 = unsafe { Rx0::conjure(self.canregs) }; - let rx1 = unsafe { Rx1::conjure(self.canregs) }; - (tx, rx0, rx1) + let rx0 = unsafe { Rx::conjure() }; + (tx, rx0) } - /// Consumes this `Can` instance and splits it into transmitting and receiving halves. - pub fn split(self) -> (Tx, Rx0, Rx1) { - // Safety: `Self` is not `Copy` and is destroyed by moving it into this method. - unsafe { - ( - Tx::conjure(self.canregs), - Rx0::conjure(self.canregs), - Rx1::conjure(self.canregs), - ) - } - } } impl Can { @@ -662,7 +622,7 @@ impl Can { } } -/// Interface to the CAN transmitter part. +/// Marker for Tx half pub struct Tx { _can: PhantomData, canregs: crate::pac::can::Can, @@ -844,87 +804,20 @@ where } } -/// Interface to receiver FIFO 0. -pub struct Rx0 { +/// Marker for Rx half +pub struct Rx { _can: PhantomData, - canregs: crate::pac::can::Can, } -impl Rx0 +impl Rx where I: Instance, { - unsafe fn conjure(canregs: crate::pac::can::Can) -> Self { + unsafe fn conjure() -> Self { Self { _can: PhantomData, - canregs, } } - - /// Returns a received frame if available. - /// - /// Returns `Err` when a frame was lost due to buffer overrun. - pub fn receive(&mut self) -> nb::Result { - receive_fifo(self.canregs, 0) - } -} - -/// Interface to receiver FIFO 1. -pub struct Rx1 { - _can: PhantomData, - canregs: crate::pac::can::Can, -} - -impl Rx1 -where - I: Instance, -{ - unsafe fn conjure(canregs: crate::pac::can::Can) -> Self { - Self { - _can: PhantomData, - canregs, - } - } - - /// Returns a received frame if available. - /// - /// Returns `Err` when a frame was lost due to buffer overrun. - pub fn receive(&mut self) -> nb::Result { - receive_fifo(self.canregs, 1) - } -} - -fn receive_fifo(canregs: crate::pac::can::Can, fifo_nr: usize) -> nb::Result { - assert!(fifo_nr < 2); - let rfr = canregs.rfr(fifo_nr); - let rx = canregs.rx(fifo_nr); - - //let rfr = &can.rfr[fifo_nr]; - //let rx = &can.rx[fifo_nr]; - - // Check if a frame is available in the mailbox. - let rfr_read = rfr.read(); - if rfr_read.fmp() == 0 { - return Err(nb::Error::WouldBlock); - } - - // Check for RX FIFO overrun. - if rfr_read.fovr() { - rfr.write(|w| w.set_fovr(true)); - return Err(nb::Error::Other(OverrunError { _priv: () })); - } - - // Read the frame. - let id = IdReg(rx.rir().read().0); - let mut data = [0xff; 8]; - data[0..4].copy_from_slice(&rx.rdlr().read().0.to_ne_bytes()); - data[4..8].copy_from_slice(&rx.rdhr().read().0.to_ne_bytes()); - let len = rx.rdtr().read().dlc(); - - // Release the mailbox. - rfr.write(|w| w.set_rfom(true)); - - Ok(Frame::new(Header::new(id.id(), len, id.rtr()), &data).unwrap()) } /// Identifies one of the two receive FIFOs. diff --git a/embassy-stm32/src/can/bxcan.rs b/embassy-stm32/src/can/bxcan.rs index 017c5110d..9d2b8797e 100644 --- a/embassy-stm32/src/can/bxcan.rs +++ b/embassy-stm32/src/can/bxcan.rs @@ -296,8 +296,8 @@ impl<'d, T: Instance> Can<'d, T> { /// /// Useful for doing separate transmit/receive tasks. pub fn split<'c>(&'c mut self) -> (CanTx<'d, T>, CanRx<'d, T>) { - let (tx, rx0, rx1) = self.can.split_by_ref(); - (CanTx { tx }, CanRx { rx0, rx1 }) + let (tx, rx) = self.can.split_by_ref(); + (CanTx { tx }, CanRx { rx}) } } @@ -401,8 +401,7 @@ impl<'d, T: Instance> CanTx<'d, T> { /// CAN driver, receive half. #[allow(dead_code)] pub struct CanRx<'d, T: Instance> { - rx0: crate::can::bx::Rx0>, - rx1: crate::can::bx::Rx1>, + rx: crate::can::bx::Rx>, } impl<'d, T: Instance> CanRx<'d, T> { From 3bdaad39e8955fe52e55c65a834dfc42dc54d676 Mon Sep 17 00:00:00 2001 From: Corey Schuhen Date: Sun, 24 Mar 2024 07:20:33 +1000 Subject: [PATCH 049/581] BXCAN: Register access into new Registers struct. --- embassy-stm32/src/can/bx/mod.rs | 753 +++++++++++++++++++------------- embassy-stm32/src/can/bxcan.rs | 76 +--- embassy-stm32/src/can/common.rs | 12 +- embassy-stm32/src/can/fdcan.rs | 4 +- 4 files changed, 465 insertions(+), 380 deletions(-) diff --git a/embassy-stm32/src/can/bx/mod.rs b/embassy-stm32/src/can/bx/mod.rs index 5ea0471c9..9b6ebf5a4 100644 --- a/embassy-stm32/src/can/bx/mod.rs +++ b/embassy-stm32/src/can/bx/mod.rs @@ -43,7 +43,35 @@ pub type Data = crate::can::frame::ClassicData; /// CAN Frame pub type Frame = crate::can::frame::ClassicFrame; +use crate::can::_version::Envelope; use crate::can::bx::filter::MasterFilters; +use crate::can::enums::BusError; +use crate::pac::can::vals::Lec; + +#[derive(Debug, Copy, Clone, Eq, PartialEq)] +pub(crate) enum RxFifo { + Fifo0, + Fifo1, +} + +trait IntoBusError { + fn into_bus_err(self) -> Option; +} + +impl IntoBusError for Lec { + fn into_bus_err(self) -> Option { + match self { + Lec::STUFF => Some(BusError::Stuff), + Lec::FORM => Some(BusError::Form), + Lec::ACK => Some(BusError::Acknowledge), + Lec::BITRECESSIVE => Some(BusError::BitRecessive), + Lec::BITDOMINANT => Some(BusError::BitDominant), + Lec::CRC => Some(BusError::Crc), + Lec::CUSTOM => Some(BusError::Software), + _ => None, + } + } +} /// A bxCAN peripheral instance. /// @@ -233,229 +261,36 @@ impl PartialOrd for IdReg { } } -/// Configuration proxy returned by [`Can::modify_config`]. -#[must_use = "`CanConfig` leaves the peripheral in uninitialized state, call `CanConfig::enable` or explicitly drop the value"] -pub struct CanConfig<'a, I: Instance> { - can: &'a mut Can, +pub(crate) struct Registers { + pub canregs: crate::pac::can::Can, } -impl CanConfig<'_, I> { - /// Configures the bit timings. - /// - /// You can use to calculate the `btr` parameter. Enter - /// parameters as follows: - /// - /// - *Clock Rate*: The input clock speed to the CAN peripheral (*not* the CPU clock speed). - /// This is the clock rate of the peripheral bus the CAN peripheral is attached to (eg. APB1). - /// - *Sample Point*: Should normally be left at the default value of 87.5%. - /// - *SJW*: Should normally be left at the default value of 1. - /// - /// Then copy the `CAN_BUS_TIME` register value from the table and pass it as the `btr` - /// parameter to this method. - pub fn set_bit_timing(self, bt: crate::can::util::NominalBitTiming) -> Self { - self.can.set_bit_timing(bt); - self - } - - /// Enables or disables loopback mode: Internally connects the TX and RX - /// signals together. - pub fn set_loopback(self, enabled: bool) -> Self { - self.can.canregs.btr().modify(|reg| reg.set_lbkm(enabled)); - self - } - - /// Enables or disables silent mode: Disconnects the TX signal from the pin. - pub fn set_silent(self, enabled: bool) -> Self { - let mode = match enabled { - false => stm32_metapac::can::vals::Silm::NORMAL, - true => stm32_metapac::can::vals::Silm::SILENT, - }; - self.can.canregs.btr().modify(|reg| reg.set_silm(mode)); - self - } - - /// Enables or disables automatic retransmission of messages. - /// - /// If this is enabled, the CAN peripheral will automatically try to retransmit each frame - /// until it can be sent. Otherwise, it will try only once to send each frame. - /// - /// Automatic retransmission is enabled by default. - pub fn set_automatic_retransmit(self, enabled: bool) -> Self { - self.can.canregs.mcr().modify(|reg| reg.set_nart(enabled)); - self - } - - /// Leaves initialization mode and enables the peripheral. - /// - /// To sync with the CAN bus, this will block until 11 consecutive recessive bits are detected - /// on the bus. - /// - /// If you want to finish configuration without enabling the peripheral, you can call - /// [`CanConfig::leave_disabled`] or [`drop`] the [`CanConfig`] instead. - pub fn enable(mut self) { - self.leave_init_mode(); - - match nb::block!(self.can.enable_non_blocking()) { - Ok(()) => {} - Err(void) => match void {}, - } - - // Don't run the destructor. - mem::forget(self); - } - - /// Leaves initialization mode, but keeps the peripheral in sleep mode. - /// - /// Before the [`Can`] instance can be used, you have to enable it by calling - /// [`Can::enable_non_blocking`]. - pub fn leave_disabled(mut self) { - self.leave_init_mode(); - } - - /// Leaves initialization mode, enters sleep mode. - fn leave_init_mode(&mut self) { - self.can.canregs.mcr().modify(|reg| { - reg.set_sleep(true); - reg.set_inrq(false); - }); - loop { - let msr = self.can.canregs.msr().read(); - if msr.slak() && !msr.inak() { - break; - } - } - } -} - -impl Drop for CanConfig<'_, I> { - #[inline] - fn drop(&mut self) { - self.leave_init_mode(); - } -} - -/// Builder returned by [`Can::builder`]. -#[must_use = "`CanBuilder` leaves the peripheral in uninitialized state, call `CanBuilder::enable` or `CanBuilder::leave_disabled`"] -pub struct CanBuilder { - can: Can, -} - -impl CanBuilder { - /// Configures the bit timings. - /// - /// You can use to calculate the `btr` parameter. Enter - /// parameters as follows: - /// - /// - *Clock Rate*: The input clock speed to the CAN peripheral (*not* the CPU clock speed). - /// This is the clock rate of the peripheral bus the CAN peripheral is attached to (eg. APB1). - /// - *Sample Point*: Should normally be left at the default value of 87.5%. - /// - *SJW*: Should normally be left at the default value of 1. - /// - /// Then copy the `CAN_BUS_TIME` register value from the table and pass it as the `btr` - /// parameter to this method. - pub fn set_bit_timing(mut self, bt: crate::can::util::NominalBitTiming) -> Self { - self.can.set_bit_timing(bt); - self - } - /// Enables or disables loopback mode: Internally connects the TX and RX - /// signals together. - pub fn set_loopback(self, enabled: bool) -> Self { - self.can.canregs.btr().modify(|reg| reg.set_lbkm(enabled)); - self - } - - /// Enables or disables silent mode: Disconnects the TX signal from the pin. - pub fn set_silent(self, enabled: bool) -> Self { - let mode = match enabled { - false => stm32_metapac::can::vals::Silm::NORMAL, - true => stm32_metapac::can::vals::Silm::SILENT, - }; - self.can.canregs.btr().modify(|reg| reg.set_silm(mode)); - self - } - - /// Enables or disables automatic retransmission of messages. - /// - /// If this is enabled, the CAN peripheral will automatically try to retransmit each frame - /// until it can be sent. Otherwise, it will try only once to send each frame. - /// - /// Automatic retransmission is enabled by default. - pub fn set_automatic_retransmit(self, enabled: bool) -> Self { - self.can.canregs.mcr().modify(|reg| reg.set_nart(enabled)); - self - } - - /// Leaves initialization mode and enables the peripheral. - /// - /// To sync with the CAN bus, this will block until 11 consecutive recessive bits are detected - /// on the bus. - /// - /// If you want to finish configuration without enabling the peripheral, you can call - /// [`CanBuilder::leave_disabled`] instead. - pub fn enable(mut self) -> Can { - self.leave_init_mode(); - - match nb::block!(self.can.enable_non_blocking()) { - Ok(()) => self.can, - Err(void) => match void {}, - } - } - - /// Returns the [`Can`] interface without enabling it. - /// - /// This leaves initialization mode, but keeps the peripheral in sleep mode instead of enabling - /// it. - /// - /// Before the [`Can`] instance can be used, you have to enable it by calling - /// [`Can::enable_non_blocking`]. - pub fn leave_disabled(mut self) -> Can { - self.leave_init_mode(); - self.can - } - - /// Leaves initialization mode, enters sleep mode. - fn leave_init_mode(&mut self) { - self.can.canregs.mcr().modify(|reg| { - reg.set_sleep(true); - reg.set_inrq(false); - }); - loop { - let msr = self.can.canregs.msr().read(); - if msr.slak() && !msr.inak() { - break; - } - } - } -} - -/// Interface to a bxCAN peripheral. -pub struct Can { - instance: I, - canregs: crate::pac::can::Can, -} - -impl Can -where - I: Instance, -{ - /// Creates a [`CanBuilder`] for constructing a CAN interface. - pub fn builder(instance: I, canregs: crate::pac::can::Can) -> CanBuilder { - let can_builder = CanBuilder { - can: Can { instance, canregs }, - }; - - canregs.mcr().modify(|reg| { +impl Registers { + fn enter_init_mode(&mut self) { + self.canregs.mcr().modify(|reg| { reg.set_sleep(false); reg.set_inrq(true); }); loop { - let msr = canregs.msr().read(); + let msr = self.canregs.msr().read(); if !msr.slak() && msr.inak() { break; } } + } - can_builder + // Leaves initialization mode, enters sleep mode. + fn leave_init_mode(&mut self) { + self.canregs.mcr().modify(|reg| { + reg.set_sleep(true); + reg.set_inrq(false); + }); + loop { + let msr = self.canregs.msr().read(); + if msr.slak() && !msr.inak() { + break; + } + } } fn set_bit_timing(&mut self, bt: crate::can::util::NominalBitTiming) { @@ -471,38 +306,29 @@ where }); } - /// Returns a reference to the peripheral instance. - /// - /// This allows accessing HAL-specific data stored in the instance type. - pub fn instance(&mut self) -> &mut I { - &mut self.instance + /// Enables or disables silent mode: Disconnects the TX signal from the pin. + pub fn set_silent(&self, enabled: bool) { + let mode = match enabled { + false => stm32_metapac::can::vals::Silm::NORMAL, + true => stm32_metapac::can::vals::Silm::SILENT, + }; + self.canregs.btr().modify(|reg| reg.set_silm(mode)); } - /// Disables the CAN interface and returns back the raw peripheral it was created from. + /// Enables or disables automatic retransmission of messages. /// - /// The peripheral is disabled by setting `RESET` in `CAN_MCR`, which causes the peripheral to - /// enter sleep mode. - pub fn free(self) -> I { - self.canregs.mcr().write(|reg| reg.set_reset(true)); - self.instance + /// If this is enabled, the CAN peripheral will automatically try to retransmit each frame + /// until it can be sent. Otherwise, it will try only once to send each frame. + /// + /// Automatic retransmission is enabled by default. + pub fn set_automatic_retransmit(&self, enabled: bool) { + self.canregs.mcr().modify(|reg| reg.set_nart(enabled)); } - /// Configure bit timings and silent/loop-back mode. - /// - /// Calling this method will enter initialization mode. - pub fn modify_config(&mut self) -> CanConfig<'_, I> { - self.canregs.mcr().modify(|reg| { - reg.set_sleep(false); - reg.set_inrq(true); - }); - loop { - let msr = self.canregs.msr().read(); - if !msr.slak() && msr.inak() { - break; - } - } - - CanConfig { can: self } + /// Enables or disables loopback mode: Internally connects the TX and RX + /// signals together. + pub fn set_loopback(&self, enabled: bool) { + self.canregs.btr().modify(|reg| reg.set_lbkm(enabled)); } /// Configures the automatic wake-up feature. @@ -512,6 +338,7 @@ where /// When turned on, an incoming frame will cause the peripheral to wake up from sleep and /// receive the frame. If enabled, [`Interrupt::Wakeup`] will also be triggered by the incoming /// frame. + #[allow(dead_code)] pub fn set_automatic_wakeup(&mut self, enabled: bool) { self.canregs.mcr().modify(|reg| reg.set_awum(enabled)); } @@ -540,6 +367,7 @@ where /// Puts the peripheral in a sleep mode to save power. /// /// While in sleep mode, an incoming CAN frame will trigger [`Interrupt::Wakeup`] if enabled. + #[allow(dead_code)] pub fn sleep(&mut self) { self.canregs.mcr().modify(|reg| { reg.set_sleep(true); @@ -553,10 +381,19 @@ where } } + /// Disables the CAN interface. + /// + /// The peripheral is disabled by setting `RESET` in `CAN_MCR`, which causes the peripheral to + /// enter sleep mode. + pub fn reset(&self) { + self.canregs.mcr().write(|reg| reg.set_reset(true)); + } + /// Wakes up from sleep mode. /// /// Note that this will not trigger [`Interrupt::Wakeup`], only reception of an incoming CAN /// frame will cause that interrupt. + #[allow(dead_code)] pub fn wakeup(&mut self) { self.canregs.mcr().modify(|reg| { reg.set_sleep(false); @@ -569,74 +406,19 @@ where } } } - - /// Puts a CAN frame in a free transmit mailbox for transmission on the bus. - /// - /// Frames are transmitted to the bus based on their priority (see [`FramePriority`]). - /// Transmit order is preserved for frames with identical priority. - /// - /// If all transmit mailboxes are full, and `frame` has a higher priority than the - /// lowest-priority message in the transmit mailboxes, transmission of the enqueued frame is - /// cancelled and `frame` is enqueued instead. The frame that was replaced is returned as - /// [`TransmitStatus::dequeued_frame`]. - pub fn transmit(&mut self, frame: &Frame) -> nb::Result { - // Safety: We have a `&mut self` and have unique access to the peripheral. - unsafe { Tx::::conjure(self.canregs).transmit(frame) } - } - - /// Returns `true` if no frame is pending for transmission. - pub fn is_transmitter_idle(&self) -> bool { - // Safety: Read-only operation. - unsafe { Tx::::conjure(self.canregs).is_idle() } - } - - /// Attempts to abort the sending of a frame that is pending in a mailbox. - /// - /// If there is no frame in the provided mailbox, or its transmission succeeds before it can be - /// aborted, this function has no effect and returns `false`. - /// - /// If there is a frame in the provided mailbox, and it is canceled successfully, this function - /// returns `true`. - pub fn abort(&mut self, mailbox: Mailbox) -> bool { - // Safety: We have a `&mut self` and have unique access to the peripheral. - unsafe { Tx::::conjure(self.canregs).abort(mailbox) } - } - - - pub(crate) fn split_by_ref(&mut self) -> (Tx, Rx) { - // Safety: We take `&mut self` and the return value lifetimes are tied to `self`'s lifetime. - let tx = unsafe { Tx::conjure(self.canregs) }; - let rx0 = unsafe { Rx::conjure() }; - (tx, rx0) - } - -} - -impl Can { - /// Accesses the filter banks owned by this CAN peripheral. - /// - /// To modify filters of a slave peripheral, `modify_filters` has to be called on the master - /// peripheral instead. - pub fn modify_filters(&mut self) -> MasterFilters<'_, I> { - unsafe { MasterFilters::new(self.canregs) } - } -} - -/// Marker for Tx half -pub struct Tx { - _can: PhantomData, - canregs: crate::pac::can::Can, -} - -impl Tx -where - I: Instance, -{ - unsafe fn conjure(canregs: crate::pac::can::Can) -> Self { - Self { - _can: PhantomData, - canregs, + + pub fn curr_error(&self) -> Option { + let err = { self.canregs.esr().read() }; + if err.boff() { + return Some(BusError::BusOff); + } else if err.epvf() { + return Some(BusError::BusPassive); + } else if err.ewgf() { + return Some(BusError::BusWarning); + } else if let Some(err) = err.lec().into_bus_err() { + return Some(err); } + None } /// Puts a CAN frame in a transmit mailbox for transmission on the bus. @@ -802,6 +584,361 @@ where reg.set_rqcp(2, true); }); } + + pub fn receive_fifo(&self, fifo: crate::can::_version::bx::RxFifo) -> Option { + // Generate timestamp as early as possible + #[cfg(feature = "time")] + let ts = embassy_time::Instant::now(); + + use crate::pac::can::vals::Ide; + + let fifo_idx = match fifo { + crate::can::_version::bx::RxFifo::Fifo0 => 0usize, + crate::can::_version::bx::RxFifo::Fifo1 => 1usize, + }; + let rfr = self.canregs.rfr(fifo_idx); + let fifo = self.canregs.rx(fifo_idx); + + // If there are no pending messages, there is nothing to do + if rfr.read().fmp() == 0 { + return None; + } + + let rir = fifo.rir().read(); + let id: embedded_can::Id = if rir.ide() == Ide::STANDARD { + embedded_can::StandardId::new(rir.stid()).unwrap().into() + } else { + let stid = (rir.stid() & 0x7FF) as u32; + let exid = rir.exid() & 0x3FFFF; + let id = (stid << 18) | (exid); + embedded_can::ExtendedId::new(id).unwrap().into() + }; + let data_len = fifo.rdtr().read().dlc(); + let mut data: [u8; 8] = [0; 8]; + data[0..4].copy_from_slice(&fifo.rdlr().read().0.to_ne_bytes()); + data[4..8].copy_from_slice(&fifo.rdhr().read().0.to_ne_bytes()); + + let frame = Frame::new(Header::new(id, data_len, false), &data).unwrap(); + let envelope = Envelope { + #[cfg(feature = "time")] + ts, + frame, + }; + + rfr.modify(|v| v.set_rfom(true)); + + Some(envelope) + } +} + +/// Configuration proxy returned by [`Can::modify_config`]. +#[must_use = "`CanConfig` leaves the peripheral in uninitialized state, call `CanConfig::enable` or explicitly drop the value"] +pub struct CanConfig<'a, I: Instance> { + can: &'a mut Can, +} + +impl CanConfig<'_, I> { + /// Configures the bit timings. + /// + /// You can use to calculate the `btr` parameter. Enter + /// parameters as follows: + /// + /// - *Clock Rate*: The input clock speed to the CAN peripheral (*not* the CPU clock speed). + /// This is the clock rate of the peripheral bus the CAN peripheral is attached to (eg. APB1). + /// - *Sample Point*: Should normally be left at the default value of 87.5%. + /// - *SJW*: Should normally be left at the default value of 1. + /// + /// Then copy the `CAN_BUS_TIME` register value from the table and pass it as the `btr` + /// parameter to this method. + pub fn set_bit_timing(self, bt: crate::can::util::NominalBitTiming) -> Self { + self.can.registers.set_bit_timing(bt); + self + } + + /// Enables or disables loopback mode: Internally connects the TX and RX + /// signals together. + pub fn set_loopback(self, enabled: bool) -> Self { + self.can.registers.set_loopback(enabled); + self + } + + /// Enables or disables silent mode: Disconnects the TX signal from the pin. + pub fn set_silent(self, enabled: bool) -> Self { + self.can.registers.set_silent(enabled); + self + } + + /// Enables or disables automatic retransmission of messages. + /// + /// If this is enabled, the CAN peripheral will automatically try to retransmit each frame + /// until it can be sent. Otherwise, it will try only once to send each frame. + /// + /// Automatic retransmission is enabled by default. + pub fn set_automatic_retransmit(self, enabled: bool) -> Self { + self.can.registers.set_automatic_retransmit(enabled); + self + } + + /// Leaves initialization mode and enables the peripheral. + /// + /// To sync with the CAN bus, this will block until 11 consecutive recessive bits are detected + /// on the bus. + /// + /// If you want to finish configuration without enabling the peripheral, you can call + /// [`CanConfig::leave_disabled`] or [`drop`] the [`CanConfig`] instead. + pub fn enable(self) { + self.can.registers.leave_init_mode(); + + match nb::block!(self.can.registers.enable_non_blocking()) { + Ok(()) => {} + Err(void) => match void {}, + } + + // Don't run the destructor. + mem::forget(self); + } + + /// Leaves initialization mode, but keeps the peripheral in sleep mode. + /// + /// Before the [`Can`] instance can be used, you have to enable it by calling + /// [`Can::enable_non_blocking`]. + pub fn leave_disabled(self) { + self.can.registers.leave_init_mode(); + } +} + +impl Drop for CanConfig<'_, I> { + #[inline] + fn drop(&mut self) { + self.can.registers.leave_init_mode(); + } +} + +/// Builder returned by [`Can::builder`]. +#[must_use = "`CanBuilder` leaves the peripheral in uninitialized state, call `CanBuilder::enable` or `CanBuilder::leave_disabled`"] +pub struct CanBuilder { + can: Can, +} + +impl CanBuilder { + /// Configures the bit timings. + /// + /// You can use to calculate the `btr` parameter. Enter + /// parameters as follows: + /// + /// - *Clock Rate*: The input clock speed to the CAN peripheral (*not* the CPU clock speed). + /// This is the clock rate of the peripheral bus the CAN peripheral is attached to (eg. APB1). + /// - *Sample Point*: Should normally be left at the default value of 87.5%. + /// - *SJW*: Should normally be left at the default value of 1. + /// + /// Then copy the `CAN_BUS_TIME` register value from the table and pass it as the `btr` + /// parameter to this method. + pub fn set_bit_timing(mut self, bt: crate::can::util::NominalBitTiming) -> Self { + self.can.registers.set_bit_timing(bt); + self + } + /// Enables or disables loopback mode: Internally connects the TX and RX + /// signals together. + pub fn set_loopback(self, enabled: bool) -> Self { + self.can.registers.set_loopback(enabled); + self + } + + /// Enables or disables silent mode: Disconnects the TX signal from the pin. + pub fn set_silent(self, enabled: bool) -> Self { + self.can.registers.set_silent(enabled); + self + } + + /// Enables or disables automatic retransmission of messages. + /// + /// If this is enabled, the CAN peripheral will automatically try to retransmit each frame + /// until it can be sent. Otherwise, it will try only once to send each frame. + /// + /// Automatic retransmission is enabled by default. + pub fn set_automatic_retransmit(self, enabled: bool) -> Self { + self.can.registers.set_automatic_retransmit(enabled); + self + } + + /// Leaves initialization mode and enables the peripheral. + /// + /// To sync with the CAN bus, this will block until 11 consecutive recessive bits are detected + /// on the bus. + /// + /// If you want to finish configuration without enabling the peripheral, you can call + /// [`CanBuilder::leave_disabled`] instead. + pub fn enable(mut self) -> Can { + self.leave_init_mode(); + + match nb::block!(self.can.registers.enable_non_blocking()) { + Ok(()) => self.can, + Err(void) => match void {}, + } + } + + /// Returns the [`Can`] interface without enabling it. + /// + /// This leaves initialization mode, but keeps the peripheral in sleep mode instead of enabling + /// it. + /// + /// Before the [`Can`] instance can be used, you have to enable it by calling + /// [`Can::enable_non_blocking`]. + pub fn leave_disabled(mut self) -> Can { + self.leave_init_mode(); + self.can + } + + /// Leaves initialization mode, enters sleep mode. + fn leave_init_mode(&mut self) { + self.can.registers.leave_init_mode(); + } +} + +/// Interface to a bxCAN peripheral. +pub struct Can { + instance: I, + canregs: crate::pac::can::Can, + pub(crate) registers: Registers, +} + +impl Can +where + I: Instance, +{ + /// Creates a [`CanBuilder`] for constructing a CAN interface. + pub fn builder(instance: I, canregs: crate::pac::can::Can) -> CanBuilder { + let mut can_builder = CanBuilder { + can: Can { + instance, + canregs, + registers: Registers { canregs }, + }, + }; + + can_builder.can.registers.enter_init_mode(); + + can_builder + } + + /// Disables the CAN interface and returns back the raw peripheral it was created from. + /// + /// The peripheral is disabled by setting `RESET` in `CAN_MCR`, which causes the peripheral to + /// enter sleep mode. + pub fn free(self) -> I { + self.registers.reset(); + self.instance + } + + /// Configure bit timings and silent/loop-back mode. + /// + /// Calling this method will enter initialization mode. + pub fn modify_config(&mut self) -> CanConfig<'_, I> { + self.registers.enter_init_mode(); + + CanConfig { can: self } + } + + /// Puts a CAN frame in a free transmit mailbox for transmission on the bus. + /// + /// Frames are transmitted to the bus based on their priority (see [`FramePriority`]). + /// Transmit order is preserved for frames with identical priority. + /// + /// If all transmit mailboxes are full, and `frame` has a higher priority than the + /// lowest-priority message in the transmit mailboxes, transmission of the enqueued frame is + /// cancelled and `frame` is enqueued instead. The frame that was replaced is returned as + /// [`TransmitStatus::dequeued_frame`]. + pub fn transmit(&mut self, frame: &Frame) -> nb::Result { + // Safety: We have a `&mut self` and have unique access to the peripheral. + unsafe { Tx::::conjure(self.canregs).transmit(frame) } + } + + /// Returns `true` if no frame is pending for transmission. + pub fn is_transmitter_idle(&self) -> bool { + // Safety: Read-only operation. + unsafe { Tx::::conjure(self.canregs).is_idle() } + } + + /// Attempts to abort the sending of a frame that is pending in a mailbox. + /// + /// If there is no frame in the provided mailbox, or its transmission succeeds before it can be + /// aborted, this function has no effect and returns `false`. + /// + /// If there is a frame in the provided mailbox, and it is canceled successfully, this function + /// returns `true`. + pub fn abort(&mut self, mailbox: Mailbox) -> bool { + // Safety: We have a `&mut self` and have unique access to the peripheral. + unsafe { Tx::::conjure(self.canregs).abort(mailbox) } + } + + pub(crate) fn split_by_ref(&mut self) -> (Tx, Rx) { + // Safety: We take `&mut self` and the return value lifetimes are tied to `self`'s lifetime. + let tx = unsafe { Tx::conjure(self.canregs) }; + let rx0 = unsafe { Rx::conjure() }; + (tx, rx0) + } +} + +impl Can { + /// Accesses the filter banks owned by this CAN peripheral. + /// + /// To modify filters of a slave peripheral, `modify_filters` has to be called on the master + /// peripheral instead. + pub fn modify_filters(&mut self) -> MasterFilters<'_, I> { + unsafe { MasterFilters::new(self.canregs) } + } +} + +/// Marker for Tx half +pub struct Tx { + _can: PhantomData, + pub(crate) registers: Registers, +} + +impl Tx +where + I: Instance, +{ + unsafe fn conjure(canregs: crate::pac::can::Can) -> Self { + Self { + _can: PhantomData, + registers: Registers { canregs }, //canregs, + } + } + + /// Puts a CAN frame in a transmit mailbox for transmission on the bus. + /// + /// Frames are transmitted to the bus based on their priority (see [`FramePriority`]). + /// Transmit order is preserved for frames with identical priority. + /// + /// If all transmit mailboxes are full, and `frame` has a higher priority than the + /// lowest-priority message in the transmit mailboxes, transmission of the enqueued frame is + /// cancelled and `frame` is enqueued instead. The frame that was replaced is returned as + /// [`TransmitStatus::dequeued_frame`]. + pub fn transmit(&mut self, frame: &Frame) -> nb::Result { + self.registers.transmit(frame) + } + + /// Attempts to abort the sending of a frame that is pending in a mailbox. + /// + /// If there is no frame in the provided mailbox, or its transmission succeeds before it can be + /// aborted, this function has no effect and returns `false`. + /// + /// If there is a frame in the provided mailbox, and it is canceled successfully, this function + /// returns `true`. + pub fn abort(&mut self, mailbox: Mailbox) -> bool { + self.registers.abort(mailbox) + } + + /// Returns `true` if no frame is pending for transmission. + pub fn is_idle(&self) -> bool { + self.registers.is_idle() + } + + /// Clears the request complete flag for all mailboxes. + pub fn clear_interrupt_flags(&mut self) { + self.registers.clear_interrupt_flags() + } } /// Marker for Rx half @@ -814,9 +951,7 @@ where I: Instance, { unsafe fn conjure() -> Self { - Self { - _can: PhantomData, - } + Self { _can: PhantomData } } } diff --git a/embassy-stm32/src/can/bxcan.rs b/embassy-stm32/src/can/bxcan.rs index 9d2b8797e..d865bbe7d 100644 --- a/embassy-stm32/src/can/bxcan.rs +++ b/embassy-stm32/src/can/bxcan.rs @@ -14,7 +14,6 @@ use futures::FutureExt; use crate::gpio::AFType; use crate::interrupt::typelevel::Interrupt; -use crate::pac::can::vals::{Ide, Lec}; use crate::rcc::RccPeripheral; use crate::{interrupt, peripherals, Peripheral}; @@ -185,7 +184,7 @@ impl<'d, T: Instance> Can<'d, T> { /// This will wait for 11 consecutive recessive bits (bus idle state). /// Contrary to enable method from bxcan library, this will not freeze the executor while waiting. pub async fn enable(&mut self) { - while self.enable_non_blocking().is_err() { + while self.registers.enable_non_blocking().is_err() { // SCE interrupt is only generated for entering sleep mode, but not leaving. // Yield to allow other tasks to execute while can bus is initializing. embassy_futures::yield_now().await; @@ -243,52 +242,17 @@ impl<'d, T: Instance> Can<'d, T> { } unsafe fn receive_fifo(fifo: RxFifo) { - // Generate timestamp as early as possible - #[cfg(feature = "time")] - let ts = embassy_time::Instant::now(); - let state = T::state(); - let regs = T::regs(); - let fifo_idx = match fifo { - RxFifo::Fifo0 => 0usize, - RxFifo::Fifo1 => 1usize, - }; - let rfr = regs.rfr(fifo_idx); - let fifo = regs.rx(fifo_idx); + let regsisters = crate::can::bx::Registers { canregs: T::regs() }; loop { - // If there are no pending messages, there is nothing to do - if rfr.read().fmp() == 0 { - return; - } - - let rir = fifo.rir().read(); - let id: embedded_can::Id = if rir.ide() == Ide::STANDARD { - embedded_can::StandardId::new(rir.stid()).unwrap().into() - } else { - let stid = (rir.stid() & 0x7FF) as u32; - let exid = rir.exid() & 0x3FFFF; - let id = (stid << 18) | (exid); - embedded_can::ExtendedId::new(id).unwrap().into() + match regsisters.receive_fifo(fifo) { + Some(envelope) => { + // NOTE: consensus was reached that if rx_queue is full, packets should be dropped + let _ = state.rx_queue.try_send(envelope); + } + None => return, }; - let data_len = fifo.rdtr().read().dlc(); - let mut data: [u8; 8] = [0; 8]; - data[0..4].copy_from_slice(&fifo.rdlr().read().0.to_ne_bytes()); - data[4..8].copy_from_slice(&fifo.rdhr().read().0.to_ne_bytes()); - - let frame = Frame::new(Header::new(id, data_len, false), &data).unwrap(); - let envelope = Envelope { - #[cfg(feature = "time")] - ts, - frame, - }; - - rfr.modify(|v| v.set_rfom(true)); - - /* - NOTE: consensus was reached that if rx_queue is full, packets should be dropped - */ - let _ = state.rx_queue.try_send(envelope); } } @@ -297,7 +261,7 @@ impl<'d, T: Instance> Can<'d, T> { /// Useful for doing separate transmit/receive tasks. pub fn split<'c>(&'c mut self) -> (CanTx<'d, T>, CanRx<'d, T>) { let (tx, rx) = self.can.split_by_ref(); - (CanTx { tx }, CanRx { rx}) + (CanTx { tx }, CanRx { rx }) } } @@ -459,10 +423,7 @@ impl<'d, T: Instance> CanRx<'d, T> { } } -enum RxFifo { - Fifo0, - Fifo1, -} +use crate::can::bx::RxFifo; impl<'d, T: Instance> Drop for Can<'d, T> { fn drop(&mut self) { @@ -601,21 +562,4 @@ impl Index for crate::can::bx::Mailbox { } } -trait IntoBusError { - fn into_bus_err(self) -> Option; -} -impl IntoBusError for Lec { - fn into_bus_err(self) -> Option { - match self { - Lec::STUFF => Some(BusError::Stuff), - Lec::FORM => Some(BusError::Form), - Lec::ACK => Some(BusError::Acknowledge), - Lec::BITRECESSIVE => Some(BusError::BitRecessive), - Lec::BITDOMINANT => Some(BusError::BitDominant), - Lec::CRC => Some(BusError::Crc), - Lec::CUSTOM => Some(BusError::Software), - _ => None, - } - } -} diff --git a/embassy-stm32/src/can/common.rs b/embassy-stm32/src/can/common.rs index 1de54e5a1..8c9990798 100644 --- a/embassy-stm32/src/can/common.rs +++ b/embassy-stm32/src/can/common.rs @@ -1,8 +1,15 @@ use embassy_sync::channel::{DynamicReceiver, DynamicSender}; -use crate::can::_version::frame::*; -use crate::can::_version::Timestamp; use crate::can::_version::enums::*; +use crate::can::_version::frame::*; + +/// Timestamp for incoming packets. Use Embassy time when enabled. +#[cfg(feature = "time")] +pub type Timestamp = embassy_time::Instant; + +/// Timestamp for incoming packets. +#[cfg(not(feature = "time"))] +pub type Timestamp = u16; pub(crate) struct ClassicBufferedRxInner { pub rx_sender: DynamicSender<'static, Result<(ClassicFrame, Timestamp), BusError>>, @@ -48,4 +55,3 @@ impl BufferedCanSender { /// Receiver that can be used for receiving CAN frames. Note, each CAN frame will only be received by one receiver. pub type BufferedCanReceiver = embassy_sync::channel::DynamicReceiver<'static, Result<(ClassicFrame, Timestamp), BusError>>; - diff --git a/embassy-stm32/src/can/fdcan.rs b/embassy-stm32/src/can/fdcan.rs index c42c42853..42c9bd9f6 100644 --- a/embassy-stm32/src/can/fdcan.rs +++ b/embassy-stm32/src/can/fdcan.rs @@ -25,7 +25,8 @@ use fd::config::*; use fd::filter::*; pub use fd::{config, filter}; use frame::*; -pub use self::common::{BufferedCanSender, BufferedCanReceiver}; + +pub use self::common::{BufferedCanReceiver, BufferedCanSender}; /// Timestamp for incoming packets. Use Embassy time when enabled. #[cfg(feature = "time")] @@ -416,7 +417,6 @@ pub struct BufferedCan<'d, T: Instance, const TX_BUF_SIZE: usize, const RX_BUF_S rx_buf: &'static RxBuf, } - impl<'c, 'd, T: Instance, const TX_BUF_SIZE: usize, const RX_BUF_SIZE: usize> BufferedCan<'d, T, TX_BUF_SIZE, RX_BUF_SIZE> { From 26c739c2f93252e9dc476d69f591a84d44491787 Mon Sep 17 00:00:00 2001 From: Corey Schuhen Date: Sun, 24 Mar 2024 07:27:29 +1000 Subject: [PATCH 050/581] BXCAN: Create RxMode enum and move reader methods into it, laying foundations for different Rx buffering modes. --- embassy-stm32/src/can/bx/mod.rs | 12 +- embassy-stm32/src/can/bxcan.rs | 264 +++++++++++++++++++++++--------- embassy-stm32/src/can/common.rs | 4 + embassy-stm32/src/can/enums.rs | 10 ++ 4 files changed, 218 insertions(+), 72 deletions(-) diff --git a/embassy-stm32/src/can/bx/mod.rs b/embassy-stm32/src/can/bx/mod.rs index 9b6ebf5a4..c508ef2fe 100644 --- a/embassy-stm32/src/can/bx/mod.rs +++ b/embassy-stm32/src/can/bx/mod.rs @@ -406,7 +406,7 @@ impl Registers { } } } - + pub fn curr_error(&self) -> Option { let err = { self.canregs.esr().read() }; if err.boff() { @@ -585,6 +585,16 @@ impl Registers { }); } + pub fn receive_frame_available(&self) -> bool { + if self.canregs.rfr(0).read().fmp() != 0 { + true + } else if self.canregs.rfr(1).read().fmp() != 0 { + true + } else { + false + } + } + pub fn receive_fifo(&self, fifo: crate::can::_version::bx::RxFifo) -> Option { // Generate timestamp as early as possible #[cfg(feature = "time")] diff --git a/embassy-stm32/src/can/bxcan.rs b/embassy-stm32/src/can/bxcan.rs index d865bbe7d..66f6e7067 100644 --- a/embassy-stm32/src/can/bxcan.rs +++ b/embassy-stm32/src/can/bxcan.rs @@ -10,7 +10,6 @@ use embassy_hal_internal::{into_ref, PeripheralRef}; use embassy_sync::blocking_mutex::raw::CriticalSectionRawMutex; use embassy_sync::channel::Channel; use embassy_sync::waitqueue::AtomicWaker; -use futures::FutureExt; use crate::gpio::AFType; use crate::interrupt::typelevel::Interrupt; @@ -22,6 +21,9 @@ use enums::*; pub mod frame; pub mod util; +mod common; +pub use self::common::{BufferedCanReceiver, BufferedCanSender, Timestamp}; + /// Contains CAN frame and additional metadata. /// /// Timestamp is available if `time` feature is enabled. @@ -59,8 +61,7 @@ pub struct Rx0InterruptHandler { impl interrupt::typelevel::Handler for Rx0InterruptHandler { unsafe fn on_interrupt() { - // info!("rx0 irq"); - Can::::receive_fifo(RxFifo::Fifo0); + T::state().rx_mode.on_interrupt::(RxFifo::Fifo0); } } @@ -71,8 +72,7 @@ pub struct Rx1InterruptHandler { impl interrupt::typelevel::Handler for Rx1InterruptHandler { unsafe fn on_interrupt() { - // info!("rx1 irq"); - Can::::receive_fifo(RxFifo::Fifo1); + T::state().rx_mode.on_interrupt::(RxFifo::Fifo1); } } @@ -99,16 +99,6 @@ pub struct Can<'d, T: Instance> { can: crate::can::bx::Can>, } -/// Error returned by `try_read` -#[derive(Debug)] -#[cfg_attr(feature = "defmt", derive(defmt::Format))] -pub enum TryReadError { - /// Bus error - BusError(BusError), - /// Receive buffer is empty - Empty, -} - /// Error returned by `try_write` #[derive(Debug)] #[cfg_attr(feature = "defmt", derive(defmt::Format))] @@ -226,34 +216,19 @@ impl<'d, T: Instance> Can<'d, T> { /// /// Returns a tuple of the time the message was received and the message frame pub async fn read(&mut self) -> Result { - self.split().1.read().await + T::state().rx_mode.read::().await } /// Attempts to read a CAN frame without blocking. /// /// Returns [Err(TryReadError::Empty)] if there are no frames in the rx queue. pub fn try_read(&mut self) -> Result { - self.split().1.try_read() + T::state().rx_mode.try_read::() } /// Waits while receive queue is empty. pub async fn wait_not_empty(&mut self) { - self.split().1.wait_not_empty().await - } - - unsafe fn receive_fifo(fifo: RxFifo) { - let state = T::state(); - let regsisters = crate::can::bx::Registers { canregs: T::regs() }; - - loop { - match regsisters.receive_fifo(fifo) { - Some(envelope) => { - // NOTE: consensus was reached that if rx_queue is full, packets should be dropped - let _ = state.rx_queue.try_send(envelope); - } - None => return, - }; - } + T::state().rx_mode.wait_not_empty::().await } /// Split the CAN driver into transmit and receive halves. @@ -375,51 +350,95 @@ impl<'d, T: Instance> CanRx<'d, T> { /// /// Returns a tuple of the time the message was received and the message frame pub async fn read(&mut self) -> Result { - poll_fn(|cx| { - T::state().err_waker.register(cx.waker()); - if let Poll::Ready(envelope) = T::state().rx_queue.receive().poll_unpin(cx) { - return Poll::Ready(Ok(envelope)); - } else if let Some(err) = self.curr_error() { - return Poll::Ready(Err(err)); - } - - Poll::Pending - }) - .await + T::state().rx_mode.read::().await } /// Attempts to read a CAN frame without blocking. /// /// Returns [Err(TryReadError::Empty)] if there are no frames in the rx queue. pub fn try_read(&mut self) -> Result { - if let Ok(envelope) = T::state().rx_queue.try_receive() { - return Ok(envelope); - } - - if let Some(err) = self.curr_error() { - return Err(TryReadError::BusError(err)); - } - - Err(TryReadError::Empty) + T::state().rx_mode.try_read::() } /// Waits while receive queue is empty. pub async fn wait_not_empty(&mut self) { - poll_fn(|cx| T::state().rx_queue.poll_ready_to_receive(cx)).await + T::state().rx_mode.wait_not_empty::().await } - fn curr_error(&self) -> Option { - let err = { T::regs().esr().read() }; - if err.boff() { - return Some(BusError::BusOff); - } else if err.epvf() { - return Some(BusError::BusPassive); - } else if err.ewgf() { - return Some(BusError::BusWarning); - } else if let Some(err) = err.lec().into_bus_err() { - return Some(err); + /// Return a buffered instance of driver without CAN FD support. User must supply Buffers + pub fn buffered( + self, + rxb: &'static mut RxBuf, + ) -> BufferedCanRx<'d, T, RX_BUF_SIZE> { + BufferedCanRx::new(self.rx, rxb) + } +} + +/// User supplied buffer for RX Buffering +pub type RxBuf = + Channel, BUF_SIZE>; + +/// CAN driver, receive half in Buffered mode. +pub struct BufferedCanRx<'d, T: Instance, const RX_BUF_SIZE: usize> { + _rx: crate::can::bx::Rx>, + rx_buf: &'static RxBuf, +} + +impl<'d, T: Instance, const RX_BUF_SIZE: usize> BufferedCanRx<'d, T, RX_BUF_SIZE> { + fn new(_rx: crate::can::bx::Rx>, rx_buf: &'static RxBuf) -> Self { + BufferedCanRx { _rx, rx_buf }.setup() + } + + fn setup(self) -> Self { + // We don't want interrupts being processed while we change modes. + critical_section::with(|_| unsafe { + let rx_inner = self::common::ClassicBufferedRxInner { + rx_sender: self.rx_buf.sender().into(), + }; + T::mut_state().rx_mode = RxMode::Buffered(rx_inner); + }); + self + } + + /// Async read frame from RX buffer. + pub async fn read(&mut self) -> Result<(Frame, Timestamp), BusError> { + self.rx_buf.receive().await + } + + /// Attempts to read a CAN frame without blocking. + /// + /// Returns [Err(TryReadError::Empty)] if there are no frames in the rx queue. + pub fn try_read(&mut self) -> Result { + match &T::state().rx_mode { + RxMode::Buffered(_) => { + if let Ok(result) = self.rx_buf.try_receive() { + match result { + Ok((frame, ts)) => Ok(Envelope { ts, frame }), + Err(e) => Err(TryReadError::BusError(e)), + } + } else { + let registers = crate::can::bx::Registers { canregs: T::regs() }; + if let Some(err) = registers.curr_error() { + return Err(TryReadError::BusError(err)); + } else { + Err(TryReadError::Empty) + } + } + } + _ => { + panic!("Bad Mode") + } } - None + } + + /// Waits while receive queue is empty. + pub async fn wait_not_empty(&mut self) { + poll_fn(|cx| self.rx_buf.poll_ready_to_receive(cx)).await + } + + /// Returns a receiver that can be used for receiving CAN frames. Note, each CAN frame will only be received by one receiver. + pub fn reader(&self) -> BufferedCanReceiver { + self.rx_buf.receiver().into() } } @@ -448,10 +467,111 @@ impl<'d, T: Instance> DerefMut for Can<'d, T> { } } +use crate::can::enums::{BusError, TryReadError}; + +pub(crate) enum RxMode { + NonBuffered(AtomicWaker), + Buffered(crate::can::_version::common::ClassicBufferedRxInner), +} + +impl RxMode { + pub fn on_interrupt(&self, fifo: crate::can::_version::bx::RxFifo) { + match self { + Self::NonBuffered(waker) => { + // Disable interrupts until read + let fifo_idx = match fifo { + crate::can::_version::bx::RxFifo::Fifo0 => 0usize, + crate::can::_version::bx::RxFifo::Fifo1 => 1usize, + }; + T::regs().ier().write(|w| { + w.set_fmpie(fifo_idx, false); + }); + waker.wake(); + } + Self::Buffered(buf) => { + let regsisters = crate::can::bx::Registers { canregs: T::regs() }; + + loop { + match regsisters.receive_fifo(fifo) { + Some(envelope) => { + // NOTE: consensus was reached that if rx_queue is full, packets should be dropped + let _ = buf.rx_sender.try_send(Ok((envelope.frame, envelope.ts))); + } + None => return, + }; + } + } + } + } + + pub async fn read(&self) -> Result { + match self { + Self::NonBuffered(waker) => { + poll_fn(|cx| { + T::state().err_waker.register(cx.waker()); + waker.register(cx.waker()); + match self.try_read::() { + Ok(result) => Poll::Ready(Ok(result)), + Err(TryReadError::Empty) => Poll::Pending, + Err(TryReadError::BusError(be)) => Poll::Ready(Err(be)), + } + }) + .await + } + _ => { + panic!("Bad Mode") + } + } + } + pub fn try_read(&self) -> Result { + match self { + Self::NonBuffered(_) => { + let registers = crate::can::bx::Registers { canregs: T::regs() }; + if let Some(msg) = registers.receive_fifo(super::bx::RxFifo::Fifo0) { + T::regs().ier().write(|w| { + w.set_fmpie(0, true); + }); + Ok(msg) + } else if let Some(msg) = registers.receive_fifo(super::bx::RxFifo::Fifo1) { + T::regs().ier().write(|w| { + w.set_fmpie(1, true); + }); + Ok(msg) + } else if let Some(err) = registers.curr_error() { + Err(TryReadError::BusError(err)) + } else { + Err(TryReadError::Empty) + } + } + _ => { + panic!("Bad Mode") + } + } + } + pub async fn wait_not_empty(&self) { + match &T::state().rx_mode { + Self::NonBuffered(waker) => { + poll_fn(|cx| { + waker.register(cx.waker()); + let registers = crate::can::bx::Registers { canregs: T::regs() }; + if registers.receive_frame_available() { + Poll::Ready(()) + } else { + Poll::Pending + } + }) + .await + } + _ => { + panic!("Bad Mode") + } + } + } +} struct State { pub tx_waker: AtomicWaker, pub err_waker: AtomicWaker, - pub rx_queue: Channel, + pub(crate) rx_mode: RxMode, } impl State { @@ -459,7 +579,7 @@ impl State { Self { tx_waker: AtomicWaker::new(), err_waker: AtomicWaker::new(), - rx_queue: Channel::new(), + rx_mode: RxMode::NonBuffered(AtomicWaker::new()), } } } @@ -467,6 +587,7 @@ impl State { trait SealedInstance { fn regs() -> crate::pac::can::Can; fn state() -> &'static State; + unsafe fn mut_state() -> &'static mut State; } /// CAN instance trait. @@ -495,9 +616,12 @@ foreach_peripheral!( crate::pac::$inst } + unsafe fn mut_state() -> & 'static mut State { + static mut STATE: State = State::new(); + &mut *core::ptr::addr_of_mut!(STATE) + } fn state() -> &'static State { - static STATE: State = State::new(); - &STATE + unsafe { peripherals::$inst::mut_state() } } } @@ -561,5 +685,3 @@ impl Index for crate::can::bx::Mailbox { } } } - - diff --git a/embassy-stm32/src/can/common.rs b/embassy-stm32/src/can/common.rs index 8c9990798..b0d177a6d 100644 --- a/embassy-stm32/src/can/common.rs +++ b/embassy-stm32/src/can/common.rs @@ -18,9 +18,13 @@ pub(crate) struct ClassicBufferedTxInner { pub tx_receiver: DynamicReceiver<'static, ClassicFrame>, } +#[cfg(any(can_fdcan_v1, can_fdcan_h7))] + pub(crate) struct FdBufferedRxInner { pub rx_sender: DynamicSender<'static, Result<(FdFrame, Timestamp), BusError>>, } + +#[cfg(any(can_fdcan_v1, can_fdcan_h7))] pub(crate) struct FdBufferedTxInner { pub tx_receiver: DynamicReceiver<'static, FdFrame>, } diff --git a/embassy-stm32/src/can/enums.rs b/embassy-stm32/src/can/enums.rs index 651de9194..4d89c84d1 100644 --- a/embassy-stm32/src/can/enums.rs +++ b/embassy-stm32/src/can/enums.rs @@ -40,3 +40,13 @@ pub enum FrameCreateError { /// Invalid ID. InvalidCanId, } + +/// Error returned by `try_read` +#[derive(Debug)] +#[cfg_attr(feature = "defmt", derive(defmt::Format))] +pub enum TryReadError { + /// Bus error + BusError(BusError), + /// Receive buffer is empty + Empty, +} From 41b7e4a434c0d1fe1fc5d93afe76f8058aa411db Mon Sep 17 00:00:00 2001 From: Corey Schuhen Date: Sun, 24 Mar 2024 08:08:12 +1000 Subject: [PATCH 051/581] BXCAN: Create TxMode in order to support buffered TX. --- embassy-stm32/src/can/bxcan.rs | 130 ++++++++++++++++++++++++++++++--- embassy-stm32/src/can/fdcan.rs | 5 +- 2 files changed, 120 insertions(+), 15 deletions(-) diff --git a/embassy-stm32/src/can/bxcan.rs b/embassy-stm32/src/can/bxcan.rs index 66f6e7067..45a3836c0 100644 --- a/embassy-stm32/src/can/bxcan.rs +++ b/embassy-stm32/src/can/bxcan.rs @@ -17,7 +17,6 @@ use crate::rcc::RccPeripheral; use crate::{interrupt, peripherals, Peripheral}; pub mod enums; -use enums::*; pub mod frame; pub mod util; @@ -49,8 +48,7 @@ impl interrupt::typelevel::Handler for TxInterruptH v.set_rqcp(1, true); v.set_rqcp(2, true); }); - - T::state().tx_waker.wake(); + T::state().tx_mode.on_interrupt::(); } } @@ -258,7 +256,7 @@ impl<'d, T: Instance> CanTx<'d, T> { /// If the TX queue is full, this will wait until there is space, therefore exerting backpressure. pub async fn write(&mut self, frame: &Frame) -> crate::can::bx::TransmitStatus { poll_fn(|cx| { - T::state().tx_waker.register(cx.waker()); + T::state().tx_mode.register(cx.waker()); if let Ok(status) = self.tx.transmit(frame) { return Poll::Ready(status); } @@ -277,7 +275,7 @@ impl<'d, T: Instance> CanTx<'d, T> { async fn flush_inner(mb: crate::can::bx::Mailbox) { poll_fn(|cx| { - T::state().tx_waker.register(cx.waker()); + T::state().tx_mode.register(cx.waker()); if T::regs().tsr().read().tme(mb.index()) { return Poll::Ready(()); } @@ -294,7 +292,7 @@ impl<'d, T: Instance> CanTx<'d, T> { async fn flush_any_inner() { poll_fn(|cx| { - T::state().tx_waker.register(cx.waker()); + T::state().tx_mode.register(cx.waker()); let tsr = T::regs().tsr().read(); if tsr.tme(crate::can::bx::Mailbox::Mailbox0.index()) @@ -316,7 +314,7 @@ impl<'d, T: Instance> CanTx<'d, T> { async fn flush_all_inner() { poll_fn(|cx| { - T::state().tx_waker.register(cx.waker()); + T::state().tx_mode.register(cx.waker()); let tsr = T::regs().tsr().read(); if tsr.tme(crate::can::bx::Mailbox::Mailbox0.index()) @@ -335,6 +333,62 @@ impl<'d, T: Instance> CanTx<'d, T> { pub async fn flush_all(&self) { Self::flush_all_inner().await } + + /// Return a buffered instance of driver. User must supply Buffers + pub fn buffered( + self, + txb: &'static mut TxBuf, + ) -> BufferedCanTx<'d, T, TX_BUF_SIZE> { + BufferedCanTx::new(self.tx, txb) + } +} + +/// User supplied buffer for TX buffering +pub type TxBuf = Channel; + +/// CAN driver, transmit half. +pub struct BufferedCanTx<'d, T: Instance, const TX_BUF_SIZE: usize> { + _tx: crate::can::bx::Tx>, + tx_buf: &'static TxBuf, +} + +impl<'d, T: Instance, const TX_BUF_SIZE: usize> BufferedCanTx<'d, T, TX_BUF_SIZE> { + fn new(_tx: crate::can::bx::Tx>, tx_buf: &'static TxBuf) -> Self { + Self { _tx, tx_buf }.setup() + } + + fn setup(self) -> Self { + // We don't want interrupts being processed while we change modes. + critical_section::with(|_| unsafe { + let tx_inner = self::common::ClassicBufferedTxInner { + tx_receiver: self.tx_buf.receiver().into(), + }; + T::mut_state().tx_mode = TxMode::Buffered(tx_inner); + }); + self + } + + /// Async write frame to TX buffer. + pub async fn write(&mut self, frame: &Frame) { + self.tx_buf.send(*frame).await; + T::TXInterrupt::pend(); // Wake for Tx + } + + /// Returns a sender that can be used for sending CAN frames. + pub fn writer(&self) -> BufferedCanSender { + BufferedCanSender { + tx_buf: self.tx_buf.sender().into(), + waker: T::TXInterrupt::pend, + } + } +} + +impl<'d, T: Instance, const TX_BUF_SIZE: usize> Drop for BufferedCanTx<'d, T, TX_BUF_SIZE> { + fn drop(&mut self) { + critical_section::with(|_| unsafe { + T::mut_state().tx_mode = TxMode::NonBuffered(embassy_sync::waitqueue::AtomicWaker::new()); + }); + } } /// CAN driver, receive half. @@ -365,7 +419,7 @@ impl<'d, T: Instance> CanRx<'d, T> { T::state().rx_mode.wait_not_empty::().await } - /// Return a buffered instance of driver without CAN FD support. User must supply Buffers + /// Return a buffered instance of driver. User must supply Buffers pub fn buffered( self, rxb: &'static mut RxBuf, @@ -442,6 +496,14 @@ impl<'d, T: Instance, const RX_BUF_SIZE: usize> BufferedCanRx<'d, T, RX_BUF_SIZE } } +impl<'d, T: Instance, const RX_BUF_SIZE: usize> Drop for BufferedCanRx<'d, T, RX_BUF_SIZE> { + fn drop(&mut self) { + critical_section::with(|_| unsafe { + T::mut_state().rx_mode = RxMode::NonBuffered(embassy_sync::waitqueue::AtomicWaker::new()); + }); + } +} + use crate::can::bx::RxFifo; impl<'d, T: Instance> Drop for Can<'d, T> { @@ -568,18 +630,62 @@ impl RxMode { } } } + +enum TxMode { + NonBuffered(AtomicWaker), + Buffered(self::common::ClassicBufferedTxInner), +} + +impl TxMode { + pub fn buffer_free(&self) -> bool { + let tsr = T::regs().tsr().read(); + tsr.tme(crate::can::bx::Mailbox::Mailbox0.index()) + || tsr.tme(crate::can::bx::Mailbox::Mailbox1.index()) + || tsr.tme(crate::can::bx::Mailbox::Mailbox2.index()) + } + pub fn on_interrupt(&self) { + match &T::state().tx_mode { + TxMode::NonBuffered(waker) => waker.wake(), + TxMode::Buffered(buf) => { + while self.buffer_free::() { + match buf.tx_receiver.try_receive() { + Ok(frame) => { + let mut registers = crate::can::bx::Registers { canregs: T::regs() }; + _ = registers.transmit(&frame); + } + Err(_) => { + break; + } + } + } + } + } + } + + fn register(&self, arg: &core::task::Waker) { + match self { + TxMode::NonBuffered(waker) => { + waker.register(arg); + } + _ => { + panic!("Bad mode"); + } + } + } +} + struct State { - pub tx_waker: AtomicWaker, - pub err_waker: AtomicWaker, pub(crate) rx_mode: RxMode, + pub(crate) tx_mode: TxMode, + pub err_waker: AtomicWaker, } impl State { pub const fn new() -> Self { Self { - tx_waker: AtomicWaker::new(), - err_waker: AtomicWaker::new(), rx_mode: RxMode::NonBuffered(AtomicWaker::new()), + tx_mode: TxMode::NonBuffered(AtomicWaker::new()), + err_waker: AtomicWaker::new(), } } } diff --git a/embassy-stm32/src/can/fdcan.rs b/embassy-stm32/src/can/fdcan.rs index 42c9bd9f6..e58d8c0ec 100644 --- a/embassy-stm32/src/can/fdcan.rs +++ b/embassy-stm32/src/can/fdcan.rs @@ -507,7 +507,7 @@ pub struct BufferedCanFd<'d, T: Instance, const TX_BUF_SIZE: usize, const RX_BUF /// Sender that can be used for sending CAN frames. #[derive(Copy, Clone)] pub struct BufferedFdCanSender { - tx_buf: embassy_sync::channel::DynamicSender<'static, FdFrame>, + tx_buf: DynamicSender<'static, FdFrame>, waker: fn(), } @@ -532,8 +532,7 @@ impl BufferedFdCanSender { } /// Receiver that can be used for receiving CAN frames. Note, each CAN frame will only be received by one receiver. -pub type BufferedFdCanReceiver = - embassy_sync::channel::DynamicReceiver<'static, Result<(FdFrame, Timestamp), BusError>>; +pub type BufferedFdCanReceiver = DynamicReceiver<'static, Result<(FdFrame, Timestamp), BusError>>; impl<'c, 'd, T: Instance, const TX_BUF_SIZE: usize, const RX_BUF_SIZE: usize> BufferedCanFd<'d, T, TX_BUF_SIZE, RX_BUF_SIZE> From f5daa50a7baceb44f2aad44bf6ce055bccb08433 Mon Sep 17 00:00:00 2001 From: Corey Schuhen Date: Sun, 24 Mar 2024 14:15:46 +1000 Subject: [PATCH 052/581] BXCAN: Add struct that combines Buffered RX and Buffered TX. --- embassy-stm32/src/can/bxcan.rs | 55 +++++++++++++++++++++++++++++++++- 1 file changed, 54 insertions(+), 1 deletion(-) diff --git a/embassy-stm32/src/can/bxcan.rs b/embassy-stm32/src/can/bxcan.rs index 45a3836c0..be2e34963 100644 --- a/embassy-stm32/src/can/bxcan.rs +++ b/embassy-stm32/src/can/bxcan.rs @@ -236,6 +236,19 @@ impl<'d, T: Instance> Can<'d, T> { let (tx, rx) = self.can.split_by_ref(); (CanTx { tx }, CanRx { rx }) } + + /// Return a buffered instance of driver. User must supply Buffers + pub fn buffered<'c, const TX_BUF_SIZE: usize, const RX_BUF_SIZE: usize>( + &'c mut self, + txb: &'static mut TxBuf, + rxb: &'static mut RxBuf, + ) -> BufferedCan<'d, T, TX_BUF_SIZE, RX_BUF_SIZE> { + let (tx, rx) = self.split(); + BufferedCan { + tx: tx.buffered(txb), + rx: rx.buffered(rxb), + } + } } impl<'d, T: Instance> AsMut>> for Can<'d, T> { @@ -245,6 +258,46 @@ impl<'d, T: Instance> AsMut>> for Can<' } } +/// Buffered CAN driver. +pub struct BufferedCan<'d, T: Instance, const TX_BUF_SIZE: usize, const RX_BUF_SIZE: usize> { + tx: BufferedCanTx<'d, T, TX_BUF_SIZE>, + rx: BufferedCanRx<'d, T, RX_BUF_SIZE>, +} + +impl<'d, T: Instance, const TX_BUF_SIZE: usize, const RX_BUF_SIZE: usize> BufferedCan<'d, T, TX_BUF_SIZE, RX_BUF_SIZE> { + /// Async write frame to TX buffer. + pub async fn write(&mut self, frame: &Frame) { + self.tx.write(frame).await + } + + /// Returns a sender that can be used for sending CAN frames. + pub fn writer(&self) -> BufferedCanSender { + self.tx.writer() + } + + /// Async read frame from RX buffer. + pub async fn read(&mut self) -> Result<(Frame, Timestamp), BusError> { + self.rx.read().await + } + + /// Attempts to read a CAN frame without blocking. + /// + /// Returns [Err(TryReadError::Empty)] if there are no frames in the rx queue. + pub fn try_read(&mut self) -> Result { + self.rx.try_read() + } + + /// Waits while receive queue is empty. + pub async fn wait_not_empty(&mut self) { + self.rx.wait_not_empty().await + } + + /// Returns a receiver that can be used for receiving CAN frames. Note, each CAN frame will only be received by one receiver. + pub fn reader(&self) -> BufferedCanReceiver { + self.rx.reader() + } +} + /// CAN driver, transmit half. pub struct CanTx<'d, T: Instance> { tx: crate::can::bx::Tx>, @@ -346,7 +399,7 @@ impl<'d, T: Instance> CanTx<'d, T> { /// User supplied buffer for TX buffering pub type TxBuf = Channel; -/// CAN driver, transmit half. +/// Buffered CAN driver, transmit half. pub struct BufferedCanTx<'d, T: Instance, const TX_BUF_SIZE: usize> { _tx: crate::can::bx::Tx>, tx_buf: &'static TxBuf, From 2217b802781b5f2188b4da659aca47f9d89ee032 Mon Sep 17 00:00:00 2001 From: Corey Schuhen Date: Sun, 24 Mar 2024 15:13:55 +1000 Subject: [PATCH 053/581] CAN: Unify API's between BXCAN and FDCAN. Use Envelope for all read methods instead of a tuple sometimes. --- embassy-stm32/src/can/bx/mod.rs | 5 +- embassy-stm32/src/can/bxcan.rs | 27 ++--- embassy-stm32/src/can/common.rs | 23 ++-- embassy-stm32/src/can/fd/peripheral.rs | 12 +-- embassy-stm32/src/can/fdcan.rs | 140 ++++++++++++++++--------- embassy-stm32/src/can/frame.rs | 60 +++++++++-- examples/stm32f1/Cargo.toml | 1 + examples/stm32f1/src/bin/can.rs | 100 +++++++++++++++--- examples/stm32g4/src/bin/can.rs | 29 ++--- examples/stm32h5/src/bin/can.rs | 12 ++- examples/stm32h7/src/bin/can.rs | 12 ++- tests/stm32/src/bin/fdcan.rs | 24 ++--- 12 files changed, 294 insertions(+), 151 deletions(-) diff --git a/embassy-stm32/src/can/bx/mod.rs b/embassy-stm32/src/can/bx/mod.rs index c508ef2fe..253bcee13 100644 --- a/embassy-stm32/src/can/bx/mod.rs +++ b/embassy-stm32/src/can/bx/mod.rs @@ -40,12 +40,11 @@ pub type Header = crate::can::frame::Header; /// Data for a CAN Frame pub type Data = crate::can::frame::ClassicData; -/// CAN Frame -pub type Frame = crate::can::frame::ClassicFrame; - use crate::can::_version::Envelope; use crate::can::bx::filter::MasterFilters; use crate::can::enums::BusError; +/// CAN Frame +pub use crate::can::frame::Frame; use crate::pac::can::vals::Lec; #[derive(Debug, Copy, Clone, Eq, PartialEq)] diff --git a/embassy-stm32/src/can/bxcan.rs b/embassy-stm32/src/can/bxcan.rs index be2e34963..fd6a79092 100644 --- a/embassy-stm32/src/can/bxcan.rs +++ b/embassy-stm32/src/can/bxcan.rs @@ -19,22 +19,10 @@ use crate::{interrupt, peripherals, Peripheral}; pub mod enums; pub mod frame; pub mod util; +pub use frame::Envelope; mod common; -pub use self::common::{BufferedCanReceiver, BufferedCanSender, Timestamp}; - -/// Contains CAN frame and additional metadata. -/// -/// Timestamp is available if `time` feature is enabled. -#[derive(Debug, Clone)] -#[cfg_attr(feature = "defmt", derive(defmt::Format))] -pub struct Envelope { - /// Reception time. - #[cfg(feature = "time")] - pub ts: embassy_time::Instant, - /// The actual CAN frame. - pub frame: Frame, -} +pub use self::common::{BufferedCanReceiver, BufferedCanSender}; /// Interrupt handler. pub struct TxInterruptHandler { @@ -276,7 +264,7 @@ impl<'d, T: Instance, const TX_BUF_SIZE: usize, const RX_BUF_SIZE: usize> Buffer } /// Async read frame from RX buffer. - pub async fn read(&mut self) -> Result<(Frame, Timestamp), BusError> { + pub async fn read(&mut self) -> Result { self.rx.read().await } @@ -482,8 +470,7 @@ impl<'d, T: Instance> CanRx<'d, T> { } /// User supplied buffer for RX Buffering -pub type RxBuf = - Channel, BUF_SIZE>; +pub type RxBuf = Channel, BUF_SIZE>; /// CAN driver, receive half in Buffered mode. pub struct BufferedCanRx<'d, T: Instance, const RX_BUF_SIZE: usize> { @@ -508,7 +495,7 @@ impl<'d, T: Instance, const RX_BUF_SIZE: usize> BufferedCanRx<'d, T, RX_BUF_SIZE } /// Async read frame from RX buffer. - pub async fn read(&mut self) -> Result<(Frame, Timestamp), BusError> { + pub async fn read(&mut self) -> Result { self.rx_buf.receive().await } @@ -520,7 +507,7 @@ impl<'d, T: Instance, const RX_BUF_SIZE: usize> BufferedCanRx<'d, T, RX_BUF_SIZE RxMode::Buffered(_) => { if let Ok(result) = self.rx_buf.try_receive() { match result { - Ok((frame, ts)) => Ok(Envelope { ts, frame }), + Ok(envelope) => Ok(envelope), Err(e) => Err(TryReadError::BusError(e)), } } else { @@ -610,7 +597,7 @@ impl RxMode { match regsisters.receive_fifo(fifo) { Some(envelope) => { // NOTE: consensus was reached that if rx_queue is full, packets should be dropped - let _ = buf.rx_sender.try_send(Ok((envelope.frame, envelope.ts))); + let _ = buf.rx_sender.try_send(Ok(envelope)); } None => return, }; diff --git a/embassy-stm32/src/can/common.rs b/embassy-stm32/src/can/common.rs index b0d177a6d..570761b19 100644 --- a/embassy-stm32/src/can/common.rs +++ b/embassy-stm32/src/can/common.rs @@ -3,25 +3,17 @@ use embassy_sync::channel::{DynamicReceiver, DynamicSender}; use crate::can::_version::enums::*; use crate::can::_version::frame::*; -/// Timestamp for incoming packets. Use Embassy time when enabled. -#[cfg(feature = "time")] -pub type Timestamp = embassy_time::Instant; - -/// Timestamp for incoming packets. -#[cfg(not(feature = "time"))] -pub type Timestamp = u16; - pub(crate) struct ClassicBufferedRxInner { - pub rx_sender: DynamicSender<'static, Result<(ClassicFrame, Timestamp), BusError>>, + pub rx_sender: DynamicSender<'static, Result>, } pub(crate) struct ClassicBufferedTxInner { - pub tx_receiver: DynamicReceiver<'static, ClassicFrame>, + pub tx_receiver: DynamicReceiver<'static, Frame>, } #[cfg(any(can_fdcan_v1, can_fdcan_h7))] pub(crate) struct FdBufferedRxInner { - pub rx_sender: DynamicSender<'static, Result<(FdFrame, Timestamp), BusError>>, + pub rx_sender: DynamicSender<'static, Result>, } #[cfg(any(can_fdcan_v1, can_fdcan_h7))] @@ -32,20 +24,20 @@ pub(crate) struct FdBufferedTxInner { /// Sender that can be used for sending CAN frames. #[derive(Copy, Clone)] pub struct BufferedCanSender { - pub(crate) tx_buf: embassy_sync::channel::DynamicSender<'static, ClassicFrame>, + pub(crate) tx_buf: embassy_sync::channel::DynamicSender<'static, Frame>, pub(crate) waker: fn(), } impl BufferedCanSender { /// Async write frame to TX buffer. - pub fn try_write(&mut self, frame: ClassicFrame) -> Result<(), embassy_sync::channel::TrySendError> { + pub fn try_write(&mut self, frame: Frame) -> Result<(), embassy_sync::channel::TrySendError> { self.tx_buf.try_send(frame)?; (self.waker)(); Ok(()) } /// Async write frame to TX buffer. - pub async fn write(&mut self, frame: ClassicFrame) { + pub async fn write(&mut self, frame: Frame) { self.tx_buf.send(frame).await; (self.waker)(); } @@ -57,5 +49,4 @@ impl BufferedCanSender { } /// Receiver that can be used for receiving CAN frames. Note, each CAN frame will only be received by one receiver. -pub type BufferedCanReceiver = - embassy_sync::channel::DynamicReceiver<'static, Result<(ClassicFrame, Timestamp), BusError>>; +pub type BufferedCanReceiver = embassy_sync::channel::DynamicReceiver<'static, Result>; diff --git a/embassy-stm32/src/can/fd/peripheral.rs b/embassy-stm32/src/can/fd/peripheral.rs index 76b76afe1..e32f19d91 100644 --- a/embassy-stm32/src/can/fd/peripheral.rs +++ b/embassy-stm32/src/can/fd/peripheral.rs @@ -397,13 +397,13 @@ impl Registers { /// Moves out of ConfigMode and into specified mode #[inline] - pub fn into_mode(mut self, config: FdCanConfig, mode: crate::can::_version::FdcanOperatingMode) { + pub fn into_mode(mut self, config: FdCanConfig, mode: crate::can::_version::OperatingMode) { match mode { - crate::can::FdcanOperatingMode::InternalLoopbackMode => self.set_loopback_mode(LoopbackMode::Internal), - crate::can::FdcanOperatingMode::ExternalLoopbackMode => self.set_loopback_mode(LoopbackMode::External), - crate::can::FdcanOperatingMode::NormalOperationMode => self.set_normal_operations(true), - crate::can::FdcanOperatingMode::RestrictedOperationMode => self.set_restricted_operations(true), - crate::can::FdcanOperatingMode::BusMonitoringMode => self.set_bus_monitoring_mode(true), + crate::can::OperatingMode::InternalLoopbackMode => self.set_loopback_mode(LoopbackMode::Internal), + crate::can::OperatingMode::ExternalLoopbackMode => self.set_loopback_mode(LoopbackMode::External), + crate::can::OperatingMode::NormalOperationMode => self.set_normal_operations(true), + crate::can::OperatingMode::RestrictedOperationMode => self.set_restricted_operations(true), + crate::can::OperatingMode::BusMonitoringMode => self.set_bus_monitoring_mode(true), } self.leave_init_mode(config); } diff --git a/embassy-stm32/src/can/fdcan.rs b/embassy-stm32/src/can/fdcan.rs index e58d8c0ec..2ccf4b093 100644 --- a/embassy-stm32/src/can/fdcan.rs +++ b/embassy-stm32/src/can/fdcan.rs @@ -110,7 +110,7 @@ impl interrupt::typelevel::Handler for IT1Interrup #[derive(Debug, Copy, Clone, Eq, PartialEq)] #[cfg_attr(feature = "defmt", derive(defmt::Format))] /// Different operating modes -pub enum FdcanOperatingMode { +pub enum OperatingMode { //PoweredDownMode, //ConfigMode, /// This mode can be used for a “Hot Selftestâ€, meaning the FDCAN can be tested without @@ -148,7 +148,7 @@ pub enum FdcanOperatingMode { /// FDCAN Configuration instance instance /// Create instance of this first -pub struct FdcanConfigurator<'d, T: Instance> { +pub struct CanConfigurator<'d, T: Instance> { config: crate::can::fd::config::FdCanConfig, /// Reference to internals. instance: FdcanInstance<'d, T>, @@ -169,7 +169,7 @@ fn calc_ns_per_timer_tick(mode: crate::can::fd::config::FrameTransm } } -impl<'d, T: Instance> FdcanConfigurator<'d, T> { +impl<'d, T: Instance> CanConfigurator<'d, T> { /// Creates a new Fdcan instance, keeping the peripheral in sleep mode. /// You must call [Fdcan::enable_non_blocking] to use the peripheral. pub fn new( @@ -179,7 +179,7 @@ impl<'d, T: Instance> FdcanConfigurator<'d, T> { _irqs: impl interrupt::typelevel::Binding> + interrupt::typelevel::Binding> + 'd, - ) -> FdcanConfigurator<'d, T> { + ) -> CanConfigurator<'d, T> { into_ref!(peri, rx, tx); rx.set_as_af(rx.af_num(), AFType::Input); @@ -273,13 +273,13 @@ impl<'d, T: Instance> FdcanConfigurator<'d, T> { } /// Start in mode. - pub fn start(self, mode: FdcanOperatingMode) -> Fdcan<'d, T> { + pub fn start(self, mode: OperatingMode) -> Can<'d, T> { let ns_per_timer_tick = calc_ns_per_timer_tick::(self.config.frame_transmit); critical_section::with(|_| unsafe { T::mut_state().ns_per_timer_tick = ns_per_timer_tick; }); T::registers().into_mode(self.config, mode); - let ret = Fdcan { + let ret = Can { config: self.config, instance: self.instance, _mode: mode, @@ -288,30 +288,30 @@ impl<'d, T: Instance> FdcanConfigurator<'d, T> { } /// Start, entering mode. Does same as start(mode) - pub fn into_normal_mode(self) -> Fdcan<'d, T> { - self.start(FdcanOperatingMode::NormalOperationMode) + pub fn into_normal_mode(self) -> Can<'d, T> { + self.start(OperatingMode::NormalOperationMode) } /// Start, entering mode. Does same as start(mode) - pub fn into_internal_loopback_mode(self) -> Fdcan<'d, T> { - self.start(FdcanOperatingMode::InternalLoopbackMode) + pub fn into_internal_loopback_mode(self) -> Can<'d, T> { + self.start(OperatingMode::InternalLoopbackMode) } /// Start, entering mode. Does same as start(mode) - pub fn into_external_loopback_mode(self) -> Fdcan<'d, T> { - self.start(FdcanOperatingMode::ExternalLoopbackMode) + pub fn into_external_loopback_mode(self) -> Can<'d, T> { + self.start(OperatingMode::ExternalLoopbackMode) } } /// FDCAN Instance -pub struct Fdcan<'d, T: Instance> { +pub struct Can<'d, T: Instance> { config: crate::can::fd::config::FdCanConfig, /// Reference to internals. instance: FdcanInstance<'d, T>, - _mode: FdcanOperatingMode, + _mode: OperatingMode, } -impl<'d, T: Instance> Fdcan<'d, T> { +impl<'d, T: Instance> Can<'d, T> { /// Flush one of the TX mailboxes. pub async fn flush(&self, idx: usize) { poll_fn(|cx| { @@ -334,12 +334,12 @@ impl<'d, T: Instance> Fdcan<'d, T> { /// frame is dropped from the mailbox, it is returned. If no lower-priority frames /// can be replaced, this call asynchronously waits for a frame to be successfully /// transmitted, then tries again. - pub async fn write(&mut self, frame: &ClassicFrame) -> Option { + pub async fn write(&mut self, frame: &Frame) -> Option { T::state().tx_mode.write::(frame).await } /// Returns the next received message frame - pub async fn read(&mut self) -> Result<(ClassicFrame, Timestamp), BusError> { + pub async fn read(&mut self) -> Result { T::state().rx_mode.read_classic::().await } @@ -352,19 +352,19 @@ impl<'d, T: Instance> Fdcan<'d, T> { } /// Returns the next received message frame - pub async fn read_fd(&mut self) -> Result<(FdFrame, Timestamp), BusError> { + pub async fn read_fd(&mut self) -> Result { T::state().rx_mode.read_fd::().await } /// Split instance into separate Tx(write) and Rx(read) portions - pub fn split(self) -> (FdcanTx<'d, T>, FdcanRx<'d, T>) { + pub fn split(self) -> (CanTx<'d, T>, CanRx<'d, T>) { ( - FdcanTx { + CanTx { config: self.config, _instance: self.instance, _mode: self._mode, }, - FdcanRx { + CanRx { _instance1: PhantomData::, _instance2: T::regs(), _mode: self._mode, @@ -373,8 +373,8 @@ impl<'d, T: Instance> Fdcan<'d, T> { } /// Join split rx and tx portions back together - pub fn join(tx: FdcanTx<'d, T>, rx: FdcanRx<'d, T>) -> Self { - Fdcan { + pub fn join(tx: CanTx<'d, T>, rx: CanRx<'d, T>) -> Self { + Can { config: tx.config, //_instance2: T::regs(), instance: tx._instance, @@ -402,17 +402,16 @@ impl<'d, T: Instance> Fdcan<'d, T> { } /// User supplied buffer for RX Buffering -pub type RxBuf = - Channel, BUF_SIZE>; +pub type RxBuf = Channel, BUF_SIZE>; /// User supplied buffer for TX buffering -pub type TxBuf = Channel; +pub type TxBuf = Channel; /// Buffered FDCAN Instance pub struct BufferedCan<'d, T: Instance, const TX_BUF_SIZE: usize, const RX_BUF_SIZE: usize> { _instance1: PhantomData, _instance2: &'d crate::pac::can::Fdcan, - _mode: FdcanOperatingMode, + _mode: OperatingMode, tx_buf: &'static TxBuf, rx_buf: &'static RxBuf, } @@ -423,7 +422,7 @@ impl<'c, 'd, T: Instance, const TX_BUF_SIZE: usize, const RX_BUF_SIZE: usize> fn new( _instance1: PhantomData, _instance2: &'d crate::pac::can::Fdcan, - _mode: FdcanOperatingMode, + _mode: OperatingMode, tx_buf: &'static TxBuf, rx_buf: &'static RxBuf, ) -> Self { @@ -453,13 +452,13 @@ impl<'c, 'd, T: Instance, const TX_BUF_SIZE: usize, const RX_BUF_SIZE: usize> } /// Async write frame to TX buffer. - pub async fn write(&mut self, frame: ClassicFrame) { + pub async fn write(&mut self, frame: Frame) { self.tx_buf.send(frame).await; T::IT0Interrupt::pend(); // Wake for Tx } /// Async read frame from RX buffer. - pub async fn read(&mut self) -> Result<(ClassicFrame, Timestamp), BusError> { + pub async fn read(&mut self) -> Result { self.rx_buf.receive().await } @@ -489,8 +488,7 @@ impl<'c, 'd, T: Instance, const TX_BUF_SIZE: usize, const RX_BUF_SIZE: usize> Dr } /// User supplied buffer for RX Buffering -pub type RxFdBuf = - Channel, BUF_SIZE>; +pub type RxFdBuf = Channel, BUF_SIZE>; /// User supplied buffer for TX buffering pub type TxFdBuf = Channel; @@ -499,7 +497,7 @@ pub type TxFdBuf = Channel { _instance1: PhantomData, _instance2: &'d crate::pac::can::Fdcan, - _mode: FdcanOperatingMode, + _mode: OperatingMode, tx_buf: &'static TxFdBuf, rx_buf: &'static RxFdBuf, } @@ -532,7 +530,7 @@ impl BufferedFdCanSender { } /// Receiver that can be used for receiving CAN frames. Note, each CAN frame will only be received by one receiver. -pub type BufferedFdCanReceiver = DynamicReceiver<'static, Result<(FdFrame, Timestamp), BusError>>; +pub type BufferedFdCanReceiver = DynamicReceiver<'static, Result>; impl<'c, 'd, T: Instance, const TX_BUF_SIZE: usize, const RX_BUF_SIZE: usize> BufferedCanFd<'d, T, TX_BUF_SIZE, RX_BUF_SIZE> @@ -540,7 +538,7 @@ impl<'c, 'd, T: Instance, const TX_BUF_SIZE: usize, const RX_BUF_SIZE: usize> fn new( _instance1: PhantomData, _instance2: &'d crate::pac::can::Fdcan, - _mode: FdcanOperatingMode, + _mode: OperatingMode, tx_buf: &'static TxFdBuf, rx_buf: &'static RxFdBuf, ) -> Self { @@ -576,7 +574,7 @@ impl<'c, 'd, T: Instance, const TX_BUF_SIZE: usize, const RX_BUF_SIZE: usize> } /// Async read frame from RX buffer. - pub async fn read(&mut self) -> Result<(FdFrame, Timestamp), BusError> { + pub async fn read(&mut self) -> Result { self.rx_buf.receive().await } @@ -606,25 +604,25 @@ impl<'c, 'd, T: Instance, const TX_BUF_SIZE: usize, const RX_BUF_SIZE: usize> Dr } /// FDCAN Rx only Instance -pub struct FdcanRx<'d, T: Instance> { +pub struct CanRx<'d, T: Instance> { _instance1: PhantomData, _instance2: &'d crate::pac::can::Fdcan, - _mode: FdcanOperatingMode, + _mode: OperatingMode, } /// FDCAN Tx only Instance -pub struct FdcanTx<'d, T: Instance> { +pub struct CanTx<'d, T: Instance> { config: crate::can::fd::config::FdCanConfig, _instance: FdcanInstance<'d, T>, //(PeripheralRef<'a, T>); - _mode: FdcanOperatingMode, + _mode: OperatingMode, } -impl<'c, 'd, T: Instance> FdcanTx<'d, T> { +impl<'c, 'd, T: Instance> CanTx<'d, T> { /// Queues the message to be sent but exerts backpressure. If a lower-priority /// frame is dropped from the mailbox, it is returned. If no lower-priority frames /// can be replaced, this call asynchronously waits for a frame to be successfully /// transmitted, then tries again. - pub async fn write(&mut self, frame: &ClassicFrame) -> Option { + pub async fn write(&mut self, frame: &Frame) -> Option { T::state().tx_mode.write::(frame).await } @@ -637,14 +635,14 @@ impl<'c, 'd, T: Instance> FdcanTx<'d, T> { } } -impl<'c, 'd, T: Instance> FdcanRx<'d, T> { +impl<'c, 'd, T: Instance> CanRx<'d, T> { /// Returns the next received message frame - pub async fn read(&mut self) -> Result<(ClassicFrame, Timestamp), BusError> { + pub async fn read(&mut self) -> Result { T::state().rx_mode.read_classic::().await } /// Returns the next received message frame - pub async fn read_fd(&mut self) -> Result<(FdFrame, Timestamp), BusError> { + pub async fn read_fd(&mut self) -> Result { T::state().rx_mode.read_fd::().await } } @@ -672,18 +670,50 @@ impl RxMode { waker.wake(); } RxMode::ClassicBuffered(buf) => { - if let Some(result) = self.read::() { + if let Some(result) = self.try_read::() { let _ = buf.rx_sender.try_send(result); } } RxMode::FdBuffered(buf) => { - if let Some(result) = self.read::() { + if let Some(result) = self.try_read_fd::() { let _ = buf.rx_sender.try_send(result); } } } } + //async fn read_classic(&self) -> Result { + fn try_read(&self) -> Option> { + if let Some((frame, ts)) = T::registers().read(0) { + let ts = T::calc_timestamp(T::state().ns_per_timer_tick, ts); + Some(Ok(Envelope { ts, frame })) + } else if let Some((frame, ts)) = T::registers().read(1) { + let ts = T::calc_timestamp(T::state().ns_per_timer_tick, ts); + Some(Ok(Envelope { ts, frame })) + } else if let Some(err) = T::registers().curr_error() { + // TODO: this is probably wrong + Some(Err(err)) + } else { + None + } + } + + //async fn read_classic(&self) -> Result { + fn try_read_fd(&self) -> Option> { + if let Some((frame, ts)) = T::registers().read(0) { + let ts = T::calc_timestamp(T::state().ns_per_timer_tick, ts); + Some(Ok(FdEnvelope { ts, frame })) + } else if let Some((frame, ts)) = T::registers().read(1) { + let ts = T::calc_timestamp(T::state().ns_per_timer_tick, ts); + Some(Ok(FdEnvelope { ts, frame })) + } else if let Some(err) = T::registers().curr_error() { + // TODO: this is probably wrong + Some(Err(err)) + } else { + None + } + } + fn read(&self) -> Option> { if let Some((msg, ts)) = T::registers().read(0) { let ts = T::calc_timestamp(T::state().ns_per_timer_tick, ts); @@ -711,12 +741,18 @@ impl RxMode { .await } - async fn read_classic(&self) -> Result<(ClassicFrame, Timestamp), BusError> { - self.read_async::().await + async fn read_classic(&self) -> Result { + match self.read_async::().await { + Ok((frame, ts)) => Ok(Envelope { ts, frame }), + Err(e) => Err(e), + } } - async fn read_fd(&self) -> Result<(FdFrame, Timestamp), BusError> { - self.read_async::().await + async fn read_fd(&self) -> Result { + match self.read_async::().await { + Ok((frame, ts)) => Ok(FdEnvelope { ts, frame }), + Err(e) => Err(e), + } } } @@ -761,7 +797,7 @@ impl TxMode { /// frame is dropped from the mailbox, it is returned. If no lower-priority frames /// can be replaced, this call asynchronously waits for a frame to be successfully /// transmitted, then tries again. - async fn write(&self, frame: &ClassicFrame) -> Option { + async fn write(&self, frame: &Frame) -> Option { self.write_generic::(frame).await } diff --git a/embassy-stm32/src/can/frame.rs b/embassy-stm32/src/can/frame.rs index 14fc32c51..fb032aee2 100644 --- a/embassy-stm32/src/can/frame.rs +++ b/embassy-stm32/src/can/frame.rs @@ -136,19 +136,20 @@ impl ClassicData { } } -/// Frame with up to 8 bytes of data payload as per Classic CAN +/// Frame with up to 8 bytes of data payload as per Classic(non-FD) CAN +/// For CAN-FD support use FdFrame #[derive(Debug, Copy, Clone)] #[cfg_attr(feature = "defmt", derive(defmt::Format))] -pub struct ClassicFrame { +pub struct Frame { can_header: Header, data: ClassicData, } -impl ClassicFrame { +impl Frame { /// Create a new CAN classic Frame pub fn new(can_header: Header, raw_data: &[u8]) -> Result { let data = ClassicData::new(raw_data)?; - Ok(ClassicFrame { can_header, data: data }) + Ok(Frame { can_header, data: data }) } /// Creates a new data frame. @@ -206,9 +207,9 @@ impl ClassicFrame { } } -impl embedded_can::Frame for ClassicFrame { +impl embedded_can::Frame for Frame { fn new(id: impl Into, raw_data: &[u8]) -> Option { - let frameopt = ClassicFrame::new(Header::new(id.into(), raw_data.len() as u8, false), raw_data); + let frameopt = Frame::new(Header::new(id.into(), raw_data.len() as u8, false), raw_data); match frameopt { Ok(frame) => Some(frame), Err(_) => None, @@ -216,7 +217,7 @@ impl embedded_can::Frame for ClassicFrame { } fn new_remote(id: impl Into, len: usize) -> Option { if len <= 8 { - let frameopt = ClassicFrame::new(Header::new(id.into(), len as u8, true), &[0; 8]); + let frameopt = Frame::new(Header::new(id.into(), len as u8, true), &[0; 8]); match frameopt { Ok(frame) => Some(frame), Err(_) => None, @@ -245,7 +246,7 @@ impl embedded_can::Frame for ClassicFrame { } } -impl CanHeader for ClassicFrame { +impl CanHeader for Frame { fn from_header(header: Header, data: &[u8]) -> Result { Self::new(header, data) } @@ -255,10 +256,32 @@ impl CanHeader for ClassicFrame { } } +/// Contains CAN frame and additional metadata. +/// +/// Timestamp is available if `time` feature is enabled. +/// For CAN-FD support use FdEnvelope +#[derive(Debug, Clone)] +#[cfg_attr(feature = "defmt", derive(defmt::Format))] +pub struct Envelope { + /// Reception time. + #[cfg(feature = "time")] + pub ts: embassy_time::Instant, + /// The actual CAN frame. + pub frame: Frame, +} + +impl Envelope { + /// Convert into a tuple + pub fn parts(self) -> (Frame, embassy_time::Instant) { + (self.frame, self.ts) + } +} + /// Payload of a (FD)CAN data frame. /// /// Contains 0 to 64 Bytes of data. #[derive(Debug, Copy, Clone)] +#[cfg_attr(feature = "defmt", derive(defmt::Format))] pub struct FdData { pub(crate) bytes: [u8; 64], } @@ -308,6 +331,7 @@ impl FdData { /// Frame with up to 8 bytes of data payload as per Fd CAN #[derive(Debug, Copy, Clone)] +#[cfg_attr(feature = "defmt", derive(defmt::Format))] pub struct FdFrame { can_header: Header, data: FdData, @@ -410,3 +434,23 @@ impl CanHeader for FdFrame { self.header() } } + +/// Contains CAN FD frame and additional metadata. +/// +/// Timestamp is available if `time` feature is enabled. +#[derive(Debug, Clone)] +#[cfg_attr(feature = "defmt", derive(defmt::Format))] +pub struct FdEnvelope { + /// Reception time. + #[cfg(feature = "time")] + pub ts: embassy_time::Instant, + /// The actual CAN frame. + pub frame: FdFrame, +} + +impl FdEnvelope { + /// Convert into a tuple + pub fn parts(self) -> (FdFrame, embassy_time::Instant) { + (self.frame, self.ts) + } +} diff --git a/examples/stm32f1/Cargo.toml b/examples/stm32f1/Cargo.toml index df5d32f70..4f282f326 100644 --- a/examples/stm32f1/Cargo.toml +++ b/examples/stm32f1/Cargo.toml @@ -23,6 +23,7 @@ panic-probe = { version = "0.3", features = ["print-defmt"] } futures = { version = "0.3.17", default-features = false, features = ["async-await"] } heapless = { version = "0.8", default-features = false } nb = "1.0.0" +static_cell = "2.0.0" [profile.dev] opt-level = "s" diff --git a/examples/stm32f1/src/bin/can.rs b/examples/stm32f1/src/bin/can.rs index ac337e8a0..90cb9e46b 100644 --- a/examples/stm32f1/src/bin/can.rs +++ b/examples/stm32f1/src/bin/can.rs @@ -4,11 +4,12 @@ use defmt::*; use embassy_executor::Spawner; use embassy_stm32::can::{ - filter, Can, Fifo, Frame, Id, Rx0InterruptHandler, Rx1InterruptHandler, SceInterruptHandler, StandardId, + filter, Can, Envelope, Fifo, Frame, Id, Rx0InterruptHandler, Rx1InterruptHandler, SceInterruptHandler, StandardId, TxInterruptHandler, }; use embassy_stm32::peripherals::CAN; use embassy_stm32::{bind_interrupts, Config}; +use static_cell::StaticCell; use {defmt_rtt as _, panic_probe as _}; bind_interrupts!(struct Irqs { @@ -21,6 +22,27 @@ bind_interrupts!(struct Irqs { // This example is configured to work with real CAN transceivers on B8/B9. // See other examples for loopback. +fn handle_frame(env: Envelope, read_mode: &str) { + match env.frame.id() { + Id::Extended(id) => { + defmt::println!( + "{} Extended Frame id={:x} {:02x}", + read_mode, + id.as_raw(), + env.frame.data() + ); + } + Id::Standard(id) => { + defmt::println!( + "{} Standard Frame id={:x} {:02x}", + read_mode, + id.as_raw(), + env.frame.data() + ); + } + } +} + #[embassy_executor::main] async fn main(_spawner: Spawner) { let p = embassy_stm32::init(Config::default()); @@ -28,6 +50,9 @@ async fn main(_spawner: Spawner) { // Set alternate pin mapping to B8/B9 embassy_stm32::pac::AFIO.mapr().modify(|w| w.set_can1_remap(2)); + static RX_BUF: StaticCell> = StaticCell::new(); + static TX_BUF: StaticCell> = StaticCell::new(); + let mut can = Can::new(p.CAN, p.PB8, p.PB9, Irqs); can.as_mut() @@ -43,21 +68,72 @@ async fn main(_spawner: Spawner) { can.set_bitrate(250_000); can.enable().await; - let mut i: u8 = 0; + + /* + // Example for using buffered Tx and Rx without needing to + // split first as is done below. + let mut can = can.buffered( + TX_BUF.init(embassy_stm32::can::TxBuf::<10>::new()), + RX_BUF.init(embassy_stm32::can::RxBuf::<10>::new())); + loop { + let tx_frame = Frame::new_data(unwrap!(StandardId::new(i as _)), &[i, 0, 1, 2, 3, 4, 5, 6]).unwrap(); + can.write(&tx_frame).await; + + match can.read().await { + Ok((frame, ts)) => { + handle_frame(Envelope { ts, frame }, "Buf"); + } + Err(err) => { + defmt::println!("Error {}", err); + } + } + i += 1; + } + + */ + let (mut tx, mut rx) = can.split(); + + // This example shows using the wait_not_empty API before try read + while i < 3 { + let tx_frame = Frame::new_data(unwrap!(StandardId::new(i as _)), &[i, 0, 1, 2, 3, 4, 5, 6]).unwrap(); + tx.write(&tx_frame).await; + + rx.wait_not_empty().await; + let env = rx.try_read().unwrap(); + handle_frame(env, "Wait"); + i += 1; + } + + // This example shows using the full async non-buffered API + while i < 6 { + let tx_frame = Frame::new_data(unwrap!(StandardId::new(i as _)), &[i, 0, 1, 2, 3, 4, 5, 6]).unwrap(); + tx.write(&tx_frame).await; + + match rx.read().await { + Ok(env) => { + handle_frame(env, "NoBuf"); + } + Err(err) => { + defmt::println!("Error {}", err); + } + } + i += 1; + } + + // This example shows using buffered RX and TX. User passes in desired buffer (size) + // It's possible this way to have just RX or TX buffered. + let mut rx = rx.buffered(RX_BUF.init(embassy_stm32::can::RxBuf::<10>::new())); + let mut tx = tx.buffered(TX_BUF.init(embassy_stm32::can::TxBuf::<10>::new())); + loop { let tx_frame = Frame::new_data(unwrap!(StandardId::new(i as _)), &[i, 0, 1, 2, 3, 4, 5, 6]).unwrap(); - can.write(&tx_frame).await; + tx.write(&tx_frame).await; - match can.read().await { - Ok(env) => match env.frame.id() { - Id::Extended(id) => { - defmt::println!("Extended Frame id={:x} {:02x}", id.as_raw(), env.frame.data()); - } - Id::Standard(id) => { - defmt::println!("Standard Frame id={:x} {:02x}", id.as_raw(), env.frame.data()); - } - }, + match rx.read().await { + Ok(envelope) => { + handle_frame(envelope, "Buf"); + } Err(err) => { defmt::println!("Error {}", err); } diff --git a/examples/stm32g4/src/bin/can.rs b/examples/stm32g4/src/bin/can.rs index 4373a89a8..2ed632a93 100644 --- a/examples/stm32g4/src/bin/can.rs +++ b/examples/stm32g4/src/bin/can.rs @@ -36,7 +36,7 @@ async fn main(_spawner: Spawner) { } let peripherals = embassy_stm32::init(config); - let mut can = can::FdcanConfigurator::new(peripherals.FDCAN1, peripherals.PA11, peripherals.PA12, Irqs); + let mut can = can::CanConfigurator::new(peripherals.FDCAN1, peripherals.PA11, peripherals.PA12, Irqs); can.set_extended_filter( can::filter::ExtendedFilterSlot::_0, @@ -56,21 +56,22 @@ async fn main(_spawner: Spawner) { info!("Configured"); let mut can = can.start(match use_fd { - true => can::FdcanOperatingMode::InternalLoopbackMode, - false => can::FdcanOperatingMode::NormalOperationMode, + true => can::OperatingMode::InternalLoopbackMode, + false => can::OperatingMode::NormalOperationMode, }); let mut i = 0; let mut last_read_ts = embassy_time::Instant::now(); loop { - let frame = can::frame::ClassicFrame::new_extended(0x123456F, &[i; 8]).unwrap(); + let frame = can::frame::Frame::new_extended(0x123456F, &[i; 8]).unwrap(); info!("Writing frame"); _ = can.write(&frame).await; match can.read().await { - Ok((rx_frame, ts)) => { + Ok(envelope) => { + let (ts, rx_frame) = (envelope.ts, envelope.frame); let delta = (ts - last_read_ts).as_millis(); last_read_ts = ts; info!( @@ -105,7 +106,8 @@ async fn main(_spawner: Spawner) { } match can.read_fd().await { - Ok((rx_frame, ts)) => { + Ok(envelope) => { + let (ts, rx_frame) = (envelope.ts, envelope.frame); let delta = (ts - last_read_ts).as_millis(); last_read_ts = ts; info!( @@ -129,12 +131,13 @@ async fn main(_spawner: Spawner) { let (mut tx, mut rx) = can.split(); // With split loop { - let frame = can::frame::ClassicFrame::new_extended(0x123456F, &[i; 8]).unwrap(); + let frame = can::frame::Frame::new_extended(0x123456F, &[i; 8]).unwrap(); info!("Writing frame"); _ = tx.write(&frame).await; match rx.read().await { - Ok((rx_frame, ts)) => { + Ok(envelope) => { + let (ts, rx_frame) = (envelope.ts, envelope.frame); let delta = (ts - last_read_ts).as_millis(); last_read_ts = ts; info!( @@ -156,7 +159,7 @@ async fn main(_spawner: Spawner) { } } - let can = can::Fdcan::join(tx, rx); + let can = can::Can::join(tx, rx); info!("\n\n\nBuffered\n"); if use_fd { @@ -173,7 +176,8 @@ async fn main(_spawner: Spawner) { _ = can.write(frame).await; match can.read().await { - Ok((rx_frame, ts)) => { + Ok(envelope) => { + let (ts, rx_frame) = (envelope.ts, envelope.frame); let delta = (ts - last_read_ts).as_millis(); last_read_ts = ts; info!( @@ -198,7 +202,7 @@ async fn main(_spawner: Spawner) { RX_BUF.init(can::RxBuf::<10>::new()), ); loop { - let frame = can::frame::ClassicFrame::new_extended(0x123456F, &[i; 8]).unwrap(); + let frame = can::frame::Frame::new_extended(0x123456F, &[i; 8]).unwrap(); info!("Writing frame"); // You can use any of these approaches to send. The writer makes it @@ -208,7 +212,8 @@ async fn main(_spawner: Spawner) { can.writer().write(frame).await; match can.read().await { - Ok((rx_frame, ts)) => { + Ok(envelope) => { + let (ts, rx_frame) = (envelope.ts, envelope.frame); let delta = (ts - last_read_ts).as_millis(); last_read_ts = ts; info!( diff --git a/examples/stm32h5/src/bin/can.rs b/examples/stm32h5/src/bin/can.rs index 643df27f9..dd625c90a 100644 --- a/examples/stm32h5/src/bin/can.rs +++ b/examples/stm32h5/src/bin/can.rs @@ -24,7 +24,7 @@ async fn main(_spawner: Spawner) { let peripherals = embassy_stm32::init(config); - let mut can = can::FdcanConfigurator::new(peripherals.FDCAN1, peripherals.PA11, peripherals.PA12, Irqs); + let mut can = can::CanConfigurator::new(peripherals.FDCAN1, peripherals.PA11, peripherals.PA12, Irqs); // 250k bps can.set_bitrate(250_000); @@ -38,12 +38,13 @@ async fn main(_spawner: Spawner) { let mut last_read_ts = embassy_time::Instant::now(); loop { - let frame = can::frame::ClassicFrame::new_extended(0x123456F, &[i; 8]).unwrap(); + let frame = can::frame::Frame::new_extended(0x123456F, &[i; 8]).unwrap(); info!("Writing frame"); _ = can.write(&frame).await; match can.read().await { - Ok((rx_frame, ts)) => { + Ok(envelope) => { + let (rx_frame, ts) = envelope.parts(); let delta = (ts - last_read_ts).as_millis(); last_read_ts = ts; info!( @@ -69,12 +70,13 @@ async fn main(_spawner: Spawner) { let (mut tx, mut rx) = can.split(); // With split loop { - let frame = can::frame::ClassicFrame::new_extended(0x123456F, &[i; 8]).unwrap(); + let frame = can::frame::Frame::new_extended(0x123456F, &[i; 8]).unwrap(); info!("Writing frame"); _ = tx.write(&frame).await; match rx.read().await { - Ok((rx_frame, ts)) => { + Ok(envelope) => { + let (rx_frame, ts) = envelope.parts(); let delta = (ts - last_read_ts).as_millis(); last_read_ts = ts; info!( diff --git a/examples/stm32h7/src/bin/can.rs b/examples/stm32h7/src/bin/can.rs index 13a6a5051..22cb27481 100644 --- a/examples/stm32h7/src/bin/can.rs +++ b/examples/stm32h7/src/bin/can.rs @@ -24,7 +24,7 @@ async fn main(_spawner: Spawner) { let peripherals = embassy_stm32::init(config); - let mut can = can::FdcanConfigurator::new(peripherals.FDCAN1, peripherals.PA11, peripherals.PA12, Irqs); + let mut can = can::CanConfigurator::new(peripherals.FDCAN1, peripherals.PA11, peripherals.PA12, Irqs); // 250k bps can.set_bitrate(250_000); @@ -38,12 +38,13 @@ async fn main(_spawner: Spawner) { let mut last_read_ts = embassy_time::Instant::now(); loop { - let frame = can::frame::ClassicFrame::new_extended(0x123456F, &[i; 8]).unwrap(); + let frame = can::frame::Frame::new_extended(0x123456F, &[i; 8]).unwrap(); info!("Writing frame"); _ = can.write(&frame).await; match can.read().await { - Ok((rx_frame, ts)) => { + Ok(envelope) => { + let (rx_frame, ts) = envelope.parts(); let delta = (ts - last_read_ts).as_millis(); last_read_ts = ts; info!( @@ -69,12 +70,13 @@ async fn main(_spawner: Spawner) { let (mut tx, mut rx) = can.split(); // With split loop { - let frame = can::frame::ClassicFrame::new_extended(0x123456F, &[i; 8]).unwrap(); + let frame = can::frame::Frame::new_extended(0x123456F, &[i; 8]).unwrap(); info!("Writing frame"); _ = tx.write(&frame).await; match rx.read().await { - Ok((rx_frame, ts)) => { + Ok(envelope) => { + let (rx_frame, ts) = envelope.parts(); let delta = (ts - last_read_ts).as_millis(); last_read_ts = ts; info!( diff --git a/tests/stm32/src/bin/fdcan.rs b/tests/stm32/src/bin/fdcan.rs index c7373e294..bddfa7684 100644 --- a/tests/stm32/src/bin/fdcan.rs +++ b/tests/stm32/src/bin/fdcan.rs @@ -79,8 +79,8 @@ async fn main(_spawner: Spawner) { let options = options(); let peripherals = embassy_stm32::init(options.config); - let mut can = can::FdcanConfigurator::new(peripherals.FDCAN1, peripherals.PB8, peripherals.PB9, Irqs1); - let mut can2 = can::FdcanConfigurator::new(peripherals.FDCAN2, peripherals.PB12, peripherals.PB13, Irqs2); + let mut can = can::CanConfigurator::new(peripherals.FDCAN1, peripherals.PB8, peripherals.PB9, Irqs1); + let mut can2 = can::CanConfigurator::new(peripherals.FDCAN2, peripherals.PB12, peripherals.PB13, Irqs2); // 250k bps can.set_bitrate(250_000); @@ -102,13 +102,13 @@ async fn main(_spawner: Spawner) { let mut i: u8 = 0; loop { - let tx_frame = can::frame::ClassicFrame::new_standard(0x123, &[i; 1]).unwrap(); + let tx_frame = can::frame::Frame::new_standard(0x123, &[i; 1]).unwrap(); info!("Transmitting frame..."); let tx_ts = Instant::now(); can.write(&tx_frame).await; - let (frame, timestamp) = can.read().await.unwrap(); + let (frame, timestamp) = can.read().await.unwrap().parts(); info!("Frame received!"); // Check data. @@ -139,13 +139,13 @@ async fn main(_spawner: Spawner) { let mut i: u8 = 0; loop { - let tx_frame = can::frame::ClassicFrame::new_standard(0x123, &[i; 1]).unwrap(); + let tx_frame = can::frame::Frame::new_standard(0x123, &[i; 1]).unwrap(); info!("Transmitting frame..."); let tx_ts = Instant::now(); can2.write(&tx_frame).await; - let (frame, timestamp) = can2.read().await.unwrap(); + let (frame, timestamp) = can2.read().await.unwrap().parts(); info!("Frame received!"); //print_regs().await; @@ -182,20 +182,20 @@ async fn main(_spawner: Spawner) { // in each FIFO so make sure we write enough to fill them both up before reading. for i in 0..3 { // Try filling up the RX FIFO0 buffers with standard packets - let tx_frame = can::frame::ClassicFrame::new_standard(0x123, &[i; 1]).unwrap(); + let tx_frame = can::frame::Frame::new_standard(0x123, &[i; 1]).unwrap(); info!("Transmitting frame {}", i); can.write(&tx_frame).await; } for i in 3..max_buffered { // Try filling up the RX FIFO0 buffers with extended packets - let tx_frame = can::frame::ClassicFrame::new_extended(0x1232344, &[i; 1]).unwrap(); + let tx_frame = can::frame::Frame::new_extended(0x1232344, &[i; 1]).unwrap(); info!("Transmitting frame {}", i); can.write(&tx_frame).await; } // Try and receive all 6 packets for i in 0..max_buffered { - let (frame, _ts) = can.read().await.unwrap(); + let (frame, _ts) = can.read().await.unwrap().parts(); match frame.id() { embedded_can::Id::Extended(id) => { info!("Extended received! {:x} {} {}", id.as_raw(), frame.data()[0], i); @@ -210,20 +210,20 @@ async fn main(_spawner: Spawner) { let (mut tx, mut rx) = can.split(); for i in 0..3 { // Try filling up the RX FIFO0 buffers with standard packets - let tx_frame = can::frame::ClassicFrame::new_standard(0x123, &[i; 1]).unwrap(); + let tx_frame = can::frame::Frame::new_standard(0x123, &[i; 1]).unwrap(); info!("Transmitting frame {}", i); tx.write(&tx_frame).await; } for i in 3..max_buffered { // Try filling up the RX FIFO0 buffers with extended packets - let tx_frame = can::frame::ClassicFrame::new_extended(0x1232344, &[i; 1]).unwrap(); + let tx_frame = can::frame::Frame::new_extended(0x1232344, &[i; 1]).unwrap(); info!("Transmitting frame {}", i); tx.write(&tx_frame).await; } // Try and receive all 6 packets for i in 0..max_buffered { - let (frame, _ts) = rx.read().await.unwrap(); + let (frame, _ts) = rx.read().await.unwrap().parts(); match frame.id() { embedded_can::Id::Extended(id) => { info!("Extended received! {:x} {} {}", id.as_raw(), frame.data()[0], i); From 8d43fb4da4712dd9bb5a2ae343168e536c2b3129 Mon Sep 17 00:00:00 2001 From: Corey Schuhen Date: Wed, 27 Mar 2024 19:43:19 +1000 Subject: [PATCH 054/581] CAN: Use the same testing code for BXCAN and FDCAN h/w. --- tests/stm32/src/bin/can.rs | 50 +++----- tests/stm32/src/bin/can_common.rs | 112 +++++++++++++++++ tests/stm32/src/bin/fdcan.rs | 195 ++++++------------------------ 3 files changed, 163 insertions(+), 194 deletions(-) create mode 100644 tests/stm32/src/bin/can_common.rs diff --git a/tests/stm32/src/bin/can.rs b/tests/stm32/src/bin/can.rs index c08c69a3b..74d84c42f 100644 --- a/tests/stm32/src/bin/can.rs +++ b/tests/stm32/src/bin/can.rs @@ -6,17 +6,19 @@ #[path = "../common.rs"] mod common; use common::*; -use defmt::assert; use embassy_executor::Spawner; use embassy_stm32::bind_interrupts; use embassy_stm32::can::bx::filter::Mask32; -use embassy_stm32::can::bx::{Fifo, Frame, StandardId}; +use embassy_stm32::can::bx::Fifo; use embassy_stm32::can::{Can, Rx0InterruptHandler, Rx1InterruptHandler, SceInterruptHandler, TxInterruptHandler}; use embassy_stm32::gpio::{Input, Pull}; use embassy_stm32::peripherals::CAN1; -use embassy_time::{Duration, Instant}; +use embassy_time::Duration; use {defmt_rtt as _, panic_probe as _}; +mod can_common; +use can_common::*; + bind_interrupts!(struct Irqs { CAN1_RX0 => Rx0InterruptHandler; CAN1_RX1 => Rx1InterruptHandler; @@ -29,6 +31,11 @@ async fn main(_spawner: Spawner) { let p = embassy_stm32::init(config()); info!("Hello World!"); + let options = TestOptions { + max_latency: Duration::from_micros(1200), + max_buffered: 2, + }; + let can = peri!(p, CAN); let tx = peri!(p, CAN_TX); let mut rx = peri!(p, CAN_RX); @@ -58,40 +65,13 @@ async fn main(_spawner: Spawner) { info!("Can configured"); - let mut i: u8 = 0; - loop { - let tx_frame = Frame::new_data(unwrap!(StandardId::new(i as _)), &[i]).unwrap(); + run_can_tests(&mut can, &options).await; - info!("Transmitting frame..."); - let tx_ts = Instant::now(); - can.write(&tx_frame).await; - - let envelope = can.read().await.unwrap(); - info!("Frame received!"); - - info!("loopback time {}", envelope.ts); - info!("loopback frame {=u8}", envelope.frame.data()[0]); - - let latency = envelope.ts.saturating_duration_since(tx_ts); - info!("loopback latency {} us", latency.as_micros()); - - // Theoretical minimum latency is 55us, actual is usually ~80us - const MIN_LATENCY: Duration = Duration::from_micros(50); - const MAX_LATENCY: Duration = Duration::from_micros(150); - assert!( - MIN_LATENCY <= latency && latency <= MAX_LATENCY, - "{} <= {} <= {}", - MIN_LATENCY, - latency, - MAX_LATENCY - ); - - i += 1; - if i > 10 { - break; - } - } + // Test again with a split + let (mut tx, mut rx) = can.split(); + run_split_can_tests(&mut tx, &mut rx, &options).await; info!("Test OK"); + cortex_m::asm::bkpt(); } diff --git a/tests/stm32/src/bin/can_common.rs b/tests/stm32/src/bin/can_common.rs new file mode 100644 index 000000000..4b39269cc --- /dev/null +++ b/tests/stm32/src/bin/can_common.rs @@ -0,0 +1,112 @@ +use defmt::{assert, *}; +use embassy_stm32::can; +use embassy_time::{Duration, Instant}; + +#[derive(Clone, Copy, Debug)] +pub struct TestOptions { + pub max_latency: Duration, + pub max_buffered: u8, +} + +pub async fn run_can_tests<'d, T: can::Instance>(can: &mut can::Can<'d, T>, options: &TestOptions) { + let mut i: u8 = 0; + loop { + //let tx_frame = can::frame::Frame::new_standard(0x123, &[i, 0x12 as u8, 0x34 as u8, 0x56 as u8, 0x78 as u8, 0x9A as u8, 0xBC as u8 ]).unwrap(); + let tx_frame = can::frame::Frame::new_standard(0x123, &[i; 1]).unwrap(); + + //info!("Transmitting frame..."); + let tx_ts = Instant::now(); + can.write(&tx_frame).await; + + let (frame, timestamp) = can.read().await.unwrap().parts(); + //info!("Frame received!"); + + // Check data. + assert!(i == frame.data()[0], "{} == {}", i, frame.data()[0]); + + //info!("loopback time {}", timestamp); + //info!("loopback frame {=u8}", frame.data()[0]); + let latency = timestamp.saturating_duration_since(tx_ts); + info!("loopback latency {} us", latency.as_micros()); + + // Theoretical minimum latency is 55us, actual is usually ~80us + const MIN_LATENCY: Duration = Duration::from_micros(50); + // Was failing at 150 but we are not getting a real time stamp. I'm not + // sure if there are other delays + assert!( + MIN_LATENCY <= latency && latency <= options.max_latency, + "{} <= {} <= {}", + MIN_LATENCY, + latency, + options.max_latency + ); + + i += 1; + if i > 5 { + break; + } + } + + // Below here, check that we can receive from both FIFO0 and FIFO1 + // Above we configured FIFO1 for extended ID packets. There are only 3 slots + // in each FIFO so make sure we write enough to fill them both up before reading. + for i in 0..options.max_buffered { + // Try filling up the RX FIFO0 buffers + //let tx_frame = if 0 != (i & 0x01) { + let tx_frame = if i < options.max_buffered / 2 { + info!("Transmitting standard frame {}", i); + can::frame::Frame::new_standard(0x123, &[i; 1]).unwrap() + } else { + info!("Transmitting extended frame {}", i); + can::frame::Frame::new_extended(0x1232344, &[i; 1]).unwrap() + }; + can.write(&tx_frame).await; + } + + // Try and receive all 6 packets + for _i in 0..options.max_buffered { + let (frame, _ts) = can.read().await.unwrap().parts(); + match frame.id() { + embedded_can::Id::Extended(_id) => { + info!("Extended received! {}", frame.data()[0]); + //info!("Extended received! {:x} {} {}", id.as_raw(), frame.data()[0], i); + } + embedded_can::Id::Standard(_id) => { + info!("Standard received! {}", frame.data()[0]); + //info!("Standard received! {:x} {} {}", id.as_raw(), frame.data()[0], i); + } + } + } +} + +pub async fn run_split_can_tests<'d, T: can::Instance>( + tx: &mut can::CanTx<'d, T>, + rx: &mut can::CanRx<'d, T>, + options: &TestOptions, +) { + for i in 0..options.max_buffered { + // Try filling up the RX FIFO0 buffers + //let tx_frame = if 0 != (i & 0x01) { + let tx_frame = if i < options.max_buffered / 2 { + info!("Transmitting standard frame {}", i); + can::frame::Frame::new_standard(0x123, &[i; 1]).unwrap() + } else { + info!("Transmitting extended frame {}", i); + can::frame::Frame::new_extended(0x1232344, &[i; 1]).unwrap() + }; + tx.write(&tx_frame).await; + } + + // Try and receive all 6 packets + for _i in 0..options.max_buffered { + let (frame, _ts) = rx.read().await.unwrap().parts(); + match frame.id() { + embedded_can::Id::Extended(_id) => { + info!("Extended received! {}", frame.data()[0]); + } + embedded_can::Id::Standard(_id) => { + info!("Standard received! {}", frame.data()[0]); + } + } + } +} diff --git a/tests/stm32/src/bin/fdcan.rs b/tests/stm32/src/bin/fdcan.rs index bddfa7684..27bdd038a 100644 --- a/tests/stm32/src/bin/fdcan.rs +++ b/tests/stm32/src/bin/fdcan.rs @@ -6,13 +6,15 @@ #[path = "../common.rs"] mod common; use common::*; -use defmt::assert; use embassy_executor::Spawner; use embassy_stm32::peripherals::*; use embassy_stm32::{bind_interrupts, can, Config}; -use embassy_time::{Duration, Instant}; +use embassy_time::Duration; use {defmt_rtt as _, panic_probe as _}; +mod can_common; +use can_common::*; + bind_interrupts!(struct Irqs2 { FDCAN2_IT0 => can::IT0InterruptHandler; FDCAN2_IT1 => can::IT1InterruptHandler; @@ -22,14 +24,8 @@ bind_interrupts!(struct Irqs1 { FDCAN1_IT1 => can::IT1InterruptHandler; }); -struct TestOptions { - config: Config, - max_latency: Duration, - second_fifo_working: bool, -} - #[cfg(any(feature = "stm32h755zi", feature = "stm32h753zi", feature = "stm32h563zi"))] -fn options() -> TestOptions { +fn options() -> (Config, TestOptions) { use embassy_stm32::rcc; info!("H75 config"); let mut c = config(); @@ -38,15 +34,17 @@ fn options() -> TestOptions { mode: rcc::HseMode::Oscillator, }); c.rcc.mux.fdcansel = rcc::mux::Fdcansel::HSE; - TestOptions { - config: c, - max_latency: Duration::from_micros(1200), - second_fifo_working: false, - } + ( + c, + TestOptions { + max_latency: Duration::from_micros(1200), + max_buffered: 3, + }, + ) } #[cfg(any(feature = "stm32h7a3zi"))] -fn options() -> TestOptions { +fn options() -> (Config, TestOptions) { use embassy_stm32::rcc; info!("H7a config"); let mut c = config(); @@ -55,29 +53,33 @@ fn options() -> TestOptions { mode: rcc::HseMode::Oscillator, }); c.rcc.mux.fdcansel = rcc::mux::Fdcansel::HSE; - TestOptions { - config: c, - max_latency: Duration::from_micros(1200), - second_fifo_working: false, - } + ( + c, + TestOptions { + max_latency: Duration::from_micros(1200), + max_buffered: 3, + }, + ) } #[cfg(any(feature = "stm32g491re", feature = "stm32g431cb"))] -fn options() -> TestOptions { +fn options() -> (Config, TestOptions) { info!("G4 config"); - TestOptions { - config: config(), - max_latency: Duration::from_micros(500), - second_fifo_working: true, - } + ( + config(), + TestOptions { + max_latency: Duration::from_micros(500), + max_buffered: 6, + }, + ) } #[embassy_executor::main] async fn main(_spawner: Spawner) { //let peripherals = embassy_stm32::init(config()); - let options = options(); - let peripherals = embassy_stm32::init(options.config); + let (config, options) = options(); + let peripherals = embassy_stm32::init(config); let mut can = can::CanConfigurator::new(peripherals.FDCAN1, peripherals.PB8, peripherals.PB9, Irqs1); let mut can2 = can::CanConfigurator::new(peripherals.FDCAN2, peripherals.PB12, peripherals.PB13, Irqs2); @@ -98,141 +100,16 @@ async fn main(_spawner: Spawner) { let mut can = can.into_internal_loopback_mode(); let mut can2 = can2.into_internal_loopback_mode(); + run_can_tests(&mut can, &options).await; + run_can_tests(&mut can2, &options).await; + info!("CAN Configured"); - let mut i: u8 = 0; - loop { - let tx_frame = can::frame::Frame::new_standard(0x123, &[i; 1]).unwrap(); - - info!("Transmitting frame..."); - let tx_ts = Instant::now(); - can.write(&tx_frame).await; - - let (frame, timestamp) = can.read().await.unwrap().parts(); - info!("Frame received!"); - - // Check data. - assert!(i == frame.data()[0], "{} == {}", i, frame.data()[0]); - - info!("loopback time {}", timestamp); - info!("loopback frame {=u8}", frame.data()[0]); - let latency = timestamp.saturating_duration_since(tx_ts); - info!("loopback latency {} us", latency.as_micros()); - - // Theoretical minimum latency is 55us, actual is usually ~80us - const MIN_LATENCY: Duration = Duration::from_micros(50); - // Was failing at 150 but we are not getting a real time stamp. I'm not - // sure if there are other delays - assert!( - MIN_LATENCY <= latency && latency <= options.max_latency, - "{} <= {} <= {}", - MIN_LATENCY, - latency, - options.max_latency - ); - - i += 1; - if i > 10 { - break; - } - } - - let mut i: u8 = 0; - loop { - let tx_frame = can::frame::Frame::new_standard(0x123, &[i; 1]).unwrap(); - - info!("Transmitting frame..."); - let tx_ts = Instant::now(); - can2.write(&tx_frame).await; - - let (frame, timestamp) = can2.read().await.unwrap().parts(); - info!("Frame received!"); - - //print_regs().await; - // Check data. - assert!(i == frame.data()[0], "{} == {}", i, frame.data()[0]); - - info!("loopback time {}", timestamp); - info!("loopback frame {=u8}", frame.data()[0]); - let latency = timestamp.saturating_duration_since(tx_ts); - info!("loopback latency {} us", latency.as_micros()); - - // Theoretical minimum latency is 55us, actual is usually ~80us - const MIN_LATENCY: Duration = Duration::from_micros(50); - // Was failing at 150 but we are not getting a real time stamp. I'm not - // sure if there are other delays - assert!( - MIN_LATENCY <= latency && latency <= options.max_latency, - "{} <= {} <= {}", - MIN_LATENCY, - latency, - options.max_latency - ); - - i += 1; - if i > 10 { - break; - } - } - - let max_buffered = if options.second_fifo_working { 6 } else { 3 }; - - // Below here, check that we can receive from both FIFO0 and FIFO0 - // Above we configured FIFO1 for extended ID packets. There are only 3 slots - // in each FIFO so make sure we write enough to fill them both up before reading. - for i in 0..3 { - // Try filling up the RX FIFO0 buffers with standard packets - let tx_frame = can::frame::Frame::new_standard(0x123, &[i; 1]).unwrap(); - info!("Transmitting frame {}", i); - can.write(&tx_frame).await; - } - for i in 3..max_buffered { - // Try filling up the RX FIFO0 buffers with extended packets - let tx_frame = can::frame::Frame::new_extended(0x1232344, &[i; 1]).unwrap(); - info!("Transmitting frame {}", i); - can.write(&tx_frame).await; - } - - // Try and receive all 6 packets - for i in 0..max_buffered { - let (frame, _ts) = can.read().await.unwrap().parts(); - match frame.id() { - embedded_can::Id::Extended(id) => { - info!("Extended received! {:x} {} {}", id.as_raw(), frame.data()[0], i); - } - embedded_can::Id::Standard(id) => { - info!("Standard received! {:x} {} {}", id.as_raw(), frame.data()[0], i); - } - } - } - // Test again with a split let (mut tx, mut rx) = can.split(); - for i in 0..3 { - // Try filling up the RX FIFO0 buffers with standard packets - let tx_frame = can::frame::Frame::new_standard(0x123, &[i; 1]).unwrap(); - info!("Transmitting frame {}", i); - tx.write(&tx_frame).await; - } - for i in 3..max_buffered { - // Try filling up the RX FIFO0 buffers with extended packets - let tx_frame = can::frame::Frame::new_extended(0x1232344, &[i; 1]).unwrap(); - info!("Transmitting frame {}", i); - tx.write(&tx_frame).await; - } - - // Try and receive all 6 packets - for i in 0..max_buffered { - let (frame, _ts) = rx.read().await.unwrap().parts(); - match frame.id() { - embedded_can::Id::Extended(id) => { - info!("Extended received! {:x} {} {}", id.as_raw(), frame.data()[0], i); - } - embedded_can::Id::Standard(id) => { - info!("Standard received! {:x} {} {}", id.as_raw(), frame.data()[0], i); - } - } - } + let (mut tx2, mut rx2) = can2.split(); + run_split_can_tests(&mut tx, &mut rx, &options).await; + run_split_can_tests(&mut tx2, &mut rx2, &options).await; info!("Test OK"); cortex_m::asm::bkpt(); From a9f0c8c3a941684c1a610a72dfb2b925535fc8cd Mon Sep 17 00:00:00 2001 From: Corey Schuhen Date: Wed, 27 Mar 2024 20:29:28 +1000 Subject: [PATCH 055/581] Fixes for no-time. --- embassy-stm32/src/can/bx/mod.rs | 13 +++++++------ embassy-stm32/src/can/frame.rs | 19 +++++++++++++------ 2 files changed, 20 insertions(+), 12 deletions(-) diff --git a/embassy-stm32/src/can/bx/mod.rs b/embassy-stm32/src/can/bx/mod.rs index 253bcee13..cb83799d3 100644 --- a/embassy-stm32/src/can/bx/mod.rs +++ b/embassy-stm32/src/can/bx/mod.rs @@ -622,17 +622,18 @@ impl Registers { let id = (stid << 18) | (exid); embedded_can::ExtendedId::new(id).unwrap().into() }; - let data_len = fifo.rdtr().read().dlc(); + let rdtr = fifo.rdtr().read(); + let data_len = rdtr.dlc(); + + #[cfg(not(feature = "time"))] + let ts = rdtr.time(); + let mut data: [u8; 8] = [0; 8]; data[0..4].copy_from_slice(&fifo.rdlr().read().0.to_ne_bytes()); data[4..8].copy_from_slice(&fifo.rdhr().read().0.to_ne_bytes()); let frame = Frame::new(Header::new(id, data_len, false), &data).unwrap(); - let envelope = Envelope { - #[cfg(feature = "time")] - ts, - frame, - }; + let envelope = Envelope { ts, frame }; rfr.modify(|v| v.set_rfom(true)); diff --git a/embassy-stm32/src/can/frame.rs b/embassy-stm32/src/can/frame.rs index fb032aee2..d2d1f7aa6 100644 --- a/embassy-stm32/src/can/frame.rs +++ b/embassy-stm32/src/can/frame.rs @@ -3,6 +3,14 @@ use bit_field::BitField; use crate::can::enums::FrameCreateError; +/// Calculate proper timestamp when available. +#[cfg(feature = "time")] +pub type Timestamp = embassy_time::Instant; + +/// Raw register timestamp +#[cfg(not(feature = "time"))] +pub type Timestamp = u16; + /// CAN Header, without meta data #[derive(Debug, Copy, Clone)] pub struct Header { @@ -264,15 +272,14 @@ impl CanHeader for Frame { #[cfg_attr(feature = "defmt", derive(defmt::Format))] pub struct Envelope { /// Reception time. - #[cfg(feature = "time")] - pub ts: embassy_time::Instant, + pub ts: Timestamp, /// The actual CAN frame. pub frame: Frame, } impl Envelope { /// Convert into a tuple - pub fn parts(self) -> (Frame, embassy_time::Instant) { + pub fn parts(self) -> (Frame, Timestamp) { (self.frame, self.ts) } } @@ -442,15 +449,15 @@ impl CanHeader for FdFrame { #[cfg_attr(feature = "defmt", derive(defmt::Format))] pub struct FdEnvelope { /// Reception time. - #[cfg(feature = "time")] - pub ts: embassy_time::Instant, + pub ts: Timestamp, + /// The actual CAN frame. pub frame: FdFrame, } impl FdEnvelope { /// Convert into a tuple - pub fn parts(self) -> (FdFrame, embassy_time::Instant) { + pub fn parts(self) -> (FdFrame, Timestamp) { (self.frame, self.ts) } } From 25618cd93d5209d864fa250b2077a59532e0bedf Mon Sep 17 00:00:00 2001 From: Corey Schuhen Date: Thu, 28 Mar 2024 09:47:16 +1000 Subject: [PATCH 056/581] RTR fix. --- embassy-stm32/src/can/bx/mod.rs | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/embassy-stm32/src/can/bx/mod.rs b/embassy-stm32/src/can/bx/mod.rs index cb83799d3..cd82148ba 100644 --- a/embassy-stm32/src/can/bx/mod.rs +++ b/embassy-stm32/src/can/bx/mod.rs @@ -624,6 +624,7 @@ impl Registers { }; let rdtr = fifo.rdtr().read(); let data_len = rdtr.dlc(); + let rtr = rir.rtr() == stm32_metapac::can::vals::Rtr::REMOTE; #[cfg(not(feature = "time"))] let ts = rdtr.time(); @@ -632,7 +633,7 @@ impl Registers { data[0..4].copy_from_slice(&fifo.rdlr().read().0.to_ne_bytes()); data[4..8].copy_from_slice(&fifo.rdhr().read().0.to_ne_bytes()); - let frame = Frame::new(Header::new(id, data_len, false), &data).unwrap(); + let frame = Frame::new(Header::new(id, data_len, rtr), &data).unwrap(); let envelope = Envelope { ts, frame }; rfr.modify(|v| v.set_rfom(true)); From f10ee07a905e6627537cbb00d72d6dd35108a949 Mon Sep 17 00:00:00 2001 From: schmettow Date: Thu, 28 Mar 2024 14:35:24 +0100 Subject: [PATCH 057/581] Update embassy_in_the_wild.adoc corrected link to Ystudio project --- docs/modules/ROOT/pages/embassy_in_the_wild.adoc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/docs/modules/ROOT/pages/embassy_in_the_wild.adoc b/docs/modules/ROOT/pages/embassy_in_the_wild.adoc index 75208a883..4b650449f 100644 --- a/docs/modules/ROOT/pages/embassy_in_the_wild.adoc +++ b/docs/modules/ROOT/pages/embassy_in_the_wild.adoc @@ -15,5 +15,5 @@ firmware (RP2040, STM32) for capturing physiological data in behavioural science ** biopotentials (analog ports) ** motion capture (6-axis accelerometers) ** air quality (CO2, Temp, Humidity) -** comes with an app for capturing and visualizing data [link:https://github.com/schmettow/ystudio[Ystudio]] +** comes with an app for capturing and visualizing data [link:https://github.com/schmettow/ystudio-zero[Ystudio]] From 2ea1040e073a54d2a97f75c7d68d0d9a230d15c8 Mon Sep 17 00:00:00 2001 From: Frostie314159 Date: Fri, 22 Mar 2024 08:50:56 +0100 Subject: [PATCH 058/581] Adjusted behavior. --- embassy-time/src/timer.rs | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/embassy-time/src/timer.rs b/embassy-time/src/timer.rs index 763bfdeeb..d6d0a46e2 100644 --- a/embassy-time/src/timer.rs +++ b/embassy-time/src/timer.rs @@ -190,10 +190,10 @@ impl Ticker { self.expires_at = Instant::now() + self.duration; } - /// Reset the ticker to fire for the next time on the deadline. + /// Reset the ticker at the deadline. /// If the deadline is in the past, the ticker will fire instantly. pub fn reset_at(&mut self, deadline: Instant) { - self.expires_at = deadline; + self.expires_at = deadline + self.duration; } /// Resets the ticker, after the specified duration has passed. From a38cbbdc5974fe31f70bffb4fd1995391e4ff331 Mon Sep 17 00:00:00 2001 From: Alexandru Radovici Date: Sat, 30 Mar 2024 22:36:30 +0200 Subject: [PATCH 059/581] fix typo --- embassy-sync/README.md | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/embassy-sync/README.md b/embassy-sync/README.md index c2e13799e..2c1c0cf68 100644 --- a/embassy-sync/README.md +++ b/embassy-sync/README.md @@ -5,7 +5,7 @@ An [Embassy](https://embassy.dev) project. Synchronization primitives and data structures with async support: - [`Channel`](channel::Channel) - A Multiple Producer Multiple Consumer (MPMC) channel. Each message is only received by a single consumer. -- [`PriorityChannel`](channel::priority::PriorityChannel) - A Multiple Producer Multiple Consumer (MPMC) channel. Each message is only received by a single consumer. Higher priority items are sifted to the front of the channel. +- [`PriorityChannel`](channel::priority::PriorityChannel) - A Multiple Producer Multiple Consumer (MPMC) channel. Each message is only received by a single consumer. Higher priority items are shifted to the front of the channel. - [`PubSubChannel`](pubsub::PubSubChannel) - A broadcast channel (publish-subscribe) channel. Each message is received by all consumers. - [`Signal`](signal::Signal) - Signalling latest value to a single consumer. - [`Mutex`](mutex::Mutex) - Mutex for synchronizing state between asynchronous tasks. From f8a6007e1cb3fe9b13db4a56872228155ed8f1cb Mon Sep 17 00:00:00 2001 From: Alex Moon Date: Sat, 30 Mar 2024 22:19:55 -0400 Subject: [PATCH 060/581] Semaphore synchronization primitive This provides both a "greedy" and "fair" async semaphore implementation. --- embassy-sync/src/lib.rs | 1 + embassy-sync/src/semaphore.rs | 704 ++++++++++++++++++++++++++++++++++ 2 files changed, 705 insertions(+) create mode 100644 embassy-sync/src/semaphore.rs diff --git a/embassy-sync/src/lib.rs b/embassy-sync/src/lib.rs index 61b173e80..1873483f9 100644 --- a/embassy-sync/src/lib.rs +++ b/embassy-sync/src/lib.rs @@ -17,6 +17,7 @@ pub mod once_lock; pub mod pipe; pub mod priority_channel; pub mod pubsub; +pub mod semaphore; pub mod signal; pub mod waitqueue; pub mod zerocopy_channel; diff --git a/embassy-sync/src/semaphore.rs b/embassy-sync/src/semaphore.rs new file mode 100644 index 000000000..52c468b4a --- /dev/null +++ b/embassy-sync/src/semaphore.rs @@ -0,0 +1,704 @@ +//! A synchronization primitive for controlling access to a pool of resources. +use core::cell::{Cell, RefCell}; +use core::convert::Infallible; +use core::future::poll_fn; +use core::mem::MaybeUninit; +use core::task::{Poll, Waker}; + +use heapless::Deque; + +use crate::blocking_mutex::raw::RawMutex; +use crate::blocking_mutex::Mutex; +use crate::waitqueue::WakerRegistration; + +/// An asynchronous semaphore. +/// +/// A semaphore tracks a number of permits, typically representing a pool of shared resources. +/// Users can acquire permits to synchronize access to those resources. The semaphore does not +/// contain the resources themselves, only the count of available permits. +pub trait Semaphore: Sized { + /// The error returned when the semaphore is unable to acquire the requested permits. + type Error; + + /// Asynchronously acquire one or more permits from the semaphore. + async fn acquire(&self, permits: usize) -> Result, Self::Error>; + + /// Try to immediately acquire one or more permits from the semaphore. + fn try_acquire(&self, permits: usize) -> Option>; + + /// Asynchronously acquire all permits controlled by the semaphore. + /// + /// This method will wait until at least `min` permits are available, then acquire all available permits + /// from the semaphore. Note that other tasks may have already acquired some permits which could be released + /// back to the semaphore at any time. The number of permits actually acquired may be determined by calling + /// [`SemaphoreReleaser::permits`]. + async fn acquire_all(&self, min: usize) -> Result, Self::Error>; + + /// Try to immediately acquire all available permits from the semaphore, if at least `min` permits are available. + fn try_acquire_all(&self, min: usize) -> Option>; + + /// Release `permits` back to the semaphore, making them available to be acquired. + fn release(&self, permits: usize); + + /// Reset the number of available permints in the semaphore to `permits`. + fn set(&self, permits: usize); +} + +/// A representation of a number of acquired permits. +/// +/// The acquired permits will be released back to the [`Semaphore`] when this is dropped. +pub struct SemaphoreReleaser<'a, S: Semaphore> { + semaphore: &'a S, + permits: usize, +} + +impl<'a, S: Semaphore> Drop for SemaphoreReleaser<'a, S> { + fn drop(&mut self) { + self.semaphore.release(self.permits); + } +} + +impl<'a, S: Semaphore> SemaphoreReleaser<'a, S> { + /// The number of acquired permits. + pub fn permits(&self) -> usize { + self.permits + } + + /// Prevent the acquired permits from being released on drop. + /// + /// Returns the number of acquired permits. + pub fn disarm(self) -> usize { + let permits = self.permits; + core::mem::forget(self); + permits + } +} + +/// A greedy [`Semaphore`] implementation. +/// +/// Tasks can acquire permits as soon as they become available, even if another task +/// is waiting on a larger number of permits. +pub struct GreedySemaphore { + state: Mutex>, +} + +impl Default for GreedySemaphore { + fn default() -> Self { + Self::new(0) + } +} + +impl GreedySemaphore { + /// Create a new `Semaphore`. + pub const fn new(permits: usize) -> Self { + Self { + state: Mutex::new(Cell::new(SemaphoreState { + permits, + waker: WakerRegistration::new(), + })), + } + } + + #[cfg(test)] + fn permits(&self) -> usize { + self.state.lock(|cell| { + let state = cell.replace(SemaphoreState::EMPTY); + let permits = state.permits; + cell.replace(state); + permits + }) + } + + fn poll_acquire( + &self, + permits: usize, + acquire_all: bool, + waker: Option<&Waker>, + ) -> Poll, Infallible>> { + self.state.lock(|cell| { + let mut state = cell.replace(SemaphoreState::EMPTY); + if let Some(permits) = state.take(permits, acquire_all) { + cell.set(state); + Poll::Ready(Ok(SemaphoreReleaser { + semaphore: self, + permits, + })) + } else { + if let Some(waker) = waker { + state.register(waker); + } + cell.set(state); + Poll::Pending + } + }) + } +} + +impl Semaphore for GreedySemaphore { + type Error = Infallible; + + async fn acquire(&self, permits: usize) -> Result, Self::Error> { + poll_fn(|cx| self.poll_acquire(permits, false, Some(cx.waker()))).await + } + + fn try_acquire(&self, permits: usize) -> Option> { + match self.poll_acquire(permits, false, None) { + Poll::Ready(Ok(n)) => Some(n), + _ => None, + } + } + + async fn acquire_all(&self, min: usize) -> Result, Self::Error> { + poll_fn(|cx| self.poll_acquire(min, true, Some(cx.waker()))).await + } + + fn try_acquire_all(&self, min: usize) -> Option> { + match self.poll_acquire(min, true, None) { + Poll::Ready(Ok(n)) => Some(n), + _ => None, + } + } + + fn release(&self, permits: usize) { + if permits > 0 { + self.state.lock(|cell| { + let mut state = cell.replace(SemaphoreState::EMPTY); + state.permits += permits; + state.wake(); + cell.set(state); + }); + } + } + + fn set(&self, permits: usize) { + self.state.lock(|cell| { + let mut state = cell.replace(SemaphoreState::EMPTY); + if permits > state.permits { + state.wake(); + } + state.permits = permits; + cell.set(state); + }); + } +} + +struct SemaphoreState { + permits: usize, + waker: WakerRegistration, +} + +impl SemaphoreState { + const EMPTY: SemaphoreState = SemaphoreState { + permits: 0, + waker: WakerRegistration::new(), + }; + + fn register(&mut self, w: &Waker) { + self.waker.register(w); + } + + fn take(&mut self, mut permits: usize, acquire_all: bool) -> Option { + if self.permits < permits { + None + } else { + if acquire_all { + permits = self.permits; + } + self.permits -= permits; + Some(permits) + } + } + + fn wake(&mut self) { + self.waker.wake(); + } +} + +/// A fair [`Semaphore`] implementation. +/// +/// Tasks are allowed to acquire permits in FIFO order. A task waiting to acquire +/// a large number of permits will prevent other tasks from acquiring any permits +/// until its request is satisfied. +/// +/// Up to `N` tasks may attempt to acquire permits concurrently. If additional +/// tasks attempt to acquire a permit, a [`WaitQueueFull`] error will be returned. +pub struct FairSemaphore +where + M: RawMutex, +{ + state: Mutex>>, +} + +impl Default for FairSemaphore +where + M: RawMutex, +{ + fn default() -> Self { + Self::new(0) + } +} + +impl FairSemaphore +where + M: RawMutex, +{ + /// Create a new `FairSemaphore`. + pub const fn new(permits: usize) -> Self { + Self { + state: Mutex::new(RefCell::new(FairSemaphoreState::new(permits))), + } + } + + #[cfg(test)] + fn permits(&self) -> usize { + self.state.lock(|cell| cell.borrow().permits) + } + + fn poll_acquire( + &self, + permits: usize, + acquire_all: bool, + cx: Option<(&Cell>, &Waker)>, + ) -> Poll, WaitQueueFull>> { + let ticket = cx.as_ref().map(|(cell, _)| cell.get()).unwrap_or(None); + self.state.lock(|cell| { + let mut state = cell.borrow_mut(); + if let Some(permits) = state.take(ticket, permits, acquire_all) { + Poll::Ready(Ok(SemaphoreReleaser { + semaphore: self, + permits, + })) + } else if let Some((cell, waker)) = cx { + match state.register(ticket, waker) { + Ok(ticket) => { + cell.set(Some(ticket)); + Poll::Pending + } + Err(err) => Poll::Ready(Err(err)), + } + } else { + Poll::Pending + } + }) + } +} + +/// An error indicating the [`FairSemaphore`]'s wait queue is full. +#[derive(Debug, Clone, Copy, PartialEq, Eq)] +#[cfg_attr(feature = "defmt", derive(defmt::Format))] +pub struct WaitQueueFull; + +impl Semaphore for FairSemaphore { + type Error = WaitQueueFull; + + async fn acquire(&self, permits: usize) -> Result, Self::Error> { + let ticket = Cell::new(None); + let _guard = OnDrop::new(|| self.state.lock(|cell| cell.borrow_mut().cancel(ticket.get()))); + poll_fn(|cx| self.poll_acquire(permits, false, Some((&ticket, cx.waker())))).await + } + + fn try_acquire(&self, permits: usize) -> Option> { + match self.poll_acquire(permits, false, None) { + Poll::Ready(Ok(x)) => Some(x), + _ => None, + } + } + + async fn acquire_all(&self, min: usize) -> Result, Self::Error> { + let ticket = Cell::new(None); + let _guard = OnDrop::new(|| self.state.lock(|cell| cell.borrow_mut().cancel(ticket.get()))); + poll_fn(|cx| self.poll_acquire(min, true, Some((&ticket, cx.waker())))).await + } + + fn try_acquire_all(&self, min: usize) -> Option> { + match self.poll_acquire(min, true, None) { + Poll::Ready(Ok(x)) => Some(x), + _ => None, + } + } + + fn release(&self, permits: usize) { + if permits > 0 { + self.state.lock(|cell| { + let mut state = cell.borrow_mut(); + state.permits += permits; + state.wake(); + }); + } + } + + fn set(&self, permits: usize) { + self.state.lock(|cell| { + let mut state = cell.borrow_mut(); + if permits > state.permits { + state.wake(); + } + state.permits = permits; + }); + } +} + +struct FairSemaphoreState { + permits: usize, + next_ticket: usize, + wakers: Deque, N>, +} + +impl FairSemaphoreState { + /// Create a new empty instance + const fn new(permits: usize) -> Self { + Self { + permits, + next_ticket: 0, + wakers: Deque::new(), + } + } + + /// Register a waker. If the queue is full the function returns an error + fn register(&mut self, ticket: Option, w: &Waker) -> Result { + self.pop_canceled(); + + match ticket { + None => { + let ticket = self.next_ticket.wrapping_add(self.wakers.len()); + self.wakers.push_back(Some(w.clone())).or(Err(WaitQueueFull))?; + Ok(ticket) + } + Some(ticket) => { + self.set_waker(ticket, Some(w.clone())); + Ok(ticket) + } + } + } + + fn cancel(&mut self, ticket: Option) { + if let Some(ticket) = ticket { + self.set_waker(ticket, None); + } + } + + fn set_waker(&mut self, ticket: usize, waker: Option) { + let i = ticket.wrapping_sub(self.next_ticket); + if i < self.wakers.len() { + let (a, b) = self.wakers.as_mut_slices(); + let x = if i < a.len() { &mut a[i] } else { &mut b[i - a.len()] }; + *x = waker; + } + } + + fn take(&mut self, ticket: Option, mut permits: usize, acquire_all: bool) -> Option { + self.pop_canceled(); + + if permits > self.permits { + return None; + } + + match ticket { + Some(n) if n != self.next_ticket => return None, + None if !self.wakers.is_empty() => return None, + _ => (), + } + + if acquire_all { + permits = self.permits; + } + self.permits -= permits; + + if ticket.is_some() { + self.pop(); + } + + Some(permits) + } + + fn pop_canceled(&mut self) { + while let Some(None) = self.wakers.front() { + self.pop(); + } + } + + /// Panics if `self.wakers` is empty + fn pop(&mut self) { + self.wakers.pop_front().unwrap(); + self.next_ticket = self.next_ticket.wrapping_add(1); + } + + fn wake(&mut self) { + self.pop_canceled(); + + if let Some(Some(waker)) = self.wakers.front() { + waker.wake_by_ref(); + } + } +} + +/// A type to delay the drop handler invocation. +#[must_use = "to delay the drop handler invocation to the end of the scope"] +struct OnDrop { + f: MaybeUninit, +} + +impl OnDrop { + /// Create a new instance. + pub fn new(f: F) -> Self { + Self { f: MaybeUninit::new(f) } + } +} + +impl Drop for OnDrop { + fn drop(&mut self) { + unsafe { self.f.as_ptr().read()() } + } +} + +#[cfg(test)] +mod tests { + mod greedy { + use core::pin::pin; + + use futures_util::poll; + + use super::super::*; + use crate::blocking_mutex::raw::NoopRawMutex; + + #[test] + fn try_acquire() { + let semaphore = GreedySemaphore::::new(3); + + let a = semaphore.try_acquire(1).unwrap(); + assert_eq!(a.permits(), 1); + assert_eq!(semaphore.permits(), 2); + + core::mem::drop(a); + assert_eq!(semaphore.permits(), 3); + } + + #[test] + fn disarm() { + let semaphore = GreedySemaphore::::new(3); + + let a = semaphore.try_acquire(1).unwrap(); + assert_eq!(a.disarm(), 1); + assert_eq!(semaphore.permits(), 2); + } + + #[futures_test::test] + async fn acquire() { + let semaphore = GreedySemaphore::::new(3); + + let a = semaphore.acquire(1).await.unwrap(); + assert_eq!(a.permits(), 1); + assert_eq!(semaphore.permits(), 2); + + core::mem::drop(a); + assert_eq!(semaphore.permits(), 3); + } + + #[test] + fn try_acquire_all() { + let semaphore = GreedySemaphore::::new(3); + + let a = semaphore.try_acquire_all(1).unwrap(); + assert_eq!(a.permits(), 3); + assert_eq!(semaphore.permits(), 0); + } + + #[futures_test::test] + async fn acquire_all() { + let semaphore = GreedySemaphore::::new(3); + + let a = semaphore.acquire_all(1).await.unwrap(); + assert_eq!(a.permits(), 3); + assert_eq!(semaphore.permits(), 0); + } + + #[test] + fn release() { + let semaphore = GreedySemaphore::::new(3); + assert_eq!(semaphore.permits(), 3); + semaphore.release(2); + assert_eq!(semaphore.permits(), 5); + } + + #[test] + fn set() { + let semaphore = GreedySemaphore::::new(3); + assert_eq!(semaphore.permits(), 3); + semaphore.set(2); + assert_eq!(semaphore.permits(), 2); + } + + #[test] + fn contested() { + let semaphore = GreedySemaphore::::new(3); + + let a = semaphore.try_acquire(1).unwrap(); + let b = semaphore.try_acquire(3); + assert!(b.is_none()); + + core::mem::drop(a); + + let b = semaphore.try_acquire(3); + assert!(b.is_some()); + } + + #[futures_test::test] + async fn greedy() { + let semaphore = GreedySemaphore::::new(3); + + let a = semaphore.try_acquire(1).unwrap(); + + let b_fut = semaphore.acquire(3); + let mut b_fut = pin!(b_fut); + let b = poll!(b_fut.as_mut()); + assert!(b.is_pending()); + + // Succeed even through `b` is waiting + let c = semaphore.try_acquire(1); + assert!(c.is_some()); + + let b = poll!(b_fut.as_mut()); + assert!(b.is_pending()); + + core::mem::drop(a); + + let b = poll!(b_fut.as_mut()); + assert!(b.is_pending()); + + core::mem::drop(c); + + let b = poll!(b_fut.as_mut()); + assert!(b.is_ready()); + } + } + + mod fair { + use core::pin::pin; + + use futures_util::poll; + + use super::super::*; + use crate::blocking_mutex::raw::NoopRawMutex; + + #[test] + fn try_acquire() { + let semaphore = FairSemaphore::::new(3); + + let a = semaphore.try_acquire(1).unwrap(); + assert_eq!(a.permits(), 1); + assert_eq!(semaphore.permits(), 2); + + core::mem::drop(a); + assert_eq!(semaphore.permits(), 3); + } + + #[test] + fn disarm() { + let semaphore = FairSemaphore::::new(3); + + let a = semaphore.try_acquire(1).unwrap(); + assert_eq!(a.disarm(), 1); + assert_eq!(semaphore.permits(), 2); + } + + #[futures_test::test] + async fn acquire() { + let semaphore = FairSemaphore::::new(3); + + let a = semaphore.acquire(1).await.unwrap(); + assert_eq!(a.permits(), 1); + assert_eq!(semaphore.permits(), 2); + + core::mem::drop(a); + assert_eq!(semaphore.permits(), 3); + } + + #[test] + fn try_acquire_all() { + let semaphore = FairSemaphore::::new(3); + + let a = semaphore.try_acquire_all(1).unwrap(); + assert_eq!(a.permits(), 3); + assert_eq!(semaphore.permits(), 0); + } + + #[futures_test::test] + async fn acquire_all() { + let semaphore = FairSemaphore::::new(3); + + let a = semaphore.acquire_all(1).await.unwrap(); + assert_eq!(a.permits(), 3); + assert_eq!(semaphore.permits(), 0); + } + + #[test] + fn release() { + let semaphore = FairSemaphore::::new(3); + assert_eq!(semaphore.permits(), 3); + semaphore.release(2); + assert_eq!(semaphore.permits(), 5); + } + + #[test] + fn set() { + let semaphore = FairSemaphore::::new(3); + assert_eq!(semaphore.permits(), 3); + semaphore.set(2); + assert_eq!(semaphore.permits(), 2); + } + + #[test] + fn contested() { + let semaphore = FairSemaphore::::new(3); + + let a = semaphore.try_acquire(1).unwrap(); + let b = semaphore.try_acquire(3); + assert!(b.is_none()); + + core::mem::drop(a); + + let b = semaphore.try_acquire(3); + assert!(b.is_some()); + } + + #[futures_test::test] + async fn fairness() { + let semaphore = FairSemaphore::::new(3); + + let a = semaphore.try_acquire(1); + assert!(a.is_some()); + + let b_fut = semaphore.acquire(3); + let mut b_fut = pin!(b_fut); + let b = poll!(b_fut.as_mut()); // Poll `b_fut` once so it is registered + assert!(b.is_pending()); + + let c = semaphore.try_acquire(1); + assert!(c.is_none()); + + let c_fut = semaphore.acquire(1); + let mut c_fut = pin!(c_fut); + let c = poll!(c_fut.as_mut()); // Poll `c_fut` once so it is registered + assert!(c.is_pending()); // `c` is blocked behind `b` + + let d = semaphore.acquire(1).await; + assert!(matches!(d, Err(WaitQueueFull))); + + core::mem::drop(a); + + let c = poll!(c_fut.as_mut()); + assert!(c.is_pending()); // `c` is still blocked behind `b` + + let b = poll!(b_fut.as_mut()); + assert!(b.is_ready()); + + let c = poll!(c_fut.as_mut()); + assert!(c.is_pending()); // `c` is still blocked behind `b` + + core::mem::drop(b); + + let c = poll!(c_fut.as_mut()); + assert!(c.is_ready()); + } + } +} From a2f9aa592ec61beb247065003016515f0d423c13 Mon Sep 17 00:00:00 2001 From: Frostie314159 Date: Sun, 31 Mar 2024 15:07:01 +0200 Subject: [PATCH 061/581] Made Ticker::next Send+Sync. --- embassy-time/src/timer.rs | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/embassy-time/src/timer.rs b/embassy-time/src/timer.rs index 574d715da..a123c1d01 100644 --- a/embassy-time/src/timer.rs +++ b/embassy-time/src/timer.rs @@ -185,7 +185,7 @@ impl Ticker { } /// Waits for the next tick. - pub fn next(&mut self) -> impl Future + '_ { + pub fn next(&mut self) -> impl Future + Send + Sync + '_ { poll_fn(|cx| { if self.expires_at <= Instant::now() { let dur = self.duration; From cb01d0383523af4b9f80c4bdc4410791eba1173e Mon Sep 17 00:00:00 2001 From: Tyler Gilbert Date: Sun, 31 Mar 2024 16:31:47 -0500 Subject: [PATCH 062/581] Add async stop() function to stm32 bdma_dma --- embassy-stm32/src/dma/dma_bdma.rs | 63 ++++++++++++++++++++++++++++++- 1 file changed, 62 insertions(+), 1 deletion(-) diff --git a/embassy-stm32/src/dma/dma_bdma.rs b/embassy-stm32/src/dma/dma_bdma.rs index 7b5b3cf58..a6344cf06 100644 --- a/embassy-stm32/src/dma/dma_bdma.rs +++ b/embassy-stm32/src/dma/dma_bdma.rs @@ -1,4 +1,4 @@ -use core::future::Future; +use core::future::{poll_fn, Future}; use core::pin::Pin; use core::sync::atomic::{fence, AtomicUsize, Ordering}; use core::task::{Context, Poll, Waker}; @@ -510,6 +510,31 @@ impl AnyChannel { DmaInfo::Bdma(r) => r.ch(info.num).ndtr().read().ndt(), } } + + fn disable_circular_mode(&self) { + let info = self.info(); + match self.info().dma { + #[cfg(dma)] + DmaInfo::Dma(regs) => regs.st(info.num).cr().modify(|w| { + w.set_circ(false); + }), + #[cfg(bdma)] + DmaInfo::Bdma(regs) => regs.ch(info.num).cr().modify(|w| { + w.set_circ(false); + }), + } + } + + fn poll_stop(&self) -> Poll<()> { + use core::sync::atomic::compiler_fence; + compiler_fence(Ordering::SeqCst); + + if !self.is_running() { + Poll::Ready(()) + } else { + Poll::Pending + } + } } /// DMA transfer. @@ -829,6 +854,25 @@ impl<'a, W: Word> ReadableRingBuffer<'a, W> { pub fn is_running(&mut self) -> bool { self.channel.is_running() } + + /// Stop the DMA transfer and await until the buffer is full. + /// + /// This disables the DMA transfer's circular mode so that the transfer + /// stops when the buffer is full. + /// + /// This is designed to be used with streaming input data such as the + /// I2S/SAI or ADC. + /// + /// When using the UART, you probably want `request_stop()`. + pub async fn stop(&mut self) { + self.channel.disable_circular_mode(); + //wait until cr.susp reads as true + poll_fn(|cx| { + self.set_waker(cx.waker()); + self.channel.poll_stop() + }) + .await + } } impl<'a, W: Word> Drop for ReadableRingBuffer<'a, W> { @@ -940,6 +984,23 @@ impl<'a, W: Word> WritableRingBuffer<'a, W> { pub fn is_running(&mut self) -> bool { self.channel.is_running() } + + /// Stop the DMA transfer and await until the buffer is empty. + /// + /// This disables the DMA transfer's circular mode so that the transfer + /// stops when all available data has been written. + /// + /// This is designed to be used with streaming output data such as the + /// I2S/SAI or DAC. + pub async fn stop(&mut self) { + self.channel.disable_circular_mode(); + //wait until cr.susp reads as true + poll_fn(|cx| { + self.set_waker(cx.waker()); + self.channel.poll_stop() + }) + .await + } } impl<'a, W: Word> Drop for WritableRingBuffer<'a, W> { From c8936edb6c13eb099dfb31a4a51be2dd3bb4661e Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Tue, 2 Apr 2024 01:29:52 +0200 Subject: [PATCH 063/581] stm32/can: simplify bxcan api, merging bx::* into the main structs. The bx::* separate structs (Can, Rx, Tx) and separate `Instance` trait are a relic from the `bxcan` crate. Remove them, move the functionality into the main structs. --- embassy-stm32/src/can/bx/mod.rs | 1010 ----------------- embassy-stm32/src/can/{bx => bxcan}/filter.rs | 2 +- .../src/can/{bxcan.rs => bxcan/mod.rs} | 344 ++++-- embassy-stm32/src/can/bxcan/registers.rs | 510 +++++++++ embassy-stm32/src/can/common.rs | 4 +- embassy-stm32/src/can/fdcan.rs | 34 +- embassy-stm32/src/can/mod.rs | 9 +- examples/stm32f1/src/bin/can.rs | 13 +- examples/stm32f4/src/bin/can.rs | 11 +- examples/stm32f7/src/bin/can.rs | 12 +- tests/stm32/src/bin/can.rs | 19 +- 11 files changed, 808 insertions(+), 1160 deletions(-) delete mode 100644 embassy-stm32/src/can/bx/mod.rs rename embassy-stm32/src/can/{bx => bxcan}/filter.rs (99%) rename embassy-stm32/src/can/{bxcan.rs => bxcan/mod.rs} (68%) create mode 100644 embassy-stm32/src/can/bxcan/registers.rs diff --git a/embassy-stm32/src/can/bx/mod.rs b/embassy-stm32/src/can/bx/mod.rs deleted file mode 100644 index cd82148ba..000000000 --- a/embassy-stm32/src/can/bx/mod.rs +++ /dev/null @@ -1,1010 +0,0 @@ -//! Driver for the STM32 bxCAN peripheral. -//! -//! This crate provides a reusable driver for the bxCAN peripheral found in many low- to middle-end -//! STM32 microcontrollers. HALs for compatible chips can reexport this crate and implement its -//! traits to easily expose a featureful CAN driver. -//! -//! # Features -//! -//! - Supports both single- and dual-peripheral configurations (where one bxCAN instance manages the -//! filters of a secondary instance). -//! - Handles standard and extended frames, and data and remote frames. -//! - Support for interrupts emitted by the bxCAN peripheral. -//! - Transmission respects CAN IDs and protects against priority inversion (a lower-priority frame -//! may be dequeued when enqueueing a higher-priority one). -//! - Implements the [`embedded-hal`] traits for interoperability. -//! - Support for both RX FIFOs (as [`Rx0`] and [`Rx1`]). -//! -//! # Limitations -//! -//! - Support for querying error states and handling error interrupts is incomplete. -//! - -// Deny a few warnings in doctests, since rustdoc `allow`s many warnings by default -#![allow(clippy::unnecessary_operation)] // lint is bugged - -//mod embedded_hal; -pub mod filter; - -#[allow(clippy::all)] // generated code -use core::cmp::{Ord, Ordering}; -use core::convert::Infallible; -use core::marker::PhantomData; -use core::mem; - -pub use embedded_can::{ExtendedId, Id, StandardId}; - -/// CAN Header: includes ID and length -pub type Header = crate::can::frame::Header; - -/// Data for a CAN Frame -pub type Data = crate::can::frame::ClassicData; - -use crate::can::_version::Envelope; -use crate::can::bx::filter::MasterFilters; -use crate::can::enums::BusError; -/// CAN Frame -pub use crate::can::frame::Frame; -use crate::pac::can::vals::Lec; - -#[derive(Debug, Copy, Clone, Eq, PartialEq)] -pub(crate) enum RxFifo { - Fifo0, - Fifo1, -} - -trait IntoBusError { - fn into_bus_err(self) -> Option; -} - -impl IntoBusError for Lec { - fn into_bus_err(self) -> Option { - match self { - Lec::STUFF => Some(BusError::Stuff), - Lec::FORM => Some(BusError::Form), - Lec::ACK => Some(BusError::Acknowledge), - Lec::BITRECESSIVE => Some(BusError::BitRecessive), - Lec::BITDOMINANT => Some(BusError::BitDominant), - Lec::CRC => Some(BusError::Crc), - Lec::CUSTOM => Some(BusError::Software), - _ => None, - } - } -} - -/// A bxCAN peripheral instance. -/// -/// This trait is meant to be implemented for a HAL-specific type that represent ownership of -/// the CAN peripheral (and any pins required by it, although that is entirely up to the HAL). -/// -/// # Safety -/// -/// It is only safe to implement this trait, when: -/// -/// * The implementing type has ownership of the peripheral, preventing any other accesses to the -/// register block. -/// * `REGISTERS` is a pointer to that peripheral's register block and can be safely accessed for as -/// long as ownership or a borrow of the implementing type is present. -pub unsafe trait Instance {} - -/// A bxCAN instance that owns filter banks. -/// -/// In master-slave-instance setups, only the master instance owns the filter banks, and needs to -/// split some of them off for use by the slave instance. In that case, the master instance should -/// implement [`FilterOwner`] and [`MasterInstance`], while the slave instance should only implement -/// [`Instance`]. -/// -/// In single-instance configurations, the instance owns all filter banks and they can not be split -/// off. In that case, the instance should implement [`Instance`] and [`FilterOwner`]. -/// -/// # Safety -/// -/// This trait must only be implemented if the instance does, in fact, own its associated filter -/// banks, and `NUM_FILTER_BANKS` must be correct. -pub unsafe trait FilterOwner: Instance { - /// The total number of filter banks available to the instance. - /// - /// This is usually either 14 or 28, and should be specified in the chip's reference manual or datasheet. - const NUM_FILTER_BANKS: u8; -} - -/// A bxCAN master instance that shares filter banks with a slave instance. -/// -/// In master-slave-instance setups, this trait should be implemented for the master instance. -/// -/// # Safety -/// -/// This trait must only be implemented when there is actually an associated slave instance. -pub unsafe trait MasterInstance: FilterOwner {} - -// TODO: what to do with these? -/* -#[derive(Debug, Copy, Clone, Eq, PartialEq, Format)] -pub enum Error { - Stuff, - Form, - Acknowledgement, - BitRecessive, - BitDominant, - Crc, - Software, -}*/ - -/// Error that indicates that an incoming message has been lost due to buffer overrun. -#[derive(Debug, Clone, Copy, PartialEq, Eq)] -#[cfg_attr(feature = "defmt", derive(defmt::Format))] -pub struct OverrunError { - _priv: (), -} - -/// Identifier of a CAN message. -/// -/// Can be either a standard identifier (11bit, Range: 0..0x3FF) or a -/// extendended identifier (29bit , Range: 0..0x1FFFFFFF). -/// -/// The `Ord` trait can be used to determine the frame’s priority this ID -/// belongs to. -/// Lower identifier values have a higher priority. Additionally standard frames -/// have a higher priority than extended frames and data frames have a higher -/// priority than remote frames. -#[derive(Clone, Copy, Debug, PartialEq, Eq)] -#[cfg_attr(feature = "defmt", derive(defmt::Format))] -pub(crate) struct IdReg(u32); - -impl IdReg { - const STANDARD_SHIFT: u32 = 21; - - const EXTENDED_SHIFT: u32 = 3; - - const IDE_MASK: u32 = 0x0000_0004; - - const RTR_MASK: u32 = 0x0000_0002; - - /// Creates a new standard identifier (11bit, Range: 0..0x7FF) - /// - /// Panics for IDs outside the allowed range. - fn new_standard(id: StandardId) -> Self { - Self(u32::from(id.as_raw()) << Self::STANDARD_SHIFT) - } - - /// Creates a new extendended identifier (29bit , Range: 0..0x1FFFFFFF). - /// - /// Panics for IDs outside the allowed range. - fn new_extended(id: ExtendedId) -> IdReg { - Self(id.as_raw() << Self::EXTENDED_SHIFT | Self::IDE_MASK) - } - - fn from_register(reg: u32) -> IdReg { - Self(reg & 0xFFFF_FFFE) - } - - /// Returns the identifier. - fn to_id(self) -> Id { - if self.is_extended() { - Id::Extended(unsafe { ExtendedId::new_unchecked(self.0 >> Self::EXTENDED_SHIFT) }) - } else { - Id::Standard(unsafe { StandardId::new_unchecked((self.0 >> Self::STANDARD_SHIFT) as u16) }) - } - } - - /// Returns the identifier. - fn id(self) -> embedded_can::Id { - if self.is_extended() { - embedded_can::ExtendedId::new(self.0 >> Self::EXTENDED_SHIFT) - .unwrap() - .into() - } else { - embedded_can::StandardId::new((self.0 >> Self::STANDARD_SHIFT) as u16) - .unwrap() - .into() - } - } - - /// Returns `true` if the identifier is an extended identifier. - fn is_extended(self) -> bool { - self.0 & Self::IDE_MASK != 0 - } - - /// Returns `true` if the identifer is part of a remote frame (RTR bit set). - fn rtr(self) -> bool { - self.0 & Self::RTR_MASK != 0 - } -} - -impl From<&embedded_can::Id> for IdReg { - fn from(eid: &embedded_can::Id) -> Self { - match eid { - embedded_can::Id::Standard(id) => IdReg::new_standard(StandardId::new(id.as_raw()).unwrap()), - embedded_can::Id::Extended(id) => IdReg::new_extended(ExtendedId::new(id.as_raw()).unwrap()), - } - } -} - -impl From for embedded_can::Id { - fn from(idr: IdReg) -> Self { - idr.id() - } -} - -/// `IdReg` is ordered by priority. -impl Ord for IdReg { - fn cmp(&self, other: &Self) -> Ordering { - // When the IDs match, data frames have priority over remote frames. - let rtr = self.rtr().cmp(&other.rtr()).reverse(); - - let id_a = self.to_id(); - let id_b = other.to_id(); - match (id_a, id_b) { - (Id::Standard(a), Id::Standard(b)) => { - // Lower IDs have priority over higher IDs. - a.as_raw().cmp(&b.as_raw()).reverse().then(rtr) - } - (Id::Extended(a), Id::Extended(b)) => a.as_raw().cmp(&b.as_raw()).reverse().then(rtr), - (Id::Standard(a), Id::Extended(b)) => { - // Standard frames have priority over extended frames if their Base IDs match. - a.as_raw() - .cmp(&b.standard_id().as_raw()) - .reverse() - .then(Ordering::Greater) - } - (Id::Extended(a), Id::Standard(b)) => { - a.standard_id().as_raw().cmp(&b.as_raw()).reverse().then(Ordering::Less) - } - } - } -} - -impl PartialOrd for IdReg { - fn partial_cmp(&self, other: &Self) -> Option { - Some(self.cmp(other)) - } -} - -pub(crate) struct Registers { - pub canregs: crate::pac::can::Can, -} - -impl Registers { - fn enter_init_mode(&mut self) { - self.canregs.mcr().modify(|reg| { - reg.set_sleep(false); - reg.set_inrq(true); - }); - loop { - let msr = self.canregs.msr().read(); - if !msr.slak() && msr.inak() { - break; - } - } - } - - // Leaves initialization mode, enters sleep mode. - fn leave_init_mode(&mut self) { - self.canregs.mcr().modify(|reg| { - reg.set_sleep(true); - reg.set_inrq(false); - }); - loop { - let msr = self.canregs.msr().read(); - if msr.slak() && !msr.inak() { - break; - } - } - } - - fn set_bit_timing(&mut self, bt: crate::can::util::NominalBitTiming) { - let prescaler = u16::from(bt.prescaler) & 0x1FF; - let seg1 = u8::from(bt.seg1); - let seg2 = u8::from(bt.seg2) & 0x7F; - let sync_jump_width = u8::from(bt.sync_jump_width) & 0x7F; - self.canregs.btr().modify(|reg| { - reg.set_brp(prescaler - 1); - reg.set_ts(0, seg1 - 1); - reg.set_ts(1, seg2 - 1); - reg.set_sjw(sync_jump_width - 1); - }); - } - - /// Enables or disables silent mode: Disconnects the TX signal from the pin. - pub fn set_silent(&self, enabled: bool) { - let mode = match enabled { - false => stm32_metapac::can::vals::Silm::NORMAL, - true => stm32_metapac::can::vals::Silm::SILENT, - }; - self.canregs.btr().modify(|reg| reg.set_silm(mode)); - } - - /// Enables or disables automatic retransmission of messages. - /// - /// If this is enabled, the CAN peripheral will automatically try to retransmit each frame - /// until it can be sent. Otherwise, it will try only once to send each frame. - /// - /// Automatic retransmission is enabled by default. - pub fn set_automatic_retransmit(&self, enabled: bool) { - self.canregs.mcr().modify(|reg| reg.set_nart(enabled)); - } - - /// Enables or disables loopback mode: Internally connects the TX and RX - /// signals together. - pub fn set_loopback(&self, enabled: bool) { - self.canregs.btr().modify(|reg| reg.set_lbkm(enabled)); - } - - /// Configures the automatic wake-up feature. - /// - /// This is turned off by default. - /// - /// When turned on, an incoming frame will cause the peripheral to wake up from sleep and - /// receive the frame. If enabled, [`Interrupt::Wakeup`] will also be triggered by the incoming - /// frame. - #[allow(dead_code)] - pub fn set_automatic_wakeup(&mut self, enabled: bool) { - self.canregs.mcr().modify(|reg| reg.set_awum(enabled)); - } - - /// Leaves initialization mode and enables the peripheral (non-blocking version). - /// - /// Usually, it is recommended to call [`CanConfig::enable`] instead. This method is only needed - /// if you want non-blocking initialization. - /// - /// If this returns [`WouldBlock`][nb::Error::WouldBlock], the peripheral will enable itself - /// in the background. The peripheral is enabled and ready to use when this method returns - /// successfully. - pub fn enable_non_blocking(&mut self) -> nb::Result<(), Infallible> { - let msr = self.canregs.msr().read(); - if msr.slak() { - self.canregs.mcr().modify(|reg| { - reg.set_abom(true); - reg.set_sleep(false); - }); - Err(nb::Error::WouldBlock) - } else { - Ok(()) - } - } - - /// Puts the peripheral in a sleep mode to save power. - /// - /// While in sleep mode, an incoming CAN frame will trigger [`Interrupt::Wakeup`] if enabled. - #[allow(dead_code)] - pub fn sleep(&mut self) { - self.canregs.mcr().modify(|reg| { - reg.set_sleep(true); - reg.set_inrq(false); - }); - loop { - let msr = self.canregs.msr().read(); - if msr.slak() && !msr.inak() { - break; - } - } - } - - /// Disables the CAN interface. - /// - /// The peripheral is disabled by setting `RESET` in `CAN_MCR`, which causes the peripheral to - /// enter sleep mode. - pub fn reset(&self) { - self.canregs.mcr().write(|reg| reg.set_reset(true)); - } - - /// Wakes up from sleep mode. - /// - /// Note that this will not trigger [`Interrupt::Wakeup`], only reception of an incoming CAN - /// frame will cause that interrupt. - #[allow(dead_code)] - pub fn wakeup(&mut self) { - self.canregs.mcr().modify(|reg| { - reg.set_sleep(false); - reg.set_inrq(false); - }); - loop { - let msr = self.canregs.msr().read(); - if !msr.slak() && !msr.inak() { - break; - } - } - } - - pub fn curr_error(&self) -> Option { - let err = { self.canregs.esr().read() }; - if err.boff() { - return Some(BusError::BusOff); - } else if err.epvf() { - return Some(BusError::BusPassive); - } else if err.ewgf() { - return Some(BusError::BusWarning); - } else if let Some(err) = err.lec().into_bus_err() { - return Some(err); - } - None - } - - /// Puts a CAN frame in a transmit mailbox for transmission on the bus. - /// - /// Frames are transmitted to the bus based on their priority (see [`FramePriority`]). - /// Transmit order is preserved for frames with identical priority. - /// - /// If all transmit mailboxes are full, and `frame` has a higher priority than the - /// lowest-priority message in the transmit mailboxes, transmission of the enqueued frame is - /// cancelled and `frame` is enqueued instead. The frame that was replaced is returned as - /// [`TransmitStatus::dequeued_frame`]. - pub fn transmit(&mut self, frame: &Frame) -> nb::Result { - // Get the index of the next free mailbox or the one with the lowest priority. - let tsr = self.canregs.tsr().read(); - let idx = tsr.code() as usize; - - let frame_is_pending = !tsr.tme(0) || !tsr.tme(1) || !tsr.tme(2); - let pending_frame = if frame_is_pending { - // High priority frames are transmitted first by the mailbox system. - // Frames with identical identifier shall be transmitted in FIFO order. - // The controller schedules pending frames of same priority based on the - // mailbox index instead. As a workaround check all pending mailboxes - // and only accept higher priority frames. - self.check_priority(0, frame.id().into())?; - self.check_priority(1, frame.id().into())?; - self.check_priority(2, frame.id().into())?; - - let all_frames_are_pending = !tsr.tme(0) && !tsr.tme(1) && !tsr.tme(2); - if all_frames_are_pending { - // No free mailbox is available. This can only happen when three frames with - // ascending priority (descending IDs) were requested for transmission and all - // of them are blocked by bus traffic with even higher priority. - // To prevent a priority inversion abort and replace the lowest priority frame. - self.read_pending_mailbox(idx) - } else { - // There was a free mailbox. - None - } - } else { - // All mailboxes are available: Send frame without performing any checks. - None - }; - - self.write_mailbox(idx, frame); - - let mailbox = match idx { - 0 => Mailbox::Mailbox0, - 1 => Mailbox::Mailbox1, - 2 => Mailbox::Mailbox2, - _ => unreachable!(), - }; - Ok(TransmitStatus { - dequeued_frame: pending_frame, - mailbox, - }) - } - - /// Returns `Ok` when the mailbox is free or if it contains pending frame with a - /// lower priority (higher ID) than the identifier `id`. - fn check_priority(&self, idx: usize, id: IdReg) -> nb::Result<(), Infallible> { - // Read the pending frame's id to check its priority. - assert!(idx < 3); - let tir = &self.canregs.tx(idx).tir().read(); - //let tir = &can.tx[idx].tir.read(); - - // Check the priority by comparing the identifiers. But first make sure the - // frame has not finished the transmission (`TXRQ` == 0) in the meantime. - if tir.txrq() && id <= IdReg::from_register(tir.0) { - // There's a mailbox whose priority is higher or equal - // the priority of the new frame. - return Err(nb::Error::WouldBlock); - } - - Ok(()) - } - - fn write_mailbox(&mut self, idx: usize, frame: &Frame) { - debug_assert!(idx < 3); - - let mb = self.canregs.tx(idx); - mb.tdtr().write(|w| w.set_dlc(frame.header().len() as u8)); - - mb.tdlr() - .write(|w| w.0 = u32::from_ne_bytes(frame.data()[0..4].try_into().unwrap())); - mb.tdhr() - .write(|w| w.0 = u32::from_ne_bytes(frame.data()[4..8].try_into().unwrap())); - let id: IdReg = frame.id().into(); - mb.tir().write(|w| { - w.0 = id.0; - w.set_txrq(true); - }); - } - - fn read_pending_mailbox(&mut self, idx: usize) -> Option { - if self.abort_by_index(idx) { - debug_assert!(idx < 3); - - let mb = self.canregs.tx(idx); - - let id = IdReg(mb.tir().read().0); - let mut data = [0xff; 8]; - data[0..4].copy_from_slice(&mb.tdlr().read().0.to_ne_bytes()); - data[4..8].copy_from_slice(&mb.tdhr().read().0.to_ne_bytes()); - let len = mb.tdtr().read().dlc(); - - Some(Frame::new(Header::new(id.id(), len, id.rtr()), &data).unwrap()) - } else { - // Abort request failed because the frame was already sent (or being sent) on - // the bus. All mailboxes are now free. This can happen for small prescaler - // values (e.g. 1MBit/s bit timing with a source clock of 8MHz) or when an ISR - // has preempted the execution. - None - } - } - - /// Tries to abort a pending frame. Returns `true` when aborted. - fn abort_by_index(&mut self, idx: usize) -> bool { - self.canregs.tsr().write(|reg| reg.set_abrq(idx, true)); - - // Wait for the abort request to be finished. - loop { - let tsr = self.canregs.tsr().read(); - if false == tsr.abrq(idx) { - break tsr.txok(idx) == false; - } - } - } - - /// Attempts to abort the sending of a frame that is pending in a mailbox. - /// - /// If there is no frame in the provided mailbox, or its transmission succeeds before it can be - /// aborted, this function has no effect and returns `false`. - /// - /// If there is a frame in the provided mailbox, and it is canceled successfully, this function - /// returns `true`. - pub fn abort(&mut self, mailbox: Mailbox) -> bool { - // If the mailbox is empty, the value of TXOKx depends on what happened with the previous - // frame in that mailbox. Only call abort_by_index() if the mailbox is not empty. - let tsr = self.canregs.tsr().read(); - let mailbox_empty = match mailbox { - Mailbox::Mailbox0 => tsr.tme(0), - Mailbox::Mailbox1 => tsr.tme(1), - Mailbox::Mailbox2 => tsr.tme(2), - }; - if mailbox_empty { - false - } else { - self.abort_by_index(mailbox as usize) - } - } - - /// Returns `true` if no frame is pending for transmission. - pub fn is_idle(&self) -> bool { - let tsr = self.canregs.tsr().read(); - tsr.tme(0) && tsr.tme(1) && tsr.tme(2) - } - - /// Clears the request complete flag for all mailboxes. - pub fn clear_interrupt_flags(&mut self) { - self.canregs.tsr().write(|reg| { - reg.set_rqcp(0, true); - reg.set_rqcp(1, true); - reg.set_rqcp(2, true); - }); - } - - pub fn receive_frame_available(&self) -> bool { - if self.canregs.rfr(0).read().fmp() != 0 { - true - } else if self.canregs.rfr(1).read().fmp() != 0 { - true - } else { - false - } - } - - pub fn receive_fifo(&self, fifo: crate::can::_version::bx::RxFifo) -> Option { - // Generate timestamp as early as possible - #[cfg(feature = "time")] - let ts = embassy_time::Instant::now(); - - use crate::pac::can::vals::Ide; - - let fifo_idx = match fifo { - crate::can::_version::bx::RxFifo::Fifo0 => 0usize, - crate::can::_version::bx::RxFifo::Fifo1 => 1usize, - }; - let rfr = self.canregs.rfr(fifo_idx); - let fifo = self.canregs.rx(fifo_idx); - - // If there are no pending messages, there is nothing to do - if rfr.read().fmp() == 0 { - return None; - } - - let rir = fifo.rir().read(); - let id: embedded_can::Id = if rir.ide() == Ide::STANDARD { - embedded_can::StandardId::new(rir.stid()).unwrap().into() - } else { - let stid = (rir.stid() & 0x7FF) as u32; - let exid = rir.exid() & 0x3FFFF; - let id = (stid << 18) | (exid); - embedded_can::ExtendedId::new(id).unwrap().into() - }; - let rdtr = fifo.rdtr().read(); - let data_len = rdtr.dlc(); - let rtr = rir.rtr() == stm32_metapac::can::vals::Rtr::REMOTE; - - #[cfg(not(feature = "time"))] - let ts = rdtr.time(); - - let mut data: [u8; 8] = [0; 8]; - data[0..4].copy_from_slice(&fifo.rdlr().read().0.to_ne_bytes()); - data[4..8].copy_from_slice(&fifo.rdhr().read().0.to_ne_bytes()); - - let frame = Frame::new(Header::new(id, data_len, rtr), &data).unwrap(); - let envelope = Envelope { ts, frame }; - - rfr.modify(|v| v.set_rfom(true)); - - Some(envelope) - } -} - -/// Configuration proxy returned by [`Can::modify_config`]. -#[must_use = "`CanConfig` leaves the peripheral in uninitialized state, call `CanConfig::enable` or explicitly drop the value"] -pub struct CanConfig<'a, I: Instance> { - can: &'a mut Can, -} - -impl CanConfig<'_, I> { - /// Configures the bit timings. - /// - /// You can use to calculate the `btr` parameter. Enter - /// parameters as follows: - /// - /// - *Clock Rate*: The input clock speed to the CAN peripheral (*not* the CPU clock speed). - /// This is the clock rate of the peripheral bus the CAN peripheral is attached to (eg. APB1). - /// - *Sample Point*: Should normally be left at the default value of 87.5%. - /// - *SJW*: Should normally be left at the default value of 1. - /// - /// Then copy the `CAN_BUS_TIME` register value from the table and pass it as the `btr` - /// parameter to this method. - pub fn set_bit_timing(self, bt: crate::can::util::NominalBitTiming) -> Self { - self.can.registers.set_bit_timing(bt); - self - } - - /// Enables or disables loopback mode: Internally connects the TX and RX - /// signals together. - pub fn set_loopback(self, enabled: bool) -> Self { - self.can.registers.set_loopback(enabled); - self - } - - /// Enables or disables silent mode: Disconnects the TX signal from the pin. - pub fn set_silent(self, enabled: bool) -> Self { - self.can.registers.set_silent(enabled); - self - } - - /// Enables or disables automatic retransmission of messages. - /// - /// If this is enabled, the CAN peripheral will automatically try to retransmit each frame - /// until it can be sent. Otherwise, it will try only once to send each frame. - /// - /// Automatic retransmission is enabled by default. - pub fn set_automatic_retransmit(self, enabled: bool) -> Self { - self.can.registers.set_automatic_retransmit(enabled); - self - } - - /// Leaves initialization mode and enables the peripheral. - /// - /// To sync with the CAN bus, this will block until 11 consecutive recessive bits are detected - /// on the bus. - /// - /// If you want to finish configuration without enabling the peripheral, you can call - /// [`CanConfig::leave_disabled`] or [`drop`] the [`CanConfig`] instead. - pub fn enable(self) { - self.can.registers.leave_init_mode(); - - match nb::block!(self.can.registers.enable_non_blocking()) { - Ok(()) => {} - Err(void) => match void {}, - } - - // Don't run the destructor. - mem::forget(self); - } - - /// Leaves initialization mode, but keeps the peripheral in sleep mode. - /// - /// Before the [`Can`] instance can be used, you have to enable it by calling - /// [`Can::enable_non_blocking`]. - pub fn leave_disabled(self) { - self.can.registers.leave_init_mode(); - } -} - -impl Drop for CanConfig<'_, I> { - #[inline] - fn drop(&mut self) { - self.can.registers.leave_init_mode(); - } -} - -/// Builder returned by [`Can::builder`]. -#[must_use = "`CanBuilder` leaves the peripheral in uninitialized state, call `CanBuilder::enable` or `CanBuilder::leave_disabled`"] -pub struct CanBuilder { - can: Can, -} - -impl CanBuilder { - /// Configures the bit timings. - /// - /// You can use to calculate the `btr` parameter. Enter - /// parameters as follows: - /// - /// - *Clock Rate*: The input clock speed to the CAN peripheral (*not* the CPU clock speed). - /// This is the clock rate of the peripheral bus the CAN peripheral is attached to (eg. APB1). - /// - *Sample Point*: Should normally be left at the default value of 87.5%. - /// - *SJW*: Should normally be left at the default value of 1. - /// - /// Then copy the `CAN_BUS_TIME` register value from the table and pass it as the `btr` - /// parameter to this method. - pub fn set_bit_timing(mut self, bt: crate::can::util::NominalBitTiming) -> Self { - self.can.registers.set_bit_timing(bt); - self - } - /// Enables or disables loopback mode: Internally connects the TX and RX - /// signals together. - pub fn set_loopback(self, enabled: bool) -> Self { - self.can.registers.set_loopback(enabled); - self - } - - /// Enables or disables silent mode: Disconnects the TX signal from the pin. - pub fn set_silent(self, enabled: bool) -> Self { - self.can.registers.set_silent(enabled); - self - } - - /// Enables or disables automatic retransmission of messages. - /// - /// If this is enabled, the CAN peripheral will automatically try to retransmit each frame - /// until it can be sent. Otherwise, it will try only once to send each frame. - /// - /// Automatic retransmission is enabled by default. - pub fn set_automatic_retransmit(self, enabled: bool) -> Self { - self.can.registers.set_automatic_retransmit(enabled); - self - } - - /// Leaves initialization mode and enables the peripheral. - /// - /// To sync with the CAN bus, this will block until 11 consecutive recessive bits are detected - /// on the bus. - /// - /// If you want to finish configuration without enabling the peripheral, you can call - /// [`CanBuilder::leave_disabled`] instead. - pub fn enable(mut self) -> Can { - self.leave_init_mode(); - - match nb::block!(self.can.registers.enable_non_blocking()) { - Ok(()) => self.can, - Err(void) => match void {}, - } - } - - /// Returns the [`Can`] interface without enabling it. - /// - /// This leaves initialization mode, but keeps the peripheral in sleep mode instead of enabling - /// it. - /// - /// Before the [`Can`] instance can be used, you have to enable it by calling - /// [`Can::enable_non_blocking`]. - pub fn leave_disabled(mut self) -> Can { - self.leave_init_mode(); - self.can - } - - /// Leaves initialization mode, enters sleep mode. - fn leave_init_mode(&mut self) { - self.can.registers.leave_init_mode(); - } -} - -/// Interface to a bxCAN peripheral. -pub struct Can { - instance: I, - canregs: crate::pac::can::Can, - pub(crate) registers: Registers, -} - -impl Can -where - I: Instance, -{ - /// Creates a [`CanBuilder`] for constructing a CAN interface. - pub fn builder(instance: I, canregs: crate::pac::can::Can) -> CanBuilder { - let mut can_builder = CanBuilder { - can: Can { - instance, - canregs, - registers: Registers { canregs }, - }, - }; - - can_builder.can.registers.enter_init_mode(); - - can_builder - } - - /// Disables the CAN interface and returns back the raw peripheral it was created from. - /// - /// The peripheral is disabled by setting `RESET` in `CAN_MCR`, which causes the peripheral to - /// enter sleep mode. - pub fn free(self) -> I { - self.registers.reset(); - self.instance - } - - /// Configure bit timings and silent/loop-back mode. - /// - /// Calling this method will enter initialization mode. - pub fn modify_config(&mut self) -> CanConfig<'_, I> { - self.registers.enter_init_mode(); - - CanConfig { can: self } - } - - /// Puts a CAN frame in a free transmit mailbox for transmission on the bus. - /// - /// Frames are transmitted to the bus based on their priority (see [`FramePriority`]). - /// Transmit order is preserved for frames with identical priority. - /// - /// If all transmit mailboxes are full, and `frame` has a higher priority than the - /// lowest-priority message in the transmit mailboxes, transmission of the enqueued frame is - /// cancelled and `frame` is enqueued instead. The frame that was replaced is returned as - /// [`TransmitStatus::dequeued_frame`]. - pub fn transmit(&mut self, frame: &Frame) -> nb::Result { - // Safety: We have a `&mut self` and have unique access to the peripheral. - unsafe { Tx::::conjure(self.canregs).transmit(frame) } - } - - /// Returns `true` if no frame is pending for transmission. - pub fn is_transmitter_idle(&self) -> bool { - // Safety: Read-only operation. - unsafe { Tx::::conjure(self.canregs).is_idle() } - } - - /// Attempts to abort the sending of a frame that is pending in a mailbox. - /// - /// If there is no frame in the provided mailbox, or its transmission succeeds before it can be - /// aborted, this function has no effect and returns `false`. - /// - /// If there is a frame in the provided mailbox, and it is canceled successfully, this function - /// returns `true`. - pub fn abort(&mut self, mailbox: Mailbox) -> bool { - // Safety: We have a `&mut self` and have unique access to the peripheral. - unsafe { Tx::::conjure(self.canregs).abort(mailbox) } - } - - pub(crate) fn split_by_ref(&mut self) -> (Tx, Rx) { - // Safety: We take `&mut self` and the return value lifetimes are tied to `self`'s lifetime. - let tx = unsafe { Tx::conjure(self.canregs) }; - let rx0 = unsafe { Rx::conjure() }; - (tx, rx0) - } -} - -impl Can { - /// Accesses the filter banks owned by this CAN peripheral. - /// - /// To modify filters of a slave peripheral, `modify_filters` has to be called on the master - /// peripheral instead. - pub fn modify_filters(&mut self) -> MasterFilters<'_, I> { - unsafe { MasterFilters::new(self.canregs) } - } -} - -/// Marker for Tx half -pub struct Tx { - _can: PhantomData, - pub(crate) registers: Registers, -} - -impl Tx -where - I: Instance, -{ - unsafe fn conjure(canregs: crate::pac::can::Can) -> Self { - Self { - _can: PhantomData, - registers: Registers { canregs }, //canregs, - } - } - - /// Puts a CAN frame in a transmit mailbox for transmission on the bus. - /// - /// Frames are transmitted to the bus based on their priority (see [`FramePriority`]). - /// Transmit order is preserved for frames with identical priority. - /// - /// If all transmit mailboxes are full, and `frame` has a higher priority than the - /// lowest-priority message in the transmit mailboxes, transmission of the enqueued frame is - /// cancelled and `frame` is enqueued instead. The frame that was replaced is returned as - /// [`TransmitStatus::dequeued_frame`]. - pub fn transmit(&mut self, frame: &Frame) -> nb::Result { - self.registers.transmit(frame) - } - - /// Attempts to abort the sending of a frame that is pending in a mailbox. - /// - /// If there is no frame in the provided mailbox, or its transmission succeeds before it can be - /// aborted, this function has no effect and returns `false`. - /// - /// If there is a frame in the provided mailbox, and it is canceled successfully, this function - /// returns `true`. - pub fn abort(&mut self, mailbox: Mailbox) -> bool { - self.registers.abort(mailbox) - } - - /// Returns `true` if no frame is pending for transmission. - pub fn is_idle(&self) -> bool { - self.registers.is_idle() - } - - /// Clears the request complete flag for all mailboxes. - pub fn clear_interrupt_flags(&mut self) { - self.registers.clear_interrupt_flags() - } -} - -/// Marker for Rx half -pub struct Rx { - _can: PhantomData, -} - -impl Rx -where - I: Instance, -{ - unsafe fn conjure() -> Self { - Self { _can: PhantomData } - } -} - -/// Identifies one of the two receive FIFOs. -#[derive(Debug, Clone, Copy, PartialEq, Eq, PartialOrd, Ord)] -#[cfg_attr(feature = "defmt", derive(defmt::Format))] -pub enum Fifo { - /// First receive FIFO - Fifo0 = 0, - /// Second receive FIFO - Fifo1 = 1, -} - -/// Identifies one of the three transmit mailboxes. -#[derive(Debug, Copy, Clone, Ord, PartialOrd, Eq, PartialEq)] -#[cfg_attr(feature = "defmt", derive(defmt::Format))] -pub enum Mailbox { - /// Transmit mailbox 0 - Mailbox0 = 0, - /// Transmit mailbox 1 - Mailbox1 = 1, - /// Transmit mailbox 2 - Mailbox2 = 2, -} - -/// Contains information about a frame enqueued for transmission via [`Can::transmit`] or -/// [`Tx::transmit`]. -pub struct TransmitStatus { - dequeued_frame: Option, - mailbox: Mailbox, -} - -impl TransmitStatus { - /// Returns the lower-priority frame that was dequeued to make space for the new frame. - #[inline] - pub fn dequeued_frame(&self) -> Option<&Frame> { - self.dequeued_frame.as_ref() - } - - /// Returns the [`Mailbox`] the frame was enqueued in. - #[inline] - pub fn mailbox(&self) -> Mailbox { - self.mailbox - } -} diff --git a/embassy-stm32/src/can/bx/filter.rs b/embassy-stm32/src/can/bxcan/filter.rs similarity index 99% rename from embassy-stm32/src/can/bx/filter.rs rename to embassy-stm32/src/can/bxcan/filter.rs index 51766aa31..9940c7f50 100644 --- a/embassy-stm32/src/can/bx/filter.rs +++ b/embassy-stm32/src/can/bxcan/filter.rs @@ -2,7 +2,7 @@ use core::marker::PhantomData; -use crate::can::bx::{ExtendedId, Fifo, FilterOwner, Id, Instance, MasterInstance, StandardId}; +use super::{ExtendedId, Fifo, FilterOwner, Id, Instance, MasterInstance, StandardId}; const F32_RTR: u32 = 0b010; // set the RTR bit to match remote frames const F32_IDE: u32 = 0b100; // set the IDE bit to match extended identifiers diff --git a/embassy-stm32/src/can/bxcan.rs b/embassy-stm32/src/can/bxcan/mod.rs similarity index 68% rename from embassy-stm32/src/can/bxcan.rs rename to embassy-stm32/src/can/bxcan/mod.rs index fd6a79092..65fd0e9c2 100644 --- a/embassy-stm32/src/can/bxcan.rs +++ b/embassy-stm32/src/can/bxcan/mod.rs @@ -1,29 +1,27 @@ +pub mod filter; +mod registers; + use core::future::poll_fn; use core::marker::PhantomData; -use core::ops::{Deref, DerefMut}; use core::task::Poll; -pub mod bx; - -pub use bx::{filter, Data, ExtendedId, Fifo, Frame, Header, Id, StandardId}; use embassy_hal_internal::{into_ref, PeripheralRef}; use embassy_sync::blocking_mutex::raw::CriticalSectionRawMutex; use embassy_sync::channel::Channel; use embassy_sync::waitqueue::AtomicWaker; +pub use embedded_can::{ExtendedId, Id, StandardId}; +use self::filter::MasterFilters; +use self::registers::{Registers, RxFifo}; +pub use super::common::{BufferedCanReceiver, BufferedCanSender}; +use super::frame::{Envelope, Frame}; +use super::util; +use crate::can::enums::{BusError, TryReadError}; use crate::gpio::AFType; use crate::interrupt::typelevel::Interrupt; use crate::rcc::RccPeripheral; use crate::{interrupt, peripherals, Peripheral}; -pub mod enums; -pub mod frame; -pub mod util; -pub use frame::Envelope; - -mod common; -pub use self::common::{BufferedCanReceiver, BufferedCanSender}; - /// Interrupt handler. pub struct TxInterruptHandler { _phantom: PhantomData, @@ -80,9 +78,72 @@ impl interrupt::typelevel::Handler for SceInterrup } } +/// Configuration proxy returned by [`Can::modify_config`]. +pub struct CanConfig<'a, T: Instance> { + can: PhantomData<&'a mut T>, +} + +impl CanConfig<'_, T> { + /// Configures the bit timings. + /// + /// You can use to calculate the `btr` parameter. Enter + /// parameters as follows: + /// + /// - *Clock Rate*: The input clock speed to the CAN peripheral (*not* the CPU clock speed). + /// This is the clock rate of the peripheral bus the CAN peripheral is attached to (eg. APB1). + /// - *Sample Point*: Should normally be left at the default value of 87.5%. + /// - *SJW*: Should normally be left at the default value of 1. + /// + /// Then copy the `CAN_BUS_TIME` register value from the table and pass it as the `btr` + /// parameter to this method. + pub fn set_bit_timing(self, bt: crate::can::util::NominalBitTiming) -> Self { + Registers(T::regs()).set_bit_timing(bt); + self + } + + /// Configure the CAN bit rate. + /// + /// This is a helper that internally calls `set_bit_timing()`[Self::set_bit_timing]. + pub fn set_bitrate(self, bitrate: u32) -> Self { + let bit_timing = util::calc_can_timings(T::frequency(), bitrate).unwrap(); + self.set_bit_timing(bit_timing) + } + + /// Enables or disables loopback mode: Internally connects the TX and RX + /// signals together. + pub fn set_loopback(self, enabled: bool) -> Self { + Registers(T::regs()).set_loopback(enabled); + self + } + + /// Enables or disables silent mode: Disconnects the TX signal from the pin. + pub fn set_silent(self, enabled: bool) -> Self { + Registers(T::regs()).set_silent(enabled); + self + } + + /// Enables or disables automatic retransmission of messages. + /// + /// If this is enabled, the CAN peripheral will automatically try to retransmit each frame + /// until it can be sent. Otherwise, it will try only once to send each frame. + /// + /// Automatic retransmission is enabled by default. + pub fn set_automatic_retransmit(self, enabled: bool) -> Self { + Registers(T::regs()).set_automatic_retransmit(enabled); + self + } +} + +impl Drop for CanConfig<'_, T> { + #[inline] + fn drop(&mut self) { + Registers(T::regs()).leave_init_mode(); + } +} + /// CAN driver pub struct Can<'d, T: Instance> { - can: crate::can::bx::Can>, + peri: PeripheralRef<'d, T>, } /// Error returned by `try_write` @@ -145,14 +206,25 @@ impl<'d, T: Instance> Can<'d, T> { rx.set_as_af(rx.af_num(), AFType::Input); tx.set_as_af(tx.af_num(), AFType::OutputPushPull); - let can = crate::can::bx::Can::builder(BxcanInstance(peri), T::regs()).leave_disabled(); - Self { can } + Registers(T::regs()).leave_init_mode(); + + Self { peri } } /// Set CAN bit rate. pub fn set_bitrate(&mut self, bitrate: u32) { let bit_timing = util::calc_can_timings(T::frequency(), bitrate).unwrap(); - self.can.modify_config().set_bit_timing(bit_timing).leave_disabled(); + self.modify_config().set_bit_timing(bit_timing); + } + + /// Configure bit timings and silent/loop-back mode. + /// + /// Calling this method will enter initialization mode. You must enable the peripheral + /// again afterwards with [`enable`](Self::enable). + pub fn modify_config(&mut self) -> CanConfig<'_, T> { + Registers(T::regs()).enter_init_mode(); + + CanConfig { can: PhantomData } } /// Enables the peripheral and synchronizes with the bus. @@ -160,7 +232,7 @@ impl<'d, T: Instance> Can<'d, T> { /// This will wait for 11 consecutive recessive bits (bus idle state). /// Contrary to enable method from bxcan library, this will not freeze the executor while waiting. pub async fn enable(&mut self) { - while self.registers.enable_non_blocking().is_err() { + while Registers(T::regs()).enable_non_blocking().is_err() { // SCE interrupt is only generated for entering sleep mode, but not leaving. // Yield to allow other tasks to execute while can bus is initializing. embassy_futures::yield_now().await; @@ -170,19 +242,19 @@ impl<'d, T: Instance> Can<'d, T> { /// Queues the message to be sent. /// /// If the TX queue is full, this will wait until there is space, therefore exerting backpressure. - pub async fn write(&mut self, frame: &Frame) -> crate::can::bx::TransmitStatus { + pub async fn write(&mut self, frame: &Frame) -> TransmitStatus { self.split().0.write(frame).await } /// Attempts to transmit a frame without blocking. /// /// Returns [Err(TryWriteError::Full)] if all transmit mailboxes are full. - pub fn try_write(&mut self, frame: &Frame) -> Result { + pub fn try_write(&mut self, frame: &Frame) -> Result { self.split().0.try_write(frame) } /// Waits for a specific transmit mailbox to become empty - pub async fn flush(&self, mb: crate::can::bx::Mailbox) { + pub async fn flush(&self, mb: Mailbox) { CanTx::::flush_inner(mb).await } @@ -196,6 +268,22 @@ impl<'d, T: Instance> Can<'d, T> { CanTx::::flush_all_inner().await } + /// Attempts to abort the sending of a frame that is pending in a mailbox. + /// + /// If there is no frame in the provided mailbox, or its transmission succeeds before it can be + /// aborted, this function has no effect and returns `false`. + /// + /// If there is a frame in the provided mailbox, and it is canceled successfully, this function + /// returns `true`. + pub fn abort(&mut self, mailbox: Mailbox) -> bool { + Registers(T::regs()).abort(mailbox) + } + + /// Returns `true` if no frame is pending for transmission. + pub fn is_transmitter_idle(&self) -> bool { + Registers(T::regs()).is_idle() + } + /// Read a CAN frame. /// /// If no CAN frame is in the RX buffer, this will wait until there is one. @@ -221,8 +309,14 @@ impl<'d, T: Instance> Can<'d, T> { /// /// Useful for doing separate transmit/receive tasks. pub fn split<'c>(&'c mut self) -> (CanTx<'d, T>, CanRx<'d, T>) { - let (tx, rx) = self.can.split_by_ref(); - (CanTx { tx }, CanRx { rx }) + ( + CanTx { + _peri: unsafe { self.peri.clone_unchecked() }, + }, + CanRx { + peri: unsafe { self.peri.clone_unchecked() }, + }, + ) } /// Return a buffered instance of driver. User must supply Buffers @@ -239,10 +333,13 @@ impl<'d, T: Instance> Can<'d, T> { } } -impl<'d, T: Instance> AsMut>> for Can<'d, T> { - /// Get mutable access to the lower-level driver from the `bxcan` crate. - fn as_mut(&mut self) -> &mut crate::can::bx::Can> { - &mut self.can +impl<'d, T: FilterOwner> Can<'d, T> { + /// Accesses the filter banks owned by this CAN peripheral. + /// + /// To modify filters of a slave peripheral, `modify_filters` has to be called on the master + /// peripheral instead. + pub fn modify_filters(&mut self) -> MasterFilters<'_, T> { + unsafe { MasterFilters::new(T::regs()) } } } @@ -288,17 +385,17 @@ impl<'d, T: Instance, const TX_BUF_SIZE: usize, const RX_BUF_SIZE: usize> Buffer /// CAN driver, transmit half. pub struct CanTx<'d, T: Instance> { - tx: crate::can::bx::Tx>, + _peri: PeripheralRef<'d, T>, } impl<'d, T: Instance> CanTx<'d, T> { /// Queues the message to be sent. /// /// If the TX queue is full, this will wait until there is space, therefore exerting backpressure. - pub async fn write(&mut self, frame: &Frame) -> crate::can::bx::TransmitStatus { + pub async fn write(&mut self, frame: &Frame) -> TransmitStatus { poll_fn(|cx| { T::state().tx_mode.register(cx.waker()); - if let Ok(status) = self.tx.transmit(frame) { + if let Ok(status) = Registers(T::regs()).transmit(frame) { return Poll::Ready(status); } @@ -310,11 +407,11 @@ impl<'d, T: Instance> CanTx<'d, T> { /// Attempts to transmit a frame without blocking. /// /// Returns [Err(TryWriteError::Full)] if all transmit mailboxes are full. - pub fn try_write(&mut self, frame: &Frame) -> Result { - self.tx.transmit(frame).map_err(|_| TryWriteError::Full) + pub fn try_write(&mut self, frame: &Frame) -> Result { + Registers(T::regs()).transmit(frame).map_err(|_| TryWriteError::Full) } - async fn flush_inner(mb: crate::can::bx::Mailbox) { + async fn flush_inner(mb: Mailbox) { poll_fn(|cx| { T::state().tx_mode.register(cx.waker()); if T::regs().tsr().read().tme(mb.index()) { @@ -327,7 +424,7 @@ impl<'d, T: Instance> CanTx<'d, T> { } /// Waits for a specific transmit mailbox to become empty - pub async fn flush(&self, mb: crate::can::bx::Mailbox) { + pub async fn flush(&self, mb: Mailbox) { Self::flush_inner(mb).await } @@ -336,9 +433,9 @@ impl<'d, T: Instance> CanTx<'d, T> { T::state().tx_mode.register(cx.waker()); let tsr = T::regs().tsr().read(); - if tsr.tme(crate::can::bx::Mailbox::Mailbox0.index()) - || tsr.tme(crate::can::bx::Mailbox::Mailbox1.index()) - || tsr.tme(crate::can::bx::Mailbox::Mailbox2.index()) + if tsr.tme(Mailbox::Mailbox0.index()) + || tsr.tme(Mailbox::Mailbox1.index()) + || tsr.tme(Mailbox::Mailbox2.index()) { return Poll::Ready(()); } @@ -358,9 +455,9 @@ impl<'d, T: Instance> CanTx<'d, T> { T::state().tx_mode.register(cx.waker()); let tsr = T::regs().tsr().read(); - if tsr.tme(crate::can::bx::Mailbox::Mailbox0.index()) - && tsr.tme(crate::can::bx::Mailbox::Mailbox1.index()) - && tsr.tme(crate::can::bx::Mailbox::Mailbox2.index()) + if tsr.tme(Mailbox::Mailbox0.index()) + && tsr.tme(Mailbox::Mailbox1.index()) + && tsr.tme(Mailbox::Mailbox2.index()) { return Poll::Ready(()); } @@ -375,12 +472,28 @@ impl<'d, T: Instance> CanTx<'d, T> { Self::flush_all_inner().await } + /// Attempts to abort the sending of a frame that is pending in a mailbox. + /// + /// If there is no frame in the provided mailbox, or its transmission succeeds before it can be + /// aborted, this function has no effect and returns `false`. + /// + /// If there is a frame in the provided mailbox, and it is canceled successfully, this function + /// returns `true`. + pub fn abort(&mut self, mailbox: Mailbox) -> bool { + Registers(T::regs()).abort(mailbox) + } + + /// Returns `true` if no frame is pending for transmission. + pub fn is_idle(&self) -> bool { + Registers(T::regs()).is_idle() + } + /// Return a buffered instance of driver. User must supply Buffers pub fn buffered( self, txb: &'static mut TxBuf, ) -> BufferedCanTx<'d, T, TX_BUF_SIZE> { - BufferedCanTx::new(self.tx, txb) + BufferedCanTx::new(self, txb) } } @@ -389,19 +502,19 @@ pub type TxBuf = Channel { - _tx: crate::can::bx::Tx>, + _tx: CanTx<'d, T>, tx_buf: &'static TxBuf, } impl<'d, T: Instance, const TX_BUF_SIZE: usize> BufferedCanTx<'d, T, TX_BUF_SIZE> { - fn new(_tx: crate::can::bx::Tx>, tx_buf: &'static TxBuf) -> Self { + fn new(_tx: CanTx<'d, T>, tx_buf: &'static TxBuf) -> Self { Self { _tx, tx_buf }.setup() } fn setup(self) -> Self { // We don't want interrupts being processed while we change modes. critical_section::with(|_| unsafe { - let tx_inner = self::common::ClassicBufferedTxInner { + let tx_inner = super::common::ClassicBufferedTxInner { tx_receiver: self.tx_buf.receiver().into(), }; T::mut_state().tx_mode = TxMode::Buffered(tx_inner); @@ -435,7 +548,7 @@ impl<'d, T: Instance, const TX_BUF_SIZE: usize> Drop for BufferedCanTx<'d, T, TX /// CAN driver, receive half. #[allow(dead_code)] pub struct CanRx<'d, T: Instance> { - rx: crate::can::bx::Rx>, + peri: PeripheralRef<'d, T>, } impl<'d, T: Instance> CanRx<'d, T> { @@ -465,7 +578,7 @@ impl<'d, T: Instance> CanRx<'d, T> { self, rxb: &'static mut RxBuf, ) -> BufferedCanRx<'d, T, RX_BUF_SIZE> { - BufferedCanRx::new(self.rx, rxb) + BufferedCanRx::new(self, rxb) } } @@ -474,19 +587,19 @@ pub type RxBuf = Channel { - _rx: crate::can::bx::Rx>, + _rx: CanRx<'d, T>, rx_buf: &'static RxBuf, } impl<'d, T: Instance, const RX_BUF_SIZE: usize> BufferedCanRx<'d, T, RX_BUF_SIZE> { - fn new(_rx: crate::can::bx::Rx>, rx_buf: &'static RxBuf) -> Self { + fn new(_rx: CanRx<'d, T>, rx_buf: &'static RxBuf) -> Self { BufferedCanRx { _rx, rx_buf }.setup() } fn setup(self) -> Self { // We don't want interrupts being processed while we change modes. critical_section::with(|_| unsafe { - let rx_inner = self::common::ClassicBufferedRxInner { + let rx_inner = super::common::ClassicBufferedRxInner { rx_sender: self.rx_buf.sender().into(), }; T::mut_state().rx_mode = RxMode::Buffered(rx_inner); @@ -511,8 +624,7 @@ impl<'d, T: Instance, const RX_BUF_SIZE: usize> BufferedCanRx<'d, T, RX_BUF_SIZE Err(e) => Err(TryReadError::BusError(e)), } } else { - let registers = crate::can::bx::Registers { canregs: T::regs() }; - if let Some(err) = registers.curr_error() { + if let Some(err) = Registers(T::regs()).curr_error() { return Err(TryReadError::BusError(err)); } else { Err(TryReadError::Empty) @@ -544,8 +656,6 @@ impl<'d, T: Instance, const RX_BUF_SIZE: usize> Drop for BufferedCanRx<'d, T, RX } } -use crate::can::bx::RxFifo; - impl<'d, T: Instance> Drop for Can<'d, T> { fn drop(&mut self) { // Cannot call `free()` because it moves the instance. @@ -555,35 +665,62 @@ impl<'d, T: Instance> Drop for Can<'d, T> { } } -impl<'d, T: Instance> Deref for Can<'d, T> { - type Target = crate::can::bx::Can>; - - fn deref(&self) -> &Self::Target { - &self.can - } +/// Identifies one of the two receive FIFOs. +#[derive(Debug, Clone, Copy, PartialEq, Eq, PartialOrd, Ord)] +#[cfg_attr(feature = "defmt", derive(defmt::Format))] +pub enum Fifo { + /// First receive FIFO + Fifo0 = 0, + /// Second receive FIFO + Fifo1 = 1, } -impl<'d, T: Instance> DerefMut for Can<'d, T> { - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.can - } +/// Identifies one of the three transmit mailboxes. +#[derive(Debug, Copy, Clone, Ord, PartialOrd, Eq, PartialEq)] +#[cfg_attr(feature = "defmt", derive(defmt::Format))] +pub enum Mailbox { + /// Transmit mailbox 0 + Mailbox0 = 0, + /// Transmit mailbox 1 + Mailbox1 = 1, + /// Transmit mailbox 2 + Mailbox2 = 2, } -use crate::can::enums::{BusError, TryReadError}; +/// Contains information about a frame enqueued for transmission via [`Can::transmit`] or +/// [`Tx::transmit`]. +pub struct TransmitStatus { + dequeued_frame: Option, + mailbox: Mailbox, +} + +impl TransmitStatus { + /// Returns the lower-priority frame that was dequeued to make space for the new frame. + #[inline] + pub fn dequeued_frame(&self) -> Option<&Frame> { + self.dequeued_frame.as_ref() + } + + /// Returns the [`Mailbox`] the frame was enqueued in. + #[inline] + pub fn mailbox(&self) -> Mailbox { + self.mailbox + } +} pub(crate) enum RxMode { NonBuffered(AtomicWaker), - Buffered(crate::can::_version::common::ClassicBufferedRxInner), + Buffered(super::common::ClassicBufferedRxInner), } impl RxMode { - pub fn on_interrupt(&self, fifo: crate::can::_version::bx::RxFifo) { + pub fn on_interrupt(&self, fifo: RxFifo) { match self { Self::NonBuffered(waker) => { // Disable interrupts until read let fifo_idx = match fifo { - crate::can::_version::bx::RxFifo::Fifo0 => 0usize, - crate::can::_version::bx::RxFifo::Fifo1 => 1usize, + RxFifo::Fifo0 => 0usize, + RxFifo::Fifo1 => 1usize, }; T::regs().ier().write(|w| { w.set_fmpie(fifo_idx, false); @@ -591,10 +728,8 @@ impl RxMode { waker.wake(); } Self::Buffered(buf) => { - let regsisters = crate::can::bx::Registers { canregs: T::regs() }; - loop { - match regsisters.receive_fifo(fifo) { + match Registers(T::regs()).receive_fifo(fifo) { Some(envelope) => { // NOTE: consensus was reached that if rx_queue is full, packets should be dropped let _ = buf.rx_sender.try_send(Ok(envelope)); @@ -628,13 +763,13 @@ impl RxMode { pub fn try_read(&self) -> Result { match self { Self::NonBuffered(_) => { - let registers = crate::can::bx::Registers { canregs: T::regs() }; - if let Some(msg) = registers.receive_fifo(super::bx::RxFifo::Fifo0) { + let registers = Registers(T::regs()); + if let Some(msg) = registers.receive_fifo(RxFifo::Fifo0) { T::regs().ier().write(|w| { w.set_fmpie(0, true); }); Ok(msg) - } else if let Some(msg) = registers.receive_fifo(super::bx::RxFifo::Fifo1) { + } else if let Some(msg) = registers.receive_fifo(RxFifo::Fifo1) { T::regs().ier().write(|w| { w.set_fmpie(1, true); }); @@ -655,8 +790,7 @@ impl RxMode { Self::NonBuffered(waker) => { poll_fn(|cx| { waker.register(cx.waker()); - let registers = crate::can::bx::Registers { canregs: T::regs() }; - if registers.receive_frame_available() { + if Registers(T::regs()).receive_frame_available() { Poll::Ready(()) } else { Poll::Pending @@ -673,15 +807,13 @@ impl RxMode { enum TxMode { NonBuffered(AtomicWaker), - Buffered(self::common::ClassicBufferedTxInner), + Buffered(super::common::ClassicBufferedTxInner), } impl TxMode { pub fn buffer_free(&self) -> bool { let tsr = T::regs().tsr().read(); - tsr.tme(crate::can::bx::Mailbox::Mailbox0.index()) - || tsr.tme(crate::can::bx::Mailbox::Mailbox1.index()) - || tsr.tme(crate::can::bx::Mailbox::Mailbox2.index()) + tsr.tme(Mailbox::Mailbox0.index()) || tsr.tme(Mailbox::Mailbox1.index()) || tsr.tme(Mailbox::Mailbox2.index()) } pub fn on_interrupt(&self) { match &T::state().tx_mode { @@ -690,8 +822,7 @@ impl TxMode { while self.buffer_free::() { match buf.tx_receiver.try_receive() { Ok(frame) => { - let mut registers = crate::can::bx::Registers { canregs: T::regs() }; - _ = registers.transmit(&frame); + _ = Registers(T::regs()).transmit(&frame); } Err(_) => { break; @@ -738,7 +869,7 @@ trait SealedInstance { /// CAN instance trait. #[allow(private_bounds)] -pub trait Instance: SealedInstance + RccPeripheral + 'static { +pub trait Instance: Peripheral

+ SealedInstance + RccPeripheral + 'static { /// TX interrupt for this instance. type TXInterrupt: crate::interrupt::typelevel::Interrupt; /// RX0 interrupt for this instance. @@ -749,10 +880,35 @@ pub trait Instance: SealedInstance + RccPeripheral + 'static { type SCEInterrupt: crate::interrupt::typelevel::Interrupt; } -/// BXCAN instance newtype. -pub struct BxcanInstance<'a, T>(PeripheralRef<'a, T>); +/// A bxCAN instance that owns filter banks. +/// +/// In master-slave-instance setups, only the master instance owns the filter banks, and needs to +/// split some of them off for use by the slave instance. In that case, the master instance should +/// implement [`FilterOwner`] and [`MasterInstance`], while the slave instance should only implement +/// [`Instance`]. +/// +/// In single-instance configurations, the instance owns all filter banks and they can not be split +/// off. In that case, the instance should implement [`Instance`] and [`FilterOwner`]. +/// +/// # Safety +/// +/// This trait must only be implemented if the instance does, in fact, own its associated filter +/// banks, and `NUM_FILTER_BANKS` must be correct. +pub unsafe trait FilterOwner: Instance { + /// The total number of filter banks available to the instance. + /// + /// This is usually either 14 or 28, and should be specified in the chip's reference manual or datasheet. + const NUM_FILTER_BANKS: u8; +} -unsafe impl<'d, T: Instance> crate::can::bx::Instance for BxcanInstance<'d, T> {} +/// A bxCAN master instance that shares filter banks with a slave instance. +/// +/// In master-slave-instance setups, this trait should be implemented for the master instance. +/// +/// # Safety +/// +/// This trait must only be implemented when there is actually an associated slave instance. +pub unsafe trait MasterInstance: FilterOwner {} foreach_peripheral!( (can, $inst:ident) => { @@ -782,7 +938,7 @@ foreach_peripheral!( foreach_peripheral!( (can, CAN) => { - unsafe impl<'d> crate::can::bx::FilterOwner for BxcanInstance<'d, peripherals::CAN> { + unsafe impl FilterOwner for peripherals::CAN { const NUM_FILTER_BANKS: u8 = 14; } }; @@ -797,19 +953,19 @@ foreach_peripheral!( ))] { // Most L4 devices and some F7 devices use the name "CAN1" // even if there is no "CAN2" peripheral. - unsafe impl<'d> crate::can::bx::FilterOwner for BxcanInstance<'d, peripherals::CAN1> { + unsafe impl FilterOwner for peripherals::CAN1 { const NUM_FILTER_BANKS: u8 = 14; } } else { - unsafe impl<'d> crate::can::bx::FilterOwner for BxcanInstance<'d, peripherals::CAN1> { + unsafe impl FilterOwner for peripherals::CAN1 { const NUM_FILTER_BANKS: u8 = 28; } - unsafe impl<'d> crate::can::bx::MasterInstance for BxcanInstance<'d, peripherals::CAN1> {} + unsafe impl MasterInstance for peripherals::CAN1 {} } } }; (can, CAN3) => { - unsafe impl<'d> crate::can::bx::FilterOwner for BxcanInstance<'d, peripherals::CAN3> { + unsafe impl FilterOwner for peripherals::CAN3 { const NUM_FILTER_BANKS: u8 = 14; } }; @@ -822,12 +978,12 @@ trait Index { fn index(&self) -> usize; } -impl Index for crate::can::bx::Mailbox { +impl Index for Mailbox { fn index(&self) -> usize { match self { - crate::can::bx::Mailbox::Mailbox0 => 0, - crate::can::bx::Mailbox::Mailbox1 => 1, - crate::can::bx::Mailbox::Mailbox2 => 2, + Mailbox::Mailbox0 => 0, + Mailbox::Mailbox1 => 1, + Mailbox::Mailbox2 => 2, } } } diff --git a/embassy-stm32/src/can/bxcan/registers.rs b/embassy-stm32/src/can/bxcan/registers.rs new file mode 100644 index 000000000..732567797 --- /dev/null +++ b/embassy-stm32/src/can/bxcan/registers.rs @@ -0,0 +1,510 @@ +use core::cmp::Ordering; +use core::convert::Infallible; + +pub use embedded_can::{ExtendedId, Id, StandardId}; +use stm32_metapac::can::vals::Lec; + +use super::{Mailbox, TransmitStatus}; +use crate::can::enums::BusError; +use crate::can::frame::{Envelope, Frame, Header}; + +pub(crate) struct Registers(pub crate::pac::can::Can); + +impl Registers { + pub fn enter_init_mode(&mut self) { + self.0.mcr().modify(|reg| { + reg.set_sleep(false); + reg.set_inrq(true); + }); + loop { + let msr = self.0.msr().read(); + if !msr.slak() && msr.inak() { + break; + } + } + } + + // Leaves initialization mode, enters sleep mode. + pub fn leave_init_mode(&mut self) { + self.0.mcr().modify(|reg| { + reg.set_sleep(true); + reg.set_inrq(false); + }); + loop { + let msr = self.0.msr().read(); + if msr.slak() && !msr.inak() { + break; + } + } + } + + pub fn set_bit_timing(&mut self, bt: crate::can::util::NominalBitTiming) { + let prescaler = u16::from(bt.prescaler) & 0x1FF; + let seg1 = u8::from(bt.seg1); + let seg2 = u8::from(bt.seg2) & 0x7F; + let sync_jump_width = u8::from(bt.sync_jump_width) & 0x7F; + self.0.btr().modify(|reg| { + reg.set_brp(prescaler - 1); + reg.set_ts(0, seg1 - 1); + reg.set_ts(1, seg2 - 1); + reg.set_sjw(sync_jump_width - 1); + }); + } + + /// Enables or disables silent mode: Disconnects the TX signal from the pin. + pub fn set_silent(&self, enabled: bool) { + let mode = match enabled { + false => stm32_metapac::can::vals::Silm::NORMAL, + true => stm32_metapac::can::vals::Silm::SILENT, + }; + self.0.btr().modify(|reg| reg.set_silm(mode)); + } + + /// Enables or disables automatic retransmission of messages. + /// + /// If this is enabled, the CAN peripheral will automatically try to retransmit each frame + /// until it can be sent. Otherwise, it will try only once to send each frame. + /// + /// Automatic retransmission is enabled by default. + pub fn set_automatic_retransmit(&self, enabled: bool) { + self.0.mcr().modify(|reg| reg.set_nart(enabled)); + } + + /// Enables or disables loopback mode: Internally connects the TX and RX + /// signals together. + pub fn set_loopback(&self, enabled: bool) { + self.0.btr().modify(|reg| reg.set_lbkm(enabled)); + } + + /// Configures the automatic wake-up feature. + /// + /// This is turned off by default. + /// + /// When turned on, an incoming frame will cause the peripheral to wake up from sleep and + /// receive the frame. If enabled, [`Interrupt::Wakeup`] will also be triggered by the incoming + /// frame. + #[allow(dead_code)] + pub fn set_automatic_wakeup(&mut self, enabled: bool) { + self.0.mcr().modify(|reg| reg.set_awum(enabled)); + } + + /// Leaves initialization mode and enables the peripheral (non-blocking version). + /// + /// Usually, it is recommended to call [`CanConfig::enable`] instead. This method is only needed + /// if you want non-blocking initialization. + /// + /// If this returns [`WouldBlock`][nb::Error::WouldBlock], the peripheral will enable itself + /// in the background. The peripheral is enabled and ready to use when this method returns + /// successfully. + pub fn enable_non_blocking(&mut self) -> nb::Result<(), Infallible> { + let msr = self.0.msr().read(); + if msr.slak() { + self.0.mcr().modify(|reg| { + reg.set_abom(true); + reg.set_sleep(false); + }); + Err(nb::Error::WouldBlock) + } else { + Ok(()) + } + } + + /// Puts the peripheral in a sleep mode to save power. + /// + /// While in sleep mode, an incoming CAN frame will trigger [`Interrupt::Wakeup`] if enabled. + #[allow(dead_code)] + pub fn sleep(&mut self) { + self.0.mcr().modify(|reg| { + reg.set_sleep(true); + reg.set_inrq(false); + }); + loop { + let msr = self.0.msr().read(); + if msr.slak() && !msr.inak() { + break; + } + } + } + + /// Wakes up from sleep mode. + /// + /// Note that this will not trigger [`Interrupt::Wakeup`], only reception of an incoming CAN + /// frame will cause that interrupt. + #[allow(dead_code)] + pub fn wakeup(&mut self) { + self.0.mcr().modify(|reg| { + reg.set_sleep(false); + reg.set_inrq(false); + }); + loop { + let msr = self.0.msr().read(); + if !msr.slak() && !msr.inak() { + break; + } + } + } + + pub fn curr_error(&self) -> Option { + let err = { self.0.esr().read() }; + if err.boff() { + return Some(BusError::BusOff); + } else if err.epvf() { + return Some(BusError::BusPassive); + } else if err.ewgf() { + return Some(BusError::BusWarning); + } else if err.lec() != Lec::NOERROR { + return Some(match err.lec() { + Lec::STUFF => BusError::Stuff, + Lec::FORM => BusError::Form, + Lec::ACK => BusError::Acknowledge, + Lec::BITRECESSIVE => BusError::BitRecessive, + Lec::BITDOMINANT => BusError::BitDominant, + Lec::CRC => BusError::Crc, + Lec::CUSTOM => BusError::Software, + Lec::NOERROR => unreachable!(), + }); + } + None + } + + /// Puts a CAN frame in a transmit mailbox for transmission on the bus. + /// + /// Frames are transmitted to the bus based on their priority (see [`FramePriority`]). + /// Transmit order is preserved for frames with identical priority. + /// + /// If all transmit mailboxes are full, and `frame` has a higher priority than the + /// lowest-priority message in the transmit mailboxes, transmission of the enqueued frame is + /// cancelled and `frame` is enqueued instead. The frame that was replaced is returned as + /// [`TransmitStatus::dequeued_frame`]. + pub fn transmit(&mut self, frame: &Frame) -> nb::Result { + // Get the index of the next free mailbox or the one with the lowest priority. + let tsr = self.0.tsr().read(); + let idx = tsr.code() as usize; + + let frame_is_pending = !tsr.tme(0) || !tsr.tme(1) || !tsr.tme(2); + let pending_frame = if frame_is_pending { + // High priority frames are transmitted first by the mailbox system. + // Frames with identical identifier shall be transmitted in FIFO order. + // The controller schedules pending frames of same priority based on the + // mailbox index instead. As a workaround check all pending mailboxes + // and only accept higher priority frames. + self.check_priority(0, frame.id().into())?; + self.check_priority(1, frame.id().into())?; + self.check_priority(2, frame.id().into())?; + + let all_frames_are_pending = !tsr.tme(0) && !tsr.tme(1) && !tsr.tme(2); + if all_frames_are_pending { + // No free mailbox is available. This can only happen when three frames with + // ascending priority (descending IDs) were requested for transmission and all + // of them are blocked by bus traffic with even higher priority. + // To prevent a priority inversion abort and replace the lowest priority frame. + self.read_pending_mailbox(idx) + } else { + // There was a free mailbox. + None + } + } else { + // All mailboxes are available: Send frame without performing any checks. + None + }; + + self.write_mailbox(idx, frame); + + let mailbox = match idx { + 0 => Mailbox::Mailbox0, + 1 => Mailbox::Mailbox1, + 2 => Mailbox::Mailbox2, + _ => unreachable!(), + }; + Ok(TransmitStatus { + dequeued_frame: pending_frame, + mailbox, + }) + } + + /// Returns `Ok` when the mailbox is free or if it contains pending frame with a + /// lower priority (higher ID) than the identifier `id`. + fn check_priority(&self, idx: usize, id: IdReg) -> nb::Result<(), Infallible> { + // Read the pending frame's id to check its priority. + assert!(idx < 3); + let tir = &self.0.tx(idx).tir().read(); + //let tir = &can.tx[idx].tir.read(); + + // Check the priority by comparing the identifiers. But first make sure the + // frame has not finished the transmission (`TXRQ` == 0) in the meantime. + if tir.txrq() && id <= IdReg::from_register(tir.0) { + // There's a mailbox whose priority is higher or equal + // the priority of the new frame. + return Err(nb::Error::WouldBlock); + } + + Ok(()) + } + + fn write_mailbox(&mut self, idx: usize, frame: &Frame) { + debug_assert!(idx < 3); + + let mb = self.0.tx(idx); + mb.tdtr().write(|w| w.set_dlc(frame.header().len() as u8)); + + mb.tdlr() + .write(|w| w.0 = u32::from_ne_bytes(frame.data()[0..4].try_into().unwrap())); + mb.tdhr() + .write(|w| w.0 = u32::from_ne_bytes(frame.data()[4..8].try_into().unwrap())); + let id: IdReg = frame.id().into(); + mb.tir().write(|w| { + w.0 = id.0; + w.set_txrq(true); + }); + } + + fn read_pending_mailbox(&mut self, idx: usize) -> Option { + if self.abort_by_index(idx) { + debug_assert!(idx < 3); + + let mb = self.0.tx(idx); + + let id = IdReg(mb.tir().read().0); + let mut data = [0xff; 8]; + data[0..4].copy_from_slice(&mb.tdlr().read().0.to_ne_bytes()); + data[4..8].copy_from_slice(&mb.tdhr().read().0.to_ne_bytes()); + let len = mb.tdtr().read().dlc(); + + Some(Frame::new(Header::new(id.id(), len, id.rtr()), &data).unwrap()) + } else { + // Abort request failed because the frame was already sent (or being sent) on + // the bus. All mailboxes are now free. This can happen for small prescaler + // values (e.g. 1MBit/s bit timing with a source clock of 8MHz) or when an ISR + // has preempted the execution. + None + } + } + + /// Tries to abort a pending frame. Returns `true` when aborted. + fn abort_by_index(&mut self, idx: usize) -> bool { + self.0.tsr().write(|reg| reg.set_abrq(idx, true)); + + // Wait for the abort request to be finished. + loop { + let tsr = self.0.tsr().read(); + if false == tsr.abrq(idx) { + break tsr.txok(idx) == false; + } + } + } + + /// Attempts to abort the sending of a frame that is pending in a mailbox. + /// + /// If there is no frame in the provided mailbox, or its transmission succeeds before it can be + /// aborted, this function has no effect and returns `false`. + /// + /// If there is a frame in the provided mailbox, and it is canceled successfully, this function + /// returns `true`. + pub fn abort(&mut self, mailbox: Mailbox) -> bool { + // If the mailbox is empty, the value of TXOKx depends on what happened with the previous + // frame in that mailbox. Only call abort_by_index() if the mailbox is not empty. + let tsr = self.0.tsr().read(); + let mailbox_empty = match mailbox { + Mailbox::Mailbox0 => tsr.tme(0), + Mailbox::Mailbox1 => tsr.tme(1), + Mailbox::Mailbox2 => tsr.tme(2), + }; + if mailbox_empty { + false + } else { + self.abort_by_index(mailbox as usize) + } + } + + /// Returns `true` if no frame is pending for transmission. + pub fn is_idle(&self) -> bool { + let tsr = self.0.tsr().read(); + tsr.tme(0) && tsr.tme(1) && tsr.tme(2) + } + + pub fn receive_frame_available(&self) -> bool { + if self.0.rfr(0).read().fmp() != 0 { + true + } else if self.0.rfr(1).read().fmp() != 0 { + true + } else { + false + } + } + + pub fn receive_fifo(&self, fifo: RxFifo) -> Option { + // Generate timestamp as early as possible + #[cfg(feature = "time")] + let ts = embassy_time::Instant::now(); + + use crate::pac::can::vals::Ide; + + let fifo_idx = match fifo { + RxFifo::Fifo0 => 0usize, + RxFifo::Fifo1 => 1usize, + }; + let rfr = self.0.rfr(fifo_idx); + let fifo = self.0.rx(fifo_idx); + + // If there are no pending messages, there is nothing to do + if rfr.read().fmp() == 0 { + return None; + } + + let rir = fifo.rir().read(); + let id: embedded_can::Id = if rir.ide() == Ide::STANDARD { + embedded_can::StandardId::new(rir.stid()).unwrap().into() + } else { + let stid = (rir.stid() & 0x7FF) as u32; + let exid = rir.exid() & 0x3FFFF; + let id = (stid << 18) | (exid); + embedded_can::ExtendedId::new(id).unwrap().into() + }; + let rdtr = fifo.rdtr().read(); + let data_len = rdtr.dlc(); + let rtr = rir.rtr() == stm32_metapac::can::vals::Rtr::REMOTE; + + #[cfg(not(feature = "time"))] + let ts = rdtr.time(); + + let mut data: [u8; 8] = [0; 8]; + data[0..4].copy_from_slice(&fifo.rdlr().read().0.to_ne_bytes()); + data[4..8].copy_from_slice(&fifo.rdhr().read().0.to_ne_bytes()); + + let frame = Frame::new(Header::new(id, data_len, rtr), &data).unwrap(); + let envelope = Envelope { ts, frame }; + + rfr.modify(|v| v.set_rfom(true)); + + Some(envelope) + } +} + +/// Identifier of a CAN message. +/// +/// Can be either a standard identifier (11bit, Range: 0..0x3FF) or a +/// extendended identifier (29bit , Range: 0..0x1FFFFFFF). +/// +/// The `Ord` trait can be used to determine the frame’s priority this ID +/// belongs to. +/// Lower identifier values have a higher priority. Additionally standard frames +/// have a higher priority than extended frames and data frames have a higher +/// priority than remote frames. +#[derive(Clone, Copy, Debug, PartialEq, Eq)] +#[cfg_attr(feature = "defmt", derive(defmt::Format))] +pub(crate) struct IdReg(u32); + +impl IdReg { + const STANDARD_SHIFT: u32 = 21; + + const EXTENDED_SHIFT: u32 = 3; + + const IDE_MASK: u32 = 0x0000_0004; + + const RTR_MASK: u32 = 0x0000_0002; + + /// Creates a new standard identifier (11bit, Range: 0..0x7FF) + /// + /// Panics for IDs outside the allowed range. + fn new_standard(id: StandardId) -> Self { + Self(u32::from(id.as_raw()) << Self::STANDARD_SHIFT) + } + + /// Creates a new extendended identifier (29bit , Range: 0..0x1FFFFFFF). + /// + /// Panics for IDs outside the allowed range. + fn new_extended(id: ExtendedId) -> IdReg { + Self(id.as_raw() << Self::EXTENDED_SHIFT | Self::IDE_MASK) + } + + fn from_register(reg: u32) -> IdReg { + Self(reg & 0xFFFF_FFFE) + } + + /// Returns the identifier. + fn to_id(self) -> Id { + if self.is_extended() { + Id::Extended(unsafe { ExtendedId::new_unchecked(self.0 >> Self::EXTENDED_SHIFT) }) + } else { + Id::Standard(unsafe { StandardId::new_unchecked((self.0 >> Self::STANDARD_SHIFT) as u16) }) + } + } + + /// Returns the identifier. + fn id(self) -> embedded_can::Id { + if self.is_extended() { + embedded_can::ExtendedId::new(self.0 >> Self::EXTENDED_SHIFT) + .unwrap() + .into() + } else { + embedded_can::StandardId::new((self.0 >> Self::STANDARD_SHIFT) as u16) + .unwrap() + .into() + } + } + + /// Returns `true` if the identifier is an extended identifier. + fn is_extended(self) -> bool { + self.0 & Self::IDE_MASK != 0 + } + + /// Returns `true` if the identifer is part of a remote frame (RTR bit set). + fn rtr(self) -> bool { + self.0 & Self::RTR_MASK != 0 + } +} + +impl From<&embedded_can::Id> for IdReg { + fn from(eid: &embedded_can::Id) -> Self { + match eid { + embedded_can::Id::Standard(id) => IdReg::new_standard(StandardId::new(id.as_raw()).unwrap()), + embedded_can::Id::Extended(id) => IdReg::new_extended(ExtendedId::new(id.as_raw()).unwrap()), + } + } +} + +impl From for embedded_can::Id { + fn from(idr: IdReg) -> Self { + idr.id() + } +} + +/// `IdReg` is ordered by priority. +impl Ord for IdReg { + fn cmp(&self, other: &Self) -> Ordering { + // When the IDs match, data frames have priority over remote frames. + let rtr = self.rtr().cmp(&other.rtr()).reverse(); + + let id_a = self.to_id(); + let id_b = other.to_id(); + match (id_a, id_b) { + (Id::Standard(a), Id::Standard(b)) => { + // Lower IDs have priority over higher IDs. + a.as_raw().cmp(&b.as_raw()).reverse().then(rtr) + } + (Id::Extended(a), Id::Extended(b)) => a.as_raw().cmp(&b.as_raw()).reverse().then(rtr), + (Id::Standard(a), Id::Extended(b)) => { + // Standard frames have priority over extended frames if their Base IDs match. + a.as_raw() + .cmp(&b.standard_id().as_raw()) + .reverse() + .then(Ordering::Greater) + } + (Id::Extended(a), Id::Standard(b)) => { + a.standard_id().as_raw().cmp(&b.as_raw()).reverse().then(Ordering::Less) + } + } + } +} + +impl PartialOrd for IdReg { + fn partial_cmp(&self, other: &Self) -> Option { + Some(self.cmp(other)) + } +} + +#[derive(Debug, Copy, Clone, Eq, PartialEq)] +pub(crate) enum RxFifo { + Fifo0, + Fifo1, +} diff --git a/embassy-stm32/src/can/common.rs b/embassy-stm32/src/can/common.rs index 570761b19..a54b54f6e 100644 --- a/embassy-stm32/src/can/common.rs +++ b/embassy-stm32/src/can/common.rs @@ -1,7 +1,7 @@ use embassy_sync::channel::{DynamicReceiver, DynamicSender}; -use crate::can::_version::enums::*; -use crate::can::_version::frame::*; +use super::enums::*; +use super::frame::*; pub(crate) struct ClassicBufferedRxInner { pub rx_sender: DynamicSender<'static, Result>, diff --git a/embassy-stm32/src/can/fdcan.rs b/embassy-stm32/src/can/fdcan.rs index 2ccf4b093..e31821ca2 100644 --- a/embassy-stm32/src/can/fdcan.rs +++ b/embassy-stm32/src/can/fdcan.rs @@ -14,19 +14,15 @@ use crate::interrupt::typelevel::Interrupt; use crate::rcc::RccPeripheral; use crate::{interrupt, peripherals, Peripheral}; -mod common; -pub mod enums; pub(crate) mod fd; -pub mod frame; -mod util; -use enums::*; -use fd::config::*; -use fd::filter::*; -pub use fd::{config, filter}; -use frame::*; - -pub use self::common::{BufferedCanReceiver, BufferedCanSender}; +use self::fd::config::*; +use self::fd::filter::*; +pub use self::fd::{config, filter}; +pub use super::common::{BufferedCanReceiver, BufferedCanSender}; +use super::enums::*; +use super::frame::*; +use super::util; /// Timestamp for incoming packets. Use Embassy time when enabled. #[cfg(feature = "time")] @@ -439,10 +435,10 @@ impl<'c, 'd, T: Instance, const TX_BUF_SIZE: usize, const RX_BUF_SIZE: usize> fn setup(self) -> Self { // We don't want interrupts being processed while we change modes. critical_section::with(|_| unsafe { - let rx_inner = self::common::ClassicBufferedRxInner { + let rx_inner = super::common::ClassicBufferedRxInner { rx_sender: self.rx_buf.sender().into(), }; - let tx_inner = self::common::ClassicBufferedTxInner { + let tx_inner = super::common::ClassicBufferedTxInner { tx_receiver: self.tx_buf.receiver().into(), }; T::mut_state().rx_mode = RxMode::ClassicBuffered(rx_inner); @@ -555,10 +551,10 @@ impl<'c, 'd, T: Instance, const TX_BUF_SIZE: usize, const RX_BUF_SIZE: usize> fn setup(self) -> Self { // We don't want interrupts being processed while we change modes. critical_section::with(|_| unsafe { - let rx_inner = self::common::FdBufferedRxInner { + let rx_inner = super::common::FdBufferedRxInner { rx_sender: self.rx_buf.sender().into(), }; - let tx_inner = self::common::FdBufferedTxInner { + let tx_inner = super::common::FdBufferedTxInner { tx_receiver: self.tx_buf.receiver().into(), }; T::mut_state().rx_mode = RxMode::FdBuffered(rx_inner); @@ -649,8 +645,8 @@ impl<'c, 'd, T: Instance> CanRx<'d, T> { enum RxMode { NonBuffered(AtomicWaker), - ClassicBuffered(self::common::ClassicBufferedRxInner), - FdBuffered(self::common::FdBufferedRxInner), + ClassicBuffered(super::common::ClassicBufferedRxInner), + FdBuffered(super::common::FdBufferedRxInner), } impl RxMode { @@ -758,8 +754,8 @@ impl RxMode { enum TxMode { NonBuffered(AtomicWaker), - ClassicBuffered(self::common::ClassicBufferedTxInner), - FdBuffered(self::common::FdBufferedTxInner), + ClassicBuffered(super::common::ClassicBufferedTxInner), + FdBuffered(super::common::FdBufferedTxInner), } impl TxMode { diff --git a/embassy-stm32/src/can/mod.rs b/embassy-stm32/src/can/mod.rs index 915edb3a6..410a6bfcb 100644 --- a/embassy-stm32/src/can/mod.rs +++ b/embassy-stm32/src/can/mod.rs @@ -1,7 +1,14 @@ //! Controller Area Network (CAN) #![macro_use] -#[cfg_attr(can_bxcan, path = "bxcan.rs")] +#[cfg_attr(can_bxcan, path = "bxcan/mod.rs")] #[cfg_attr(any(can_fdcan_v1, can_fdcan_h7), path = "fdcan.rs")] mod _version; pub use _version::*; + +mod common; +pub mod enums; +pub mod frame; +pub mod util; + +pub use frame::Frame; diff --git a/examples/stm32f1/src/bin/can.rs b/examples/stm32f1/src/bin/can.rs index 90cb9e46b..1c13d623d 100644 --- a/examples/stm32f1/src/bin/can.rs +++ b/examples/stm32f1/src/bin/can.rs @@ -3,8 +3,9 @@ use defmt::*; use embassy_executor::Spawner; +use embassy_stm32::can::frame::Envelope; use embassy_stm32::can::{ - filter, Can, Envelope, Fifo, Frame, Id, Rx0InterruptHandler, Rx1InterruptHandler, SceInterruptHandler, StandardId, + filter, Can, Fifo, Frame, Id, Rx0InterruptHandler, Rx1InterruptHandler, SceInterruptHandler, StandardId, TxInterruptHandler, }; use embassy_stm32::peripherals::CAN; @@ -55,17 +56,13 @@ async fn main(_spawner: Spawner) { let mut can = Can::new(p.CAN, p.PB8, p.PB9, Irqs); - can.as_mut() - .modify_filters() + can.modify_filters() .enable_bank(0, Fifo::Fifo0, filter::Mask32::accept_all()); - can.as_mut() - .modify_config() + can.modify_config() .set_loopback(false) .set_silent(false) - .leave_disabled(); - - can.set_bitrate(250_000); + .set_bitrate(250_000); can.enable().await; let mut i: u8 = 0; diff --git a/examples/stm32f4/src/bin/can.rs b/examples/stm32f4/src/bin/can.rs index 71b9453eb..cedc057a7 100644 --- a/examples/stm32f4/src/bin/can.rs +++ b/examples/stm32f4/src/bin/can.rs @@ -35,17 +35,12 @@ async fn main(_spawner: Spawner) { let mut can = Can::new(p.CAN1, p.PA11, p.PA12, Irqs); - can.as_mut() - .modify_filters() - .enable_bank(0, Fifo::Fifo0, Mask32::accept_all()); + can.modify_filters().enable_bank(0, Fifo::Fifo0, Mask32::accept_all()); - can.as_mut() - .modify_config() + can.modify_config() .set_loopback(true) // Receive own frames .set_silent(true) - .leave_disabled(); - - can.set_bitrate(1_000_000); + .set_bitrate(1_000_000); can.enable().await; diff --git a/examples/stm32f7/src/bin/can.rs b/examples/stm32f7/src/bin/can.rs index 221ac2a05..e32b4d3df 100644 --- a/examples/stm32f7/src/bin/can.rs +++ b/examples/stm32f7/src/bin/can.rs @@ -47,20 +47,18 @@ async fn main(spawner: Spawner) { static CAN: StaticCell> = StaticCell::new(); let can = CAN.init(Can::new(p.CAN3, p.PA8, p.PA15, Irqs)); - can.as_mut() - .modify_filters() - .enable_bank(0, Fifo::Fifo0, Mask32::accept_all()); + can.modify_filters().enable_bank(0, Fifo::Fifo0, Mask32::accept_all()); - can.as_mut() - .modify_config() + can.modify_config() .set_bit_timing(can::util::NominalBitTiming { prescaler: NonZeroU16::new(2).unwrap(), seg1: NonZeroU8::new(13).unwrap(), seg2: NonZeroU8::new(2).unwrap(), sync_jump_width: NonZeroU8::new(1).unwrap(), }) // http://www.bittiming.can-wiki.info/ - .set_loopback(true) - .enable(); + .set_loopback(true); + + can.enable().await; let (tx, mut rx) = can.split(); diff --git a/tests/stm32/src/bin/can.rs b/tests/stm32/src/bin/can.rs index 74d84c42f..551764458 100644 --- a/tests/stm32/src/bin/can.rs +++ b/tests/stm32/src/bin/can.rs @@ -8,9 +8,10 @@ mod common; use common::*; use embassy_executor::Spawner; use embassy_stm32::bind_interrupts; -use embassy_stm32::can::bx::filter::Mask32; -use embassy_stm32::can::bx::Fifo; -use embassy_stm32::can::{Can, Rx0InterruptHandler, Rx1InterruptHandler, SceInterruptHandler, TxInterruptHandler}; +use embassy_stm32::can::filter::Mask32; +use embassy_stm32::can::{ + Can, Fifo, Rx0InterruptHandler, Rx1InterruptHandler, SceInterruptHandler, TxInterruptHandler, +}; use embassy_stm32::gpio::{Input, Pull}; use embassy_stm32::peripherals::CAN1; use embassy_time::Duration; @@ -51,17 +52,15 @@ async fn main(_spawner: Spawner) { info!("Configuring can..."); - can.as_mut() - .modify_filters() - .enable_bank(0, Fifo::Fifo0, Mask32::accept_all()); + can.modify_filters().enable_bank(0, Fifo::Fifo0, Mask32::accept_all()); - can.set_bitrate(1_000_000); - can.as_mut() - .modify_config() + can.modify_config() .set_loopback(true) // Receive own frames .set_silent(true) // .set_bit_timing(0x001c0003) - .enable(); + .set_bitrate(1_000_000); + + can.enable().await; info!("Can configured"); From aa9eb2ab01cb21e06bb12efb425088827f6127d9 Mon Sep 17 00:00:00 2001 From: Alexandru RADOVICI Date: Tue, 2 Apr 2024 17:20:35 +0300 Subject: [PATCH 064/581] rename PWM_CH to PWM_SLICE --- embassy-rp/src/lib.rs | 16 +++---- embassy-rp/src/pwm.rs | 76 +++++++++++++++--------------- examples/rp/src/bin/pio_hd44780.rs | 2 +- examples/rp/src/bin/pwm.rs | 2 +- examples/rp/src/bin/pwm_input.rs | 2 +- tests/rp/src/bin/pwm.rs | 14 +++--- 6 files changed, 56 insertions(+), 56 deletions(-) diff --git a/embassy-rp/src/lib.rs b/embassy-rp/src/lib.rs index d91cea410..1c83e306d 100644 --- a/embassy-rp/src/lib.rs +++ b/embassy-rp/src/lib.rs @@ -183,14 +183,14 @@ embassy_hal_internal::peripherals! { DMA_CH10, DMA_CH11, - PWM_CH0, - PWM_CH1, - PWM_CH2, - PWM_CH3, - PWM_CH4, - PWM_CH5, - PWM_CH6, - PWM_CH7, + PWM_SLICE0, + PWM_SLICE1, + PWM_SLICE2, + PWM_SLICE3, + PWM_SLICE4, + PWM_SLICE5, + PWM_SLICE6, + PWM_SLICE7, USB, diff --git a/embassy-rp/src/pwm.rs b/embassy-rp/src/pwm.rs index e6f3b2aa2..3b980108a 100644 --- a/embassy-rp/src/pwm.rs +++ b/embassy-rp/src/pwm.rs @@ -326,14 +326,14 @@ macro_rules! channel { }; } -channel!(PWM_CH0, 0); -channel!(PWM_CH1, 1); -channel!(PWM_CH2, 2); -channel!(PWM_CH3, 3); -channel!(PWM_CH4, 4); -channel!(PWM_CH5, 5); -channel!(PWM_CH6, 6); -channel!(PWM_CH7, 7); +channel!(PWM_SLICE0, 0); +channel!(PWM_SLICE1, 1); +channel!(PWM_SLICE2, 2); +channel!(PWM_SLICE3, 3); +channel!(PWM_SLICE4, 4); +channel!(PWM_SLICE5, 5); +channel!(PWM_SLICE6, 6); +channel!(PWM_SLICE7, 7); /// PWM Pin A. pub trait PwmPinA: GpioPin {} @@ -346,33 +346,33 @@ macro_rules! impl_pin { }; } -impl_pin!(PIN_0, PWM_CH0, PwmPinA); -impl_pin!(PIN_1, PWM_CH0, PwmPinB); -impl_pin!(PIN_2, PWM_CH1, PwmPinA); -impl_pin!(PIN_3, PWM_CH1, PwmPinB); -impl_pin!(PIN_4, PWM_CH2, PwmPinA); -impl_pin!(PIN_5, PWM_CH2, PwmPinB); -impl_pin!(PIN_6, PWM_CH3, PwmPinA); -impl_pin!(PIN_7, PWM_CH3, PwmPinB); -impl_pin!(PIN_8, PWM_CH4, PwmPinA); -impl_pin!(PIN_9, PWM_CH4, PwmPinB); -impl_pin!(PIN_10, PWM_CH5, PwmPinA); -impl_pin!(PIN_11, PWM_CH5, PwmPinB); -impl_pin!(PIN_12, PWM_CH6, PwmPinA); -impl_pin!(PIN_13, PWM_CH6, PwmPinB); -impl_pin!(PIN_14, PWM_CH7, PwmPinA); -impl_pin!(PIN_15, PWM_CH7, PwmPinB); -impl_pin!(PIN_16, PWM_CH0, PwmPinA); -impl_pin!(PIN_17, PWM_CH0, PwmPinB); -impl_pin!(PIN_18, PWM_CH1, PwmPinA); -impl_pin!(PIN_19, PWM_CH1, PwmPinB); -impl_pin!(PIN_20, PWM_CH2, PwmPinA); -impl_pin!(PIN_21, PWM_CH2, PwmPinB); -impl_pin!(PIN_22, PWM_CH3, PwmPinA); -impl_pin!(PIN_23, PWM_CH3, PwmPinB); -impl_pin!(PIN_24, PWM_CH4, PwmPinA); -impl_pin!(PIN_25, PWM_CH4, PwmPinB); -impl_pin!(PIN_26, PWM_CH5, PwmPinA); -impl_pin!(PIN_27, PWM_CH5, PwmPinB); -impl_pin!(PIN_28, PWM_CH6, PwmPinA); -impl_pin!(PIN_29, PWM_CH6, PwmPinB); +impl_pin!(PIN_0, PWM_SLICE0, PwmPinA); +impl_pin!(PIN_1, PWM_SLICE0, PwmPinB); +impl_pin!(PIN_2, PWM_SLICE1, PwmPinA); +impl_pin!(PIN_3, PWM_SLICE1, PwmPinB); +impl_pin!(PIN_4, PWM_SLICE2, PwmPinA); +impl_pin!(PIN_5, PWM_SLICE2, PwmPinB); +impl_pin!(PIN_6, PWM_SLICE3, PwmPinA); +impl_pin!(PIN_7, PWM_SLICE3, PwmPinB); +impl_pin!(PIN_8, PWM_SLICE4, PwmPinA); +impl_pin!(PIN_9, PWM_SLICE4, PwmPinB); +impl_pin!(PIN_10, PWM_SLICE5, PwmPinA); +impl_pin!(PIN_11, PWM_SLICE5, PwmPinB); +impl_pin!(PIN_12, PWM_SLICE6, PwmPinA); +impl_pin!(PIN_13, PWM_SLICE6, PwmPinB); +impl_pin!(PIN_14, PWM_SLICE7, PwmPinA); +impl_pin!(PIN_15, PWM_SLICE7, PwmPinB); +impl_pin!(PIN_16, PWM_SLICE0, PwmPinA); +impl_pin!(PIN_17, PWM_SLICE0, PwmPinB); +impl_pin!(PIN_18, PWM_SLICE1, PwmPinA); +impl_pin!(PIN_19, PWM_SLICE1, PwmPinB); +impl_pin!(PIN_20, PWM_SLICE2, PwmPinA); +impl_pin!(PIN_21, PWM_SLICE2, PwmPinB); +impl_pin!(PIN_22, PWM_SLICE3, PwmPinA); +impl_pin!(PIN_23, PWM_SLICE3, PwmPinB); +impl_pin!(PIN_24, PWM_SLICE4, PwmPinA); +impl_pin!(PIN_25, PWM_SLICE4, PwmPinB); +impl_pin!(PIN_26, PWM_SLICE5, PwmPinA); +impl_pin!(PIN_27, PWM_SLICE5, PwmPinB); +impl_pin!(PIN_28, PWM_SLICE6, PwmPinA); +impl_pin!(PIN_29, PWM_SLICE6, PwmPinB); diff --git a/examples/rp/src/bin/pio_hd44780.rs b/examples/rp/src/bin/pio_hd44780.rs index 3fab7b5f2..6c02630e0 100644 --- a/examples/rp/src/bin/pio_hd44780.rs +++ b/examples/rp/src/bin/pio_hd44780.rs @@ -35,7 +35,7 @@ async fn main(_spawner: Spawner) { // allowing direct connection of the display to the RP2040 without level shifters. let p = embassy_rp::init(Default::default()); - let _pwm = Pwm::new_output_b(p.PWM_CH7, p.PIN_15, { + let _pwm = Pwm::new_output_b(p.PWM_SLICE7, p.PIN_15, { let mut c = pwm::Config::default(); c.divider = 125.into(); c.top = 100; diff --git a/examples/rp/src/bin/pwm.rs b/examples/rp/src/bin/pwm.rs index 4fb62546d..26e233260 100644 --- a/examples/rp/src/bin/pwm.rs +++ b/examples/rp/src/bin/pwm.rs @@ -18,7 +18,7 @@ async fn main(_spawner: Spawner) { let mut c: Config = Default::default(); c.top = 0x8000; c.compare_b = 8; - let mut pwm = Pwm::new_output_b(p.PWM_CH4, p.PIN_25, c.clone()); + let mut pwm = Pwm::new_output_b(p.PWM_SLICE4, p.PIN_25, c.clone()); loop { info!("current LED duty cycle: {}/32768", c.compare_b); diff --git a/examples/rp/src/bin/pwm_input.rs b/examples/rp/src/bin/pwm_input.rs index e7bcbfbd4..0652dc42b 100644 --- a/examples/rp/src/bin/pwm_input.rs +++ b/examples/rp/src/bin/pwm_input.rs @@ -14,7 +14,7 @@ async fn main(_spawner: Spawner) { let p = embassy_rp::init(Default::default()); let cfg: Config = Default::default(); - let pwm = Pwm::new_input(p.PWM_CH2, p.PIN_5, InputMode::RisingEdge, cfg); + let pwm = Pwm::new_input(p.PWM_SLICE2, p.PIN_5, InputMode::RisingEdge, cfg); let mut ticker = Ticker::every(Duration::from_secs(1)); loop { diff --git a/tests/rp/src/bin/pwm.rs b/tests/rp/src/bin/pwm.rs index e71d9e610..4b02e5bab 100644 --- a/tests/rp/src/bin/pwm.rs +++ b/tests/rp/src/bin/pwm.rs @@ -28,7 +28,7 @@ async fn main(_spawner: Spawner) { // Test free-running clock { - let pwm = Pwm::new_free(&mut p.PWM_CH3, cfg.clone()); + let pwm = Pwm::new_free(&mut p.PWM_SLICE3, cfg.clone()); cortex_m::asm::delay(125); let ctr = pwm.counter(); assert!(ctr > 0); @@ -46,7 +46,7 @@ async fn main(_spawner: Spawner) { // Test output from A { let pin1 = Input::new(&mut p9, Pull::None); - let _pwm = Pwm::new_output_a(&mut p.PWM_CH3, &mut p6, cfg.clone()); + let _pwm = Pwm::new_output_a(&mut p.PWM_SLICE3, &mut p6, cfg.clone()); Timer::after_millis(1).await; assert_eq!(pin1.is_low(), invert_a); Timer::after_millis(5).await; @@ -60,7 +60,7 @@ async fn main(_spawner: Spawner) { // Test output from B { let pin2 = Input::new(&mut p11, Pull::None); - let _pwm = Pwm::new_output_b(&mut p.PWM_CH3, &mut p7, cfg.clone()); + let _pwm = Pwm::new_output_b(&mut p.PWM_SLICE3, &mut p7, cfg.clone()); Timer::after_millis(1).await; assert_ne!(pin2.is_low(), invert_a); Timer::after_millis(5).await; @@ -75,7 +75,7 @@ async fn main(_spawner: Spawner) { { let pin1 = Input::new(&mut p9, Pull::None); let pin2 = Input::new(&mut p11, Pull::None); - let _pwm = Pwm::new_output_ab(&mut p.PWM_CH3, &mut p6, &mut p7, cfg.clone()); + let _pwm = Pwm::new_output_ab(&mut p.PWM_SLICE3, &mut p6, &mut p7, cfg.clone()); Timer::after_millis(1).await; assert_eq!(pin1.is_low(), invert_a); assert_ne!(pin2.is_low(), invert_a); @@ -94,7 +94,7 @@ async fn main(_spawner: Spawner) { // Test level-gated { let mut pin2 = Output::new(&mut p11, Level::Low); - let pwm = Pwm::new_input(&mut p.PWM_CH3, &mut p7, InputMode::Level, cfg.clone()); + let pwm = Pwm::new_input(&mut p.PWM_SLICE3, &mut p7, InputMode::Level, cfg.clone()); assert_eq!(pwm.counter(), 0); Timer::after_millis(5).await; assert_eq!(pwm.counter(), 0); @@ -110,7 +110,7 @@ async fn main(_spawner: Spawner) { // Test rising-gated { let mut pin2 = Output::new(&mut p11, Level::Low); - let pwm = Pwm::new_input(&mut p.PWM_CH3, &mut p7, InputMode::RisingEdge, cfg.clone()); + let pwm = Pwm::new_input(&mut p.PWM_SLICE3, &mut p7, InputMode::RisingEdge, cfg.clone()); assert_eq!(pwm.counter(), 0); Timer::after_millis(5).await; assert_eq!(pwm.counter(), 0); @@ -125,7 +125,7 @@ async fn main(_spawner: Spawner) { // Test falling-gated { let mut pin2 = Output::new(&mut p11, Level::High); - let pwm = Pwm::new_input(&mut p.PWM_CH3, &mut p7, InputMode::FallingEdge, cfg.clone()); + let pwm = Pwm::new_input(&mut p.PWM_SLICE3, &mut p7, InputMode::FallingEdge, cfg.clone()); assert_eq!(pwm.counter(), 0); Timer::after_millis(5).await; assert_eq!(pwm.counter(), 0); From 47b492ba055910e4f5f1d32193d07a7689d3398e Mon Sep 17 00:00:00 2001 From: Karun Date: Tue, 2 Apr 2024 12:01:33 -0400 Subject: [PATCH 065/581] retrigger checks From 7b9546c9c8206147d1d79ba34ac19e97bb735c57 Mon Sep 17 00:00:00 2001 From: Alexandru RADOVICI Date: Tue, 2 Apr 2024 19:42:37 +0300 Subject: [PATCH 066/581] rename the Channel trait to Slice and the PwmPin to PwmChannel --- embassy-rp/src/pwm.rs | 116 +++++++++++++++++++++--------------------- 1 file changed, 58 insertions(+), 58 deletions(-) diff --git a/embassy-rp/src/pwm.rs b/embassy-rp/src/pwm.rs index 3b980108a..2a6772043 100644 --- a/embassy-rp/src/pwm.rs +++ b/embassy-rp/src/pwm.rs @@ -129,7 +129,7 @@ impl<'d, T: Channel> Pwm<'d, T> { #[inline] pub fn new_output_a( inner: impl Peripheral

+ 'd, - a: impl Peripheral

> + 'd, + a: impl Peripheral

> + 'd, config: Config, ) -> Self { into_ref!(a); @@ -140,7 +140,7 @@ impl<'d, T: Channel> Pwm<'d, T> { #[inline] pub fn new_output_b( inner: impl Peripheral

+ 'd, - b: impl Peripheral

> + 'd, + b: impl Peripheral

> + 'd, config: Config, ) -> Self { into_ref!(b); @@ -151,8 +151,8 @@ impl<'d, T: Channel> Pwm<'d, T> { #[inline] pub fn new_output_ab( inner: impl Peripheral

+ 'd, - a: impl Peripheral

> + 'd, - b: impl Peripheral

> + 'd, + a: impl Peripheral

> + 'd, + b: impl Peripheral

> + 'd, config: Config, ) -> Self { into_ref!(a, b); @@ -163,7 +163,7 @@ impl<'d, T: Channel> Pwm<'d, T> { #[inline] pub fn new_input( inner: impl Peripheral

+ 'd, - b: impl Peripheral

> + 'd, + b: impl Peripheral

> + 'd, mode: InputMode, config: Config, ) -> Self { @@ -175,8 +175,8 @@ impl<'d, T: Channel> Pwm<'d, T> { #[inline] pub fn new_output_input( inner: impl Peripheral

+ 'd, - a: impl Peripheral

> + 'd, - b: impl Peripheral

> + 'd, + a: impl Peripheral

> + 'd, + b: impl Peripheral

> + 'd, mode: InputMode, config: Config, ) -> Self { @@ -301,24 +301,24 @@ impl<'d, T: Channel> Drop for Pwm<'d, T> { } mod sealed { - pub trait Channel {} + pub trait Slice {} } -/// PWM Channel. -pub trait Channel: Peripheral

+ sealed::Channel + Sized + 'static { - /// Channel number. +/// PWM Slice. +pub trait Slice: Peripheral

+ sealed::Channel + Sized + 'static { + /// Slice number. fn number(&self) -> u8; - /// Channel register block. + /// Slice register block. fn regs(&self) -> pac::pwm::Channel { pac::PWM.ch(self.number() as _) } } -macro_rules! channel { +macro_rules! slice { ($name:ident, $num:expr) => { - impl sealed::Channel for peripherals::$name {} - impl Channel for peripherals::$name { + impl sealed::Slice for peripherals::$name {} + impl Slice for peripherals::$name { fn number(&self) -> u8 { $num } @@ -326,53 +326,53 @@ macro_rules! channel { }; } -channel!(PWM_SLICE0, 0); -channel!(PWM_SLICE1, 1); -channel!(PWM_SLICE2, 2); -channel!(PWM_SLICE3, 3); -channel!(PWM_SLICE4, 4); -channel!(PWM_SLICE5, 5); -channel!(PWM_SLICE6, 6); -channel!(PWM_SLICE7, 7); +slice!(PWM_SLICE0, 0); +slice!(PWM_SLICE1, 1); +slice!(PWM_SLICE2, 2); +slice!(PWM_SLICE3, 3); +slice!(PWM_SLICE4, 4); +slice!(PWM_SLICE5, 5); +slice!(PWM_SLICE6, 6); +slice!(PWM_SLICE7, 7); -/// PWM Pin A. -pub trait PwmPinA: GpioPin {} -/// PWM Pin B. -pub trait PwmPinB: GpioPin {} +/// PWM Channel A. +pub trait PwmChannelA: GpioPin {} +/// PWM Channel B. +pub trait PwmChannelB: GpioPin {} -macro_rules! impl_pin { +macro_rules! impl_channel { ($pin:ident, $channel:ident, $kind:ident) => { impl $kind for peripherals::$pin {} }; } -impl_pin!(PIN_0, PWM_SLICE0, PwmPinA); -impl_pin!(PIN_1, PWM_SLICE0, PwmPinB); -impl_pin!(PIN_2, PWM_SLICE1, PwmPinA); -impl_pin!(PIN_3, PWM_SLICE1, PwmPinB); -impl_pin!(PIN_4, PWM_SLICE2, PwmPinA); -impl_pin!(PIN_5, PWM_SLICE2, PwmPinB); -impl_pin!(PIN_6, PWM_SLICE3, PwmPinA); -impl_pin!(PIN_7, PWM_SLICE3, PwmPinB); -impl_pin!(PIN_8, PWM_SLICE4, PwmPinA); -impl_pin!(PIN_9, PWM_SLICE4, PwmPinB); -impl_pin!(PIN_10, PWM_SLICE5, PwmPinA); -impl_pin!(PIN_11, PWM_SLICE5, PwmPinB); -impl_pin!(PIN_12, PWM_SLICE6, PwmPinA); -impl_pin!(PIN_13, PWM_SLICE6, PwmPinB); -impl_pin!(PIN_14, PWM_SLICE7, PwmPinA); -impl_pin!(PIN_15, PWM_SLICE7, PwmPinB); -impl_pin!(PIN_16, PWM_SLICE0, PwmPinA); -impl_pin!(PIN_17, PWM_SLICE0, PwmPinB); -impl_pin!(PIN_18, PWM_SLICE1, PwmPinA); -impl_pin!(PIN_19, PWM_SLICE1, PwmPinB); -impl_pin!(PIN_20, PWM_SLICE2, PwmPinA); -impl_pin!(PIN_21, PWM_SLICE2, PwmPinB); -impl_pin!(PIN_22, PWM_SLICE3, PwmPinA); -impl_pin!(PIN_23, PWM_SLICE3, PwmPinB); -impl_pin!(PIN_24, PWM_SLICE4, PwmPinA); -impl_pin!(PIN_25, PWM_SLICE4, PwmPinB); -impl_pin!(PIN_26, PWM_SLICE5, PwmPinA); -impl_pin!(PIN_27, PWM_SLICE5, PwmPinB); -impl_pin!(PIN_28, PWM_SLICE6, PwmPinA); -impl_pin!(PIN_29, PWM_SLICE6, PwmPinB); +impl_channel!(PIN_0, PWM_SLICE0, PwmChannelA); +impl_channel!(PIN_1, PWM_SLICE0, PwmChannelB); +impl_channel!(PIN_2, PWM_SLICE1, PwmChannelA); +impl_channel!(PIN_3, PWM_SLICE1, PwmChannelB); +impl_channel!(PIN_4, PWM_SLICE2, PwmChannelA); +impl_channel!(PIN_5, PWM_SLICE2, PwmChannelB); +impl_channel!(PIN_6, PWM_SLICE3, PwmChannelA); +impl_channel!(PIN_7, PWM_SLICE3, PwmChannelB); +impl_channel!(PIN_8, PWM_SLICE4, PwmChannelA); +impl_channel!(PIN_9, PWM_SLICE4, PwmChannelB); +impl_channel!(PIN_10, PWM_SLICE5, PwmChannelA); +impl_channel!(PIN_11, PWM_SLICE5, PwmChannelB); +impl_channel!(PIN_12, PWM_SLICE6, PwmChannelA); +impl_channel!(PIN_13, PWM_SLICE6, PwmChannelB); +impl_channel!(PIN_14, PWM_SLICE7, PwmChannelA); +impl_channel!(PIN_15, PWM_SLICE7, PwmChannelB); +impl_channel!(PIN_16, PWM_SLICE0, PwmChannelA); +impl_channel!(PIN_17, PWM_SLICE0, PwmChannelB); +impl_channel!(PIN_18, PWM_SLICE1, PwmChannelA); +impl_channel!(PIN_19, PWM_SLICE1, PwmChannelB); +impl_channel!(PIN_20, PWM_SLICE2, PwmChannelA); +impl_channel!(PIN_21, PWM_SLICE2, PwmChannelB); +impl_channel!(PIN_22, PWM_SLICE3, PwmChannelA); +impl_channel!(PIN_23, PWM_SLICE3, PwmChannelB); +impl_channel!(PIN_24, PWM_SLICE4, PwmChannelA); +impl_channel!(PIN_25, PWM_SLICE4, PwmChannelB); +impl_channel!(PIN_26, PWM_SLICE5, PwmChannelA); +impl_channel!(PIN_27, PWM_SLICE5, PwmChannelB); +impl_channel!(PIN_28, PWM_SLICE6, PwmChannelA); +impl_channel!(PIN_29, PWM_SLICE6, PwmChannelB); From d35572c11f11980bebfda4d8738f46202c3384c3 Mon Sep 17 00:00:00 2001 From: Alexandru RADOVICI Date: Tue, 2 Apr 2024 19:50:13 +0300 Subject: [PATCH 067/581] rename pwm channels to pwm slices, including in documentation --- embassy-rp/src/pwm.rs | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/embassy-rp/src/pwm.rs b/embassy-rp/src/pwm.rs index 2a6772043..d0e89f250 100644 --- a/embassy-rp/src/pwm.rs +++ b/embassy-rp/src/pwm.rs @@ -82,13 +82,13 @@ impl From for Divmode { } /// PWM driver. -pub struct Pwm<'d, T: Channel> { +pub struct Pwm<'d, T: Slice> { inner: PeripheralRef<'d, T>, pin_a: Option>, pin_b: Option>, } -impl<'d, T: Channel> Pwm<'d, T> { +impl<'d, T: Slice> Pwm<'d, T> { fn new_inner( inner: impl Peripheral

+ 'd, a: Option>, @@ -265,18 +265,18 @@ impl<'d, T: Channel> Pwm<'d, T> { } } -/// Batch representation of PWM channels. +/// Batch representation of PWM slices. pub struct PwmBatch(u32); impl PwmBatch { #[inline] - /// Enable a PWM channel in this batch. - pub fn enable(&mut self, pwm: &Pwm<'_, impl Channel>) { + /// Enable a PWM slice in this batch. + pub fn enable(&mut self, pwm: &Pwm<'_, impl Slice>) { self.0 |= pwm.bit(); } #[inline] - /// Enable channels in this batch in a PWM. + /// Enable slices in this batch in a PWM. pub fn set_enabled(enabled: bool, batch: impl FnOnce(&mut PwmBatch)) { let mut en = PwmBatch(0); batch(&mut en); @@ -288,7 +288,7 @@ impl PwmBatch { } } -impl<'d, T: Channel> Drop for Pwm<'d, T> { +impl<'d, T: Slice> Drop for Pwm<'d, T> { fn drop(&mut self) { self.inner.regs().csr().write_clear(|w| w.set_en(false)); if let Some(pin) = &self.pin_a { @@ -305,7 +305,7 @@ mod sealed { } /// PWM Slice. -pub trait Slice: Peripheral

+ sealed::Channel + Sized + 'static { +pub trait Slice: Peripheral

+ sealed::Slice + Sized + 'static { /// Slice number. fn number(&self) -> u8; From 7c36e8dbc7867c7fef0e74816b482a577ae2dc2d Mon Sep 17 00:00:00 2001 From: Alexandru RADOVICI Date: Tue, 2 Apr 2024 20:05:46 +0300 Subject: [PATCH 068/581] rename pins data type and the macro --- embassy-rp/src/pwm.rs | 80 +++++++++++++++++++++---------------------- 1 file changed, 40 insertions(+), 40 deletions(-) diff --git a/embassy-rp/src/pwm.rs b/embassy-rp/src/pwm.rs index d0e89f250..5aab3ff4f 100644 --- a/embassy-rp/src/pwm.rs +++ b/embassy-rp/src/pwm.rs @@ -129,7 +129,7 @@ impl<'d, T: Slice> Pwm<'d, T> { #[inline] pub fn new_output_a( inner: impl Peripheral

+ 'd, - a: impl Peripheral

> + 'd, + a: impl Peripheral

> + 'd, config: Config, ) -> Self { into_ref!(a); @@ -140,7 +140,7 @@ impl<'d, T: Slice> Pwm<'d, T> { #[inline] pub fn new_output_b( inner: impl Peripheral

+ 'd, - b: impl Peripheral

> + 'd, + b: impl Peripheral

> + 'd, config: Config, ) -> Self { into_ref!(b); @@ -151,8 +151,8 @@ impl<'d, T: Slice> Pwm<'d, T> { #[inline] pub fn new_output_ab( inner: impl Peripheral

+ 'd, - a: impl Peripheral

> + 'd, - b: impl Peripheral

> + 'd, + a: impl Peripheral

> + 'd, + b: impl Peripheral

> + 'd, config: Config, ) -> Self { into_ref!(a, b); @@ -163,7 +163,7 @@ impl<'d, T: Slice> Pwm<'d, T> { #[inline] pub fn new_input( inner: impl Peripheral

+ 'd, - b: impl Peripheral

> + 'd, + b: impl Peripheral

> + 'd, mode: InputMode, config: Config, ) -> Self { @@ -175,8 +175,8 @@ impl<'d, T: Slice> Pwm<'d, T> { #[inline] pub fn new_output_input( inner: impl Peripheral

+ 'd, - a: impl Peripheral

> + 'd, - b: impl Peripheral

> + 'd, + a: impl Peripheral

> + 'd, + b: impl Peripheral

> + 'd, mode: InputMode, config: Config, ) -> Self { @@ -336,43 +336,43 @@ slice!(PWM_SLICE6, 6); slice!(PWM_SLICE7, 7); /// PWM Channel A. -pub trait PwmChannelA: GpioPin {} +pub trait ChannelAPin: GpioPin {} /// PWM Channel B. -pub trait PwmChannelB: GpioPin {} +pub trait ChannelBPin: GpioPin {} -macro_rules! impl_channel { +macro_rules! impl_pin { ($pin:ident, $channel:ident, $kind:ident) => { impl $kind for peripherals::$pin {} }; } -impl_channel!(PIN_0, PWM_SLICE0, PwmChannelA); -impl_channel!(PIN_1, PWM_SLICE0, PwmChannelB); -impl_channel!(PIN_2, PWM_SLICE1, PwmChannelA); -impl_channel!(PIN_3, PWM_SLICE1, PwmChannelB); -impl_channel!(PIN_4, PWM_SLICE2, PwmChannelA); -impl_channel!(PIN_5, PWM_SLICE2, PwmChannelB); -impl_channel!(PIN_6, PWM_SLICE3, PwmChannelA); -impl_channel!(PIN_7, PWM_SLICE3, PwmChannelB); -impl_channel!(PIN_8, PWM_SLICE4, PwmChannelA); -impl_channel!(PIN_9, PWM_SLICE4, PwmChannelB); -impl_channel!(PIN_10, PWM_SLICE5, PwmChannelA); -impl_channel!(PIN_11, PWM_SLICE5, PwmChannelB); -impl_channel!(PIN_12, PWM_SLICE6, PwmChannelA); -impl_channel!(PIN_13, PWM_SLICE6, PwmChannelB); -impl_channel!(PIN_14, PWM_SLICE7, PwmChannelA); -impl_channel!(PIN_15, PWM_SLICE7, PwmChannelB); -impl_channel!(PIN_16, PWM_SLICE0, PwmChannelA); -impl_channel!(PIN_17, PWM_SLICE0, PwmChannelB); -impl_channel!(PIN_18, PWM_SLICE1, PwmChannelA); -impl_channel!(PIN_19, PWM_SLICE1, PwmChannelB); -impl_channel!(PIN_20, PWM_SLICE2, PwmChannelA); -impl_channel!(PIN_21, PWM_SLICE2, PwmChannelB); -impl_channel!(PIN_22, PWM_SLICE3, PwmChannelA); -impl_channel!(PIN_23, PWM_SLICE3, PwmChannelB); -impl_channel!(PIN_24, PWM_SLICE4, PwmChannelA); -impl_channel!(PIN_25, PWM_SLICE4, PwmChannelB); -impl_channel!(PIN_26, PWM_SLICE5, PwmChannelA); -impl_channel!(PIN_27, PWM_SLICE5, PwmChannelB); -impl_channel!(PIN_28, PWM_SLICE6, PwmChannelA); -impl_channel!(PIN_29, PWM_SLICE6, PwmChannelB); +impl_pin!(PIN_0, PWM_SLICE0, ChannelAPin); +impl_pin!(PIN_1, PWM_SLICE0, ChannelBPin); +impl_pin!(PIN_2, PWM_SLICE1, ChannelAPin); +impl_pin!(PIN_3, PWM_SLICE1, ChannelBPin); +impl_pin!(PIN_4, PWM_SLICE2, ChannelAPin); +impl_pin!(PIN_5, PWM_SLICE2, ChannelBPin); +impl_pin!(PIN_6, PWM_SLICE3, ChannelAPin); +impl_pin!(PIN_7, PWM_SLICE3, ChannelBPin); +impl_pin!(PIN_8, PWM_SLICE4, ChannelAPin); +impl_pin!(PIN_9, PWM_SLICE4, ChannelBPin); +impl_pin!(PIN_10, PWM_SLICE5, ChannelAPin); +impl_pin!(PIN_11, PWM_SLICE5, ChannelBPin); +impl_pin!(PIN_12, PWM_SLICE6, ChannelAPin); +impl_pin!(PIN_13, PWM_SLICE6, ChannelBPin); +impl_pin!(PIN_14, PWM_SLICE7, ChannelAPin); +impl_pin!(PIN_15, PWM_SLICE7, ChannelBPin); +impl_pin!(PIN_16, PWM_SLICE0, ChannelAPin); +impl_pin!(PIN_17, PWM_SLICE0, ChannelBPin); +impl_pin!(PIN_18, PWM_SLICE1, ChannelAPin); +impl_pin!(PIN_19, PWM_SLICE1, ChannelBPin); +impl_pin!(PIN_20, PWM_SLICE2, ChannelAPin); +impl_pin!(PIN_21, PWM_SLICE2, ChannelBPin); +impl_pin!(PIN_22, PWM_SLICE3, ChannelAPin); +impl_pin!(PIN_23, PWM_SLICE3, ChannelBPin); +impl_pin!(PIN_24, PWM_SLICE4, ChannelAPin); +impl_pin!(PIN_25, PWM_SLICE4, ChannelBPin); +impl_pin!(PIN_26, PWM_SLICE5, ChannelAPin); +impl_pin!(PIN_27, PWM_SLICE5, ChannelBPin); +impl_pin!(PIN_28, PWM_SLICE6, ChannelAPin); +impl_pin!(PIN_29, PWM_SLICE6, ChannelBPin); From d62615b5360a92fc3c039dfd9669b3e7771f1c79 Mon Sep 17 00:00:00 2001 From: Karun Date: Tue, 2 Apr 2024 15:48:39 -0400 Subject: [PATCH 069/581] Update metapac to use PR #442 with octospi rcc updates --- embassy-stm32/Cargo.toml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/embassy-stm32/Cargo.toml b/embassy-stm32/Cargo.toml index 89c17cb3d..6d1c2d25c 100644 --- a/embassy-stm32/Cargo.toml +++ b/embassy-stm32/Cargo.toml @@ -70,7 +70,7 @@ rand_core = "0.6.3" sdio-host = "0.5.0" critical-section = "1.1" #stm32-metapac = { version = "15" } -stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-e7f91751fbbf856e0cb30e50ae6db79f0409b085" } +stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-ac187e40aa97da86f7d3cf22abad918f42f01739" } vcell = "0.1.3" bxcan = "0.7.0" nb = "1.0.0" From 2caea89b6ab9859470ccf6c7d7414c01251bbecd Mon Sep 17 00:00:00 2001 From: Karun Date: Tue, 2 Apr 2024 15:50:57 -0400 Subject: [PATCH 070/581] Update build dependency as well --- embassy-stm32/Cargo.toml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/embassy-stm32/Cargo.toml b/embassy-stm32/Cargo.toml index 6d1c2d25c..158c630b9 100644 --- a/embassy-stm32/Cargo.toml +++ b/embassy-stm32/Cargo.toml @@ -95,7 +95,7 @@ proc-macro2 = "1.0.36" quote = "1.0.15" #stm32-metapac = { version = "15", default-features = false, features = ["metadata"]} -stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-e7f91751fbbf856e0cb30e50ae6db79f0409b085", default-features = false, features = ["metadata"]} +stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-ac187e40aa97da86f7d3cf22abad918f42f01739", default-features = false, features = ["metadata"]} [features] From 166c95be6c2917e5133fa361ee88d845a6f4ef73 Mon Sep 17 00:00:00 2001 From: Karun Date: Tue, 2 Apr 2024 16:14:10 -0400 Subject: [PATCH 071/581] Update to use private supertrait, following PR#2730 --- embassy-stm32/src/ospi/mod.rs | 27 ++++++++++++--------------- 1 file changed, 12 insertions(+), 15 deletions(-) diff --git a/embassy-stm32/src/ospi/mod.rs b/embassy-stm32/src/ospi/mod.rs index 794bdd127..f85f07fc4 100644 --- a/embassy-stm32/src/ospi/mod.rs +++ b/embassy-stm32/src/ospi/mod.rs @@ -12,8 +12,7 @@ pub use enums::*; use stm32_metapac::octospi::vals::{PhaseMode, SizeInBits}; use crate::dma::{word, Transfer}; -use crate::gpio::sealed::{AFType, Pin as _}; -use crate::gpio::{AnyPin, Pull}; +use crate::gpio::{AFType, AnyPin, Pull, SealedPin as _}; use crate::pac::octospi::{vals, Octospi as Regs}; use crate::rcc::RccPeripheral; use crate::{peripherals, Peripheral}; @@ -1002,20 +1001,17 @@ impl RegsExt for Regs { } } -pub(crate) mod sealed { - use super::*; +pub(crate) trait SealedInstance { + const REGS: Regs; +} - pub trait Instance { - const REGS: Regs; - } - - pub trait Word { - const CONFIG: word_impl::Config; - } +trait SealedWord { + const CONFIG: word_impl::Config; } /// OSPI instance trait. -pub trait Instance: Peripheral

+ sealed::Instance + RccPeripheral {} +#[allow(private_bounds)] +pub trait Instance: Peripheral

+ SealedInstance + RccPeripheral {} pin_trait!(SckPin, Instance); pin_trait!(NckPin, Instance); @@ -1033,7 +1029,7 @@ dma_trait!(OctoDma, Instance); foreach_peripheral!( (octospi, $inst:ident) => { - impl sealed::Instance for peripherals::$inst { + impl SealedInstance for peripherals::$inst { const REGS: Regs = crate::pac::$inst; } @@ -1057,11 +1053,12 @@ impl<'d, T: Instance, Dma> GetConfig for Ospi<'d, T, Dma> { } /// Word sizes usable for OSPI. -pub trait Word: word::Word + sealed::Word {} +#[allow(private_bounds)] +pub trait Word: word::Word + SealedWord {} macro_rules! impl_word { ($T:ty, $config:expr) => { - impl sealed::Word for $T { + impl SealedWord for $T { const CONFIG: Config = $config; } impl Word for $T {} From 1e399fbf9d716297acd9281be5c7d6546392e805 Mon Sep 17 00:00:00 2001 From: Boris Faure Date: Tue, 2 Apr 2024 22:16:11 +0200 Subject: [PATCH 072/581] stm32: fix typo in doc --- embassy-stm32/src/lib.rs | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/embassy-stm32/src/lib.rs b/embassy-stm32/src/lib.rs index ab6ef8ef4..8b826e5ac 100644 --- a/embassy-stm32/src/lib.rs +++ b/embassy-stm32/src/lib.rs @@ -168,7 +168,7 @@ pub struct Config { /// Enable debug during sleep and stop. /// - /// May incrase power consumption. Defaults to true. + /// May increase power consumption. Defaults to true. #[cfg(dbgmcu)] pub enable_debug_during_sleep: bool, From 66a7b629097cca89895e8557cf31aba50f5a1982 Mon Sep 17 00:00:00 2001 From: Karun Date: Tue, 2 Apr 2024 16:24:31 -0400 Subject: [PATCH 073/581] Add octospi version dependency for max transfer support --- embassy-stm32/src/ospi/mod.rs | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/embassy-stm32/src/ospi/mod.rs b/embassy-stm32/src/ospi/mod.rs index f85f07fc4..84d1ac284 100644 --- a/embassy-stm32/src/ospi/mod.rs +++ b/embassy-stm32/src/ospi/mod.rs @@ -519,7 +519,10 @@ impl<'d, T: Instance, Dma> Ospi<'d, T, Dma> { T::REGS.dcr3().modify(|w| { w.set_csbound(config.chip_select_boundary); - w.set_maxtran(config.max_transfer); + #[cfg(octospi_v1)] + { + w.set_maxtran(config.max_transfer); + } }); T::REGS.dcr4().modify(|w| { @@ -911,7 +914,10 @@ impl<'d, T: Instance, Dma> Ospi<'d, T, Dma> { T::REGS.dcr3().modify(|w| { w.set_csbound(config.chip_select_boundary); - w.set_maxtran(config.max_transfer); + #[cfg(octospi_v1)] + { + w.set_maxtran(config.max_transfer); + } }); T::REGS.dcr4().modify(|w| { From a031b3b79ec5ebf8f0ec1f7df605944acf7d5720 Mon Sep 17 00:00:00 2001 From: Karun Date: Wed, 3 Apr 2024 13:42:38 -0400 Subject: [PATCH 074/581] Update metapac --- embassy-stm32/Cargo.toml | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/embassy-stm32/Cargo.toml b/embassy-stm32/Cargo.toml index d00e7aa55..89b24f0eb 100644 --- a/embassy-stm32/Cargo.toml +++ b/embassy-stm32/Cargo.toml @@ -70,7 +70,7 @@ rand_core = "0.6.3" sdio-host = "0.5.0" critical-section = "1.1" #stm32-metapac = { version = "15" } -stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-ac187e40aa97da86f7d3cf22abad918f42f01739" } +stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-2b7ec569a5510c324693f0515ac8ea20b12917a9" } vcell = "0.1.3" nb = "1.0.0" @@ -96,7 +96,7 @@ proc-macro2 = "1.0.36" quote = "1.0.15" #stm32-metapac = { version = "15", default-features = false, features = ["metadata"]} -stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-ac187e40aa97da86f7d3cf22abad918f42f01739", default-features = false, features = ["metadata"]} +stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-2b7ec569a5510c324693f0515ac8ea20b12917a9", default-features = false, features = ["metadata"]} [features] default = ["rt"] From 630fd90d26207521d39f1bf76d1f19b862e4393d Mon Sep 17 00:00:00 2001 From: Karun Date: Wed, 3 Apr 2024 14:01:40 -0400 Subject: [PATCH 075/581] Address PR comments --- embassy-stm32/src/ospi/mod.rs | 22 ++++++++-------------- 1 file changed, 8 insertions(+), 14 deletions(-) diff --git a/embassy-stm32/src/ospi/mod.rs b/embassy-stm32/src/ospi/mod.rs index 84d1ac284..59c73c24d 100644 --- a/embassy-stm32/src/ospi/mod.rs +++ b/embassy-stm32/src/ospi/mod.rs @@ -889,7 +889,7 @@ impl<'d, T: Instance, Dma> Ospi<'d, T, Dma> { } /// Set new bus configuration - pub fn set_config(&mut self, config: &Config) -> Result<(), ()> { + pub fn set_config(&mut self, config: &Config) { // Wait for busy flag to clear while T::REGS.sr().read().busy() {} @@ -960,7 +960,6 @@ impl<'d, T: Instance, Dma> Ospi<'d, T, Dma> { } self.config = *config; - Ok(()) } /// Get current configuration @@ -1012,7 +1011,7 @@ pub(crate) trait SealedInstance { } trait SealedWord { - const CONFIG: word_impl::Config; + const CONFIG: u8; } /// OSPI instance trait. @@ -1047,7 +1046,8 @@ impl<'d, T: Instance, Dma> SetConfig for Ospi<'d, T, Dma> { type Config = Config; type ConfigError = (); fn set_config(&mut self, config: &Self::Config) -> Result<(), ()> { - self.set_config(config) + self.set_config(config); + Ok(()) } } @@ -1065,18 +1065,12 @@ pub trait Word: word::Word + SealedWord {} macro_rules! impl_word { ($T:ty, $config:expr) => { impl SealedWord for $T { - const CONFIG: Config = $config; + const CONFIG: u8 = $config; } impl Word for $T {} }; } -mod word_impl { - use super::*; - - pub type Config = u8; - - impl_word!(u8, 8); - impl_word!(u16, 16); - impl_word!(u32, 32); -} +impl_word!(u8, 8); +impl_word!(u16, 16); +impl_word!(u32, 32); From b3bbf42b8bf4d31dab66bf75d80389279b0502f2 Mon Sep 17 00:00:00 2001 From: Karun Date: Wed, 3 Apr 2024 15:58:20 -0400 Subject: [PATCH 076/581] Remove data length from transfer config Remove non hal traits Fix function comments --- embassy-stm32/src/ospi/mod.rs | 91 ++++++----------------------------- 1 file changed, 16 insertions(+), 75 deletions(-) diff --git a/embassy-stm32/src/ospi/mod.rs b/embassy-stm32/src/ospi/mod.rs index 59c73c24d..bcdffc266 100644 --- a/embassy-stm32/src/ospi/mod.rs +++ b/embassy-stm32/src/ospi/mod.rs @@ -113,8 +113,6 @@ pub struct TransferConfig { /// Data width (DMODE) pub dwidth: OspiWidth, - /// Length of data - pub data_len: Option, /// Data buffer pub ddtr: bool, @@ -141,7 +139,6 @@ impl Default for TransferConfig { abdtr: false, dwidth: OspiWidth::NONE, - data_len: None, ddtr: false, dummy: DummyCycles::_0, @@ -158,40 +155,6 @@ pub enum OspiError { InvalidCommand, } -/// MultiSpi interface trait -pub trait MultiSpiBus: embedded_hal_1::spi::ErrorType { - /// Transaction configuration for specific multispi implementation - type Config; - - /// Command function used for a configuration operation, when no user data is - /// supplied to or read from the target device. - async fn command(&mut self, config: Self::Config) -> Result<(), Self::Error>; - - /// Read function used to read data from the target device following the supplied transaction - /// configuration. - async fn read(&mut self, data: &mut [Word], config: Self::Config) -> Result<(), Self::Error>; - - /// Write function used to send data to the target device following the supplied transaction - /// configuration. - async fn write(&mut self, data: &[Word], config: Self::Config) -> Result<(), Self::Error>; -} - -impl + ?Sized, Word: Copy + 'static> MultiSpiBus for &mut T { - type Config = T::Config; - #[inline] - async fn command(&mut self, config: Self::Config) -> Result<(), Self::Error> { - T::command(self, config).await - } - - async fn read(&mut self, data: &mut [Word], config: Self::Config) -> Result<(), Self::Error> { - T::read(self, data, config).await - } - - async fn write(&mut self, data: &[Word], config: Self::Config) -> Result<(), Self::Error> { - T::write(self, data, config).await - } -} - /// OSPI driver. pub struct Ospi<'d, T: Instance, Dma> { _peri: PeripheralRef<'d, T>, @@ -211,35 +174,9 @@ pub struct Ospi<'d, T: Instance, Dma> { width: OspiWidth, } -impl embedded_hal_1::spi::Error for OspiError { - fn kind(&self) -> ErrorKind { - ErrorKind::Other - } -} - -impl<'d, T: Instance, Dma> embedded_hal_1::spi::ErrorType for Ospi<'d, T, Dma> { - type Error = OspiError; -} - -impl<'d, T: Instance, Dma: OctoDma, W: Word> MultiSpiBus for Ospi<'d, T, Dma> { - type Config = TransferConfig; - - async fn command(&mut self, config: Self::Config) -> Result<(), Self::Error> { - self.command(&config).await - } - - async fn read(&mut self, data: &mut [W], config: Self::Config) -> Result<(), Self::Error> { - self.read(data, config).await - } - - async fn write(&mut self, data: &[W], config: Self::Config) -> Result<(), Self::Error> { - self.write(data, config).await - } -} - impl<'d, T: Instance, Dma> Ospi<'d, T, Dma> { - /// Create new OSPI driver for a dualspi external chip - pub fn new_spi( + /// Create new OSPI driver for a single spi external chip + pub fn new_singlespi( peri: impl Peripheral

+ 'd, sck: impl Peripheral

> + 'd, d0: impl Peripheral

> + 'd, @@ -422,7 +359,7 @@ impl<'d, T: Instance, Dma> Ospi<'d, T, Dma> { ) } - /// Create new OSPI driver for two quadspi external chips + /// Create new OSPI driver for octospi external chips pub fn new_octospi( peri: impl Peripheral

+ 'd, sck: impl Peripheral

> + 'd, @@ -584,7 +521,7 @@ impl<'d, T: Instance, Dma> Ospi<'d, T, Dma> { } // Function to configure the peripheral for the requested command - fn configure_command(&mut self, command: &TransferConfig) -> Result<(), OspiError> { + fn configure_command(&mut self, command: &TransferConfig, data_len: Option) -> Result<(), OspiError> { // Check that transaction doesn't use more than hardware initialized pins if >::into(command.iwidth) > >::into(self.width) || >::into(command.adwidth) > >::into(self.width) @@ -614,10 +551,14 @@ impl<'d, T: Instance, Dma> Ospi<'d, T, Dma> { }); // Configure data - if let Some(data_length) = command.data_len { + if let Some(data_length) = data_len { T::REGS.dlr().write(|v| { v.set_dl((data_length - 1) as u32); }) + } else { + T::REGS.dlr().write(|v| { + v.set_dl((0) as u32); + }) } // Configure instruction/address/data modes @@ -681,7 +622,7 @@ impl<'d, T: Instance, Dma> Ospi<'d, T, Dma> { while T::REGS.sr().read().busy() {} // Need additional validation that command configuration doesn't have data set - self.configure_command(command)?; + self.configure_command(command, None)?; // Transaction initiated by setting final configuration, i.e the instruction register while !T::REGS.sr().read().tcf() {} @@ -702,7 +643,7 @@ impl<'d, T: Instance, Dma> Ospi<'d, T, Dma> { w.set_dmaen(false); }); - self.configure_command(&transaction)?; + self.configure_command(&transaction, Some(buf.len()))?; if let Some(len) = transaction.data_len { let current_address = T::REGS.ar().read().address(); @@ -733,7 +674,7 @@ impl<'d, T: Instance, Dma> Ospi<'d, T, Dma> { T::REGS.cr().modify(|w| { w.set_dmaen(false); }); - self.configure_command(&transaction)?; + self.configure_command(&transaction, Some(buf.len()))?; if let Some(len) = transaction.data_len { T::REGS @@ -757,7 +698,7 @@ impl<'d, T: Instance, Dma> Ospi<'d, T, Dma> { where Dma: OctoDma, { - self.configure_command(&transaction)?; + self.configure_command(&transaction, Some(buf.len()))?; let current_address = T::REGS.ar().read().address(); let current_instruction = T::REGS.ir().read().instruction(); @@ -795,7 +736,7 @@ impl<'d, T: Instance, Dma> Ospi<'d, T, Dma> { where Dma: OctoDma, { - self.configure_command(&transaction)?; + self.configure_command(&transaction, Some(buf.len()))?; T::REGS .cr() .modify(|v| v.set_fmode(vals::FunctionalMode::INDIRECTWRITE)); @@ -825,7 +766,7 @@ impl<'d, T: Instance, Dma> Ospi<'d, T, Dma> { where Dma: OctoDma, { - self.configure_command(&transaction)?; + self.configure_command(&transaction, Some(buf.len()))?; let current_address = T::REGS.ar().read().address(); let current_instruction = T::REGS.ir().read().instruction(); @@ -863,7 +804,7 @@ impl<'d, T: Instance, Dma> Ospi<'d, T, Dma> { where Dma: OctoDma, { - self.configure_command(&transaction)?; + self.configure_command(&transaction, Some(buf.len()))?; T::REGS .cr() .modify(|v| v.set_fmode(vals::FunctionalMode::INDIRECTWRITE)); From 80aeea93fd9d34b95441b6900e658e86b5b18b03 Mon Sep 17 00:00:00 2001 From: Karun Date: Wed, 3 Apr 2024 16:05:23 -0400 Subject: [PATCH 077/581] Configure dual-quad setting by constructor --- embassy-stm32/src/ospi/mod.rs | 28 ++++++++++++++++++++-------- 1 file changed, 20 insertions(+), 8 deletions(-) diff --git a/embassy-stm32/src/ospi/mod.rs b/embassy-stm32/src/ospi/mod.rs index bcdffc266..7020cf9ad 100644 --- a/embassy-stm32/src/ospi/mod.rs +++ b/embassy-stm32/src/ospi/mod.rs @@ -23,9 +23,6 @@ pub struct Config { /// Fifo threshold used by the peripheral to generate the interrupt indicating data /// or space is available in the FIFO pub fifo_threshold: FIFOThresholdLevel, - /// Enables dual-quad mode which allows access to two devices simultaneously to - /// increase throughput - pub dual_quad: bool, /// Indicates the type of external device connected pub memory_type: MemoryType, // Need to add an additional enum to provide this public interface /// Defines the size of the external device connected to the OSPI corresponding @@ -64,7 +61,6 @@ impl Default for Config { fn default() -> Self { Self { fifo_threshold: FIFOThresholdLevel::_16Bytes, // 32 bytes FIFO, half capacity - dual_quad: false, memory_type: MemoryType::Micron, device_size: MemorySize::Other(0), chip_select_high_time: ChipSelectHighTime::_5Cycle, @@ -196,6 +192,10 @@ impl<'d, T: Instance, Dma> Ospi<'d, T, Dma> { d1.set_as_af_pull(d1.af_num(), AFType::Input, Pull::None); d1.set_speed(crate::gpio::Speed::VeryHigh); + T::REGS.cr().modify(|w| { + w.set_dmm(false); + }); + Self::new_inner( peri, Some(d0.map_into()), @@ -236,6 +236,10 @@ impl<'d, T: Instance, Dma> Ospi<'d, T, Dma> { d1.set_as_af_pull(d1.af_num(), AFType::OutputPushPull, Pull::None); d1.set_speed(crate::gpio::Speed::VeryHigh); + T::REGS.cr().modify(|w| { + w.set_dmm(false); + }); + Self::new_inner( peri, Some(d0.map_into()), @@ -282,6 +286,10 @@ impl<'d, T: Instance, Dma> Ospi<'d, T, Dma> { d3.set_as_af_pull(d3.af_num(), AFType::OutputPushPull, Pull::None); d3.set_speed(crate::gpio::Speed::VeryHigh); + T::REGS.cr().modify(|w| { + w.set_dmm(false); + }); + Self::new_inner( peri, Some(d0.map_into()), @@ -340,6 +348,10 @@ impl<'d, T: Instance, Dma> Ospi<'d, T, Dma> { d7.set_as_af_pull(d7.af_num(), AFType::OutputPushPull, Pull::None); d7.set_speed(crate::gpio::Speed::VeryHigh); + T::REGS.cr().modify(|w| { + w.set_dmm(true); + }); + Self::new_inner( peri, Some(d0.map_into()), @@ -398,6 +410,10 @@ impl<'d, T: Instance, Dma> Ospi<'d, T, Dma> { d7.set_as_af_pull(d7.af_num(), AFType::OutputPushPull, Pull::None); d7.set_speed(crate::gpio::Speed::VeryHigh); + T::REGS.cr().modify(|w| { + w.set_dmm(false); + }); + Self::new_inner( peri, Some(d0.map_into()), @@ -477,10 +493,6 @@ impl<'d, T: Instance, Dma> Ospi<'d, T, Dma> { w.set_prescaler(config.clock_prescaler); }); - T::REGS.cr().modify(|w| { - w.set_dmm(config.dual_quad); - }); - T::REGS.tcr().modify(|w| { w.set_sshift(match config.sample_shifting { true => vals::SampleShift::HALFCYCLE, From 54be08afe44f1902f042d3228a1df4aa24f56a6c Mon Sep 17 00:00:00 2001 From: David Zwart Date: Wed, 3 Apr 2024 22:24:09 +0200 Subject: [PATCH 078/581] Update faq.adoc with memory.x definition helping hand --- docs/modules/ROOT/pages/faq.adoc | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/docs/modules/ROOT/pages/faq.adoc b/docs/modules/ROOT/pages/faq.adoc index 6b5e6d009..b5d702040 100644 --- a/docs/modules/ROOT/pages/faq.adoc +++ b/docs/modules/ROOT/pages/faq.adoc @@ -208,3 +208,24 @@ Tools like `cargo size` and `cargo nm` can tell you the size of any globals or o === For Max Stack Usage Check out link:https://github.com/Dirbaio/cargo-call-stack/[`cargo-call-stack`] for statically calculating worst-case stack usage. There are some caveats and inaccuracies possible with this, but this is a good way to get the general idea. See link:https://github.com/dirbaio/cargo-call-stack#known-limitations[the README] for more details. + +== The memory definition for my STM chip seems wrong, how do I define a `memory.x` file? + +It could happen that your project compiles, flashes but fails to run. The following situation can be true for your setup: + +The `memory.x` is generated automatically when enabling the `memory-x` feature on the `embassy-stm32` crate in the `Cargo.toml` file. +This, in turn, uses `stm32-metapac` to generate the `memory.x` file for you. Unfortunately, more often than not this memory definition is not correct. + +You can override this by adding your own `memory.x` file. Such a file could look like this: +``` +MEMORY +{ + FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 1024K + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 320K +} + +_stack_start = ORIGIN(RAM) + LENGTH(RAM); +``` + +Please refer to the STM32 documentation for the specific values suitable for your board and setup. The STM32 Cube examples often contain a linker script `.ld` file. +Look for the `MEMORY` section and try to determine the FLASH and RAM sizes and section start. From 7aef047defd56c11c852156fec9f579de496af31 Mon Sep 17 00:00:00 2001 From: David Zwart Date: Wed, 3 Apr 2024 22:32:28 +0200 Subject: [PATCH 079/581] Update faq.adoc github link --- docs/modules/ROOT/pages/faq.adoc | 2 ++ 1 file changed, 2 insertions(+) diff --git a/docs/modules/ROOT/pages/faq.adoc b/docs/modules/ROOT/pages/faq.adoc index b5d702040..4e09d9e2d 100644 --- a/docs/modules/ROOT/pages/faq.adoc +++ b/docs/modules/ROOT/pages/faq.adoc @@ -227,5 +227,7 @@ MEMORY _stack_start = ORIGIN(RAM) + LENGTH(RAM); ``` +If you find a case where the memory.x is wrong, please report it on [this Github issue](https://github.com/embassy-rs/stm32-data/issues/301) so other users are not caught by surprise. + Please refer to the STM32 documentation for the specific values suitable for your board and setup. The STM32 Cube examples often contain a linker script `.ld` file. Look for the `MEMORY` section and try to determine the FLASH and RAM sizes and section start. From 446965a903112a9a09f67213abe46b9836d2bb2f Mon Sep 17 00:00:00 2001 From: David Zwart Date: Wed, 3 Apr 2024 22:33:21 +0200 Subject: [PATCH 080/581] Update faq.adoc --- docs/modules/ROOT/pages/faq.adoc | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/docs/modules/ROOT/pages/faq.adoc b/docs/modules/ROOT/pages/faq.adoc index 4e09d9e2d..c6b893de5 100644 --- a/docs/modules/ROOT/pages/faq.adoc +++ b/docs/modules/ROOT/pages/faq.adoc @@ -227,7 +227,7 @@ MEMORY _stack_start = ORIGIN(RAM) + LENGTH(RAM); ``` -If you find a case where the memory.x is wrong, please report it on [this Github issue](https://github.com/embassy-rs/stm32-data/issues/301) so other users are not caught by surprise. - Please refer to the STM32 documentation for the specific values suitable for your board and setup. The STM32 Cube examples often contain a linker script `.ld` file. Look for the `MEMORY` section and try to determine the FLASH and RAM sizes and section start. + +If you find a case where the memory.x is wrong, please report it on [this Github issue](https://github.com/embassy-rs/stm32-data/issues/301) so other users are not caught by surprise. From 4ea7dfce176cf588fe0bc37efbca44e229bd6e0e Mon Sep 17 00:00:00 2001 From: Karun Date: Wed, 3 Apr 2024 16:36:02 -0400 Subject: [PATCH 081/581] Fix build errors Add empty checks/peripheral busy waits --- embassy-stm32/src/ospi/mod.rs | 93 +++++++++++++++++++++++------------ 1 file changed, 62 insertions(+), 31 deletions(-) diff --git a/embassy-stm32/src/ospi/mod.rs b/embassy-stm32/src/ospi/mod.rs index 7020cf9ad..4a89cd810 100644 --- a/embassy-stm32/src/ospi/mod.rs +++ b/embassy-stm32/src/ospi/mod.rs @@ -7,7 +7,6 @@ pub mod enums; use embassy_embedded_hal::{GetConfig, SetConfig}; use embassy_hal_internal::{into_ref, PeripheralRef}; -use embedded_hal_1::spi::ErrorKind; pub use enums::*; use stm32_metapac::octospi::vals::{PhaseMode, SizeInBits}; @@ -144,11 +143,14 @@ impl Default for TransferConfig { /// Error used for Octospi implementation #[derive(Debug)] +#[cfg_attr(feature = "defmt", derive(defmt::Format))] pub enum OspiError { /// Peripheral configuration is invalid InvalidConfiguration, /// Operation configuration is invalid InvalidCommand, + /// Size zero buffer passed to instruction + EmptyBuffer, } /// OSPI driver. @@ -627,10 +629,7 @@ impl<'d, T: Instance, Dma> Ospi<'d, T, Dma> { /// Function used to control or configure the target device without data transfer pub async fn command(&mut self, command: &TransferConfig) -> Result<(), OspiError> { - // Prevent a transaction from being set with expected data transmission or reception - if let Some(_) = command.data_len { - return Err(OspiError::InvalidCommand); - }; + // Wait for peripheral to be free while T::REGS.sr().read().busy() {} // Need additional validation that command configuration doesn't have data set @@ -647,6 +646,10 @@ impl<'d, T: Instance, Dma> Ospi<'d, T, Dma> { /// Blocking read with byte by byte data transfer pub fn blocking_read(&mut self, buf: &mut [W], transaction: TransferConfig) -> Result<(), OspiError> { + if buf.is_empty() { + return Err(OspiError::EmptyBuffer); + } + // Wait for peripheral to be free while T::REGS.sr().read().busy() {} @@ -657,22 +660,20 @@ impl<'d, T: Instance, Dma> Ospi<'d, T, Dma> { self.configure_command(&transaction, Some(buf.len()))?; - if let Some(len) = transaction.data_len { - let current_address = T::REGS.ar().read().address(); - let current_instruction = T::REGS.ir().read().instruction(); + let current_address = T::REGS.ar().read().address(); + let current_instruction = T::REGS.ir().read().instruction(); - // For a indirect read transaction, the transaction begins when the instruction/address is set - T::REGS.cr().modify(|v| v.set_fmode(vals::FunctionalMode::INDIRECTREAD)); - if T::REGS.ccr().read().admode() == vals::PhaseMode::NONE { - T::REGS.ir().write(|v| v.set_instruction(current_instruction)); - } else { - T::REGS.ar().write(|v| v.set_address(current_address)); - } + // For a indirect read transaction, the transaction begins when the instruction/address is set + T::REGS.cr().modify(|v| v.set_fmode(vals::FunctionalMode::INDIRECTREAD)); + if T::REGS.ccr().read().admode() == vals::PhaseMode::NONE { + T::REGS.ir().write(|v| v.set_instruction(current_instruction)); + } else { + T::REGS.ar().write(|v| v.set_address(current_address)); + } - for idx in 0..len { - while !T::REGS.sr().read().tcf() && !T::REGS.sr().read().ftf() {} - buf[idx] = unsafe { (T::REGS.dr().as_ptr() as *mut W).read_volatile() }; - } + for idx in 0..buf.len() { + while !T::REGS.sr().read().tcf() && !T::REGS.sr().read().ftf() {} + buf[idx] = unsafe { (T::REGS.dr().as_ptr() as *mut W).read_volatile() }; } while !T::REGS.sr().read().tcf() {} @@ -683,20 +684,26 @@ impl<'d, T: Instance, Dma> Ospi<'d, T, Dma> { /// Blocking write with byte by byte data transfer pub fn blocking_write(&mut self, buf: &[W], transaction: TransferConfig) -> Result<(), OspiError> { + if buf.is_empty() { + return Err(OspiError::EmptyBuffer); + } + + // Wait for peripheral to be free + while T::REGS.sr().read().busy() {} + T::REGS.cr().modify(|w| { w.set_dmaen(false); }); + self.configure_command(&transaction, Some(buf.len()))?; - if let Some(len) = transaction.data_len { - T::REGS - .cr() - .modify(|v| v.set_fmode(vals::FunctionalMode::INDIRECTWRITE)); + T::REGS + .cr() + .modify(|v| v.set_fmode(vals::FunctionalMode::INDIRECTWRITE)); - for idx in 0..len { - while !T::REGS.sr().read().ftf() {} - unsafe { (T::REGS.dr().as_ptr() as *mut W).write_volatile(buf[idx]) }; - } + for idx in 0..buf.len() { + while !T::REGS.sr().read().ftf() {} + unsafe { (T::REGS.dr().as_ptr() as *mut W).write_volatile(buf[idx]) }; } while !T::REGS.sr().read().tcf() {} @@ -710,6 +717,13 @@ impl<'d, T: Instance, Dma> Ospi<'d, T, Dma> { where Dma: OctoDma, { + if buf.is_empty() { + return Err(OspiError::EmptyBuffer); + } + + // Wait for peripheral to be free + while T::REGS.sr().read().busy() {} + self.configure_command(&transaction, Some(buf.len()))?; let current_address = T::REGS.ar().read().address(); @@ -748,6 +762,13 @@ impl<'d, T: Instance, Dma> Ospi<'d, T, Dma> { where Dma: OctoDma, { + if buf.is_empty() { + return Err(OspiError::EmptyBuffer); + } + + // Wait for peripheral to be free + while T::REGS.sr().read().busy() {} + self.configure_command(&transaction, Some(buf.len()))?; T::REGS .cr() @@ -778,6 +799,13 @@ impl<'d, T: Instance, Dma> Ospi<'d, T, Dma> { where Dma: OctoDma, { + if buf.is_empty() { + return Err(OspiError::EmptyBuffer); + } + + // Wait for peripheral to be free + while T::REGS.sr().read().busy() {} + self.configure_command(&transaction, Some(buf.len()))?; let current_address = T::REGS.ar().read().address(); @@ -816,6 +844,13 @@ impl<'d, T: Instance, Dma> Ospi<'d, T, Dma> { where Dma: OctoDma, { + if buf.is_empty() { + return Err(OspiError::EmptyBuffer); + } + + // Wait for peripheral to be free + while T::REGS.sr().read().busy() {} + self.configure_command(&transaction, Some(buf.len()))?; T::REGS .cr() @@ -888,10 +923,6 @@ impl<'d, T: Instance, Dma> Ospi<'d, T, Dma> { w.set_prescaler(config.clock_prescaler); }); - T::REGS.cr().modify(|w| { - w.set_dmm(config.dual_quad); - }); - T::REGS.tcr().modify(|w| { w.set_sshift(match config.sample_shifting { true => vals::SampleShift::HALFCYCLE, From 330a3b04882a072406b9c3b4ef35d4c91c994e01 Mon Sep 17 00:00:00 2001 From: Karun Date: Wed, 3 Apr 2024 16:42:16 -0400 Subject: [PATCH 082/581] Fix passing of dual quad param to inner constructor --- embassy-stm32/src/ospi/mod.rs | 30 ++++++++++-------------------- 1 file changed, 10 insertions(+), 20 deletions(-) diff --git a/embassy-stm32/src/ospi/mod.rs b/embassy-stm32/src/ospi/mod.rs index 4a89cd810..398c3298f 100644 --- a/embassy-stm32/src/ospi/mod.rs +++ b/embassy-stm32/src/ospi/mod.rs @@ -194,10 +194,6 @@ impl<'d, T: Instance, Dma> Ospi<'d, T, Dma> { d1.set_as_af_pull(d1.af_num(), AFType::Input, Pull::None); d1.set_speed(crate::gpio::Speed::VeryHigh); - T::REGS.cr().modify(|w| { - w.set_dmm(false); - }); - Self::new_inner( peri, Some(d0.map_into()), @@ -214,6 +210,7 @@ impl<'d, T: Instance, Dma> Ospi<'d, T, Dma> { dma, config, OspiWidth::SING, + false, ) } @@ -238,10 +235,6 @@ impl<'d, T: Instance, Dma> Ospi<'d, T, Dma> { d1.set_as_af_pull(d1.af_num(), AFType::OutputPushPull, Pull::None); d1.set_speed(crate::gpio::Speed::VeryHigh); - T::REGS.cr().modify(|w| { - w.set_dmm(false); - }); - Self::new_inner( peri, Some(d0.map_into()), @@ -258,6 +251,7 @@ impl<'d, T: Instance, Dma> Ospi<'d, T, Dma> { dma, config, OspiWidth::DUAL, + false, ) } @@ -288,10 +282,6 @@ impl<'d, T: Instance, Dma> Ospi<'d, T, Dma> { d3.set_as_af_pull(d3.af_num(), AFType::OutputPushPull, Pull::None); d3.set_speed(crate::gpio::Speed::VeryHigh); - T::REGS.cr().modify(|w| { - w.set_dmm(false); - }); - Self::new_inner( peri, Some(d0.map_into()), @@ -308,6 +298,7 @@ impl<'d, T: Instance, Dma> Ospi<'d, T, Dma> { dma, config, OspiWidth::QUAD, + false, ) } @@ -350,10 +341,6 @@ impl<'d, T: Instance, Dma> Ospi<'d, T, Dma> { d7.set_as_af_pull(d7.af_num(), AFType::OutputPushPull, Pull::None); d7.set_speed(crate::gpio::Speed::VeryHigh); - T::REGS.cr().modify(|w| { - w.set_dmm(true); - }); - Self::new_inner( peri, Some(d0.map_into()), @@ -370,6 +357,7 @@ impl<'d, T: Instance, Dma> Ospi<'d, T, Dma> { dma, config, OspiWidth::QUAD, + true, ) } @@ -412,10 +400,6 @@ impl<'d, T: Instance, Dma> Ospi<'d, T, Dma> { d7.set_as_af_pull(d7.af_num(), AFType::OutputPushPull, Pull::None); d7.set_speed(crate::gpio::Speed::VeryHigh); - T::REGS.cr().modify(|w| { - w.set_dmm(false); - }); - Self::new_inner( peri, Some(d0.map_into()), @@ -432,6 +416,7 @@ impl<'d, T: Instance, Dma> Ospi<'d, T, Dma> { dma, config, OspiWidth::OCTO, + false, ) } @@ -451,6 +436,7 @@ impl<'d, T: Instance, Dma> Ospi<'d, T, Dma> { dma: impl Peripheral

+ 'd, config: Config, width: OspiWidth, + dual_quad: bool, ) -> Self { into_ref!(peri, dma); @@ -495,6 +481,10 @@ impl<'d, T: Instance, Dma> Ospi<'d, T, Dma> { w.set_prescaler(config.clock_prescaler); }); + T::REGS.cr().modify(|w| { + w.set_dmm(dual_quad); + }); + T::REGS.tcr().modify(|w| { w.set_sshift(match config.sample_shifting { true => vals::SampleShift::HALFCYCLE, From c9acebf783c64784fe6b659a94b40fa080b6fbe8 Mon Sep 17 00:00:00 2001 From: Alex Moon Date: Wed, 3 Apr 2024 19:13:57 -0400 Subject: [PATCH 083/581] Fix `FairSemaphore` bugs - `acquire` and `acquire_all` futures were `!Send`, even for `M: RawMutex + Send` due to the captured `Cell`. - If multiple `acquire` tasks were queued, waking the first would not wake the second, even if there were permits remaining after the first `acquire` completed. --- embassy-sync/src/semaphore.rs | 136 +++++++++++++++++++++++++--------- 1 file changed, 102 insertions(+), 34 deletions(-) diff --git a/embassy-sync/src/semaphore.rs b/embassy-sync/src/semaphore.rs index 52c468b4a..d30eee30b 100644 --- a/embassy-sync/src/semaphore.rs +++ b/embassy-sync/src/semaphore.rs @@ -1,8 +1,7 @@ //! A synchronization primitive for controlling access to a pool of resources. use core::cell::{Cell, RefCell}; use core::convert::Infallible; -use core::future::poll_fn; -use core::mem::MaybeUninit; +use core::future::{poll_fn, Future}; use core::task::{Poll, Waker}; use heapless::Deque; @@ -258,9 +257,9 @@ where &self, permits: usize, acquire_all: bool, - cx: Option<(&Cell>, &Waker)>, + cx: Option<(&mut Option, &Waker)>, ) -> Poll, WaitQueueFull>> { - let ticket = cx.as_ref().map(|(cell, _)| cell.get()).unwrap_or(None); + let ticket = cx.as_ref().map(|(x, _)| **x).unwrap_or(None); self.state.lock(|cell| { let mut state = cell.borrow_mut(); if let Some(permits) = state.take(ticket, permits, acquire_all) { @@ -268,10 +267,10 @@ where semaphore: self, permits, })) - } else if let Some((cell, waker)) = cx { + } else if let Some((ticket_ref, waker)) = cx { match state.register(ticket, waker) { Ok(ticket) => { - cell.set(Some(ticket)); + *ticket_ref = Some(ticket); Poll::Pending } Err(err) => Poll::Ready(Err(err)), @@ -291,10 +290,12 @@ pub struct WaitQueueFull; impl Semaphore for FairSemaphore { type Error = WaitQueueFull; - async fn acquire(&self, permits: usize) -> Result, Self::Error> { - let ticket = Cell::new(None); - let _guard = OnDrop::new(|| self.state.lock(|cell| cell.borrow_mut().cancel(ticket.get()))); - poll_fn(|cx| self.poll_acquire(permits, false, Some((&ticket, cx.waker())))).await + fn acquire(&self, permits: usize) -> impl Future, Self::Error>> { + FairAcquire { + sema: self, + permits, + ticket: None, + } } fn try_acquire(&self, permits: usize) -> Option> { @@ -304,10 +305,12 @@ impl Semaphore for FairSemaphore { } } - async fn acquire_all(&self, min: usize) -> Result, Self::Error> { - let ticket = Cell::new(None); - let _guard = OnDrop::new(|| self.state.lock(|cell| cell.borrow_mut().cancel(ticket.get()))); - poll_fn(|cx| self.poll_acquire(min, true, Some((&ticket, cx.waker())))).await + fn acquire_all(&self, min: usize) -> impl Future, Self::Error>> { + FairAcquireAll { + sema: self, + min, + ticket: None, + } } fn try_acquire_all(&self, min: usize) -> Option> { @@ -338,6 +341,52 @@ impl Semaphore for FairSemaphore { } } +struct FairAcquire<'a, M: RawMutex, const N: usize> { + sema: &'a FairSemaphore, + permits: usize, + ticket: Option, +} + +impl<'a, M: RawMutex, const N: usize> Drop for FairAcquire<'a, M, N> { + fn drop(&mut self) { + self.sema + .state + .lock(|cell| cell.borrow_mut().cancel(self.ticket.take())); + } +} + +impl<'a, M: RawMutex, const N: usize> core::future::Future for FairAcquire<'a, M, N> { + type Output = Result>, WaitQueueFull>; + + fn poll(mut self: core::pin::Pin<&mut Self>, cx: &mut core::task::Context<'_>) -> Poll { + self.sema + .poll_acquire(self.permits, false, Some((&mut self.ticket, cx.waker()))) + } +} + +struct FairAcquireAll<'a, M: RawMutex, const N: usize> { + sema: &'a FairSemaphore, + min: usize, + ticket: Option, +} + +impl<'a, M: RawMutex, const N: usize> Drop for FairAcquireAll<'a, M, N> { + fn drop(&mut self) { + self.sema + .state + .lock(|cell| cell.borrow_mut().cancel(self.ticket.take())); + } +} + +impl<'a, M: RawMutex, const N: usize> core::future::Future for FairAcquireAll<'a, M, N> { + type Output = Result>, WaitQueueFull>; + + fn poll(mut self: core::pin::Pin<&mut Self>, cx: &mut core::task::Context<'_>) -> Poll { + self.sema + .poll_acquire(self.min, true, Some((&mut self.ticket, cx.waker()))) + } +} + struct FairSemaphoreState { permits: usize, next_ticket: usize, @@ -406,6 +455,9 @@ impl FairSemaphoreState { if ticket.is_some() { self.pop(); + if self.permits > 0 { + self.wake(); + } } Some(permits) @@ -432,25 +484,6 @@ impl FairSemaphoreState { } } -/// A type to delay the drop handler invocation. -#[must_use = "to delay the drop handler invocation to the end of the scope"] -struct OnDrop { - f: MaybeUninit, -} - -impl OnDrop { - /// Create a new instance. - pub fn new(f: F) -> Self { - Self { f: MaybeUninit::new(f) } - } -} - -impl Drop for OnDrop { - fn drop(&mut self) { - unsafe { self.f.as_ptr().read()() } - } -} - #[cfg(test)] mod tests { mod greedy { @@ -574,11 +607,16 @@ mod tests { mod fair { use core::pin::pin; + use core::time::Duration; + use futures_executor::ThreadPool; + use futures_timer::Delay; use futures_util::poll; + use futures_util::task::SpawnExt; + use static_cell::StaticCell; use super::super::*; - use crate::blocking_mutex::raw::NoopRawMutex; + use crate::blocking_mutex::raw::{CriticalSectionRawMutex, NoopRawMutex}; #[test] fn try_acquire() { @@ -700,5 +738,35 @@ mod tests { let c = poll!(c_fut.as_mut()); assert!(c.is_ready()); } + + #[futures_test::test] + async fn wakers() { + let executor = ThreadPool::new().unwrap(); + + static SEMAPHORE: StaticCell> = StaticCell::new(); + let semaphore = &*SEMAPHORE.init(FairSemaphore::new(3)); + + let a = semaphore.try_acquire(2); + assert!(a.is_some()); + + let b_task = executor + .spawn_with_handle(async move { semaphore.acquire(2).await }) + .unwrap(); + while semaphore.state.lock(|x| x.borrow().wakers.is_empty()) { + Delay::new(Duration::from_millis(50)).await; + } + + let c_task = executor + .spawn_with_handle(async move { semaphore.acquire(1).await }) + .unwrap(); + + core::mem::drop(a); + + let b = b_task.await.unwrap(); + assert_eq!(b.permits(), 2); + + let c = c_task.await.unwrap(); + assert_eq!(c.permits(), 1); + } } } From 8fbd21d2161caaf3d52ad60db1bb2fd0ea91e6f9 Mon Sep 17 00:00:00 2001 From: Dominic Date: Wed, 27 Mar 2024 16:30:32 +0100 Subject: [PATCH 084/581] Add multiprio example for stm32h7 inspired by stm32f4 --- examples/stm32h7/Cargo.toml | 4 +- examples/stm32h7/src/bin/multiprio.rs | 145 ++++++++++++++++++++++++++ 2 files changed, 147 insertions(+), 2 deletions(-) create mode 100644 examples/stm32h7/src/bin/multiprio.rs diff --git a/examples/stm32h7/Cargo.toml b/examples/stm32h7/Cargo.toml index d9ea2626d..84a89b378 100644 --- a/examples/stm32h7/Cargo.toml +++ b/examples/stm32h7/Cargo.toml @@ -6,9 +6,9 @@ license = "MIT OR Apache-2.0" [dependencies] # Change stm32h743bi to your chip name, if necessary. -embassy-stm32 = { version = "0.1.0", path = "../../embassy-stm32", features = ["defmt", "stm32h743bi", "time-driver-any", "exti", "memory-x", "unstable-pac", "chrono"] } +embassy-stm32 = { version = "0.1.0", path = "../../embassy-stm32", features = ["defmt", "stm32h743bi", "time-driver-tim2", "exti", "memory-x", "unstable-pac", "chrono"] } embassy-sync = { version = "0.5.0", path = "../../embassy-sync", features = ["defmt"] } -embassy-executor = { version = "0.5.0", path = "../../embassy-executor", features = ["task-arena-size-32768", "arch-cortex-m", "executor-thread", "defmt", "integrated-timers"] } +embassy-executor = { version = "0.5.0", path = "../../embassy-executor", features = ["task-arena-size-32768", "arch-cortex-m", "executor-thread", "executor-interrupt", "defmt", "integrated-timers"] } embassy-time = { version = "0.3.0", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime", "tick-hz-32_768"] } embassy-net = { version = "0.4.0", path = "../../embassy-net", features = ["defmt", "tcp", "dhcpv4", "medium-ethernet", "proto-ipv6", "dns"] } embassy-usb = { version = "0.1.0", path = "../../embassy-usb", features = ["defmt"] } diff --git a/examples/stm32h7/src/bin/multiprio.rs b/examples/stm32h7/src/bin/multiprio.rs new file mode 100644 index 000000000..73f8dd092 --- /dev/null +++ b/examples/stm32h7/src/bin/multiprio.rs @@ -0,0 +1,145 @@ +//! This example showcases how to create multiple Executor instances to run tasks at +//! different priority levels. +//! +//! Low priority executor runs in thread mode (not interrupt), and uses `sev` for signaling +//! there's work in the queue, and `wfe` for waiting for work. +//! +//! Medium and high priority executors run in two interrupts with different priorities. +//! Signaling work is done by pending the interrupt. No "waiting" needs to be done explicitly, since +//! when there's work the interrupt will trigger and run the executor. +//! +//! Sample output below. Note that high priority ticks can interrupt everything else, and +//! medium priority computations can interrupt low priority computations, making them to appear +//! to take significantly longer time. +//! +//! ```not_rust +//! [med] Starting long computation +//! [med] done in 992 ms +//! [high] tick! +//! [low] Starting long computation +//! [med] Starting long computation +//! [high] tick! +//! [high] tick! +//! [med] done in 993 ms +//! [med] Starting long computation +//! [high] tick! +//! [high] tick! +//! [med] done in 993 ms +//! [low] done in 3972 ms +//! [med] Starting long computation +//! [high] tick! +//! [high] tick! +//! [med] done in 993 ms +//! ``` +//! +//! For comparison, try changing the code so all 3 tasks get spawned on the low priority executor. +//! You will get an output like the following. Note that no computation is ever interrupted. +//! +//! ```not_rust +//! [high] tick! +//! [med] Starting long computation +//! [med] done in 496 ms +//! [low] Starting long computation +//! [low] done in 992 ms +//! [med] Starting long computation +//! [med] done in 496 ms +//! [high] tick! +//! [low] Starting long computation +//! [low] done in 992 ms +//! [high] tick! +//! [med] Starting long computation +//! [med] done in 496 ms +//! [high] tick! +//! ``` +//! + +#![no_std] +#![no_main] + +use cortex_m_rt::entry; +use defmt::*; +use embassy_executor::{Executor, InterruptExecutor}; +use embassy_stm32::interrupt; +use embassy_stm32::interrupt::{InterruptExt, Priority}; +use embassy_time::{Instant, Timer}; +use static_cell::StaticCell; +use {defmt_rtt as _, panic_probe as _}; + +#[embassy_executor::task] +async fn run_high() { + loop { + info!(" [high] tick!"); + Timer::after_ticks(27374).await; + } +} + +#[embassy_executor::task] +async fn run_med() { + loop { + let start = Instant::now(); + info!(" [med] Starting long computation"); + + // Spin-wait to simulate a long CPU computation + cortex_m::asm::delay(128_000_000); // ~1 second + + let end = Instant::now(); + let ms = end.duration_since(start).as_ticks() / 33; + info!(" [med] done in {} ms", ms); + + Timer::after_ticks(23421).await; + } +} + +#[embassy_executor::task] +async fn run_low() { + loop { + let start = Instant::now(); + info!("[low] Starting long computation"); + + // Spin-wait to simulate a long CPU computation + cortex_m::asm::delay(256_000_000); // ~2 seconds + + let end = Instant::now(); + let ms = end.duration_since(start).as_ticks() / 33; + info!("[low] done in {} ms", ms); + + Timer::after_ticks(32983).await; + } +} + +static EXECUTOR_HIGH: InterruptExecutor = InterruptExecutor::new(); +static EXECUTOR_MED: InterruptExecutor = InterruptExecutor::new(); +static EXECUTOR_LOW: StaticCell = StaticCell::new(); + +#[interrupt] +unsafe fn UART4() { + EXECUTOR_HIGH.on_interrupt() +} + +#[interrupt] +unsafe fn UART5() { + EXECUTOR_MED.on_interrupt() +} + +#[entry] +fn main() -> ! { + info!("Hello World!"); + + let _p = embassy_stm32::init(Default::default()); + + // High-priority executor: UART4, priority level 6 + interrupt::UART4.set_priority(Priority::P6); + let spawner = EXECUTOR_HIGH.start(interrupt::UART4); + unwrap!(spawner.spawn(run_high())); + + // Medium-priority executor: UART5, priority level 7 + interrupt::UART5.set_priority(Priority::P7); + let spawner = EXECUTOR_MED.start(interrupt::UART5); + unwrap!(spawner.spawn(run_med())); + + // Low priority executor: runs in thread mode, using WFE/SEV + let executor = EXECUTOR_LOW.init(Executor::new()); + executor.run(|spawner| { + unwrap!(spawner.spawn(run_low())); + }); +} From 0427c442ea531673e18da304c7402927589b8d0b Mon Sep 17 00:00:00 2001 From: Gustav Toft Date: Thu, 4 Apr 2024 15:51:25 +0200 Subject: [PATCH 085/581] Implement raw sockets in embassy-net --- embassy-net/Cargo.toml | 6 +- embassy-net/src/lib.rs | 2 + embassy-net/src/raw.rs | 178 +++++++++++++++++++++++++++++++++++++++++ examples/rp/Cargo.toml | 2 +- 4 files changed, 185 insertions(+), 3 deletions(-) create mode 100644 embassy-net/src/raw.rs diff --git a/embassy-net/Cargo.toml b/embassy-net/Cargo.toml index be9f1d784..47faaa205 100644 --- a/embassy-net/Cargo.toml +++ b/embassy-net/Cargo.toml @@ -16,11 +16,11 @@ categories = [ [package.metadata.embassy_docs] src_base = "https://github.com/embassy-rs/embassy/blob/embassy-net-v$VERSION/embassy-net/src/" src_base_git = "https://github.com/embassy-rs/embassy/blob/$COMMIT/embassy-net/src/" -features = ["defmt", "tcp", "udp", "dns", "dhcpv4", "proto-ipv6", "medium-ethernet", "medium-ip", "medium-ieee802154", "igmp", "dhcpv4-hostname"] +features = ["defmt", "tcp", "udp","raw", "dns", "dhcpv4", "proto-ipv6", "medium-ethernet", "medium-ip", "medium-ieee802154", "igmp", "dhcpv4-hostname"] target = "thumbv7em-none-eabi" [package.metadata.docs.rs] -features = ["defmt", "tcp", "udp", "dns", "dhcpv4", "proto-ipv6", "medium-ethernet", "medium-ip", "medium-ieee802154", "igmp", "dhcpv4-hostname"] +features = ["defmt", "tcp", "udp", "raw","dns", "dhcpv4", "proto-ipv6", "medium-ethernet", "medium-ip", "medium-ieee802154", "igmp", "dhcpv4-hostname"] [features] default = [] @@ -38,6 +38,8 @@ packet-trace = [] ## Enable UDP support udp = ["smoltcp/socket-udp"] +## Enable Raw support +raw = ["smoltcp/socket-raw"] ## Enable TCP support tcp = ["smoltcp/socket-tcp"] ## Enable DNS support diff --git a/embassy-net/src/lib.rs b/embassy-net/src/lib.rs index 1c0cf1a12..05c8aec7b 100644 --- a/embassy-net/src/lib.rs +++ b/embassy-net/src/lib.rs @@ -20,6 +20,8 @@ pub mod tcp; mod time; #[cfg(feature = "udp")] pub mod udp; +#[cfg(feature = "raw")] +pub mod raw; use core::cell::RefCell; use core::future::{poll_fn, Future}; diff --git a/embassy-net/src/raw.rs b/embassy-net/src/raw.rs new file mode 100644 index 000000000..a0e458fff --- /dev/null +++ b/embassy-net/src/raw.rs @@ -0,0 +1,178 @@ +//! Raw sockets. + +use core::cell::RefCell; +use core::future::poll_fn; +use core::mem; +use core::task::{Context, Poll}; + +use embassy_net_driver::Driver; +use smoltcp::iface::{Interface, SocketHandle}; +use smoltcp::socket::raw; +pub use smoltcp::socket::raw::PacketMetadata; +use smoltcp::wire::{IpProtocol, IpVersion}; + +use crate::{SocketStack, Stack}; + + +/// Unrelavent for RawSocket? +/* /// Error returned by [`RawSocket::bind`]. +#[derive(PartialEq, Eq, Clone, Copy, Debug)] +#[cfg_attr(feature = "defmt", derive(defmt::Format))] +pub enum BindError { + /// The socket was already open. + InvalidState, + /// No route to host. + NoRoute, +} */ + +/// Error returned by [`RawSocket::recv_from`] and [`RawSocket::send_to`]. +#[derive(PartialEq, Eq, Clone, Copy, Debug)] +#[cfg_attr(feature = "defmt", derive(defmt::Format))] +pub enum SendError { + /// No route to host. + NoRoute, + /// Socket not bound to an outgoing port. + SocketNotBound, +} + +/// Error returned by [`RawSocket::recv`] and [`RawSocket::send`]. +#[derive(PartialEq, Eq, Clone, Copy, Debug)] +#[cfg_attr(feature = "defmt", derive(defmt::Format))] +pub enum RecvError { + /// Provided buffer was smaller than the received packet. + Truncated, +} + +/// An Raw socket. +pub struct RawSocket<'a> { + stack: &'a RefCell, + handle: SocketHandle, +} + +impl<'a> RawSocket<'a> { + /// Create a new Raw socket using the provided stack and buffers. + pub fn new( + stack: &'a Stack, + ip_version: IpVersion, + ip_protocol: IpProtocol, + rx_meta: &'a mut [PacketMetadata], + rx_buffer: &'a mut [u8], + tx_meta: &'a mut [PacketMetadata], + tx_buffer: &'a mut [u8], + ) -> Self { + let s = &mut *stack.socket.borrow_mut(); + + let rx_meta: &'static mut [PacketMetadata] = unsafe { mem::transmute(rx_meta) }; + let rx_buffer: &'static mut [u8] = unsafe { mem::transmute(rx_buffer) }; + let tx_meta: &'static mut [PacketMetadata] = unsafe { mem::transmute(tx_meta) }; + let tx_buffer: &'static mut [u8] = unsafe { mem::transmute(tx_buffer) }; + let handle = s.sockets.add(raw::Socket::new( + ip_version, + ip_protocol, + raw::PacketBuffer::new(rx_meta, rx_buffer), + raw::PacketBuffer::new(tx_meta, tx_buffer), + )); + + Self { + stack: &stack.socket, + handle, + } + } + + fn with_mut(&self, f: impl FnOnce(&mut raw::Socket, &mut Interface) -> R) -> R { + let s = &mut *self.stack.borrow_mut(); + let socket = s.sockets.get_mut::(self.handle); + let res = f(socket, &mut s.iface); + s.waker.wake(); + res + } + + /// Bind the socket to a local endpoint. + /// + /// How to handle this in RawSocket? no need for bind? + /// + /* pub fn bind(&mut self, endpoint: T) -> Result<(), BindError> + where + T: Into, + { + let mut endpoint = endpoint.into(); + + if endpoint.port == 0 { + // If user didn't specify port allocate a dynamic port. + endpoint.port = self.stack.borrow_mut().get_local_port(); + } + + match self.with_mut(|s, _| s.bind(endpoint)) { + Ok(()) => Ok(()), + Err(raw::BindError::InvalidState) => Err(BindError::InvalidState), + Err(raw::BindError::Unaddressable) => Err(BindError::NoRoute), + } + } + + fn with(&self, f: impl FnOnce(&raw::Socket, &Interface) -> R) -> R { + let s = &*self.stack.borrow(); + let socket = s.sockets.get::(self.handle); + f(socket, &s.iface) + } + + fn with_mut(&self, f: impl FnOnce(&mut raw::Socket, &mut Interface) -> R) -> R { + let s = &mut *self.stack.borrow_mut(); + let socket = s.sockets.get_mut::(self.handle); + let res = f(socket, &mut s.iface); + s.waker.wake(); + res + } */ + + /// Receive a datagram. + /// + /// This method will wait until a datagram is received. + pub async fn recv(&self, buf: &mut [u8]) -> Result { + poll_fn(move |cx| self.poll_recv(buf, cx)).await + } + + /// Receive a datagram. + /// + /// When no datagram is available, this method will return `Poll::Pending` and + /// register the current task to be notified when a datagram is received. + pub fn poll_recv(&self, buf: &mut [u8], cx: &mut Context<'_>) -> Poll> { + self.with_mut(|s, _| match s.recv_slice(buf) { + Ok(n) => Poll::Ready(Ok(n)), + // No data ready + Err(raw::RecvError::Truncated) => Poll::Ready(Err(RecvError::Truncated)), + Err(raw::RecvError::Exhausted) => { + s.register_recv_waker(cx.waker()); + Poll::Pending + } + }) + } + + /// Send a datagram. + /// + /// This method will wait until the datagram has been sent.` + pub async fn send(&self, buf: &[u8]) -> Result<(), SendError> { + poll_fn(move |cx| self.poll_send(buf, cx)).await + } + + /// Send a datagram. + /// + /// When the datagram has been sent, this method will return `Poll::Ready(Ok())`. + /// + /// When the socket's send buffer is full, this method will return `Poll::Pending` + /// and register the current task to be notified when the buffer has space available. + pub fn poll_send(&self, buf: &[u8], cx: &mut Context<'_>) -> Poll>{ + self.with_mut(|s, _| match s.send_slice(buf) { + // Entire datagram has been sent + Ok(()) => Poll::Ready(Ok(())), + Err(raw::SendError::BufferFull) => { + s.register_send_waker(cx.waker()); + Poll::Pending + } + }) + } + } + +impl Drop for RawSocket<'_> { + fn drop(&mut self) { + self.stack.borrow_mut().sockets.remove(self.handle); + } +} diff --git a/examples/rp/Cargo.toml b/examples/rp/Cargo.toml index 585349506..0f58f143c 100644 --- a/examples/rp/Cargo.toml +++ b/examples/rp/Cargo.toml @@ -12,7 +12,7 @@ embassy-executor = { version = "0.5.0", path = "../../embassy-executor", feature embassy-time = { version = "0.3.0", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime"] } embassy-rp = { version = "0.1.0", path = "../../embassy-rp", features = ["defmt", "unstable-pac", "time-driver", "critical-section-impl"] } embassy-usb = { version = "0.1.0", path = "../../embassy-usb", features = ["defmt"] } -embassy-net = { version = "0.4.0", path = "../../embassy-net", features = ["defmt", "tcp", "udp", "dhcpv4", "medium-ethernet"] } +embassy-net = { version = "0.4.0", path = "../../embassy-net", features = ["defmt", "tcp", "udp", "raw", "dhcpv4", "medium-ethernet"] } embassy-net-wiznet = { version = "0.1.0", path = "../../embassy-net-wiznet", features = ["defmt"] } embassy-futures = { version = "0.1.0", path = "../../embassy-futures" } embassy-usb-logger = { version = "0.1.0", path = "../../embassy-usb-logger" } From ab85eb4b60cd49ebcd43d2305f42327685f5e5a6 Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Fri, 5 Apr 2024 00:20:22 +0200 Subject: [PATCH 086/581] nrf: remove mod sealed. --- embassy-nrf/src/buffered_uarte.rs | 25 ++++----- embassy-nrf/src/gpio.rs | 82 ++++++++++++++--------------- embassy-nrf/src/gpiote.rs | 14 +++-- embassy-nrf/src/i2s.rs | 56 +++++++++----------- embassy-nrf/src/pdm.rs | 43 +++++++-------- embassy-nrf/src/ppi/mod.rs | 22 ++++---- embassy-nrf/src/pwm.rs | 16 +++--- embassy-nrf/src/qdec.rs | 43 +++++++-------- embassy-nrf/src/qspi.rs | 40 +++++++------- embassy-nrf/src/radio/mod.rs | 38 +++++++------- embassy-nrf/src/rng.rs | 87 ++++++++++++++----------------- embassy-nrf/src/saadc.rs | 16 +++--- embassy-nrf/src/spim.rs | 62 ++++++++++------------ embassy-nrf/src/spis.rs | 43 +++++++-------- embassy-nrf/src/timer.rs | 22 +++----- embassy-nrf/src/twim.rs | 37 ++++++------- embassy-nrf/src/twis.rs | 37 ++++++------- embassy-nrf/src/uarte.rs | 59 +++++++++------------ embassy-nrf/src/usb/mod.rs | 13 ++--- 19 files changed, 339 insertions(+), 416 deletions(-) diff --git a/embassy-nrf/src/buffered_uarte.rs b/embassy-nrf/src/buffered_uarte.rs index b04c96e09..385d4015e 100644 --- a/embassy-nrf/src/buffered_uarte.rs +++ b/embassy-nrf/src/buffered_uarte.rs @@ -20,8 +20,7 @@ use embassy_hal_internal::{into_ref, PeripheralRef}; // Re-export SVD variants to allow user to directly set values pub use pac::uarte0::{baudrate::BAUDRATE_A as Baudrate, config::PARITY_A as Parity}; -use crate::gpio::sealed::Pin; -use crate::gpio::{AnyPin, Pin as GpioPin, PselBits}; +use crate::gpio::{AnyPin, Pin as GpioPin, PselBits, SealedPin}; use crate::interrupt::typelevel::Interrupt; use crate::ppi::{ self, AnyConfigurableChannel, AnyGroup, Channel, ConfigurableChannel, Event, Group, Ppi, PpiGroup, Task, @@ -30,19 +29,15 @@ use crate::timer::{Instance as TimerInstance, Timer}; use crate::uarte::{configure, drop_tx_rx, Config, Instance as UarteInstance}; use crate::{interrupt, pac, Peripheral}; -mod sealed { - use super::*; +pub(crate) struct State { + tx_buf: RingBuffer, + tx_count: AtomicUsize, - pub struct State { - pub tx_buf: RingBuffer, - pub tx_count: AtomicUsize, - - pub rx_buf: RingBuffer, - pub rx_started: AtomicBool, - pub rx_started_count: AtomicU8, - pub rx_ended_count: AtomicU8, - pub rx_ppi_ch: AtomicU8, - } + rx_buf: RingBuffer, + rx_started: AtomicBool, + rx_started_count: AtomicU8, + rx_ended_count: AtomicU8, + rx_ppi_ch: AtomicU8, } /// UART error. @@ -53,8 +48,6 @@ pub enum Error { // No errors for now } -pub(crate) use sealed::State; - impl State { pub(crate) const fn new() -> Self { Self { diff --git a/embassy-nrf/src/gpio.rs b/embassy-nrf/src/gpio.rs index f2353f21d..7b272dca0 100644 --- a/embassy-nrf/src/gpio.rs +++ b/embassy-nrf/src/gpio.rs @@ -7,7 +7,6 @@ use core::hint::unreachable_unchecked; use cfg_if::cfg_if; use embassy_hal_internal::{impl_peripheral, into_ref, PeripheralRef}; -use self::sealed::Pin as _; #[cfg(feature = "nrf51")] use crate::pac::gpio; #[cfg(feature = "nrf51")] @@ -361,59 +360,56 @@ impl<'d> Drop for Flex<'d> { } } -pub(crate) mod sealed { - use super::*; +pub(crate) trait SealedPin { + fn pin_port(&self) -> u8; - pub trait Pin { - fn pin_port(&self) -> u8; - - #[inline] - fn _pin(&self) -> u8 { - cfg_if! { - if #[cfg(feature = "_gpio-p1")] { - self.pin_port() % 32 - } else { - self.pin_port() - } + #[inline] + fn _pin(&self) -> u8 { + cfg_if! { + if #[cfg(feature = "_gpio-p1")] { + self.pin_port() % 32 + } else { + self.pin_port() } } + } - #[inline] - fn block(&self) -> &gpio::RegisterBlock { - unsafe { - match self.pin_port() / 32 { - #[cfg(feature = "nrf51")] - 0 => &*pac::GPIO::ptr(), - #[cfg(not(feature = "nrf51"))] - 0 => &*pac::P0::ptr(), - #[cfg(feature = "_gpio-p1")] - 1 => &*pac::P1::ptr(), - _ => unreachable_unchecked(), - } + #[inline] + fn block(&self) -> &gpio::RegisterBlock { + unsafe { + match self.pin_port() / 32 { + #[cfg(feature = "nrf51")] + 0 => &*pac::GPIO::ptr(), + #[cfg(not(feature = "nrf51"))] + 0 => &*pac::P0::ptr(), + #[cfg(feature = "_gpio-p1")] + 1 => &*pac::P1::ptr(), + _ => unreachable_unchecked(), } } + } - #[inline] - fn conf(&self) -> &gpio::PIN_CNF { - &self.block().pin_cnf[self._pin() as usize] - } + #[inline] + fn conf(&self) -> &gpio::PIN_CNF { + &self.block().pin_cnf[self._pin() as usize] + } - /// Set the output as high. - #[inline] - fn set_high(&self) { - unsafe { self.block().outset.write(|w| w.bits(1u32 << self._pin())) } - } + /// Set the output as high. + #[inline] + fn set_high(&self) { + unsafe { self.block().outset.write(|w| w.bits(1u32 << self._pin())) } + } - /// Set the output as low. - #[inline] - fn set_low(&self) { - unsafe { self.block().outclr.write(|w| w.bits(1u32 << self._pin())) } - } + /// Set the output as low. + #[inline] + fn set_low(&self) { + unsafe { self.block().outclr.write(|w| w.bits(1u32 << self._pin())) } } } /// Interface for a Pin that can be configured by an [Input] or [Output] driver, or converted to an [AnyPin]. -pub trait Pin: Peripheral

+ Into + sealed::Pin + Sized + 'static { +#[allow(private_bounds)] +pub trait Pin: Peripheral

+ Into + SealedPin + Sized + 'static { /// Number of the pin within the port (0..31) #[inline] fn pin(&self) -> u8 { @@ -464,7 +460,7 @@ impl AnyPin { impl_peripheral!(AnyPin); impl Pin for AnyPin {} -impl sealed::Pin for AnyPin { +impl SealedPin for AnyPin { #[inline] fn pin_port(&self) -> u8 { self.pin_port @@ -502,7 +498,7 @@ pub(crate) fn deconfigure_pin(psel_bits: u32) { macro_rules! impl_pin { ($type:ident, $port_num:expr, $pin_num:expr) => { impl crate::gpio::Pin for peripherals::$type {} - impl crate::gpio::sealed::Pin for peripherals::$type { + impl crate::gpio::SealedPin for peripherals::$type { #[inline] fn pin_port(&self) -> u8 { $port_num * 32 + $pin_num diff --git a/embassy-nrf/src/gpiote.rs b/embassy-nrf/src/gpiote.rs index 4a28279a9..d7f075722 100644 --- a/embassy-nrf/src/gpiote.rs +++ b/embassy-nrf/src/gpiote.rs @@ -7,8 +7,7 @@ use core::task::{Context, Poll}; use embassy_hal_internal::{impl_peripheral, into_ref, Peripheral, PeripheralRef}; use embassy_sync::waitqueue::AtomicWaker; -use crate::gpio::sealed::Pin as _; -use crate::gpio::{AnyPin, Flex, Input, Output, Pin as GpioPin}; +use crate::gpio::{AnyPin, Flex, Input, Output, Pin as GpioPin, SealedPin as _}; use crate::interrupt::InterruptExt; use crate::ppi::{Event, Task}; use crate::{interrupt, pac, peripherals}; @@ -446,14 +445,13 @@ impl<'d> Flex<'d> { // ======================= -mod sealed { - pub trait Channel {} -} +trait SealedChannel {} /// GPIOTE channel trait. /// /// Implemented by all GPIOTE channels. -pub trait Channel: sealed::Channel + Into + Sized + 'static { +#[allow(private_bounds)] +pub trait Channel: SealedChannel + Into + Sized + 'static { /// Get the channel number. fn number(&self) -> usize; @@ -478,7 +476,7 @@ pub struct AnyChannel { number: u8, } impl_peripheral!(AnyChannel); -impl sealed::Channel for AnyChannel {} +impl SealedChannel for AnyChannel {} impl Channel for AnyChannel { fn number(&self) -> usize { self.number as usize @@ -487,7 +485,7 @@ impl Channel for AnyChannel { macro_rules! impl_channel { ($type:ident, $number:expr) => { - impl sealed::Channel for peripherals::$type {} + impl SealedChannel for peripherals::$type {} impl Channel for peripherals::$type { fn number(&self) -> usize { $number as usize diff --git a/embassy-nrf/src/i2s.rs b/embassy-nrf/src/i2s.rs index 907acdf4c..966271ed9 100644 --- a/embassy-nrf/src/i2s.rs +++ b/embassy-nrf/src/i2s.rs @@ -6,11 +6,12 @@ use core::future::poll_fn; use core::marker::PhantomData; use core::mem::size_of; use core::ops::{Deref, DerefMut}; -use core::sync::atomic::{compiler_fence, Ordering}; +use core::sync::atomic::{compiler_fence, AtomicBool, Ordering}; use core::task::Poll; use embassy_hal_internal::drop::OnDrop; use embassy_hal_internal::{into_ref, PeripheralRef}; +use embassy_sync::waitqueue::AtomicWaker; use crate::gpio::{AnyPin, Pin as GpioPin}; use crate::interrupt::typelevel::Interrupt; @@ -1140,50 +1141,45 @@ impl MultiBuffering { } } -pub(crate) mod sealed { - use core::sync::atomic::AtomicBool; +/// Peripheral static state +pub(crate) struct State { + started: AtomicBool, + rx_waker: AtomicWaker, + tx_waker: AtomicWaker, + stop_waker: AtomicWaker, +} - use embassy_sync::waitqueue::AtomicWaker; - - /// Peripheral static state - pub struct State { - pub started: AtomicBool, - pub rx_waker: AtomicWaker, - pub tx_waker: AtomicWaker, - pub stop_waker: AtomicWaker, - } - - impl State { - pub const fn new() -> Self { - Self { - started: AtomicBool::new(false), - rx_waker: AtomicWaker::new(), - tx_waker: AtomicWaker::new(), - stop_waker: AtomicWaker::new(), - } +impl State { + pub(crate) const fn new() -> Self { + Self { + started: AtomicBool::new(false), + rx_waker: AtomicWaker::new(), + tx_waker: AtomicWaker::new(), + stop_waker: AtomicWaker::new(), } } - - pub trait Instance { - fn regs() -> &'static crate::pac::i2s::RegisterBlock; - fn state() -> &'static State; - } +} + +pub(crate) trait SealedInstance { + fn regs() -> &'static crate::pac::i2s::RegisterBlock; + fn state() -> &'static State; } /// I2S peripheral instance. -pub trait Instance: Peripheral

+ sealed::Instance + 'static + Send { +#[allow(private_bounds)] +pub trait Instance: Peripheral

+ SealedInstance + 'static + Send { /// Interrupt for this peripheral. type Interrupt: interrupt::typelevel::Interrupt; } macro_rules! impl_i2s { ($type:ident, $pac_type:ident, $irq:ident) => { - impl crate::i2s::sealed::Instance for peripherals::$type { + impl crate::i2s::SealedInstance for peripherals::$type { fn regs() -> &'static crate::pac::i2s::RegisterBlock { unsafe { &*pac::$pac_type::ptr() } } - fn state() -> &'static crate::i2s::sealed::State { - static STATE: crate::i2s::sealed::State = crate::i2s::sealed::State::new(); + fn state() -> &'static crate::i2s::State { + static STATE: crate::i2s::State = crate::i2s::State::new(); &STATE } } diff --git a/embassy-nrf/src/pdm.rs b/embassy-nrf/src/pdm.rs index 754d38310..ef2662c85 100644 --- a/embassy-nrf/src/pdm.rs +++ b/embassy-nrf/src/pdm.rs @@ -9,11 +9,11 @@ use core::task::Poll; use embassy_hal_internal::drop::OnDrop; use embassy_hal_internal::{into_ref, PeripheralRef}; +use embassy_sync::waitqueue::AtomicWaker; use fixed::types::I7F1; use crate::chip::EASY_DMA_SIZE; -use crate::gpio::sealed::Pin; -use crate::gpio::{AnyPin, Pin as GpioPin}; +use crate::gpio::{AnyPin, Pin as GpioPin, SealedPin}; use crate::interrupt::typelevel::Interrupt; use crate::pac::pdm::mode::{EDGE_A, OPERATION_A}; pub use crate::pac::pdm::pdmclkctrl::FREQ_A as Frequency; @@ -451,42 +451,39 @@ impl<'d, T: Instance> Drop for Pdm<'d, T> { } } -pub(crate) mod sealed { - use embassy_sync::waitqueue::AtomicWaker; +/// Peripheral static state +pub(crate) struct State { + waker: AtomicWaker, +} - /// Peripheral static state - pub struct State { - pub waker: AtomicWaker, - } - - impl State { - pub const fn new() -> Self { - Self { - waker: AtomicWaker::new(), - } +impl State { + pub(crate) const fn new() -> Self { + Self { + waker: AtomicWaker::new(), } } - - pub trait Instance { - fn regs() -> &'static crate::pac::pdm::RegisterBlock; - fn state() -> &'static State; - } +} + +pub(crate) trait SealedInstance { + fn regs() -> &'static crate::pac::pdm::RegisterBlock; + fn state() -> &'static State; } /// PDM peripheral instance -pub trait Instance: Peripheral

+ sealed::Instance + 'static + Send { +#[allow(private_bounds)] +pub trait Instance: Peripheral

+ SealedInstance + 'static + Send { /// Interrupt for this peripheral type Interrupt: interrupt::typelevel::Interrupt; } macro_rules! impl_pdm { ($type:ident, $pac_type:ident, $irq:ident) => { - impl crate::pdm::sealed::Instance for peripherals::$type { + impl crate::pdm::SealedInstance for peripherals::$type { fn regs() -> &'static crate::pac::pdm::RegisterBlock { unsafe { &*pac::$pac_type::ptr() } } - fn state() -> &'static crate::pdm::sealed::State { - static STATE: crate::pdm::sealed::State = crate::pdm::sealed::State::new(); + fn state() -> &'static crate::pdm::State { + static STATE: crate::pdm::State = crate::pdm::State::new(); &STATE } } diff --git a/embassy-nrf/src/ppi/mod.rs b/embassy-nrf/src/ppi/mod.rs index f5764b8b7..13f7dcc83 100644 --- a/embassy-nrf/src/ppi/mod.rs +++ b/embassy-nrf/src/ppi/mod.rs @@ -210,13 +210,12 @@ unsafe impl Send for Event<'_> {} // ====================== // traits -pub(crate) mod sealed { - pub trait Channel {} - pub trait Group {} -} +pub(crate) trait SealedChannel {} +pub(crate) trait SealedGroup {} /// Interface for PPI channels. -pub trait Channel: sealed::Channel + Peripheral

+ Sized + 'static { +#[allow(private_bounds)] +pub trait Channel: SealedChannel + Peripheral

+ Sized + 'static { /// Returns the number of the channel fn number(&self) -> usize; } @@ -234,7 +233,8 @@ pub trait StaticChannel: Channel + Into { } /// Interface for a group of PPI channels. -pub trait Group: sealed::Group + Peripheral

+ Into + Sized + 'static { +#[allow(private_bounds)] +pub trait Group: SealedGroup + Peripheral

+ Into + Sized + 'static { /// Returns the number of the group. fn number(&self) -> usize; /// Convert into a type erased group. @@ -254,7 +254,7 @@ pub struct AnyStaticChannel { pub(crate) number: u8, } impl_peripheral!(AnyStaticChannel); -impl sealed::Channel for AnyStaticChannel {} +impl SealedChannel for AnyStaticChannel {} impl Channel for AnyStaticChannel { fn number(&self) -> usize { self.number as usize @@ -272,7 +272,7 @@ pub struct AnyConfigurableChannel { pub(crate) number: u8, } impl_peripheral!(AnyConfigurableChannel); -impl sealed::Channel for AnyConfigurableChannel {} +impl SealedChannel for AnyConfigurableChannel {} impl Channel for AnyConfigurableChannel { fn number(&self) -> usize { self.number as usize @@ -287,7 +287,7 @@ impl ConfigurableChannel for AnyConfigurableChannel { #[cfg(not(feature = "nrf51"))] macro_rules! impl_ppi_channel { ($type:ident, $number:expr) => { - impl crate::ppi::sealed::Channel for peripherals::$type {} + impl crate::ppi::SealedChannel for peripherals::$type {} impl crate::ppi::Channel for peripherals::$type { fn number(&self) -> usize { $number @@ -338,7 +338,7 @@ pub struct AnyGroup { number: u8, } impl_peripheral!(AnyGroup); -impl sealed::Group for AnyGroup {} +impl SealedGroup for AnyGroup {} impl Group for AnyGroup { fn number(&self) -> usize { self.number as usize @@ -347,7 +347,7 @@ impl Group for AnyGroup { macro_rules! impl_group { ($type:ident, $number:expr) => { - impl sealed::Group for peripherals::$type {} + impl SealedGroup for peripherals::$type {} impl Group for peripherals::$type { fn number(&self) -> usize { $number diff --git a/embassy-nrf/src/pwm.rs b/embassy-nrf/src/pwm.rs index 833370d4b..1318d3f94 100644 --- a/embassy-nrf/src/pwm.rs +++ b/embassy-nrf/src/pwm.rs @@ -6,8 +6,7 @@ use core::sync::atomic::{compiler_fence, Ordering}; use embassy_hal_internal::{into_ref, PeripheralRef}; -use crate::gpio::sealed::Pin as _; -use crate::gpio::{AnyPin, Pin as GpioPin, PselBits}; +use crate::gpio::{AnyPin, Pin as GpioPin, PselBits, SealedPin as _}; use crate::ppi::{Event, Task}; use crate::util::slice_in_ram_or; use crate::{interrupt, pac, Peripheral}; @@ -847,23 +846,20 @@ impl<'a, T: Instance> Drop for SimplePwm<'a, T> { } } -pub(crate) mod sealed { - use super::*; - - pub trait Instance { - fn regs() -> &'static pac::pwm0::RegisterBlock; - } +pub(crate) trait SealedInstance { + fn regs() -> &'static pac::pwm0::RegisterBlock; } /// PWM peripheral instance. -pub trait Instance: Peripheral

+ sealed::Instance + 'static { +#[allow(private_bounds)] +pub trait Instance: Peripheral

+ SealedInstance + 'static { /// Interrupt for this peripheral. type Interrupt: interrupt::typelevel::Interrupt; } macro_rules! impl_pwm { ($type:ident, $pac_type:ident, $irq:ident) => { - impl crate::pwm::sealed::Instance for peripherals::$type { + impl crate::pwm::SealedInstance for peripherals::$type { fn regs() -> &'static pac::pwm0::RegisterBlock { unsafe { &*pac::$pac_type::ptr() } } diff --git a/embassy-nrf/src/qdec.rs b/embassy-nrf/src/qdec.rs index 9455ec925..7409c9b1e 100644 --- a/embassy-nrf/src/qdec.rs +++ b/embassy-nrf/src/qdec.rs @@ -7,9 +7,9 @@ use core::marker::PhantomData; use core::task::Poll; use embassy_hal_internal::{into_ref, PeripheralRef}; +use embassy_sync::waitqueue::AtomicWaker; -use crate::gpio::sealed::Pin as _; -use crate::gpio::{AnyPin, Pin as GpioPin}; +use crate::gpio::{AnyPin, Pin as GpioPin, SealedPin as _}; use crate::interrupt::typelevel::Interrupt; use crate::{interrupt, Peripheral}; @@ -245,42 +245,39 @@ pub enum LedPolarity { ActiveLow, } -pub(crate) mod sealed { - use embassy_sync::waitqueue::AtomicWaker; +/// Peripheral static state +pub(crate) struct State { + waker: AtomicWaker, +} - /// Peripheral static state - pub struct State { - pub waker: AtomicWaker, - } - - impl State { - pub const fn new() -> Self { - Self { - waker: AtomicWaker::new(), - } +impl State { + pub(crate) const fn new() -> Self { + Self { + waker: AtomicWaker::new(), } } - - pub trait Instance { - fn regs() -> &'static crate::pac::qdec::RegisterBlock; - fn state() -> &'static State; - } +} + +pub(crate) trait SealedInstance { + fn regs() -> &'static crate::pac::qdec::RegisterBlock; + fn state() -> &'static State; } /// qdec peripheral instance. -pub trait Instance: Peripheral

+ sealed::Instance + 'static + Send { +#[allow(private_bounds)] +pub trait Instance: Peripheral

+ SealedInstance + 'static + Send { /// Interrupt for this peripheral. type Interrupt: interrupt::typelevel::Interrupt; } macro_rules! impl_qdec { ($type:ident, $pac_type:ident, $irq:ident) => { - impl crate::qdec::sealed::Instance for peripherals::$type { + impl crate::qdec::SealedInstance for peripherals::$type { fn regs() -> &'static crate::pac::qdec::RegisterBlock { unsafe { &*pac::$pac_type::ptr() } } - fn state() -> &'static crate::qdec::sealed::State { - static STATE: crate::qdec::sealed::State = crate::qdec::sealed::State::new(); + fn state() -> &'static crate::qdec::State { + static STATE: crate::qdec::State = crate::qdec::State::new(); &STATE } } diff --git a/embassy-nrf/src/qspi.rs b/embassy-nrf/src/qspi.rs index 4134a4c87..060fe72cd 100755 --- a/embassy-nrf/src/qspi.rs +++ b/embassy-nrf/src/qspi.rs @@ -9,6 +9,7 @@ use core::task::Poll; use embassy_hal_internal::drop::OnDrop; use embassy_hal_internal::{into_ref, PeripheralRef}; +use embassy_sync::waitqueue::AtomicWaker; use embedded_storage::nor_flash::{ErrorType, NorFlash, NorFlashError, NorFlashErrorKind, ReadNorFlash}; use crate::gpio::{self, Pin as GpioPin}; @@ -652,42 +653,39 @@ mod _eh1 { impl<'d, T: Instance> embedded_storage_async::nor_flash::MultiwriteNorFlash for Qspi<'d, T> {} } -pub(crate) mod sealed { - use embassy_sync::waitqueue::AtomicWaker; +/// Peripheral static state +pub(crate) struct State { + waker: AtomicWaker, +} - /// Peripheral static state - pub struct State { - pub waker: AtomicWaker, - } - - impl State { - pub const fn new() -> Self { - Self { - waker: AtomicWaker::new(), - } +impl State { + pub(crate) const fn new() -> Self { + Self { + waker: AtomicWaker::new(), } } - - pub trait Instance { - fn regs() -> &'static crate::pac::qspi::RegisterBlock; - fn state() -> &'static State; - } +} + +pub(crate) trait SealedInstance { + fn regs() -> &'static crate::pac::qspi::RegisterBlock; + fn state() -> &'static State; } /// QSPI peripheral instance. -pub trait Instance: Peripheral

+ sealed::Instance + 'static + Send { +#[allow(private_bounds)] +pub trait Instance: Peripheral

+ SealedInstance + 'static + Send { /// Interrupt for this peripheral. type Interrupt: interrupt::typelevel::Interrupt; } macro_rules! impl_qspi { ($type:ident, $pac_type:ident, $irq:ident) => { - impl crate::qspi::sealed::Instance for peripherals::$type { + impl crate::qspi::SealedInstance for peripherals::$type { fn regs() -> &'static crate::pac::qspi::RegisterBlock { unsafe { &*pac::$pac_type::ptr() } } - fn state() -> &'static crate::qspi::sealed::State { - static STATE: crate::qspi::sealed::State = crate::qspi::sealed::State::new(); + fn state() -> &'static crate::qspi::State { + static STATE: crate::qspi::State = crate::qspi::State::new(); &STATE } } diff --git a/embassy-nrf/src/radio/mod.rs b/embassy-nrf/src/radio/mod.rs index 4c0cc3280..8edca1df2 100644 --- a/embassy-nrf/src/radio/mod.rs +++ b/embassy-nrf/src/radio/mod.rs @@ -19,6 +19,7 @@ pub mod ieee802154; use core::marker::PhantomData; +use embassy_sync::waitqueue::AtomicWaker; use pac::radio::state::STATE_A as RadioState; pub use pac::radio::txpower::TXPOWER_A as TxPower; @@ -56,36 +57,32 @@ impl interrupt::typelevel::Handler for InterruptHandl } } -pub(crate) mod sealed { - use embassy_sync::waitqueue::AtomicWaker; - - pub struct State { - /// end packet transmission or reception - pub event_waker: AtomicWaker, - } - impl State { - pub const fn new() -> Self { - Self { - event_waker: AtomicWaker::new(), - } +pub(crate) struct State { + /// end packet transmission or reception + event_waker: AtomicWaker, +} +impl State { + pub(crate) const fn new() -> Self { + Self { + event_waker: AtomicWaker::new(), } } +} - pub trait Instance { - fn regs() -> &'static crate::pac::radio::RegisterBlock; - fn state() -> &'static State; - } +pub(crate) trait SealedInstance { + fn regs() -> &'static crate::pac::radio::RegisterBlock; + fn state() -> &'static State; } macro_rules! impl_radio { ($type:ident, $pac_type:ident, $irq:ident) => { - impl crate::radio::sealed::Instance for peripherals::$type { + impl crate::radio::SealedInstance for peripherals::$type { fn regs() -> &'static pac::radio::RegisterBlock { unsafe { &*pac::$pac_type::ptr() } } - fn state() -> &'static crate::radio::sealed::State { - static STATE: crate::radio::sealed::State = crate::radio::sealed::State::new(); + fn state() -> &'static crate::radio::State { + static STATE: crate::radio::State = crate::radio::State::new(); &STATE } } @@ -96,7 +93,8 @@ macro_rules! impl_radio { } /// Radio peripheral instance. -pub trait Instance: Peripheral

+ sealed::Instance + 'static + Send { +#[allow(private_bounds)] +pub trait Instance: Peripheral

+ SealedInstance + 'static + Send { /// Interrupt for this peripheral. type Interrupt: interrupt::typelevel::Interrupt; } diff --git a/embassy-nrf/src/rng.rs b/embassy-nrf/src/rng.rs index 1c463fb7c..ff61e08f3 100644 --- a/embassy-nrf/src/rng.rs +++ b/embassy-nrf/src/rng.rs @@ -2,13 +2,16 @@ #![macro_use] +use core::cell::{RefCell, RefMut}; use core::future::poll_fn; use core::marker::PhantomData; use core::ptr; use core::task::Poll; +use critical_section::{CriticalSection, Mutex}; use embassy_hal_internal::drop::OnDrop; use embassy_hal_internal::{into_ref, PeripheralRef}; +use embassy_sync::waitqueue::WakerRegistration; use crate::interrupt::typelevel::Interrupt; use crate::{interrupt, Peripheral}; @@ -205,73 +208,61 @@ impl<'d, T: Instance> rand_core::RngCore for Rng<'d, T> { impl<'d, T: Instance> rand_core::CryptoRng for Rng<'d, T> {} -pub(crate) mod sealed { - use core::cell::{Ref, RefCell, RefMut}; +/// Peripheral static state +pub(crate) struct State { + inner: Mutex>, +} - use critical_section::{CriticalSection, Mutex}; - use embassy_sync::waitqueue::WakerRegistration; +struct InnerState { + ptr: *mut u8, + end: *mut u8, + waker: WakerRegistration, +} - use super::*; +unsafe impl Send for InnerState {} - /// Peripheral static state - pub struct State { - inner: Mutex>, - } - - pub struct InnerState { - pub ptr: *mut u8, - pub end: *mut u8, - pub waker: WakerRegistration, - } - - unsafe impl Send for InnerState {} - - impl State { - pub const fn new() -> Self { - Self { - inner: Mutex::new(RefCell::new(InnerState::new())), - } - } - - pub fn borrow<'cs>(&'cs self, cs: CriticalSection<'cs>) -> Ref<'cs, InnerState> { - self.inner.borrow(cs).borrow() - } - - pub fn borrow_mut<'cs>(&'cs self, cs: CriticalSection<'cs>) -> RefMut<'cs, InnerState> { - self.inner.borrow(cs).borrow_mut() +impl State { + pub(crate) const fn new() -> Self { + Self { + inner: Mutex::new(RefCell::new(InnerState::new())), } } - impl InnerState { - pub const fn new() -> Self { - Self { - ptr: ptr::null_mut(), - end: ptr::null_mut(), - waker: WakerRegistration::new(), - } - } - } - - pub trait Instance { - fn regs() -> &'static crate::pac::rng::RegisterBlock; - fn state() -> &'static State; + fn borrow_mut<'cs>(&'cs self, cs: CriticalSection<'cs>) -> RefMut<'cs, InnerState> { + self.inner.borrow(cs).borrow_mut() } } +impl InnerState { + const fn new() -> Self { + Self { + ptr: ptr::null_mut(), + end: ptr::null_mut(), + waker: WakerRegistration::new(), + } + } +} + +pub(crate) trait SealedInstance { + fn regs() -> &'static crate::pac::rng::RegisterBlock; + fn state() -> &'static State; +} + /// RNG peripheral instance. -pub trait Instance: Peripheral

+ sealed::Instance + 'static + Send { +#[allow(private_bounds)] +pub trait Instance: Peripheral

+ SealedInstance + 'static + Send { /// Interrupt for this peripheral. type Interrupt: interrupt::typelevel::Interrupt; } macro_rules! impl_rng { ($type:ident, $pac_type:ident, $irq:ident) => { - impl crate::rng::sealed::Instance for peripherals::$type { + impl crate::rng::SealedInstance for peripherals::$type { fn regs() -> &'static crate::pac::rng::RegisterBlock { unsafe { &*pac::$pac_type::ptr() } } - fn state() -> &'static crate::rng::sealed::State { - static STATE: crate::rng::sealed::State = crate::rng::sealed::State::new(); + fn state() -> &'static crate::rng::State { + static STATE: crate::rng::State = crate::rng::State::new(); &STATE } } diff --git a/embassy-nrf/src/saadc.rs b/embassy-nrf/src/saadc.rs index 662b05614..17c65fa3e 100644 --- a/embassy-nrf/src/saadc.rs +++ b/embassy-nrf/src/saadc.rs @@ -16,7 +16,6 @@ pub(crate) use saadc::ch::pselp::PSELP_A as InputChannel; use saadc::oversample::OVERSAMPLE_A; use saadc::resolution::VAL_A; -use self::sealed::Input as _; use crate::interrupt::InterruptExt; use crate::ppi::{ConfigurableChannel, Event, Ppi, Task}; use crate::timer::{Frequency, Instance as TimerInstance, Timer}; @@ -662,16 +661,13 @@ pub enum Resolution { _14BIT = 3, } -pub(crate) mod sealed { - use super::*; - - pub trait Input { - fn channel(&self) -> InputChannel; - } +pub(crate) trait SealedInput { + fn channel(&self) -> InputChannel; } /// An input that can be used as either or negative end of a ADC differential in the SAADC periperhal. -pub trait Input: sealed::Input + Into + Peripheral

+ Sized + 'static { +#[allow(private_bounds)] +pub trait Input: SealedInput + Into + Peripheral

+ Sized + 'static { /// Convert this SAADC input to a type-erased `AnyInput`. /// /// This allows using several inputs in situations that might require @@ -693,7 +689,7 @@ pub struct AnyInput { impl_peripheral!(AnyInput); -impl sealed::Input for AnyInput { +impl SealedInput for AnyInput { fn channel(&self) -> InputChannel { self.channel } @@ -706,7 +702,7 @@ macro_rules! impl_saadc_input { impl_saadc_input!(@local, crate::peripherals::$pin, $ch); }; (@local, $pin:ty, $ch:ident) => { - impl crate::saadc::sealed::Input for $pin { + impl crate::saadc::SealedInput for $pin { fn channel(&self) -> crate::saadc::InputChannel { crate::saadc::InputChannel::$ch } diff --git a/embassy-nrf/src/spim.rs b/embassy-nrf/src/spim.rs index c45d45e68..373f22642 100644 --- a/embassy-nrf/src/spim.rs +++ b/embassy-nrf/src/spim.rs @@ -4,18 +4,20 @@ use core::future::poll_fn; use core::marker::PhantomData; +#[cfg(feature = "_nrf52832_anomaly_109")] +use core::sync::atomic::AtomicU8; use core::sync::atomic::{compiler_fence, Ordering}; use core::task::Poll; use embassy_embedded_hal::SetConfig; use embassy_hal_internal::{into_ref, PeripheralRef}; +use embassy_sync::waitqueue::AtomicWaker; pub use embedded_hal_02::spi::{Mode, Phase, Polarity, MODE_0, MODE_1, MODE_2, MODE_3}; pub use pac::spim0::config::ORDER_A as BitOrder; pub use pac::spim0::frequency::FREQUENCY_A as Frequency; use crate::chip::{EASY_DMA_SIZE, FORCE_COPY_BUFFER_SIZE}; -use crate::gpio::sealed::Pin as _; -use crate::gpio::{self, convert_drive, AnyPin, OutputDrive, Pin as GpioPin, PselBits}; +use crate::gpio::{self, convert_drive, AnyPin, OutputDrive, Pin as GpioPin, PselBits, SealedPin as _}; use crate::interrupt::typelevel::Interrupt; use crate::util::{slice_in_ram_or, slice_ptr_len, slice_ptr_parts, slice_ptr_parts_mut}; use crate::{interrupt, pac, Peripheral}; @@ -487,54 +489,46 @@ impl<'d, T: Instance> Drop for Spim<'d, T> { } } -pub(crate) mod sealed { +pub(crate) struct State { + waker: AtomicWaker, #[cfg(feature = "_nrf52832_anomaly_109")] - use core::sync::atomic::AtomicU8; + rx: AtomicU8, + #[cfg(feature = "_nrf52832_anomaly_109")] + tx: AtomicU8, +} - use embassy_sync::waitqueue::AtomicWaker; - - use super::*; - - pub struct State { - pub waker: AtomicWaker, - #[cfg(feature = "_nrf52832_anomaly_109")] - pub rx: AtomicU8, - #[cfg(feature = "_nrf52832_anomaly_109")] - pub tx: AtomicU8, - } - - impl State { - pub const fn new() -> Self { - Self { - waker: AtomicWaker::new(), - #[cfg(feature = "_nrf52832_anomaly_109")] - rx: AtomicU8::new(0), - #[cfg(feature = "_nrf52832_anomaly_109")] - tx: AtomicU8::new(0), - } +impl State { + pub(crate) const fn new() -> Self { + Self { + waker: AtomicWaker::new(), + #[cfg(feature = "_nrf52832_anomaly_109")] + rx: AtomicU8::new(0), + #[cfg(feature = "_nrf52832_anomaly_109")] + tx: AtomicU8::new(0), } } - - pub trait Instance { - fn regs() -> &'static pac::spim0::RegisterBlock; - fn state() -> &'static State; - } +} + +pub(crate) trait SealedInstance { + fn regs() -> &'static pac::spim0::RegisterBlock; + fn state() -> &'static State; } /// SPIM peripheral instance -pub trait Instance: Peripheral

+ sealed::Instance + 'static { +#[allow(private_bounds)] +pub trait Instance: Peripheral

+ SealedInstance + 'static { /// Interrupt for this peripheral. type Interrupt: interrupt::typelevel::Interrupt; } macro_rules! impl_spim { ($type:ident, $pac_type:ident, $irq:ident) => { - impl crate::spim::sealed::Instance for peripherals::$type { + impl crate::spim::SealedInstance for peripherals::$type { fn regs() -> &'static pac::spim0::RegisterBlock { unsafe { &*pac::$pac_type::ptr() } } - fn state() -> &'static crate::spim::sealed::State { - static STATE: crate::spim::sealed::State = crate::spim::sealed::State::new(); + fn state() -> &'static crate::spim::State { + static STATE: crate::spim::State = crate::spim::State::new(); &STATE } } diff --git a/embassy-nrf/src/spis.rs b/embassy-nrf/src/spis.rs index 772ca40cc..47bbeaf77 100644 --- a/embassy-nrf/src/spis.rs +++ b/embassy-nrf/src/spis.rs @@ -8,12 +8,12 @@ use core::task::Poll; use embassy_embedded_hal::SetConfig; use embassy_hal_internal::{into_ref, PeripheralRef}; +use embassy_sync::waitqueue::AtomicWaker; pub use embedded_hal_02::spi::{Mode, Phase, Polarity, MODE_0, MODE_1, MODE_2, MODE_3}; pub use pac::spis0::config::ORDER_A as BitOrder; use crate::chip::{EASY_DMA_SIZE, FORCE_COPY_BUFFER_SIZE}; -use crate::gpio::sealed::Pin as _; -use crate::gpio::{self, AnyPin, Pin as GpioPin}; +use crate::gpio::{self, AnyPin, Pin as GpioPin, SealedPin as _}; use crate::interrupt::typelevel::Interrupt; use crate::util::{slice_in_ram_or, slice_ptr_parts, slice_ptr_parts_mut}; use crate::{interrupt, pac, Peripheral}; @@ -456,43 +456,38 @@ impl<'d, T: Instance> Drop for Spis<'d, T> { } } -pub(crate) mod sealed { - use embassy_sync::waitqueue::AtomicWaker; +pub(crate) struct State { + waker: AtomicWaker, +} - use super::*; - - pub struct State { - pub waker: AtomicWaker, - } - - impl State { - pub const fn new() -> Self { - Self { - waker: AtomicWaker::new(), - } +impl State { + pub(crate) const fn new() -> Self { + Self { + waker: AtomicWaker::new(), } } - - pub trait Instance { - fn regs() -> &'static pac::spis0::RegisterBlock; - fn state() -> &'static State; - } +} + +pub(crate) trait SealedInstance { + fn regs() -> &'static pac::spis0::RegisterBlock; + fn state() -> &'static State; } /// SPIS peripheral instance -pub trait Instance: Peripheral

+ sealed::Instance + 'static { +#[allow(private_bounds)] +pub trait Instance: Peripheral

+ SealedInstance + 'static { /// Interrupt for this peripheral. type Interrupt: interrupt::typelevel::Interrupt; } macro_rules! impl_spis { ($type:ident, $pac_type:ident, $irq:ident) => { - impl crate::spis::sealed::Instance for peripherals::$type { + impl crate::spis::SealedInstance for peripherals::$type { fn regs() -> &'static pac::spis0::RegisterBlock { unsafe { &*pac::$pac_type::ptr() } } - fn state() -> &'static crate::spis::sealed::State { - static STATE: crate::spis::sealed::State = crate::spis::sealed::State::new(); + fn state() -> &'static crate::spis::State { + static STATE: crate::spis::State = crate::spis::State::new(); &STATE } } diff --git a/embassy-nrf/src/timer.rs b/embassy-nrf/src/timer.rs index 2970ad3f2..ac5328ded 100644 --- a/embassy-nrf/src/timer.rs +++ b/embassy-nrf/src/timer.rs @@ -11,30 +11,25 @@ use embassy_hal_internal::{into_ref, PeripheralRef}; use crate::ppi::{Event, Task}; use crate::{pac, Peripheral}; -pub(crate) mod sealed { - - use super::*; - - pub trait Instance { - /// The number of CC registers this instance has. - const CCS: usize; - fn regs() -> &'static pac::timer0::RegisterBlock; - } - pub trait ExtendedInstance {} +pub(crate) trait SealedInstance { + /// The number of CC registers this instance has. + const CCS: usize; + fn regs() -> &'static pac::timer0::RegisterBlock; } /// Basic Timer instance. -pub trait Instance: Peripheral

+ sealed::Instance + 'static + Send { +#[allow(private_bounds)] +pub trait Instance: Peripheral

+ SealedInstance + 'static + Send { /// Interrupt for this peripheral. type Interrupt: crate::interrupt::typelevel::Interrupt; } /// Extended timer instance. -pub trait ExtendedInstance: Instance + sealed::ExtendedInstance {} +pub trait ExtendedInstance: Instance {} macro_rules! impl_timer { ($type:ident, $pac_type:ident, $irq:ident, $ccs:literal) => { - impl crate::timer::sealed::Instance for peripherals::$type { + impl crate::timer::SealedInstance for peripherals::$type { const CCS: usize = $ccs; fn regs() -> &'static pac::timer0::RegisterBlock { unsafe { &*(pac::$pac_type::ptr() as *const pac::timer0::RegisterBlock) } @@ -49,7 +44,6 @@ macro_rules! impl_timer { }; ($type:ident, $pac_type:ident, $irq:ident, extended) => { impl_timer!($type, $pac_type, $irq, 6); - impl crate::timer::sealed::ExtendedInstance for peripherals::$type {} impl crate::timer::ExtendedInstance for peripherals::$type {} }; } diff --git a/embassy-nrf/src/twim.rs b/embassy-nrf/src/twim.rs index 24810a08c..c64743ecc 100644 --- a/embassy-nrf/src/twim.rs +++ b/embassy-nrf/src/twim.rs @@ -727,41 +727,38 @@ impl<'a, T: Instance> Drop for Twim<'a, T> { } } -pub(crate) mod sealed { - use super::*; +pub(crate) struct State { + end_waker: AtomicWaker, +} - pub struct State { - pub end_waker: AtomicWaker, - } - - impl State { - pub const fn new() -> Self { - Self { - end_waker: AtomicWaker::new(), - } +impl State { + pub(crate) const fn new() -> Self { + Self { + end_waker: AtomicWaker::new(), } } - - pub trait Instance { - fn regs() -> &'static pac::twim0::RegisterBlock; - fn state() -> &'static State; - } +} + +pub(crate) trait SealedInstance { + fn regs() -> &'static pac::twim0::RegisterBlock; + fn state() -> &'static State; } /// TWIM peripheral instance. -pub trait Instance: Peripheral

+ sealed::Instance + 'static { +#[allow(private_bounds)] +pub trait Instance: Peripheral

+ SealedInstance + 'static { /// Interrupt for this peripheral. type Interrupt: interrupt::typelevel::Interrupt; } macro_rules! impl_twim { ($type:ident, $pac_type:ident, $irq:ident) => { - impl crate::twim::sealed::Instance for peripherals::$type { + impl crate::twim::SealedInstance for peripherals::$type { fn regs() -> &'static pac::twim0::RegisterBlock { unsafe { &*pac::$pac_type::ptr() } } - fn state() -> &'static crate::twim::sealed::State { - static STATE: crate::twim::sealed::State = crate::twim::sealed::State::new(); + fn state() -> &'static crate::twim::State { + static STATE: crate::twim::State = crate::twim::State::new(); &STATE } } diff --git a/embassy-nrf/src/twis.rs b/embassy-nrf/src/twis.rs index 415150447..f3eab008f 100644 --- a/embassy-nrf/src/twis.rs +++ b/embassy-nrf/src/twis.rs @@ -754,41 +754,38 @@ impl<'a, T: Instance> Drop for Twis<'a, T> { } } -pub(crate) mod sealed { - use super::*; +pub(crate) struct State { + waker: AtomicWaker, +} - pub struct State { - pub waker: AtomicWaker, - } - - impl State { - pub const fn new() -> Self { - Self { - waker: AtomicWaker::new(), - } +impl State { + pub(crate) const fn new() -> Self { + Self { + waker: AtomicWaker::new(), } } - - pub trait Instance { - fn regs() -> &'static pac::twis0::RegisterBlock; - fn state() -> &'static State; - } +} + +pub(crate) trait SealedInstance { + fn regs() -> &'static pac::twis0::RegisterBlock; + fn state() -> &'static State; } /// TWIS peripheral instance. -pub trait Instance: Peripheral

+ sealed::Instance + 'static { +#[allow(private_bounds)] +pub trait Instance: Peripheral

+ SealedInstance + 'static { /// Interrupt for this peripheral. type Interrupt: interrupt::typelevel::Interrupt; } macro_rules! impl_twis { ($type:ident, $pac_type:ident, $irq:ident) => { - impl crate::twis::sealed::Instance for peripherals::$type { + impl crate::twis::SealedInstance for peripherals::$type { fn regs() -> &'static pac::twis0::RegisterBlock { unsafe { &*pac::$pac_type::ptr() } } - fn state() -> &'static crate::twis::sealed::State { - static STATE: crate::twis::sealed::State = crate::twis::sealed::State::new(); + fn state() -> &'static crate::twis::State { + static STATE: crate::twis::State = crate::twis::State::new(); &STATE } } diff --git a/embassy-nrf/src/uarte.rs b/embassy-nrf/src/uarte.rs index cbd5dccbc..fa0a773a8 100644 --- a/embassy-nrf/src/uarte.rs +++ b/embassy-nrf/src/uarte.rs @@ -15,18 +15,18 @@ use core::future::poll_fn; use core::marker::PhantomData; -use core::sync::atomic::{compiler_fence, Ordering}; +use core::sync::atomic::{compiler_fence, AtomicU8, Ordering}; use core::task::Poll; use embassy_hal_internal::drop::OnDrop; use embassy_hal_internal::{into_ref, PeripheralRef}; +use embassy_sync::waitqueue::AtomicWaker; use pac::uarte0::RegisterBlock; // Re-export SVD variants to allow user to directly set values. pub use pac::uarte0::{baudrate::BAUDRATE_A as Baudrate, config::PARITY_A as Parity}; use crate::chip::{EASY_DMA_SIZE, FORCE_COPY_BUFFER_SIZE}; -use crate::gpio::sealed::Pin as _; -use crate::gpio::{self, AnyPin, Pin as GpioPin, PselBits}; +use crate::gpio::{self, AnyPin, Pin as GpioPin, PselBits, SealedPin as _}; use crate::interrupt::typelevel::Interrupt; use crate::ppi::{AnyConfigurableChannel, ConfigurableChannel, Event, Ppi, Task}; use crate::timer::{Frequency, Instance as TimerInstance, Timer}; @@ -939,7 +939,7 @@ pub(crate) fn apply_workaround_for_enable_anomaly(r: &crate::pac::uarte0::Regist } } -pub(crate) fn drop_tx_rx(r: &pac::uarte0::RegisterBlock, s: &sealed::State) { +pub(crate) fn drop_tx_rx(r: &pac::uarte0::RegisterBlock, s: &State) { if s.tx_rx_refcount.fetch_sub(1, Ordering::Relaxed) == 1 { // Finally we can disable, and we do so for the peripheral // i.e. not just rx concerns. @@ -954,49 +954,42 @@ pub(crate) fn drop_tx_rx(r: &pac::uarte0::RegisterBlock, s: &sealed::State) { } } -pub(crate) mod sealed { - use core::sync::atomic::AtomicU8; - - use embassy_sync::waitqueue::AtomicWaker; - - use super::*; - - pub struct State { - pub rx_waker: AtomicWaker, - pub tx_waker: AtomicWaker, - pub tx_rx_refcount: AtomicU8, - } - impl State { - pub const fn new() -> Self { - Self { - rx_waker: AtomicWaker::new(), - tx_waker: AtomicWaker::new(), - tx_rx_refcount: AtomicU8::new(0), - } +pub(crate) struct State { + pub(crate) rx_waker: AtomicWaker, + pub(crate) tx_waker: AtomicWaker, + pub(crate) tx_rx_refcount: AtomicU8, +} +impl State { + pub(crate) const fn new() -> Self { + Self { + rx_waker: AtomicWaker::new(), + tx_waker: AtomicWaker::new(), + tx_rx_refcount: AtomicU8::new(0), } } - - pub trait Instance { - fn regs() -> &'static pac::uarte0::RegisterBlock; - fn state() -> &'static State; - fn buffered_state() -> &'static crate::buffered_uarte::State; - } +} + +pub(crate) trait SealedInstance { + fn regs() -> &'static pac::uarte0::RegisterBlock; + fn state() -> &'static State; + fn buffered_state() -> &'static crate::buffered_uarte::State; } /// UARTE peripheral instance. -pub trait Instance: Peripheral

+ sealed::Instance + 'static + Send { +#[allow(private_bounds)] +pub trait Instance: Peripheral

+ SealedInstance + 'static + Send { /// Interrupt for this peripheral. type Interrupt: interrupt::typelevel::Interrupt; } macro_rules! impl_uarte { ($type:ident, $pac_type:ident, $irq:ident) => { - impl crate::uarte::sealed::Instance for peripherals::$type { + impl crate::uarte::SealedInstance for peripherals::$type { fn regs() -> &'static pac::uarte0::RegisterBlock { unsafe { &*pac::$pac_type::ptr() } } - fn state() -> &'static crate::uarte::sealed::State { - static STATE: crate::uarte::sealed::State = crate::uarte::sealed::State::new(); + fn state() -> &'static crate::uarte::State { + static STATE: crate::uarte::State = crate::uarte::State::new(); &STATE } fn buffered_state() -> &'static crate::buffered_uarte::State { diff --git a/embassy-nrf/src/usb/mod.rs b/embassy-nrf/src/usb/mod.rs index e26b49db3..09cf87e97 100644 --- a/embassy-nrf/src/usb/mod.rs +++ b/embassy-nrf/src/usb/mod.rs @@ -793,23 +793,20 @@ impl Allocator { } } -pub(crate) mod sealed { - use super::*; - - pub trait Instance { - fn regs() -> &'static pac::usbd::RegisterBlock; - } +pub(crate) trait SealedInstance { + fn regs() -> &'static pac::usbd::RegisterBlock; } /// USB peripheral instance. -pub trait Instance: Peripheral

+ sealed::Instance + 'static + Send { +#[allow(private_bounds)] +pub trait Instance: Peripheral

+ SealedInstance + 'static + Send { /// Interrupt for this peripheral. type Interrupt: interrupt::typelevel::Interrupt; } macro_rules! impl_usb { ($type:ident, $pac_type:ident, $irq:ident) => { - impl crate::usb::sealed::Instance for peripherals::$type { + impl crate::usb::SealedInstance for peripherals::$type { fn regs() -> &'static pac::usbd::RegisterBlock { unsafe { &*pac::$pac_type::ptr() } } From a84b33995eacc32e0e13d70293fa9bd7b2bd75f8 Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Fri, 5 Apr 2024 00:35:25 +0200 Subject: [PATCH 087/581] rp: remove mod sealed. --- embassy-rp/src/adc.rs | 24 ++++---- embassy-rp/src/clocks.rs | 11 ++-- embassy-rp/src/dma.rs | 23 ++++--- embassy-rp/src/flash.rs | 16 ++--- embassy-rp/src/gpio.rs | 96 ++++++++++++++---------------- embassy-rp/src/i2c.rs | 51 +++++++--------- embassy-rp/src/pio/mod.rs | 64 ++++++++++---------- embassy-rp/src/pwm.rs | 12 ++-- embassy-rp/src/rtc/mod.rs | 11 ++-- embassy-rp/src/spi.rs | 27 ++++----- embassy-rp/src/uart/mod.rs | 55 ++++++++--------- embassy-rp/src/usb.rs | 13 ++-- examples/rp/src/bin/pio_stepper.rs | 2 +- 13 files changed, 189 insertions(+), 216 deletions(-) diff --git a/embassy-rp/src/adc.rs b/embassy-rp/src/adc.rs index 4c01fe195..101c5b71f 100644 --- a/embassy-rp/src/adc.rs +++ b/embassy-rp/src/adc.rs @@ -8,8 +8,7 @@ use core::task::Poll; use embassy_hal_internal::{into_ref, PeripheralRef}; use embassy_sync::waitqueue::AtomicWaker; -use crate::gpio::sealed::Pin as GpioPin; -use crate::gpio::{self, AnyPin, Pull}; +use crate::gpio::{self, AnyPin, Pull, SealedPin as GpioPin}; use crate::interrupt::typelevel::Binding; use crate::interrupt::InterruptExt; use crate::peripherals::{ADC, ADC_TEMP_SENSOR}; @@ -334,29 +333,28 @@ impl interrupt::typelevel::Handler for Inter } } -mod sealed { - pub trait AdcSample: crate::dma::Word {} - - pub trait AdcChannel {} -} +trait SealedAdcSample: crate::dma::Word {} +trait SealedAdcChannel {} /// ADC sample. -pub trait AdcSample: sealed::AdcSample {} +#[allow(private_bounds)] +pub trait AdcSample: SealedAdcSample {} -impl sealed::AdcSample for u16 {} +impl SealedAdcSample for u16 {} impl AdcSample for u16 {} -impl sealed::AdcSample for u8 {} +impl SealedAdcSample for u8 {} impl AdcSample for u8 {} /// ADC channel. -pub trait AdcChannel: sealed::AdcChannel {} +#[allow(private_bounds)] +pub trait AdcChannel: SealedAdcChannel {} /// ADC pin. pub trait AdcPin: AdcChannel + gpio::Pin {} macro_rules! impl_pin { ($pin:ident, $channel:expr) => { - impl sealed::AdcChannel for peripherals::$pin {} + impl SealedAdcChannel for peripherals::$pin {} impl AdcChannel for peripherals::$pin {} impl AdcPin for peripherals::$pin {} }; @@ -367,5 +365,5 @@ impl_pin!(PIN_27, 1); impl_pin!(PIN_28, 2); impl_pin!(PIN_29, 3); -impl sealed::AdcChannel for peripherals::ADC_TEMP_SENSOR {} +impl SealedAdcChannel for peripherals::ADC_TEMP_SENSOR {} impl AdcChannel for peripherals::ADC_TEMP_SENSOR {} diff --git a/embassy-rp/src/clocks.rs b/embassy-rp/src/clocks.rs index b7f6aeac9..bedb79464 100644 --- a/embassy-rp/src/clocks.rs +++ b/embassy-rp/src/clocks.rs @@ -6,8 +6,7 @@ use core::sync::atomic::{AtomicU16, AtomicU32, Ordering}; use embassy_hal_internal::{into_ref, PeripheralRef}; use pac::clocks::vals::*; -use crate::gpio::sealed::Pin; -use crate::gpio::AnyPin; +use crate::gpio::{AnyPin, SealedPin}; use crate::pac::common::{Reg, RW}; use crate::{pac, reset, Peripheral}; @@ -788,14 +787,14 @@ impl_gpinpin!(PIN_20, 20, 0); impl_gpinpin!(PIN_22, 22, 1); /// General purpose clock input driver. -pub struct Gpin<'d, T: Pin> { +pub struct Gpin<'d, T: GpinPin> { gpin: PeripheralRef<'d, AnyPin>, _phantom: PhantomData, } -impl<'d, T: Pin> Gpin<'d, T> { +impl<'d, T: GpinPin> Gpin<'d, T> { /// Create new gpin driver. - pub fn new(gpin: impl Peripheral

+ 'd) -> Gpin<'d, P> { + pub fn new(gpin: impl Peripheral

+ 'd) -> Self { into_ref!(gpin); gpin.gpio().ctrl().write(|w| w.set_funcsel(0x08)); @@ -811,7 +810,7 @@ impl<'d, T: Pin> Gpin<'d, T> { // } } -impl<'d, T: Pin> Drop for Gpin<'d, T> { +impl<'d, T: GpinPin> Drop for Gpin<'d, T> { fn drop(&mut self) { self.gpin .gpio() diff --git a/embassy-rp/src/dma.rs b/embassy-rp/src/dma.rs index 44aabce6b..e6374a86c 100644 --- a/embassy-rp/src/dma.rs +++ b/embassy-rp/src/dma.rs @@ -208,14 +208,12 @@ pub(crate) const CHANNEL_COUNT: usize = 12; const NEW_AW: AtomicWaker = AtomicWaker::new(); static CHANNEL_WAKERS: [AtomicWaker; CHANNEL_COUNT] = [NEW_AW; CHANNEL_COUNT]; -mod sealed { - pub trait Channel {} - - pub trait Word {} -} +trait SealedChannel {} +trait SealedWord {} /// DMA channel interface. -pub trait Channel: Peripheral

+ sealed::Channel + Into + Sized + 'static { +#[allow(private_bounds)] +pub trait Channel: Peripheral

+ SealedChannel + Into + Sized + 'static { /// Channel number. fn number(&self) -> u8; @@ -231,26 +229,27 @@ pub trait Channel: Peripheral

+ sealed::Channel + Into + S } /// DMA word. -pub trait Word: sealed::Word { +#[allow(private_bounds)] +pub trait Word: SealedWord { /// Word size. fn size() -> vals::DataSize; } -impl sealed::Word for u8 {} +impl SealedWord for u8 {} impl Word for u8 { fn size() -> vals::DataSize { vals::DataSize::SIZE_BYTE } } -impl sealed::Word for u16 {} +impl SealedWord for u16 {} impl Word for u16 { fn size() -> vals::DataSize { vals::DataSize::SIZE_HALFWORD } } -impl sealed::Word for u32 {} +impl SealedWord for u32 {} impl Word for u32 { fn size() -> vals::DataSize { vals::DataSize::SIZE_WORD @@ -264,7 +263,7 @@ pub struct AnyChannel { impl_peripheral!(AnyChannel); -impl sealed::Channel for AnyChannel {} +impl SealedChannel for AnyChannel {} impl Channel for AnyChannel { fn number(&self) -> u8 { self.number @@ -273,7 +272,7 @@ impl Channel for AnyChannel { macro_rules! channel { ($name:ident, $num:expr) => { - impl sealed::Channel for peripherals::$name {} + impl SealedChannel for peripherals::$name {} impl Channel for peripherals::$name { fn number(&self) -> u8 { $num diff --git a/embassy-rp/src/flash.rs b/embassy-rp/src/flash.rs index 422b77400..45b385cb4 100644 --- a/embassy-rp/src/flash.rs +++ b/embassy-rp/src/flash.rs @@ -903,22 +903,22 @@ pub(crate) unsafe fn in_ram(operation: impl FnOnce()) -> Result<(), Error> { Ok(()) } -mod sealed { - pub trait Instance {} - pub trait Mode {} -} +trait SealedInstance {} +trait SealedMode {} /// Flash instance. -pub trait Instance: sealed::Instance {} +#[allow(private_bounds)] +pub trait Instance: SealedInstance {} /// Flash mode. -pub trait Mode: sealed::Mode {} +#[allow(private_bounds)] +pub trait Mode: SealedMode {} -impl sealed::Instance for FLASH {} +impl SealedInstance for FLASH {} impl Instance for FLASH {} macro_rules! impl_mode { ($name:ident) => { - impl sealed::Mode for $name {} + impl SealedMode for $name {} impl Mode for $name {} }; } diff --git a/embassy-rp/src/gpio.rs b/embassy-rp/src/gpio.rs index a84c00a2c..ea87fd9da 100644 --- a/embassy-rp/src/gpio.rs +++ b/embassy-rp/src/gpio.rs @@ -8,7 +8,6 @@ use core::task::{Context, Poll}; use embassy_hal_internal::{impl_peripheral, into_ref, PeripheralRef}; use embassy_sync::waitqueue::AtomicWaker; -use self::sealed::Pin as _; use crate::interrupt::InterruptExt; use crate::pac::common::{Reg, RW}; use crate::pac::SIO; @@ -802,68 +801,65 @@ impl<'w> Drop for DormantWake<'w> { } } -pub(crate) mod sealed { - use super::*; +pub(crate) trait SealedPin: Sized { + fn pin_bank(&self) -> u8; - pub trait Pin: Sized { - fn pin_bank(&self) -> u8; + #[inline] + fn _pin(&self) -> u8 { + self.pin_bank() & 0x1f + } - #[inline] - fn _pin(&self) -> u8 { - self.pin_bank() & 0x1f + #[inline] + fn _bank(&self) -> Bank { + match self.pin_bank() >> 5 { + #[cfg(feature = "qspi-as-gpio")] + 1 => Bank::Qspi, + _ => Bank::Bank0, } + } - #[inline] - fn _bank(&self) -> Bank { - match self.pin_bank() >> 5 { - #[cfg(feature = "qspi-as-gpio")] - 1 => Bank::Qspi, - _ => Bank::Bank0, - } + fn io(&self) -> pac::io::Io { + match self._bank() { + Bank::Bank0 => crate::pac::IO_BANK0, + #[cfg(feature = "qspi-as-gpio")] + Bank::Qspi => crate::pac::IO_QSPI, } + } - fn io(&self) -> pac::io::Io { - match self._bank() { - Bank::Bank0 => crate::pac::IO_BANK0, - #[cfg(feature = "qspi-as-gpio")] - Bank::Qspi => crate::pac::IO_QSPI, - } - } + fn gpio(&self) -> pac::io::Gpio { + self.io().gpio(self._pin() as _) + } - fn gpio(&self) -> pac::io::Gpio { - self.io().gpio(self._pin() as _) - } + fn pad_ctrl(&self) -> Reg { + let block = match self._bank() { + Bank::Bank0 => crate::pac::PADS_BANK0, + #[cfg(feature = "qspi-as-gpio")] + Bank::Qspi => crate::pac::PADS_QSPI, + }; + block.gpio(self._pin() as _) + } - fn pad_ctrl(&self) -> Reg { - let block = match self._bank() { - Bank::Bank0 => crate::pac::PADS_BANK0, - #[cfg(feature = "qspi-as-gpio")] - Bank::Qspi => crate::pac::PADS_QSPI, - }; - block.gpio(self._pin() as _) - } + fn sio_out(&self) -> pac::sio::Gpio { + SIO.gpio_out(self._bank() as _) + } - fn sio_out(&self) -> pac::sio::Gpio { - SIO.gpio_out(self._bank() as _) - } + fn sio_oe(&self) -> pac::sio::Gpio { + SIO.gpio_oe(self._bank() as _) + } - fn sio_oe(&self) -> pac::sio::Gpio { - SIO.gpio_oe(self._bank() as _) - } + fn sio_in(&self) -> Reg { + SIO.gpio_in(self._bank() as _) + } - fn sio_in(&self) -> Reg { - SIO.gpio_in(self._bank() as _) - } - - fn int_proc(&self) -> pac::io::Int { - let proc = SIO.cpuid().read(); - self.io().int_proc(proc as _) - } + fn int_proc(&self) -> pac::io::Int { + let proc = SIO.cpuid().read(); + self.io().int_proc(proc as _) } } /// Interface for a Pin that can be configured by an [Input] or [Output] driver, or converted to an [AnyPin]. -pub trait Pin: Peripheral

+ Into + sealed::Pin + Sized + 'static { +#[allow(private_bounds)] +pub trait Pin: Peripheral

+ Into + SealedPin + Sized + 'static { /// Degrade to a generic pin struct fn degrade(self) -> AnyPin { AnyPin { @@ -903,7 +899,7 @@ impl AnyPin { impl_peripheral!(AnyPin); impl Pin for AnyPin {} -impl sealed::Pin for AnyPin { +impl SealedPin for AnyPin { fn pin_bank(&self) -> u8 { self.pin_bank } @@ -914,7 +910,7 @@ impl sealed::Pin for AnyPin { macro_rules! impl_pin { ($name:ident, $bank:expr, $pin_num:expr) => { impl Pin for peripherals::$name {} - impl sealed::Pin for peripherals::$name { + impl SealedPin for peripherals::$name { #[inline] fn pin_bank(&self) -> u8 { ($bank as u8) * 32 + $pin_num diff --git a/embassy-rp/src/i2c.rs b/embassy-rp/src/i2c.rs index 26a819b25..256875b4a 100644 --- a/embassy-rp/src/i2c.rs +++ b/embassy-rp/src/i2c.rs @@ -784,34 +784,24 @@ pub fn i2c_reserved_addr(addr: u16) -> bool { ((addr & 0x78) == 0 || (addr & 0x78) == 0x78) && addr != 0 } -mod sealed { - use embassy_sync::waitqueue::AtomicWaker; +pub(crate) trait SealedInstance { + const TX_DREQ: u8; + const RX_DREQ: u8; - use crate::interrupt; - - pub trait Instance { - const TX_DREQ: u8; - const RX_DREQ: u8; - - type Interrupt: interrupt::typelevel::Interrupt; - - fn regs() -> crate::pac::i2c::I2c; - fn reset() -> crate::pac::resets::regs::Peripherals; - fn waker() -> &'static AtomicWaker; - } - - pub trait Mode {} - - pub trait SdaPin {} - pub trait SclPin {} + fn regs() -> crate::pac::i2c::I2c; + fn reset() -> crate::pac::resets::regs::Peripherals; + fn waker() -> &'static AtomicWaker; } +trait SealedMode {} + /// Driver mode. -pub trait Mode: sealed::Mode {} +#[allow(private_bounds)] +pub trait Mode: SealedMode {} macro_rules! impl_mode { ($name:ident) => { - impl sealed::Mode for $name {} + impl SealedMode for $name {} impl Mode for $name {} }; } @@ -825,16 +815,18 @@ impl_mode!(Blocking); impl_mode!(Async); /// I2C instance. -pub trait Instance: sealed::Instance {} +#[allow(private_bounds)] +pub trait Instance: SealedInstance { + /// Interrupt for this peripheral. + type Interrupt: interrupt::typelevel::Interrupt; +} macro_rules! impl_instance { ($type:ident, $irq:ident, $reset:ident, $tx_dreq:expr, $rx_dreq:expr) => { - impl sealed::Instance for peripherals::$type { + impl SealedInstance for peripherals::$type { const TX_DREQ: u8 = $tx_dreq; const RX_DREQ: u8 = $rx_dreq; - type Interrupt = crate::interrupt::typelevel::$irq; - #[inline] fn regs() -> pac::i2c::I2c { pac::$type @@ -854,7 +846,9 @@ macro_rules! impl_instance { &WAKER } } - impl Instance for peripherals::$type {} + impl Instance for peripherals::$type { + type Interrupt = crate::interrupt::typelevel::$irq; + } }; } @@ -862,13 +856,12 @@ impl_instance!(I2C0, I2C0_IRQ, set_i2c0, 32, 33); impl_instance!(I2C1, I2C1_IRQ, set_i2c1, 34, 35); /// SDA pin. -pub trait SdaPin: sealed::SdaPin + crate::gpio::Pin {} +pub trait SdaPin: crate::gpio::Pin {} /// SCL pin. -pub trait SclPin: sealed::SclPin + crate::gpio::Pin {} +pub trait SclPin: crate::gpio::Pin {} macro_rules! impl_pin { ($pin:ident, $instance:ident, $function:ident) => { - impl sealed::$function for peripherals::$pin {} impl $function for peripherals::$pin {} }; } diff --git a/embassy-rp/src/pio/mod.rs b/embassy-rp/src/pio/mod.rs index 7eca700ba..2e5c57a26 100644 --- a/embassy-rp/src/pio/mod.rs +++ b/embassy-rp/src/pio/mod.rs @@ -15,8 +15,7 @@ use pac::pio::vals::SmExecctrlStatusSel; use pio::{Program, SideSet, Wrap}; use crate::dma::{Channel, Transfer, Word}; -use crate::gpio::sealed::Pin as SealedPin; -use crate::gpio::{self, AnyPin, Drive, Level, Pull, SlewRate}; +use crate::gpio::{self, AnyPin, Drive, Level, Pull, SealedPin, SlewRate}; use crate::interrupt::typelevel::{Binding, Handler, Interrupt}; use crate::pac::dma::vals::TreqSel; use crate::relocate::RelocatedProgram; @@ -695,6 +694,12 @@ impl<'d, PIO: Instance + 'd, const SM: usize> StateMachine<'d, PIO, SM> { } } + /// Set the clock divider for this state machine. + pub fn set_clock_divider(&mut self, clock_divider: FixedU32) { + let sm = Self::this_sm(); + sm.clkdiv().write(|w| w.0 = clock_divider.to_bits() << 8); + } + #[inline(always)] fn this_sm() -> crate::pac::pio::StateMachine { PIO::PIO.sm(SM) @@ -1148,49 +1153,47 @@ fn on_pio_drop() { } } -mod sealed { - use super::*; +trait SealedInstance { + const PIO_NO: u8; + const PIO: &'static crate::pac::pio::Pio; + const FUNCSEL: crate::pac::io::vals::Gpio0ctrlFuncsel; - pub trait PioPin {} + #[inline] + fn wakers() -> &'static Wakers { + const NEW_AW: AtomicWaker = AtomicWaker::new(); + static WAKERS: Wakers = Wakers([NEW_AW; 12]); - pub trait Instance { - const PIO_NO: u8; - const PIO: &'static crate::pac::pio::Pio; - const FUNCSEL: crate::pac::io::vals::Gpio0ctrlFuncsel; - type Interrupt: crate::interrupt::typelevel::Interrupt; + &WAKERS + } - #[inline] - fn wakers() -> &'static Wakers { - const NEW_AW: AtomicWaker = AtomicWaker::new(); - static WAKERS: Wakers = Wakers([NEW_AW; 12]); + #[inline] + fn state() -> &'static State { + static STATE: State = State { + users: AtomicU8::new(0), + used_pins: AtomicU32::new(0), + }; - &WAKERS - } - - #[inline] - fn state() -> &'static State { - static STATE: State = State { - users: AtomicU8::new(0), - used_pins: AtomicU32::new(0), - }; - - &STATE - } + &STATE } } /// PIO instance. -pub trait Instance: sealed::Instance + Sized + Unpin {} +#[allow(private_bounds)] +pub trait Instance: SealedInstance + Sized + Unpin { + /// Interrupt for this peripheral. + type Interrupt: crate::interrupt::typelevel::Interrupt; +} macro_rules! impl_pio { ($name:ident, $pio:expr, $pac:ident, $funcsel:ident, $irq:ident) => { - impl sealed::Instance for peripherals::$name { + impl SealedInstance for peripherals::$name { const PIO_NO: u8 = $pio; const PIO: &'static pac::pio::Pio = &pac::$pac; const FUNCSEL: pac::io::vals::Gpio0ctrlFuncsel = pac::io::vals::Gpio0ctrlFuncsel::$funcsel; + } + impl Instance for peripherals::$name { type Interrupt = crate::interrupt::typelevel::$irq; } - impl Instance for peripherals::$name {} }; } @@ -1198,12 +1201,11 @@ impl_pio!(PIO0, 0, PIO0, PIO0_0, PIO0_IRQ_0); impl_pio!(PIO1, 1, PIO1, PIO1_0, PIO1_IRQ_0); /// PIO pin. -pub trait PioPin: sealed::PioPin + gpio::Pin {} +pub trait PioPin: gpio::Pin {} macro_rules! impl_pio_pin { ($( $pin:ident, )*) => { $( - impl sealed::PioPin for peripherals::$pin {} impl PioPin for peripherals::$pin {} )* }; diff --git a/embassy-rp/src/pwm.rs b/embassy-rp/src/pwm.rs index 5aab3ff4f..7613e4e58 100644 --- a/embassy-rp/src/pwm.rs +++ b/embassy-rp/src/pwm.rs @@ -6,8 +6,7 @@ use fixed::FixedU16; use pac::pwm::regs::{ChDiv, Intr}; use pac::pwm::vals::Divmode; -use crate::gpio::sealed::Pin as _; -use crate::gpio::{AnyPin, Pin as GpioPin}; +use crate::gpio::{AnyPin, Pin as GpioPin, SealedPin as _}; use crate::{pac, peripherals, RegExt}; /// The configuration of a PWM slice. @@ -300,12 +299,11 @@ impl<'d, T: Slice> Drop for Pwm<'d, T> { } } -mod sealed { - pub trait Slice {} -} +trait SealedSlice {} /// PWM Slice. -pub trait Slice: Peripheral

+ sealed::Slice + Sized + 'static { +#[allow(private_bounds)] +pub trait Slice: Peripheral

+ SealedSlice + Sized + 'static { /// Slice number. fn number(&self) -> u8; @@ -317,7 +315,7 @@ pub trait Slice: Peripheral

+ sealed::Slice + Sized + 'static { macro_rules! slice { ($name:ident, $num:expr) => { - impl sealed::Slice for peripherals::$name {} + impl SealedSlice for peripherals::$name {} impl Slice for peripherals::$name { fn number(&self) -> u8 { $num diff --git a/embassy-rp/src/rtc/mod.rs b/embassy-rp/src/rtc/mod.rs index c8691bdc2..2ce7ac645 100644 --- a/embassy-rp/src/rtc/mod.rs +++ b/embassy-rp/src/rtc/mod.rs @@ -188,16 +188,15 @@ pub enum RtcError { NotRunning, } -mod sealed { - pub trait Instance { - fn regs(&self) -> crate::pac::rtc::Rtc; - } +trait SealedInstance { + fn regs(&self) -> crate::pac::rtc::Rtc; } /// RTC peripheral instance. -pub trait Instance: sealed::Instance {} +#[allow(private_bounds)] +pub trait Instance: SealedInstance {} -impl sealed::Instance for crate::peripherals::RTC { +impl SealedInstance for crate::peripherals::RTC { fn regs(&self) -> crate::pac::rtc::Rtc { crate::pac::RTC } diff --git a/embassy-rp/src/spi.rs b/embassy-rp/src/spi.rs index a2a22ffe5..ef4c644ae 100644 --- a/embassy-rp/src/spi.rs +++ b/embassy-rp/src/spi.rs @@ -7,8 +7,7 @@ use embassy_hal_internal::{into_ref, PeripheralRef}; pub use embedded_hal_02::spi::{Phase, Polarity}; use crate::dma::{AnyChannel, Channel}; -use crate::gpio::sealed::Pin as _; -use crate::gpio::{AnyPin, Pin as GpioPin}; +use crate::gpio::{AnyPin, Pin as GpioPin, SealedPin as _}; use crate::{pac, peripherals, Peripheral}; /// SPI errors. @@ -443,28 +442,26 @@ impl<'d, T: Instance> Spi<'d, T, Async> { } } -mod sealed { - use super::*; +trait SealedMode {} - pub trait Mode {} +trait SealedInstance { + const TX_DREQ: u8; + const RX_DREQ: u8; - pub trait Instance { - const TX_DREQ: u8; - const RX_DREQ: u8; - - fn regs(&self) -> pac::spi::Spi; - } + fn regs(&self) -> pac::spi::Spi; } /// Mode. -pub trait Mode: sealed::Mode {} +#[allow(private_bounds)] +pub trait Mode: SealedMode {} /// SPI instance trait. -pub trait Instance: sealed::Instance {} +#[allow(private_bounds)] +pub trait Instance: SealedInstance {} macro_rules! impl_instance { ($type:ident, $irq:ident, $tx_dreq:expr, $rx_dreq:expr) => { - impl sealed::Instance for peripherals::$type { + impl SealedInstance for peripherals::$type { const TX_DREQ: u8 = $tx_dreq; const RX_DREQ: u8 = $rx_dreq; @@ -527,7 +524,7 @@ impl_pin!(PIN_29, SPI1, CsPin); macro_rules! impl_mode { ($name:ident) => { - impl sealed::Mode for $name {} + impl SealedMode for $name {} impl Mode for $name {} }; } diff --git a/embassy-rp/src/uart/mod.rs b/embassy-rp/src/uart/mod.rs index 65dcf4eb4..ee2dcb27d 100644 --- a/embassy-rp/src/uart/mod.rs +++ b/embassy-rp/src/uart/mod.rs @@ -12,8 +12,7 @@ use pac::uart::regs::Uartris; use crate::clocks::clk_peri_freq; use crate::dma::{AnyChannel, Channel}; -use crate::gpio::sealed::Pin; -use crate::gpio::AnyPin; +use crate::gpio::{AnyPin, SealedPin}; use crate::interrupt::typelevel::{Binding, Interrupt}; use crate::pac::io::vals::{Inover, Outover}; use crate::{interrupt, pac, peripherals, Peripheral, RegExt}; @@ -1107,35 +1106,26 @@ impl<'d, T: Instance, M: Mode> embedded_hal_nb::serial::Write for Uart<'d, T, M> } } -mod sealed { - use super::*; +trait SealedMode {} - pub trait Mode {} +trait SealedInstance { + const TX_DREQ: u8; + const RX_DREQ: u8; - pub trait Instance { - const TX_DREQ: u8; - const RX_DREQ: u8; + fn regs() -> pac::uart::Uart; - type Interrupt: interrupt::typelevel::Interrupt; + fn buffered_state() -> &'static buffered::State; - fn regs() -> pac::uart::Uart; - - fn buffered_state() -> &'static buffered::State; - - fn dma_state() -> &'static DmaState; - } - pub trait TxPin {} - pub trait RxPin {} - pub trait CtsPin {} - pub trait RtsPin {} + fn dma_state() -> &'static DmaState; } /// UART mode. -pub trait Mode: sealed::Mode {} +#[allow(private_bounds)] +pub trait Mode: SealedMode {} macro_rules! impl_mode { ($name:ident) => { - impl sealed::Mode for $name {} + impl SealedMode for $name {} impl Mode for $name {} }; } @@ -1149,16 +1139,18 @@ impl_mode!(Blocking); impl_mode!(Async); /// UART instance. -pub trait Instance: sealed::Instance {} +#[allow(private_bounds)] +pub trait Instance: SealedInstance { + /// Interrupt for this instance. + type Interrupt: interrupt::typelevel::Interrupt; +} macro_rules! impl_instance { ($inst:ident, $irq:ident, $tx_dreq:expr, $rx_dreq:expr) => { - impl sealed::Instance for peripherals::$inst { + impl SealedInstance for peripherals::$inst { const TX_DREQ: u8 = $tx_dreq; const RX_DREQ: u8 = $rx_dreq; - type Interrupt = crate::interrupt::typelevel::$irq; - fn regs() -> pac::uart::Uart { pac::$inst } @@ -1176,7 +1168,9 @@ macro_rules! impl_instance { &STATE } } - impl Instance for peripherals::$inst {} + impl Instance for peripherals::$inst { + type Interrupt = crate::interrupt::typelevel::$irq; + } }; } @@ -1184,17 +1178,16 @@ impl_instance!(UART0, UART0_IRQ, 20, 21); impl_instance!(UART1, UART1_IRQ, 22, 23); /// Trait for TX pins. -pub trait TxPin: sealed::TxPin + crate::gpio::Pin {} +pub trait TxPin: crate::gpio::Pin {} /// Trait for RX pins. -pub trait RxPin: sealed::RxPin + crate::gpio::Pin {} +pub trait RxPin: crate::gpio::Pin {} /// Trait for Clear To Send (CTS) pins. -pub trait CtsPin: sealed::CtsPin + crate::gpio::Pin {} +pub trait CtsPin: crate::gpio::Pin {} /// Trait for Request To Send (RTS) pins. -pub trait RtsPin: sealed::RtsPin + crate::gpio::Pin {} +pub trait RtsPin: crate::gpio::Pin {} macro_rules! impl_pin { ($pin:ident, $instance:ident, $function:ident) => { - impl sealed::$function for peripherals::$pin {} impl $function for peripherals::$pin {} }; } diff --git a/embassy-rp/src/usb.rs b/embassy-rp/src/usb.rs index d68dee4a3..37d37d6d9 100644 --- a/embassy-rp/src/usb.rs +++ b/embassy-rp/src/usb.rs @@ -14,20 +14,19 @@ use embassy_usb_driver::{ use crate::interrupt::typelevel::{Binding, Interrupt}; use crate::{interrupt, pac, peripherals, Peripheral, RegExt}; -pub(crate) mod sealed { - pub trait Instance { - fn regs() -> crate::pac::usb::Usb; - fn dpram() -> crate::pac::usb_dpram::UsbDpram; - } +trait SealedInstance { + fn regs() -> crate::pac::usb::Usb; + fn dpram() -> crate::pac::usb_dpram::UsbDpram; } /// USB peripheral instance. -pub trait Instance: sealed::Instance + 'static { +#[allow(private_bounds)] +pub trait Instance: SealedInstance + 'static { /// Interrupt for this peripheral. type Interrupt: interrupt::typelevel::Interrupt; } -impl crate::usb::sealed::Instance for peripherals::USB { +impl crate::usb::SealedInstance for peripherals::USB { fn regs() -> pac::usb::Usb { pac::USBCTRL_REGS } diff --git a/examples/rp/src/bin/pio_stepper.rs b/examples/rp/src/bin/pio_stepper.rs index ab9ecf623..4952f4fbd 100644 --- a/examples/rp/src/bin/pio_stepper.rs +++ b/examples/rp/src/bin/pio_stepper.rs @@ -69,7 +69,7 @@ impl<'d, T: Instance, const SM: usize> PioStepper<'d, T, SM> { let clock_divider: FixedU32 = (125_000_000 / (freq * 136)).to_fixed(); assert!(clock_divider <= 65536, "clkdiv must be <= 65536"); assert!(clock_divider >= 1, "clkdiv must be >= 1"); - T::PIO.sm(SM).clkdiv().write(|w| w.0 = clock_divider.to_bits() << 8); + self.sm.set_clock_divider(clock_divider); self.sm.clkdiv_restart(); } From d597815c9aed3c2d6b8729db1b78fd0e843181f6 Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Fri, 5 Apr 2024 00:48:19 +0200 Subject: [PATCH 088/581] stm32: remove last few mod sealed's. --- embassy-stm32/src/cordic/mod.rs | 118 +++++++++++++++++++++++++++- embassy-stm32/src/cordic/sealed.rs | 116 --------------------------- embassy-stm32/src/usart/buffered.rs | 36 ++++----- 3 files changed, 131 insertions(+), 139 deletions(-) delete mode 100644 embassy-stm32/src/cordic/sealed.rs diff --git a/embassy-stm32/src/cordic/mod.rs b/embassy-stm32/src/cordic/mod.rs index 6bbc48f2b..9ac10e714 100644 --- a/embassy-stm32/src/cordic/mod.rs +++ b/embassy-stm32/src/cordic/mod.rs @@ -3,6 +3,7 @@ use embassy_hal_internal::drop::OnDrop; use embassy_hal_internal::{into_ref, Peripheral, PeripheralRef}; +use crate::pac::cordic::vals; use crate::{dma, peripherals}; mod enums; @@ -11,9 +12,6 @@ pub use enums::*; mod errors; pub use errors::*; -mod sealed; -use self::sealed::SealedInstance; - pub mod utils; /// CORDIC driver @@ -22,6 +20,120 @@ pub struct Cordic<'d, T: Instance> { config: Config, } +/// Cordic instance +trait SealedInstance { + /// Get access to CORDIC registers + fn regs() -> crate::pac::cordic::Cordic; + + /// Set Function value + fn set_func(&self, func: Function) { + Self::regs() + .csr() + .modify(|v| v.set_func(vals::Func::from_bits(func as u8))); + } + + /// Set Precision value + fn set_precision(&self, precision: Precision) { + Self::regs() + .csr() + .modify(|v| v.set_precision(vals::Precision::from_bits(precision as u8))) + } + + /// Set Scale value + fn set_scale(&self, scale: Scale) { + Self::regs() + .csr() + .modify(|v| v.set_scale(vals::Scale::from_bits(scale as u8))) + } + + /// Enable global interrupt + fn enable_irq(&self) { + Self::regs().csr().modify(|v| v.set_ien(true)) + } + + /// Disable global interrupt + fn disable_irq(&self) { + Self::regs().csr().modify(|v| v.set_ien(false)) + } + + /// Enable Read DMA + fn enable_read_dma(&self) { + Self::regs().csr().modify(|v| { + v.set_dmaren(true); + }) + } + + /// Disable Read DMA + fn disable_read_dma(&self) { + Self::regs().csr().modify(|v| { + v.set_dmaren(false); + }) + } + + /// Enable Write DMA + fn enable_write_dma(&self) { + Self::regs().csr().modify(|v| { + v.set_dmawen(true); + }) + } + + /// Disable Write DMA + fn disable_write_dma(&self) { + Self::regs().csr().modify(|v| { + v.set_dmawen(false); + }) + } + + /// Set NARGS value + fn set_argument_count(&self, n: AccessCount) { + Self::regs().csr().modify(|v| { + v.set_nargs(match n { + AccessCount::One => vals::Num::NUM1, + AccessCount::Two => vals::Num::NUM2, + }) + }) + } + + /// Set NRES value + fn set_result_count(&self, n: AccessCount) { + Self::regs().csr().modify(|v| { + v.set_nres(match n { + AccessCount::One => vals::Num::NUM1, + AccessCount::Two => vals::Num::NUM2, + }); + }) + } + + /// Set ARGSIZE and RESSIZE value + fn set_data_width(&self, arg: Width, res: Width) { + Self::regs().csr().modify(|v| { + v.set_argsize(match arg { + Width::Bits32 => vals::Size::BITS32, + Width::Bits16 => vals::Size::BITS16, + }); + v.set_ressize(match res { + Width::Bits32 => vals::Size::BITS32, + Width::Bits16 => vals::Size::BITS16, + }) + }) + } + + /// Read RRDY flag + fn ready_to_read(&self) -> bool { + Self::regs().csr().read().rrdy() + } + + /// Write value to WDATA + fn write_argument(&self, arg: u32) { + Self::regs().wdata().write_value(arg) + } + + /// Read value from RDATA + fn read_result(&self) -> u32 { + Self::regs().rdata().read() + } +} + /// CORDIC instance trait #[allow(private_bounds)] pub trait Instance: SealedInstance + Peripheral

+ crate::rcc::RccPeripheral {} diff --git a/embassy-stm32/src/cordic/sealed.rs b/embassy-stm32/src/cordic/sealed.rs deleted file mode 100644 index 8f0bd1830..000000000 --- a/embassy-stm32/src/cordic/sealed.rs +++ /dev/null @@ -1,116 +0,0 @@ -use super::*; -use crate::pac::cordic::vals; - -/// Cordic instance -pub(super) trait SealedInstance { - /// Get access to CORDIC registers - fn regs() -> crate::pac::cordic::Cordic; - - /// Set Function value - fn set_func(&self, func: Function) { - Self::regs() - .csr() - .modify(|v| v.set_func(vals::Func::from_bits(func as u8))); - } - - /// Set Precision value - fn set_precision(&self, precision: Precision) { - Self::regs() - .csr() - .modify(|v| v.set_precision(vals::Precision::from_bits(precision as u8))) - } - - /// Set Scale value - fn set_scale(&self, scale: Scale) { - Self::regs() - .csr() - .modify(|v| v.set_scale(vals::Scale::from_bits(scale as u8))) - } - - /// Enable global interrupt - fn enable_irq(&self) { - Self::regs().csr().modify(|v| v.set_ien(true)) - } - - /// Disable global interrupt - fn disable_irq(&self) { - Self::regs().csr().modify(|v| v.set_ien(false)) - } - - /// Enable Read DMA - fn enable_read_dma(&self) { - Self::regs().csr().modify(|v| { - v.set_dmaren(true); - }) - } - - /// Disable Read DMA - fn disable_read_dma(&self) { - Self::regs().csr().modify(|v| { - v.set_dmaren(false); - }) - } - - /// Enable Write DMA - fn enable_write_dma(&self) { - Self::regs().csr().modify(|v| { - v.set_dmawen(true); - }) - } - - /// Disable Write DMA - fn disable_write_dma(&self) { - Self::regs().csr().modify(|v| { - v.set_dmawen(false); - }) - } - - /// Set NARGS value - fn set_argument_count(&self, n: AccessCount) { - Self::regs().csr().modify(|v| { - v.set_nargs(match n { - AccessCount::One => vals::Num::NUM1, - AccessCount::Two => vals::Num::NUM2, - }) - }) - } - - /// Set NRES value - fn set_result_count(&self, n: AccessCount) { - Self::regs().csr().modify(|v| { - v.set_nres(match n { - AccessCount::One => vals::Num::NUM1, - AccessCount::Two => vals::Num::NUM2, - }); - }) - } - - /// Set ARGSIZE and RESSIZE value - fn set_data_width(&self, arg: Width, res: Width) { - Self::regs().csr().modify(|v| { - v.set_argsize(match arg { - Width::Bits32 => vals::Size::BITS32, - Width::Bits16 => vals::Size::BITS16, - }); - v.set_ressize(match res { - Width::Bits32 => vals::Size::BITS32, - Width::Bits16 => vals::Size::BITS16, - }) - }) - } - - /// Read RRDY flag - fn ready_to_read(&self) -> bool { - Self::regs().csr().read().rrdy() - } - - /// Write value to WDATA - fn write_argument(&self, arg: u32) { - Self::regs().wdata().write_value(arg) - } - - /// Read value from RDATA - fn read_result(&self) -> u32 { - Self::regs().rdata().read() - } -} diff --git a/embassy-stm32/src/usart/buffered.rs b/embassy-stm32/src/usart/buffered.rs index 51862e185..949ac1b13 100644 --- a/embassy-stm32/src/usart/buffered.rs +++ b/embassy-stm32/src/usart/buffered.rs @@ -105,27 +105,23 @@ impl interrupt::typelevel::Handler for Interrupt } } -pub(crate) use sealed::State; -pub(crate) mod sealed { - use super::*; - pub struct State { - pub(crate) rx_waker: AtomicWaker, - pub(crate) rx_buf: RingBuffer, - pub(crate) tx_waker: AtomicWaker, - pub(crate) tx_buf: RingBuffer, - pub(crate) tx_done: AtomicBool, - } +pub(crate) struct State { + pub(crate) rx_waker: AtomicWaker, + pub(crate) rx_buf: RingBuffer, + pub(crate) tx_waker: AtomicWaker, + pub(crate) tx_buf: RingBuffer, + pub(crate) tx_done: AtomicBool, +} - impl State { - /// Create new state - pub const fn new() -> Self { - Self { - rx_buf: RingBuffer::new(), - tx_buf: RingBuffer::new(), - rx_waker: AtomicWaker::new(), - tx_waker: AtomicWaker::new(), - tx_done: AtomicBool::new(true), - } +impl State { + /// Create new state + pub(crate) const fn new() -> Self { + Self { + rx_buf: RingBuffer::new(), + tx_buf: RingBuffer::new(), + rx_waker: AtomicWaker::new(), + tx_waker: AtomicWaker::new(), + tx_done: AtomicBool::new(true), } } } From 348a46b110b63e7ba1ca8ca558331c00963d0800 Mon Sep 17 00:00:00 2001 From: eZio Pan Date: Mon, 25 Mar 2024 19:25:38 +0800 Subject: [PATCH 089/581] move `enable_outputs` to private trait ... ... to avoid API leaking. --- embassy-stm32/src/timer/mod.rs | 43 +++++++++++++++++++++++++++++----- 1 file changed, 37 insertions(+), 6 deletions(-) diff --git a/embassy-stm32/src/timer/mod.rs b/embassy-stm32/src/timer/mod.rs index 2ba6b3f11..5c03aa1cb 100644 --- a/embassy-stm32/src/timer/mod.rs +++ b/embassy-stm32/src/timer/mod.rs @@ -69,17 +69,26 @@ pub trait GeneralInstance1Channel: CoreInstance {} /// General-purpose 16-bit timer with 2 channels instance. pub trait GeneralInstance2Channel: GeneralInstance1Channel {} -/// General-purpose 16-bit timer with 4 channels instance. -pub trait GeneralInstance4Channel: BasicInstance + GeneralInstance2Channel { +// This trait add *extra* methods to GeneralInstance4Channel, +// that GeneralInstance4Channel doesn't use, but the "AdvancedInstance"s need. +// And it's a private trait, so it's content won't leak to outer namespace. +// +// If you want to add a new method to it, please leave a detail comment to explain it. +trait General4ChBlankSealed { // SimplePwm<'d, T> is implemented for T: GeneralInstance4Channel // Advanced timers implement this trait, but the output needs to be // enabled explicitly. // To support general-purpose and advanced timers, this function is added // here defaulting to noop and overwritten for advanced timers. - /// Enable timer outputs. + // + // Enable timer outputs. fn enable_outputs(&self) {} } +/// General-purpose 16-bit timer with 4 channels instance. +#[allow(private_bounds)] +pub trait GeneralInstance4Channel: BasicInstance + GeneralInstance2Channel + General4ChBlankSealed {} + /// General-purpose 32-bit timer with 4 channels instance. pub trait GeneralInstance32bit4Channel: GeneralInstance4Channel {} @@ -138,6 +147,21 @@ macro_rules! impl_core_timer { }; } +// This macro only apply to "AdvancedInstance(s)", +// not "GeneralInstance4Channel" itself. +#[allow(unused)] +macro_rules! impl_general_4ch_blank_sealed { + ($inst:ident) => { + impl General4ChBlankSealed for crate::peripherals::$inst { + fn enable_outputs(&self) { + unsafe { crate::pac::timer::Tim1chCmp::from_ptr(Self::regs()) } + .bdtr() + .modify(|w| w.set_moe(true)); + } + } + }; +} + foreach_interrupt! { ($inst:ident, timer, TIM_BASIC, UP, $irq:ident) => { impl_core_timer!($inst, TimerBits::Bits16); @@ -152,6 +176,7 @@ foreach_interrupt! { impl GeneralInstance1Channel for crate::peripherals::$inst {} impl GeneralInstance2Channel for crate::peripherals::$inst {} impl GeneralInstance4Channel for crate::peripherals::$inst {} + impl General4ChBlankSealed for crate::peripherals::$inst {} }; ($inst:ident, timer, TIM_2CH, UP, $irq:ident) => { @@ -161,6 +186,7 @@ foreach_interrupt! { impl GeneralInstance1Channel for crate::peripherals::$inst {} impl GeneralInstance2Channel for crate::peripherals::$inst {} impl GeneralInstance4Channel for crate::peripherals::$inst {} + impl General4ChBlankSealed for crate::peripherals::$inst {} }; ($inst:ident, timer, TIM_GP16, UP, $irq:ident) => { @@ -170,6 +196,7 @@ foreach_interrupt! { impl GeneralInstance1Channel for crate::peripherals::$inst {} impl GeneralInstance2Channel for crate::peripherals::$inst {} impl GeneralInstance4Channel for crate::peripherals::$inst {} + impl General4ChBlankSealed for crate::peripherals::$inst {} }; ($inst:ident, timer, TIM_GP32, UP, $irq:ident) => { @@ -180,6 +207,7 @@ foreach_interrupt! { impl GeneralInstance2Channel for crate::peripherals::$inst {} impl GeneralInstance4Channel for crate::peripherals::$inst {} impl GeneralInstance32bit4Channel for crate::peripherals::$inst {} + impl General4ChBlankSealed for crate::peripherals::$inst {} }; ($inst:ident, timer, TIM_1CH_CMP, UP, $irq:ident) => { @@ -188,7 +216,8 @@ foreach_interrupt! { impl BasicInstance for crate::peripherals::$inst {} impl GeneralInstance1Channel for crate::peripherals::$inst {} impl GeneralInstance2Channel for crate::peripherals::$inst {} - impl GeneralInstance4Channel for crate::peripherals::$inst { fn enable_outputs(&self) { set_moe::() }} + impl GeneralInstance4Channel for crate::peripherals::$inst {} + impl_general_4ch_blank_sealed!($inst); impl AdvancedInstance1Channel for crate::peripherals::$inst { type CaptureCompareInterrupt = crate::_generated::peripheral_interrupts::$inst::CC; } impl AdvancedInstance2Channel for crate::peripherals::$inst {} impl AdvancedInstance4Channel for crate::peripherals::$inst {} @@ -200,7 +229,8 @@ foreach_interrupt! { impl BasicInstance for crate::peripherals::$inst {} impl GeneralInstance1Channel for crate::peripherals::$inst {} impl GeneralInstance2Channel for crate::peripherals::$inst {} - impl GeneralInstance4Channel for crate::peripherals::$inst { fn enable_outputs(&self) { set_moe::() }} + impl GeneralInstance4Channel for crate::peripherals::$inst {} + impl_general_4ch_blank_sealed!($inst); impl AdvancedInstance1Channel for crate::peripherals::$inst { type CaptureCompareInterrupt = crate::_generated::peripheral_interrupts::$inst::CC; } impl AdvancedInstance2Channel for crate::peripherals::$inst {} impl AdvancedInstance4Channel for crate::peripherals::$inst {} @@ -212,7 +242,8 @@ foreach_interrupt! { impl BasicInstance for crate::peripherals::$inst {} impl GeneralInstance1Channel for crate::peripherals::$inst {} impl GeneralInstance2Channel for crate::peripherals::$inst {} - impl GeneralInstance4Channel for crate::peripherals::$inst { fn enable_outputs(&self) { set_moe::() }} + impl GeneralInstance4Channel for crate::peripherals::$inst {} + impl_general_4ch_blank_sealed!($inst); impl AdvancedInstance1Channel for crate::peripherals::$inst { type CaptureCompareInterrupt = crate::_generated::peripheral_interrupts::$inst::CC; } impl AdvancedInstance2Channel for crate::peripherals::$inst {} impl AdvancedInstance4Channel for crate::peripherals::$inst {} From 78b9cb98d4afc9c2be67176b174255ba78170525 Mon Sep 17 00:00:00 2001 From: eZio Pan Date: Mon, 25 Mar 2024 19:29:59 +0800 Subject: [PATCH 090/581] "separate CC interrupt" is for AdvCh4 only --- embassy-stm32/src/time_driver.rs | 8 +++---- embassy-stm32/src/timer/mod.rs | 39 ++++++++++++++++---------------- 2 files changed, 24 insertions(+), 23 deletions(-) diff --git a/embassy-stm32/src/time_driver.rs b/embassy-stm32/src/time_driver.rs index cc8161276..a3fe9b275 100644 --- a/embassy-stm32/src/time_driver.rs +++ b/embassy-stm32/src/time_driver.rs @@ -15,8 +15,6 @@ use crate::pac::timer::vals; use crate::rcc::SealedRccPeripheral; #[cfg(feature = "low-power")] use crate::rtc::Rtc; -#[cfg(any(time_driver_tim1, time_driver_tim8, time_driver_tim20))] -use crate::timer::AdvancedInstance1Channel; use crate::timer::CoreInstance; use crate::{interrupt, peripherals}; @@ -263,6 +261,7 @@ pub(crate) struct RtcDriver { rtc: Mutex>>, } +#[allow(clippy::declare_interior_mutable_const)] const ALARM_STATE_NEW: AlarmState = AlarmState::new(); embassy_time_driver::time_driver_impl!(static DRIVER: RtcDriver = RtcDriver { @@ -312,9 +311,10 @@ impl RtcDriver { #[cfg(any(time_driver_tim1, time_driver_tim8, time_driver_tim20))] { - ::CaptureCompareInterrupt::unpend(); + use crate::timer::AdvancedInstance4Channel; + ::CaptureCompareInterrupt::unpend(); unsafe { - ::CaptureCompareInterrupt::enable(); + ::CaptureCompareInterrupt::enable(); } } diff --git a/embassy-stm32/src/timer/mod.rs b/embassy-stm32/src/timer/mod.rs index 5c03aa1cb..b3d4fa284 100644 --- a/embassy-stm32/src/timer/mod.rs +++ b/embassy-stm32/src/timer/mod.rs @@ -93,16 +93,16 @@ pub trait GeneralInstance4Channel: BasicInstance + GeneralInstance2Channel + Gen pub trait GeneralInstance32bit4Channel: GeneralInstance4Channel {} /// Advanced 16-bit timer with 1 channel instance. -pub trait AdvancedInstance1Channel: BasicNoCr2Instance + GeneralInstance1Channel { - /// Capture compare interrupt for this timer. - type CaptureCompareInterrupt: interrupt::typelevel::Interrupt; -} +pub trait AdvancedInstance1Channel: BasicNoCr2Instance + GeneralInstance1Channel {} /// Advanced 16-bit timer with 2 channels instance. pub trait AdvancedInstance2Channel: BasicInstance + GeneralInstance2Channel + AdvancedInstance1Channel {} /// Advanced 16-bit timer with 4 channels instance. -pub trait AdvancedInstance4Channel: AdvancedInstance2Channel + GeneralInstance4Channel {} +pub trait AdvancedInstance4Channel: AdvancedInstance2Channel + GeneralInstance4Channel { + /// Capture compare interrupt for this timer. + type CaptureCompareInterrupt: interrupt::typelevel::Interrupt; +} pin_trait!(Channel1Pin, GeneralInstance4Channel); pin_trait!(Channel2Pin, GeneralInstance4Channel); @@ -162,6 +162,15 @@ macro_rules! impl_general_4ch_blank_sealed { }; } +#[allow(unused)] +macro_rules! impl_adv_4ch { + ($inst:ident) => { + impl AdvancedInstance4Channel for crate::peripherals::$inst { + type CaptureCompareInterrupt = crate::_generated::peripheral_interrupts::$inst::CC; + } + }; +} + foreach_interrupt! { ($inst:ident, timer, TIM_BASIC, UP, $irq:ident) => { impl_core_timer!($inst, TimerBits::Bits16); @@ -218,9 +227,9 @@ foreach_interrupt! { impl GeneralInstance2Channel for crate::peripherals::$inst {} impl GeneralInstance4Channel for crate::peripherals::$inst {} impl_general_4ch_blank_sealed!($inst); - impl AdvancedInstance1Channel for crate::peripherals::$inst { type CaptureCompareInterrupt = crate::_generated::peripheral_interrupts::$inst::CC; } + impl AdvancedInstance1Channel for crate::peripherals::$inst {} impl AdvancedInstance2Channel for crate::peripherals::$inst {} - impl AdvancedInstance4Channel for crate::peripherals::$inst {} + impl_adv_4ch!($inst); }; ($inst:ident, timer, TIM_2CH_CMP, UP, $irq:ident) => { @@ -231,9 +240,9 @@ foreach_interrupt! { impl GeneralInstance2Channel for crate::peripherals::$inst {} impl GeneralInstance4Channel for crate::peripherals::$inst {} impl_general_4ch_blank_sealed!($inst); - impl AdvancedInstance1Channel for crate::peripherals::$inst { type CaptureCompareInterrupt = crate::_generated::peripheral_interrupts::$inst::CC; } + impl AdvancedInstance1Channel for crate::peripherals::$inst {} impl AdvancedInstance2Channel for crate::peripherals::$inst {} - impl AdvancedInstance4Channel for crate::peripherals::$inst {} + impl_adv_4ch!($inst); }; ($inst:ident, timer, TIM_ADV, UP, $irq:ident) => { @@ -244,16 +253,8 @@ foreach_interrupt! { impl GeneralInstance2Channel for crate::peripherals::$inst {} impl GeneralInstance4Channel for crate::peripherals::$inst {} impl_general_4ch_blank_sealed!($inst); - impl AdvancedInstance1Channel for crate::peripherals::$inst { type CaptureCompareInterrupt = crate::_generated::peripheral_interrupts::$inst::CC; } + impl AdvancedInstance1Channel for crate::peripherals::$inst {} impl AdvancedInstance2Channel for crate::peripherals::$inst {} - impl AdvancedInstance4Channel for crate::peripherals::$inst {} + impl_adv_4ch!($inst); }; } - -#[cfg(not(stm32l0))] -#[allow(unused)] -fn set_moe() { - unsafe { crate::pac::timer::Tim1chCmp::from_ptr(T::regs()) } - .bdtr() - .modify(|w| w.set_moe(true)); -} From 5dc3738bc2b4e1d8f9f77588ecab7956493b59de Mon Sep 17 00:00:00 2001 From: eZio Pan Date: Tue, 26 Mar 2024 01:05:38 +0800 Subject: [PATCH 091/581] add missing interrupt for timer --- embassy-stm32/src/time_driver.rs | 10 +-- embassy-stm32/src/timer/mod.rs | 105 +++++++++++++++++++------------ 2 files changed, 71 insertions(+), 44 deletions(-) diff --git a/embassy-stm32/src/time_driver.rs b/embassy-stm32/src/time_driver.rs index a3fe9b275..a2e75020c 100644 --- a/embassy-stm32/src/time_driver.rs +++ b/embassy-stm32/src/time_driver.rs @@ -306,15 +306,15 @@ impl RtcDriver { w.set_ccie(0, true); }); - ::Interrupt::unpend(); - unsafe { ::Interrupt::enable() }; + ::UpdateInterrupt::unpend(); + unsafe { ::UpdateInterrupt::enable() }; #[cfg(any(time_driver_tim1, time_driver_tim8, time_driver_tim20))] { - use crate::timer::AdvancedInstance4Channel; - ::CaptureCompareInterrupt::unpend(); + use crate::timer::GeneralInstance1Channel; + ::CaptureCompareInterrupt::unpend(); unsafe { - ::CaptureCompareInterrupt::enable(); + ::CaptureCompareInterrupt::enable(); } } diff --git a/embassy-stm32/src/timer/mod.rs b/embassy-stm32/src/timer/mod.rs index b3d4fa284..346127005 100644 --- a/embassy-stm32/src/timer/mod.rs +++ b/embassy-stm32/src/timer/mod.rs @@ -47,8 +47,8 @@ pub enum TimerBits { /// Core timer instance. pub trait CoreInstance: RccPeripheral + 'static { - /// Interrupt for this timer. - type Interrupt: interrupt::typelevel::Interrupt; + /// Update Interrupt for this timer. + type UpdateInterrupt: interrupt::typelevel::Interrupt; /// Amount of bits this timer has. const BITS: TimerBits; @@ -64,10 +64,16 @@ pub trait BasicNoCr2Instance: CoreInstance {} pub trait BasicInstance: BasicNoCr2Instance {} /// General-purpose 16-bit timer with 1 channel instance. -pub trait GeneralInstance1Channel: CoreInstance {} +pub trait GeneralInstance1Channel: CoreInstance { + /// Capture compare interrupt for this timer. + type CaptureCompareInterrupt: interrupt::typelevel::Interrupt; +} /// General-purpose 16-bit timer with 2 channels instance. -pub trait GeneralInstance2Channel: GeneralInstance1Channel {} +pub trait GeneralInstance2Channel: GeneralInstance1Channel { + /// Trigger event interrupt for this timer. + type TriggerInterrupt: interrupt::typelevel::Interrupt; +} // This trait add *extra* methods to GeneralInstance4Channel, // that GeneralInstance4Channel doesn't use, but the "AdvancedInstance"s need. @@ -93,16 +99,18 @@ pub trait GeneralInstance4Channel: BasicInstance + GeneralInstance2Channel + Gen pub trait GeneralInstance32bit4Channel: GeneralInstance4Channel {} /// Advanced 16-bit timer with 1 channel instance. -pub trait AdvancedInstance1Channel: BasicNoCr2Instance + GeneralInstance1Channel {} +pub trait AdvancedInstance1Channel: BasicNoCr2Instance + GeneralInstance1Channel { + /// Communication interrupt for this timer. + type CommunicationInterrupt: interrupt::typelevel::Interrupt; + /// Break input interrupt for this timer. + type BreakInputInterrupt: interrupt::typelevel::Interrupt; +} /// Advanced 16-bit timer with 2 channels instance. pub trait AdvancedInstance2Channel: BasicInstance + GeneralInstance2Channel + AdvancedInstance1Channel {} /// Advanced 16-bit timer with 4 channels instance. -pub trait AdvancedInstance4Channel: AdvancedInstance2Channel + GeneralInstance4Channel { - /// Capture compare interrupt for this timer. - type CaptureCompareInterrupt: interrupt::typelevel::Interrupt; -} +pub trait AdvancedInstance4Channel: AdvancedInstance2Channel + GeneralInstance4Channel {} pin_trait!(Channel1Pin, GeneralInstance4Channel); pin_trait!(Channel2Pin, GeneralInstance4Channel); @@ -136,7 +144,7 @@ dma_trait!(Ch4Dma, GeneralInstance4Channel); macro_rules! impl_core_timer { ($inst:ident, $bits:expr) => { impl CoreInstance for crate::peripherals::$inst { - type Interrupt = crate::_generated::peripheral_interrupts::$inst::UP; + type UpdateInterrupt = crate::_generated::peripheral_interrupts::$inst::UP; const BITS: TimerBits = $bits; @@ -147,6 +155,34 @@ macro_rules! impl_core_timer { }; } +#[allow(unused)] +macro_rules! impl_general_1ch { + ($inst:ident) => { + impl GeneralInstance1Channel for crate::peripherals::$inst { + type CaptureCompareInterrupt = crate::_generated::peripheral_interrupts::$inst::CC; + } + }; +} + +#[allow(unused)] +macro_rules! impl_general_2ch { + ($inst:ident) => { + impl GeneralInstance2Channel for crate::peripherals::$inst { + type TriggerInterrupt = crate::_generated::peripheral_interrupts::$inst::TRG; + } + }; +} + +#[allow(unused)] +macro_rules! impl_advanced_1ch { + ($inst:ident) => { + impl AdvancedInstance1Channel for crate::peripherals::$inst { + type CommunicationInterrupt = crate::_generated::peripheral_interrupts::$inst::COM; + type BreakInputInterrupt = crate::_generated::peripheral_interrupts::$inst::BRK; + } + }; +} + // This macro only apply to "AdvancedInstance(s)", // not "GeneralInstance4Channel" itself. #[allow(unused)] @@ -162,15 +198,6 @@ macro_rules! impl_general_4ch_blank_sealed { }; } -#[allow(unused)] -macro_rules! impl_adv_4ch { - ($inst:ident) => { - impl AdvancedInstance4Channel for crate::peripherals::$inst { - type CaptureCompareInterrupt = crate::_generated::peripheral_interrupts::$inst::CC; - } - }; -} - foreach_interrupt! { ($inst:ident, timer, TIM_BASIC, UP, $irq:ident) => { impl_core_timer!($inst, TimerBits::Bits16); @@ -182,8 +209,8 @@ foreach_interrupt! { impl_core_timer!($inst, TimerBits::Bits16); impl BasicNoCr2Instance for crate::peripherals::$inst {} impl BasicInstance for crate::peripherals::$inst {} - impl GeneralInstance1Channel for crate::peripherals::$inst {} - impl GeneralInstance2Channel for crate::peripherals::$inst {} + impl_general_1ch!($inst); + impl_general_2ch!($inst); impl GeneralInstance4Channel for crate::peripherals::$inst {} impl General4ChBlankSealed for crate::peripherals::$inst {} }; @@ -192,8 +219,8 @@ foreach_interrupt! { impl_core_timer!($inst, TimerBits::Bits16); impl BasicNoCr2Instance for crate::peripherals::$inst {} impl BasicInstance for crate::peripherals::$inst {} - impl GeneralInstance1Channel for crate::peripherals::$inst {} - impl GeneralInstance2Channel for crate::peripherals::$inst {} + impl_general_1ch!($inst); + impl_general_2ch!($inst); impl GeneralInstance4Channel for crate::peripherals::$inst {} impl General4ChBlankSealed for crate::peripherals::$inst {} }; @@ -202,8 +229,8 @@ foreach_interrupt! { impl_core_timer!($inst, TimerBits::Bits16); impl BasicNoCr2Instance for crate::peripherals::$inst {} impl BasicInstance for crate::peripherals::$inst {} - impl GeneralInstance1Channel for crate::peripherals::$inst {} - impl GeneralInstance2Channel for crate::peripherals::$inst {} + impl_general_1ch!($inst); + impl_general_2ch!($inst); impl GeneralInstance4Channel for crate::peripherals::$inst {} impl General4ChBlankSealed for crate::peripherals::$inst {} }; @@ -212,8 +239,8 @@ foreach_interrupt! { impl_core_timer!($inst, TimerBits::Bits32); impl BasicNoCr2Instance for crate::peripherals::$inst {} impl BasicInstance for crate::peripherals::$inst {} - impl GeneralInstance1Channel for crate::peripherals::$inst {} - impl GeneralInstance2Channel for crate::peripherals::$inst {} + impl_general_1ch!($inst); + impl_general_2ch!($inst); impl GeneralInstance4Channel for crate::peripherals::$inst {} impl GeneralInstance32bit4Channel for crate::peripherals::$inst {} impl General4ChBlankSealed for crate::peripherals::$inst {} @@ -223,38 +250,38 @@ foreach_interrupt! { impl_core_timer!($inst, TimerBits::Bits16); impl BasicNoCr2Instance for crate::peripherals::$inst {} impl BasicInstance for crate::peripherals::$inst {} - impl GeneralInstance1Channel for crate::peripherals::$inst {} - impl GeneralInstance2Channel for crate::peripherals::$inst {} + impl_general_1ch!($inst); + impl_general_2ch!($inst); impl GeneralInstance4Channel for crate::peripherals::$inst {} impl_general_4ch_blank_sealed!($inst); - impl AdvancedInstance1Channel for crate::peripherals::$inst {} + impl_advanced_1ch!($inst); impl AdvancedInstance2Channel for crate::peripherals::$inst {} - impl_adv_4ch!($inst); + impl AdvancedInstance4Channel for crate::peripherals::$inst {} }; ($inst:ident, timer, TIM_2CH_CMP, UP, $irq:ident) => { impl_core_timer!($inst, TimerBits::Bits16); impl BasicNoCr2Instance for crate::peripherals::$inst {} impl BasicInstance for crate::peripherals::$inst {} - impl GeneralInstance1Channel for crate::peripherals::$inst {} - impl GeneralInstance2Channel for crate::peripherals::$inst {} + impl_general_1ch!($inst); + impl_general_2ch!($inst); impl GeneralInstance4Channel for crate::peripherals::$inst {} impl_general_4ch_blank_sealed!($inst); - impl AdvancedInstance1Channel for crate::peripherals::$inst {} + impl_advanced_1ch!($inst); impl AdvancedInstance2Channel for crate::peripherals::$inst {} - impl_adv_4ch!($inst); + impl AdvancedInstance4Channel for crate::peripherals::$inst {} }; ($inst:ident, timer, TIM_ADV, UP, $irq:ident) => { impl_core_timer!($inst, TimerBits::Bits16); impl BasicNoCr2Instance for crate::peripherals::$inst {} impl BasicInstance for crate::peripherals::$inst {} - impl GeneralInstance1Channel for crate::peripherals::$inst {} - impl GeneralInstance2Channel for crate::peripherals::$inst {} + impl_general_1ch!($inst); + impl_general_2ch!($inst); impl GeneralInstance4Channel for crate::peripherals::$inst {} impl_general_4ch_blank_sealed!($inst); - impl AdvancedInstance1Channel for crate::peripherals::$inst {} + impl_advanced_1ch!($inst); impl AdvancedInstance2Channel for crate::peripherals::$inst {} - impl_adv_4ch!($inst); + impl AdvancedInstance4Channel for crate::peripherals::$inst {} }; } From 3d7d3e028601ca05e58d82b8efc72b40855def86 Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Fri, 5 Apr 2024 00:56:21 +0200 Subject: [PATCH 092/581] stm32/time-driver: always use CC interrupt. This avoids cfg's, because it works both for timers that have a a dedicated CC interrupt line, and timers where all interrupts go to a single interrupt line. --- embassy-stm32/src/time_driver.rs | 43 +++++++++++++------------------- 1 file changed, 17 insertions(+), 26 deletions(-) diff --git a/embassy-stm32/src/time_driver.rs b/embassy-stm32/src/time_driver.rs index a2e75020c..e592fbf7d 100644 --- a/embassy-stm32/src/time_driver.rs +++ b/embassy-stm32/src/time_driver.rs @@ -15,7 +15,7 @@ use crate::pac::timer::vals; use crate::rcc::SealedRccPeripheral; #[cfg(feature = "low-power")] use crate::rtc::Rtc; -use crate::timer::CoreInstance; +use crate::timer::{CoreInstance, GeneralInstance1Channel}; use crate::{interrupt, peripherals}; // NOTE regarding ALARM_COUNT: @@ -67,7 +67,7 @@ type T = peripherals::TIM23; type T = peripherals::TIM24; foreach_interrupt! { - (TIM1, timer, $block:ident, UP, $irq:ident) => { + (TIM1, timer, $block:ident, CC, $irq:ident) => { #[cfg(time_driver_tim1)] #[cfg(feature = "rt")] #[interrupt] @@ -83,7 +83,7 @@ foreach_interrupt! { DRIVER.on_interrupt() } }; - (TIM2, timer, $block:ident, UP, $irq:ident) => { + (TIM2, timer, $block:ident, CC, $irq:ident) => { #[cfg(time_driver_tim2)] #[cfg(feature = "rt")] #[interrupt] @@ -91,7 +91,7 @@ foreach_interrupt! { DRIVER.on_interrupt() } }; - (TIM3, timer, $block:ident, UP, $irq:ident) => { + (TIM3, timer, $block:ident, CC, $irq:ident) => { #[cfg(time_driver_tim3)] #[cfg(feature = "rt")] #[interrupt] @@ -99,7 +99,7 @@ foreach_interrupt! { DRIVER.on_interrupt() } }; - (TIM4, timer, $block:ident, UP, $irq:ident) => { + (TIM4, timer, $block:ident, CC, $irq:ident) => { #[cfg(time_driver_tim4)] #[cfg(feature = "rt")] #[interrupt] @@ -107,7 +107,7 @@ foreach_interrupt! { DRIVER.on_interrupt() } }; - (TIM5, timer, $block:ident, UP, $irq:ident) => { + (TIM5, timer, $block:ident, CC, $irq:ident) => { #[cfg(time_driver_tim5)] #[cfg(feature = "rt")] #[interrupt] @@ -115,7 +115,7 @@ foreach_interrupt! { DRIVER.on_interrupt() } }; - (TIM8, timer, $block:ident, UP, $irq:ident) => { + (TIM8, timer, $block:ident, CC, $irq:ident) => { #[cfg(time_driver_tim8)] #[cfg(feature = "rt")] #[interrupt] @@ -131,7 +131,7 @@ foreach_interrupt! { DRIVER.on_interrupt() } }; - (TIM9, timer, $block:ident, UP, $irq:ident) => { + (TIM9, timer, $block:ident, CC, $irq:ident) => { #[cfg(time_driver_tim9)] #[cfg(feature = "rt")] #[interrupt] @@ -139,7 +139,7 @@ foreach_interrupt! { DRIVER.on_interrupt() } }; - (TIM12, timer, $block:ident, UP, $irq:ident) => { + (TIM12, timer, $block:ident, CC, $irq:ident) => { #[cfg(time_driver_tim12)] #[cfg(feature = "rt")] #[interrupt] @@ -147,7 +147,7 @@ foreach_interrupt! { DRIVER.on_interrupt() } }; - (TIM15, timer, $block:ident, UP, $irq:ident) => { + (TIM15, timer, $block:ident, CC, $irq:ident) => { #[cfg(time_driver_tim15)] #[cfg(feature = "rt")] #[interrupt] @@ -155,7 +155,7 @@ foreach_interrupt! { DRIVER.on_interrupt() } }; - (TIM20, timer, $block:ident, UP, $irq:ident) => { + (TIM20, timer, $block:ident, CC, $irq:ident) => { #[cfg(time_driver_tim20)] #[cfg(feature = "rt")] #[interrupt] @@ -171,7 +171,7 @@ foreach_interrupt! { DRIVER.on_interrupt() } }; - (TIM21, timer, $block:ident, UP, $irq:ident) => { + (TIM21, timer, $block:ident, CC, $irq:ident) => { #[cfg(time_driver_tim21)] #[cfg(feature = "rt")] #[interrupt] @@ -179,7 +179,7 @@ foreach_interrupt! { DRIVER.on_interrupt() } }; - (TIM22, timer, $block:ident, UP, $irq:ident) => { + (TIM22, timer, $block:ident, CC, $irq:ident) => { #[cfg(time_driver_tim22)] #[cfg(feature = "rt")] #[interrupt] @@ -187,7 +187,7 @@ foreach_interrupt! { DRIVER.on_interrupt() } }; - (TIM23, timer, $block:ident, UP, $irq:ident) => { + (TIM23, timer, $block:ident, CC, $irq:ident) => { #[cfg(time_driver_tim23)] #[cfg(feature = "rt")] #[interrupt] @@ -195,7 +195,7 @@ foreach_interrupt! { DRIVER.on_interrupt() } }; - (TIM24, timer, $block:ident, UP, $irq:ident) => { + (TIM24, timer, $block:ident, CC, $irq:ident) => { #[cfg(time_driver_tim24)] #[cfg(feature = "rt")] #[interrupt] @@ -306,17 +306,8 @@ impl RtcDriver { w.set_ccie(0, true); }); - ::UpdateInterrupt::unpend(); - unsafe { ::UpdateInterrupt::enable() }; - - #[cfg(any(time_driver_tim1, time_driver_tim8, time_driver_tim20))] - { - use crate::timer::GeneralInstance1Channel; - ::CaptureCompareInterrupt::unpend(); - unsafe { - ::CaptureCompareInterrupt::enable(); - } - } + ::CaptureCompareInterrupt::unpend(); + unsafe { ::CaptureCompareInterrupt::enable() }; r.cr1().modify(|w| w.set_cen(true)); } From 143b288333a96c3caf6a0f372edca13ebea10af1 Mon Sep 17 00:00:00 2001 From: pawel00100 Date: Wed, 24 Jan 2024 23:24:26 +0100 Subject: [PATCH 093/581] Add parameter for enabling pull-up and pull-down in RP PWM input mode --- embassy-rp/src/pwm.rs | 35 +++++++++++++++++++----- examples/rp/src/bin/pwm_input.rs | 3 ++- tests/rp/src/bin/pwm.rs | 46 +++++++++++++++++++++++++++++--- 3 files changed, 73 insertions(+), 11 deletions(-) diff --git a/embassy-rp/src/pwm.rs b/embassy-rp/src/pwm.rs index 7613e4e58..a1f400cfb 100644 --- a/embassy-rp/src/pwm.rs +++ b/embassy-rp/src/pwm.rs @@ -6,7 +6,7 @@ use fixed::FixedU16; use pac::pwm::regs::{ChDiv, Intr}; use pac::pwm::vals::Divmode; -use crate::gpio::{AnyPin, Pin as GpioPin, SealedPin as _}; +use crate::gpio::{AnyPin, Pin as GpioPin, Pull, SealedPin as _}; use crate::{pac, peripherals, RegExt}; /// The configuration of a PWM slice. @@ -92,6 +92,7 @@ impl<'d, T: Slice> Pwm<'d, T> { inner: impl Peripheral

+ 'd, a: Option>, b: Option>, + b_pull: Pull, config: Config, divmode: Divmode, ) -> Self { @@ -110,6 +111,10 @@ impl<'d, T: Slice> Pwm<'d, T> { } if let Some(pin) = &b { pin.gpio().ctrl().write(|w| w.set_funcsel(4)); + pin.pad_ctrl().modify(|w| { + w.set_pue(b_pull == Pull::Up); + w.set_pde(b_pull == Pull::Down); + }); } Self { inner, @@ -121,7 +126,7 @@ impl<'d, T: Slice> Pwm<'d, T> { /// Create PWM driver without any configured pins. #[inline] pub fn new_free(inner: impl Peripheral

+ 'd, config: Config) -> Self { - Self::new_inner(inner, None, None, config, Divmode::DIV) + Self::new_inner(inner, None, None, Pull::None, config, Divmode::DIV) } /// Create PWM driver with a single 'a' as output. @@ -132,7 +137,7 @@ impl<'d, T: Slice> Pwm<'d, T> { config: Config, ) -> Self { into_ref!(a); - Self::new_inner(inner, Some(a.map_into()), None, config, Divmode::DIV) + Self::new_inner(inner, Some(a.map_into()), None, Pull::None, config, Divmode::DIV) } /// Create PWM driver with a single 'b' pin as output. @@ -143,7 +148,7 @@ impl<'d, T: Slice> Pwm<'d, T> { config: Config, ) -> Self { into_ref!(b); - Self::new_inner(inner, None, Some(b.map_into()), config, Divmode::DIV) + Self::new_inner(inner, None, Some(b.map_into()), Pull::None, config, Divmode::DIV) } /// Create PWM driver with a 'a' and 'b' pins as output. @@ -155,7 +160,14 @@ impl<'d, T: Slice> Pwm<'d, T> { config: Config, ) -> Self { into_ref!(a, b); - Self::new_inner(inner, Some(a.map_into()), Some(b.map_into()), config, Divmode::DIV) + Self::new_inner( + inner, + Some(a.map_into()), + Some(b.map_into()), + Pull::None, + config, + Divmode::DIV, + ) } /// Create PWM driver with a single 'b' as input pin. @@ -163,11 +175,12 @@ impl<'d, T: Slice> Pwm<'d, T> { pub fn new_input( inner: impl Peripheral

+ 'd, b: impl Peripheral

> + 'd, + b_pull: Pull, mode: InputMode, config: Config, ) -> Self { into_ref!(b); - Self::new_inner(inner, None, Some(b.map_into()), config, mode.into()) + Self::new_inner(inner, None, Some(b.map_into()), b_pull, config, mode.into()) } /// Create PWM driver with a 'a' and 'b' pins in the desired input mode. @@ -176,11 +189,19 @@ impl<'d, T: Slice> Pwm<'d, T> { inner: impl Peripheral

+ 'd, a: impl Peripheral

> + 'd, b: impl Peripheral

> + 'd, + b_pull: Pull, mode: InputMode, config: Config, ) -> Self { into_ref!(a, b); - Self::new_inner(inner, Some(a.map_into()), Some(b.map_into()), config, mode.into()) + Self::new_inner( + inner, + Some(a.map_into()), + Some(b.map_into()), + b_pull, + config, + mode.into(), + ) } /// Set the PWM config. diff --git a/examples/rp/src/bin/pwm_input.rs b/examples/rp/src/bin/pwm_input.rs index 0652dc42b..bf454a936 100644 --- a/examples/rp/src/bin/pwm_input.rs +++ b/examples/rp/src/bin/pwm_input.rs @@ -5,6 +5,7 @@ use defmt::*; use embassy_executor::Spawner; +use embassy_rp::gpio::Pull; use embassy_rp::pwm::{Config, InputMode, Pwm}; use embassy_time::{Duration, Ticker}; use {defmt_rtt as _, panic_probe as _}; @@ -14,7 +15,7 @@ async fn main(_spawner: Spawner) { let p = embassy_rp::init(Default::default()); let cfg: Config = Default::default(); - let pwm = Pwm::new_input(p.PWM_SLICE2, p.PIN_5, InputMode::RisingEdge, cfg); + let pwm = Pwm::new_input(p.PWM_SLICE2, p.PIN_5, Pull::None, InputMode::RisingEdge, cfg); let mut ticker = Ticker::every(Duration::from_secs(1)); loop { diff --git a/tests/rp/src/bin/pwm.rs b/tests/rp/src/bin/pwm.rs index 4b02e5bab..c05197000 100644 --- a/tests/rp/src/bin/pwm.rs +++ b/tests/rp/src/bin/pwm.rs @@ -94,7 +94,7 @@ async fn main(_spawner: Spawner) { // Test level-gated { let mut pin2 = Output::new(&mut p11, Level::Low); - let pwm = Pwm::new_input(&mut p.PWM_SLICE3, &mut p7, InputMode::Level, cfg.clone()); + let pwm = Pwm::new_input(&mut p.PWM_SLICE3, &mut p7, Pull::None, InputMode::Level, cfg.clone()); assert_eq!(pwm.counter(), 0); Timer::after_millis(5).await; assert_eq!(pwm.counter(), 0); @@ -110,7 +110,13 @@ async fn main(_spawner: Spawner) { // Test rising-gated { let mut pin2 = Output::new(&mut p11, Level::Low); - let pwm = Pwm::new_input(&mut p.PWM_SLICE3, &mut p7, InputMode::RisingEdge, cfg.clone()); + let pwm = Pwm::new_input( + &mut p.PWM_SLICE3, + &mut p7, + Pull::None, + InputMode::RisingEdge, + cfg.clone(), + ); assert_eq!(pwm.counter(), 0); Timer::after_millis(5).await; assert_eq!(pwm.counter(), 0); @@ -125,7 +131,13 @@ async fn main(_spawner: Spawner) { // Test falling-gated { let mut pin2 = Output::new(&mut p11, Level::High); - let pwm = Pwm::new_input(&mut p.PWM_SLICE3, &mut p7, InputMode::FallingEdge, cfg.clone()); + let pwm = Pwm::new_input( + &mut p.PWM_SLICE3, + &mut p7, + Pull::None, + InputMode::FallingEdge, + cfg.clone(), + ); assert_eq!(pwm.counter(), 0); Timer::after_millis(5).await; assert_eq!(pwm.counter(), 0); @@ -137,6 +149,34 @@ async fn main(_spawner: Spawner) { assert_eq!(pwm.counter(), 1); } + // pull-down + { + let pin2 = Input::new(&mut p11, Pull::None); + Pwm::new_input( + &mut p.PWM_SLICE3, + &mut p7, + Pull::Down, + InputMode::FallingEdge, + cfg.clone(), + ); + Timer::after_millis(1).await; + assert!(pin2.is_low()); + } + + // pull-up + { + let pin2 = Input::new(&mut p11, Pull::None); + Pwm::new_input( + &mut p.PWM_SLICE3, + &mut p7, + Pull::Up, + InputMode::FallingEdge, + cfg.clone(), + ); + Timer::after_millis(1).await; + assert!(pin2.is_high()); + } + info!("Test OK"); cortex_m::asm::bkpt(); } From c2b8ddaa83d251395a974094b2afc4550204249f Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Fri, 5 Apr 2024 01:41:47 +0200 Subject: [PATCH 094/581] stm32/qspi: autodeduce transfer len from buffer len. mirrors change made in #2672. --- embassy-stm32/src/qspi/mod.rs | 53 +++++++++++++++-------------------- 1 file changed, 23 insertions(+), 30 deletions(-) diff --git a/embassy-stm32/src/qspi/mod.rs b/embassy-stm32/src/qspi/mod.rs index 3c054e666..0a4b4f074 100644 --- a/embassy-stm32/src/qspi/mod.rs +++ b/embassy-stm32/src/qspi/mod.rs @@ -27,8 +27,6 @@ pub struct TransferConfig { pub address: Option, /// Number of dummy cycles (DCYC) pub dummy: DummyCycles, - /// Length of data - pub data_len: Option, } impl Default for TransferConfig { @@ -40,7 +38,6 @@ impl Default for TransferConfig { instruction: 0, address: None, dummy: DummyCycles::_0, - data_len: None, } } } @@ -231,7 +228,7 @@ impl<'d, T: Instance, Dma> Qspi<'d, T, Dma> { pub fn command(&mut self, transaction: TransferConfig) { #[cfg(not(stm32h7))] T::REGS.cr().modify(|v| v.set_dmaen(false)); - self.setup_transaction(QspiMode::IndirectWrite, &transaction); + self.setup_transaction(QspiMode::IndirectWrite, &transaction, None); while !T::REGS.sr().read().tcf() {} T::REGS.fcr().modify(|v| v.set_ctcf(true)); @@ -241,21 +238,19 @@ impl<'d, T: Instance, Dma> Qspi<'d, T, Dma> { pub fn blocking_read(&mut self, buf: &mut [u8], transaction: TransferConfig) { #[cfg(not(stm32h7))] T::REGS.cr().modify(|v| v.set_dmaen(false)); - self.setup_transaction(QspiMode::IndirectWrite, &transaction); + self.setup_transaction(QspiMode::IndirectWrite, &transaction, Some(buf.len())); - if let Some(len) = transaction.data_len { - let current_ar = T::REGS.ar().read().address(); - T::REGS.ccr().modify(|v| { - v.set_fmode(QspiMode::IndirectRead.into()); - }); - T::REGS.ar().write(|v| { - v.set_address(current_ar); - }); + let current_ar = T::REGS.ar().read().address(); + T::REGS.ccr().modify(|v| { + v.set_fmode(QspiMode::IndirectRead.into()); + }); + T::REGS.ar().write(|v| { + v.set_address(current_ar); + }); - for idx in 0..len { - while !T::REGS.sr().read().tcf() && !T::REGS.sr().read().ftf() {} - buf[idx] = unsafe { (T::REGS.dr().as_ptr() as *mut u8).read_volatile() }; - } + for b in buf { + while !T::REGS.sr().read().tcf() && !T::REGS.sr().read().ftf() {} + *b = unsafe { (T::REGS.dr().as_ptr() as *mut u8).read_volatile() }; } while !T::REGS.sr().read().tcf() {} @@ -268,17 +263,15 @@ impl<'d, T: Instance, Dma> Qspi<'d, T, Dma> { #[cfg(not(stm32h7))] T::REGS.cr().modify(|v| v.set_dmaen(false)); - self.setup_transaction(QspiMode::IndirectWrite, &transaction); + self.setup_transaction(QspiMode::IndirectWrite, &transaction, Some(buf.len())); - if let Some(len) = transaction.data_len { - T::REGS.ccr().modify(|v| { - v.set_fmode(QspiMode::IndirectWrite.into()); - }); + T::REGS.ccr().modify(|v| { + v.set_fmode(QspiMode::IndirectWrite.into()); + }); - for idx in 0..len { - while !T::REGS.sr().read().ftf() {} - unsafe { (T::REGS.dr().as_ptr() as *mut u8).write_volatile(buf[idx]) }; - } + for &b in buf { + while !T::REGS.sr().read().ftf() {} + unsafe { (T::REGS.dr().as_ptr() as *mut u8).write_volatile(b) }; } while !T::REGS.sr().read().tcf() {} @@ -290,7 +283,7 @@ impl<'d, T: Instance, Dma> Qspi<'d, T, Dma> { where Dma: QuadDma, { - self.setup_transaction(QspiMode::IndirectWrite, &transaction); + self.setup_transaction(QspiMode::IndirectWrite, &transaction, Some(buf.len())); T::REGS.ccr().modify(|v| { v.set_fmode(QspiMode::IndirectRead.into()); @@ -323,7 +316,7 @@ impl<'d, T: Instance, Dma> Qspi<'d, T, Dma> { where Dma: QuadDma, { - self.setup_transaction(QspiMode::IndirectWrite, &transaction); + self.setup_transaction(QspiMode::IndirectWrite, &transaction, Some(buf.len())); T::REGS.ccr().modify(|v| { v.set_fmode(QspiMode::IndirectWrite.into()); @@ -347,7 +340,7 @@ impl<'d, T: Instance, Dma> Qspi<'d, T, Dma> { transfer.blocking_wait(); } - fn setup_transaction(&mut self, fmode: QspiMode, transaction: &TransferConfig) { + fn setup_transaction(&mut self, fmode: QspiMode, transaction: &TransferConfig, data_len: Option) { T::REGS.fcr().modify(|v| { v.set_csmf(true); v.set_ctcf(true); @@ -357,7 +350,7 @@ impl<'d, T: Instance, Dma> Qspi<'d, T, Dma> { while T::REGS.sr().read().busy() {} - if let Some(len) = transaction.data_len { + if let Some(len) = data_len { T::REGS.dlr().write(|v| v.set_dl(len as u32 - 1)); } From c953b9045b40fd3ece546ef94714fa2f108e0c25 Mon Sep 17 00:00:00 2001 From: Torin Cooper-Bennun Date: Fri, 5 Apr 2024 13:00:33 +0100 Subject: [PATCH 095/581] stm32: adc: v3: [h5] set OR.OP0 to 1 when ADCx_INP0 is selected, per RM --- embassy-stm32/src/adc/v3.rs | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/embassy-stm32/src/adc/v3.rs b/embassy-stm32/src/adc/v3.rs index 8c9b47197..e25630be2 100644 --- a/embassy-stm32/src/adc/v3.rs +++ b/embassy-stm32/src/adc/v3.rs @@ -222,6 +222,13 @@ impl<'d, T: Instance> Adc<'d, T> { // spin } + // RM0492, RM0481, etc. + // "This option bit must be set to 1 when ADCx_INP0 or ADCx_INN1 channel is selected." + #[cfg(adc_h5)] + if pin.channel() == 0 { + T::regs().or().modify(|reg| reg.set_op0(true)); + } + // Configure channel Self::set_channel_sample_time(pin.channel(), self.sample_time); @@ -244,6 +251,13 @@ impl<'d, T: Instance> Adc<'d, T> { T::regs().cr().modify(|reg| reg.set_addis(true)); + // RM0492, RM0481, etc. + // "This option bit must be set to 1 when ADCx_INP0 or ADCx_INN1 channel is selected." + #[cfg(adc_h5)] + if pin.channel() == 0 { + T::regs().or().modify(|reg| reg.set_op0(false)); + } + val } From 2ad82c2adf123d3e555724f77149ce9ab9c2bd8c Mon Sep 17 00:00:00 2001 From: Dillon McEwan Date: Fri, 5 Apr 2024 10:07:15 -0700 Subject: [PATCH 096/581] Fix 'clocok' typo in RCC docs --- embassy-stm32/src/rcc/mod.rs | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/embassy-stm32/src/rcc/mod.rs b/embassy-stm32/src/rcc/mod.rs index d53d02203..c328344aa 100644 --- a/embassy-stm32/src/rcc/mod.rs +++ b/embassy-stm32/src/rcc/mod.rs @@ -111,7 +111,7 @@ mod util { } } -/// Get the kernel clocok frequency of the peripheral `T`. +/// Get the kernel clock frequency of the peripheral `T`. /// /// # Panics /// From 99ea564f1c5cc3dcce908cb853f528a52cca8ae8 Mon Sep 17 00:00:00 2001 From: Barnaby Walters Date: Fri, 5 Apr 2024 22:11:01 +0200 Subject: [PATCH 097/581] Add VBUS detection blackpill comment --- examples/stm32f4/src/bin/usb_hid_keyboard.rs | 1 + 1 file changed, 1 insertion(+) diff --git a/examples/stm32f4/src/bin/usb_hid_keyboard.rs b/examples/stm32f4/src/bin/usb_hid_keyboard.rs index a799b4e72..d6e0be5ea 100644 --- a/examples/stm32f4/src/bin/usb_hid_keyboard.rs +++ b/examples/stm32f4/src/bin/usb_hid_keyboard.rs @@ -49,6 +49,7 @@ async fn main(_spawner: Spawner) { // Create the driver, from the HAL. let mut ep_out_buffer = [0u8; 256]; let mut config = embassy_stm32::usb::Config::default(); + // If the board you’re using doesn’t have the VBUS pin wired up correctly for detecting the USB bus voltage (e.g. on the f4 blackpill board), set this to false config.vbus_detection = true; let driver = Driver::new_fs(p.USB_OTG_FS, Irqs, p.PA12, p.PA11, &mut ep_out_buffer, config); From cf0097162cb33d77d90ce5cb50f8fb5c24972748 Mon Sep 17 00:00:00 2001 From: Barnaby Walters Date: Sun, 7 Apr 2024 15:19:56 +0200 Subject: [PATCH 098/581] [embassy-stm32] added comments explaining multiprio interrupts --- examples/stm32f0/src/bin/multiprio.rs | 4 ++++ examples/stm32f3/src/bin/multiprio.rs | 4 ++++ examples/stm32f4/src/bin/multiprio.rs | 4 ++++ examples/stm32h7/src/bin/multiprio.rs | 4 ++++ 4 files changed, 16 insertions(+) diff --git a/examples/stm32f0/src/bin/multiprio.rs b/examples/stm32f0/src/bin/multiprio.rs index e49951726..e36c0d6c2 100644 --- a/examples/stm32f0/src/bin/multiprio.rs +++ b/examples/stm32f0/src/bin/multiprio.rs @@ -126,6 +126,10 @@ fn main() -> ! { // Initialize and create handle for devicer peripherals let _p = embassy_stm32::init(Default::default()); + // STM32s don’t have software-defined interrupts, so just use any free interrupt vectors which aren’t used + // by the rest of your application. In this case we’re using UART1 and UART2, but there’s nothing special + // about them. Any otherwise unused interrupt vector would work exactly the same. + // High-priority executor: USART1, priority level 6 interrupt::USART1.set_priority(Priority::P6); let spawner = EXECUTOR_HIGH.start(interrupt::USART1); diff --git a/examples/stm32f3/src/bin/multiprio.rs b/examples/stm32f3/src/bin/multiprio.rs index 328447210..3a3059db1 100644 --- a/examples/stm32f3/src/bin/multiprio.rs +++ b/examples/stm32f3/src/bin/multiprio.rs @@ -127,6 +127,10 @@ fn main() -> ! { let _p = embassy_stm32::init(Default::default()); + // STM32s don’t have software-defined interrupts, so just use any free interrupt vectors which aren’t used + // by the rest of your application. In this case we’re using UART4 and UART5, but there’s nothing special + // about them. Any otherwise unused interrupt vector would work exactly the same. + // High-priority executor: UART4, priority level 6 interrupt::UART4.set_priority(Priority::P6); let spawner = EXECUTOR_HIGH.start(interrupt::UART4); diff --git a/examples/stm32f4/src/bin/multiprio.rs b/examples/stm32f4/src/bin/multiprio.rs index 328447210..5a55cd291 100644 --- a/examples/stm32f4/src/bin/multiprio.rs +++ b/examples/stm32f4/src/bin/multiprio.rs @@ -127,6 +127,10 @@ fn main() -> ! { let _p = embassy_stm32::init(Default::default()); + // STM32s don’t have software-defined interrupts, so just use any free interrupt vectors which aren’t used + // by the rest of your application. In this case we’re using UART6 and UART7, but there’s nothing special + // about them. Any otherwise unused interrupt vector would work exactly the same. + // High-priority executor: UART4, priority level 6 interrupt::UART4.set_priority(Priority::P6); let spawner = EXECUTOR_HIGH.start(interrupt::UART4); diff --git a/examples/stm32h7/src/bin/multiprio.rs b/examples/stm32h7/src/bin/multiprio.rs index 73f8dd092..f9a00f806 100644 --- a/examples/stm32h7/src/bin/multiprio.rs +++ b/examples/stm32h7/src/bin/multiprio.rs @@ -127,6 +127,10 @@ fn main() -> ! { let _p = embassy_stm32::init(Default::default()); + // STM32s don’t have software-defined interrupts, so just use any free interrupt vectors which aren’t used + // by the rest of your application. In this case we’re using UART6 and UART7, but there’s nothing special + // about them. Any otherwise unused interrupt vector would work exactly the same. + // High-priority executor: UART4, priority level 6 interrupt::UART4.set_priority(Priority::P6); let spawner = EXECUTOR_HIGH.start(interrupt::UART4); From 56d34eefaa2862ebaf883e5388f909f7989aba1f Mon Sep 17 00:00:00 2001 From: Barnaby Walters Date: Sun, 7 Apr 2024 15:33:51 +0200 Subject: [PATCH 099/581] Apply suggestions from code review Co-authored-by: becothas <41289937+becothas@users.noreply.github.com> --- examples/stm32f4/src/bin/multiprio.rs | 2 +- examples/stm32h7/src/bin/multiprio.rs | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/examples/stm32f4/src/bin/multiprio.rs b/examples/stm32f4/src/bin/multiprio.rs index 5a55cd291..3a3059db1 100644 --- a/examples/stm32f4/src/bin/multiprio.rs +++ b/examples/stm32f4/src/bin/multiprio.rs @@ -128,7 +128,7 @@ fn main() -> ! { let _p = embassy_stm32::init(Default::default()); // STM32s don’t have software-defined interrupts, so just use any free interrupt vectors which aren’t used - // by the rest of your application. In this case we’re using UART6 and UART7, but there’s nothing special + // by the rest of your application. In this case we’re using UART4 and UART5, but there’s nothing special // about them. Any otherwise unused interrupt vector would work exactly the same. // High-priority executor: UART4, priority level 6 diff --git a/examples/stm32h7/src/bin/multiprio.rs b/examples/stm32h7/src/bin/multiprio.rs index f9a00f806..ded9d390e 100644 --- a/examples/stm32h7/src/bin/multiprio.rs +++ b/examples/stm32h7/src/bin/multiprio.rs @@ -128,7 +128,7 @@ fn main() -> ! { let _p = embassy_stm32::init(Default::default()); // STM32s don’t have software-defined interrupts, so just use any free interrupt vectors which aren’t used - // by the rest of your application. In this case we’re using UART6 and UART7, but there’s nothing special + // by the rest of your application. In this case we’re using UART4 and UART5, but there’s nothing special // about them. Any otherwise unused interrupt vector would work exactly the same. // High-priority executor: UART4, priority level 6 From effc08dde34c39da3f6bb4363d517de4f5c1ddd4 Mon Sep 17 00:00:00 2001 From: Barnaby Walters Date: Sun, 7 Apr 2024 16:22:42 +0200 Subject: [PATCH 100/581] =?UTF-8?q?Incorporated=20adam=E2=80=99s=20suggest?= =?UTF-8?q?ion=20into=20all=20multiprio=20comments?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- examples/stm32f0/src/bin/multiprio.rs | 7 ++++--- examples/stm32f3/src/bin/multiprio.rs | 7 ++++--- examples/stm32f4/src/bin/multiprio.rs | 7 ++++--- examples/stm32h7/src/bin/multiprio.rs | 7 ++++--- 4 files changed, 16 insertions(+), 12 deletions(-) diff --git a/examples/stm32f0/src/bin/multiprio.rs b/examples/stm32f0/src/bin/multiprio.rs index e36c0d6c2..1c3f3991a 100644 --- a/examples/stm32f0/src/bin/multiprio.rs +++ b/examples/stm32f0/src/bin/multiprio.rs @@ -126,9 +126,10 @@ fn main() -> ! { // Initialize and create handle for devicer peripherals let _p = embassy_stm32::init(Default::default()); - // STM32s don’t have software-defined interrupts, so just use any free interrupt vectors which aren’t used - // by the rest of your application. In this case we’re using UART1 and UART2, but there’s nothing special - // about them. Any otherwise unused interrupt vector would work exactly the same. + // STM32s don’t have any interrupts exclusively for software use, but they can all be triggered by software as well as + // by the peripheral, so we can just use any free interrupt vectors which aren’t used by the rest of your application. + // In this case we’re using UART1 and UART2, but there’s nothing special about them. Any otherwise unused interrupt + // vector would work exactly the same. // High-priority executor: USART1, priority level 6 interrupt::USART1.set_priority(Priority::P6); diff --git a/examples/stm32f3/src/bin/multiprio.rs b/examples/stm32f3/src/bin/multiprio.rs index 3a3059db1..87830b416 100644 --- a/examples/stm32f3/src/bin/multiprio.rs +++ b/examples/stm32f3/src/bin/multiprio.rs @@ -127,9 +127,10 @@ fn main() -> ! { let _p = embassy_stm32::init(Default::default()); - // STM32s don’t have software-defined interrupts, so just use any free interrupt vectors which aren’t used - // by the rest of your application. In this case we’re using UART4 and UART5, but there’s nothing special - // about them. Any otherwise unused interrupt vector would work exactly the same. + // STM32s don’t have any interrupts exclusively for software use, but they can all be triggered by software as well as + // by the peripheral, so we can just use any free interrupt vectors which aren’t used by the rest of your application. + // In this case we’re using UART4 and UART5, but there’s nothing special about them. Any otherwise unused interrupt + // vector would work exactly the same. // High-priority executor: UART4, priority level 6 interrupt::UART4.set_priority(Priority::P6); diff --git a/examples/stm32f4/src/bin/multiprio.rs b/examples/stm32f4/src/bin/multiprio.rs index 3a3059db1..87830b416 100644 --- a/examples/stm32f4/src/bin/multiprio.rs +++ b/examples/stm32f4/src/bin/multiprio.rs @@ -127,9 +127,10 @@ fn main() -> ! { let _p = embassy_stm32::init(Default::default()); - // STM32s don’t have software-defined interrupts, so just use any free interrupt vectors which aren’t used - // by the rest of your application. In this case we’re using UART4 and UART5, but there’s nothing special - // about them. Any otherwise unused interrupt vector would work exactly the same. + // STM32s don’t have any interrupts exclusively for software use, but they can all be triggered by software as well as + // by the peripheral, so we can just use any free interrupt vectors which aren’t used by the rest of your application. + // In this case we’re using UART4 and UART5, but there’s nothing special about them. Any otherwise unused interrupt + // vector would work exactly the same. // High-priority executor: UART4, priority level 6 interrupt::UART4.set_priority(Priority::P6); diff --git a/examples/stm32h7/src/bin/multiprio.rs b/examples/stm32h7/src/bin/multiprio.rs index ded9d390e..fcbb6c653 100644 --- a/examples/stm32h7/src/bin/multiprio.rs +++ b/examples/stm32h7/src/bin/multiprio.rs @@ -127,9 +127,10 @@ fn main() -> ! { let _p = embassy_stm32::init(Default::default()); - // STM32s don’t have software-defined interrupts, so just use any free interrupt vectors which aren’t used - // by the rest of your application. In this case we’re using UART4 and UART5, but there’s nothing special - // about them. Any otherwise unused interrupt vector would work exactly the same. + // STM32s don’t have any interrupts exclusively for software use, but they can all be triggered by software as well as + // by the peripheral, so we can just use any free interrupt vectors which aren’t used by the rest of your application. + // In this case we’re using UART4 and UART5, but there’s nothing special about them. Any otherwise unused interrupt + // vector would work exactly the same. // High-priority executor: UART4, priority level 6 interrupt::UART4.set_priority(Priority::P6); From 803b76df86ed5eadfa3e0150bc5a3b129ae1f7c6 Mon Sep 17 00:00:00 2001 From: Andelf Date: Mon, 8 Apr 2024 01:23:49 +0800 Subject: [PATCH 101/581] Fix crash caused by using higher MSI on STM32WL --- embassy-stm32/src/rcc/l.rs | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/embassy-stm32/src/rcc/l.rs b/embassy-stm32/src/rcc/l.rs index 9079ddd41..d40ea0c53 100644 --- a/embassy-stm32/src/rcc/l.rs +++ b/embassy-stm32/src/rcc/l.rs @@ -157,6 +157,13 @@ pub(crate) unsafe fn init(config: Config) { while RCC.cfgr().read().sws() != Sysclk::MSI {} } + #[cfg(stm32wl)] + { + // Set max latency + FLASH.acr().modify(|w| w.set_prften(true)); + FLASH.acr().modify(|w| w.set_latency(2)); + } + // Set voltage scale #[cfg(any(stm32l0, stm32l1))] { From fa05256f0563716ffa6e865b73679f4d545bcff9 Mon Sep 17 00:00:00 2001 From: Oliver Rockstedt Date: Mon, 8 Apr 2024 00:39:58 +0200 Subject: [PATCH 102/581] embassy-sync: Add len, is_empty and is_full functions to Channel. --- embassy-sync/CHANGELOG.md | 5 ++++- embassy-sync/src/channel.rs | 27 +++++++++++++++++++++++++++ 2 files changed, 31 insertions(+), 1 deletion(-) diff --git a/embassy-sync/CHANGELOG.md b/embassy-sync/CHANGELOG.md index e7db97ef7..3f6b39d8b 100644 --- a/embassy-sync/CHANGELOG.md +++ b/embassy-sync/CHANGELOG.md @@ -5,6 +5,10 @@ All notable changes to this project will be documented in this file. The format is based on [Keep a Changelog](https://keepachangelog.com/en/1.0.0/), and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0.html). +## Unreleased + +- Add `len`, `is_empty` and `is_full` functions to `Channel`. + ## 0.5.0 - 2023-12-04 - Add a PriorityChannel. @@ -35,7 +39,6 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0 - Remove unnecessary uses of `atomic-polyfill` - Add `#[must_use]` to all futures. - ## 0.1.0 - 2022-08-26 - First release diff --git a/embassy-sync/src/channel.rs b/embassy-sync/src/channel.rs index 48f4dafd6..18be462cb 100644 --- a/embassy-sync/src/channel.rs +++ b/embassy-sync/src/channel.rs @@ -449,6 +449,18 @@ impl ChannelState { Poll::Pending } } + + fn len(&self) -> usize { + self.queue.len() + } + + fn is_empty(&self) -> bool { + self.queue.is_empty() + } + + fn is_full(&self) -> bool { + self.queue.is_full() + } } /// A bounded channel for communicating between asynchronous tasks @@ -572,6 +584,21 @@ where pub fn try_receive(&self) -> Result { self.lock(|c| c.try_receive()) } + + /// Returns the number of elements currently in the channel. + pub fn len(&self) -> usize { + self.lock(|c| c.len()) + } + + /// Returns whether the channel is empty. + pub fn is_empty(&self) -> bool { + self.lock(|c| c.is_empty()) + } + + /// Returns whether the channel is full. + pub fn is_full(&self) -> bool { + self.lock(|c| c.is_full()) + } } /// Implements the DynamicChannel to allow creating types that are unaware of the queue size with the From 7f1bedcee037839c77312d5ce667f2c199b473be Mon Sep 17 00:00:00 2001 From: chrysn Date: Fri, 2 Feb 2024 15:16:54 +0100 Subject: [PATCH 103/581] net/udp: Relay full UdpMetadata instead of only remote endpoint in poll_ functions This is a breaking change for users of the poll_ functions. (Some might not notice if they already pass in an IpEndpoint into poll_send_to, or discard that item in poll_recv_from). --- embassy-net/src/udp.rs | 16 +++++++++++----- 1 file changed, 11 insertions(+), 5 deletions(-) diff --git a/embassy-net/src/udp.rs b/embassy-net/src/udp.rs index a22cd8827..2fdf83e9d 100644 --- a/embassy-net/src/udp.rs +++ b/embassy-net/src/udp.rs @@ -8,7 +8,7 @@ use core::task::{Context, Poll}; use embassy_net_driver::Driver; use smoltcp::iface::{Interface, SocketHandle}; use smoltcp::socket::udp; -pub use smoltcp::socket::udp::PacketMetadata; +pub use smoltcp::socket::udp::{PacketMetadata, UdpMetadata}; use smoltcp::wire::{IpEndpoint, IpListenEndpoint}; use crate::{SocketStack, Stack}; @@ -112,7 +112,9 @@ impl<'a> UdpSocket<'a> { /// /// Returns the number of bytes received and the remote endpoint. pub async fn recv_from(&self, buf: &mut [u8]) -> Result<(usize, IpEndpoint), RecvError> { - poll_fn(move |cx| self.poll_recv_from(buf, cx)).await + poll_fn(move |cx| self.poll_recv_from(buf, cx)) + .await + .map(|(size, metadata)| (size, metadata.endpoint)) } /// Receive a datagram. @@ -122,9 +124,13 @@ impl<'a> UdpSocket<'a> { /// /// When a datagram is received, this method will return `Poll::Ready` with the /// number of bytes received and the remote endpoint. - pub fn poll_recv_from(&self, buf: &mut [u8], cx: &mut Context<'_>) -> Poll> { + pub fn poll_recv_from( + &self, + buf: &mut [u8], + cx: &mut Context<'_>, + ) -> Poll> { self.with_mut(|s, _| match s.recv_slice(buf) { - Ok((n, meta)) => Poll::Ready(Ok((n, meta.endpoint))), + Ok((n, meta)) => Poll::Ready(Ok((n, meta))), // No data ready Err(udp::RecvError::Truncated) => Poll::Ready(Err(RecvError::Truncated)), Err(udp::RecvError::Exhausted) => { @@ -157,7 +163,7 @@ impl<'a> UdpSocket<'a> { /// When the remote endpoint is not reachable, this method will return `Poll::Ready(Err(Error::NoRoute))`. pub fn poll_send_to(&self, buf: &[u8], remote_endpoint: T, cx: &mut Context<'_>) -> Poll> where - T: Into, + T: Into, { self.with_mut(|s, _| match s.send_slice(buf, remote_endpoint) { // Entire datagram has been sent From 03a87add156258ebb14d96e7d0b6b8597015e69a Mon Sep 17 00:00:00 2001 From: Adam Simpkins Date: Sun, 7 Apr 2024 14:37:52 -0700 Subject: [PATCH 104/581] USB: fix comments about the config.max_packet_size_0 field Fix the comment about the default value: this defaults to 64 rather than 8 bytes. It seems like the max packet size for endpoint 0 should normally be selected automatically, rather than being part of the config. At best it seems like this setting should just be a hint that gets used if when the bus is operating at full speed. The contents of the device descriptor should ideally be updated with the correct max packet size after bus enumeration completes. In practice always using 64 is probably fine if low speed environments never need to be supported. (Super speed requires a max packet size of 512 bytes, which I didn't list in the comments here.) --- embassy-usb/src/builder.rs | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/embassy-usb/src/builder.rs b/embassy-usb/src/builder.rs index c06107396..387b780de 100644 --- a/embassy-usb/src/builder.rs +++ b/embassy-usb/src/builder.rs @@ -38,11 +38,12 @@ pub struct Config<'a> { /// Maximum packet size in bytes for the control endpoint 0. /// - /// Valid values are 8, 16, 32 and 64. There's generally no need to change this from the default - /// value of 8 bytes unless a class uses control transfers for sending large amounts of data, in - /// which case using a larger packet size may be more efficient. + /// Valid values depend on the speed at which the bus is enumerated. + /// - low speed: 8 + /// - full speed: 8, 16, 32, or 64 + /// - high speed: 64 /// - /// Default: 8 bytes + /// Default: 64 bytes pub max_packet_size_0: u8, /// Manufacturer name string descriptor. From fd802ffdfd5611b9a4e0a967a7a13fd6f8159fa3 Mon Sep 17 00:00:00 2001 From: Andres Vahter Date: Tue, 9 Apr 2024 22:32:09 +0300 Subject: [PATCH 105/581] stm32: use embedded_hal_1::delay::DelayNs This makes delay compatible with https://lib.rs/crates/rtic-monotonics. --- embassy-stm32/src/adc/f1.rs | 6 +++--- embassy-stm32/src/adc/f3.rs | 6 +++--- embassy-stm32/src/adc/v1.rs | 10 +++++----- embassy-stm32/src/adc/v2.rs | 4 ++-- embassy-stm32/src/adc/v3.rs | 6 +++--- embassy-stm32/src/adc/v4.rs | 6 +++--- 6 files changed, 19 insertions(+), 19 deletions(-) diff --git a/embassy-stm32/src/adc/f1.rs b/embassy-stm32/src/adc/f1.rs index cecf67947..2dbce8043 100644 --- a/embassy-stm32/src/adc/f1.rs +++ b/embassy-stm32/src/adc/f1.rs @@ -3,7 +3,7 @@ use core::marker::PhantomData; use core::task::Poll; use embassy_hal_internal::into_ref; -use embedded_hal_02::blocking::delay::DelayUs; +use embedded_hal_1::delay::DelayNs; use crate::adc::{Adc, AdcPin, Instance, SampleTime}; use crate::time::Hertz; @@ -48,7 +48,7 @@ impl super::SealedAdcPin for Temperature { } impl<'d, T: Instance> Adc<'d, T> { - pub fn new(adc: impl Peripheral

+ 'd, delay: &mut impl DelayUs) -> Self { + pub fn new(adc: impl Peripheral

+ 'd, delay: &mut impl DelayNs) -> Self { into_ref!(adc); T::enable_and_reset(); T::regs().cr2().modify(|reg| reg.set_adon(true)); @@ -95,7 +95,7 @@ impl<'d, T: Instance> Adc<'d, T> { } } - pub fn enable_vref(&self, _delay: &mut impl DelayUs) -> Vref { + pub fn enable_vref(&self, _delay: &mut impl DelayNs) -> Vref { T::regs().cr2().modify(|reg| { reg.set_tsvrefe(true); }); diff --git a/embassy-stm32/src/adc/f3.rs b/embassy-stm32/src/adc/f3.rs index c5581dba1..4ffbe5bf1 100644 --- a/embassy-stm32/src/adc/f3.rs +++ b/embassy-stm32/src/adc/f3.rs @@ -3,7 +3,7 @@ use core::marker::PhantomData; use core::task::Poll; use embassy_hal_internal::into_ref; -use embedded_hal_02::blocking::delay::DelayUs; +use embedded_hal_1::delay::DelayNs; use crate::adc::{Adc, AdcPin, Instance, SampleTime}; use crate::interrupt::typelevel::Interrupt; @@ -58,7 +58,7 @@ impl<'d, T: Instance> Adc<'d, T> { pub fn new( adc: impl Peripheral

+ 'd, _irq: impl interrupt::typelevel::Binding> + 'd, - delay: &mut impl DelayUs, + delay: &mut impl DelayNs, ) -> Self { use crate::pac::adc::vals; @@ -117,7 +117,7 @@ impl<'d, T: Instance> Adc<'d, T> { } } - pub fn enable_vref(&self, _delay: &mut impl DelayUs) -> Vref { + pub fn enable_vref(&self, _delay: &mut impl DelayNs) -> Vref { T::common_regs().ccr().modify(|w| w.set_vrefen(true)); Vref {} diff --git a/embassy-stm32/src/adc/v1.rs b/embassy-stm32/src/adc/v1.rs index e9b46be80..3099b47d1 100644 --- a/embassy-stm32/src/adc/v1.rs +++ b/embassy-stm32/src/adc/v1.rs @@ -3,7 +3,7 @@ use core::marker::PhantomData; use core::task::Poll; use embassy_hal_internal::into_ref; -use embedded_hal_02::blocking::delay::DelayUs; +use embedded_hal_1::delay::DelayNs; #[cfg(adc_l0)] use stm32_metapac::adc::vals::Ckmode; @@ -65,7 +65,7 @@ impl<'d, T: Instance> Adc<'d, T> { pub fn new( adc: impl Peripheral

+ 'd, _irq: impl interrupt::typelevel::Binding> + 'd, - delay: &mut impl DelayUs, + delay: &mut impl DelayNs, ) -> Self { into_ref!(adc); T::enable_and_reset(); @@ -114,7 +114,7 @@ impl<'d, T: Instance> Adc<'d, T> { } #[cfg(not(adc_l0))] - pub fn enable_vbat(&self, _delay: &mut impl DelayUs) -> Vbat { + pub fn enable_vbat(&self, _delay: &mut impl DelayNs) -> Vbat { // SMP must be ≥ 56 ADC clock cycles when using HSI14. // // 6.3.20 Vbat monitoring characteristics @@ -123,7 +123,7 @@ impl<'d, T: Instance> Adc<'d, T> { Vbat } - pub fn enable_vref(&self, delay: &mut impl DelayUs) -> Vref { + pub fn enable_vref(&self, delay: &mut impl DelayNs) -> Vref { // Table 28. Embedded internal reference voltage // tstart = 10μs T::regs().ccr().modify(|reg| reg.set_vrefen(true)); @@ -131,7 +131,7 @@ impl<'d, T: Instance> Adc<'d, T> { Vref } - pub fn enable_temperature(&self, delay: &mut impl DelayUs) -> Temperature { + pub fn enable_temperature(&self, delay: &mut impl DelayNs) -> Temperature { // SMP must be ≥ 56 ADC clock cycles when using HSI14. // // 6.3.19 Temperature sensor characteristics diff --git a/embassy-stm32/src/adc/v2.rs b/embassy-stm32/src/adc/v2.rs index a43eb72db..21782cf89 100644 --- a/embassy-stm32/src/adc/v2.rs +++ b/embassy-stm32/src/adc/v2.rs @@ -1,5 +1,5 @@ use embassy_hal_internal::into_ref; -use embedded_hal_02::blocking::delay::DelayUs; +use embedded_hal_1::delay::DelayNs; use crate::adc::{Adc, AdcPin, Instance, Resolution, SampleTime}; use crate::peripherals::ADC1; @@ -97,7 +97,7 @@ impl<'d, T> Adc<'d, T> where T: Instance, { - pub fn new(adc: impl Peripheral

+ 'd, delay: &mut impl DelayUs) -> Self { + pub fn new(adc: impl Peripheral

+ 'd, delay: &mut impl DelayNs) -> Self { into_ref!(adc); T::enable_and_reset(); diff --git a/embassy-stm32/src/adc/v3.rs b/embassy-stm32/src/adc/v3.rs index e25630be2..ba01e71fd 100644 --- a/embassy-stm32/src/adc/v3.rs +++ b/embassy-stm32/src/adc/v3.rs @@ -1,6 +1,6 @@ use cfg_if::cfg_if; use embassy_hal_internal::into_ref; -use embedded_hal_02::blocking::delay::DelayUs; +use embedded_hal_1::delay::DelayNs; use crate::adc::{Adc, AdcPin, Instance, Resolution, SampleTime}; use crate::Peripheral; @@ -74,7 +74,7 @@ cfg_if! { } impl<'d, T: Instance> Adc<'d, T> { - pub fn new(adc: impl Peripheral

+ 'd, delay: &mut impl DelayUs) -> Self { + pub fn new(adc: impl Peripheral

+ 'd, delay: &mut impl DelayNs) -> Self { into_ref!(adc); T::enable_and_reset(); T::regs().cr().modify(|reg| { @@ -106,7 +106,7 @@ impl<'d, T: Instance> Adc<'d, T> { } } - pub fn enable_vrefint(&self, delay: &mut impl DelayUs) -> VrefInt { + pub fn enable_vrefint(&self, delay: &mut impl DelayNs) -> VrefInt { #[cfg(not(adc_g0))] T::common_regs().ccr().modify(|reg| { reg.set_vrefen(true); diff --git a/embassy-stm32/src/adc/v4.rs b/embassy-stm32/src/adc/v4.rs index 1ae25bea2..4320de714 100644 --- a/embassy-stm32/src/adc/v4.rs +++ b/embassy-stm32/src/adc/v4.rs @@ -1,4 +1,4 @@ -use embedded_hal_02::blocking::delay::DelayUs; +use embedded_hal_1::delay::DelayNs; #[allow(unused)] use pac::adc::vals::{Adcaldif, Boost, Difsel, Exten, Pcsel}; use pac::adccommon::vals::Presc; @@ -129,7 +129,7 @@ impl Prescaler { impl<'d, T: Instance> Adc<'d, T> { /// Create a new ADC driver. - pub fn new(adc: impl Peripheral

+ 'd, delay: &mut impl DelayUs) -> Self { + pub fn new(adc: impl Peripheral

+ 'd, delay: &mut impl DelayNs) -> Self { embassy_hal_internal::into_ref!(adc); T::enable_and_reset(); @@ -173,7 +173,7 @@ impl<'d, T: Instance> Adc<'d, T> { s } - fn power_up(&mut self, delay: &mut impl DelayUs) { + fn power_up(&mut self, delay: &mut impl DelayNs) { T::regs().cr().modify(|reg| { reg.set_deeppwd(false); reg.set_advregen(true); From 6663be0b36a078893b0ef3f3f869b17adf62ca30 Mon Sep 17 00:00:00 2001 From: Gustav Toft Date: Wed, 10 Apr 2024 09:07:20 +0200 Subject: [PATCH 106/581] Fixed commented issues. --- .vscode/settings.json | 12 ++++---- embassy-net/Cargo.toml | 4 +-- embassy-net/src/lib.rs | 4 +-- embassy-net/src/raw.rs | 64 ++---------------------------------------- 4 files changed, 13 insertions(+), 71 deletions(-) diff --git a/.vscode/settings.json b/.vscode/settings.json index 0c195a13b..343331950 100644 --- a/.vscode/settings.json +++ b/.vscode/settings.json @@ -10,24 +10,24 @@ "rust-analyzer.cargo.noDefaultFeatures": true, "rust-analyzer.showUnlinkedFileNotification": false, // uncomment the target of your chip. - //"rust-analyzer.cargo.target": "thumbv6m-none-eabi", + "rust-analyzer.cargo.target": "thumbv6m-none-eabi", //"rust-analyzer.cargo.target": "thumbv7m-none-eabi", - "rust-analyzer.cargo.target": "thumbv7em-none-eabi", + //"rust-analyzer.cargo.target": "thumbv7em-none-eabi", //"rust-analyzer.cargo.target": "thumbv8m.main-none-eabihf", - "rust-analyzer.cargo.features": [ + /* "rust-analyzer.cargo.features": [ "stm32f103c8", "time-driver-any", "unstable-pac", "exti", - ], + ], */ "rust-analyzer.linkedProjects": [ // Uncomment ONE line for the chip you want to work on. // This makes rust-analyzer work on the example crate and all its dependencies. - "embassy-stm32/Cargo.toml", + // "embassy-stm32/Cargo.toml", // "examples/nrf52840-rtic/Cargo.toml", // "examples/nrf5340/Cargo.toml", // "examples/nrf-rtos-trace/Cargo.toml", - // "examples/rp/Cargo.toml", + "examples/rp/Cargo.toml", // "examples/std/Cargo.toml", // "examples/stm32c0/Cargo.toml", // "examples/stm32f0/Cargo.toml", diff --git a/embassy-net/Cargo.toml b/embassy-net/Cargo.toml index 47faaa205..ee7289ad8 100644 --- a/embassy-net/Cargo.toml +++ b/embassy-net/Cargo.toml @@ -16,11 +16,11 @@ categories = [ [package.metadata.embassy_docs] src_base = "https://github.com/embassy-rs/embassy/blob/embassy-net-v$VERSION/embassy-net/src/" src_base_git = "https://github.com/embassy-rs/embassy/blob/$COMMIT/embassy-net/src/" -features = ["defmt", "tcp", "udp","raw", "dns", "dhcpv4", "proto-ipv6", "medium-ethernet", "medium-ip", "medium-ieee802154", "igmp", "dhcpv4-hostname"] +features = ["defmt", "tcp", "udp", "raw", "dns", "dhcpv4", "proto-ipv6", "medium-ethernet", "medium-ip", "medium-ieee802154", "igmp", "dhcpv4-hostname"] target = "thumbv7em-none-eabi" [package.metadata.docs.rs] -features = ["defmt", "tcp", "udp", "raw","dns", "dhcpv4", "proto-ipv6", "medium-ethernet", "medium-ip", "medium-ieee802154", "igmp", "dhcpv4-hostname"] +features = ["defmt", "tcp", "udp", "raw", "dns", "dhcpv4", "proto-ipv6", "medium-ethernet", "medium-ip", "medium-ieee802154", "igmp", "dhcpv4-hostname"] [features] default = [] diff --git a/embassy-net/src/lib.rs b/embassy-net/src/lib.rs index 05c8aec7b..86ced1ded 100644 --- a/embassy-net/src/lib.rs +++ b/embassy-net/src/lib.rs @@ -15,13 +15,13 @@ pub(crate) mod fmt; mod device; #[cfg(feature = "dns")] pub mod dns; +#[cfg(feature = "raw")] +pub mod raw; #[cfg(feature = "tcp")] pub mod tcp; mod time; #[cfg(feature = "udp")] pub mod udp; -#[cfg(feature = "raw")] -pub mod raw; use core::cell::RefCell; use core::future::{poll_fn, Future}; diff --git a/embassy-net/src/raw.rs b/embassy-net/src/raw.rs index a0e458fff..ad8d69853 100644 --- a/embassy-net/src/raw.rs +++ b/embassy-net/src/raw.rs @@ -13,28 +13,6 @@ use smoltcp::wire::{IpProtocol, IpVersion}; use crate::{SocketStack, Stack}; - -/// Unrelavent for RawSocket? -/* /// Error returned by [`RawSocket::bind`]. -#[derive(PartialEq, Eq, Clone, Copy, Debug)] -#[cfg_attr(feature = "defmt", derive(defmt::Format))] -pub enum BindError { - /// The socket was already open. - InvalidState, - /// No route to host. - NoRoute, -} */ - -/// Error returned by [`RawSocket::recv_from`] and [`RawSocket::send_to`]. -#[derive(PartialEq, Eq, Clone, Copy, Debug)] -#[cfg_attr(feature = "defmt", derive(defmt::Format))] -pub enum SendError { - /// No route to host. - NoRoute, - /// Socket not bound to an outgoing port. - SocketNotBound, -} - /// Error returned by [`RawSocket::recv`] and [`RawSocket::send`]. #[derive(PartialEq, Eq, Clone, Copy, Debug)] #[cfg_attr(feature = "defmt", derive(defmt::Format))] @@ -87,42 +65,6 @@ impl<'a> RawSocket<'a> { res } - /// Bind the socket to a local endpoint. - /// - /// How to handle this in RawSocket? no need for bind? - /// - /* pub fn bind(&mut self, endpoint: T) -> Result<(), BindError> - where - T: Into, - { - let mut endpoint = endpoint.into(); - - if endpoint.port == 0 { - // If user didn't specify port allocate a dynamic port. - endpoint.port = self.stack.borrow_mut().get_local_port(); - } - - match self.with_mut(|s, _| s.bind(endpoint)) { - Ok(()) => Ok(()), - Err(raw::BindError::InvalidState) => Err(BindError::InvalidState), - Err(raw::BindError::Unaddressable) => Err(BindError::NoRoute), - } - } - - fn with(&self, f: impl FnOnce(&raw::Socket, &Interface) -> R) -> R { - let s = &*self.stack.borrow(); - let socket = s.sockets.get::(self.handle); - f(socket, &s.iface) - } - - fn with_mut(&self, f: impl FnOnce(&mut raw::Socket, &mut Interface) -> R) -> R { - let s = &mut *self.stack.borrow_mut(); - let socket = s.sockets.get_mut::(self.handle); - let res = f(socket, &mut s.iface); - s.waker.wake(); - res - } */ - /// Receive a datagram. /// /// This method will wait until a datagram is received. @@ -149,7 +91,7 @@ impl<'a> RawSocket<'a> { /// Send a datagram. /// /// This method will wait until the datagram has been sent.` - pub async fn send(&self, buf: &[u8]) -> Result<(), SendError> { + pub async fn send(&self, buf: &[u8]) -> Result<(), raw::SendError> { poll_fn(move |cx| self.poll_send(buf, cx)).await } @@ -159,7 +101,7 @@ impl<'a> RawSocket<'a> { /// /// When the socket's send buffer is full, this method will return `Poll::Pending` /// and register the current task to be notified when the buffer has space available. - pub fn poll_send(&self, buf: &[u8], cx: &mut Context<'_>) -> Poll>{ + pub fn poll_send(&self, buf: &[u8], cx: &mut Context<'_>) -> Poll> { self.with_mut(|s, _| match s.send_slice(buf) { // Entire datagram has been sent Ok(()) => Poll::Ready(Ok(())), @@ -169,7 +111,7 @@ impl<'a> RawSocket<'a> { } }) } - } +} impl Drop for RawSocket<'_> { fn drop(&mut self) { From 68b1a840c6350f0c158ef17887a801808dc01f33 Mon Sep 17 00:00:00 2001 From: Andres Vahter Date: Wed, 10 Apr 2024 10:30:24 +0300 Subject: [PATCH 107/581] stm32 adc: remove DelayNs --- embassy-stm32/src/adc/f1.rs | 19 +++++++++++++------ embassy-stm32/src/adc/f3.rs | 17 +++++++++++------ embassy-stm32/src/adc/v1.rs | 23 +++++++++++++++-------- embassy-stm32/src/adc/v2.rs | 11 +++++------ embassy-stm32/src/adc/v3.rs | 24 +++++++++++++++--------- embassy-stm32/src/adc/v4.rs | 17 +++++++++++------ 6 files changed, 70 insertions(+), 41 deletions(-) diff --git a/embassy-stm32/src/adc/f1.rs b/embassy-stm32/src/adc/f1.rs index 2dbce8043..dd4b3489b 100644 --- a/embassy-stm32/src/adc/f1.rs +++ b/embassy-stm32/src/adc/f1.rs @@ -3,7 +3,6 @@ use core::marker::PhantomData; use core::task::Poll; use embassy_hal_internal::into_ref; -use embedded_hal_1::delay::DelayNs; use crate::adc::{Adc, AdcPin, Instance, SampleTime}; use crate::time::Hertz; @@ -48,14 +47,18 @@ impl super::SealedAdcPin for Temperature { } impl<'d, T: Instance> Adc<'d, T> { - pub fn new(adc: impl Peripheral

+ 'd, delay: &mut impl DelayNs) -> Self { + pub fn new(adc: impl Peripheral

+ 'd) -> Self { into_ref!(adc); T::enable_and_reset(); T::regs().cr2().modify(|reg| reg.set_adon(true)); // 11.4: Before starting a calibration, the ADC must have been in power-on state (ADON bit = ‘1’) - // for at least two ADC clock cycles - delay.delay_us((1_000_000 * 2) / Self::freq().0 + 1); + // for at least two ADC clock cycles. + let us = (1_000_000 * 2) / Self::freq().0 + 1; + #[cfg(time)] + embassy_time::block_for(embassy_time::Duration::from_micros(us)); + #[cfg(not(time))] + cortex_m::asm::delay(unsafe { crate::rcc::get_freqs() }.sys.unwrap().0 / (1000_000 / us)); // Reset calibration T::regs().cr2().modify(|reg| reg.set_rstcal(true)); @@ -70,7 +73,11 @@ impl<'d, T: Instance> Adc<'d, T> { } // One cycle after calibration - delay.delay_us((1_000_000) / Self::freq().0 + 1); + let us = (1_000_000 * 1) / Self::freq().0 + 1; + #[cfg(time)] + embassy_time::block_for(embassy_time::Duration::from_micros(us)); + #[cfg(not(time))] + cortex_m::asm::delay(unsafe { crate::rcc::get_freqs() }.sys.unwrap().0 / (1000_000 / us)); Self { adc, @@ -95,7 +102,7 @@ impl<'d, T: Instance> Adc<'d, T> { } } - pub fn enable_vref(&self, _delay: &mut impl DelayNs) -> Vref { + pub fn enable_vref(&self) -> Vref { T::regs().cr2().modify(|reg| { reg.set_tsvrefe(true); }); diff --git a/embassy-stm32/src/adc/f3.rs b/embassy-stm32/src/adc/f3.rs index 4ffbe5bf1..1a62b7707 100644 --- a/embassy-stm32/src/adc/f3.rs +++ b/embassy-stm32/src/adc/f3.rs @@ -3,7 +3,6 @@ use core::marker::PhantomData; use core::task::Poll; use embassy_hal_internal::into_ref; -use embedded_hal_1::delay::DelayNs; use crate::adc::{Adc, AdcPin, Instance, SampleTime}; use crate::interrupt::typelevel::Interrupt; @@ -58,7 +57,6 @@ impl<'d, T: Instance> Adc<'d, T> { pub fn new( adc: impl Peripheral

+ 'd, _irq: impl interrupt::typelevel::Binding> + 'd, - delay: &mut impl DelayNs, ) -> Self { use crate::pac::adc::vals; @@ -71,7 +69,10 @@ impl<'d, T: Instance> Adc<'d, T> { T::regs().cr().modify(|w| w.set_advregen(vals::Advregen::ENABLED)); // Wait for the regulator to stabilize - delay.delay_us(10); + #[cfg(time)] + embassy_time::block_for(embassy_time::Duration::from_micros(10)); + #[cfg(not(time))] + cortex_m::asm::delay(unsafe { crate::rcc::get_freqs() }.sys.unwrap().0 / 100_000); assert!(!T::regs().cr().read().aden()); @@ -81,8 +82,12 @@ impl<'d, T: Instance> Adc<'d, T> { while T::regs().cr().read().adcal() {} - // Wait more than 4 clock cycles after adcal is cleared (RM0364 p. 223) - delay.delay_us(1 + (6 * 1_000_000 / Self::freq().0)); + // Wait more than 4 clock cycles after adcal is cleared (RM0364 p. 223). + let us = (1_000_000 * 4) / Self::freq().0 + 1; + #[cfg(time)] + embassy_time::block_for(embassy_time::Duration::from_micros(us)); + #[cfg(not(time))] + cortex_m::asm::delay(unsafe { crate::rcc::get_freqs() }.sys.unwrap().0 / (1000_000 / us)); // Enable the adc T::regs().cr().modify(|w| w.set_aden(true)); @@ -117,7 +122,7 @@ impl<'d, T: Instance> Adc<'d, T> { } } - pub fn enable_vref(&self, _delay: &mut impl DelayNs) -> Vref { + pub fn enable_vref(&self) -> Vref { T::common_regs().ccr().modify(|w| w.set_vrefen(true)); Vref {} diff --git a/embassy-stm32/src/adc/v1.rs b/embassy-stm32/src/adc/v1.rs index 3099b47d1..960990c39 100644 --- a/embassy-stm32/src/adc/v1.rs +++ b/embassy-stm32/src/adc/v1.rs @@ -3,7 +3,6 @@ use core::marker::PhantomData; use core::task::Poll; use embassy_hal_internal::into_ref; -use embedded_hal_1::delay::DelayNs; #[cfg(adc_l0)] use stm32_metapac::adc::vals::Ckmode; @@ -65,7 +64,6 @@ impl<'d, T: Instance> Adc<'d, T> { pub fn new( adc: impl Peripheral

+ 'd, _irq: impl interrupt::typelevel::Binding> + 'd, - delay: &mut impl DelayNs, ) -> Self { into_ref!(adc); T::enable_and_reset(); @@ -74,7 +72,10 @@ impl<'d, T: Instance> Adc<'d, T> { // // Table 57. ADC characteristics // tstab = 14 * 1/fadc - delay.delay_us(1); + #[cfg(time)] + embassy_time::block_for(embassy_time::Duration::from_micros(1)); + #[cfg(not(time))] + cortex_m::asm::delay(unsafe { crate::rcc::get_freqs() }.sys.unwrap().0 / 1000_000); // set default PCKL/2 on L0s because HSI is disabled in the default clock config #[cfg(adc_l0)] @@ -114,7 +115,7 @@ impl<'d, T: Instance> Adc<'d, T> { } #[cfg(not(adc_l0))] - pub fn enable_vbat(&self, _delay: &mut impl DelayNs) -> Vbat { + pub fn enable_vbat(&self) -> Vbat { // SMP must be ≥ 56 ADC clock cycles when using HSI14. // // 6.3.20 Vbat monitoring characteristics @@ -123,22 +124,28 @@ impl<'d, T: Instance> Adc<'d, T> { Vbat } - pub fn enable_vref(&self, delay: &mut impl DelayNs) -> Vref { + pub fn enable_vref(&self) -> Vref { // Table 28. Embedded internal reference voltage // tstart = 10μs T::regs().ccr().modify(|reg| reg.set_vrefen(true)); - delay.delay_us(10); + #[cfg(time)] + embassy_time::block_for(embassy_time::Duration::from_micros(10)); + #[cfg(not(time))] + cortex_m::asm::delay(unsafe { crate::rcc::get_freqs() }.sys.unwrap().0 / 100_000); Vref } - pub fn enable_temperature(&self, delay: &mut impl DelayNs) -> Temperature { + pub fn enable_temperature(&self) -> Temperature { // SMP must be ≥ 56 ADC clock cycles when using HSI14. // // 6.3.19 Temperature sensor characteristics // tstart ≤ 10μs // ts_temp ≥ 4μs T::regs().ccr().modify(|reg| reg.set_tsen(true)); - delay.delay_us(10); + #[cfg(time)] + embassy_time::block_for(embassy_time::Duration::from_micros(10)); + #[cfg(not(time))] + cortex_m::asm::delay(unsafe { crate::rcc::get_freqs() }.sys.unwrap().0 / 100_000); Temperature } diff --git a/embassy-stm32/src/adc/v2.rs b/embassy-stm32/src/adc/v2.rs index 21782cf89..1ac119508 100644 --- a/embassy-stm32/src/adc/v2.rs +++ b/embassy-stm32/src/adc/v2.rs @@ -1,5 +1,4 @@ use embassy_hal_internal::into_ref; -use embedded_hal_1::delay::DelayNs; use crate::adc::{Adc, AdcPin, Instance, Resolution, SampleTime}; use crate::peripherals::ADC1; @@ -11,9 +10,6 @@ pub const VREF_DEFAULT_MV: u32 = 3300; /// VREF voltage used for factory calibration of VREFINTCAL register. pub const VREF_CALIB_MV: u32 = 3300; -/// ADC turn-on time -pub const ADC_POWERUP_TIME_US: u32 = 3; - pub struct VrefInt; impl AdcPin for VrefInt {} impl super::SealedAdcPin for VrefInt { @@ -97,7 +93,7 @@ impl<'d, T> Adc<'d, T> where T: Instance, { - pub fn new(adc: impl Peripheral

+ 'd, delay: &mut impl DelayNs) -> Self { + pub fn new(adc: impl Peripheral

+ 'd) -> Self { into_ref!(adc); T::enable_and_reset(); @@ -107,7 +103,10 @@ where reg.set_adon(true); }); - delay.delay_us(ADC_POWERUP_TIME_US); + #[cfg(time)] + embassy_time::block_for(embassy_time::Duration::from_micros(5)); + #[cfg(not(time))] + cortex_m::asm::delay(unsafe { crate::rcc::get_freqs() }.sys.unwrap().0 / 200_000); Self { adc, diff --git a/embassy-stm32/src/adc/v3.rs b/embassy-stm32/src/adc/v3.rs index ba01e71fd..a5e09646a 100644 --- a/embassy-stm32/src/adc/v3.rs +++ b/embassy-stm32/src/adc/v3.rs @@ -1,6 +1,5 @@ use cfg_if::cfg_if; use embassy_hal_internal::into_ref; -use embedded_hal_1::delay::DelayNs; use crate::adc::{Adc, AdcPin, Instance, Resolution, SampleTime}; use crate::Peripheral; @@ -74,7 +73,7 @@ cfg_if! { } impl<'d, T: Instance> Adc<'d, T> { - pub fn new(adc: impl Peripheral

+ 'd, delay: &mut impl DelayNs) -> Self { + pub fn new(adc: impl Peripheral

+ 'd) -> Self { into_ref!(adc); T::enable_and_reset(); T::regs().cr().modify(|reg| { @@ -88,7 +87,10 @@ impl<'d, T: Instance> Adc<'d, T> { reg.set_chselrmod(false); }); - delay.delay_us(20); + #[cfg(time)] + embassy_time::block_for(embassy_time::Duration::from_micros(20)); + #[cfg(not(time))] + cortex_m::asm::delay(unsafe { crate::rcc::get_freqs() }.sys.unwrap().0 / 50_000); T::regs().cr().modify(|reg| { reg.set_adcal(true); @@ -98,7 +100,10 @@ impl<'d, T: Instance> Adc<'d, T> { // spin } - delay.delay_us(1); + #[cfg(time)] + embassy_time::block_for(embassy_time::Duration::from_micros(1)); + #[cfg(not(time))] + cortex_m::asm::delay(unsafe { crate::rcc::get_freqs() }.sys.unwrap().0 / 1000_000); Self { adc, @@ -106,7 +111,7 @@ impl<'d, T: Instance> Adc<'d, T> { } } - pub fn enable_vrefint(&self, delay: &mut impl DelayNs) -> VrefInt { + pub fn enable_vrefint(&self) -> VrefInt { #[cfg(not(adc_g0))] T::common_regs().ccr().modify(|reg| { reg.set_vrefen(true); @@ -117,10 +122,11 @@ impl<'d, T: Instance> Adc<'d, T> { }); // "Table 24. Embedded internal voltage reference" states that it takes a maximum of 12 us - // to stabilize the internal voltage reference, we wait a little more. - // TODO: delay 15us - //cortex_m::asm::delay(20_000_000); - delay.delay_us(15); + // to stabilize the internal voltage reference. + #[cfg(time)] + embassy_time::block_for(embassy_time::Duration::from_micros(20)); + #[cfg(not(time))] + cortex_m::asm::delay(unsafe { crate::rcc::get_freqs() }.sys.unwrap().0 / 50_000); VrefInt {} } diff --git a/embassy-stm32/src/adc/v4.rs b/embassy-stm32/src/adc/v4.rs index 4320de714..018104dd6 100644 --- a/embassy-stm32/src/adc/v4.rs +++ b/embassy-stm32/src/adc/v4.rs @@ -1,4 +1,3 @@ -use embedded_hal_1::delay::DelayNs; #[allow(unused)] use pac::adc::vals::{Adcaldif, Boost, Difsel, Exten, Pcsel}; use pac::adccommon::vals::Presc; @@ -129,7 +128,7 @@ impl Prescaler { impl<'d, T: Instance> Adc<'d, T> { /// Create a new ADC driver. - pub fn new(adc: impl Peripheral

+ 'd, delay: &mut impl DelayNs) -> Self { + pub fn new(adc: impl Peripheral

+ 'd) -> Self { embassy_hal_internal::into_ref!(adc); T::enable_and_reset(); @@ -161,11 +160,14 @@ impl<'d, T: Instance> Adc<'d, T> { adc, sample_time: SampleTime::from_bits(0), }; - s.power_up(delay); + s.power_up(); s.configure_differential_inputs(); s.calibrate(); - delay.delay_us(1); + #[cfg(time)] + embassy_time::block_for(embassy_time::Duration::from_micros(1)); + #[cfg(not(time))] + cortex_m::asm::delay(unsafe { crate::rcc::get_freqs() }.sys.unwrap().0 / 1000_000); s.enable(); s.configure(); @@ -173,13 +175,16 @@ impl<'d, T: Instance> Adc<'d, T> { s } - fn power_up(&mut self, delay: &mut impl DelayNs) { + fn power_up(&mut self) { T::regs().cr().modify(|reg| { reg.set_deeppwd(false); reg.set_advregen(true); }); - delay.delay_us(10); + #[cfg(time)] + embassy_time::block_for(embassy_time::Duration::from_micros(10)); + #[cfg(not(time))] + cortex_m::asm::delay(unsafe { crate::rcc::get_freqs() }.sys.unwrap().0 / 100_000); } fn configure_differential_inputs(&mut self) { From fd901fc7e052cdf1b48327140d78712b1e076220 Mon Sep 17 00:00:00 2001 From: Andres Vahter Date: Wed, 10 Apr 2024 10:49:42 +0300 Subject: [PATCH 108/581] stm32: update adc examples --- examples/stm32f0/src/bin/adc.rs | 6 +++--- examples/stm32f1/src/bin/adc.rs | 6 +++--- examples/stm32f334/src/bin/adc.rs | 6 +++--- examples/stm32f334/src/bin/opamp.rs | 6 +++--- examples/stm32f4/src/bin/adc.rs | 2 +- examples/stm32f7/src/bin/adc.rs | 4 ++-- examples/stm32g4/src/bin/adc.rs | 4 ++-- examples/stm32h7/src/bin/adc.rs | 4 ++-- examples/stm32l0/src/bin/adc.rs | 6 +++--- examples/stm32l4/src/bin/adc.rs | 3 +-- tests/stm32/src/bin/dac.rs | 4 ++-- 11 files changed, 25 insertions(+), 26 deletions(-) diff --git a/examples/stm32f0/src/bin/adc.rs b/examples/stm32f0/src/bin/adc.rs index c2fb143cd..a5a4186ea 100644 --- a/examples/stm32f0/src/bin/adc.rs +++ b/examples/stm32f0/src/bin/adc.rs @@ -6,7 +6,7 @@ use embassy_executor::Spawner; use embassy_stm32::adc::{Adc, SampleTime}; use embassy_stm32::peripherals::ADC; use embassy_stm32::{adc, bind_interrupts}; -use embassy_time::{Delay, Timer}; +use embassy_time::Timer; use {defmt_rtt as _, panic_probe as _}; bind_interrupts!(struct Irqs { @@ -18,11 +18,11 @@ async fn main(_spawner: Spawner) { let p = embassy_stm32::init(Default::default()); info!("Hello World!"); - let mut adc = Adc::new(p.ADC, Irqs, &mut Delay); + let mut adc = Adc::new(p.ADC, Irqs); adc.set_sample_time(SampleTime::CYCLES71_5); let mut pin = p.PA1; - let mut vrefint = adc.enable_vref(&mut Delay); + let mut vrefint = adc.enable_vref(); let vrefint_sample = adc.read(&mut vrefint).await; let convert_to_millivolts = |sample| { // From https://www.st.com/resource/en/datasheet/stm32f031c6.pdf diff --git a/examples/stm32f1/src/bin/adc.rs b/examples/stm32f1/src/bin/adc.rs index 1440460a9..541ff159e 100644 --- a/examples/stm32f1/src/bin/adc.rs +++ b/examples/stm32f1/src/bin/adc.rs @@ -6,7 +6,7 @@ use embassy_executor::Spawner; use embassy_stm32::adc::Adc; use embassy_stm32::peripherals::ADC1; use embassy_stm32::{adc, bind_interrupts}; -use embassy_time::{Delay, Timer}; +use embassy_time::Timer; use {defmt_rtt as _, panic_probe as _}; bind_interrupts!(struct Irqs { @@ -18,10 +18,10 @@ async fn main(_spawner: Spawner) { let p = embassy_stm32::init(Default::default()); info!("Hello World!"); - let mut adc = Adc::new(p.ADC1, &mut Delay); + let mut adc = Adc::new(p.ADC1); let mut pin = p.PB1; - let mut vrefint = adc.enable_vref(&mut Delay); + let mut vrefint = adc.enable_vref(); let vrefint_sample = adc.read(&mut vrefint).await; let convert_to_millivolts = |sample| { // From http://www.st.com/resource/en/datasheet/CD00161566.pdf diff --git a/examples/stm32f334/src/bin/adc.rs b/examples/stm32f334/src/bin/adc.rs index bd126ce68..0528a9637 100644 --- a/examples/stm32f334/src/bin/adc.rs +++ b/examples/stm32f334/src/bin/adc.rs @@ -7,7 +7,7 @@ use embassy_stm32::adc::{Adc, SampleTime}; use embassy_stm32::peripherals::ADC1; use embassy_stm32::time::mhz; use embassy_stm32::{adc, bind_interrupts, Config}; -use embassy_time::{Delay, Timer}; +use embassy_time::Timer; use {defmt_rtt as _, panic_probe as _}; bind_interrupts!(struct Irqs { @@ -38,13 +38,13 @@ async fn main(_spawner: Spawner) -> ! { info!("create adc..."); - let mut adc = Adc::new(p.ADC1, Irqs, &mut Delay); + let mut adc = Adc::new(p.ADC1, Irqs); adc.set_sample_time(SampleTime::CYCLES601_5); info!("enable vrefint..."); - let mut vrefint = adc.enable_vref(&mut Delay); + let mut vrefint = adc.enable_vref(); let mut temperature = adc.enable_temperature(); loop { diff --git a/examples/stm32f334/src/bin/opamp.rs b/examples/stm32f334/src/bin/opamp.rs index a5c710aa2..2dbf1bdab 100644 --- a/examples/stm32f334/src/bin/opamp.rs +++ b/examples/stm32f334/src/bin/opamp.rs @@ -8,7 +8,7 @@ use embassy_stm32::opamp::{OpAmp, OpAmpGain}; use embassy_stm32::peripherals::ADC2; use embassy_stm32::time::mhz; use embassy_stm32::{adc, bind_interrupts, Config}; -use embassy_time::{Delay, Timer}; +use embassy_time::Timer; use {defmt_rtt as _, panic_probe as _}; bind_interrupts!(struct Irqs { @@ -39,14 +39,14 @@ async fn main(_spawner: Spawner) -> ! { info!("create adc..."); - let mut adc = Adc::new(p.ADC2, Irqs, &mut Delay); + let mut adc = Adc::new(p.ADC2, Irqs); let mut opamp = OpAmp::new(p.OPAMP2); adc.set_sample_time(SampleTime::CYCLES601_5); info!("enable vrefint..."); - let mut vrefint = adc.enable_vref(&mut Delay); + let mut vrefint = adc.enable_vref(); let mut temperature = adc.enable_temperature(); let mut buffer = opamp.buffer_ext(&mut p.PA7, &mut p.PA6, OpAmpGain::Mul1); diff --git a/examples/stm32f4/src/bin/adc.rs b/examples/stm32f4/src/bin/adc.rs index 699c29c05..9473b7b7f 100644 --- a/examples/stm32f4/src/bin/adc.rs +++ b/examples/stm32f4/src/bin/adc.rs @@ -14,7 +14,7 @@ async fn main(_spawner: Spawner) { info!("Hello World!"); let mut delay = Delay; - let mut adc = Adc::new(p.ADC1, &mut delay); + let mut adc = Adc::new(p.ADC1); let mut pin = p.PC1; let mut vrefint = adc.enable_vrefint(); diff --git a/examples/stm32f7/src/bin/adc.rs b/examples/stm32f7/src/bin/adc.rs index f8d7b691f..641157960 100644 --- a/examples/stm32f7/src/bin/adc.rs +++ b/examples/stm32f7/src/bin/adc.rs @@ -4,7 +4,7 @@ use defmt::*; use embassy_executor::Spawner; use embassy_stm32::adc::Adc; -use embassy_time::{Delay, Timer}; +use embassy_time::Timer; use {defmt_rtt as _, panic_probe as _}; #[embassy_executor::main] @@ -12,7 +12,7 @@ async fn main(_spawner: Spawner) { let p = embassy_stm32::init(Default::default()); info!("Hello World!"); - let mut adc = Adc::new(p.ADC1, &mut Delay); + let mut adc = Adc::new(p.ADC1); let mut pin = p.PA3; let mut vrefint = adc.enable_vrefint(); diff --git a/examples/stm32g4/src/bin/adc.rs b/examples/stm32g4/src/bin/adc.rs index ae64bc8e4..68b54e406 100644 --- a/examples/stm32g4/src/bin/adc.rs +++ b/examples/stm32g4/src/bin/adc.rs @@ -5,7 +5,7 @@ use defmt::*; use embassy_executor::Spawner; use embassy_stm32::adc::{Adc, SampleTime}; use embassy_stm32::Config; -use embassy_time::{Delay, Timer}; +use embassy_time::Timer; use {defmt_rtt as _, panic_probe as _}; #[embassy_executor::main] @@ -28,7 +28,7 @@ async fn main(_spawner: Spawner) { let mut p = embassy_stm32::init(config); info!("Hello World!"); - let mut adc = Adc::new(p.ADC2, &mut Delay); + let mut adc = Adc::new(p.ADC2); adc.set_sample_time(SampleTime::CYCLES32_5); loop { diff --git a/examples/stm32h7/src/bin/adc.rs b/examples/stm32h7/src/bin/adc.rs index a5594d10c..0009103d1 100644 --- a/examples/stm32h7/src/bin/adc.rs +++ b/examples/stm32h7/src/bin/adc.rs @@ -5,7 +5,7 @@ use defmt::*; use embassy_executor::Spawner; use embassy_stm32::adc::{Adc, SampleTime}; use embassy_stm32::Config; -use embassy_time::{Delay, Timer}; +use embassy_time::Timer; use {defmt_rtt as _, panic_probe as _}; #[embassy_executor::main] @@ -44,7 +44,7 @@ async fn main(_spawner: Spawner) { info!("Hello World!"); - let mut adc = Adc::new(p.ADC3, &mut Delay); + let mut adc = Adc::new(p.ADC3); adc.set_sample_time(SampleTime::CYCLES32_5); diff --git a/examples/stm32l0/src/bin/adc.rs b/examples/stm32l0/src/bin/adc.rs index 97d41ca4b..507c3204a 100644 --- a/examples/stm32l0/src/bin/adc.rs +++ b/examples/stm32l0/src/bin/adc.rs @@ -6,7 +6,7 @@ use embassy_executor::Spawner; use embassy_stm32::adc::{Adc, SampleTime}; use embassy_stm32::peripherals::ADC; use embassy_stm32::{adc, bind_interrupts}; -use embassy_time::{Delay, Timer}; +use embassy_time::Timer; use {defmt_rtt as _, panic_probe as _}; bind_interrupts!(struct Irqs { @@ -18,11 +18,11 @@ async fn main(_spawner: Spawner) { let p = embassy_stm32::init(Default::default()); info!("Hello World!"); - let mut adc = Adc::new(p.ADC, Irqs, &mut Delay); + let mut adc = Adc::new(p.ADC, Irqs); adc.set_sample_time(SampleTime::CYCLES79_5); let mut pin = p.PA1; - let mut vrefint = adc.enable_vref(&mut Delay); + let mut vrefint = adc.enable_vref(); let vrefint_sample = adc.read(&mut vrefint).await; let convert_to_millivolts = |sample| { // From https://www.st.com/resource/en/datasheet/stm32l051c6.pdf diff --git a/examples/stm32l4/src/bin/adc.rs b/examples/stm32l4/src/bin/adc.rs index a9f4604aa..7a89334e0 100644 --- a/examples/stm32l4/src/bin/adc.rs +++ b/examples/stm32l4/src/bin/adc.rs @@ -4,7 +4,6 @@ use defmt::*; use embassy_stm32::adc::{Adc, Resolution}; use embassy_stm32::Config; -use embassy_time::Delay; use {defmt_rtt as _, panic_probe as _}; #[cortex_m_rt::entry] @@ -18,7 +17,7 @@ fn main() -> ! { } let p = embassy_stm32::init(config); - let mut adc = Adc::new(p.ADC1, &mut Delay); + let mut adc = Adc::new(p.ADC1); //adc.enable_vref(); adc.set_resolution(Resolution::BITS8); let mut channel = p.PC0; diff --git a/tests/stm32/src/bin/dac.rs b/tests/stm32/src/bin/dac.rs index 9d64742df..06501ab14 100644 --- a/tests/stm32/src/bin/dac.rs +++ b/tests/stm32/src/bin/dac.rs @@ -13,7 +13,7 @@ use embassy_executor::Spawner; use embassy_stm32::adc::Adc; use embassy_stm32::dac::{DacCh1, Value}; use embassy_stm32::dma::NoDma; -use embassy_time::{Delay, Timer}; +use embassy_time::Timer; use micromath::F32Ext; use {defmt_rtt as _, panic_probe as _}; @@ -28,7 +28,7 @@ async fn main(_spawner: Spawner) { let mut adc_pin = unsafe { core::ptr::read(&dac_pin) }; let mut dac = DacCh1::new(dac, NoDma, dac_pin); - let mut adc = Adc::new(adc, &mut Delay); + let mut adc = Adc::new(adc); #[cfg(feature = "stm32h755zi")] let normalization_factor = 256; From fcb270bcede54d975ff89c05691131d2a898638f Mon Sep 17 00:00:00 2001 From: Priit Laes Date: Wed, 10 Apr 2024 11:00:30 +0300 Subject: [PATCH 109/581] nrf: Add basic CHANGELOG summarizing changes in embassy-nrf --- embassy-nrf/CHANGELOG.md | 40 ++++++++++++++++++++++++++++++++++++++++ 1 file changed, 40 insertions(+) create mode 100644 embassy-nrf/CHANGELOG.md diff --git a/embassy-nrf/CHANGELOG.md b/embassy-nrf/CHANGELOG.md new file mode 100644 index 000000000..773a1a108 --- /dev/null +++ b/embassy-nrf/CHANGELOG.md @@ -0,0 +1,40 @@ +# Changelog for embassy-nrf + +All notable changes to this project will be documented in this file. + +The format is based on [Keep a Changelog](https://keepachangelog.com/en/1.0.0/), +and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0.html). + +## Unreleased + +- Drop `sealed` mod +- nrf52840: Add dcdc voltage parameter to configure REG0 regulator +- radio: Add support for IEEE 802.15.4 and BLE via radio peripheral +- spim: Reduce trace-level messages ("Copying SPIM tx buffer..") +- uart: Add support for rx- or tx-only BufferedUart +- uart: Implement splitting Rx/Tx +- spi: Allow specifying OutputDrive for SPI spins +- pdm: Fix gain register value derivation +- spim: Implement chunked DMA transfers +- spi: Add bounds checks for EasyDMA buffer size +- uarte: Add support for handling RX errors +- nrf51: Implement support for nrf51 chip +- pwm: Expose `duty` method +- pwm: Fix infinite loop +- spi: Add support for configuring bit order for bus +- pwm: Expose `pwm::PWM_CLK_HZ` and add `is_enabled` method +- gpio: Drop GPIO Pin generics (API break) + +## 0.1.0 - 2024-01-12 + +- First release with support for following NRF chips: + - nrf52805 + - nrf52810 + - nrf52811 + - nrf52820 + - nrf52832 + - nrf52833 + - nrf52840 + - nrf5340 + - nrf9160 + From 11bf2ca987f5830fe8637029adbc208b1ff7349d Mon Sep 17 00:00:00 2001 From: Gustav Toft Date: Wed, 10 Apr 2024 13:26:12 +0200 Subject: [PATCH 110/581] Fixed commented issues --- embassy-net/Cargo.toml | 4 +-- embassy-net/src/lib.rs | 4 +-- embassy-net/src/raw.rs | 64 ++---------------------------------------- 3 files changed, 7 insertions(+), 65 deletions(-) diff --git a/embassy-net/Cargo.toml b/embassy-net/Cargo.toml index 47faaa205..ee7289ad8 100644 --- a/embassy-net/Cargo.toml +++ b/embassy-net/Cargo.toml @@ -16,11 +16,11 @@ categories = [ [package.metadata.embassy_docs] src_base = "https://github.com/embassy-rs/embassy/blob/embassy-net-v$VERSION/embassy-net/src/" src_base_git = "https://github.com/embassy-rs/embassy/blob/$COMMIT/embassy-net/src/" -features = ["defmt", "tcp", "udp","raw", "dns", "dhcpv4", "proto-ipv6", "medium-ethernet", "medium-ip", "medium-ieee802154", "igmp", "dhcpv4-hostname"] +features = ["defmt", "tcp", "udp", "raw", "dns", "dhcpv4", "proto-ipv6", "medium-ethernet", "medium-ip", "medium-ieee802154", "igmp", "dhcpv4-hostname"] target = "thumbv7em-none-eabi" [package.metadata.docs.rs] -features = ["defmt", "tcp", "udp", "raw","dns", "dhcpv4", "proto-ipv6", "medium-ethernet", "medium-ip", "medium-ieee802154", "igmp", "dhcpv4-hostname"] +features = ["defmt", "tcp", "udp", "raw", "dns", "dhcpv4", "proto-ipv6", "medium-ethernet", "medium-ip", "medium-ieee802154", "igmp", "dhcpv4-hostname"] [features] default = [] diff --git a/embassy-net/src/lib.rs b/embassy-net/src/lib.rs index 05c8aec7b..86ced1ded 100644 --- a/embassy-net/src/lib.rs +++ b/embassy-net/src/lib.rs @@ -15,13 +15,13 @@ pub(crate) mod fmt; mod device; #[cfg(feature = "dns")] pub mod dns; +#[cfg(feature = "raw")] +pub mod raw; #[cfg(feature = "tcp")] pub mod tcp; mod time; #[cfg(feature = "udp")] pub mod udp; -#[cfg(feature = "raw")] -pub mod raw; use core::cell::RefCell; use core::future::{poll_fn, Future}; diff --git a/embassy-net/src/raw.rs b/embassy-net/src/raw.rs index a0e458fff..ad8d69853 100644 --- a/embassy-net/src/raw.rs +++ b/embassy-net/src/raw.rs @@ -13,28 +13,6 @@ use smoltcp::wire::{IpProtocol, IpVersion}; use crate::{SocketStack, Stack}; - -/// Unrelavent for RawSocket? -/* /// Error returned by [`RawSocket::bind`]. -#[derive(PartialEq, Eq, Clone, Copy, Debug)] -#[cfg_attr(feature = "defmt", derive(defmt::Format))] -pub enum BindError { - /// The socket was already open. - InvalidState, - /// No route to host. - NoRoute, -} */ - -/// Error returned by [`RawSocket::recv_from`] and [`RawSocket::send_to`]. -#[derive(PartialEq, Eq, Clone, Copy, Debug)] -#[cfg_attr(feature = "defmt", derive(defmt::Format))] -pub enum SendError { - /// No route to host. - NoRoute, - /// Socket not bound to an outgoing port. - SocketNotBound, -} - /// Error returned by [`RawSocket::recv`] and [`RawSocket::send`]. #[derive(PartialEq, Eq, Clone, Copy, Debug)] #[cfg_attr(feature = "defmt", derive(defmt::Format))] @@ -87,42 +65,6 @@ impl<'a> RawSocket<'a> { res } - /// Bind the socket to a local endpoint. - /// - /// How to handle this in RawSocket? no need for bind? - /// - /* pub fn bind(&mut self, endpoint: T) -> Result<(), BindError> - where - T: Into, - { - let mut endpoint = endpoint.into(); - - if endpoint.port == 0 { - // If user didn't specify port allocate a dynamic port. - endpoint.port = self.stack.borrow_mut().get_local_port(); - } - - match self.with_mut(|s, _| s.bind(endpoint)) { - Ok(()) => Ok(()), - Err(raw::BindError::InvalidState) => Err(BindError::InvalidState), - Err(raw::BindError::Unaddressable) => Err(BindError::NoRoute), - } - } - - fn with(&self, f: impl FnOnce(&raw::Socket, &Interface) -> R) -> R { - let s = &*self.stack.borrow(); - let socket = s.sockets.get::(self.handle); - f(socket, &s.iface) - } - - fn with_mut(&self, f: impl FnOnce(&mut raw::Socket, &mut Interface) -> R) -> R { - let s = &mut *self.stack.borrow_mut(); - let socket = s.sockets.get_mut::(self.handle); - let res = f(socket, &mut s.iface); - s.waker.wake(); - res - } */ - /// Receive a datagram. /// /// This method will wait until a datagram is received. @@ -149,7 +91,7 @@ impl<'a> RawSocket<'a> { /// Send a datagram. /// /// This method will wait until the datagram has been sent.` - pub async fn send(&self, buf: &[u8]) -> Result<(), SendError> { + pub async fn send(&self, buf: &[u8]) -> Result<(), raw::SendError> { poll_fn(move |cx| self.poll_send(buf, cx)).await } @@ -159,7 +101,7 @@ impl<'a> RawSocket<'a> { /// /// When the socket's send buffer is full, this method will return `Poll::Pending` /// and register the current task to be notified when the buffer has space available. - pub fn poll_send(&self, buf: &[u8], cx: &mut Context<'_>) -> Poll>{ + pub fn poll_send(&self, buf: &[u8], cx: &mut Context<'_>) -> Poll> { self.with_mut(|s, _| match s.send_slice(buf) { // Entire datagram has been sent Ok(()) => Poll::Ready(Ok(())), @@ -169,7 +111,7 @@ impl<'a> RawSocket<'a> { } }) } - } +} impl Drop for RawSocket<'_> { fn drop(&mut self) { From 6e24dc58c6395cc5d733d676986d3b336ce7a220 Mon Sep 17 00:00:00 2001 From: Andres Vahter Date: Wed, 10 Apr 2024 16:47:58 +0300 Subject: [PATCH 111/581] stm32 adc: use fn blocking_delay_us(us: u32) --- embassy-stm32/src/adc/f1.rs | 13 +++---------- embassy-stm32/src/adc/f3.rs | 12 +++--------- embassy-stm32/src/adc/mod.rs | 9 +++++++++ embassy-stm32/src/adc/v1.rs | 16 ++++------------ embassy-stm32/src/adc/v2.rs | 6 ++---- embassy-stm32/src/adc/v3.rs | 16 ++++------------ embassy-stm32/src/adc/v4.rs | 12 +++--------- 7 files changed, 28 insertions(+), 56 deletions(-) diff --git a/embassy-stm32/src/adc/f1.rs b/embassy-stm32/src/adc/f1.rs index dd4b3489b..80eaecc14 100644 --- a/embassy-stm32/src/adc/f1.rs +++ b/embassy-stm32/src/adc/f1.rs @@ -4,6 +4,7 @@ use core::task::Poll; use embassy_hal_internal::into_ref; +use super::blocking_delay_us; use crate::adc::{Adc, AdcPin, Instance, SampleTime}; use crate::time::Hertz; use crate::{interrupt, Peripheral}; @@ -54,11 +55,7 @@ impl<'d, T: Instance> Adc<'d, T> { // 11.4: Before starting a calibration, the ADC must have been in power-on state (ADON bit = ‘1’) // for at least two ADC clock cycles. - let us = (1_000_000 * 2) / Self::freq().0 + 1; - #[cfg(time)] - embassy_time::block_for(embassy_time::Duration::from_micros(us)); - #[cfg(not(time))] - cortex_m::asm::delay(unsafe { crate::rcc::get_freqs() }.sys.unwrap().0 / (1000_000 / us)); + blocking_delay_us((1_000_000 * 2) / Self::freq().0 + 1); // Reset calibration T::regs().cr2().modify(|reg| reg.set_rstcal(true)); @@ -73,11 +70,7 @@ impl<'d, T: Instance> Adc<'d, T> { } // One cycle after calibration - let us = (1_000_000 * 1) / Self::freq().0 + 1; - #[cfg(time)] - embassy_time::block_for(embassy_time::Duration::from_micros(us)); - #[cfg(not(time))] - cortex_m::asm::delay(unsafe { crate::rcc::get_freqs() }.sys.unwrap().0 / (1000_000 / us)); + blocking_delay_us((1_000_000 * 1) / Self::freq().0 + 1); Self { adc, diff --git a/embassy-stm32/src/adc/f3.rs b/embassy-stm32/src/adc/f3.rs index 1a62b7707..c22a3fe4a 100644 --- a/embassy-stm32/src/adc/f3.rs +++ b/embassy-stm32/src/adc/f3.rs @@ -4,6 +4,7 @@ use core::task::Poll; use embassy_hal_internal::into_ref; +use super::blocking_delay_us; use crate::adc::{Adc, AdcPin, Instance, SampleTime}; use crate::interrupt::typelevel::Interrupt; use crate::time::Hertz; @@ -69,10 +70,7 @@ impl<'d, T: Instance> Adc<'d, T> { T::regs().cr().modify(|w| w.set_advregen(vals::Advregen::ENABLED)); // Wait for the regulator to stabilize - #[cfg(time)] - embassy_time::block_for(embassy_time::Duration::from_micros(10)); - #[cfg(not(time))] - cortex_m::asm::delay(unsafe { crate::rcc::get_freqs() }.sys.unwrap().0 / 100_000); + blocking_delay_us(10); assert!(!T::regs().cr().read().aden()); @@ -83,11 +81,7 @@ impl<'d, T: Instance> Adc<'d, T> { while T::regs().cr().read().adcal() {} // Wait more than 4 clock cycles after adcal is cleared (RM0364 p. 223). - let us = (1_000_000 * 4) / Self::freq().0 + 1; - #[cfg(time)] - embassy_time::block_for(embassy_time::Duration::from_micros(us)); - #[cfg(not(time))] - cortex_m::asm::delay(unsafe { crate::rcc::get_freqs() }.sys.unwrap().0 / (1000_000 / us)); + blocking_delay_us((1_000_000 * 4) / Self::freq().0 + 1); // Enable the adc T::regs().cr().modify(|w| w.set_aden(true)); diff --git a/embassy-stm32/src/adc/mod.rs b/embassy-stm32/src/adc/mod.rs index ead2357ce..24dd7cc3c 100644 --- a/embassy-stm32/src/adc/mod.rs +++ b/embassy-stm32/src/adc/mod.rs @@ -69,6 +69,15 @@ trait SealedInternalChannel { fn channel(&self) -> u8; } +/// Performs a busy-wait delay for a specified number of microseconds. +#[allow(unused)] +pub(crate) fn blocking_delay_us(us: u32) { + #[cfg(time)] + embassy_time::block_for(embassy_time::Duration::from_micros(us)); + #[cfg(not(time))] + cortex_m::asm::delay(unsafe { crate::rcc::get_freqs() }.sys.unwrap().0 * us / 1_000_000); +} + /// ADC instance. #[cfg(not(any(adc_f1, adc_v1, adc_l0, adc_v2, adc_v3, adc_v4, adc_f3, adc_f3_v1_1, adc_g0, adc_h5)))] #[allow(private_bounds)] diff --git a/embassy-stm32/src/adc/v1.rs b/embassy-stm32/src/adc/v1.rs index 960990c39..1dda28cf2 100644 --- a/embassy-stm32/src/adc/v1.rs +++ b/embassy-stm32/src/adc/v1.rs @@ -6,6 +6,7 @@ use embassy_hal_internal::into_ref; #[cfg(adc_l0)] use stm32_metapac::adc::vals::Ckmode; +use super::blocking_delay_us; use crate::adc::{Adc, AdcPin, Instance, Resolution, SampleTime}; use crate::interrupt::typelevel::Interrupt; use crate::peripherals::ADC; @@ -72,10 +73,7 @@ impl<'d, T: Instance> Adc<'d, T> { // // Table 57. ADC characteristics // tstab = 14 * 1/fadc - #[cfg(time)] - embassy_time::block_for(embassy_time::Duration::from_micros(1)); - #[cfg(not(time))] - cortex_m::asm::delay(unsafe { crate::rcc::get_freqs() }.sys.unwrap().0 / 1000_000); + blocking_delay_us(1); // set default PCKL/2 on L0s because HSI is disabled in the default clock config #[cfg(adc_l0)] @@ -128,10 +126,7 @@ impl<'d, T: Instance> Adc<'d, T> { // Table 28. Embedded internal reference voltage // tstart = 10μs T::regs().ccr().modify(|reg| reg.set_vrefen(true)); - #[cfg(time)] - embassy_time::block_for(embassy_time::Duration::from_micros(10)); - #[cfg(not(time))] - cortex_m::asm::delay(unsafe { crate::rcc::get_freqs() }.sys.unwrap().0 / 100_000); + blocking_delay_us(10); Vref } @@ -142,10 +137,7 @@ impl<'d, T: Instance> Adc<'d, T> { // tstart ≤ 10μs // ts_temp ≥ 4μs T::regs().ccr().modify(|reg| reg.set_tsen(true)); - #[cfg(time)] - embassy_time::block_for(embassy_time::Duration::from_micros(10)); - #[cfg(not(time))] - cortex_m::asm::delay(unsafe { crate::rcc::get_freqs() }.sys.unwrap().0 / 100_000); + blocking_delay_us(10); Temperature } diff --git a/embassy-stm32/src/adc/v2.rs b/embassy-stm32/src/adc/v2.rs index 1ac119508..7771cf768 100644 --- a/embassy-stm32/src/adc/v2.rs +++ b/embassy-stm32/src/adc/v2.rs @@ -1,5 +1,6 @@ use embassy_hal_internal::into_ref; +use super::blocking_delay_us; use crate::adc::{Adc, AdcPin, Instance, Resolution, SampleTime}; use crate::peripherals::ADC1; use crate::time::Hertz; @@ -103,10 +104,7 @@ where reg.set_adon(true); }); - #[cfg(time)] - embassy_time::block_for(embassy_time::Duration::from_micros(5)); - #[cfg(not(time))] - cortex_m::asm::delay(unsafe { crate::rcc::get_freqs() }.sys.unwrap().0 / 200_000); + blocking_delay_us(3); Self { adc, diff --git a/embassy-stm32/src/adc/v3.rs b/embassy-stm32/src/adc/v3.rs index a5e09646a..4fd8558ba 100644 --- a/embassy-stm32/src/adc/v3.rs +++ b/embassy-stm32/src/adc/v3.rs @@ -1,6 +1,7 @@ use cfg_if::cfg_if; use embassy_hal_internal::into_ref; +use super::blocking_delay_us; use crate::adc::{Adc, AdcPin, Instance, Resolution, SampleTime}; use crate::Peripheral; @@ -87,10 +88,7 @@ impl<'d, T: Instance> Adc<'d, T> { reg.set_chselrmod(false); }); - #[cfg(time)] - embassy_time::block_for(embassy_time::Duration::from_micros(20)); - #[cfg(not(time))] - cortex_m::asm::delay(unsafe { crate::rcc::get_freqs() }.sys.unwrap().0 / 50_000); + blocking_delay_us(20); T::regs().cr().modify(|reg| { reg.set_adcal(true); @@ -100,10 +98,7 @@ impl<'d, T: Instance> Adc<'d, T> { // spin } - #[cfg(time)] - embassy_time::block_for(embassy_time::Duration::from_micros(1)); - #[cfg(not(time))] - cortex_m::asm::delay(unsafe { crate::rcc::get_freqs() }.sys.unwrap().0 / 1000_000); + blocking_delay_us(1); Self { adc, @@ -123,10 +118,7 @@ impl<'d, T: Instance> Adc<'d, T> { // "Table 24. Embedded internal voltage reference" states that it takes a maximum of 12 us // to stabilize the internal voltage reference. - #[cfg(time)] - embassy_time::block_for(embassy_time::Duration::from_micros(20)); - #[cfg(not(time))] - cortex_m::asm::delay(unsafe { crate::rcc::get_freqs() }.sys.unwrap().0 / 50_000); + blocking_delay_us(15); VrefInt {} } diff --git a/embassy-stm32/src/adc/v4.rs b/embassy-stm32/src/adc/v4.rs index 018104dd6..ca87b41ee 100644 --- a/embassy-stm32/src/adc/v4.rs +++ b/embassy-stm32/src/adc/v4.rs @@ -2,7 +2,7 @@ use pac::adc::vals::{Adcaldif, Boost, Difsel, Exten, Pcsel}; use pac::adccommon::vals::Presc; -use super::{Adc, AdcPin, Instance, InternalChannel, Resolution, SampleTime}; +use super::{blocking_delay_us, Adc, AdcPin, Instance, InternalChannel, Resolution, SampleTime}; use crate::time::Hertz; use crate::{pac, Peripheral}; @@ -164,10 +164,7 @@ impl<'d, T: Instance> Adc<'d, T> { s.configure_differential_inputs(); s.calibrate(); - #[cfg(time)] - embassy_time::block_for(embassy_time::Duration::from_micros(1)); - #[cfg(not(time))] - cortex_m::asm::delay(unsafe { crate::rcc::get_freqs() }.sys.unwrap().0 / 1000_000); + blocking_delay_us(1); s.enable(); s.configure(); @@ -181,10 +178,7 @@ impl<'d, T: Instance> Adc<'d, T> { reg.set_advregen(true); }); - #[cfg(time)] - embassy_time::block_for(embassy_time::Duration::from_micros(10)); - #[cfg(not(time))] - cortex_m::asm::delay(unsafe { crate::rcc::get_freqs() }.sys.unwrap().0 / 100_000); + blocking_delay_us(10); } fn configure_differential_inputs(&mut self) { From ec0896037ad6c48d527e1abb88ca49ec0f376663 Mon Sep 17 00:00:00 2001 From: Gustav Toft Date: Thu, 11 Apr 2024 08:29:06 +0200 Subject: [PATCH 112/581] Removed Result for send and poll_send. --- embassy-net/src/raw.rs | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/embassy-net/src/raw.rs b/embassy-net/src/raw.rs index ad8d69853..a6500a51f 100644 --- a/embassy-net/src/raw.rs +++ b/embassy-net/src/raw.rs @@ -91,7 +91,7 @@ impl<'a> RawSocket<'a> { /// Send a datagram. /// /// This method will wait until the datagram has been sent.` - pub async fn send(&self, buf: &[u8]) -> Result<(), raw::SendError> { + pub async fn send(&self, buf: &[u8]) { poll_fn(move |cx| self.poll_send(buf, cx)).await } @@ -101,10 +101,10 @@ impl<'a> RawSocket<'a> { /// /// When the socket's send buffer is full, this method will return `Poll::Pending` /// and register the current task to be notified when the buffer has space available. - pub fn poll_send(&self, buf: &[u8], cx: &mut Context<'_>) -> Poll> { + pub fn poll_send(&self, buf: &[u8], cx: &mut Context<'_>) -> Poll<()> { self.with_mut(|s, _| match s.send_slice(buf) { // Entire datagram has been sent - Ok(()) => Poll::Ready(Ok(())), + Ok(()) => Poll::Ready(()), Err(raw::SendError::BufferFull) => { s.register_send_waker(cx.waker()); Poll::Pending From fd5113eeb00add4af38cb0a3ff95c7d414c68b87 Mon Sep 17 00:00:00 2001 From: Gustav Toft Date: Thu, 11 Apr 2024 09:08:10 +0200 Subject: [PATCH 113/581] Restore vscode settings --- .vscode/settings.json | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/.vscode/settings.json b/.vscode/settings.json index 343331950..0c195a13b 100644 --- a/.vscode/settings.json +++ b/.vscode/settings.json @@ -10,24 +10,24 @@ "rust-analyzer.cargo.noDefaultFeatures": true, "rust-analyzer.showUnlinkedFileNotification": false, // uncomment the target of your chip. - "rust-analyzer.cargo.target": "thumbv6m-none-eabi", + //"rust-analyzer.cargo.target": "thumbv6m-none-eabi", //"rust-analyzer.cargo.target": "thumbv7m-none-eabi", - //"rust-analyzer.cargo.target": "thumbv7em-none-eabi", + "rust-analyzer.cargo.target": "thumbv7em-none-eabi", //"rust-analyzer.cargo.target": "thumbv8m.main-none-eabihf", - /* "rust-analyzer.cargo.features": [ + "rust-analyzer.cargo.features": [ "stm32f103c8", "time-driver-any", "unstable-pac", "exti", - ], */ + ], "rust-analyzer.linkedProjects": [ // Uncomment ONE line for the chip you want to work on. // This makes rust-analyzer work on the example crate and all its dependencies. - // "embassy-stm32/Cargo.toml", + "embassy-stm32/Cargo.toml", // "examples/nrf52840-rtic/Cargo.toml", // "examples/nrf5340/Cargo.toml", // "examples/nrf-rtos-trace/Cargo.toml", - "examples/rp/Cargo.toml", + // "examples/rp/Cargo.toml", // "examples/std/Cargo.toml", // "examples/stm32c0/Cargo.toml", // "examples/stm32f0/Cargo.toml", From b578d3e645a534bdc76f43e603e9f5b2cab131fa Mon Sep 17 00:00:00 2001 From: Gustav Toft Date: Thu, 11 Apr 2024 10:34:17 +0200 Subject: [PATCH 114/581] Removed generic type parameter. --- embassy-net/src/raw.rs | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/embassy-net/src/raw.rs b/embassy-net/src/raw.rs index a6500a51f..7ecd913e7 100644 --- a/embassy-net/src/raw.rs +++ b/embassy-net/src/raw.rs @@ -91,7 +91,7 @@ impl<'a> RawSocket<'a> { /// Send a datagram. /// /// This method will wait until the datagram has been sent.` - pub async fn send(&self, buf: &[u8]) { + pub async fn send(&self, buf: &[u8]) { poll_fn(move |cx| self.poll_send(buf, cx)).await } From 9053b6b5b3a09e48ed5e2476a5f712c9796828d5 Mon Sep 17 00:00:00 2001 From: Vega Deftwing Date: Thu, 11 Apr 2024 19:45:38 +0000 Subject: [PATCH 115/581] Fix spelling and white space mistakes --- NOTICE.md | 2 +- README.md | 8 ++++---- embassy-boot-nrf/README.md | 2 +- embassy-boot/README.md | 2 +- embassy-net/README.md | 4 ++-- embassy-time-queue-driver/README.md | 2 +- embassy-time/README.md | 2 +- embassy-usb/README.md | 4 ++-- examples/boot/bootloader/stm32-dual-bank/README.md | 8 ++++---- examples/stm32f4/src/bin/ws2812_spi.rs | 2 +- 10 files changed, 18 insertions(+), 18 deletions(-) diff --git a/NOTICE.md b/NOTICE.md index 868bec08f..a50b39494 100644 --- a/NOTICE.md +++ b/NOTICE.md @@ -12,5 +12,5 @@ listed source code repository logs. This program and the accompanying materials are made available under the terms of the Apache Software License 2.0 which is available at -https://www.apache.org/licenses/LICENSE-2.0, or the MIT license which is +https://www.apache.org/licenses/LICENSE-2.0, or the MIT license which is available at https://opensource.org/licenses/MIT diff --git a/README.md b/README.md index b6f667f75..0bd1ac594 100644 --- a/README.md +++ b/README.md @@ -7,7 +7,7 @@ Embassy is the next-generation framework for embedded applications. Write safe, The Rust programming language is blazingly fast and memory-efficient, with no runtime, garbage collector or OS. It catches a wide variety of bugs at compile time, thanks to its full memory- and thread-safety, and expressive type system. -Rust's async/await allows for unprecedently easy and efficient multitasking in embedded systems. Tasks get transformed at compile time into state machines that get run cooperatively. It requires no dynamic memory allocation, and runs on a single stack, so no per-task stack size tuning is required. It obsoletes the need for a traditional RTOS with kernel context switching, and is faster and smaller than one! +Rust's async/await allows for unprecedentedly easy and efficient multitasking in embedded systems. Tasks get transformed at compile time into state machines that get run cooperatively. It requires no dynamic memory allocation, and runs on a single stack, so no per-task stack size tuning is required. It obsoletes the need for a traditional RTOS with kernel context switching, and is faster and smaller than one! ## Batteries included @@ -89,7 +89,7 @@ async fn main(spawner: Spawner) { ## Examples -Examples are found in the `examples/` folder seperated by the chip manufacturer they are designed to run on. For example: +Examples are found in the `examples/` folder separated by the chip manufacturer they are designed to run on. For example: * `examples/nrf52840` run on the `nrf52840-dk` board (PCA10056) but should be easily adaptable to other nRF52 chips and boards. * `examples/nrf5340` run on the `nrf5340-dk` board (PCA10095). @@ -130,8 +130,8 @@ For more help getting started, see [Getting Started][1] and [Running the Example ## Developing Embassy with Rust Analyzer based editors The [Rust Analyzer](https://rust-analyzer.github.io/) is used by [Visual Studio Code](https://code.visualstudio.com/) -and others. Given the multiple targets that Embassy serves, there is no Cargo workspace file. Instead, the Rust Analyzer -must be told of the target project to work with. In the case of Visual Studio Code, +and others. Given the multiple targets that Embassy serves, there is no Cargo workspace file. Instead, the Rust Analyzer +must be told of the target project to work with. In the case of Visual Studio Code, please refer to the `.vscode/settings.json` file's `rust-analyzer.linkedProjects`setting. ## Minimum supported Rust version (MSRV) diff --git a/embassy-boot-nrf/README.md b/embassy-boot-nrf/README.md index 9dc5b0eb9..f0d87e18c 100644 --- a/embassy-boot-nrf/README.md +++ b/embassy-boot-nrf/README.md @@ -2,7 +2,7 @@ An [Embassy](https://embassy.dev) project. -An adaptation of `embassy-boot` for nRF. +An adaptation of `embassy-boot` for nRF. ## Features diff --git a/embassy-boot/README.md b/embassy-boot/README.md index 3c2d45e96..812c43524 100644 --- a/embassy-boot/README.md +++ b/embassy-boot/README.md @@ -15,7 +15,7 @@ The bootloader divides the storage into 4 main partitions, configurable when cre * BOOTLOADER - Where the bootloader is placed. The bootloader itself consumes about 8kB of flash, but if you need to debug it and have space available, increasing this to 24kB will allow you to run the bootloader with probe-rs. * ACTIVE - Where the main application is placed. The bootloader will attempt to load the application at the start of this partition. The minimum size required for this partition is the size of your application. * DFU - Where the application-to-be-swapped is placed. This partition is written to by the application. This partition must be at least 1 page bigger than the ACTIVE partition. -* BOOTLOADER STATE - Where the bootloader stores the current state describing if the active and dfu partitions need to be swapped. +* BOOTLOADER STATE - Where the bootloader stores the current state describing if the active and dfu partitions need to be swapped. For any partition, the following preconditions are required: diff --git a/embassy-net/README.md b/embassy-net/README.md index 94aa6f550..ce59ea34a 100644 --- a/embassy-net/README.md +++ b/embassy-net/README.md @@ -13,8 +13,8 @@ memory management designed to work well for embedded systems, aiming for a more - TCP, UDP, DNS, DHCPv4, IGMPv4 - TCP sockets implement the `embedded-io` async traits. -See the [`smoltcp`](https://github.com/smoltcp-rs/smoltcp) README for a detailed list of implemented and -unimplemented features of the network protocols. +See the [`smoltcp`](https://github.com/smoltcp-rs/smoltcp) README for a detailed list of implemented and +unimplemented features of the network protocols. ## Hardware support diff --git a/embassy-time-queue-driver/README.md b/embassy-time-queue-driver/README.md index 8852b0358..b9fb12d94 100644 --- a/embassy-time-queue-driver/README.md +++ b/embassy-time-queue-driver/README.md @@ -4,5 +4,5 @@ This crate contains the driver trait used by the [`embassy-time`](https://crates You should rarely need to use this crate directly. Only use it when implementing your own timer queue. -There is two timer queue implementations, one in `embassy-time` enabled by the `generic-queue` feature, and +There is two timer queue implementations, one in `embassy-time` enabled by the `generic-queue` feature, and another in `embassy-executor` enabled by the `integrated-timers` feature. diff --git a/embassy-time/README.md b/embassy-time/README.md index f5d46df7b..6a4b049b4 100644 --- a/embassy-time/README.md +++ b/embassy-time/README.md @@ -5,7 +5,7 @@ Timekeeping, delays and timeouts. Timekeeping is done with elapsed time since system boot. Time is represented in ticks, where the tick rate is defined either by the driver (in the case of a fixed-rate tick) or chosen by the user with a [tick rate](#tick-rate) feature. The chosen -tick rate applies to everything in `embassy-time` and thus determines the maximum +tick rate applies to everything in `embassy-time` and thus determines the maximum timing resolution of (1 / tick_rate) seconds. Tick counts are 64 bits. The default tick rate of 1Mhz supports diff --git a/embassy-usb/README.md b/embassy-usb/README.md index d2adae4f5..400fc6695 100644 --- a/embassy-usb/README.md +++ b/embassy-usb/README.md @@ -34,8 +34,8 @@ They can be set in two ways: - Via Cargo features: enable a feature like `-`. `name` must be in lowercase and use dashes instead of underscores. For example. `max-interface-count-3`. Only a selection of values is available, check `Cargo.toml` for the list. -- Via environment variables at build time: set the variable named `EMBASSY_USB_`. For example -`EMBASSY_USB_MAX_INTERFACE_COUNT=3 cargo build`. You can also set them in the `[env]` section of `.cargo/config.toml`. +- Via environment variables at build time: set the variable named `EMBASSY_USB_`. For example +`EMBASSY_USB_MAX_INTERFACE_COUNT=3 cargo build`. You can also set them in the `[env]` section of `.cargo/config.toml`. Any value can be set, unlike with Cargo features. Environment variables take precedence over Cargo features. If two Cargo features are enabled for the same setting diff --git a/examples/boot/bootloader/stm32-dual-bank/README.md b/examples/boot/bootloader/stm32-dual-bank/README.md index 3de3171cd..cd6c0bc84 100644 --- a/examples/boot/bootloader/stm32-dual-bank/README.md +++ b/examples/boot/bootloader/stm32-dual-bank/README.md @@ -2,16 +2,16 @@ ## Overview -This bootloader leverages `embassy-boot` to interact with the flash. -This example targets STM32 devices with dual-bank flash memory, with a primary focus on the STM32H747XI series. +This bootloader leverages `embassy-boot` to interact with the flash. +This example targets STM32 devices with dual-bank flash memory, with a primary focus on the STM32H747XI series. Users must modify the `memory.x` configuration file to match with the memory layout of their specific STM32 device. Additionally, this example can be extended to utilize external flash memory, such as QSPI, for storing partitions. ## Memory Configuration -In this example's `memory.x` file, various symbols are defined to assist in effective memory management within the bootloader environment. -For dual-bank STM32 devices, it's crucial to assign these symbols correctly to their respective memory banks. +In this example's `memory.x` file, various symbols are defined to assist in effective memory management within the bootloader environment. +For dual-bank STM32 devices, it's crucial to assign these symbols correctly to their respective memory banks. ### Symbol Definitions diff --git a/examples/stm32f4/src/bin/ws2812_spi.rs b/examples/stm32f4/src/bin/ws2812_spi.rs index a280a3b77..56ccb67b8 100644 --- a/examples/stm32f4/src/bin/ws2812_spi.rs +++ b/examples/stm32f4/src/bin/ws2812_spi.rs @@ -8,7 +8,7 @@ // If you want to save SPI for other purpose, you may want to take a look at `ws2812_pwm_dma.rs` file, which make use of TIM and DMA. // // Warning: -// DO NOT stare at ws2812 directy (especially after each MCU Reset), its (max) brightness could easily make your eyes feel burn. +// DO NOT stare at ws2812 directly (especially after each MCU Reset), its (max) brightness could easily make your eyes feel burn. #![no_std] #![no_main] From 80fadada7056516aa566033929a305b36f6b9be4 Mon Sep 17 00:00:00 2001 From: Vega Deftwing Date: Thu, 11 Apr 2024 19:47:31 +0000 Subject: [PATCH 116/581] .sh whitespace and shellcheck fixes --- .github/ci/build.sh | 2 +- .github/ci/crlf.sh | 2 +- .github/ci/rustfmt.sh | 2 +- .github/ci/test.sh | 6 +++--- 4 files changed, 6 insertions(+), 6 deletions(-) diff --git a/.github/ci/build.sh b/.github/ci/build.sh index 77d2b3cab..68a7c0c34 100755 --- a/.github/ci/build.sh +++ b/.github/ci/build.sh @@ -7,7 +7,7 @@ set -euo pipefail export RUSTUP_HOME=/ci/cache/rustup export CARGO_HOME=/ci/cache/cargo export CARGO_TARGET_DIR=/ci/cache/target -if [ -f /ci/secrets/teleprobe-token.txt ]; then +if [ -f /ci/secrets/teleprobe-token.txt ]; then echo Got teleprobe token! export TELEPROBE_HOST=https://teleprobe.embassy.dev export TELEPROBE_TOKEN=$(cat /ci/secrets/teleprobe-token.txt) diff --git a/.github/ci/crlf.sh b/.github/ci/crlf.sh index 69838ce88..ede17c861 100755 --- a/.github/ci/crlf.sh +++ b/.github/ci/crlf.sh @@ -4,7 +4,7 @@ set -euo pipefail -FILES_WITH_CRLF=$(find ! -path "./.git/*" -not -type d | xargs file -N | (grep " CRLF " || true)) +FILES_WITH_CRLF=$(find ! -path "./.git/*" -not -type d | xargs -0 file -N | (grep " CRLF " || true)) if [ -z "$FILES_WITH_CRLF" ]; then echo -e "No files with CRLF endings found." diff --git a/.github/ci/rustfmt.sh b/.github/ci/rustfmt.sh index 369239cfe..0080f0db8 100755 --- a/.github/ci/rustfmt.sh +++ b/.github/ci/rustfmt.sh @@ -9,4 +9,4 @@ export CARGO_HOME=/ci/cache/cargo export CARGO_TARGET_DIR=/ci/cache/target mv rust-toolchain-nightly.toml rust-toolchain.toml -find . -name '*.rs' -not -path '*target*' | xargs rustfmt --check --skip-children --unstable-features --edition 2021 +find . -name '*.rs' -not -path '*target*' | xargs -0 rustfmt --check --skip-children --unstable-features --edition 2021 diff --git a/.github/ci/test.sh b/.github/ci/test.sh index 8a58939f6..6cb3a4bff 100755 --- a/.github/ci/test.sh +++ b/.github/ci/test.sh @@ -8,9 +8,9 @@ export RUSTUP_HOME=/ci/cache/rustup export CARGO_HOME=/ci/cache/cargo export CARGO_TARGET_DIR=/ci/cache/target -cargo test --manifest-path ./embassy-sync/Cargo.toml -cargo test --manifest-path ./embassy-embedded-hal/Cargo.toml -cargo test --manifest-path ./embassy-hal-internal/Cargo.toml +cargo test --manifest-path ./embassy-sync/Cargo.toml +cargo test --manifest-path ./embassy-embedded-hal/Cargo.toml +cargo test --manifest-path ./embassy-hal-internal/Cargo.toml cargo test --manifest-path ./embassy-time/Cargo.toml --features generic-queue,mock-driver cargo test --manifest-path ./embassy-time-driver/Cargo.toml From a3f8048877e658493b9147a122fab2c788463591 Mon Sep 17 00:00:00 2001 From: Vega Deftwing Date: Thu, 11 Apr 2024 20:21:30 +0000 Subject: [PATCH 117/581] Revert xargs changes --- .github/ci/crlf.sh | 2 +- .github/ci/rustfmt.sh | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/.github/ci/crlf.sh b/.github/ci/crlf.sh index ede17c861..69838ce88 100755 --- a/.github/ci/crlf.sh +++ b/.github/ci/crlf.sh @@ -4,7 +4,7 @@ set -euo pipefail -FILES_WITH_CRLF=$(find ! -path "./.git/*" -not -type d | xargs -0 file -N | (grep " CRLF " || true)) +FILES_WITH_CRLF=$(find ! -path "./.git/*" -not -type d | xargs file -N | (grep " CRLF " || true)) if [ -z "$FILES_WITH_CRLF" ]; then echo -e "No files with CRLF endings found." diff --git a/.github/ci/rustfmt.sh b/.github/ci/rustfmt.sh index 0080f0db8..369239cfe 100755 --- a/.github/ci/rustfmt.sh +++ b/.github/ci/rustfmt.sh @@ -9,4 +9,4 @@ export CARGO_HOME=/ci/cache/cargo export CARGO_TARGET_DIR=/ci/cache/target mv rust-toolchain-nightly.toml rust-toolchain.toml -find . -name '*.rs' -not -path '*target*' | xargs -0 rustfmt --check --skip-children --unstable-features --edition 2021 +find . -name '*.rs' -not -path '*target*' | xargs rustfmt --check --skip-children --unstable-features --edition 2021 From 98b4eb4491f285fd1008938c4116633f7646c042 Mon Sep 17 00:00:00 2001 From: Boris Faure Date: Sun, 7 Apr 2024 17:58:17 +0200 Subject: [PATCH 118/581] stm32: fix typo in doc --- embassy-stm32/src/usb/otg.rs | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/embassy-stm32/src/usb/otg.rs b/embassy-stm32/src/usb/otg.rs index b0e7067bd..1e88b6959 100644 --- a/embassy-stm32/src/usb/otg.rs +++ b/embassy-stm32/src/usb/otg.rs @@ -317,7 +317,7 @@ impl<'d, T: Instance> Driver<'d, T> { /// /// # Arguments /// - /// * `ep_out_buffer` - An internal buffer used to temporarily store recevied packets. + /// * `ep_out_buffer` - An internal buffer used to temporarily store received packets. /// Must be large enough to fit all OUT endpoint max packet sizes. /// Endpoint allocation will fail if it is too small. pub fn new_fs( @@ -348,7 +348,7 @@ impl<'d, T: Instance> Driver<'d, T> { /// /// # Arguments /// - /// * `ep_out_buffer` - An internal buffer used to temporarily store recevied packets. + /// * `ep_out_buffer` - An internal buffer used to temporarily store received packets. /// Must be large enough to fit all OUT endpoint max packet sizes. /// Endpoint allocation will fail if it is too small. pub fn new_hs_ulpi( From 499c6e84a3d007e52de25104d658dd98724a2d5a Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Fri, 12 Apr 2024 03:19:42 +0200 Subject: [PATCH 119/581] stm32/otg: fix OTG_HS in FS mode. --- embassy-stm32/src/usb/otg.rs | 58 +++++++++++------------------------- 1 file changed, 18 insertions(+), 40 deletions(-) diff --git a/embassy-stm32/src/usb/otg.rs b/embassy-stm32/src/usb/otg.rs index 1e88b6959..cabc06367 100644 --- a/embassy-stm32/src/usb/otg.rs +++ b/embassy-stm32/src/usb/otg.rs @@ -562,51 +562,29 @@ impl<'d, T: Instance> Bus<'d, T> { fn init(&mut self) { super::common_init::(); - #[cfg(stm32f7)] - { - // Enable ULPI clock if external PHY is used - let ulpien = !self.phy_type.internal(); - critical_section::with(|_| { - crate::pac::RCC.ahb1enr().modify(|w| { - if T::HIGH_SPEED { - w.set_usb_otg_hsulpien(ulpien); - } else { - w.set_usb_otg_hsen(ulpien); - } - }); + // Enable ULPI clock if external PHY is used + let _ulpien = !self.phy_type.internal(); - // Low power mode - crate::pac::RCC.ahb1lpenr().modify(|w| { - if T::HIGH_SPEED { - w.set_usb_otg_hsulpilpen(ulpien); - } else { - w.set_usb_otg_hslpen(ulpien); - } - }); + #[cfg(any(stm32f2, stm32f4, stm32f7))] + if T::HIGH_SPEED { + critical_section::with(|_| { + let rcc = crate::pac::RCC; + rcc.ahb1enr().modify(|w| w.set_usb_otg_hsulpien(_ulpien)); + rcc.ahb1lpenr().modify(|w| w.set_usb_otg_hsulpilpen(_ulpien)); }); } #[cfg(stm32h7)] - { - // Enable ULPI clock if external PHY is used - let ulpien = !self.phy_type.internal(); - critical_section::with(|_| { - crate::pac::RCC.ahb1enr().modify(|w| { - if T::HIGH_SPEED { - w.set_usb_otg_hs_ulpien(ulpien); - } else { - w.set_usb_otg_fs_ulpien(ulpien); - } - }); - crate::pac::RCC.ahb1lpenr().modify(|w| { - if T::HIGH_SPEED { - w.set_usb_otg_hs_ulpilpen(ulpien); - } else { - w.set_usb_otg_fs_ulpilpen(ulpien); - } - }); - }); - } + critical_section::with(|_| { + let rcc = crate::pac::RCC; + if T::HIGH_SPEED { + rcc.ahb1enr().modify(|w| w.set_usb_otg_hs_ulpien(_ulpien)); + rcc.ahb1lpenr().modify(|w| w.set_usb_otg_hs_ulpilpen(_ulpien)); + } else { + rcc.ahb1enr().modify(|w| w.set_usb_otg_fs_ulpien(_ulpien)); + rcc.ahb1lpenr().modify(|w| w.set_usb_otg_fs_ulpilpen(_ulpien)); + } + }); let r = T::regs(); let core_id = r.cid().read().0; From 64b806db0bb6a3ae507330ddd3dc8c815e3b1563 Mon Sep 17 00:00:00 2001 From: chemicstry Date: Fri, 12 Apr 2024 17:59:25 +0300 Subject: [PATCH 120/581] Expose RCC enable and disable methods --- embassy-stm32/src/rcc/mod.rs | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/embassy-stm32/src/rcc/mod.rs b/embassy-stm32/src/rcc/mod.rs index c328344aa..5497bba07 100644 --- a/embassy-stm32/src/rcc/mod.rs +++ b/embassy-stm32/src/rcc/mod.rs @@ -119,3 +119,21 @@ mod util { pub fn frequency() -> Hertz { T::frequency() } + +/// Enables and resets peripheral `T`. +/// +/// # Safety +/// +/// Peripheral must not be in use. +pub unsafe fn enable_and_reset() { + T::enable_and_reset(); +} + +/// Disables peripheral `T`. +/// +/// # Safety +/// +/// Peripheral must not be in use. +pub unsafe fn disable() { + T::disable(); +} From 9f4d320d676a5177535db0e1d78159126db20644 Mon Sep 17 00:00:00 2001 From: Michael Zill Date: Tue, 9 Apr 2024 06:56:15 +0200 Subject: [PATCH 121/581] stm32/spi,crc: update for new PAC --- embassy-stm32/Cargo.toml | 4 ++-- embassy-stm32/src/crc/v1.rs | 12 ++++++++++++ embassy-stm32/src/crc/v2v3.rs | 16 ++++++++-------- embassy-stm32/src/spi/mod.rs | 17 ++++++++++++----- 4 files changed, 34 insertions(+), 15 deletions(-) diff --git a/embassy-stm32/Cargo.toml b/embassy-stm32/Cargo.toml index 89b24f0eb..93792ecf8 100644 --- a/embassy-stm32/Cargo.toml +++ b/embassy-stm32/Cargo.toml @@ -70,7 +70,7 @@ rand_core = "0.6.3" sdio-host = "0.5.0" critical-section = "1.1" #stm32-metapac = { version = "15" } -stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-2b7ec569a5510c324693f0515ac8ea20b12917a9" } +stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-0c4baf478324e19741c7a9795ab0aa8217c3691c" } vcell = "0.1.3" nb = "1.0.0" @@ -96,7 +96,7 @@ proc-macro2 = "1.0.36" quote = "1.0.15" #stm32-metapac = { version = "15", default-features = false, features = ["metadata"]} -stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-2b7ec569a5510c324693f0515ac8ea20b12917a9", default-features = false, features = ["metadata"]} +stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-0c4baf478324e19741c7a9795ab0aa8217c3691c", default-features = false, features = ["metadata"]} [features] default = ["rt"] diff --git a/embassy-stm32/src/crc/v1.rs b/embassy-stm32/src/crc/v1.rs index f8909d438..e8e0270af 100644 --- a/embassy-stm32/src/crc/v1.rs +++ b/embassy-stm32/src/crc/v1.rs @@ -32,6 +32,9 @@ impl<'d> Crc<'d> { /// Feeds a word to the peripheral and returns the current CRC value pub fn feed_word(&mut self, word: u32) -> u32 { // write a single byte to the device, and return the result + #[cfg(not(crc_v1))] + PAC_CRC.dr32().write_value(word); + #[cfg(crc_v1)] PAC_CRC.dr().write_value(word); self.read() } @@ -39,6 +42,9 @@ impl<'d> Crc<'d> { /// Feed a slice of words to the peripheral and return the result. pub fn feed_words(&mut self, words: &[u32]) -> u32 { for word in words { + #[cfg(not(crc_v1))] + PAC_CRC.dr32().write_value(*word); + #[cfg(crc_v1)] PAC_CRC.dr().write_value(*word); } @@ -46,6 +52,12 @@ impl<'d> Crc<'d> { } /// Read the CRC result value. + #[cfg(not(crc_v1))] + pub fn read(&self) -> u32 { + PAC_CRC.dr32().read() + } + /// Read the CRC result value. + #[cfg(crc_v1)] pub fn read(&self) -> u32 { PAC_CRC.dr().read() } diff --git a/embassy-stm32/src/crc/v2v3.rs b/embassy-stm32/src/crc/v2v3.rs index 46f5ea1be..13fb6778c 100644 --- a/embassy-stm32/src/crc/v2v3.rs +++ b/embassy-stm32/src/crc/v2v3.rs @@ -136,7 +136,7 @@ impl<'d> Crc<'d> { /// Feeds a byte into the CRC peripheral. Returns the computed checksum. pub fn feed_byte(&mut self, byte: u8) -> u32 { PAC_CRC.dr8().write_value(byte); - PAC_CRC.dr().read() + PAC_CRC.dr32().read() } /// Feeds an slice of bytes into the CRC peripheral. Returns the computed checksum. @@ -144,30 +144,30 @@ impl<'d> Crc<'d> { for byte in bytes { PAC_CRC.dr8().write_value(*byte); } - PAC_CRC.dr().read() + PAC_CRC.dr32().read() } /// Feeds a halfword into the CRC peripheral. Returns the computed checksum. pub fn feed_halfword(&mut self, halfword: u16) -> u32 { PAC_CRC.dr16().write_value(halfword); - PAC_CRC.dr().read() + PAC_CRC.dr32().read() } /// Feeds an slice of halfwords into the CRC peripheral. Returns the computed checksum. pub fn feed_halfwords(&mut self, halfwords: &[u16]) -> u32 { for halfword in halfwords { PAC_CRC.dr16().write_value(*halfword); } - PAC_CRC.dr().read() + PAC_CRC.dr32().read() } /// Feeds a words into the CRC peripheral. Returns the computed checksum. pub fn feed_word(&mut self, word: u32) -> u32 { - PAC_CRC.dr().write_value(word as u32); - PAC_CRC.dr().read() + PAC_CRC.dr32().write_value(word as u32); + PAC_CRC.dr32().read() } /// Feeds an slice of words into the CRC peripheral. Returns the computed checksum. pub fn feed_words(&mut self, words: &[u32]) -> u32 { for word in words { - PAC_CRC.dr().write_value(*word as u32); + PAC_CRC.dr32().write_value(*word as u32); } - PAC_CRC.dr().read() + PAC_CRC.dr32().read() } } diff --git a/embassy-stm32/src/spi/mod.rs b/embassy-stm32/src/spi/mod.rs index 0b38c4288..340cfde03 100644 --- a/embassy-stm32/src/spi/mod.rs +++ b/embassy-stm32/src/spi/mod.rs @@ -735,18 +735,22 @@ trait RegsExt { impl RegsExt for Regs { fn tx_ptr(&self) -> *mut W { - #[cfg(not(any(spi_v3, spi_v4, spi_v5)))] + #[cfg(any(spi_v1, spi_f1))] let dr = self.dr(); + #[cfg(spi_v2)] + let dr = self.dr16(); #[cfg(any(spi_v3, spi_v4, spi_v5))] - let dr = self.txdr(); + let dr = self.txdr32(); dr.as_ptr() as *mut W } fn rx_ptr(&self) -> *mut W { - #[cfg(not(any(spi_v3, spi_v4, spi_v5)))] + #[cfg(any(spi_v1, spi_f1))] let dr = self.dr(); + #[cfg(spi_v2)] + let dr = self.dr16(); #[cfg(any(spi_v3, spi_v4, spi_v5))] - let dr = self.rxdr(); + let dr = self.rxdr32(); dr.as_ptr() as *mut W } } @@ -815,11 +819,14 @@ fn spin_until_rx_ready(regs: Regs) -> Result<(), Error> { fn flush_rx_fifo(regs: Regs) { #[cfg(not(any(spi_v3, spi_v4, spi_v5)))] while regs.sr().read().rxne() { + #[cfg(spi_v1)] let _ = regs.dr().read(); + #[cfg(spi_v2)] + let _ = regs.dr16().read(); } #[cfg(any(spi_v3, spi_v4, spi_v5))] while regs.sr().read().rxp() { - let _ = regs.rxdr().read(); + let _ = regs.rxdr32().read(); } } From d9426549c3cd485c3d8abbf629213e3c04f5018b Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Sat, 13 Apr 2024 02:55:15 +0200 Subject: [PATCH 122/581] stm32/flash: remove otp flash regions (removed in newer metapacs). --- embassy-stm32/build.rs | 2 -- embassy-stm32/src/flash/f4.rs | 5 +---- embassy-stm32/src/flash/h50.rs | 6 ++---- embassy-stm32/src/flash/mod.rs | 2 -- 4 files changed, 3 insertions(+), 12 deletions(-) diff --git a/embassy-stm32/build.rs b/embassy-stm32/build.rs index 38b6c480c..0f87dd8ac 100644 --- a/embassy-stm32/build.rs +++ b/embassy-stm32/build.rs @@ -272,8 +272,6 @@ fn main() { "Bank1" } else if region.name.starts_with("BANK_2") { "Bank2" - } else if region.name == "OTP" { - "Otp" } else { continue; } diff --git a/embassy-stm32/src/flash/f4.rs b/embassy-stm32/src/flash/f4.rs index 00e61f2d2..90f13ff29 100644 --- a/embassy-stm32/src/flash/f4.rs +++ b/embassy-stm32/src/flash/f4.rs @@ -16,7 +16,7 @@ mod alt_regions { use embassy_hal_internal::PeripheralRef; use stm32_metapac::FLASH_SIZE; - use crate::_generated::flash_regions::{OTPRegion, BANK1_REGION1, BANK1_REGION2, BANK1_REGION3, OTP_REGION}; + use crate::_generated::flash_regions::{BANK1_REGION1, BANK1_REGION2, BANK1_REGION3}; use crate::flash::{asynch, Async, Bank1Region1, Bank1Region2, Blocking, Error, Flash, FlashBank, FlashRegion}; use crate::peripherals::FLASH; @@ -62,7 +62,6 @@ mod alt_regions { pub bank2_region1: AltBank2Region1<'d, MODE>, pub bank2_region2: AltBank2Region2<'d, MODE>, pub bank2_region3: AltBank2Region3<'d, MODE>, - pub otp_region: OTPRegion<'d, MODE>, } impl<'d> Flash<'d> { @@ -79,7 +78,6 @@ mod alt_regions { bank2_region1: AltBank2Region1(&ALT_BANK2_REGION1, unsafe { p.clone_unchecked() }, PhantomData), bank2_region2: AltBank2Region2(&ALT_BANK2_REGION2, unsafe { p.clone_unchecked() }, PhantomData), bank2_region3: AltBank2Region3(&ALT_BANK2_REGION3, unsafe { p.clone_unchecked() }, PhantomData), - otp_region: OTPRegion(&OTP_REGION, unsafe { p.clone_unchecked() }, PhantomData), } } @@ -96,7 +94,6 @@ mod alt_regions { bank2_region1: AltBank2Region1(&ALT_BANK2_REGION1, unsafe { p.clone_unchecked() }, PhantomData), bank2_region2: AltBank2Region2(&ALT_BANK2_REGION2, unsafe { p.clone_unchecked() }, PhantomData), bank2_region3: AltBank2Region3(&ALT_BANK2_REGION3, unsafe { p.clone_unchecked() }, PhantomData), - otp_region: OTPRegion(&OTP_REGION, unsafe { p.clone_unchecked() }, PhantomData), } } } diff --git a/embassy-stm32/src/flash/h50.rs b/embassy-stm32/src/flash/h50.rs index db05bef5d..5b15be261 100644 --- a/embassy-stm32/src/flash/h50.rs +++ b/embassy-stm32/src/flash/h50.rs @@ -55,7 +55,6 @@ pub(crate) unsafe fn blocking_write(start_address: u32, buf: &[u8; WRITE_SIZE]) } pub(crate) unsafe fn blocking_erase_sector(sector: &FlashSector) -> Result<(), Error> { - assert!(sector.bank != FlashBank::Otp); assert!(sector.index_in_bank < 8); while busy() {} @@ -63,9 +62,8 @@ pub(crate) unsafe fn blocking_erase_sector(sector: &FlashSector) -> Result<(), E interrupt::free(|_| { pac::FLASH.nscr().modify(|w| { w.set_bksel(match sector.bank { - FlashBank::Bank1 => Bksel::B_0X0, - FlashBank::Bank2 => Bksel::B_0X1, - _ => unreachable!(), + FlashBank::Bank1 => Bksel::BANK1, + FlashBank::Bank2 => Bksel::BANK2, }); w.set_snb(sector.index_in_bank); w.set_ser(true); diff --git a/embassy-stm32/src/flash/mod.rs b/embassy-stm32/src/flash/mod.rs index 1d8031e82..9d7861816 100644 --- a/embassy-stm32/src/flash/mod.rs +++ b/embassy-stm32/src/flash/mod.rs @@ -89,8 +89,6 @@ pub enum FlashBank { Bank1 = 0, /// Bank 2 Bank2 = 1, - /// OTP region - Otp, } #[cfg_attr(any(flash_l0, flash_l1, flash_l4, flash_wl, flash_wb), path = "l.rs")] From 52bd24499c0e164fd3525a02514af50e3fc35424 Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Sat, 13 Apr 2024 03:30:30 +0200 Subject: [PATCH 123/581] stm32/adc: update g4 for new pac. --- embassy-stm32/src/adc/g4.rs | 304 ++++++++++++++++++++++++++++++++ embassy-stm32/src/adc/mod.rs | 29 ++- examples/stm32g4/src/bin/adc.rs | 2 +- 3 files changed, 332 insertions(+), 3 deletions(-) create mode 100644 embassy-stm32/src/adc/g4.rs diff --git a/embassy-stm32/src/adc/g4.rs b/embassy-stm32/src/adc/g4.rs new file mode 100644 index 000000000..f6741f019 --- /dev/null +++ b/embassy-stm32/src/adc/g4.rs @@ -0,0 +1,304 @@ +#[allow(unused)] +use pac::adc::vals::{Adcaldif, Difsel, Exten}; +use pac::adccommon::vals::Presc; + +use super::{blocking_delay_us, Adc, AdcPin, Instance, InternalChannel, Resolution, SampleTime}; +use crate::time::Hertz; +use crate::{pac, Peripheral}; + +/// Default VREF voltage used for sample conversion to millivolts. +pub const VREF_DEFAULT_MV: u32 = 3300; +/// VREF voltage used for factory calibration of VREFINTCAL register. +pub const VREF_CALIB_MV: u32 = 3300; + +/// Max single ADC operation clock frequency +#[cfg(stm32g4)] +const MAX_ADC_CLK_FREQ: Hertz = Hertz::mhz(60); +#[cfg(stm32h7)] +const MAX_ADC_CLK_FREQ: Hertz = Hertz::mhz(50); + +#[cfg(stm32g4)] +const VREF_CHANNEL: u8 = 18; +#[cfg(stm32g4)] +const TEMP_CHANNEL: u8 = 16; + +#[cfg(stm32h7)] +const VREF_CHANNEL: u8 = 19; +#[cfg(stm32h7)] +const TEMP_CHANNEL: u8 = 18; + +// TODO this should be 14 for H7a/b/35 +const VBAT_CHANNEL: u8 = 17; + +// NOTE: Vrefint/Temperature/Vbat are not available on all ADCs, this currently cannot be modeled with stm32-data, so these are available from the software on all ADCs +/// Internal voltage reference channel. +pub struct VrefInt; +impl InternalChannel for VrefInt {} +impl super::SealedInternalChannel for VrefInt { + fn channel(&self) -> u8 { + VREF_CHANNEL + } +} + +/// Internal temperature channel. +pub struct Temperature; +impl InternalChannel for Temperature {} +impl super::SealedInternalChannel for Temperature { + fn channel(&self) -> u8 { + TEMP_CHANNEL + } +} + +/// Internal battery voltage channel. +pub struct Vbat; +impl InternalChannel for Vbat {} +impl super::SealedInternalChannel for Vbat { + fn channel(&self) -> u8 { + VBAT_CHANNEL + } +} + +// NOTE (unused): The prescaler enum closely copies the hardware capabilities, +// but high prescaling doesn't make a lot of sense in the current implementation and is ommited. +#[allow(unused)] +enum Prescaler { + NotDivided, + DividedBy2, + DividedBy4, + DividedBy6, + DividedBy8, + DividedBy10, + DividedBy12, + DividedBy16, + DividedBy32, + DividedBy64, + DividedBy128, + DividedBy256, +} + +impl Prescaler { + fn from_ker_ck(frequency: Hertz) -> Self { + let raw_prescaler = frequency.0 / MAX_ADC_CLK_FREQ.0; + match raw_prescaler { + 0 => Self::NotDivided, + 1 => Self::DividedBy2, + 2..=3 => Self::DividedBy4, + 4..=5 => Self::DividedBy6, + 6..=7 => Self::DividedBy8, + 8..=9 => Self::DividedBy10, + 10..=11 => Self::DividedBy12, + _ => unimplemented!(), + } + } + + fn divisor(&self) -> u32 { + match self { + Prescaler::NotDivided => 1, + Prescaler::DividedBy2 => 2, + Prescaler::DividedBy4 => 4, + Prescaler::DividedBy6 => 6, + Prescaler::DividedBy8 => 8, + Prescaler::DividedBy10 => 10, + Prescaler::DividedBy12 => 12, + Prescaler::DividedBy16 => 16, + Prescaler::DividedBy32 => 32, + Prescaler::DividedBy64 => 64, + Prescaler::DividedBy128 => 128, + Prescaler::DividedBy256 => 256, + } + } + + fn presc(&self) -> Presc { + match self { + Prescaler::NotDivided => Presc::DIV1, + Prescaler::DividedBy2 => Presc::DIV2, + Prescaler::DividedBy4 => Presc::DIV4, + Prescaler::DividedBy6 => Presc::DIV6, + Prescaler::DividedBy8 => Presc::DIV8, + Prescaler::DividedBy10 => Presc::DIV10, + Prescaler::DividedBy12 => Presc::DIV12, + Prescaler::DividedBy16 => Presc::DIV16, + Prescaler::DividedBy32 => Presc::DIV32, + Prescaler::DividedBy64 => Presc::DIV64, + Prescaler::DividedBy128 => Presc::DIV128, + Prescaler::DividedBy256 => Presc::DIV256, + } + } +} + +impl<'d, T: Instance> Adc<'d, T> { + /// Create a new ADC driver. + pub fn new(adc: impl Peripheral

+ 'd) -> Self { + embassy_hal_internal::into_ref!(adc); + T::enable_and_reset(); + + let prescaler = Prescaler::from_ker_ck(T::frequency()); + + T::common_regs().ccr().modify(|w| w.set_presc(prescaler.presc())); + + let frequency = Hertz(T::frequency().0 / prescaler.divisor()); + info!("ADC frequency set to {} Hz", frequency.0); + + if frequency > MAX_ADC_CLK_FREQ { + panic!("Maximal allowed frequency for the ADC is {} MHz and it varies with different packages, refer to ST docs for more information.", MAX_ADC_CLK_FREQ.0 / 1_000_000 ); + } + + let mut s = Self { + adc, + sample_time: SampleTime::from_bits(0), + }; + s.power_up(); + s.configure_differential_inputs(); + + s.calibrate(); + blocking_delay_us(1); + + s.enable(); + s.configure(); + + s + } + + fn power_up(&mut self) { + T::regs().cr().modify(|reg| { + reg.set_deeppwd(false); + reg.set_advregen(true); + }); + + blocking_delay_us(10); + } + + fn configure_differential_inputs(&mut self) { + T::regs().difsel().modify(|w| { + for n in 0..20 { + w.set_difsel(n, Difsel::SINGLEENDED); + } + }); + } + + fn calibrate(&mut self) { + T::regs().cr().modify(|w| { + w.set_adcaldif(Adcaldif::SINGLEENDED); + }); + + T::regs().cr().modify(|w| w.set_adcal(true)); + + while T::regs().cr().read().adcal() {} + } + + fn enable(&mut self) { + T::regs().isr().write(|w| w.set_adrdy(true)); + T::regs().cr().modify(|w| w.set_aden(true)); + while !T::regs().isr().read().adrdy() {} + T::regs().isr().write(|w| w.set_adrdy(true)); + } + + fn configure(&mut self) { + // single conversion mode, software trigger + T::regs().cfgr().modify(|w| { + w.set_cont(false); + w.set_exten(Exten::DISABLED); + }); + } + + /// Enable reading the voltage reference internal channel. + pub fn enable_vrefint(&self) -> VrefInt { + T::common_regs().ccr().modify(|reg| { + reg.set_vrefen(true); + }); + + VrefInt {} + } + + /// Enable reading the temperature internal channel. + pub fn enable_temperature(&self) -> Temperature { + T::common_regs().ccr().modify(|reg| { + reg.set_vsenseen(true); + }); + + Temperature {} + } + + /// Enable reading the vbat internal channel. + pub fn enable_vbat(&self) -> Vbat { + T::common_regs().ccr().modify(|reg| { + reg.set_vbaten(true); + }); + + Vbat {} + } + + /// Set the ADC sample time. + pub fn set_sample_time(&mut self, sample_time: SampleTime) { + self.sample_time = sample_time; + } + + /// Set the ADC resolution. + pub fn set_resolution(&mut self, resolution: Resolution) { + T::regs().cfgr().modify(|reg| reg.set_res(resolution.into())); + } + + /// Perform a single conversion. + fn convert(&mut self) -> u16 { + T::regs().isr().modify(|reg| { + reg.set_eos(true); + reg.set_eoc(true); + }); + + // Start conversion + T::regs().cr().modify(|reg| { + reg.set_adstart(true); + }); + + while !T::regs().isr().read().eos() { + // spin + } + + T::regs().dr().read().0 as u16 + } + + /// Read an ADC pin. + pub fn read

(&mut self, pin: &mut P) -> u16 + where + P: AdcPin, + P: crate::gpio::Pin, + { + pin.set_as_analog(); + + self.read_channel(pin.channel()) + } + + /// Read an ADC internal channel. + pub fn read_internal(&mut self, channel: &mut impl InternalChannel) -> u16 { + self.read_channel(channel.channel()) + } + + fn read_channel(&mut self, channel: u8) -> u16 { + // Configure channel + Self::set_channel_sample_time(channel, self.sample_time); + + #[cfg(stm32h7)] + { + T::regs().cfgr2().modify(|w| w.set_lshift(0)); + T::regs() + .pcsel() + .write(|w| w.set_pcsel(channel as _, Pcsel::PRESELECTED)); + } + + T::regs().sqr1().write(|reg| { + reg.set_sq(0, channel); + reg.set_l(0); + }); + + self.convert() + } + + fn set_channel_sample_time(ch: u8, sample_time: SampleTime) { + let sample_time = sample_time.into(); + if ch <= 9 { + T::regs().smpr().modify(|reg| reg.set_smp(ch as _, sample_time)); + } else { + T::regs().smpr2().modify(|reg| reg.set_smp((ch - 10) as _, sample_time)); + } + } +} diff --git a/embassy-stm32/src/adc/mod.rs b/embassy-stm32/src/adc/mod.rs index 24dd7cc3c..12c5751bd 100644 --- a/embassy-stm32/src/adc/mod.rs +++ b/embassy-stm32/src/adc/mod.rs @@ -12,6 +12,7 @@ #[cfg_attr(adc_v2, path = "v2.rs")] #[cfg_attr(any(adc_v3, adc_g0, adc_h5), path = "v3.rs")] #[cfg_attr(adc_v4, path = "v4.rs")] +#[cfg_attr(adc_g4, path = "g4.rs")] mod _version; #[allow(unused)] @@ -79,13 +80,37 @@ pub(crate) fn blocking_delay_us(us: u32) { } /// ADC instance. -#[cfg(not(any(adc_f1, adc_v1, adc_l0, adc_v2, adc_v3, adc_v4, adc_f3, adc_f3_v1_1, adc_g0, adc_h5)))] +#[cfg(not(any( + adc_f1, + adc_v1, + adc_l0, + adc_v2, + adc_v3, + adc_v4, + adc_g4, + adc_f3, + adc_f3_v1_1, + adc_g0, + adc_h5 +)))] #[allow(private_bounds)] pub trait Instance: SealedInstance + crate::Peripheral

{ type Interrupt: crate::interrupt::typelevel::Interrupt; } /// ADC instance. -#[cfg(any(adc_f1, adc_v1, adc_l0, adc_v2, adc_v3, adc_v4, adc_f3, adc_f3_v1_1, adc_g0, adc_h5))] +#[cfg(any( + adc_f1, + adc_v1, + adc_l0, + adc_v2, + adc_v3, + adc_v4, + adc_g4, + adc_f3, + adc_f3_v1_1, + adc_g0, + adc_h5 +))] #[allow(private_bounds)] pub trait Instance: SealedInstance + crate::Peripheral

+ crate::rcc::RccPeripheral { type Interrupt: crate::interrupt::typelevel::Interrupt; diff --git a/examples/stm32g4/src/bin/adc.rs b/examples/stm32g4/src/bin/adc.rs index 68b54e406..3de38cbd6 100644 --- a/examples/stm32g4/src/bin/adc.rs +++ b/examples/stm32g4/src/bin/adc.rs @@ -29,7 +29,7 @@ async fn main(_spawner: Spawner) { info!("Hello World!"); let mut adc = Adc::new(p.ADC2); - adc.set_sample_time(SampleTime::CYCLES32_5); + adc.set_sample_time(SampleTime::CYCLES24_5); loop { let measured = adc.read(&mut p.PA7); From ec6ff217ca0f895898ecc8e2cf84d503f71c988c Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Sat, 13 Apr 2024 02:13:41 +0200 Subject: [PATCH 124/581] Add stm32u0 support. --- ci.sh | 3 ++ embassy-stm32/Cargo.toml | 38 +++++++++++++++++++++++-- embassy-stm32/src/exti.rs | 16 +++++------ embassy-stm32/src/rcc/l.rs | 28 +++++++++++++++--- embassy-stm32/src/rcc/mco.rs | 2 +- embassy-stm32/src/rcc/mod.rs | 2 +- examples/stm32u0/.cargo/config.toml | 9 ++++++ examples/stm32u0/Cargo.toml | 25 ++++++++++++++++ examples/stm32u0/build.rs | 5 ++++ examples/stm32u0/src/bin/blinky.rs | 26 +++++++++++++++++ examples/stm32u0/src/bin/button.rs | 24 ++++++++++++++++ examples/stm32u0/src/bin/button_exti.rs | 25 ++++++++++++++++ 12 files changed, 187 insertions(+), 16 deletions(-) create mode 100644 examples/stm32u0/.cargo/config.toml create mode 100644 examples/stm32u0/Cargo.toml create mode 100644 examples/stm32u0/build.rs create mode 100644 examples/stm32u0/src/bin/blinky.rs create mode 100644 examples/stm32u0/src/bin/button.rs create mode 100644 examples/stm32u0/src/bin/button_exti.rs diff --git a/ci.sh b/ci.sh index d17f4e13e..1393b9d47 100755 --- a/ci.sh +++ b/ci.sh @@ -149,6 +149,9 @@ cargo batch \ --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv8m.main-none-eabihf --features stm32h503rb,defmt,exti,time-driver-any,time \ --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv8m.main-none-eabihf --features stm32h562ag,defmt,exti,time-driver-any,time \ --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features stm32wb35ce,defmt,exti,time-driver-any,time \ + --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv6m-none-eabi --features stm32u031r8,defmt,exti,time-driver-any,time \ + --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv6m-none-eabi --features stm32u073mb,defmt,exti,time-driver-any,time \ + --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv6m-none-eabi --features stm32u083rc,defmt,exti,time-driver-any,time \ --- build --release --manifest-path cyw43/Cargo.toml --target thumbv6m-none-eabi --features ''\ --- build --release --manifest-path cyw43/Cargo.toml --target thumbv6m-none-eabi --features 'log' \ --- build --release --manifest-path cyw43/Cargo.toml --target thumbv6m-none-eabi --features 'defmt' \ diff --git a/embassy-stm32/Cargo.toml b/embassy-stm32/Cargo.toml index 93792ecf8..459d2e370 100644 --- a/embassy-stm32/Cargo.toml +++ b/embassy-stm32/Cargo.toml @@ -30,6 +30,7 @@ flavors = [ { regex_feature = "stm32l1.*", target = "thumbv7m-none-eabi" }, { regex_feature = "stm32l4.*", target = "thumbv7em-none-eabi" }, { regex_feature = "stm32l5.*", target = "thumbv8m.main-none-eabihf", features = ["low-power"] }, + { regex_feature = "stm32u0.*", target = "thumbv6m-none-eabi" }, { regex_feature = "stm32u5.*", target = "thumbv8m.main-none-eabihf" }, { regex_feature = "stm32wb.*", target = "thumbv7em-none-eabi" }, { regex_feature = "stm32wba.*", target = "thumbv8m.main-none-eabihf" }, @@ -70,7 +71,7 @@ rand_core = "0.6.3" sdio-host = "0.5.0" critical-section = "1.1" #stm32-metapac = { version = "15" } -stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-0c4baf478324e19741c7a9795ab0aa8217c3691c" } +stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-d674277b78ca7400ecfeeb1b5af4e460a65c1a61" } vcell = "0.1.3" nb = "1.0.0" @@ -96,7 +97,7 @@ proc-macro2 = "1.0.36" quote = "1.0.15" #stm32-metapac = { version = "15", default-features = false, features = ["metadata"]} -stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-0c4baf478324e19741c7a9795ab0aa8217c3691c", default-features = false, features = ["metadata"]} +stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-d674277b78ca7400ecfeeb1b5af4e460a65c1a61", default-features = false, features = ["metadata"]} [features] default = ["rt"] @@ -1419,6 +1420,38 @@ stm32l562qe = [ "stm32-metapac/stm32l562qe" ] stm32l562re = [ "stm32-metapac/stm32l562re" ] stm32l562ve = [ "stm32-metapac/stm32l562ve" ] stm32l562ze = [ "stm32-metapac/stm32l562ze" ] +stm32u031c6 = [ "stm32-metapac/stm32u031c6" ] +stm32u031c8 = [ "stm32-metapac/stm32u031c8" ] +stm32u031f4 = [ "stm32-metapac/stm32u031f4" ] +stm32u031f6 = [ "stm32-metapac/stm32u031f6" ] +stm32u031f8 = [ "stm32-metapac/stm32u031f8" ] +stm32u031g6 = [ "stm32-metapac/stm32u031g6" ] +stm32u031g8 = [ "stm32-metapac/stm32u031g8" ] +stm32u031k4 = [ "stm32-metapac/stm32u031k4" ] +stm32u031k6 = [ "stm32-metapac/stm32u031k6" ] +stm32u031k8 = [ "stm32-metapac/stm32u031k8" ] +stm32u031r6 = [ "stm32-metapac/stm32u031r6" ] +stm32u031r8 = [ "stm32-metapac/stm32u031r8" ] +stm32u073c8 = [ "stm32-metapac/stm32u073c8" ] +stm32u073cb = [ "stm32-metapac/stm32u073cb" ] +stm32u073cc = [ "stm32-metapac/stm32u073cc" ] +stm32u073h8 = [ "stm32-metapac/stm32u073h8" ] +stm32u073hb = [ "stm32-metapac/stm32u073hb" ] +stm32u073hc = [ "stm32-metapac/stm32u073hc" ] +stm32u073k8 = [ "stm32-metapac/stm32u073k8" ] +stm32u073kb = [ "stm32-metapac/stm32u073kb" ] +stm32u073kc = [ "stm32-metapac/stm32u073kc" ] +stm32u073m8 = [ "stm32-metapac/stm32u073m8" ] +stm32u073mb = [ "stm32-metapac/stm32u073mb" ] +stm32u073mc = [ "stm32-metapac/stm32u073mc" ] +stm32u073r8 = [ "stm32-metapac/stm32u073r8" ] +stm32u073rb = [ "stm32-metapac/stm32u073rb" ] +stm32u073rc = [ "stm32-metapac/stm32u073rc" ] +stm32u083cc = [ "stm32-metapac/stm32u083cc" ] +stm32u083hc = [ "stm32-metapac/stm32u083hc" ] +stm32u083kc = [ "stm32-metapac/stm32u083kc" ] +stm32u083mc = [ "stm32-metapac/stm32u083mc" ] +stm32u083rc = [ "stm32-metapac/stm32u083rc" ] stm32u535cb = [ "stm32-metapac/stm32u535cb" ] stm32u535cc = [ "stm32-metapac/stm32u535cc" ] stm32u535ce = [ "stm32-metapac/stm32u535ce" ] @@ -1474,6 +1507,7 @@ stm32u599vj = [ "stm32-metapac/stm32u599vj" ] stm32u599zi = [ "stm32-metapac/stm32u599zi" ] stm32u599zj = [ "stm32-metapac/stm32u599zj" ] stm32u5a5aj = [ "stm32-metapac/stm32u5a5aj" ] +stm32u5a5qi = [ "stm32-metapac/stm32u5a5qi" ] stm32u5a5qj = [ "stm32-metapac/stm32u5a5qj" ] stm32u5a5rj = [ "stm32-metapac/stm32u5a5rj" ] stm32u5a5vj = [ "stm32-metapac/stm32u5a5vj" ] diff --git a/embassy-stm32/src/exti.rs b/embassy-stm32/src/exti.rs index 8d5dae436..224d51b84 100644 --- a/embassy-stm32/src/exti.rs +++ b/embassy-stm32/src/exti.rs @@ -27,11 +27,11 @@ fn cpu_regs() -> pac::exti::Exti { EXTI } -#[cfg(not(any(exti_c0, exti_g0, exti_l5, gpio_v1, exti_u5, exti_h5, exti_h50)))] +#[cfg(not(any(exti_c0, exti_g0, exti_u0, exti_l5, gpio_v1, exti_u5, exti_h5, exti_h50)))] fn exticr_regs() -> pac::syscfg::Syscfg { pac::SYSCFG } -#[cfg(any(exti_c0, exti_g0, exti_l5, exti_u5, exti_h5, exti_h50))] +#[cfg(any(exti_c0, exti_g0, exti_u0, exti_l5, exti_u5, exti_h5, exti_h50))] fn exticr_regs() -> pac::exti::Exti { EXTI } @@ -44,9 +44,9 @@ unsafe fn on_irq() { #[cfg(feature = "low-power")] crate::low_power::on_wakeup_irq(); - #[cfg(not(any(exti_c0, exti_g0, exti_l5, exti_u5, exti_h5, exti_h50)))] + #[cfg(not(any(exti_c0, exti_g0, exti_u0, exti_l5, exti_u5, exti_h5, exti_h50)))] let bits = EXTI.pr(0).read().0; - #[cfg(any(exti_c0, exti_g0, exti_l5, exti_u5, exti_h5, exti_h50))] + #[cfg(any(exti_c0, exti_g0, exti_u0, exti_l5, exti_u5, exti_h5, exti_h50))] let bits = EXTI.rpr(0).read().0 | EXTI.fpr(0).read().0; // We don't handle or change any EXTI lines above 16. @@ -61,9 +61,9 @@ unsafe fn on_irq() { } // Clear pending - #[cfg(not(any(exti_c0, exti_g0, exti_l5, exti_u5, exti_h5, exti_h50)))] + #[cfg(not(any(exti_c0, exti_g0, exti_u0, exti_l5, exti_u5, exti_h5, exti_h50)))] EXTI.pr(0).write_value(Lines(bits)); - #[cfg(any(exti_c0, exti_g0, exti_l5, exti_u5, exti_h5, exti_h50))] + #[cfg(any(exti_c0, exti_g0, exti_u0, exti_l5, exti_u5, exti_h5, exti_h50))] { EXTI.rpr(0).write_value(Lines(bits)); EXTI.fpr(0).write_value(Lines(bits)); @@ -241,9 +241,9 @@ impl<'a> ExtiInputFuture<'a> { EXTI.ftsr(0).modify(|w| w.set_line(pin, falling)); // clear pending bit - #[cfg(not(any(exti_c0, exti_g0, exti_l5, exti_u5, exti_h5, exti_h50)))] + #[cfg(not(any(exti_c0, exti_g0, exti_u0, exti_l5, exti_u5, exti_h5, exti_h50)))] EXTI.pr(0).write(|w| w.set_line(pin, true)); - #[cfg(any(exti_c0, exti_g0, exti_l5, exti_u5, exti_h5, exti_h50))] + #[cfg(any(exti_c0, exti_g0, exti_u0, exti_l5, exti_u5, exti_h5, exti_h50))] { EXTI.rpr(0).write(|w| w.set_line(pin, true)); EXTI.fpr(0).write(|w| w.set_line(pin, true)); diff --git a/embassy-stm32/src/rcc/l.rs b/embassy-stm32/src/rcc/l.rs index 9079ddd41..d7235ac7f 100644 --- a/embassy-stm32/src/rcc/l.rs +++ b/embassy-stm32/src/rcc/l.rs @@ -49,6 +49,7 @@ pub struct Config { pub sys: Sysclk, pub ahb_pre: AHBPrescaler, pub apb1_pre: APBPrescaler, + #[cfg(not(stm32u0))] pub apb2_pre: APBPrescaler, #[cfg(any(stm32wl5x, stm32wb))] pub core2_ahb_pre: AHBPrescaler, @@ -75,6 +76,7 @@ impl Default for Config { sys: Sysclk::MSI, ahb_pre: AHBPrescaler::DIV1, apb1_pre: APBPrescaler::DIV1, + #[cfg(not(stm32u0))] apb2_pre: APBPrescaler::DIV1, #[cfg(any(stm32wl5x, stm32wb))] core2_ahb_pre: AHBPrescaler::DIV1, @@ -130,7 +132,7 @@ pub const WPAN_DEFAULT: Config = Config { }; fn msi_enable(range: MSIRange) { - #[cfg(any(stm32l4, stm32l5, stm32wb, stm32wl))] + #[cfg(any(stm32l4, stm32l5, stm32wb, stm32wl, stm32u0))] RCC.cr().modify(|w| { #[cfg(not(stm32wb))] w.set_msirgsel(crate::pac::rcc::vals::Msirgsel::CR); @@ -240,7 +242,7 @@ pub(crate) unsafe fn init(config: Config) { let pll_input = PllInput { hse, hsi, - #[cfg(any(stm32l4, stm32l5, stm32wb, stm32wl))] + #[cfg(any(stm32l4, stm32l5, stm32wb, stm32wl, stm32u0))] msi, }; let pll = init_pll(PllInstance::Pll, config.pll, &pll_input); @@ -254,6 +256,10 @@ pub(crate) unsafe fn init(config: Config) { Sysclk::HSI => hsi.unwrap(), Sysclk::MSI => msi.unwrap(), Sysclk::PLL1_R => pll.r.unwrap(), + #[cfg(stm32u0)] + Sysclk::LSI | Sysclk::LSE => todo!(), + #[cfg(stm32u0)] + Sysclk::_RESERVED_6 | Sysclk::_RESERVED_7 => unreachable!(), }; #[cfg(rcc_l4plus)] @@ -263,6 +269,7 @@ pub(crate) unsafe fn init(config: Config) { let hclk1 = sys_clk / config.ahb_pre; let (pclk1, pclk1_tim) = super::util::calc_pclk(hclk1, config.apb1_pre); + #[cfg(not(stm32u0))] let (pclk2, pclk2_tim) = super::util::calc_pclk(hclk1, config.apb2_pre); #[cfg(any(stm32l4, stm32l5, stm32wlex))] let hclk2 = hclk1; @@ -315,6 +322,13 @@ pub(crate) unsafe fn init(config: Config) { ..=64_000_000 => 3, _ => 4, }; + #[cfg(stm32u0)] + let latency = match hclk1.0 { + // VOS RANGE1, others TODO. + ..=24_000_000 => 0, + ..=48_000_000 => 1, + _ => 2, + }; #[cfg(stm32l1)] FLASH.acr().write(|w| w.set_acc64(true)); @@ -326,7 +340,11 @@ pub(crate) unsafe fn init(config: Config) { RCC.cfgr().modify(|w| { w.set_sw(config.sys); w.set_hpre(config.ahb_pre); + #[cfg(stm32u0)] + w.set_ppre(config.apb1_pre); + #[cfg(not(stm32u0))] w.set_ppre1(config.apb1_pre); + #[cfg(not(stm32u0))] w.set_ppre2(config.apb2_pre); }); while RCC.cfgr().read().sws() != config.sys {} @@ -353,8 +371,10 @@ pub(crate) unsafe fn init(config: Config) { #[cfg(any(stm32l4, stm32l5, stm32wb, stm32wl))] hclk3: Some(hclk3), pclk1: Some(pclk1), + #[cfg(not(stm32u0))] pclk2: Some(pclk2), pclk1_tim: Some(pclk1_tim), + #[cfg(not(stm32u0))] pclk2_tim: Some(pclk2_tim), #[cfg(stm32wl)] pclk3: Some(hclk3), @@ -408,7 +428,7 @@ fn msirange_to_hertz(range: MSIRange) -> Hertz { Hertz(32_768 * (1 << (range as u8 + 1))) } -#[cfg(any(stm32l4, stm32l5, stm32wb, stm32wl))] +#[cfg(any(stm32l4, stm32l5, stm32wb, stm32wl, stm32u0))] fn msirange_to_hertz(range: MSIRange) -> Hertz { match range { MSIRange::RANGE100K => Hertz(100_000), @@ -521,7 +541,7 @@ mod pll { } } -#[cfg(any(stm32l4, stm32l5, stm32wb, stm32wl))] +#[cfg(any(stm32l4, stm32l5, stm32wb, stm32wl, stm32u0))] mod pll { use super::{pll_enable, PllInstance}; pub use crate::pac::rcc::vals::{ diff --git a/embassy-stm32/src/rcc/mco.rs b/embassy-stm32/src/rcc/mco.rs index d8604e07e..4b22a099d 100644 --- a/embassy-stm32/src/rcc/mco.rs +++ b/embassy-stm32/src/rcc/mco.rs @@ -52,7 +52,7 @@ macro_rules! impl_peri { }; } -#[cfg(any(rcc_c0, rcc_g0))] +#[cfg(any(rcc_c0, rcc_g0, rcc_u0))] #[allow(unused_imports)] use self::{McoSource as Mco1Source, McoSource as Mco2Source}; diff --git a/embassy-stm32/src/rcc/mod.rs b/embassy-stm32/src/rcc/mod.rs index c328344aa..00f21ed68 100644 --- a/embassy-stm32/src/rcc/mod.rs +++ b/embassy-stm32/src/rcc/mod.rs @@ -25,7 +25,7 @@ pub use hsi48::*; #[cfg_attr(stm32g0, path = "g0.rs")] #[cfg_attr(stm32g4, path = "g4.rs")] #[cfg_attr(any(stm32h5, stm32h7), path = "h.rs")] -#[cfg_attr(any(stm32l0, stm32l1, stm32l4, stm32l5, stm32wb, stm32wl), path = "l.rs")] +#[cfg_attr(any(stm32l0, stm32l1, stm32l4, stm32l5, stm32wb, stm32wl, stm32u0), path = "l.rs")] #[cfg_attr(stm32u5, path = "u5.rs")] #[cfg_attr(stm32wba, path = "wba.rs")] mod _version; diff --git a/examples/stm32u0/.cargo/config.toml b/examples/stm32u0/.cargo/config.toml new file mode 100644 index 000000000..c8022ae39 --- /dev/null +++ b/examples/stm32u0/.cargo/config.toml @@ -0,0 +1,9 @@ +[target.'cfg(all(target_arch = "arm", target_os = "none"))'] +# replace STM32G071C8Rx with your chip as listed in `probe-rs chip list` +runner = "probe-rs run --speed 100 --chip STM32u083rctx" + +[build] +target = "thumbv6m-none-eabi" + +[env] +DEFMT_LOG = "trace" diff --git a/examples/stm32u0/Cargo.toml b/examples/stm32u0/Cargo.toml new file mode 100644 index 000000000..af3d7ff61 --- /dev/null +++ b/examples/stm32u0/Cargo.toml @@ -0,0 +1,25 @@ +[package] +edition = "2021" +name = "embassy-stm32u0-examples" +version = "0.1.0" +license = "MIT OR Apache-2.0" + +[dependencies] +# Change stm32c031c6 to your chip name, if necessary. +embassy-stm32 = { version = "0.1.0", path = "../../embassy-stm32", features = [ "defmt", "time-driver-any", "stm32u083rc", "memory-x", "unstable-pac", "exti"] } +embassy-sync = { version = "0.5.0", path = "../../embassy-sync", features = ["defmt"] } +embassy-executor = { version = "0.5.0", path = "../../embassy-executor", features = ["arch-cortex-m", "executor-thread", "defmt", "integrated-timers"] } +embassy-time = { version = "0.3.0", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime", "tick-hz-32_768"] } + +defmt = "0.3" +defmt-rtt = "0.4" + +cortex-m = { version = "0.7.6", features = ["critical-section-single-core"] } +cortex-m-rt = "0.7.0" +embedded-hal = "0.2.6" +panic-probe = { version = "0.3", features = ["print-defmt"] } +futures = { version = "0.3.17", default-features = false, features = ["async-await"] } +heapless = { version = "0.8", default-features = false } + +[profile.release] +debug = 2 diff --git a/examples/stm32u0/build.rs b/examples/stm32u0/build.rs new file mode 100644 index 000000000..8cd32d7ed --- /dev/null +++ b/examples/stm32u0/build.rs @@ -0,0 +1,5 @@ +fn main() { + println!("cargo:rustc-link-arg-bins=--nmagic"); + println!("cargo:rustc-link-arg-bins=-Tlink.x"); + println!("cargo:rustc-link-arg-bins=-Tdefmt.x"); +} diff --git a/examples/stm32u0/src/bin/blinky.rs b/examples/stm32u0/src/bin/blinky.rs new file mode 100644 index 000000000..90e479aae --- /dev/null +++ b/examples/stm32u0/src/bin/blinky.rs @@ -0,0 +1,26 @@ +#![no_std] +#![no_main] + +use defmt::*; +use embassy_executor::Spawner; +use embassy_stm32::gpio::{Level, Output, Speed}; +use embassy_time::Timer; +use {defmt_rtt as _, panic_probe as _}; + +#[embassy_executor::main] +async fn main(_spawner: Spawner) { + let p = embassy_stm32::init(Default::default()); + info!("Hello World!"); + + let mut led = Output::new(p.PA5, Level::High, Speed::Low); + + loop { + info!("high"); + led.set_high(); + Timer::after_millis(300).await; + + info!("low"); + led.set_low(); + Timer::after_millis(300).await; + } +} diff --git a/examples/stm32u0/src/bin/button.rs b/examples/stm32u0/src/bin/button.rs new file mode 100644 index 000000000..8017f0274 --- /dev/null +++ b/examples/stm32u0/src/bin/button.rs @@ -0,0 +1,24 @@ +#![no_std] +#![no_main] + +use cortex_m_rt::entry; +use defmt::*; +use embassy_stm32::gpio::{Input, Pull}; +use {defmt_rtt as _, panic_probe as _}; + +#[entry] +fn main() -> ! { + info!("Hello World!"); + + let p = embassy_stm32::init(Default::default()); + + let button = Input::new(p.PC13, Pull::Up); + + loop { + if button.is_high() { + info!("high"); + } else { + info!("low"); + } + } +} diff --git a/examples/stm32u0/src/bin/button_exti.rs b/examples/stm32u0/src/bin/button_exti.rs new file mode 100644 index 000000000..34a08bbc6 --- /dev/null +++ b/examples/stm32u0/src/bin/button_exti.rs @@ -0,0 +1,25 @@ +#![no_std] +#![no_main] + +use defmt::*; +use embassy_executor::Spawner; +use embassy_stm32::exti::ExtiInput; +use embassy_stm32::gpio::Pull; +use {defmt_rtt as _, panic_probe as _}; + +#[embassy_executor::main] +async fn main(_spawner: Spawner) { + let p = embassy_stm32::init(Default::default()); + info!("Hello World!"); + + let mut button = ExtiInput::new(p.PC13, p.EXTI13, Pull::Up); + + info!("Press the USER button..."); + + loop { + button.wait_for_falling_edge().await; + info!("Pressed!"); + button.wait_for_rising_edge().await; + info!("Released!"); + } +} From af03e1653a711e12566ee7cac2d018e94b1d267b Mon Sep 17 00:00:00 2001 From: Dion Dokter Date: Sat, 13 Apr 2024 14:07:01 +0200 Subject: [PATCH 125/581] Disable the speed limitation --- examples/stm32u0/.cargo/config.toml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/examples/stm32u0/.cargo/config.toml b/examples/stm32u0/.cargo/config.toml index c8022ae39..28b8af96e 100644 --- a/examples/stm32u0/.cargo/config.toml +++ b/examples/stm32u0/.cargo/config.toml @@ -1,6 +1,6 @@ [target.'cfg(all(target_arch = "arm", target_os = "none"))'] # replace STM32G071C8Rx with your chip as listed in `probe-rs chip list` -runner = "probe-rs run --speed 100 --chip STM32u083rctx" +runner = "probe-rs run --chip STM32u083rctx" [build] target = "thumbv6m-none-eabi" From 5f23e3905226551a001da9bf4051c6efb552f636 Mon Sep 17 00:00:00 2001 From: Dion Dokter Date: Sat, 13 Apr 2024 18:40:46 +0200 Subject: [PATCH 126/581] Add some examples. - usart works - dac works - rng gets stuck on while loop - usb_serial works, but cannot test due to lack of user usb port - adc needs work and does not work yet --- embassy-stm32/src/dac/tsel.rs | 17 ++++ embassy-stm32/src/usb/usb.rs | 14 ++-- examples/stm32u0/Cargo.toml | 3 + examples/stm32u0/src/bin/adc.rs | 33 ++++++++ examples/stm32u0/src/bin/dac.rs | 35 ++++++++ examples/stm32u0/src/bin/rng.rs | 41 ++++++++++ examples/stm32u0/src/bin/usart.rs | 31 +++++++ examples/stm32u0/src/bin/usb_serial.rs | 109 +++++++++++++++++++++++++ 8 files changed, 276 insertions(+), 7 deletions(-) create mode 100644 examples/stm32u0/src/bin/adc.rs create mode 100644 examples/stm32u0/src/bin/dac.rs create mode 100644 examples/stm32u0/src/bin/rng.rs create mode 100644 examples/stm32u0/src/bin/usart.rs create mode 100644 examples/stm32u0/src/bin/usb_serial.rs diff --git a/embassy-stm32/src/dac/tsel.rs b/embassy-stm32/src/dac/tsel.rs index 22d8d3dfa..1877954b9 100644 --- a/embassy-stm32/src/dac/tsel.rs +++ b/embassy-stm32/src/dac/tsel.rs @@ -235,6 +235,23 @@ pub enum TriggerSel { Exti9 = 13, } +/// Trigger selection for U0. +#[cfg(stm32u0)] +#[derive(Debug, Copy, Clone, Eq, PartialEq)] +#[cfg_attr(feature = "defmt", derive(defmt::Format))] +pub enum TriggerSel { + Software = 0, + Tim1 = 1, + Tim2 = 2, + Tim3 = 3, + Tim6 = 5, + Tim7 = 6, + Tim15 = 8, + Lptim1 = 11, + Lptim2 = 12, + Exti9 = 14, +} + /// Trigger selection for G4. #[cfg(stm32g4)] #[derive(Debug, Copy, Clone, Eq, PartialEq)] diff --git a/embassy-stm32/src/usb/usb.rs b/embassy-stm32/src/usb/usb.rs index f48808cb3..81a2d2623 100644 --- a/embassy-stm32/src/usb/usb.rs +++ b/embassy-stm32/src/usb/usb.rs @@ -107,14 +107,14 @@ const EP_COUNT: usize = 8; #[cfg(any(usbram_16x1_512, usbram_16x2_512))] const USBRAM_SIZE: usize = 512; -#[cfg(usbram_16x2_1024)] +#[cfg(any(usbram_16x2_1024, usbram_32_1024))] const USBRAM_SIZE: usize = 1024; #[cfg(usbram_32_2048)] const USBRAM_SIZE: usize = 2048; -#[cfg(not(usbram_32_2048))] +#[cfg(not(any(usbram_32_2048, usbram_32_1024)))] const USBRAM_ALIGN: usize = 2; -#[cfg(usbram_32_2048)] +#[cfg(any(usbram_32_2048, usbram_32_1024))] const USBRAM_ALIGN: usize = 4; const NEW_AW: AtomicWaker = AtomicWaker::new(); @@ -159,7 +159,7 @@ fn calc_out_len(len: u16) -> (u16, u16) { } } -#[cfg(not(usbram_32_2048))] +#[cfg(not(any(usbram_32_2048, usbram_32_1024)))] mod btable { use super::*; @@ -180,7 +180,7 @@ mod btable { USBRAM.mem(index * 4 + 3).read() } } -#[cfg(usbram_32_2048)] +#[cfg(any(usbram_32_2048, usbram_32_1024))] mod btable { use super::*; @@ -224,9 +224,9 @@ impl EndpointBuffer { let n = USBRAM_ALIGN.min(buf.len() - i * USBRAM_ALIGN); val[..n].copy_from_slice(&buf[i * USBRAM_ALIGN..][..n]); - #[cfg(not(usbram_32_2048))] + #[cfg(not(any(usbram_32_2048, usbram_32_1024)))] let val = u16::from_le_bytes(val); - #[cfg(usbram_32_2048)] + #[cfg(any(usbram_32_2048, usbram_32_1024))] let val = u32::from_le_bytes(val); USBRAM.mem(self.addr as usize / USBRAM_ALIGN + i).write_value(val); } diff --git a/examples/stm32u0/Cargo.toml b/examples/stm32u0/Cargo.toml index af3d7ff61..8219cb038 100644 --- a/examples/stm32u0/Cargo.toml +++ b/examples/stm32u0/Cargo.toml @@ -10,6 +10,7 @@ embassy-stm32 = { version = "0.1.0", path = "../../embassy-stm32", features = [ embassy-sync = { version = "0.5.0", path = "../../embassy-sync", features = ["defmt"] } embassy-executor = { version = "0.5.0", path = "../../embassy-executor", features = ["arch-cortex-m", "executor-thread", "defmt", "integrated-timers"] } embassy-time = { version = "0.3.0", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime", "tick-hz-32_768"] } +embassy-usb = { version = "0.1.0", path = "../../embassy-usb", default-features = false, features = ["defmt"] } defmt = "0.3" defmt-rtt = "0.4" @@ -21,5 +22,7 @@ panic-probe = { version = "0.3", features = ["print-defmt"] } futures = { version = "0.3.17", default-features = false, features = ["async-await"] } heapless = { version = "0.8", default-features = false } +micromath = "2.0.0" + [profile.release] debug = 2 diff --git a/examples/stm32u0/src/bin/adc.rs b/examples/stm32u0/src/bin/adc.rs new file mode 100644 index 000000000..f7145b85d --- /dev/null +++ b/examples/stm32u0/src/bin/adc.rs @@ -0,0 +1,33 @@ +#![no_std] +#![no_main] + +use defmt::*; +use embassy_stm32::adc::{Adc, Resolution}; +use embassy_stm32::Config; +use embassy_time::Duration; +use {defmt_rtt as _, panic_probe as _}; + +#[cortex_m_rt::entry] +fn main() -> ! { + info!("Hello World!"); + + let mut config = Config::default(); + { + use embassy_stm32::rcc::*; + config.rcc.mux.adcsel = mux::Adcsel::SYS; + } + let p = embassy_stm32::init(config); + + let mut adc = Adc::new(p.ADC1); + let mut temp = adc.enable_temperature(); + adc.set_resolution(Resolution::BITS8); + let mut channel = p.PC0; + + loop { + let v = adc.read(&mut channel); + info!("--> {}", v); + let v = adc.read(&mut temp); + info!("Temp: --> {}", v); + embassy_time::block_for(Duration::from_millis(1000)); + } +} diff --git a/examples/stm32u0/src/bin/dac.rs b/examples/stm32u0/src/bin/dac.rs new file mode 100644 index 000000000..fdbf1d374 --- /dev/null +++ b/examples/stm32u0/src/bin/dac.rs @@ -0,0 +1,35 @@ +#![no_std] +#![no_main] + +use defmt::*; +use embassy_stm32::dac::{DacCh1, Value}; +use embassy_stm32::dma::NoDma; +use {defmt_rtt as _, panic_probe as _}; + +#[cortex_m_rt::entry] +fn main() -> ! { + let p = embassy_stm32::init(Default::default()); + info!("Hello World!"); + + let mut dac = DacCh1::new(p.DAC1, NoDma, p.PA4); + + loop { + for v in 0..=255 { + dac.set(Value::Bit8(to_sine_wave(v))); + } + } +} + +use micromath::F32Ext; + +fn to_sine_wave(v: u8) -> u8 { + if v >= 128 { + // top half + let r = 3.14 * ((v - 128) as f32 / 128.0); + (r.sin() * 128.0 + 127.0) as u8 + } else { + // bottom half + let r = 3.14 + 3.14 * (v as f32 / 128.0); + (r.sin() * 128.0 + 127.0) as u8 + } +} diff --git a/examples/stm32u0/src/bin/rng.rs b/examples/stm32u0/src/bin/rng.rs new file mode 100644 index 000000000..9b4c2537e --- /dev/null +++ b/examples/stm32u0/src/bin/rng.rs @@ -0,0 +1,41 @@ +#![no_std] +#![no_main] + +use defmt::*; +use embassy_executor::Spawner; +use embassy_stm32::rng::Rng; +use embassy_stm32::{bind_interrupts, peripherals, rng, Config}; +use {defmt_rtt as _, panic_probe as _}; + +bind_interrupts!(struct Irqs { + RNG_CRYP => rng::InterruptHandler; +}); + +#[embassy_executor::main] +async fn main(_spawner: Spawner) { + let mut config = Config::default(); + { + use embassy_stm32::rcc::*; + config.rcc.hsi = true; + config.rcc.pll = Some(Pll { + source: PllSource::HSI, // 16 MHz + prediv: PllPreDiv::DIV1, + mul: PllMul::MUL7, // 16 * 7 = 112 MHz + divp: None, + divq: None, + divr: Some(PllRDiv::DIV2), // 112 / 2 = 56 MHz + }); + config.rcc.sys = Sysclk::PLL1_R; + } + + let p = embassy_stm32::init(config); + + info!("Hello World!"); + + let mut rng = Rng::new(p.RNG, Irqs); + info!("Hello World 2!"); + + let mut buf = [0u8; 16]; + unwrap!(rng.async_fill_bytes(&mut buf).await); + info!("random bytes: {:02x}", buf); +} diff --git a/examples/stm32u0/src/bin/usart.rs b/examples/stm32u0/src/bin/usart.rs new file mode 100644 index 000000000..1fcf0029a --- /dev/null +++ b/examples/stm32u0/src/bin/usart.rs @@ -0,0 +1,31 @@ +#![no_std] +#![no_main] + +use defmt::*; +use embassy_stm32::dma::NoDma; +use embassy_stm32::usart::{Config, Uart}; +use embassy_stm32::{bind_interrupts, peripherals, usart}; +use {defmt_rtt as _, panic_probe as _}; + +bind_interrupts!(struct Irqs { + USART2_LPUART2 => usart::InterruptHandler; +}); + +#[cortex_m_rt::entry] +fn main() -> ! { + info!("Hello World!"); + + let p = embassy_stm32::init(Default::default()); + + let config = Config::default(); + let mut usart = Uart::new(p.USART2, p.PA3, p.PA2, Irqs, NoDma, NoDma, config).unwrap(); + + unwrap!(usart.blocking_write(b"Hello Embassy World!\r\n")); + info!("wrote Hello, starting echo"); + + let mut buf = [0u8; 1]; + loop { + unwrap!(usart.blocking_read(&mut buf)); + unwrap!(usart.blocking_write(&buf)); + } +} diff --git a/examples/stm32u0/src/bin/usb_serial.rs b/examples/stm32u0/src/bin/usb_serial.rs new file mode 100644 index 000000000..9b38fd5dc --- /dev/null +++ b/examples/stm32u0/src/bin/usb_serial.rs @@ -0,0 +1,109 @@ +#![no_std] +#![no_main] + +use defmt::{panic, *}; +use defmt_rtt as _; // global logger +use embassy_executor::Spawner; +use embassy_stm32::usb::{Driver, Instance}; +use embassy_stm32::{bind_interrupts, peripherals, usb, Config}; +use embassy_usb::class::cdc_acm::{CdcAcmClass, State}; +use embassy_usb::driver::EndpointError; +use embassy_usb::Builder; +use futures::future::join; +use panic_probe as _; + +bind_interrupts!(struct Irqs { + USB_DRD_FS => usb::InterruptHandler; +}); + +#[embassy_executor::main] +async fn main(_spawner: Spawner) { + let mut config = Config::default(); + { + use embassy_stm32::rcc::*; + config.rcc.hsi = true; + config.rcc.pll = Some(Pll { + source: PllSource::HSI, // 16 MHz + prediv: PllPreDiv::DIV1, + mul: PllMul::MUL7, + divp: None, + divq: None, + divr: Some(PllRDiv::DIV2), // 56 MHz + }); + config.rcc.sys = Sysclk::PLL1_R; + config.rcc.hsi48 = Some(Hsi48Config { sync_from_usb: true }); // needed for USB + config.rcc.mux.clk48sel = mux::Clk48sel::HSI48; // USB uses ICLK + } + + let p = embassy_stm32::init(config); + + info!("Hello World!"); + + // Create the driver, from the HAL. + let driver = Driver::new(p.USB, Irqs, p.PA12, p.PA11); + + // Create embassy-usb Config + let config = embassy_usb::Config::new(0xc0de, 0xcafe); + //config.max_packet_size_0 = 64; + + // Create embassy-usb DeviceBuilder using the driver and config. + // It needs some buffers for building the descriptors. + let mut config_descriptor = [0; 256]; + let mut bos_descriptor = [0; 256]; + let mut control_buf = [0; 7]; + + let mut state = State::new(); + + let mut builder = Builder::new( + driver, + config, + &mut config_descriptor, + &mut bos_descriptor, + &mut [], // no msos descriptors + &mut control_buf, + ); + + // Create classes on the builder. + let mut class = CdcAcmClass::new(&mut builder, &mut state, 64); + + // Build the builder. + let mut usb = builder.build(); + + // Run the USB device. + let usb_fut = usb.run(); + + // Do stuff with the class! + let echo_fut = async { + loop { + class.wait_connection().await; + info!("Connected"); + let _ = echo(&mut class).await; + info!("Disconnected"); + } + }; + + // Run everything concurrently. + // If we had made everything `'static` above instead, we could do this using separate tasks instead. + join(usb_fut, echo_fut).await; +} + +struct Disconnected {} + +impl From for Disconnected { + fn from(val: EndpointError) -> Self { + match val { + EndpointError::BufferOverflow => panic!("Buffer overflow"), + EndpointError::Disabled => Disconnected {}, + } + } +} + +async fn echo<'d, T: Instance + 'd>(class: &mut CdcAcmClass<'d, Driver<'d, T>>) -> Result<(), Disconnected> { + let mut buf = [0; 64]; + loop { + let n = class.read_packet(&mut buf).await?; + let data = &buf[..n]; + info!("data: {:x}", data); + class.write_packet(data).await?; + } +} From b659e3d529e427cfc2fb38f514825b60eded784f Mon Sep 17 00:00:00 2001 From: Dion Dokter Date: Sun, 14 Apr 2024 00:04:13 +0200 Subject: [PATCH 127/581] Add ADC --- embassy-stm32/src/adc/mod.rs | 4 +++- embassy-stm32/src/adc/v3.rs | 40 ++++++++++++++++++++++++--------- examples/stm32u0/src/bin/adc.rs | 4 +--- 3 files changed, 33 insertions(+), 15 deletions(-) diff --git a/embassy-stm32/src/adc/mod.rs b/embassy-stm32/src/adc/mod.rs index 12c5751bd..1ab2bc5c4 100644 --- a/embassy-stm32/src/adc/mod.rs +++ b/embassy-stm32/src/adc/mod.rs @@ -10,7 +10,7 @@ #[cfg_attr(adc_v1, path = "v1.rs")] #[cfg_attr(adc_l0, path = "v1.rs")] #[cfg_attr(adc_v2, path = "v2.rs")] -#[cfg_attr(any(adc_v3, adc_g0, adc_h5), path = "v3.rs")] +#[cfg_attr(any(adc_v3, adc_g0, adc_h5, adc_u0), path = "v3.rs")] #[cfg_attr(adc_v4, path = "v4.rs")] #[cfg_attr(adc_g4, path = "g4.rs")] mod _version; @@ -91,6 +91,7 @@ pub(crate) fn blocking_delay_us(us: u32) { adc_f3, adc_f3_v1_1, adc_g0, + adc_u0, adc_h5 )))] #[allow(private_bounds)] @@ -109,6 +110,7 @@ pub trait Instance: SealedInstance + crate::Peripheral

{ adc_f3, adc_f3_v1_1, adc_g0, + adc_u0, adc_h5 ))] #[allow(private_bounds)] diff --git a/embassy-stm32/src/adc/v3.rs b/embassy-stm32/src/adc/v3.rs index 4fd8558ba..dc418297e 100644 --- a/embassy-stm32/src/adc/v3.rs +++ b/embassy-stm32/src/adc/v3.rs @@ -19,6 +19,8 @@ impl super::SealedAdcPin for VrefInt { let val = 13; } else if #[cfg(adc_h5)] { let val = 17; + } else if #[cfg(adc_u0)] { + let val = 12; } else { let val = 0; } @@ -36,6 +38,8 @@ impl super::SealedAdcPin for Temperature { let val = 12; } else if #[cfg(adc_h5)] { let val = 16; + } else if #[cfg(adc_u0)] { + let val = 11; } else { let val = 17; } @@ -53,6 +57,8 @@ impl super::SealedAdcPin for Vbat { let val = 14; } else if #[cfg(adc_h5)] { let val = 2; + } else if #[cfg(adc_h5)] { + let val = 13; } else { let val = 18; } @@ -73,17 +79,29 @@ cfg_if! { } } +cfg_if! { + if #[cfg(adc_u0)] { + pub struct DacOut; + impl AdcPin for DacOut {} + impl super::SealedAdcPin for DacOut { + fn channel(&self) -> u8 { + 19 + } + } + } +} + impl<'d, T: Instance> Adc<'d, T> { pub fn new(adc: impl Peripheral

+ 'd) -> Self { into_ref!(adc); T::enable_and_reset(); T::regs().cr().modify(|reg| { - #[cfg(not(adc_g0))] + #[cfg(not(any(adc_g0, adc_u0)))] reg.set_deeppwd(false); reg.set_advregen(true); }); - #[cfg(adc_g0)] + #[cfg(any(adc_g0, adc_u0))] T::regs().cfgr1().modify(|reg| { reg.set_chselrmod(false); }); @@ -107,11 +125,11 @@ impl<'d, T: Instance> Adc<'d, T> { } pub fn enable_vrefint(&self) -> VrefInt { - #[cfg(not(adc_g0))] + #[cfg(not(any(adc_g0, adc_u0)))] T::common_regs().ccr().modify(|reg| { reg.set_vrefen(true); }); - #[cfg(adc_g0)] + #[cfg(any(adc_g0, adc_u0))] T::regs().ccr().modify(|reg| { reg.set_vrefen(true); }); @@ -125,7 +143,7 @@ impl<'d, T: Instance> Adc<'d, T> { pub fn enable_temperature(&self) -> Temperature { cfg_if! { - if #[cfg(adc_g0)] { + if #[cfg(any(adc_g0, adc_u0))] { T::regs().ccr().modify(|reg| { reg.set_tsen(true); }); @@ -145,7 +163,7 @@ impl<'d, T: Instance> Adc<'d, T> { pub fn enable_vbat(&self) -> Vbat { cfg_if! { - if #[cfg(adc_g0)] { + if #[cfg(any(adc_g0, adc_u0))] { T::regs().ccr().modify(|reg| { reg.set_vbaten(true); }); @@ -168,9 +186,9 @@ impl<'d, T: Instance> Adc<'d, T> { } pub fn set_resolution(&mut self, resolution: Resolution) { - #[cfg(not(adc_g0))] + #[cfg(not(any(adc_g0, adc_u0)))] T::regs().cfgr().modify(|reg| reg.set_res(resolution.into())); - #[cfg(adc_g0)] + #[cfg(any(adc_g0, adc_u0))] T::regs().cfgr1().modify(|reg| reg.set_res(resolution.into())); } @@ -231,9 +249,9 @@ impl<'d, T: Instance> Adc<'d, T> { Self::set_channel_sample_time(pin.channel(), self.sample_time); // Select channel - #[cfg(not(adc_g0))] + #[cfg(not(any(adc_g0, adc_u0)))] T::regs().sqr1().write(|reg| reg.set_sq(0, pin.channel())); - #[cfg(adc_g0)] + #[cfg(any(adc_g0, adc_u0))] T::regs().chselr().write(|reg| reg.set_chsel(1 << pin.channel())); // Some models are affected by an erratum: @@ -261,7 +279,7 @@ impl<'d, T: Instance> Adc<'d, T> { fn set_channel_sample_time(_ch: u8, sample_time: SampleTime) { cfg_if! { - if #[cfg(adc_g0)] { + if #[cfg(any(adc_g0, adc_u0))] { T::regs().smpr().modify(|reg| reg.set_smp1(sample_time.into())); } else if #[cfg(adc_h5)] { match _ch { diff --git a/examples/stm32u0/src/bin/adc.rs b/examples/stm32u0/src/bin/adc.rs index f7145b85d..c63c4a428 100644 --- a/examples/stm32u0/src/bin/adc.rs +++ b/examples/stm32u0/src/bin/adc.rs @@ -26,8 +26,6 @@ fn main() -> ! { loop { let v = adc.read(&mut channel); info!("--> {}", v); - let v = adc.read(&mut temp); - info!("Temp: --> {}", v); - embassy_time::block_for(Duration::from_millis(1000)); + embassy_time::block_for(Duration::from_millis(200)); } } From 0a785585bcc268ca1eb5341b1bcc54113cf96298 Mon Sep 17 00:00:00 2001 From: Dion Dokter Date: Sun, 14 Apr 2024 00:08:06 +0200 Subject: [PATCH 128/581] Remove temp variable --- examples/stm32u0/src/bin/adc.rs | 1 - 1 file changed, 1 deletion(-) diff --git a/examples/stm32u0/src/bin/adc.rs b/examples/stm32u0/src/bin/adc.rs index c63c4a428..4410448f1 100644 --- a/examples/stm32u0/src/bin/adc.rs +++ b/examples/stm32u0/src/bin/adc.rs @@ -19,7 +19,6 @@ fn main() -> ! { let p = embassy_stm32::init(config); let mut adc = Adc::new(p.ADC1); - let mut temp = adc.enable_temperature(); adc.set_resolution(Resolution::BITS8); let mut channel = p.PC0; From ca84be80bcbfb4459212fa02e75cfafc85d6df51 Mon Sep 17 00:00:00 2001 From: Dion Dokter Date: Sun, 14 Apr 2024 00:45:53 +0200 Subject: [PATCH 129/581] Add wdt and flash --- embassy-stm32/src/flash/mod.rs | 3 +- embassy-stm32/src/flash/u0.rs | 96 +++++++++++++++++++++++++++++++ examples/stm32u0/src/bin/flash.rs | 43 ++++++++++++++ examples/stm32u0/src/bin/wdt.rs | 41 +++++++++++++ 4 files changed, 182 insertions(+), 1 deletion(-) create mode 100644 embassy-stm32/src/flash/u0.rs create mode 100644 examples/stm32u0/src/bin/flash.rs create mode 100644 examples/stm32u0/src/bin/wdt.rs diff --git a/embassy-stm32/src/flash/mod.rs b/embassy-stm32/src/flash/mod.rs index 9d7861816..8c6ca2471 100644 --- a/embassy-stm32/src/flash/mod.rs +++ b/embassy-stm32/src/flash/mod.rs @@ -101,10 +101,11 @@ pub enum FlashBank { #[cfg_attr(flash_h7ab, path = "h7.rs")] #[cfg_attr(flash_u5, path = "u5.rs")] #[cfg_attr(flash_h50, path = "h50.rs")] +#[cfg_attr(flash_u0, path = "u0.rs")] #[cfg_attr( not(any( flash_l0, flash_l1, flash_l4, flash_wl, flash_wb, flash_f0, flash_f1, flash_f3, flash_f4, flash_f7, flash_g0, - flash_g4, flash_h7, flash_h7ab, flash_u5, flash_h50 + flash_g4, flash_h7, flash_h7ab, flash_u5, flash_h50, flash_u0 )), path = "other.rs" )] diff --git a/embassy-stm32/src/flash/u0.rs b/embassy-stm32/src/flash/u0.rs new file mode 100644 index 000000000..dfc5a2f76 --- /dev/null +++ b/embassy-stm32/src/flash/u0.rs @@ -0,0 +1,96 @@ +use core::ptr::write_volatile; +use core::sync::atomic::{fence, Ordering}; + +use cortex_m::interrupt; + +use super::{FlashRegion, FlashSector, FLASH_REGIONS, WRITE_SIZE}; +use crate::flash::Error; +use crate::pac; + +pub(crate) const fn is_default_layout() -> bool { + true +} + +pub(crate) const fn get_flash_regions() -> &'static [&'static FlashRegion] { + &FLASH_REGIONS +} + +pub(crate) unsafe fn lock() { + pac::FLASH.cr().modify(|w| w.set_lock(true)); +} +pub(crate) unsafe fn unlock() { + // Wait, while the memory interface is busy. + while pac::FLASH.sr().read().bsy1() {} + + // Unlock flash + if pac::FLASH.cr().read().lock() { + pac::FLASH.keyr().write(|w| w.set_key(0x4567_0123)); + pac::FLASH.keyr().write(|w| w.set_key(0xCDEF_89AB)); + } +} + +pub(crate) unsafe fn enable_blocking_write() { + assert_eq!(0, WRITE_SIZE % 4); + pac::FLASH.cr().write(|w| w.set_pg(true)); +} + +pub(crate) unsafe fn disable_blocking_write() { + pac::FLASH.cr().write(|w| w.set_pg(false)); +} + +pub(crate) unsafe fn blocking_write(start_address: u32, buf: &[u8; WRITE_SIZE]) -> Result<(), Error> { + let mut address = start_address; + for val in buf.chunks(4) { + write_volatile(address as *mut u32, u32::from_le_bytes(val.try_into().unwrap())); + address += val.len() as u32; + + // prevents parallelism errors + fence(Ordering::SeqCst); + } + + wait_ready_blocking() +} + +pub(crate) unsafe fn blocking_erase_sector(sector: &FlashSector) -> Result<(), Error> { + let idx = (sector.start - super::FLASH_BASE as u32) / super::BANK1_REGION.erase_size as u32; + while pac::FLASH.sr().read().bsy1() {} + clear_all_err(); + + interrupt::free(|_| { + pac::FLASH.cr().modify(|w| { + w.set_per(true); + w.set_pnb(idx as u8); + w.set_strt(true); + }); + }); + + let ret: Result<(), Error> = wait_ready_blocking(); + pac::FLASH.cr().modify(|w| w.set_per(false)); + ret +} + +pub(crate) unsafe fn wait_ready_blocking() -> Result<(), Error> { + while pac::FLASH.sr().read().bsy1() {} + + let sr = pac::FLASH.sr().read(); + + if sr.progerr() { + return Err(Error::Prog); + } + + if sr.wrperr() { + return Err(Error::Protected); + } + + if sr.pgaerr() { + return Err(Error::Unaligned); + } + + Ok(()) +} + +pub(crate) unsafe fn clear_all_err() { + // read and write back the same value. + // This clears all "write 1 to clear" bits. + pac::FLASH.sr().modify(|_| {}); +} diff --git a/examples/stm32u0/src/bin/flash.rs b/examples/stm32u0/src/bin/flash.rs new file mode 100644 index 000000000..01b80a76b --- /dev/null +++ b/examples/stm32u0/src/bin/flash.rs @@ -0,0 +1,43 @@ +#![no_std] +#![no_main] + +use defmt::*; +use embassy_executor::Spawner; +use embassy_stm32::flash::Flash; +use {defmt_rtt as _, panic_probe as _}; + +#[embassy_executor::main] +async fn main(_spawner: Spawner) { + let p = embassy_stm32::init(Default::default()); + info!("Hello World!"); + + let addr: u32 = 0x40000 - 2 * 1024; + + let mut f = Flash::new_blocking(p.FLASH).into_blocking_regions().bank1_region; + + info!("Reading..."); + let mut buf = [0u8; 32]; + unwrap!(f.blocking_read(addr, &mut buf)); + info!("Read: {=[u8]:x}", buf); + info!("Erasing..."); + unwrap!(f.blocking_erase(addr, addr + 2 * 1024)); + + info!("Reading..."); + let mut buf = [0u8; 32]; + unwrap!(f.blocking_read(addr, &mut buf)); + info!("Read after erase: {=[u8]:x}", buf); + + info!("Writing..."); + unwrap!(f.blocking_write( + addr, + &[ + 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, + 30, 31, 32 + ] + )); + + info!("Reading..."); + let mut buf = [0u8; 32]; + unwrap!(f.blocking_read(addr, &mut buf)); + info!("Read: {=[u8]:x}", buf); +} diff --git a/examples/stm32u0/src/bin/wdt.rs b/examples/stm32u0/src/bin/wdt.rs new file mode 100644 index 000000000..f6276e2e9 --- /dev/null +++ b/examples/stm32u0/src/bin/wdt.rs @@ -0,0 +1,41 @@ +#![no_std] +#![no_main] + +use defmt::*; +use embassy_executor::Spawner; +use embassy_stm32::gpio::{Level, Output, Speed}; +use embassy_stm32::wdg::IndependentWatchdog; +use embassy_time::Timer; +use {defmt_rtt as _, panic_probe as _}; + +#[embassy_executor::main] +async fn main(_spawner: Spawner) { + let p = embassy_stm32::init(Default::default()); + info!("Hello World!"); + + let mut led = Output::new(p.PA5, Level::High, Speed::Low); + + let mut wdt = IndependentWatchdog::new(p.IWDG, 1_000_000); + wdt.unleash(); + + let mut i = 0; + + loop { + info!("high"); + led.set_high(); + Timer::after_millis(300).await; + + info!("low"); + led.set_low(); + Timer::after_millis(300).await; + + // Pet watchdog for 5 iterations and then stop. + // MCU should restart in 1 second after the last pet. + if i < 5 { + info!("Petting watchdog"); + wdt.pet(); + } + + i += 1; + } +} From e224e6cef4e0508f14bb9ffd1d9d0fc9220c07d8 Mon Sep 17 00:00:00 2001 From: Dion Dokter Date: Sun, 14 Apr 2024 01:10:20 +0200 Subject: [PATCH 130/581] Add CRC --- embassy-stm32/src/crc/v2v3.rs | 2 ++ examples/stm32u0/src/bin/crc.rs | 31 +++++++++++++++++++++++++++++++ 2 files changed, 33 insertions(+) create mode 100644 examples/stm32u0/src/bin/crc.rs diff --git a/embassy-stm32/src/crc/v2v3.rs b/embassy-stm32/src/crc/v2v3.rs index 13fb6778c..ad7c79f12 100644 --- a/embassy-stm32/src/crc/v2v3.rs +++ b/embassy-stm32/src/crc/v2v3.rs @@ -13,6 +13,8 @@ pub struct Crc<'d> { } /// CRC configuration errlr +#[derive(Debug)] +#[cfg_attr(feature = "defmt", derive(defmt::Format))] pub enum ConfigError { /// The selected polynomial is invalid. InvalidPolynomial, diff --git a/examples/stm32u0/src/bin/crc.rs b/examples/stm32u0/src/bin/crc.rs new file mode 100644 index 000000000..d1b545d5b --- /dev/null +++ b/examples/stm32u0/src/bin/crc.rs @@ -0,0 +1,31 @@ +#![no_std] +#![no_main] + +use defmt::*; +use embassy_executor::Spawner; +use embassy_stm32::crc::{Config, Crc, InputReverseConfig, PolySize}; +use {defmt_rtt as _, panic_probe as _}; + +#[embassy_executor::main] +async fn main(_spawner: Spawner) { + let p = embassy_stm32::init(Default::default()); + info!("Hello World!"); + + // Setup for: https://crccalc.com/?crc=Life, it never dieWomen are my favorite guy&method=crc32&datatype=ascii&outtype=0 + let mut crc = Crc::new( + p.CRC, + unwrap!(Config::new( + InputReverseConfig::Byte, + true, + PolySize::Width32, + 0xFFFFFFFF, + 0x04C11DB7 + )), + ); + + let output = crc.feed_bytes(b"Life, it never die\nWomen are my favorite guy") ^ 0xFFFFFFFF; + + defmt::assert_eq!(output, 0x33F0E26B); + + cortex_m::asm::bkpt(); +} From ffc61f78b0226b1898eb7aca66a759b76e0407af Mon Sep 17 00:00:00 2001 From: Michael Zill Date: Tue, 9 Apr 2024 06:56:15 +0200 Subject: [PATCH 131/581] stm32/spi,crc: update for new PAC --- embassy-stm32/Cargo.toml | 4 ++-- embassy-stm32/src/crc/v1.rs | 12 ++++++++++++ embassy-stm32/src/crc/v2v3.rs | 16 ++++++++-------- embassy-stm32/src/spi/mod.rs | 17 ++++++++++++----- 4 files changed, 34 insertions(+), 15 deletions(-) diff --git a/embassy-stm32/Cargo.toml b/embassy-stm32/Cargo.toml index 89b24f0eb..93792ecf8 100644 --- a/embassy-stm32/Cargo.toml +++ b/embassy-stm32/Cargo.toml @@ -70,7 +70,7 @@ rand_core = "0.6.3" sdio-host = "0.5.0" critical-section = "1.1" #stm32-metapac = { version = "15" } -stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-2b7ec569a5510c324693f0515ac8ea20b12917a9" } +stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-0c4baf478324e19741c7a9795ab0aa8217c3691c" } vcell = "0.1.3" nb = "1.0.0" @@ -96,7 +96,7 @@ proc-macro2 = "1.0.36" quote = "1.0.15" #stm32-metapac = { version = "15", default-features = false, features = ["metadata"]} -stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-2b7ec569a5510c324693f0515ac8ea20b12917a9", default-features = false, features = ["metadata"]} +stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-0c4baf478324e19741c7a9795ab0aa8217c3691c", default-features = false, features = ["metadata"]} [features] default = ["rt"] diff --git a/embassy-stm32/src/crc/v1.rs b/embassy-stm32/src/crc/v1.rs index f8909d438..e8e0270af 100644 --- a/embassy-stm32/src/crc/v1.rs +++ b/embassy-stm32/src/crc/v1.rs @@ -32,6 +32,9 @@ impl<'d> Crc<'d> { /// Feeds a word to the peripheral and returns the current CRC value pub fn feed_word(&mut self, word: u32) -> u32 { // write a single byte to the device, and return the result + #[cfg(not(crc_v1))] + PAC_CRC.dr32().write_value(word); + #[cfg(crc_v1)] PAC_CRC.dr().write_value(word); self.read() } @@ -39,6 +42,9 @@ impl<'d> Crc<'d> { /// Feed a slice of words to the peripheral and return the result. pub fn feed_words(&mut self, words: &[u32]) -> u32 { for word in words { + #[cfg(not(crc_v1))] + PAC_CRC.dr32().write_value(*word); + #[cfg(crc_v1)] PAC_CRC.dr().write_value(*word); } @@ -46,6 +52,12 @@ impl<'d> Crc<'d> { } /// Read the CRC result value. + #[cfg(not(crc_v1))] + pub fn read(&self) -> u32 { + PAC_CRC.dr32().read() + } + /// Read the CRC result value. + #[cfg(crc_v1)] pub fn read(&self) -> u32 { PAC_CRC.dr().read() } diff --git a/embassy-stm32/src/crc/v2v3.rs b/embassy-stm32/src/crc/v2v3.rs index 46f5ea1be..13fb6778c 100644 --- a/embassy-stm32/src/crc/v2v3.rs +++ b/embassy-stm32/src/crc/v2v3.rs @@ -136,7 +136,7 @@ impl<'d> Crc<'d> { /// Feeds a byte into the CRC peripheral. Returns the computed checksum. pub fn feed_byte(&mut self, byte: u8) -> u32 { PAC_CRC.dr8().write_value(byte); - PAC_CRC.dr().read() + PAC_CRC.dr32().read() } /// Feeds an slice of bytes into the CRC peripheral. Returns the computed checksum. @@ -144,30 +144,30 @@ impl<'d> Crc<'d> { for byte in bytes { PAC_CRC.dr8().write_value(*byte); } - PAC_CRC.dr().read() + PAC_CRC.dr32().read() } /// Feeds a halfword into the CRC peripheral. Returns the computed checksum. pub fn feed_halfword(&mut self, halfword: u16) -> u32 { PAC_CRC.dr16().write_value(halfword); - PAC_CRC.dr().read() + PAC_CRC.dr32().read() } /// Feeds an slice of halfwords into the CRC peripheral. Returns the computed checksum. pub fn feed_halfwords(&mut self, halfwords: &[u16]) -> u32 { for halfword in halfwords { PAC_CRC.dr16().write_value(*halfword); } - PAC_CRC.dr().read() + PAC_CRC.dr32().read() } /// Feeds a words into the CRC peripheral. Returns the computed checksum. pub fn feed_word(&mut self, word: u32) -> u32 { - PAC_CRC.dr().write_value(word as u32); - PAC_CRC.dr().read() + PAC_CRC.dr32().write_value(word as u32); + PAC_CRC.dr32().read() } /// Feeds an slice of words into the CRC peripheral. Returns the computed checksum. pub fn feed_words(&mut self, words: &[u32]) -> u32 { for word in words { - PAC_CRC.dr().write_value(*word as u32); + PAC_CRC.dr32().write_value(*word as u32); } - PAC_CRC.dr().read() + PAC_CRC.dr32().read() } } diff --git a/embassy-stm32/src/spi/mod.rs b/embassy-stm32/src/spi/mod.rs index 0b38c4288..450975f18 100644 --- a/embassy-stm32/src/spi/mod.rs +++ b/embassy-stm32/src/spi/mod.rs @@ -735,18 +735,22 @@ trait RegsExt { impl RegsExt for Regs { fn tx_ptr(&self) -> *mut W { - #[cfg(not(any(spi_v3, spi_v4, spi_v5)))] + #[cfg(any(spi_v1, spi_f1))] let dr = self.dr(); + #[cfg(spi_v2)] + let dr = self.dr16(); #[cfg(any(spi_v3, spi_v4, spi_v5))] - let dr = self.txdr(); + let dr = self.txdr32(); dr.as_ptr() as *mut W } fn rx_ptr(&self) -> *mut W { - #[cfg(not(any(spi_v3, spi_v4, spi_v5)))] + #[cfg(any(spi_v1, spi_f1))] let dr = self.dr(); + #[cfg(spi_v2)] + let dr = self.dr16(); #[cfg(any(spi_v3, spi_v4, spi_v5))] - let dr = self.rxdr(); + let dr = self.rxdr32(); dr.as_ptr() as *mut W } } @@ -815,11 +819,14 @@ fn spin_until_rx_ready(regs: Regs) -> Result<(), Error> { fn flush_rx_fifo(regs: Regs) { #[cfg(not(any(spi_v3, spi_v4, spi_v5)))] while regs.sr().read().rxne() { + #[cfg(not(spi_v2))] let _ = regs.dr().read(); + #[cfg(spi_v2)] + let _ = regs.dr16().read(); } #[cfg(any(spi_v3, spi_v4, spi_v5))] while regs.sr().read().rxp() { - let _ = regs.rxdr().read(); + let _ = regs.rxdr32().read(); } } From 1f3b690f76b6732e1ff152091040cec833da25cf Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Sat, 13 Apr 2024 02:55:15 +0200 Subject: [PATCH 132/581] stm32/flash: remove otp flash regions (removed in newer metapacs). --- embassy-stm32/build.rs | 2 -- embassy-stm32/src/flash/f4.rs | 5 +---- embassy-stm32/src/flash/h50.rs | 6 ++---- embassy-stm32/src/flash/mod.rs | 2 -- 4 files changed, 3 insertions(+), 12 deletions(-) diff --git a/embassy-stm32/build.rs b/embassy-stm32/build.rs index 38b6c480c..0f87dd8ac 100644 --- a/embassy-stm32/build.rs +++ b/embassy-stm32/build.rs @@ -272,8 +272,6 @@ fn main() { "Bank1" } else if region.name.starts_with("BANK_2") { "Bank2" - } else if region.name == "OTP" { - "Otp" } else { continue; } diff --git a/embassy-stm32/src/flash/f4.rs b/embassy-stm32/src/flash/f4.rs index 00e61f2d2..90f13ff29 100644 --- a/embassy-stm32/src/flash/f4.rs +++ b/embassy-stm32/src/flash/f4.rs @@ -16,7 +16,7 @@ mod alt_regions { use embassy_hal_internal::PeripheralRef; use stm32_metapac::FLASH_SIZE; - use crate::_generated::flash_regions::{OTPRegion, BANK1_REGION1, BANK1_REGION2, BANK1_REGION3, OTP_REGION}; + use crate::_generated::flash_regions::{BANK1_REGION1, BANK1_REGION2, BANK1_REGION3}; use crate::flash::{asynch, Async, Bank1Region1, Bank1Region2, Blocking, Error, Flash, FlashBank, FlashRegion}; use crate::peripherals::FLASH; @@ -62,7 +62,6 @@ mod alt_regions { pub bank2_region1: AltBank2Region1<'d, MODE>, pub bank2_region2: AltBank2Region2<'d, MODE>, pub bank2_region3: AltBank2Region3<'d, MODE>, - pub otp_region: OTPRegion<'d, MODE>, } impl<'d> Flash<'d> { @@ -79,7 +78,6 @@ mod alt_regions { bank2_region1: AltBank2Region1(&ALT_BANK2_REGION1, unsafe { p.clone_unchecked() }, PhantomData), bank2_region2: AltBank2Region2(&ALT_BANK2_REGION2, unsafe { p.clone_unchecked() }, PhantomData), bank2_region3: AltBank2Region3(&ALT_BANK2_REGION3, unsafe { p.clone_unchecked() }, PhantomData), - otp_region: OTPRegion(&OTP_REGION, unsafe { p.clone_unchecked() }, PhantomData), } } @@ -96,7 +94,6 @@ mod alt_regions { bank2_region1: AltBank2Region1(&ALT_BANK2_REGION1, unsafe { p.clone_unchecked() }, PhantomData), bank2_region2: AltBank2Region2(&ALT_BANK2_REGION2, unsafe { p.clone_unchecked() }, PhantomData), bank2_region3: AltBank2Region3(&ALT_BANK2_REGION3, unsafe { p.clone_unchecked() }, PhantomData), - otp_region: OTPRegion(&OTP_REGION, unsafe { p.clone_unchecked() }, PhantomData), } } } diff --git a/embassy-stm32/src/flash/h50.rs b/embassy-stm32/src/flash/h50.rs index db05bef5d..5b15be261 100644 --- a/embassy-stm32/src/flash/h50.rs +++ b/embassy-stm32/src/flash/h50.rs @@ -55,7 +55,6 @@ pub(crate) unsafe fn blocking_write(start_address: u32, buf: &[u8; WRITE_SIZE]) } pub(crate) unsafe fn blocking_erase_sector(sector: &FlashSector) -> Result<(), Error> { - assert!(sector.bank != FlashBank::Otp); assert!(sector.index_in_bank < 8); while busy() {} @@ -63,9 +62,8 @@ pub(crate) unsafe fn blocking_erase_sector(sector: &FlashSector) -> Result<(), E interrupt::free(|_| { pac::FLASH.nscr().modify(|w| { w.set_bksel(match sector.bank { - FlashBank::Bank1 => Bksel::B_0X0, - FlashBank::Bank2 => Bksel::B_0X1, - _ => unreachable!(), + FlashBank::Bank1 => Bksel::BANK1, + FlashBank::Bank2 => Bksel::BANK2, }); w.set_snb(sector.index_in_bank); w.set_ser(true); diff --git a/embassy-stm32/src/flash/mod.rs b/embassy-stm32/src/flash/mod.rs index 1d8031e82..9d7861816 100644 --- a/embassy-stm32/src/flash/mod.rs +++ b/embassy-stm32/src/flash/mod.rs @@ -89,8 +89,6 @@ pub enum FlashBank { Bank1 = 0, /// Bank 2 Bank2 = 1, - /// OTP region - Otp, } #[cfg_attr(any(flash_l0, flash_l1, flash_l4, flash_wl, flash_wb), path = "l.rs")] From 4079a8acf8d0d33dc1ca815475492cbf33407464 Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Sat, 13 Apr 2024 03:30:30 +0200 Subject: [PATCH 133/581] stm32/adc: update g4 for new pac. --- embassy-stm32/src/adc/g4.rs | 304 ++++++++++++++++++++++++++++++++ embassy-stm32/src/adc/mod.rs | 29 ++- examples/stm32g4/src/bin/adc.rs | 2 +- 3 files changed, 332 insertions(+), 3 deletions(-) create mode 100644 embassy-stm32/src/adc/g4.rs diff --git a/embassy-stm32/src/adc/g4.rs b/embassy-stm32/src/adc/g4.rs new file mode 100644 index 000000000..f6741f019 --- /dev/null +++ b/embassy-stm32/src/adc/g4.rs @@ -0,0 +1,304 @@ +#[allow(unused)] +use pac::adc::vals::{Adcaldif, Difsel, Exten}; +use pac::adccommon::vals::Presc; + +use super::{blocking_delay_us, Adc, AdcPin, Instance, InternalChannel, Resolution, SampleTime}; +use crate::time::Hertz; +use crate::{pac, Peripheral}; + +/// Default VREF voltage used for sample conversion to millivolts. +pub const VREF_DEFAULT_MV: u32 = 3300; +/// VREF voltage used for factory calibration of VREFINTCAL register. +pub const VREF_CALIB_MV: u32 = 3300; + +/// Max single ADC operation clock frequency +#[cfg(stm32g4)] +const MAX_ADC_CLK_FREQ: Hertz = Hertz::mhz(60); +#[cfg(stm32h7)] +const MAX_ADC_CLK_FREQ: Hertz = Hertz::mhz(50); + +#[cfg(stm32g4)] +const VREF_CHANNEL: u8 = 18; +#[cfg(stm32g4)] +const TEMP_CHANNEL: u8 = 16; + +#[cfg(stm32h7)] +const VREF_CHANNEL: u8 = 19; +#[cfg(stm32h7)] +const TEMP_CHANNEL: u8 = 18; + +// TODO this should be 14 for H7a/b/35 +const VBAT_CHANNEL: u8 = 17; + +// NOTE: Vrefint/Temperature/Vbat are not available on all ADCs, this currently cannot be modeled with stm32-data, so these are available from the software on all ADCs +/// Internal voltage reference channel. +pub struct VrefInt; +impl InternalChannel for VrefInt {} +impl super::SealedInternalChannel for VrefInt { + fn channel(&self) -> u8 { + VREF_CHANNEL + } +} + +/// Internal temperature channel. +pub struct Temperature; +impl InternalChannel for Temperature {} +impl super::SealedInternalChannel for Temperature { + fn channel(&self) -> u8 { + TEMP_CHANNEL + } +} + +/// Internal battery voltage channel. +pub struct Vbat; +impl InternalChannel for Vbat {} +impl super::SealedInternalChannel for Vbat { + fn channel(&self) -> u8 { + VBAT_CHANNEL + } +} + +// NOTE (unused): The prescaler enum closely copies the hardware capabilities, +// but high prescaling doesn't make a lot of sense in the current implementation and is ommited. +#[allow(unused)] +enum Prescaler { + NotDivided, + DividedBy2, + DividedBy4, + DividedBy6, + DividedBy8, + DividedBy10, + DividedBy12, + DividedBy16, + DividedBy32, + DividedBy64, + DividedBy128, + DividedBy256, +} + +impl Prescaler { + fn from_ker_ck(frequency: Hertz) -> Self { + let raw_prescaler = frequency.0 / MAX_ADC_CLK_FREQ.0; + match raw_prescaler { + 0 => Self::NotDivided, + 1 => Self::DividedBy2, + 2..=3 => Self::DividedBy4, + 4..=5 => Self::DividedBy6, + 6..=7 => Self::DividedBy8, + 8..=9 => Self::DividedBy10, + 10..=11 => Self::DividedBy12, + _ => unimplemented!(), + } + } + + fn divisor(&self) -> u32 { + match self { + Prescaler::NotDivided => 1, + Prescaler::DividedBy2 => 2, + Prescaler::DividedBy4 => 4, + Prescaler::DividedBy6 => 6, + Prescaler::DividedBy8 => 8, + Prescaler::DividedBy10 => 10, + Prescaler::DividedBy12 => 12, + Prescaler::DividedBy16 => 16, + Prescaler::DividedBy32 => 32, + Prescaler::DividedBy64 => 64, + Prescaler::DividedBy128 => 128, + Prescaler::DividedBy256 => 256, + } + } + + fn presc(&self) -> Presc { + match self { + Prescaler::NotDivided => Presc::DIV1, + Prescaler::DividedBy2 => Presc::DIV2, + Prescaler::DividedBy4 => Presc::DIV4, + Prescaler::DividedBy6 => Presc::DIV6, + Prescaler::DividedBy8 => Presc::DIV8, + Prescaler::DividedBy10 => Presc::DIV10, + Prescaler::DividedBy12 => Presc::DIV12, + Prescaler::DividedBy16 => Presc::DIV16, + Prescaler::DividedBy32 => Presc::DIV32, + Prescaler::DividedBy64 => Presc::DIV64, + Prescaler::DividedBy128 => Presc::DIV128, + Prescaler::DividedBy256 => Presc::DIV256, + } + } +} + +impl<'d, T: Instance> Adc<'d, T> { + /// Create a new ADC driver. + pub fn new(adc: impl Peripheral

+ 'd) -> Self { + embassy_hal_internal::into_ref!(adc); + T::enable_and_reset(); + + let prescaler = Prescaler::from_ker_ck(T::frequency()); + + T::common_regs().ccr().modify(|w| w.set_presc(prescaler.presc())); + + let frequency = Hertz(T::frequency().0 / prescaler.divisor()); + info!("ADC frequency set to {} Hz", frequency.0); + + if frequency > MAX_ADC_CLK_FREQ { + panic!("Maximal allowed frequency for the ADC is {} MHz and it varies with different packages, refer to ST docs for more information.", MAX_ADC_CLK_FREQ.0 / 1_000_000 ); + } + + let mut s = Self { + adc, + sample_time: SampleTime::from_bits(0), + }; + s.power_up(); + s.configure_differential_inputs(); + + s.calibrate(); + blocking_delay_us(1); + + s.enable(); + s.configure(); + + s + } + + fn power_up(&mut self) { + T::regs().cr().modify(|reg| { + reg.set_deeppwd(false); + reg.set_advregen(true); + }); + + blocking_delay_us(10); + } + + fn configure_differential_inputs(&mut self) { + T::regs().difsel().modify(|w| { + for n in 0..20 { + w.set_difsel(n, Difsel::SINGLEENDED); + } + }); + } + + fn calibrate(&mut self) { + T::regs().cr().modify(|w| { + w.set_adcaldif(Adcaldif::SINGLEENDED); + }); + + T::regs().cr().modify(|w| w.set_adcal(true)); + + while T::regs().cr().read().adcal() {} + } + + fn enable(&mut self) { + T::regs().isr().write(|w| w.set_adrdy(true)); + T::regs().cr().modify(|w| w.set_aden(true)); + while !T::regs().isr().read().adrdy() {} + T::regs().isr().write(|w| w.set_adrdy(true)); + } + + fn configure(&mut self) { + // single conversion mode, software trigger + T::regs().cfgr().modify(|w| { + w.set_cont(false); + w.set_exten(Exten::DISABLED); + }); + } + + /// Enable reading the voltage reference internal channel. + pub fn enable_vrefint(&self) -> VrefInt { + T::common_regs().ccr().modify(|reg| { + reg.set_vrefen(true); + }); + + VrefInt {} + } + + /// Enable reading the temperature internal channel. + pub fn enable_temperature(&self) -> Temperature { + T::common_regs().ccr().modify(|reg| { + reg.set_vsenseen(true); + }); + + Temperature {} + } + + /// Enable reading the vbat internal channel. + pub fn enable_vbat(&self) -> Vbat { + T::common_regs().ccr().modify(|reg| { + reg.set_vbaten(true); + }); + + Vbat {} + } + + /// Set the ADC sample time. + pub fn set_sample_time(&mut self, sample_time: SampleTime) { + self.sample_time = sample_time; + } + + /// Set the ADC resolution. + pub fn set_resolution(&mut self, resolution: Resolution) { + T::regs().cfgr().modify(|reg| reg.set_res(resolution.into())); + } + + /// Perform a single conversion. + fn convert(&mut self) -> u16 { + T::regs().isr().modify(|reg| { + reg.set_eos(true); + reg.set_eoc(true); + }); + + // Start conversion + T::regs().cr().modify(|reg| { + reg.set_adstart(true); + }); + + while !T::regs().isr().read().eos() { + // spin + } + + T::regs().dr().read().0 as u16 + } + + /// Read an ADC pin. + pub fn read

(&mut self, pin: &mut P) -> u16 + where + P: AdcPin, + P: crate::gpio::Pin, + { + pin.set_as_analog(); + + self.read_channel(pin.channel()) + } + + /// Read an ADC internal channel. + pub fn read_internal(&mut self, channel: &mut impl InternalChannel) -> u16 { + self.read_channel(channel.channel()) + } + + fn read_channel(&mut self, channel: u8) -> u16 { + // Configure channel + Self::set_channel_sample_time(channel, self.sample_time); + + #[cfg(stm32h7)] + { + T::regs().cfgr2().modify(|w| w.set_lshift(0)); + T::regs() + .pcsel() + .write(|w| w.set_pcsel(channel as _, Pcsel::PRESELECTED)); + } + + T::regs().sqr1().write(|reg| { + reg.set_sq(0, channel); + reg.set_l(0); + }); + + self.convert() + } + + fn set_channel_sample_time(ch: u8, sample_time: SampleTime) { + let sample_time = sample_time.into(); + if ch <= 9 { + T::regs().smpr().modify(|reg| reg.set_smp(ch as _, sample_time)); + } else { + T::regs().smpr2().modify(|reg| reg.set_smp((ch - 10) as _, sample_time)); + } + } +} diff --git a/embassy-stm32/src/adc/mod.rs b/embassy-stm32/src/adc/mod.rs index 24dd7cc3c..12c5751bd 100644 --- a/embassy-stm32/src/adc/mod.rs +++ b/embassy-stm32/src/adc/mod.rs @@ -12,6 +12,7 @@ #[cfg_attr(adc_v2, path = "v2.rs")] #[cfg_attr(any(adc_v3, adc_g0, adc_h5), path = "v3.rs")] #[cfg_attr(adc_v4, path = "v4.rs")] +#[cfg_attr(adc_g4, path = "g4.rs")] mod _version; #[allow(unused)] @@ -79,13 +80,37 @@ pub(crate) fn blocking_delay_us(us: u32) { } /// ADC instance. -#[cfg(not(any(adc_f1, adc_v1, adc_l0, adc_v2, adc_v3, adc_v4, adc_f3, adc_f3_v1_1, adc_g0, adc_h5)))] +#[cfg(not(any( + adc_f1, + adc_v1, + adc_l0, + adc_v2, + adc_v3, + adc_v4, + adc_g4, + adc_f3, + adc_f3_v1_1, + adc_g0, + adc_h5 +)))] #[allow(private_bounds)] pub trait Instance: SealedInstance + crate::Peripheral

{ type Interrupt: crate::interrupt::typelevel::Interrupt; } /// ADC instance. -#[cfg(any(adc_f1, adc_v1, adc_l0, adc_v2, adc_v3, adc_v4, adc_f3, adc_f3_v1_1, adc_g0, adc_h5))] +#[cfg(any( + adc_f1, + adc_v1, + adc_l0, + adc_v2, + adc_v3, + adc_v4, + adc_g4, + adc_f3, + adc_f3_v1_1, + adc_g0, + adc_h5 +))] #[allow(private_bounds)] pub trait Instance: SealedInstance + crate::Peripheral

+ crate::rcc::RccPeripheral { type Interrupt: crate::interrupt::typelevel::Interrupt; diff --git a/examples/stm32g4/src/bin/adc.rs b/examples/stm32g4/src/bin/adc.rs index 68b54e406..3de38cbd6 100644 --- a/examples/stm32g4/src/bin/adc.rs +++ b/examples/stm32g4/src/bin/adc.rs @@ -29,7 +29,7 @@ async fn main(_spawner: Spawner) { info!("Hello World!"); let mut adc = Adc::new(p.ADC2); - adc.set_sample_time(SampleTime::CYCLES32_5); + adc.set_sample_time(SampleTime::CYCLES24_5); loop { let measured = adc.read(&mut p.PA7); From 65c085ce910f50903bc5c41ca82eda989810f855 Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Sat, 13 Apr 2024 02:13:41 +0200 Subject: [PATCH 134/581] Add stm32u0 support. --- ci.sh | 3 ++ embassy-stm32/Cargo.toml | 38 +++++++++++++++++++++++-- embassy-stm32/src/exti.rs | 16 +++++------ embassy-stm32/src/rcc/l.rs | 28 +++++++++++++++--- embassy-stm32/src/rcc/mco.rs | 2 +- embassy-stm32/src/rcc/mod.rs | 2 +- examples/stm32u0/.cargo/config.toml | 9 ++++++ examples/stm32u0/Cargo.toml | 25 ++++++++++++++++ examples/stm32u0/build.rs | 5 ++++ examples/stm32u0/src/bin/blinky.rs | 26 +++++++++++++++++ examples/stm32u0/src/bin/button.rs | 24 ++++++++++++++++ examples/stm32u0/src/bin/button_exti.rs | 25 ++++++++++++++++ 12 files changed, 187 insertions(+), 16 deletions(-) create mode 100644 examples/stm32u0/.cargo/config.toml create mode 100644 examples/stm32u0/Cargo.toml create mode 100644 examples/stm32u0/build.rs create mode 100644 examples/stm32u0/src/bin/blinky.rs create mode 100644 examples/stm32u0/src/bin/button.rs create mode 100644 examples/stm32u0/src/bin/button_exti.rs diff --git a/ci.sh b/ci.sh index d17f4e13e..1393b9d47 100755 --- a/ci.sh +++ b/ci.sh @@ -149,6 +149,9 @@ cargo batch \ --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv8m.main-none-eabihf --features stm32h503rb,defmt,exti,time-driver-any,time \ --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv8m.main-none-eabihf --features stm32h562ag,defmt,exti,time-driver-any,time \ --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features stm32wb35ce,defmt,exti,time-driver-any,time \ + --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv6m-none-eabi --features stm32u031r8,defmt,exti,time-driver-any,time \ + --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv6m-none-eabi --features stm32u073mb,defmt,exti,time-driver-any,time \ + --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv6m-none-eabi --features stm32u083rc,defmt,exti,time-driver-any,time \ --- build --release --manifest-path cyw43/Cargo.toml --target thumbv6m-none-eabi --features ''\ --- build --release --manifest-path cyw43/Cargo.toml --target thumbv6m-none-eabi --features 'log' \ --- build --release --manifest-path cyw43/Cargo.toml --target thumbv6m-none-eabi --features 'defmt' \ diff --git a/embassy-stm32/Cargo.toml b/embassy-stm32/Cargo.toml index 93792ecf8..459d2e370 100644 --- a/embassy-stm32/Cargo.toml +++ b/embassy-stm32/Cargo.toml @@ -30,6 +30,7 @@ flavors = [ { regex_feature = "stm32l1.*", target = "thumbv7m-none-eabi" }, { regex_feature = "stm32l4.*", target = "thumbv7em-none-eabi" }, { regex_feature = "stm32l5.*", target = "thumbv8m.main-none-eabihf", features = ["low-power"] }, + { regex_feature = "stm32u0.*", target = "thumbv6m-none-eabi" }, { regex_feature = "stm32u5.*", target = "thumbv8m.main-none-eabihf" }, { regex_feature = "stm32wb.*", target = "thumbv7em-none-eabi" }, { regex_feature = "stm32wba.*", target = "thumbv8m.main-none-eabihf" }, @@ -70,7 +71,7 @@ rand_core = "0.6.3" sdio-host = "0.5.0" critical-section = "1.1" #stm32-metapac = { version = "15" } -stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-0c4baf478324e19741c7a9795ab0aa8217c3691c" } +stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-d674277b78ca7400ecfeeb1b5af4e460a65c1a61" } vcell = "0.1.3" nb = "1.0.0" @@ -96,7 +97,7 @@ proc-macro2 = "1.0.36" quote = "1.0.15" #stm32-metapac = { version = "15", default-features = false, features = ["metadata"]} -stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-0c4baf478324e19741c7a9795ab0aa8217c3691c", default-features = false, features = ["metadata"]} +stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-d674277b78ca7400ecfeeb1b5af4e460a65c1a61", default-features = false, features = ["metadata"]} [features] default = ["rt"] @@ -1419,6 +1420,38 @@ stm32l562qe = [ "stm32-metapac/stm32l562qe" ] stm32l562re = [ "stm32-metapac/stm32l562re" ] stm32l562ve = [ "stm32-metapac/stm32l562ve" ] stm32l562ze = [ "stm32-metapac/stm32l562ze" ] +stm32u031c6 = [ "stm32-metapac/stm32u031c6" ] +stm32u031c8 = [ "stm32-metapac/stm32u031c8" ] +stm32u031f4 = [ "stm32-metapac/stm32u031f4" ] +stm32u031f6 = [ "stm32-metapac/stm32u031f6" ] +stm32u031f8 = [ "stm32-metapac/stm32u031f8" ] +stm32u031g6 = [ "stm32-metapac/stm32u031g6" ] +stm32u031g8 = [ "stm32-metapac/stm32u031g8" ] +stm32u031k4 = [ "stm32-metapac/stm32u031k4" ] +stm32u031k6 = [ "stm32-metapac/stm32u031k6" ] +stm32u031k8 = [ "stm32-metapac/stm32u031k8" ] +stm32u031r6 = [ "stm32-metapac/stm32u031r6" ] +stm32u031r8 = [ "stm32-metapac/stm32u031r8" ] +stm32u073c8 = [ "stm32-metapac/stm32u073c8" ] +stm32u073cb = [ "stm32-metapac/stm32u073cb" ] +stm32u073cc = [ "stm32-metapac/stm32u073cc" ] +stm32u073h8 = [ "stm32-metapac/stm32u073h8" ] +stm32u073hb = [ "stm32-metapac/stm32u073hb" ] +stm32u073hc = [ "stm32-metapac/stm32u073hc" ] +stm32u073k8 = [ "stm32-metapac/stm32u073k8" ] +stm32u073kb = [ "stm32-metapac/stm32u073kb" ] +stm32u073kc = [ "stm32-metapac/stm32u073kc" ] +stm32u073m8 = [ "stm32-metapac/stm32u073m8" ] +stm32u073mb = [ "stm32-metapac/stm32u073mb" ] +stm32u073mc = [ "stm32-metapac/stm32u073mc" ] +stm32u073r8 = [ "stm32-metapac/stm32u073r8" ] +stm32u073rb = [ "stm32-metapac/stm32u073rb" ] +stm32u073rc = [ "stm32-metapac/stm32u073rc" ] +stm32u083cc = [ "stm32-metapac/stm32u083cc" ] +stm32u083hc = [ "stm32-metapac/stm32u083hc" ] +stm32u083kc = [ "stm32-metapac/stm32u083kc" ] +stm32u083mc = [ "stm32-metapac/stm32u083mc" ] +stm32u083rc = [ "stm32-metapac/stm32u083rc" ] stm32u535cb = [ "stm32-metapac/stm32u535cb" ] stm32u535cc = [ "stm32-metapac/stm32u535cc" ] stm32u535ce = [ "stm32-metapac/stm32u535ce" ] @@ -1474,6 +1507,7 @@ stm32u599vj = [ "stm32-metapac/stm32u599vj" ] stm32u599zi = [ "stm32-metapac/stm32u599zi" ] stm32u599zj = [ "stm32-metapac/stm32u599zj" ] stm32u5a5aj = [ "stm32-metapac/stm32u5a5aj" ] +stm32u5a5qi = [ "stm32-metapac/stm32u5a5qi" ] stm32u5a5qj = [ "stm32-metapac/stm32u5a5qj" ] stm32u5a5rj = [ "stm32-metapac/stm32u5a5rj" ] stm32u5a5vj = [ "stm32-metapac/stm32u5a5vj" ] diff --git a/embassy-stm32/src/exti.rs b/embassy-stm32/src/exti.rs index 8d5dae436..224d51b84 100644 --- a/embassy-stm32/src/exti.rs +++ b/embassy-stm32/src/exti.rs @@ -27,11 +27,11 @@ fn cpu_regs() -> pac::exti::Exti { EXTI } -#[cfg(not(any(exti_c0, exti_g0, exti_l5, gpio_v1, exti_u5, exti_h5, exti_h50)))] +#[cfg(not(any(exti_c0, exti_g0, exti_u0, exti_l5, gpio_v1, exti_u5, exti_h5, exti_h50)))] fn exticr_regs() -> pac::syscfg::Syscfg { pac::SYSCFG } -#[cfg(any(exti_c0, exti_g0, exti_l5, exti_u5, exti_h5, exti_h50))] +#[cfg(any(exti_c0, exti_g0, exti_u0, exti_l5, exti_u5, exti_h5, exti_h50))] fn exticr_regs() -> pac::exti::Exti { EXTI } @@ -44,9 +44,9 @@ unsafe fn on_irq() { #[cfg(feature = "low-power")] crate::low_power::on_wakeup_irq(); - #[cfg(not(any(exti_c0, exti_g0, exti_l5, exti_u5, exti_h5, exti_h50)))] + #[cfg(not(any(exti_c0, exti_g0, exti_u0, exti_l5, exti_u5, exti_h5, exti_h50)))] let bits = EXTI.pr(0).read().0; - #[cfg(any(exti_c0, exti_g0, exti_l5, exti_u5, exti_h5, exti_h50))] + #[cfg(any(exti_c0, exti_g0, exti_u0, exti_l5, exti_u5, exti_h5, exti_h50))] let bits = EXTI.rpr(0).read().0 | EXTI.fpr(0).read().0; // We don't handle or change any EXTI lines above 16. @@ -61,9 +61,9 @@ unsafe fn on_irq() { } // Clear pending - #[cfg(not(any(exti_c0, exti_g0, exti_l5, exti_u5, exti_h5, exti_h50)))] + #[cfg(not(any(exti_c0, exti_g0, exti_u0, exti_l5, exti_u5, exti_h5, exti_h50)))] EXTI.pr(0).write_value(Lines(bits)); - #[cfg(any(exti_c0, exti_g0, exti_l5, exti_u5, exti_h5, exti_h50))] + #[cfg(any(exti_c0, exti_g0, exti_u0, exti_l5, exti_u5, exti_h5, exti_h50))] { EXTI.rpr(0).write_value(Lines(bits)); EXTI.fpr(0).write_value(Lines(bits)); @@ -241,9 +241,9 @@ impl<'a> ExtiInputFuture<'a> { EXTI.ftsr(0).modify(|w| w.set_line(pin, falling)); // clear pending bit - #[cfg(not(any(exti_c0, exti_g0, exti_l5, exti_u5, exti_h5, exti_h50)))] + #[cfg(not(any(exti_c0, exti_g0, exti_u0, exti_l5, exti_u5, exti_h5, exti_h50)))] EXTI.pr(0).write(|w| w.set_line(pin, true)); - #[cfg(any(exti_c0, exti_g0, exti_l5, exti_u5, exti_h5, exti_h50))] + #[cfg(any(exti_c0, exti_g0, exti_u0, exti_l5, exti_u5, exti_h5, exti_h50))] { EXTI.rpr(0).write(|w| w.set_line(pin, true)); EXTI.fpr(0).write(|w| w.set_line(pin, true)); diff --git a/embassy-stm32/src/rcc/l.rs b/embassy-stm32/src/rcc/l.rs index 9079ddd41..d7235ac7f 100644 --- a/embassy-stm32/src/rcc/l.rs +++ b/embassy-stm32/src/rcc/l.rs @@ -49,6 +49,7 @@ pub struct Config { pub sys: Sysclk, pub ahb_pre: AHBPrescaler, pub apb1_pre: APBPrescaler, + #[cfg(not(stm32u0))] pub apb2_pre: APBPrescaler, #[cfg(any(stm32wl5x, stm32wb))] pub core2_ahb_pre: AHBPrescaler, @@ -75,6 +76,7 @@ impl Default for Config { sys: Sysclk::MSI, ahb_pre: AHBPrescaler::DIV1, apb1_pre: APBPrescaler::DIV1, + #[cfg(not(stm32u0))] apb2_pre: APBPrescaler::DIV1, #[cfg(any(stm32wl5x, stm32wb))] core2_ahb_pre: AHBPrescaler::DIV1, @@ -130,7 +132,7 @@ pub const WPAN_DEFAULT: Config = Config { }; fn msi_enable(range: MSIRange) { - #[cfg(any(stm32l4, stm32l5, stm32wb, stm32wl))] + #[cfg(any(stm32l4, stm32l5, stm32wb, stm32wl, stm32u0))] RCC.cr().modify(|w| { #[cfg(not(stm32wb))] w.set_msirgsel(crate::pac::rcc::vals::Msirgsel::CR); @@ -240,7 +242,7 @@ pub(crate) unsafe fn init(config: Config) { let pll_input = PllInput { hse, hsi, - #[cfg(any(stm32l4, stm32l5, stm32wb, stm32wl))] + #[cfg(any(stm32l4, stm32l5, stm32wb, stm32wl, stm32u0))] msi, }; let pll = init_pll(PllInstance::Pll, config.pll, &pll_input); @@ -254,6 +256,10 @@ pub(crate) unsafe fn init(config: Config) { Sysclk::HSI => hsi.unwrap(), Sysclk::MSI => msi.unwrap(), Sysclk::PLL1_R => pll.r.unwrap(), + #[cfg(stm32u0)] + Sysclk::LSI | Sysclk::LSE => todo!(), + #[cfg(stm32u0)] + Sysclk::_RESERVED_6 | Sysclk::_RESERVED_7 => unreachable!(), }; #[cfg(rcc_l4plus)] @@ -263,6 +269,7 @@ pub(crate) unsafe fn init(config: Config) { let hclk1 = sys_clk / config.ahb_pre; let (pclk1, pclk1_tim) = super::util::calc_pclk(hclk1, config.apb1_pre); + #[cfg(not(stm32u0))] let (pclk2, pclk2_tim) = super::util::calc_pclk(hclk1, config.apb2_pre); #[cfg(any(stm32l4, stm32l5, stm32wlex))] let hclk2 = hclk1; @@ -315,6 +322,13 @@ pub(crate) unsafe fn init(config: Config) { ..=64_000_000 => 3, _ => 4, }; + #[cfg(stm32u0)] + let latency = match hclk1.0 { + // VOS RANGE1, others TODO. + ..=24_000_000 => 0, + ..=48_000_000 => 1, + _ => 2, + }; #[cfg(stm32l1)] FLASH.acr().write(|w| w.set_acc64(true)); @@ -326,7 +340,11 @@ pub(crate) unsafe fn init(config: Config) { RCC.cfgr().modify(|w| { w.set_sw(config.sys); w.set_hpre(config.ahb_pre); + #[cfg(stm32u0)] + w.set_ppre(config.apb1_pre); + #[cfg(not(stm32u0))] w.set_ppre1(config.apb1_pre); + #[cfg(not(stm32u0))] w.set_ppre2(config.apb2_pre); }); while RCC.cfgr().read().sws() != config.sys {} @@ -353,8 +371,10 @@ pub(crate) unsafe fn init(config: Config) { #[cfg(any(stm32l4, stm32l5, stm32wb, stm32wl))] hclk3: Some(hclk3), pclk1: Some(pclk1), + #[cfg(not(stm32u0))] pclk2: Some(pclk2), pclk1_tim: Some(pclk1_tim), + #[cfg(not(stm32u0))] pclk2_tim: Some(pclk2_tim), #[cfg(stm32wl)] pclk3: Some(hclk3), @@ -408,7 +428,7 @@ fn msirange_to_hertz(range: MSIRange) -> Hertz { Hertz(32_768 * (1 << (range as u8 + 1))) } -#[cfg(any(stm32l4, stm32l5, stm32wb, stm32wl))] +#[cfg(any(stm32l4, stm32l5, stm32wb, stm32wl, stm32u0))] fn msirange_to_hertz(range: MSIRange) -> Hertz { match range { MSIRange::RANGE100K => Hertz(100_000), @@ -521,7 +541,7 @@ mod pll { } } -#[cfg(any(stm32l4, stm32l5, stm32wb, stm32wl))] +#[cfg(any(stm32l4, stm32l5, stm32wb, stm32wl, stm32u0))] mod pll { use super::{pll_enable, PllInstance}; pub use crate::pac::rcc::vals::{ diff --git a/embassy-stm32/src/rcc/mco.rs b/embassy-stm32/src/rcc/mco.rs index d8604e07e..4b22a099d 100644 --- a/embassy-stm32/src/rcc/mco.rs +++ b/embassy-stm32/src/rcc/mco.rs @@ -52,7 +52,7 @@ macro_rules! impl_peri { }; } -#[cfg(any(rcc_c0, rcc_g0))] +#[cfg(any(rcc_c0, rcc_g0, rcc_u0))] #[allow(unused_imports)] use self::{McoSource as Mco1Source, McoSource as Mco2Source}; diff --git a/embassy-stm32/src/rcc/mod.rs b/embassy-stm32/src/rcc/mod.rs index 5497bba07..a4e497fe7 100644 --- a/embassy-stm32/src/rcc/mod.rs +++ b/embassy-stm32/src/rcc/mod.rs @@ -25,7 +25,7 @@ pub use hsi48::*; #[cfg_attr(stm32g0, path = "g0.rs")] #[cfg_attr(stm32g4, path = "g4.rs")] #[cfg_attr(any(stm32h5, stm32h7), path = "h.rs")] -#[cfg_attr(any(stm32l0, stm32l1, stm32l4, stm32l5, stm32wb, stm32wl), path = "l.rs")] +#[cfg_attr(any(stm32l0, stm32l1, stm32l4, stm32l5, stm32wb, stm32wl, stm32u0), path = "l.rs")] #[cfg_attr(stm32u5, path = "u5.rs")] #[cfg_attr(stm32wba, path = "wba.rs")] mod _version; diff --git a/examples/stm32u0/.cargo/config.toml b/examples/stm32u0/.cargo/config.toml new file mode 100644 index 000000000..688347084 --- /dev/null +++ b/examples/stm32u0/.cargo/config.toml @@ -0,0 +1,9 @@ +[target.'cfg(all(target_arch = "arm", target_os = "none"))'] +# replace stm32u083rctx with your chip as listed in `probe-rs chip list` +runner = "probe-rs run --chip stm32u083rctx" + +[build] +target = "thumbv6m-none-eabi" + +[env] +DEFMT_LOG = "trace" diff --git a/examples/stm32u0/Cargo.toml b/examples/stm32u0/Cargo.toml new file mode 100644 index 000000000..495be3e75 --- /dev/null +++ b/examples/stm32u0/Cargo.toml @@ -0,0 +1,25 @@ +[package] +edition = "2021" +name = "embassy-stm32u0-examples" +version = "0.1.0" +license = "MIT OR Apache-2.0" + +[dependencies] +# Change stm32u083rc to your chip name, if necessary. +embassy-stm32 = { version = "0.1.0", path = "../../embassy-stm32", features = [ "defmt", "time-driver-any", "stm32u083rc", "memory-x", "unstable-pac", "exti"] } +embassy-sync = { version = "0.5.0", path = "../../embassy-sync", features = ["defmt"] } +embassy-executor = { version = "0.5.0", path = "../../embassy-executor", features = ["arch-cortex-m", "executor-thread", "defmt", "integrated-timers"] } +embassy-time = { version = "0.3.0", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime", "tick-hz-32_768"] } + +defmt = "0.3" +defmt-rtt = "0.4" + +cortex-m = { version = "0.7.6", features = ["critical-section-single-core"] } +cortex-m-rt = "0.7.0" +embedded-hal = "0.2.6" +panic-probe = { version = "0.3", features = ["print-defmt"] } +futures = { version = "0.3.17", default-features = false, features = ["async-await"] } +heapless = { version = "0.8", default-features = false } + +[profile.release] +debug = 2 diff --git a/examples/stm32u0/build.rs b/examples/stm32u0/build.rs new file mode 100644 index 000000000..8cd32d7ed --- /dev/null +++ b/examples/stm32u0/build.rs @@ -0,0 +1,5 @@ +fn main() { + println!("cargo:rustc-link-arg-bins=--nmagic"); + println!("cargo:rustc-link-arg-bins=-Tlink.x"); + println!("cargo:rustc-link-arg-bins=-Tdefmt.x"); +} diff --git a/examples/stm32u0/src/bin/blinky.rs b/examples/stm32u0/src/bin/blinky.rs new file mode 100644 index 000000000..90e479aae --- /dev/null +++ b/examples/stm32u0/src/bin/blinky.rs @@ -0,0 +1,26 @@ +#![no_std] +#![no_main] + +use defmt::*; +use embassy_executor::Spawner; +use embassy_stm32::gpio::{Level, Output, Speed}; +use embassy_time::Timer; +use {defmt_rtt as _, panic_probe as _}; + +#[embassy_executor::main] +async fn main(_spawner: Spawner) { + let p = embassy_stm32::init(Default::default()); + info!("Hello World!"); + + let mut led = Output::new(p.PA5, Level::High, Speed::Low); + + loop { + info!("high"); + led.set_high(); + Timer::after_millis(300).await; + + info!("low"); + led.set_low(); + Timer::after_millis(300).await; + } +} diff --git a/examples/stm32u0/src/bin/button.rs b/examples/stm32u0/src/bin/button.rs new file mode 100644 index 000000000..8017f0274 --- /dev/null +++ b/examples/stm32u0/src/bin/button.rs @@ -0,0 +1,24 @@ +#![no_std] +#![no_main] + +use cortex_m_rt::entry; +use defmt::*; +use embassy_stm32::gpio::{Input, Pull}; +use {defmt_rtt as _, panic_probe as _}; + +#[entry] +fn main() -> ! { + info!("Hello World!"); + + let p = embassy_stm32::init(Default::default()); + + let button = Input::new(p.PC13, Pull::Up); + + loop { + if button.is_high() { + info!("high"); + } else { + info!("low"); + } + } +} diff --git a/examples/stm32u0/src/bin/button_exti.rs b/examples/stm32u0/src/bin/button_exti.rs new file mode 100644 index 000000000..34a08bbc6 --- /dev/null +++ b/examples/stm32u0/src/bin/button_exti.rs @@ -0,0 +1,25 @@ +#![no_std] +#![no_main] + +use defmt::*; +use embassy_executor::Spawner; +use embassy_stm32::exti::ExtiInput; +use embassy_stm32::gpio::Pull; +use {defmt_rtt as _, panic_probe as _}; + +#[embassy_executor::main] +async fn main(_spawner: Spawner) { + let p = embassy_stm32::init(Default::default()); + info!("Hello World!"); + + let mut button = ExtiInput::new(p.PC13, p.EXTI13, Pull::Up); + + info!("Press the USER button..."); + + loop { + button.wait_for_falling_edge().await; + info!("Pressed!"); + button.wait_for_rising_edge().await; + info!("Released!"); + } +} From 5178c24cf4b0fcf4ac25f76b5456cf96e745a2be Mon Sep 17 00:00:00 2001 From: Adam Simpkins Date: Tue, 9 Apr 2024 11:00:44 -0700 Subject: [PATCH 135/581] Fix embassy-futures test failure Running `cargo test` in embassy-futures was failing. The `no_run` tag on this doc example caused it to still try and compile this example, just not run it, and compilation failed. This updates the example so that it can successfully compile and run. --- embassy-futures/src/yield_now.rs | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/embassy-futures/src/yield_now.rs b/embassy-futures/src/yield_now.rs index bb3c67d17..4d4e535f2 100644 --- a/embassy-futures/src/yield_now.rs +++ b/embassy-futures/src/yield_now.rs @@ -9,10 +9,16 @@ use core::task::{Context, Poll}; /// hold, while still allowing other tasks to run concurrently (not monopolizing /// the executor thread). /// -/// ```rust,no_run +/// ```rust +/// # use embassy_futures::{block_on, yield_now}; +/// # async fn test_fn() { +/// # let mut iter_count: u32 = 0; +/// # let mut some_condition = || { iter_count += 1; iter_count > 10 }; /// while !some_condition() { /// yield_now().await; /// } +/// # } +/// # block_on(test_fn()); /// ``` /// /// The downside is this will spin in a busy loop, using 100% of the CPU, while From e147f29b5ccbe94fb0703a4cb37ce6a403c321f3 Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Sun, 14 Apr 2024 22:21:19 +0200 Subject: [PATCH 136/581] ci: test embassy-futures. --- .github/ci/test.sh | 1 + 1 file changed, 1 insertion(+) diff --git a/.github/ci/test.sh b/.github/ci/test.sh index 6cb3a4bff..41da644fc 100755 --- a/.github/ci/test.sh +++ b/.github/ci/test.sh @@ -8,6 +8,7 @@ export RUSTUP_HOME=/ci/cache/rustup export CARGO_HOME=/ci/cache/cargo export CARGO_TARGET_DIR=/ci/cache/target +cargo test --manifest-path ./embassy-futures/Cargo.toml cargo test --manifest-path ./embassy-sync/Cargo.toml cargo test --manifest-path ./embassy-embedded-hal/Cargo.toml cargo test --manifest-path ./embassy-hal-internal/Cargo.toml From 1741209ba242e43ba4f2974c685ca2fab7dca766 Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Sun, 14 Apr 2024 23:59:38 +0200 Subject: [PATCH 137/581] update nightly. Fixes docs build. --- rust-toolchain-nightly.toml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/rust-toolchain-nightly.toml b/rust-toolchain-nightly.toml index 98696fd2b..ac160b995 100644 --- a/rust-toolchain-nightly.toml +++ b/rust-toolchain-nightly.toml @@ -1,5 +1,5 @@ [toolchain] -channel = "nightly-2024-03-20" +channel = "nightly-2024-04-14" components = [ "rust-src", "rustfmt", "llvm-tools", "miri" ] targets = [ "thumbv7em-none-eabi", From 86706bdc1438cdccf017d073f9b8f8ff2a0322fe Mon Sep 17 00:00:00 2001 From: Caio Date: Sun, 14 Apr 2024 19:35:59 -0300 Subject: [PATCH 138/581] Add map method --- embassy-sync/src/mutex.rs | 133 ++++++++++++++++++++++++++++++++++++++ 1 file changed, 133 insertions(+) diff --git a/embassy-sync/src/mutex.rs b/embassy-sync/src/mutex.rs index 72459d660..b48a408c4 100644 --- a/embassy-sync/src/mutex.rs +++ b/embassy-sync/src/mutex.rs @@ -3,6 +3,7 @@ //! This module provides a mutex that can be used to synchronize data between asynchronous tasks. use core::cell::{RefCell, UnsafeCell}; use core::future::poll_fn; +use core::mem; use core::ops::{Deref, DerefMut}; use core::task::Poll; @@ -134,6 +135,7 @@ where /// successfully locked the mutex, and grants access to the contents. /// /// Dropping it unlocks the mutex. +#[clippy::has_significant_drop] pub struct MutexGuard<'a, M, T> where M: RawMutex, @@ -142,6 +144,25 @@ where mutex: &'a Mutex, } +impl<'a, M, T> MutexGuard<'a, M, T> +where + M: RawMutex, + T: ?Sized, +{ + /// Returns a locked view over a portion of the locked data. + pub fn map(this: Self, fun: impl FnOnce(&mut T) -> &mut U) -> MappedMutexGuard<'a, M, U> { + let mutex = this.mutex; + let value = fun(unsafe { &mut *this.mutex.inner.get() }); + // Don't run the `drop` method for MutexGuard. The ownership of the underlying + // locked state is being moved to the returned MappedMutexGuard. + mem::forget(this); + MappedMutexGuard { + state: &mutex.state, + value, + } + } +} + impl<'a, M, T> Drop for MutexGuard<'a, M, T> where M: RawMutex, @@ -180,3 +201,115 @@ where unsafe { &mut *(self.mutex.inner.get()) } } } + +/// A handle to a held `Mutex` that has had a function applied to it via [`MutexGuard::map`] or +/// [`MappedMutexGuard::map`]. +/// +/// This can be used to hold a subfield of the protected data. +#[clippy::has_significant_drop] +pub struct MappedMutexGuard<'a, M, T> +where + M: RawMutex, + T: ?Sized, +{ + state: &'a BlockingMutex>, + value: *mut T, +} + +impl<'a, M, T> MappedMutexGuard<'a, M, T> +where + M: RawMutex, + T: ?Sized, +{ + /// Returns a locked view over a portion of the locked data. + pub fn map(this: Self, fun: impl FnOnce(&mut T) -> &mut U) -> MappedMutexGuard<'a, M, U> { + let state = this.state; + let value = fun(unsafe { &mut *this.value }); + // Don't run the `drop` method for MutexGuard. The ownership of the underlying + // locked state is being moved to the returned MappedMutexGuard. + mem::forget(this); + MappedMutexGuard { state, value } + } +} + +impl<'a, M, T> Deref for MappedMutexGuard<'a, M, T> +where + M: RawMutex, + T: ?Sized, +{ + type Target = T; + fn deref(&self) -> &Self::Target { + // Safety: the MutexGuard represents exclusive access to the contents + // of the mutex, so it's OK to get it. + unsafe { &*self.value } + } +} + +impl<'a, M, T> DerefMut for MappedMutexGuard<'a, M, T> +where + M: RawMutex, + T: ?Sized, +{ + fn deref_mut(&mut self) -> &mut Self::Target { + // Safety: the MutexGuard represents exclusive access to the contents + // of the mutex, so it's OK to get it. + unsafe { &mut *self.value } + } +} + +impl<'a, M, T> Drop for MappedMutexGuard<'a, M, T> +where + M: RawMutex, + T: ?Sized, +{ + fn drop(&mut self) { + self.state.lock(|s| { + let mut s = unwrap!(s.try_borrow_mut()); + s.locked = false; + s.waker.wake(); + }) + } +} + +unsafe impl Send for MappedMutexGuard<'_, M, T> +where + M: RawMutex + Sync, + T: Send + ?Sized, +{ +} + +unsafe impl Sync for MappedMutexGuard<'_, M, T> +where + M: RawMutex + Sync, + T: Sync + ?Sized, +{ +} + +#[cfg(test)] +mod tests { + use crate::blocking_mutex::raw::NoopRawMutex; + use crate::mutex::{Mutex, MutexGuard}; + + #[futures_test::test] + async fn mapped_guard_releases_lock_when_dropped() { + let mutex: Mutex = Mutex::new([0, 1]); + + { + let guard = mutex.lock().await; + assert_eq!(*guard, [0, 1]); + let mut mapped = MutexGuard::map(guard, |this| &mut this[1]); + assert_eq!(*mapped, 1); + *mapped = 2; + } + + { + let guard = mutex.lock().await; + assert_eq!(*guard, [0, 2]); + let mut mapped = MutexGuard::map(guard, |this| &mut this[1]); + assert_eq!(*mapped, 2); + *mapped = 3; + } + + assert_eq!(*mutex.lock().await, [0, 3]); + } +} From a25cae46c5f01821911f7d989e7d80ff5d8a5376 Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Mon, 15 Apr 2024 00:52:42 +0200 Subject: [PATCH 139/581] ci: test embassy-sync on miri. --- .github/ci/test-nightly.sh | 1 + 1 file changed, 1 insertion(+) diff --git a/.github/ci/test-nightly.sh b/.github/ci/test-nightly.sh index d6e5dc574..1724ffe89 100755 --- a/.github/ci/test-nightly.sh +++ b/.github/ci/test-nightly.sh @@ -11,3 +11,4 @@ mv rust-toolchain-nightly.toml rust-toolchain.toml MIRIFLAGS=-Zmiri-ignore-leaks cargo miri test --manifest-path ./embassy-executor/Cargo.toml MIRIFLAGS=-Zmiri-ignore-leaks cargo miri test --manifest-path ./embassy-executor/Cargo.toml --features nightly +MIRIFLAGS=-Zmiri-ignore-leaks cargo miri test --manifest-path ./embassy-sync/Cargo.toml From fcaa7de87e48463b50b9842288b25ae648dc351f Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Mon, 15 Apr 2024 01:12:28 +0200 Subject: [PATCH 140/581] stm32/rcc: make ClockMux non_exhasutive. --- embassy-stm32/build.rs | 1 + 1 file changed, 1 insertion(+) diff --git a/embassy-stm32/build.rs b/embassy-stm32/build.rs index 0f87dd8ac..67fceda56 100644 --- a/embassy-stm32/build.rs +++ b/embassy-stm32/build.rs @@ -662,6 +662,7 @@ fn main() { #(pub use crate::pac::rcc::vals::#enum_names as #enum_names; )* #[derive(Clone, Copy)] + #[non_exhaustive] pub struct ClockMux { #( #struct_fields, )* } From 8fe88847d81afceaa55aa68662d4162d5c12f804 Mon Sep 17 00:00:00 2001 From: chrysn Date: Mon, 15 Apr 2024 10:02:35 +0200 Subject: [PATCH 141/581] fixup! net/udp: Relay full UdpMetadata instead of only remote endpoint in poll_ functions --- embassy-net/src/udp.rs | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/embassy-net/src/udp.rs b/embassy-net/src/udp.rs index 2fdf83e9d..3e72327c6 100644 --- a/embassy-net/src/udp.rs +++ b/embassy-net/src/udp.rs @@ -111,10 +111,8 @@ impl<'a> UdpSocket<'a> { /// This method will wait until a datagram is received. /// /// Returns the number of bytes received and the remote endpoint. - pub async fn recv_from(&self, buf: &mut [u8]) -> Result<(usize, IpEndpoint), RecvError> { - poll_fn(move |cx| self.poll_recv_from(buf, cx)) - .await - .map(|(size, metadata)| (size, metadata.endpoint)) + pub async fn recv_from(&self, buf: &mut [u8]) -> Result<(usize, UdpMetadata), RecvError> { + poll_fn(move |cx| self.poll_recv_from(buf, cx)).await } /// Receive a datagram. From f66b63017c6ab317af633564a2d8dafd79f71807 Mon Sep 17 00:00:00 2001 From: Torin Cooper-Bennun Date: Thu, 11 Apr 2024 15:45:04 +0100 Subject: [PATCH 142/581] stm32: flash: h50: implement bank swapping --- embassy-stm32/src/flash/h50.rs | 50 ++++++++++++++++++++++++++++++++-- 1 file changed, 47 insertions(+), 3 deletions(-) diff --git a/embassy-stm32/src/flash/h50.rs b/embassy-stm32/src/flash/h50.rs index 5b15be261..56ea7a421 100644 --- a/embassy-stm32/src/flash/h50.rs +++ b/embassy-stm32/src/flash/h50.rs @@ -61,9 +61,12 @@ pub(crate) unsafe fn blocking_erase_sector(sector: &FlashSector) -> Result<(), E interrupt::free(|_| { pac::FLASH.nscr().modify(|w| { - w.set_bksel(match sector.bank { - FlashBank::Bank1 => Bksel::BANK1, - FlashBank::Bank2 => Bksel::BANK2, + // BKSEL ignores SWAP_BANK, so we must take it into account here + w.set_bksel(match (sector.bank, banks_swapped()) { + (FlashBank::Bank1, false) => Bksel::BANK1, + (FlashBank::Bank2, true) => Bksel::BANK1, + (FlashBank::Bank2, false) => Bksel::BANK2, + (FlashBank::Bank1, true) => Bksel::BANK2, }); w.set_snb(sector.index_in_bank); w.set_ser(true); @@ -111,6 +114,47 @@ pub(crate) unsafe fn clear_all_err() { }) } +/// Get the current SWAP_BANK option. +/// +/// This value is only loaded on system or power-on reset. `perform_bank_swap()` +/// will not reflect here. +pub fn banks_swapped() -> bool { + pac::FLASH.optcr().read().swap_bank() +} + +/// Logical, persistent swap of flash banks 1 and 2. +/// +/// This allows the application to write a new firmware blob into bank 2, then +/// swap the banks and perform a reset, loading the new firmware. +/// +/// Swap does not take effect until system or power-on reset. +/// +/// PLEASE READ THE REFERENCE MANUAL - there are nuances to this feature. For +/// instance, erase commands and interrupt enables which take a flash bank as a +/// parameter ignore the swap! +pub fn perform_bank_swap() { + while busy() {} + + unsafe { + clear_all_err(); + } + + // unlock OPTLOCK + pac::FLASH.optkeyr().write(|w| *w = 0x0819_2A3B); + pac::FLASH.optkeyr().write(|w| *w = 0x4C5D_6E7F); + while pac::FLASH.optcr().read().optlock() {} + + // toggle SWAP_BANK option + pac::FLASH.optsr_prg().modify(|w| w.set_swap_bank(!banks_swapped())); + + // load option bytes + pac::FLASH.optcr().modify(|w| w.set_optstrt(true)); + while pac::FLASH.optcr().read().optstrt() {} + + // re-lock OPTLOCK + pac::FLASH.optcr().modify(|w| w.set_optlock(true)); +} + fn sr_busy(sr: Nssr) -> bool { // Note: RM0492 sometimes incorrectly refers to WBNE as NSWBNE sr.bsy() || sr.dbne() || sr.wbne() From 41415fae0de4eade937f36c908d5cacdc06588bd Mon Sep 17 00:00:00 2001 From: Boris Faure Date: Sun, 14 Apr 2024 15:46:19 +0200 Subject: [PATCH 143/581] =?UTF-8?q?usb/hid:=20make=20RequestHandler::set?= =?UTF-8?q?=5Freport(&mut=20self,=E2=80=A6)?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit That way, it is possible to change some fields in the RequestHandler based on outside report. --- embassy-usb/src/class/hid.rs | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git a/embassy-usb/src/class/hid.rs b/embassy-usb/src/class/hid.rs index 0000b5b2b..7d27c2578 100644 --- a/embassy-usb/src/class/hid.rs +++ b/embassy-usb/src/class/hid.rs @@ -37,7 +37,7 @@ pub struct Config<'d> { pub report_descriptor: &'d [u8], /// Handler for control requests. - pub request_handler: Option<&'d dyn RequestHandler>, + pub request_handler: Option<&'d mut dyn RequestHandler>, /// Configures how frequently the host should poll for reading/writing HID reports. /// @@ -299,7 +299,7 @@ impl<'d, D: Driver<'d>, const N: usize> HidReader<'d, D, N> { /// /// If `use_report_ids` is true, the first byte of the report will be used as /// the `ReportId` value. Otherwise the `ReportId` value will be 0. - pub async fn run(mut self, use_report_ids: bool, handler: &T) -> ! { + pub async fn run(mut self, use_report_ids: bool, handler: &mut T) -> ! { let offset = self.offset.load(Ordering::Acquire); assert!(offset == 0); let mut buf = [0; N]; @@ -384,7 +384,7 @@ pub trait RequestHandler { } /// Sets the value of report `id` to `data`. - fn set_report(&self, id: ReportId, data: &[u8]) -> OutResponse { + fn set_report(&mut self, id: ReportId, data: &[u8]) -> OutResponse { let _ = (id, data); OutResponse::Rejected } @@ -411,7 +411,7 @@ pub trait RequestHandler { struct Control<'d> { if_num: InterfaceNumber, report_descriptor: &'d [u8], - request_handler: Option<&'d dyn RequestHandler>, + request_handler: Option<&'d mut dyn RequestHandler>, out_report_offset: &'d AtomicUsize, hid_descriptor: [u8; 9], } @@ -420,7 +420,7 @@ impl<'d> Control<'d> { fn new( if_num: InterfaceNumber, report_descriptor: &'d [u8], - request_handler: Option<&'d dyn RequestHandler>, + request_handler: Option<&'d mut dyn RequestHandler>, out_report_offset: &'d AtomicUsize, ) -> Self { Control { @@ -468,7 +468,7 @@ impl<'d> Handler for Control<'d> { trace!("HID control_out {:?} {=[u8]:x}", req, data); match req.request { HID_REQ_SET_IDLE => { - if let Some(handler) = self.request_handler { + if let Some(handler) = self.request_handler.as_mut() { let id = req.value as u8; let id = (id != 0).then_some(ReportId::In(id)); let dur = u32::from(req.value >> 8); @@ -477,7 +477,7 @@ impl<'d> Handler for Control<'d> { } Some(OutResponse::Accepted) } - HID_REQ_SET_REPORT => match (ReportId::try_from(req.value), self.request_handler) { + HID_REQ_SET_REPORT => match (ReportId::try_from(req.value), self.request_handler.as_mut()) { (Ok(id), Some(handler)) => Some(handler.set_report(id, data)), _ => Some(OutResponse::Rejected), }, @@ -513,7 +513,7 @@ impl<'d> Handler for Control<'d> { match req.request { HID_REQ_GET_REPORT => { let size = match ReportId::try_from(req.value) { - Ok(id) => self.request_handler.and_then(|x| x.get_report(id, buf)), + Ok(id) => self.request_handler.as_mut().and_then(|x| x.get_report(id, buf)), Err(_) => None, }; @@ -524,7 +524,7 @@ impl<'d> Handler for Control<'d> { } } HID_REQ_GET_IDLE => { - if let Some(handler) = self.request_handler { + if let Some(handler) = self.request_handler.as_mut() { let id = req.value as u8; let id = (id != 0).then_some(ReportId::In(id)); if let Some(dur) = handler.get_idle_ms(id) { From 9341ef3b47f67b549b3d202974a2d4a0d62587f1 Mon Sep 17 00:00:00 2001 From: Boris Faure Date: Sun, 14 Apr 2024 16:06:21 +0200 Subject: [PATCH 144/581] examples: request_handler is mutable --- examples/nrf52840/src/bin/usb_hid_keyboard.rs | 8 ++++---- examples/nrf52840/src/bin/usb_hid_mouse.rs | 6 +++--- examples/rp/src/bin/usb_hid_keyboard.rs | 8 ++++---- examples/rp/src/bin/usb_hid_mouse.rs | 8 ++++---- examples/stm32f4/src/bin/usb_hid_keyboard.rs | 8 ++++---- examples/stm32f4/src/bin/usb_hid_mouse.rs | 6 +++--- examples/stm32l5/src/bin/usb_hid_mouse.rs | 6 +++--- 7 files changed, 25 insertions(+), 25 deletions(-) diff --git a/examples/nrf52840/src/bin/usb_hid_keyboard.rs b/examples/nrf52840/src/bin/usb_hid_keyboard.rs index 52f081487..39b39dcd0 100644 --- a/examples/nrf52840/src/bin/usb_hid_keyboard.rs +++ b/examples/nrf52840/src/bin/usb_hid_keyboard.rs @@ -54,7 +54,7 @@ async fn main(_spawner: Spawner) { let mut bos_descriptor = [0; 256]; let mut msos_descriptor = [0; 256]; let mut control_buf = [0; 64]; - let request_handler = MyRequestHandler {}; + let mut request_handler = MyRequestHandler {}; let mut device_handler = MyDeviceHandler::new(); let mut state = State::new(); @@ -73,7 +73,7 @@ async fn main(_spawner: Spawner) { // Create classes on the builder. let config = embassy_usb::class::hid::Config { report_descriptor: KeyboardReport::desc(), - request_handler: Some(&request_handler), + request_handler: None, poll_ms: 60, max_packet_size: 64, }; @@ -137,7 +137,7 @@ async fn main(_spawner: Spawner) { }; let out_fut = async { - reader.run(false, &request_handler).await; + reader.run(false, &mut request_handler).await; }; // Run everything concurrently. @@ -153,7 +153,7 @@ impl RequestHandler for MyRequestHandler { None } - fn set_report(&self, id: ReportId, data: &[u8]) -> OutResponse { + fn set_report(&mut self, id: ReportId, data: &[u8]) -> OutResponse { info!("Set report for {:?}: {=[u8]}", id, data); OutResponse::Accepted } diff --git a/examples/nrf52840/src/bin/usb_hid_mouse.rs b/examples/nrf52840/src/bin/usb_hid_mouse.rs index 5d2837793..d86e96270 100644 --- a/examples/nrf52840/src/bin/usb_hid_mouse.rs +++ b/examples/nrf52840/src/bin/usb_hid_mouse.rs @@ -47,7 +47,7 @@ async fn main(_spawner: Spawner) { let mut bos_descriptor = [0; 256]; let mut msos_descriptor = [0; 256]; let mut control_buf = [0; 64]; - let request_handler = MyRequestHandler {}; + let mut request_handler = MyRequestHandler {}; let mut state = State::new(); @@ -63,7 +63,7 @@ async fn main(_spawner: Spawner) { // Create classes on the builder. let config = embassy_usb::class::hid::Config { report_descriptor: MouseReport::desc(), - request_handler: Some(&request_handler), + request_handler: Some(&mut request_handler), poll_ms: 60, max_packet_size: 8, }; @@ -110,7 +110,7 @@ impl RequestHandler for MyRequestHandler { None } - fn set_report(&self, id: ReportId, data: &[u8]) -> OutResponse { + fn set_report(&mut self, id: ReportId, data: &[u8]) -> OutResponse { info!("Set report for {:?}: {=[u8]}", id, data); OutResponse::Accepted } diff --git a/examples/rp/src/bin/usb_hid_keyboard.rs b/examples/rp/src/bin/usb_hid_keyboard.rs index 710be8d13..53385e929 100644 --- a/examples/rp/src/bin/usb_hid_keyboard.rs +++ b/examples/rp/src/bin/usb_hid_keyboard.rs @@ -41,7 +41,7 @@ async fn main(_spawner: Spawner) { // You can also add a Microsoft OS descriptor. let mut msos_descriptor = [0; 256]; let mut control_buf = [0; 64]; - let request_handler = MyRequestHandler {}; + let mut request_handler = MyRequestHandler {}; let mut device_handler = MyDeviceHandler::new(); let mut state = State::new(); @@ -60,7 +60,7 @@ async fn main(_spawner: Spawner) { // Create classes on the builder. let config = embassy_usb::class::hid::Config { report_descriptor: KeyboardReport::desc(), - request_handler: Some(&request_handler), + request_handler: None, poll_ms: 60, max_packet_size: 64, }; @@ -114,7 +114,7 @@ async fn main(_spawner: Spawner) { }; let out_fut = async { - reader.run(false, &request_handler).await; + reader.run(false, &mut request_handler).await; }; // Run everything concurrently. @@ -130,7 +130,7 @@ impl RequestHandler for MyRequestHandler { None } - fn set_report(&self, id: ReportId, data: &[u8]) -> OutResponse { + fn set_report(&mut self, id: ReportId, data: &[u8]) -> OutResponse { info!("Set report for {:?}: {=[u8]}", id, data); OutResponse::Accepted } diff --git a/examples/rp/src/bin/usb_hid_mouse.rs b/examples/rp/src/bin/usb_hid_mouse.rs index e8b399cb1..3c911511e 100644 --- a/examples/rp/src/bin/usb_hid_mouse.rs +++ b/examples/rp/src/bin/usb_hid_mouse.rs @@ -44,7 +44,7 @@ async fn main(_spawner: Spawner) { // You can also add a Microsoft OS descriptor. let mut msos_descriptor = [0; 256]; let mut control_buf = [0; 64]; - let request_handler = MyRequestHandler {}; + let mut request_handler = MyRequestHandler {}; let mut device_handler = MyDeviceHandler::new(); let mut state = State::new(); @@ -63,7 +63,7 @@ async fn main(_spawner: Spawner) { // Create classes on the builder. let config = embassy_usb::class::hid::Config { report_descriptor: MouseReport::desc(), - request_handler: Some(&request_handler), + request_handler: None, poll_ms: 60, max_packet_size: 64, }; @@ -106,7 +106,7 @@ async fn main(_spawner: Spawner) { }; let out_fut = async { - reader.run(false, &request_handler).await; + reader.run(false, &mut request_handler).await; }; // Run everything concurrently. @@ -122,7 +122,7 @@ impl RequestHandler for MyRequestHandler { None } - fn set_report(&self, id: ReportId, data: &[u8]) -> OutResponse { + fn set_report(&mut self, id: ReportId, data: &[u8]) -> OutResponse { info!("Set report for {:?}: {=[u8]}", id, data); OutResponse::Accepted } diff --git a/examples/stm32f4/src/bin/usb_hid_keyboard.rs b/examples/stm32f4/src/bin/usb_hid_keyboard.rs index d6e0be5ea..709f3dccc 100644 --- a/examples/stm32f4/src/bin/usb_hid_keyboard.rs +++ b/examples/stm32f4/src/bin/usb_hid_keyboard.rs @@ -76,7 +76,7 @@ async fn main(_spawner: Spawner) { let mut msos_descriptor = [0; 256]; let mut control_buf = [0; 64]; - let request_handler = MyRequestHandler {}; + let mut request_handler = MyRequestHandler {}; let mut device_handler = MyDeviceHandler::new(); let mut state = State::new(); @@ -95,7 +95,7 @@ async fn main(_spawner: Spawner) { // Create classes on the builder. let config = embassy_usb::class::hid::Config { report_descriptor: KeyboardReport::desc(), - request_handler: Some(&request_handler), + request_handler: None, poll_ms: 60, max_packet_size: 8, }; @@ -148,7 +148,7 @@ async fn main(_spawner: Spawner) { }; let out_fut = async { - reader.run(false, &request_handler).await; + reader.run(false, &mut request_handler).await; }; // Run everything concurrently. @@ -164,7 +164,7 @@ impl RequestHandler for MyRequestHandler { None } - fn set_report(&self, id: ReportId, data: &[u8]) -> OutResponse { + fn set_report(&mut self, id: ReportId, data: &[u8]) -> OutResponse { info!("Set report for {:?}: {=[u8]}", id, data); OutResponse::Accepted } diff --git a/examples/stm32f4/src/bin/usb_hid_mouse.rs b/examples/stm32f4/src/bin/usb_hid_mouse.rs index 0bc236119..0d08d34a2 100644 --- a/examples/stm32f4/src/bin/usb_hid_mouse.rs +++ b/examples/stm32f4/src/bin/usb_hid_mouse.rs @@ -68,7 +68,7 @@ async fn main(_spawner: Spawner) { let mut bos_descriptor = [0; 256]; let mut control_buf = [0; 64]; - let request_handler = MyRequestHandler {}; + let mut request_handler = MyRequestHandler {}; let mut state = State::new(); @@ -84,7 +84,7 @@ async fn main(_spawner: Spawner) { // Create classes on the builder. let config = embassy_usb::class::hid::Config { report_descriptor: MouseReport::desc(), - request_handler: Some(&request_handler), + request_handler: Some(&mut request_handler), poll_ms: 60, max_packet_size: 8, }; @@ -131,7 +131,7 @@ impl RequestHandler for MyRequestHandler { None } - fn set_report(&self, id: ReportId, data: &[u8]) -> OutResponse { + fn set_report(&mut self, id: ReportId, data: &[u8]) -> OutResponse { info!("Set report for {:?}: {=[u8]}", id, data); OutResponse::Accepted } diff --git a/examples/stm32l5/src/bin/usb_hid_mouse.rs b/examples/stm32l5/src/bin/usb_hid_mouse.rs index 9d30205bb..b340c5df5 100644 --- a/examples/stm32l5/src/bin/usb_hid_mouse.rs +++ b/examples/stm32l5/src/bin/usb_hid_mouse.rs @@ -54,7 +54,7 @@ async fn main(_spawner: Spawner) { let mut config_descriptor = [0; 256]; let mut bos_descriptor = [0; 256]; let mut control_buf = [0; 64]; - let request_handler = MyRequestHandler {}; + let mut request_handler = MyRequestHandler {}; let mut state = State::new(); @@ -70,7 +70,7 @@ async fn main(_spawner: Spawner) { // Create classes on the builder. let config = embassy_usb::class::hid::Config { report_descriptor: MouseReport::desc(), - request_handler: Some(&request_handler), + request_handler: Some(&mut request_handler), poll_ms: 60, max_packet_size: 8, }; @@ -117,7 +117,7 @@ impl RequestHandler for MyRequestHandler { None } - fn set_report(&self, id: ReportId, data: &[u8]) -> OutResponse { + fn set_report(&mut self, id: ReportId, data: &[u8]) -> OutResponse { info!("Set report for {:?}: {=[u8]}", id, data); OutResponse::Accepted } From ae4fb433aef33cfc7993516f880de85d87fa37d8 Mon Sep 17 00:00:00 2001 From: Boris Faure Date: Mon, 15 Apr 2024 19:53:46 +0200 Subject: [PATCH 145/581] usb-hid: all the RequestHandler method accept &mut self --- embassy-usb/src/class/hid.rs | 6 +++--- examples/nrf52840/src/bin/usb_hid_keyboard.rs | 6 +++--- examples/nrf52840/src/bin/usb_hid_mouse.rs | 6 +++--- examples/rp/src/bin/usb_hid_keyboard.rs | 6 +++--- examples/rp/src/bin/usb_hid_mouse.rs | 6 +++--- examples/stm32f4/src/bin/usb_hid_keyboard.rs | 6 +++--- examples/stm32f4/src/bin/usb_hid_mouse.rs | 6 +++--- examples/stm32l5/src/bin/usb_hid_mouse.rs | 6 +++--- 8 files changed, 24 insertions(+), 24 deletions(-) diff --git a/embassy-usb/src/class/hid.rs b/embassy-usb/src/class/hid.rs index 7d27c2578..6d9e0aced 100644 --- a/embassy-usb/src/class/hid.rs +++ b/embassy-usb/src/class/hid.rs @@ -378,7 +378,7 @@ pub trait RequestHandler { /// Reads the value of report `id` into `buf` returning the size. /// /// Returns `None` if `id` is invalid or no data is available. - fn get_report(&self, id: ReportId, buf: &mut [u8]) -> Option { + fn get_report(&mut self, id: ReportId, buf: &mut [u8]) -> Option { let _ = (id, buf); None } @@ -394,7 +394,7 @@ pub trait RequestHandler { /// If `id` is `None`, get the idle rate for all reports. Returning `None` /// will reject the control request. Any duration at or above 1.024 seconds /// or below 4ms will be returned as an indefinite idle rate. - fn get_idle_ms(&self, id: Option) -> Option { + fn get_idle_ms(&mut self, id: Option) -> Option { let _ = id; None } @@ -403,7 +403,7 @@ pub trait RequestHandler { /// /// If `id` is `None`, set the idle rate of all input reports to `dur`. If /// an indefinite duration is requested, `dur` will be set to `u32::MAX`. - fn set_idle_ms(&self, id: Option, duration_ms: u32) { + fn set_idle_ms(&mut self, id: Option, duration_ms: u32) { let _ = (id, duration_ms); } } diff --git a/examples/nrf52840/src/bin/usb_hid_keyboard.rs b/examples/nrf52840/src/bin/usb_hid_keyboard.rs index 39b39dcd0..e33ee5866 100644 --- a/examples/nrf52840/src/bin/usb_hid_keyboard.rs +++ b/examples/nrf52840/src/bin/usb_hid_keyboard.rs @@ -148,7 +148,7 @@ async fn main(_spawner: Spawner) { struct MyRequestHandler {} impl RequestHandler for MyRequestHandler { - fn get_report(&self, id: ReportId, _buf: &mut [u8]) -> Option { + fn get_report(&mut self, id: ReportId, _buf: &mut [u8]) -> Option { info!("Get report for {:?}", id); None } @@ -158,11 +158,11 @@ impl RequestHandler for MyRequestHandler { OutResponse::Accepted } - fn set_idle_ms(&self, id: Option, dur: u32) { + fn set_idle_ms(&mut self, id: Option, dur: u32) { info!("Set idle rate for {:?} to {:?}", id, dur); } - fn get_idle_ms(&self, id: Option) -> Option { + fn get_idle_ms(&mut self, id: Option) -> Option { info!("Get idle rate for {:?}", id); None } diff --git a/examples/nrf52840/src/bin/usb_hid_mouse.rs b/examples/nrf52840/src/bin/usb_hid_mouse.rs index d86e96270..8076ac283 100644 --- a/examples/nrf52840/src/bin/usb_hid_mouse.rs +++ b/examples/nrf52840/src/bin/usb_hid_mouse.rs @@ -105,7 +105,7 @@ async fn main(_spawner: Spawner) { struct MyRequestHandler {} impl RequestHandler for MyRequestHandler { - fn get_report(&self, id: ReportId, _buf: &mut [u8]) -> Option { + fn get_report(&mut self, id: ReportId, _buf: &mut [u8]) -> Option { info!("Get report for {:?}", id); None } @@ -115,11 +115,11 @@ impl RequestHandler for MyRequestHandler { OutResponse::Accepted } - fn set_idle_ms(&self, id: Option, dur: u32) { + fn set_idle_ms(&mut self, id: Option, dur: u32) { info!("Set idle rate for {:?} to {:?}", id, dur); } - fn get_idle_ms(&self, id: Option) -> Option { + fn get_idle_ms(&mut self, id: Option) -> Option { info!("Get idle rate for {:?}", id); None } diff --git a/examples/rp/src/bin/usb_hid_keyboard.rs b/examples/rp/src/bin/usb_hid_keyboard.rs index 53385e929..a7cb322d8 100644 --- a/examples/rp/src/bin/usb_hid_keyboard.rs +++ b/examples/rp/src/bin/usb_hid_keyboard.rs @@ -125,7 +125,7 @@ async fn main(_spawner: Spawner) { struct MyRequestHandler {} impl RequestHandler for MyRequestHandler { - fn get_report(&self, id: ReportId, _buf: &mut [u8]) -> Option { + fn get_report(&mut self, id: ReportId, _buf: &mut [u8]) -> Option { info!("Get report for {:?}", id); None } @@ -135,11 +135,11 @@ impl RequestHandler for MyRequestHandler { OutResponse::Accepted } - fn set_idle_ms(&self, id: Option, dur: u32) { + fn set_idle_ms(&mut self, id: Option, dur: u32) { info!("Set idle rate for {:?} to {:?}", id, dur); } - fn get_idle_ms(&self, id: Option) -> Option { + fn get_idle_ms(&mut self, id: Option) -> Option { info!("Get idle rate for {:?}", id); None } diff --git a/examples/rp/src/bin/usb_hid_mouse.rs b/examples/rp/src/bin/usb_hid_mouse.rs index 3c911511e..cce344fb0 100644 --- a/examples/rp/src/bin/usb_hid_mouse.rs +++ b/examples/rp/src/bin/usb_hid_mouse.rs @@ -117,7 +117,7 @@ async fn main(_spawner: Spawner) { struct MyRequestHandler {} impl RequestHandler for MyRequestHandler { - fn get_report(&self, id: ReportId, _buf: &mut [u8]) -> Option { + fn get_report(&mut self, id: ReportId, _buf: &mut [u8]) -> Option { info!("Get report for {:?}", id); None } @@ -127,11 +127,11 @@ impl RequestHandler for MyRequestHandler { OutResponse::Accepted } - fn set_idle_ms(&self, id: Option, dur: u32) { + fn set_idle_ms(&mut self, id: Option, dur: u32) { info!("Set idle rate for {:?} to {:?}", id, dur); } - fn get_idle_ms(&self, id: Option) -> Option { + fn get_idle_ms(&mut self, id: Option) -> Option { info!("Get idle rate for {:?}", id); None } diff --git a/examples/stm32f4/src/bin/usb_hid_keyboard.rs b/examples/stm32f4/src/bin/usb_hid_keyboard.rs index 709f3dccc..f6d1395e8 100644 --- a/examples/stm32f4/src/bin/usb_hid_keyboard.rs +++ b/examples/stm32f4/src/bin/usb_hid_keyboard.rs @@ -159,7 +159,7 @@ async fn main(_spawner: Spawner) { struct MyRequestHandler {} impl RequestHandler for MyRequestHandler { - fn get_report(&self, id: ReportId, _buf: &mut [u8]) -> Option { + fn get_report(&mut self, id: ReportId, _buf: &mut [u8]) -> Option { info!("Get report for {:?}", id); None } @@ -169,11 +169,11 @@ impl RequestHandler for MyRequestHandler { OutResponse::Accepted } - fn set_idle_ms(&self, id: Option, dur: u32) { + fn set_idle_ms(&mut self, id: Option, dur: u32) { info!("Set idle rate for {:?} to {:?}", id, dur); } - fn get_idle_ms(&self, id: Option) -> Option { + fn get_idle_ms(&mut self, id: Option) -> Option { info!("Get idle rate for {:?}", id); None } diff --git a/examples/stm32f4/src/bin/usb_hid_mouse.rs b/examples/stm32f4/src/bin/usb_hid_mouse.rs index 0d08d34a2..2cff9294a 100644 --- a/examples/stm32f4/src/bin/usb_hid_mouse.rs +++ b/examples/stm32f4/src/bin/usb_hid_mouse.rs @@ -126,7 +126,7 @@ async fn main(_spawner: Spawner) { struct MyRequestHandler {} impl RequestHandler for MyRequestHandler { - fn get_report(&self, id: ReportId, _buf: &mut [u8]) -> Option { + fn get_report(&mut self, id: ReportId, _buf: &mut [u8]) -> Option { info!("Get report for {:?}", id); None } @@ -136,11 +136,11 @@ impl RequestHandler for MyRequestHandler { OutResponse::Accepted } - fn set_idle_ms(&self, id: Option, dur: u32) { + fn set_idle_ms(&mut self, id: Option, dur: u32) { info!("Set idle rate for {:?} to {:?}", id, dur); } - fn get_idle_ms(&self, id: Option) -> Option { + fn get_idle_ms(&mut self, id: Option) -> Option { info!("Get idle rate for {:?}", id); None } diff --git a/examples/stm32l5/src/bin/usb_hid_mouse.rs b/examples/stm32l5/src/bin/usb_hid_mouse.rs index b340c5df5..3f8c52b82 100644 --- a/examples/stm32l5/src/bin/usb_hid_mouse.rs +++ b/examples/stm32l5/src/bin/usb_hid_mouse.rs @@ -112,7 +112,7 @@ async fn main(_spawner: Spawner) { struct MyRequestHandler {} impl RequestHandler for MyRequestHandler { - fn get_report(&self, id: ReportId, _buf: &mut [u8]) -> Option { + fn get_report(&mut self, id: ReportId, _buf: &mut [u8]) -> Option { info!("Get report for {:?}", id); None } @@ -122,11 +122,11 @@ impl RequestHandler for MyRequestHandler { OutResponse::Accepted } - fn set_idle_ms(&self, id: Option, dur: u32) { + fn set_idle_ms(&mut self, id: Option, dur: u32) { info!("Set idle rate for {:?} to {:?}", id, dur); } - fn get_idle_ms(&self, id: Option) -> Option { + fn get_idle_ms(&mut self, id: Option) -> Option { info!("Get idle rate for {:?}", id); None } From 6ffecb1250bbbdf7f1336479d8f7b7aa1fd00285 Mon Sep 17 00:00:00 2001 From: Jack Hogan Date: Mon, 15 Apr 2024 14:11:28 -0400 Subject: [PATCH 146/581] Added MAC address getter to cyw43 controller --- cyw43/src/control.rs | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/cyw43/src/control.rs b/cyw43/src/control.rs index 135b8c245..a3808f56f 100644 --- a/cyw43/src/control.rs +++ b/cyw43/src/control.rs @@ -124,8 +124,7 @@ impl<'a> Control<'a> { self.set_iovar_u32("apsta", 1).await; // read MAC addr. - let mut mac_addr = [0; 6]; - assert_eq!(self.get_iovar("cur_etheraddr", &mut mac_addr).await, 6); + let mac_addr = self.address().await; debug!("mac addr: {:02x}", Bytes(&mac_addr)); let country = countries::WORLD_WIDE_XX; @@ -574,6 +573,13 @@ impl<'a> Control<'a> { self.ioctl(IoctlType::Set, IOCTL_CMD_DISASSOC, 0, &mut []).await; info!("Disassociated") } + + /// Gets the MAC address of the device + pub async fn address(&mut self) -> [u8; 6] { + let mut mac_addr = [0; 6]; + assert_eq!(self.get_iovar("cur_etheraddr", &mut mac_addr).await, 6); + mac_addr + } } /// WiFi network scanner. From 40e7ea47bac9afc70696a66010b28928535ca075 Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Mon, 15 Apr 2024 20:20:48 +0200 Subject: [PATCH 147/581] temporarily disable stm32l152re/usart_rx_ringbuffered test. --- ci.sh | 3 +++ 1 file changed, 3 insertions(+) diff --git a/ci.sh b/ci.sh index 1393b9d47..514c6769b 100755 --- a/ci.sh +++ b/ci.sh @@ -253,6 +253,9 @@ rm out/tests/stm32f207zg/eth # doesn't work, gives "noise error", no idea why. usart_dma does pass. rm out/tests/stm32u5a5zj/usart +# flaky, perhaps bad wire +rm out/tests/stm32l152re/usart_rx_ringbuffered + if [[ -z "${TELEPROBE_TOKEN-}" ]]; then echo No teleprobe token found, skipping running HIL tests exit From 2fa0bb7d6eaf73dcb589f831b97559f5b81bb9c1 Mon Sep 17 00:00:00 2001 From: Warren Campbell Date: Mon, 15 Apr 2024 14:54:01 -0400 Subject: [PATCH 148/581] Use non-secure registers for u5 flash --- embassy-stm32/src/flash/u5.rs | 28 ++++++++++++++-------------- 1 file changed, 14 insertions(+), 14 deletions(-) diff --git a/embassy-stm32/src/flash/u5.rs b/embassy-stm32/src/flash/u5.rs index 580c490da..4a2168b14 100644 --- a/embassy-stm32/src/flash/u5.rs +++ b/embassy-stm32/src/flash/u5.rs @@ -14,26 +14,26 @@ pub(crate) const fn get_flash_regions() -> &'static [&'static FlashRegion] { } pub(crate) unsafe fn lock() { - pac::FLASH.seccr().modify(|w| w.set_lock(true)); + pac::FLASH.nscr().modify(|w| w.set_lock(true)); } pub(crate) unsafe fn unlock() { - if pac::FLASH.seccr().read().lock() { - pac::FLASH.seckeyr().write_value(0x4567_0123); - pac::FLASH.seckeyr().write_value(0xCDEF_89AB); + if pac::FLASH.nscr().read().lock() { + pac::FLASH.nskeyr().write_value(0x4567_0123); + pac::FLASH.nskeyr().write_value(0xCDEF_89AB); } } pub(crate) unsafe fn enable_blocking_write() { assert_eq!(0, WRITE_SIZE % 4); - pac::FLASH.seccr().write(|w| { - w.set_pg(pac::flash::vals::SeccrPg::B_0X1); + pac::FLASH.nscr().write(|w| { + w.set_pg(pac::flash::vals::NscrPg::B_0X1); }); } pub(crate) unsafe fn disable_blocking_write() { - pac::FLASH.seccr().write(|w| w.set_pg(pac::flash::vals::SeccrPg::B_0X0)); + pac::FLASH.nscr().write(|w| w.set_pg(pac::flash::vals::NscrPg::B_0X0)); } pub(crate) unsafe fn blocking_write(start_address: u32, buf: &[u8; WRITE_SIZE]) -> Result<(), Error> { @@ -50,19 +50,19 @@ pub(crate) unsafe fn blocking_write(start_address: u32, buf: &[u8; WRITE_SIZE]) } pub(crate) unsafe fn blocking_erase_sector(sector: &FlashSector) -> Result<(), Error> { - pac::FLASH.seccr().modify(|w| { - w.set_per(pac::flash::vals::SeccrPer::B_0X1); + pac::FLASH.nscr().modify(|w| { + w.set_per(pac::flash::vals::NscrPer::B_0X1); w.set_pnb(sector.index_in_bank) }); - pac::FLASH.seccr().modify(|w| { + pac::FLASH.nscr().modify(|w| { w.set_strt(true); }); let ret: Result<(), Error> = blocking_wait_ready(); pac::FLASH - .seccr() - .modify(|w| w.set_per(pac::flash::vals::SeccrPer::B_0X0)); + .nscr() + .modify(|w| w.set_per(pac::flash::vals::NscrPer::B_0X0)); clear_all_err(); ret } @@ -70,12 +70,12 @@ pub(crate) unsafe fn blocking_erase_sector(sector: &FlashSector) -> Result<(), E pub(crate) unsafe fn clear_all_err() { // read and write back the same value. // This clears all "write 1 to clear" bits. - pac::FLASH.secsr().modify(|_| {}); + pac::FLASH.nssr().modify(|_| {}); } unsafe fn blocking_wait_ready() -> Result<(), Error> { loop { - let sr = pac::FLASH.secsr().read(); + let sr = pac::FLASH.nssr().read(); if !sr.bsy() { if sr.pgserr() { From be087e5d43326178878878bebae96f3b51a3b184 Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Mon, 15 Apr 2024 21:19:17 +0200 Subject: [PATCH 149/581] stm32/spi: remove DMA generic params. --- .vscode/settings.json | 3 +- embassy-stm32/src/i2s.rs | 24 +- embassy-stm32/src/lib.rs | 23 + embassy-stm32/src/spi/mod.rs | 671 ++++++++++-------- embassy-stm32/src/traits.rs | 23 + examples/stm32f4/src/bin/spi.rs | 3 +- examples/stm32f4/src/bin/ws2812_spi.rs | 4 +- examples/stm32g0/src/bin/spi_neopixel.rs | 3 +- examples/stm32h7/src/bin/spi.rs | 6 +- examples/stm32h7/src/bin/spi_dma.rs | 6 +- examples/stm32l0/src/bin/spi.rs | 3 +- examples/stm32l1/src/bin/spi.rs | 3 +- .../src/bin/spe_adin1110_http_server.rs | 24 +- examples/stm32l4/src/bin/spi.rs | 3 +- .../stm32l4/src/bin/spi_blocking_async.rs | 3 +- tests/stm32/src/bin/spi.rs | 5 +- 16 files changed, 442 insertions(+), 365 deletions(-) diff --git a/.vscode/settings.json b/.vscode/settings.json index 0c195a13b..220d25914 100644 --- a/.vscode/settings.json +++ b/.vscode/settings.json @@ -15,10 +15,11 @@ "rust-analyzer.cargo.target": "thumbv7em-none-eabi", //"rust-analyzer.cargo.target": "thumbv8m.main-none-eabihf", "rust-analyzer.cargo.features": [ - "stm32f103c8", + "stm32f446re", "time-driver-any", "unstable-pac", "exti", + "rt", ], "rust-analyzer.linkedProjects": [ // Uncomment ONE line for the chip you want to work on. diff --git a/embassy-stm32/src/i2s.rs b/embassy-stm32/src/i2s.rs index c5a606b21..9b80dc1d0 100644 --- a/embassy-stm32/src/i2s.rs +++ b/embassy-stm32/src/i2s.rs @@ -2,6 +2,7 @@ use embassy_hal_internal::into_ref; use crate::gpio::{AFType, AnyPin, SealedPin}; +use crate::mode::Async; use crate::pac::spi::vals; use crate::spi::{Config as SpiConfig, *}; use crate::time::Hertz; @@ -152,15 +153,15 @@ impl Default for Config { } /// I2S driver. -pub struct I2S<'d, T: Instance, Tx, Rx> { - _peri: Spi<'d, T, Tx, Rx>, +pub struct I2S<'d, T: Instance> { + _peri: Spi<'d, T, Async>, sd: Option>, ws: Option>, ck: Option>, mck: Option>, } -impl<'d, T: Instance, Tx, Rx> I2S<'d, T, Tx, Rx> { +impl<'d, T: Instance> I2S<'d, T> { /// Note: Full-Duplex modes are not supported at this time pub fn new( peri: impl Peripheral

+ 'd, @@ -168,8 +169,8 @@ impl<'d, T: Instance, Tx, Rx> I2S<'d, T, Tx, Rx> { ws: impl Peripheral

> + 'd, ck: impl Peripheral

> + 'd, mck: impl Peripheral

> + 'd, - txdma: impl Peripheral

+ 'd, - rxdma: impl Peripheral

+ 'd, + txdma: impl Peripheral

> + 'd, + rxdma: impl Peripheral

> + 'd, freq: Hertz, config: Config, ) -> Self { @@ -265,24 +266,17 @@ impl<'d, T: Instance, Tx, Rx> I2S<'d, T, Tx, Rx> { } /// Write audio data. - pub async fn write(&mut self, data: &[W]) -> Result<(), Error> - where - Tx: TxDma, - { + pub async fn write(&mut self, data: &[W]) -> Result<(), Error> { self._peri.write(data).await } /// Read audio data. - pub async fn read(&mut self, data: &mut [W]) -> Result<(), Error> - where - Tx: TxDma, - Rx: RxDma, - { + pub async fn read(&mut self, data: &mut [W]) -> Result<(), Error> { self._peri.read(data).await } } -impl<'d, T: Instance, Tx, Rx> Drop for I2S<'d, T, Tx, Rx> { +impl<'d, T: Instance> Drop for I2S<'d, T> { fn drop(&mut self) { self.sd.as_ref().map(|x| x.set_as_disconnected()); self.ws.as_ref().map(|x| x.set_as_disconnected()); diff --git a/embassy-stm32/src/lib.rs b/embassy-stm32/src/lib.rs index ea17f8477..1f0f85936 100644 --- a/embassy-stm32/src/lib.rs +++ b/embassy-stm32/src/lib.rs @@ -17,6 +17,29 @@ include!(concat!(env!("OUT_DIR"), "/_macros.rs")); // Utilities pub mod time; mod traits; +/// Operating modes for peripherals. +pub mod mode { + trait SealedMode {} + + /// Operating mode for a peripheral. + #[allow(private_bounds)] + pub trait Mode: SealedMode {} + + macro_rules! impl_mode { + ($name:ident) => { + impl SealedMode for $name {} + impl Mode for $name {} + }; + } + + /// Blocking mode. + pub struct Blocking; + /// Async mode. + pub struct Async; + + impl_mode!(Blocking); + impl_mode!(Async); +} // Always-present hardware pub mod dma; diff --git a/embassy-stm32/src/spi/mod.rs b/embassy-stm32/src/spi/mod.rs index 450975f18..a4465e289 100644 --- a/embassy-stm32/src/spi/mod.rs +++ b/embassy-stm32/src/spi/mod.rs @@ -1,6 +1,7 @@ //! Serial Peripheral Interface (SPI) #![macro_use] +use core::marker::PhantomData; use core::ptr; use embassy_embedded_hal::SetConfig; @@ -8,8 +9,9 @@ use embassy_futures::join::join; use embassy_hal_internal::{into_ref, PeripheralRef}; pub use embedded_hal_02::spi::{Mode, Phase, Polarity, MODE_0, MODE_1, MODE_2, MODE_3}; -use crate::dma::{slice_ptr_parts, word, Transfer}; -use crate::gpio::{AFType, AnyPin, Pull, SealedPin as _}; +use crate::dma::{slice_ptr_parts, word, AnyChannel, Request, Transfer}; +use crate::gpio::{AFType, AnyPin, Pull, SealedPin as _, Speed}; +use crate::mode::{Async, Blocking, Mode as PeriMode}; use crate::pac::spi::{regs, vals, Spi as Regs}; use crate::rcc::RccPeripheral; use crate::time::Hertz; @@ -81,163 +83,37 @@ impl Config { BitOrder::MsbFirst => vals::Lsbfirst::MSBFIRST, } } -} + fn sck_pull_mode(&self) -> Pull { + match self.mode.polarity { + Polarity::IdleLow => Pull::Down, + Polarity::IdleHigh => Pull::Up, + } + } +} /// SPI driver. -pub struct Spi<'d, T: Instance, Tx, Rx> { +pub struct Spi<'d, T: Instance, M: PeriMode> { _peri: PeripheralRef<'d, T>, sck: Option>, mosi: Option>, miso: Option>, - txdma: PeripheralRef<'d, Tx>, - rxdma: PeripheralRef<'d, Rx>, + txdma: Option<(PeripheralRef<'d, AnyChannel>, Request)>, + rxdma: Option<(PeripheralRef<'d, AnyChannel>, Request)>, + _phantom: PhantomData, current_word_size: word_impl::Config, } -impl<'d, T: Instance, Tx, Rx> Spi<'d, T, Tx, Rx> { - /// Create a new SPI driver. - pub fn new( - peri: impl Peripheral

+ 'd, - sck: impl Peripheral

> + 'd, - mosi: impl Peripheral

> + 'd, - miso: impl Peripheral

> + 'd, - txdma: impl Peripheral

+ 'd, - rxdma: impl Peripheral

+ 'd, - config: Config, - ) -> Self { - into_ref!(peri, sck, mosi, miso); - - let sck_pull_mode = match config.mode.polarity { - Polarity::IdleLow => Pull::Down, - Polarity::IdleHigh => Pull::Up, - }; - - sck.set_as_af_pull(sck.af_num(), AFType::OutputPushPull, sck_pull_mode); - sck.set_speed(crate::gpio::Speed::VeryHigh); - mosi.set_as_af(mosi.af_num(), AFType::OutputPushPull); - mosi.set_speed(crate::gpio::Speed::VeryHigh); - miso.set_as_af(miso.af_num(), AFType::Input); - miso.set_speed(crate::gpio::Speed::VeryHigh); - - Self::new_inner( - peri, - Some(sck.map_into()), - Some(mosi.map_into()), - Some(miso.map_into()), - txdma, - rxdma, - config, - ) - } - - /// Create a new SPI driver, in RX-only mode (only MISO pin, no MOSI). - pub fn new_rxonly( - peri: impl Peripheral

+ 'd, - sck: impl Peripheral

> + 'd, - miso: impl Peripheral

> + 'd, - txdma: impl Peripheral

+ 'd, // TODO remove - rxdma: impl Peripheral

+ 'd, - config: Config, - ) -> Self { - into_ref!(sck, miso); - sck.set_as_af(sck.af_num(), AFType::OutputPushPull); - sck.set_speed(crate::gpio::Speed::VeryHigh); - miso.set_as_af(miso.af_num(), AFType::Input); - miso.set_speed(crate::gpio::Speed::VeryHigh); - - Self::new_inner( - peri, - Some(sck.map_into()), - None, - Some(miso.map_into()), - txdma, - rxdma, - config, - ) - } - - /// Create a new SPI driver, in TX-only mode (only MOSI pin, no MISO). - pub fn new_txonly( - peri: impl Peripheral

+ 'd, - sck: impl Peripheral

> + 'd, - mosi: impl Peripheral

> + 'd, - txdma: impl Peripheral

+ 'd, - rxdma: impl Peripheral

+ 'd, // TODO remove - config: Config, - ) -> Self { - into_ref!(sck, mosi); - sck.set_as_af(sck.af_num(), AFType::OutputPushPull); - sck.set_speed(crate::gpio::Speed::VeryHigh); - mosi.set_as_af(mosi.af_num(), AFType::OutputPushPull); - mosi.set_speed(crate::gpio::Speed::VeryHigh); - - Self::new_inner( - peri, - Some(sck.map_into()), - Some(mosi.map_into()), - None, - txdma, - rxdma, - config, - ) - } - - /// Create a new SPI driver, in TX-only mode, without SCK pin. - /// - /// This can be useful for bit-banging non-SPI protocols. - pub fn new_txonly_nosck( - peri: impl Peripheral

+ 'd, - mosi: impl Peripheral

> + 'd, - txdma: impl Peripheral

+ 'd, - rxdma: impl Peripheral

+ 'd, // TODO: remove - config: Config, - ) -> Self { - into_ref!(mosi); - mosi.set_as_af_pull(mosi.af_num(), AFType::OutputPushPull, Pull::Down); - mosi.set_speed(crate::gpio::Speed::Medium); - - Self::new_inner(peri, None, Some(mosi.map_into()), None, txdma, rxdma, config) - } - - #[cfg(stm32wl)] - /// Useful for on chip peripherals like SUBGHZ which are hardwired. - pub fn new_subghz( - peri: impl Peripheral

+ 'd, - txdma: impl Peripheral

+ 'd, - rxdma: impl Peripheral

+ 'd, - ) -> Self { - // see RM0453 rev 1 section 7.2.13 page 291 - // The SUBGHZSPI_SCK frequency is obtained by PCLK3 divided by two. - // The SUBGHZSPI_SCK clock maximum speed must not exceed 16 MHz. - let pclk3_freq = ::frequency().0; - let freq = Hertz(core::cmp::min(pclk3_freq / 2, 16_000_000)); - let mut config = Config::default(); - config.mode = MODE_0; - config.bit_order = BitOrder::MsbFirst; - config.frequency = freq; - Self::new_inner(peri, None, None, None, txdma, rxdma, config) - } - - #[allow(dead_code)] - pub(crate) fn new_internal( - peri: impl Peripheral

+ 'd, - txdma: impl Peripheral

+ 'd, - rxdma: impl Peripheral

+ 'd, - config: Config, - ) -> Self { - Self::new_inner(peri, None, None, None, txdma, rxdma, config) - } - +impl<'d, T: Instance, M: PeriMode> Spi<'d, T, M> { fn new_inner( peri: impl Peripheral

+ 'd, sck: Option>, mosi: Option>, miso: Option>, - txdma: impl Peripheral

+ 'd, - rxdma: impl Peripheral

+ 'd, + txdma: Option<(PeripheralRef<'d, AnyChannel>, Request)>, + rxdma: Option<(PeripheralRef<'d, AnyChannel>, Request)>, config: Config, ) -> Self { - into_ref!(peri, txdma, rxdma); + into_ref!(peri); let pclk = T::frequency(); let freq = config.frequency; @@ -336,6 +212,7 @@ impl<'d, T: Instance, Tx, Rx> Spi<'d, T, Tx, Rx> { txdma, rxdma, current_word_size: ::CONFIG, + _phantom: PhantomData, } } @@ -462,169 +339,6 @@ impl<'d, T: Instance, Tx, Rx> Spi<'d, T, Tx, Rx> { self.current_word_size = word_size; } - /// SPI write, using DMA. - pub async fn write(&mut self, data: &[W]) -> Result<(), Error> - where - Tx: TxDma, - { - if data.is_empty() { - return Ok(()); - } - - self.set_word_size(W::CONFIG); - T::REGS.cr1().modify(|w| { - w.set_spe(false); - }); - - let tx_request = self.txdma.request(); - let tx_dst = T::REGS.tx_ptr(); - let tx_f = unsafe { Transfer::new_write(&mut self.txdma, tx_request, data, tx_dst, Default::default()) }; - - set_txdmaen(T::REGS, true); - T::REGS.cr1().modify(|w| { - w.set_spe(true); - }); - #[cfg(any(spi_v3, spi_v4, spi_v5))] - T::REGS.cr1().modify(|w| { - w.set_cstart(true); - }); - - tx_f.await; - - finish_dma(T::REGS); - - Ok(()) - } - - /// SPI read, using DMA. - pub async fn read(&mut self, data: &mut [W]) -> Result<(), Error> - where - Tx: TxDma, - Rx: RxDma, - { - if data.is_empty() { - return Ok(()); - } - - self.set_word_size(W::CONFIG); - T::REGS.cr1().modify(|w| { - w.set_spe(false); - }); - - // SPIv3 clears rxfifo on SPE=0 - #[cfg(not(any(spi_v3, spi_v4, spi_v5)))] - flush_rx_fifo(T::REGS); - - set_rxdmaen(T::REGS, true); - - let clock_byte_count = data.len(); - - let rx_request = self.rxdma.request(); - let rx_src = T::REGS.rx_ptr(); - let rx_f = unsafe { Transfer::new_read(&mut self.rxdma, rx_request, rx_src, data, Default::default()) }; - - let tx_request = self.txdma.request(); - let tx_dst = T::REGS.tx_ptr(); - let clock_byte = 0x00u8; - let tx_f = unsafe { - Transfer::new_write_repeated( - &mut self.txdma, - tx_request, - &clock_byte, - clock_byte_count, - tx_dst, - Default::default(), - ) - }; - - set_txdmaen(T::REGS, true); - T::REGS.cr1().modify(|w| { - w.set_spe(true); - }); - #[cfg(any(spi_v3, spi_v4, spi_v5))] - T::REGS.cr1().modify(|w| { - w.set_cstart(true); - }); - - join(tx_f, rx_f).await; - - finish_dma(T::REGS); - - Ok(()) - } - - async fn transfer_inner(&mut self, read: *mut [W], write: *const [W]) -> Result<(), Error> - where - Tx: TxDma, - Rx: RxDma, - { - let (_, rx_len) = slice_ptr_parts(read); - let (_, tx_len) = slice_ptr_parts(write); - assert_eq!(rx_len, tx_len); - if rx_len == 0 { - return Ok(()); - } - - self.set_word_size(W::CONFIG); - T::REGS.cr1().modify(|w| { - w.set_spe(false); - }); - - // SPIv3 clears rxfifo on SPE=0 - #[cfg(not(any(spi_v3, spi_v4, spi_v5)))] - flush_rx_fifo(T::REGS); - - set_rxdmaen(T::REGS, true); - - let rx_request = self.rxdma.request(); - let rx_src = T::REGS.rx_ptr(); - let rx_f = unsafe { Transfer::new_read_raw(&mut self.rxdma, rx_request, rx_src, read, Default::default()) }; - - let tx_request = self.txdma.request(); - let tx_dst = T::REGS.tx_ptr(); - let tx_f = unsafe { Transfer::new_write_raw(&mut self.txdma, tx_request, write, tx_dst, Default::default()) }; - - set_txdmaen(T::REGS, true); - T::REGS.cr1().modify(|w| { - w.set_spe(true); - }); - #[cfg(any(spi_v3, spi_v4, spi_v5))] - T::REGS.cr1().modify(|w| { - w.set_cstart(true); - }); - - join(tx_f, rx_f).await; - - finish_dma(T::REGS); - - Ok(()) - } - - /// Bidirectional transfer, using DMA. - /// - /// This transfers both buffers at the same time, so it is NOT equivalent to `write` followed by `read`. - /// - /// The transfer runs for `max(read.len(), write.len())` bytes. If `read` is shorter extra bytes are ignored. - /// If `write` is shorter it is padded with zero bytes. - pub async fn transfer(&mut self, read: &mut [W], write: &[W]) -> Result<(), Error> - where - Tx: TxDma, - Rx: RxDma, - { - self.transfer_inner(read, write).await - } - - /// In-place bidirectional transfer, using DMA. - /// - /// This writes the contents of `data` on MOSI, and puts the received data on MISO in `data`, at the same time. - pub async fn transfer_in_place(&mut self, data: &mut [W]) -> Result<(), Error> - where - Tx: TxDma, - Rx: RxDma, - { - self.transfer_inner(data, data).await - } - /// Blocking write. pub fn blocking_write(&mut self, words: &[W]) -> Result<(), Error> { T::REGS.cr1().modify(|w| w.set_spe(true)); @@ -682,7 +396,338 @@ impl<'d, T: Instance, Tx, Rx> Spi<'d, T, Tx, Rx> { } } -impl<'d, T: Instance, Tx, Rx> Drop for Spi<'d, T, Tx, Rx> { +impl<'d, T: Instance> Spi<'d, T, Blocking> { + /// Create a new blocking SPI driver. + pub fn new_blocking( + peri: impl Peripheral

+ 'd, + sck: impl Peripheral

> + 'd, + mosi: impl Peripheral

> + 'd, + miso: impl Peripheral

> + 'd, + config: Config, + ) -> Self { + Self::new_inner( + peri, + new_pin!(sck, AFType::OutputPushPull, Speed::VeryHigh, config.sck_pull_mode()), + new_pin!(mosi, AFType::OutputPushPull, Speed::VeryHigh), + new_pin!(miso, AFType::Input, Speed::VeryHigh), + None, + None, + config, + ) + } + + /// Create a new blocking SPI driver, in RX-only mode (only MISO pin, no MOSI). + pub fn new_blocking_rxonly( + peri: impl Peripheral

+ 'd, + sck: impl Peripheral

> + 'd, + miso: impl Peripheral

> + 'd, + config: Config, + ) -> Self { + Self::new_inner( + peri, + new_pin!(sck, AFType::OutputPushPull, Speed::VeryHigh, config.sck_pull_mode()), + None, + new_pin!(miso, AFType::Input, Speed::VeryHigh), + None, + None, + config, + ) + } + + /// Create a new blocking SPI driver, in TX-only mode (only MOSI pin, no MISO). + pub fn new_blocking_txonly( + peri: impl Peripheral

+ 'd, + sck: impl Peripheral

> + 'd, + mosi: impl Peripheral

> + 'd, + config: Config, + ) -> Self { + Self::new_inner( + peri, + new_pin!(sck, AFType::OutputPushPull, Speed::VeryHigh, config.sck_pull_mode()), + new_pin!(mosi, AFType::OutputPushPull, Speed::VeryHigh), + None, + None, + None, + config, + ) + } + + /// Create a new SPI driver, in TX-only mode, without SCK pin. + /// + /// This can be useful for bit-banging non-SPI protocols. + pub fn new_blocking_txonly_nosck( + peri: impl Peripheral

+ 'd, + mosi: impl Peripheral

> + 'd, + config: Config, + ) -> Self { + Self::new_inner( + peri, + None, + new_pin!(mosi, AFType::OutputPushPull, Speed::VeryHigh), + None, + None, + None, + config, + ) + } +} + +impl<'d, T: Instance> Spi<'d, T, Async> { + /// Create a new SPI driver. + pub fn new( + peri: impl Peripheral

+ 'd, + sck: impl Peripheral

> + 'd, + mosi: impl Peripheral

> + 'd, + miso: impl Peripheral

> + 'd, + txdma: impl Peripheral

> + 'd, + rxdma: impl Peripheral

> + 'd, + config: Config, + ) -> Self { + Self::new_inner( + peri, + new_pin!(sck, AFType::OutputPushPull, Speed::VeryHigh, config.sck_pull_mode()), + new_pin!(mosi, AFType::OutputPushPull, Speed::VeryHigh), + new_pin!(miso, AFType::Input, Speed::VeryHigh), + new_dma!(txdma), + new_dma!(rxdma), + config, + ) + } + + /// Create a new SPI driver, in RX-only mode (only MISO pin, no MOSI). + pub fn new_rxonly( + peri: impl Peripheral

+ 'd, + sck: impl Peripheral

> + 'd, + miso: impl Peripheral

> + 'd, + rxdma: impl Peripheral

> + 'd, + config: Config, + ) -> Self { + Self::new_inner( + peri, + new_pin!(sck, AFType::OutputPushPull, Speed::VeryHigh, config.sck_pull_mode()), + None, + new_pin!(miso, AFType::Input, Speed::VeryHigh), + None, + new_dma!(rxdma), + config, + ) + } + + /// Create a new SPI driver, in TX-only mode (only MOSI pin, no MISO). + pub fn new_txonly( + peri: impl Peripheral

+ 'd, + sck: impl Peripheral

> + 'd, + mosi: impl Peripheral

> + 'd, + txdma: impl Peripheral

> + 'd, + config: Config, + ) -> Self { + Self::new_inner( + peri, + new_pin!(sck, AFType::OutputPushPull, Speed::VeryHigh, config.sck_pull_mode()), + new_pin!(mosi, AFType::OutputPushPull, Speed::VeryHigh), + None, + new_dma!(txdma), + None, + config, + ) + } + + /// Create a new SPI driver, in TX-only mode, without SCK pin. + /// + /// This can be useful for bit-banging non-SPI protocols. + pub fn new_txonly_nosck( + peri: impl Peripheral

+ 'd, + mosi: impl Peripheral

> + 'd, + txdma: impl Peripheral

> + 'd, + config: Config, + ) -> Self { + Self::new_inner( + peri, + None, + new_pin!(mosi, AFType::OutputPushPull, Speed::VeryHigh), + None, + new_dma!(txdma), + None, + config, + ) + } + + #[cfg(stm32wl)] + /// Useful for on chip peripherals like SUBGHZ which are hardwired. + pub fn new_subghz( + peri: impl Peripheral

+ 'd, + txdma: impl Peripheral

> + 'd, + rxdma: impl Peripheral

> + 'd, + ) -> Self { + // see RM0453 rev 1 section 7.2.13 page 291 + // The SUBGHZSPI_SCK frequency is obtained by PCLK3 divided by two. + // The SUBGHZSPI_SCK clock maximum speed must not exceed 16 MHz. + let pclk3_freq = ::frequency().0; + let freq = Hertz(core::cmp::min(pclk3_freq / 2, 16_000_000)); + let mut config = Config::default(); + config.mode = MODE_0; + config.bit_order = BitOrder::MsbFirst; + config.frequency = freq; + + Self::new_inner(peri, None, None, None, new_dma!(txdma), new_dma!(rxdma), config) + } + + #[allow(dead_code)] + pub(crate) fn new_internal( + peri: impl Peripheral

+ 'd, + txdma: impl Peripheral

> + 'd, + rxdma: impl Peripheral

> + 'd, + config: Config, + ) -> Self { + Self::new_inner(peri, None, None, None, new_dma!(txdma), new_dma!(rxdma), config) + } + + /// SPI write, using DMA. + pub async fn write(&mut self, data: &[W]) -> Result<(), Error> { + if data.is_empty() { + return Ok(()); + } + + self.set_word_size(W::CONFIG); + T::REGS.cr1().modify(|w| { + w.set_spe(false); + }); + + let (txdma, tx_request) = self.txdma.as_mut().unwrap(); + let tx_dst = T::REGS.tx_ptr(); + let tx_f = unsafe { Transfer::new_write(txdma, *tx_request, data, tx_dst, Default::default()) }; + + set_txdmaen(T::REGS, true); + T::REGS.cr1().modify(|w| { + w.set_spe(true); + }); + #[cfg(any(spi_v3, spi_v4, spi_v5))] + T::REGS.cr1().modify(|w| { + w.set_cstart(true); + }); + + tx_f.await; + + finish_dma(T::REGS); + + Ok(()) + } + + /// SPI read, using DMA. + pub async fn read(&mut self, data: &mut [W]) -> Result<(), Error> { + if data.is_empty() { + return Ok(()); + } + + self.set_word_size(W::CONFIG); + T::REGS.cr1().modify(|w| { + w.set_spe(false); + }); + + // SPIv3 clears rxfifo on SPE=0 + #[cfg(not(any(spi_v3, spi_v4, spi_v5)))] + flush_rx_fifo(T::REGS); + + set_rxdmaen(T::REGS, true); + + let clock_byte_count = data.len(); + + let (rxdma, rx_request) = self.rxdma.as_mut().unwrap(); + let rx_src = T::REGS.rx_ptr(); + let rx_f = unsafe { Transfer::new_read(rxdma, *rx_request, rx_src, data, Default::default()) }; + + let (txdma, tx_request) = self.txdma.as_mut().unwrap(); + let tx_dst = T::REGS.tx_ptr(); + let clock_byte = 0x00u8; + let tx_f = unsafe { + Transfer::new_write_repeated( + txdma, + *tx_request, + &clock_byte, + clock_byte_count, + tx_dst, + Default::default(), + ) + }; + + set_txdmaen(T::REGS, true); + T::REGS.cr1().modify(|w| { + w.set_spe(true); + }); + #[cfg(any(spi_v3, spi_v4, spi_v5))] + T::REGS.cr1().modify(|w| { + w.set_cstart(true); + }); + + join(tx_f, rx_f).await; + + finish_dma(T::REGS); + + Ok(()) + } + + async fn transfer_inner(&mut self, read: *mut [W], write: *const [W]) -> Result<(), Error> { + let (_, rx_len) = slice_ptr_parts(read); + let (_, tx_len) = slice_ptr_parts(write); + assert_eq!(rx_len, tx_len); + if rx_len == 0 { + return Ok(()); + } + + self.set_word_size(W::CONFIG); + T::REGS.cr1().modify(|w| { + w.set_spe(false); + }); + + // SPIv3 clears rxfifo on SPE=0 + #[cfg(not(any(spi_v3, spi_v4, spi_v5)))] + flush_rx_fifo(T::REGS); + + set_rxdmaen(T::REGS, true); + + let (rxdma, rx_request) = self.rxdma.as_mut().unwrap(); + let rx_src = T::REGS.rx_ptr(); + let rx_f = unsafe { Transfer::new_read_raw(rxdma, *rx_request, rx_src, read, Default::default()) }; + + let (txdma, tx_request) = self.txdma.as_mut().unwrap(); + let tx_dst = T::REGS.tx_ptr(); + let tx_f = unsafe { Transfer::new_write_raw(txdma, *tx_request, write, tx_dst, Default::default()) }; + + set_txdmaen(T::REGS, true); + T::REGS.cr1().modify(|w| { + w.set_spe(true); + }); + #[cfg(any(spi_v3, spi_v4, spi_v5))] + T::REGS.cr1().modify(|w| { + w.set_cstart(true); + }); + + join(tx_f, rx_f).await; + + finish_dma(T::REGS); + + Ok(()) + } + + /// Bidirectional transfer, using DMA. + /// + /// This transfers both buffers at the same time, so it is NOT equivalent to `write` followed by `read`. + /// + /// The transfer runs for `max(read.len(), write.len())` bytes. If `read` is shorter extra bytes are ignored. + /// If `write` is shorter it is padded with zero bytes. + pub async fn transfer(&mut self, read: &mut [W], write: &[W]) -> Result<(), Error> { + self.transfer_inner(read, write).await + } + + /// In-place bidirectional transfer, using DMA. + /// + /// This writes the contents of `data` on MOSI, and puts the received data on MISO in `data`, at the same time. + pub async fn transfer_in_place(&mut self, data: &mut [W]) -> Result<(), Error> { + self.transfer_inner(data, data).await + } +} + +impl<'d, T: Instance, M: PeriMode> Drop for Spi<'d, T, M> { fn drop(&mut self) { self.sck.as_ref().map(|x| x.set_as_disconnected()); self.mosi.as_ref().map(|x| x.set_as_disconnected()); @@ -900,7 +945,7 @@ fn transfer_word(regs: Regs, tx_word: W) -> Result { // some marker traits. For details, see https://github.com/rust-embedded/embedded-hal/pull/289 macro_rules! impl_blocking { ($w:ident) => { - impl<'d, T: Instance, Tx, Rx> embedded_hal_02::blocking::spi::Write<$w> for Spi<'d, T, Tx, Rx> { + impl<'d, T: Instance, M: PeriMode> embedded_hal_02::blocking::spi::Write<$w> for Spi<'d, T, M> { type Error = Error; fn write(&mut self, words: &[$w]) -> Result<(), Self::Error> { @@ -908,7 +953,7 @@ macro_rules! impl_blocking { } } - impl<'d, T: Instance, Tx, Rx> embedded_hal_02::blocking::spi::Transfer<$w> for Spi<'d, T, Tx, Rx> { + impl<'d, T: Instance, M: PeriMode> embedded_hal_02::blocking::spi::Transfer<$w> for Spi<'d, T, M> { type Error = Error; fn transfer<'w>(&mut self, words: &'w mut [$w]) -> Result<&'w [$w], Self::Error> { @@ -922,11 +967,11 @@ macro_rules! impl_blocking { impl_blocking!(u8); impl_blocking!(u16); -impl<'d, T: Instance, Tx, Rx> embedded_hal_1::spi::ErrorType for Spi<'d, T, Tx, Rx> { +impl<'d, T: Instance, M: PeriMode> embedded_hal_1::spi::ErrorType for Spi<'d, T, M> { type Error = Error; } -impl<'d, T: Instance, W: Word, Tx, Rx> embedded_hal_1::spi::SpiBus for Spi<'d, T, Tx, Rx> { +impl<'d, T: Instance, W: Word, M: PeriMode> embedded_hal_1::spi::SpiBus for Spi<'d, T, M> { fn flush(&mut self) -> Result<(), Self::Error> { Ok(()) } @@ -959,7 +1004,7 @@ impl embedded_hal_1::spi::Error for Error { } } -impl<'d, T: Instance, Tx: TxDma, Rx: RxDma, W: Word> embedded_hal_async::spi::SpiBus for Spi<'d, T, Tx, Rx> { +impl<'d, T: Instance, W: Word> embedded_hal_async::spi::SpiBus for Spi<'d, T, Async> { async fn flush(&mut self) -> Result<(), Self::Error> { Ok(()) } @@ -1094,7 +1139,7 @@ foreach_peripheral!( }; ); -impl<'d, T: Instance, Tx, Rx> SetConfig for Spi<'d, T, Tx, Rx> { +impl<'d, T: Instance, M: PeriMode> SetConfig for Spi<'d, T, M> { type Config = Config; type ConfigError = (); fn set_config(&mut self, config: &Self::Config) -> Result<(), ()> { diff --git a/embassy-stm32/src/traits.rs b/embassy-stm32/src/traits.rs index 13f695821..539302c49 100644 --- a/embassy-stm32/src/traits.rs +++ b/embassy-stm32/src/traits.rs @@ -69,3 +69,26 @@ macro_rules! dma_trait_impl { } }; } + +macro_rules! new_dma { + ($name:ident) => {{ + let dma = $name.into_ref(); + let req = dma.request(); + Some((dma.map_into(), req)) + }}; +} + +macro_rules! new_pin { + ($name:ident, $aftype:expr, $speed:expr) => {{ + let pin = $name.into_ref(); + pin.set_as_af(pin.af_num(), $aftype); + pin.set_speed($speed); + Some(pin.map_into()) + }}; + ($name:ident, $aftype:expr, $speed:expr, $pull:expr) => {{ + let pin = $name.into_ref(); + pin.set_as_af_pull(pin.af_num(), $aftype, $pull); + pin.set_speed($speed); + Some(pin.map_into()) + }}; +} diff --git a/examples/stm32f4/src/bin/spi.rs b/examples/stm32f4/src/bin/spi.rs index dc9141c62..970d819fc 100644 --- a/examples/stm32f4/src/bin/spi.rs +++ b/examples/stm32f4/src/bin/spi.rs @@ -3,7 +3,6 @@ use cortex_m_rt::entry; use defmt::*; -use embassy_stm32::dma::NoDma; use embassy_stm32::gpio::{Level, Output, Speed}; use embassy_stm32::spi::{Config, Spi}; use embassy_stm32::time::Hertz; @@ -18,7 +17,7 @@ fn main() -> ! { let mut spi_config = Config::default(); spi_config.frequency = Hertz(1_000_000); - let mut spi = Spi::new(p.SPI3, p.PC10, p.PC12, p.PC11, NoDma, NoDma, spi_config); + let mut spi = Spi::new_blocking(p.SPI3, p.PC10, p.PC12, p.PC11, spi_config); let mut cs = Output::new(p.PE0, Level::High, Speed::VeryHigh); diff --git a/examples/stm32f4/src/bin/ws2812_spi.rs b/examples/stm32f4/src/bin/ws2812_spi.rs index 56ccb67b8..e00d14327 100644 --- a/examples/stm32f4/src/bin/ws2812_spi.rs +++ b/examples/stm32f4/src/bin/ws2812_spi.rs @@ -13,8 +13,8 @@ #![no_std] #![no_main] +use embassy_stm32::spi; use embassy_stm32::time::khz; -use embassy_stm32::{dma, spi}; use embassy_time::{Duration, Ticker, Timer}; use {defmt_rtt as _, panic_probe as _}; @@ -78,7 +78,7 @@ async fn main(_spawner: embassy_executor::Spawner) { spi_config.frequency = khz(12_800); // Since we only output waveform, then the Rx and Sck and RxDma it is not considered - let mut ws2812_spi = spi::Spi::new_txonly_nosck(dp.SPI1, dp.PB5, dp.DMA2_CH3, dma::NoDma, spi_config); + let mut ws2812_spi = spi::Spi::new_txonly_nosck(dp.SPI1, dp.PB5, dp.DMA2_CH3, spi_config); // flip color at 2 Hz let mut ticker = Ticker::every(Duration::from_millis(500)); diff --git a/examples/stm32g0/src/bin/spi_neopixel.rs b/examples/stm32g0/src/bin/spi_neopixel.rs index c5ea51721..2deee271d 100644 --- a/examples/stm32g0/src/bin/spi_neopixel.rs +++ b/examples/stm32g0/src/bin/spi_neopixel.rs @@ -4,7 +4,6 @@ use defmt::*; use embassy_executor::Spawner; use embassy_stm32::dma::word::U5; -use embassy_stm32::dma::NoDma; use embassy_stm32::spi::{Config, Spi}; use embassy_stm32::time::Hertz; use embassy_time::Timer; @@ -77,7 +76,7 @@ async fn main(_spawner: Spawner) { let mut config = Config::default(); config.frequency = Hertz(4_000_000); - let mut spi = Spi::new_txonly_nosck(p.SPI1, p.PB5, p.DMA1_CH3, NoDma, config); + let mut spi = Spi::new_txonly_nosck(p.SPI1, p.PB5, p.DMA1_CH3, config); let mut neopixels = Ws2812::new(); diff --git a/examples/stm32h7/src/bin/spi.rs b/examples/stm32h7/src/bin/spi.rs index aed27723a..aaebdc346 100644 --- a/examples/stm32h7/src/bin/spi.rs +++ b/examples/stm32h7/src/bin/spi.rs @@ -7,7 +7,7 @@ use core::str::from_utf8; use cortex_m_rt::entry; use defmt::*; use embassy_executor::Executor; -use embassy_stm32::dma::NoDma; +use embassy_stm32::mode::Blocking; use embassy_stm32::peripherals::SPI3; use embassy_stm32::time::mhz; use embassy_stm32::{spi, Config}; @@ -16,7 +16,7 @@ use static_cell::StaticCell; use {defmt_rtt as _, panic_probe as _}; #[embassy_executor::task] -async fn main_task(mut spi: spi::Spi<'static, SPI3, NoDma, NoDma>) { +async fn main_task(mut spi: spi::Spi<'static, SPI3, Blocking>) { for n in 0u32.. { let mut write: String<128> = String::new(); core::write!(&mut write, "Hello DMA World {}!\r\n", n).unwrap(); @@ -62,7 +62,7 @@ fn main() -> ! { let mut spi_config = spi::Config::default(); spi_config.frequency = mhz(1); - let spi = spi::Spi::new(p.SPI3, p.PB3, p.PB5, p.PB4, NoDma, NoDma, spi_config); + let spi = spi::Spi::new_blocking(p.SPI3, p.PB3, p.PB5, p.PB4, spi_config); let executor = EXECUTOR.init(Executor::new()); diff --git a/examples/stm32h7/src/bin/spi_dma.rs b/examples/stm32h7/src/bin/spi_dma.rs index 54d4d7656..3d3c724eb 100644 --- a/examples/stm32h7/src/bin/spi_dma.rs +++ b/examples/stm32h7/src/bin/spi_dma.rs @@ -7,15 +7,15 @@ use core::str::from_utf8; use cortex_m_rt::entry; use defmt::*; use embassy_executor::Executor; -use embassy_stm32::peripherals::{DMA1_CH3, DMA1_CH4, SPI3}; +use embassy_stm32::mode::Async; use embassy_stm32::time::mhz; -use embassy_stm32::{spi, Config}; +use embassy_stm32::{peripherals, spi, Config}; use heapless::String; use static_cell::StaticCell; use {defmt_rtt as _, panic_probe as _}; #[embassy_executor::task] -async fn main_task(mut spi: spi::Spi<'static, SPI3, DMA1_CH3, DMA1_CH4>) { +async fn main_task(mut spi: spi::Spi<'static, peripherals::SPI3, Async>) { for n in 0u32.. { let mut write: String<128> = String::new(); let mut read = [0; 128]; diff --git a/examples/stm32l0/src/bin/spi.rs b/examples/stm32l0/src/bin/spi.rs index f23a537b8..8e0cfdedb 100644 --- a/examples/stm32l0/src/bin/spi.rs +++ b/examples/stm32l0/src/bin/spi.rs @@ -3,7 +3,6 @@ use defmt::*; use embassy_executor::Spawner; -use embassy_stm32::dma::NoDma; use embassy_stm32::gpio::{Level, Output, Speed}; use embassy_stm32::spi::{Config, Spi}; use embassy_stm32::time::Hertz; @@ -17,7 +16,7 @@ async fn main(_spawner: Spawner) { let mut spi_config = Config::default(); spi_config.frequency = Hertz(1_000_000); - let mut spi = Spi::new(p.SPI1, p.PB3, p.PA7, p.PA6, NoDma, NoDma, spi_config); + let mut spi = Spi::new_blocking(p.SPI1, p.PB3, p.PA7, p.PA6, spi_config); let mut cs = Output::new(p.PA15, Level::High, Speed::VeryHigh); diff --git a/examples/stm32l1/src/bin/spi.rs b/examples/stm32l1/src/bin/spi.rs index 8be686c5a..eabf1bac2 100644 --- a/examples/stm32l1/src/bin/spi.rs +++ b/examples/stm32l1/src/bin/spi.rs @@ -3,7 +3,6 @@ use defmt::*; use embassy_executor::Spawner; -use embassy_stm32::dma::NoDma; use embassy_stm32::gpio::{Level, Output, Speed}; use embassy_stm32::spi::{Config, Spi}; use embassy_stm32::time::Hertz; @@ -17,7 +16,7 @@ async fn main(_spawner: Spawner) { let mut spi_config = Config::default(); spi_config.frequency = Hertz(1_000_000); - let mut spi = Spi::new(p.SPI1, p.PA5, p.PA7, p.PA6, NoDma, NoDma, spi_config); + let mut spi = Spi::new_blocking(p.SPI1, p.PA5, p.PA7, p.PA6, spi_config); let mut cs = Output::new(p.PA4, Level::High, Speed::VeryHigh); diff --git a/examples/stm32l4/src/bin/spe_adin1110_http_server.rs b/examples/stm32l4/src/bin/spe_adin1110_http_server.rs index 77aa929ab..a99d08924 100644 --- a/examples/stm32l4/src/bin/spe_adin1110_http_server.rs +++ b/examples/stm32l4/src/bin/spe_adin1110_http_server.rs @@ -23,18 +23,23 @@ use embassy_futures::select::{select, Either}; use embassy_futures::yield_now; use embassy_net::tcp::TcpSocket; use embassy_net::{Ipv4Address, Ipv4Cidr, Stack, StackResources, StaticConfigV4}; +use embassy_net_adin1110::{Device, Runner, ADIN1110}; +use embassy_stm32::gpio::{Input, Level, Output, Pull, Speed}; +use embassy_stm32::i2c::{self, Config as I2C_Config, I2c}; +use embassy_stm32::mode::Async; +use embassy_stm32::rng::{self, Rng}; +use embassy_stm32::spi::{Config as SPI_Config, Spi}; +use embassy_stm32::time::Hertz; +use embassy_stm32::{bind_interrupts, exti, pac, peripherals}; use embassy_time::{Delay, Duration, Ticker, Timer}; use embedded_hal_async::i2c::I2c as I2cBus; +use embedded_hal_bus::spi::ExclusiveDevice; use embedded_io::Write as bWrite; use embedded_io_async::Write; -use hal::gpio::{Input, Level, Output, Speed}; -use hal::i2c::{self, I2c}; -use hal::rng::{self, Rng}; -use hal::{bind_interrupts, exti, pac, peripherals}; use heapless::Vec; +use panic_probe as _; use rand::RngCore; use static_cell::StaticCell; -use {embassy_stm32 as hal, panic_probe as _}; bind_interrupts!(struct Irqs { I2C3_EV => i2c::EventInterruptHandler; @@ -42,13 +47,6 @@ bind_interrupts!(struct Irqs { RNG => rng::InterruptHandler; }); -use embassy_net_adin1110::{Device, Runner, ADIN1110}; -use embedded_hal_bus::spi::ExclusiveDevice; -use hal::gpio::Pull; -use hal::i2c::Config as I2C_Config; -use hal::spi::{Config as SPI_Config, Spi}; -use hal::time::Hertz; - // Basic settings // MAC-address used by the adin1110 const MAC: [u8; 6] = [0xaa, 0xbb, 0xcc, 0xdd, 0xee, 0xff]; @@ -57,7 +55,7 @@ const IP_ADDRESS: Ipv4Cidr = Ipv4Cidr::new(Ipv4Address([192, 168, 1, 5]), 24); // Listen port for the webserver const HTTP_LISTEN_PORT: u16 = 80; -pub type SpeSpi = Spi<'static, peripherals::SPI2, peripherals::DMA1_CH1, peripherals::DMA1_CH2>; +pub type SpeSpi = Spi<'static, peripherals::SPI2, Async>; pub type SpeSpiCs = ExclusiveDevice, Delay>; pub type SpeInt = exti::ExtiInput<'static>; pub type SpeRst = Output<'static>; diff --git a/examples/stm32l4/src/bin/spi.rs b/examples/stm32l4/src/bin/spi.rs index 6653e4516..5693a3765 100644 --- a/examples/stm32l4/src/bin/spi.rs +++ b/examples/stm32l4/src/bin/spi.rs @@ -2,7 +2,6 @@ #![no_main] use defmt::*; -use embassy_stm32::dma::NoDma; use embassy_stm32::gpio::{Level, Output, Speed}; use embassy_stm32::spi::{Config, Spi}; use embassy_stm32::time::Hertz; @@ -17,7 +16,7 @@ fn main() -> ! { let mut spi_config = Config::default(); spi_config.frequency = Hertz(1_000_000); - let mut spi = Spi::new(p.SPI3, p.PC10, p.PC12, p.PC11, NoDma, NoDma, spi_config); + let mut spi = Spi::new_blocking(p.SPI3, p.PC10, p.PC12, p.PC11, spi_config); let mut cs = Output::new(p.PE0, Level::High, Speed::VeryHigh); diff --git a/examples/stm32l4/src/bin/spi_blocking_async.rs b/examples/stm32l4/src/bin/spi_blocking_async.rs index 68dbb70ad..1f1089101 100644 --- a/examples/stm32l4/src/bin/spi_blocking_async.rs +++ b/examples/stm32l4/src/bin/spi_blocking_async.rs @@ -4,7 +4,6 @@ use defmt::*; use embassy_embedded_hal::adapter::BlockingAsync; use embassy_executor::Spawner; -use embassy_stm32::dma::NoDma; use embassy_stm32::gpio::{Input, Level, Output, Pull, Speed}; use embassy_stm32::spi::{Config, Spi}; use embassy_stm32::time::Hertz; @@ -19,7 +18,7 @@ async fn main(_spawner: Spawner) { let mut spi_config = Config::default(); spi_config.frequency = Hertz(1_000_000); - let spi = Spi::new(p.SPI3, p.PC10, p.PC12, p.PC11, NoDma, NoDma, spi_config); + let spi = Spi::new_blocking(p.SPI3, p.PC10, p.PC12, p.PC11, spi_config); let mut spi = BlockingAsync::new(spi); diff --git a/tests/stm32/src/bin/spi.rs b/tests/stm32/src/bin/spi.rs index b0bdd477f..59cb0cfd3 100644 --- a/tests/stm32/src/bin/spi.rs +++ b/tests/stm32/src/bin/spi.rs @@ -6,7 +6,6 @@ mod common; use common::*; use defmt::assert_eq; use embassy_executor::Spawner; -use embassy_stm32::dma::NoDma; use embassy_stm32::spi::{self, Spi}; use embassy_stm32::time::Hertz; @@ -23,11 +22,11 @@ async fn main(_spawner: Spawner) { let mut spi_config = spi::Config::default(); spi_config.frequency = Hertz(1_000_000); - let mut spi = Spi::new( + let mut spi = Spi::new_blocking( spi, sck, // Arduino D13 mosi, // Arduino D11 miso, // Arduino D12 - NoDma, NoDma, spi_config, + spi_config, ); let data: [u8; 9] = [0x00, 0xFF, 0xAA, 0x55, 0xC0, 0xFF, 0xEE, 0xC0, 0xDE]; From 02da66aec8432f71b8f3121a972044191df2d7e8 Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Mon, 15 Apr 2024 21:47:37 +0200 Subject: [PATCH 150/581] stm32/dma: add ChannelAndRequest helper. --- embassy-stm32/src/dma/mod.rs | 3 ++ embassy-stm32/src/dma/util.rs | 60 +++++++++++++++++++++++++++++++++++ embassy-stm32/src/spi/mod.rs | 40 +++++++++++------------ embassy-stm32/src/traits.rs | 7 ++-- 4 files changed, 86 insertions(+), 24 deletions(-) create mode 100644 embassy-stm32/src/dma/util.rs diff --git a/embassy-stm32/src/dma/mod.rs b/embassy-stm32/src/dma/mod.rs index 7e3681469..8766d0a60 100644 --- a/embassy-stm32/src/dma/mod.rs +++ b/embassy-stm32/src/dma/mod.rs @@ -16,6 +16,9 @@ mod dmamux; #[cfg(dmamux)] pub use dmamux::*; +mod util; +pub(crate) use util::*; + pub(crate) mod ringbuffer; pub mod word; diff --git a/embassy-stm32/src/dma/util.rs b/embassy-stm32/src/dma/util.rs new file mode 100644 index 000000000..962ea2501 --- /dev/null +++ b/embassy-stm32/src/dma/util.rs @@ -0,0 +1,60 @@ +use embassy_hal_internal::PeripheralRef; + +use super::word::Word; +use super::{AnyChannel, Request, Transfer, TransferOptions}; + +/// Convenience wrapper, contains a channel and a request number. +/// +/// Commonly used in peripheral drivers that own DMA channels. +pub(crate) struct ChannelAndRequest<'d> { + pub channel: PeripheralRef<'d, AnyChannel>, + pub request: Request, +} + +impl<'d> ChannelAndRequest<'d> { + pub unsafe fn read<'a, W: Word>( + &'a mut self, + peri_addr: *mut W, + buf: &'a mut [W], + options: TransferOptions, + ) -> Transfer<'a> { + Transfer::new_read(&mut self.channel, self.request, peri_addr, buf, options) + } + + pub unsafe fn read_raw<'a, W: Word>( + &'a mut self, + peri_addr: *mut W, + buf: *mut [W], + options: TransferOptions, + ) -> Transfer<'a> { + Transfer::new_read_raw(&mut self.channel, self.request, peri_addr, buf, options) + } + + pub unsafe fn write<'a, W: Word>( + &'a mut self, + buf: &'a [W], + peri_addr: *mut W, + options: TransferOptions, + ) -> Transfer<'a> { + Transfer::new_write(&mut self.channel, self.request, buf, peri_addr, options) + } + + pub unsafe fn write_raw<'a, W: Word>( + &'a mut self, + buf: *const [W], + peri_addr: *mut W, + options: TransferOptions, + ) -> Transfer<'a> { + Transfer::new_write_raw(&mut self.channel, self.request, buf, peri_addr, options) + } + + pub unsafe fn write_repeated<'a, W: Word>( + &'a mut self, + repeated: &'a W, + count: usize, + peri_addr: *mut W, + options: TransferOptions, + ) -> Transfer<'a> { + Transfer::new_write_repeated(&mut self.channel, self.request, repeated, count, peri_addr, options) + } +} diff --git a/embassy-stm32/src/spi/mod.rs b/embassy-stm32/src/spi/mod.rs index a4465e289..303b85346 100644 --- a/embassy-stm32/src/spi/mod.rs +++ b/embassy-stm32/src/spi/mod.rs @@ -9,7 +9,7 @@ use embassy_futures::join::join; use embassy_hal_internal::{into_ref, PeripheralRef}; pub use embedded_hal_02::spi::{Mode, Phase, Polarity, MODE_0, MODE_1, MODE_2, MODE_3}; -use crate::dma::{slice_ptr_parts, word, AnyChannel, Request, Transfer}; +use crate::dma::{slice_ptr_parts, word, ChannelAndRequest}; use crate::gpio::{AFType, AnyPin, Pull, SealedPin as _, Speed}; use crate::mode::{Async, Blocking, Mode as PeriMode}; use crate::pac::spi::{regs, vals, Spi as Regs}; @@ -97,8 +97,8 @@ pub struct Spi<'d, T: Instance, M: PeriMode> { sck: Option>, mosi: Option>, miso: Option>, - txdma: Option<(PeripheralRef<'d, AnyChannel>, Request)>, - rxdma: Option<(PeripheralRef<'d, AnyChannel>, Request)>, + txdma: Option>, + rxdma: Option>, _phantom: PhantomData, current_word_size: word_impl::Config, } @@ -109,8 +109,8 @@ impl<'d, T: Instance, M: PeriMode> Spi<'d, T, M> { sck: Option>, mosi: Option>, miso: Option>, - txdma: Option<(PeripheralRef<'d, AnyChannel>, Request)>, - rxdma: Option<(PeripheralRef<'d, AnyChannel>, Request)>, + txdma: Option>, + rxdma: Option>, config: Config, ) -> Self { into_ref!(peri); @@ -593,9 +593,8 @@ impl<'d, T: Instance> Spi<'d, T, Async> { w.set_spe(false); }); - let (txdma, tx_request) = self.txdma.as_mut().unwrap(); let tx_dst = T::REGS.tx_ptr(); - let tx_f = unsafe { Transfer::new_write(txdma, *tx_request, data, tx_dst, Default::default()) }; + let tx_f = unsafe { self.txdma.as_mut().unwrap().write(data, tx_dst, Default::default()) }; set_txdmaen(T::REGS, true); T::REGS.cr1().modify(|w| { @@ -632,22 +631,16 @@ impl<'d, T: Instance> Spi<'d, T, Async> { let clock_byte_count = data.len(); - let (rxdma, rx_request) = self.rxdma.as_mut().unwrap(); let rx_src = T::REGS.rx_ptr(); - let rx_f = unsafe { Transfer::new_read(rxdma, *rx_request, rx_src, data, Default::default()) }; + let rx_f = unsafe { self.rxdma.as_mut().unwrap().read(rx_src, data, Default::default()) }; - let (txdma, tx_request) = self.txdma.as_mut().unwrap(); let tx_dst = T::REGS.tx_ptr(); let clock_byte = 0x00u8; let tx_f = unsafe { - Transfer::new_write_repeated( - txdma, - *tx_request, - &clock_byte, - clock_byte_count, - tx_dst, - Default::default(), - ) + self.txdma + .as_mut() + .unwrap() + .write_repeated(&clock_byte, clock_byte_count, tx_dst, Default::default()) }; set_txdmaen(T::REGS, true); @@ -685,13 +678,16 @@ impl<'d, T: Instance> Spi<'d, T, Async> { set_rxdmaen(T::REGS, true); - let (rxdma, rx_request) = self.rxdma.as_mut().unwrap(); let rx_src = T::REGS.rx_ptr(); - let rx_f = unsafe { Transfer::new_read_raw(rxdma, *rx_request, rx_src, read, Default::default()) }; + let rx_f = unsafe { self.rxdma.as_mut().unwrap().read_raw(rx_src, read, Default::default()) }; - let (txdma, tx_request) = self.txdma.as_mut().unwrap(); let tx_dst = T::REGS.tx_ptr(); - let tx_f = unsafe { Transfer::new_write_raw(txdma, *tx_request, write, tx_dst, Default::default()) }; + let tx_f = unsafe { + self.txdma + .as_mut() + .unwrap() + .write_raw(write, tx_dst, Default::default()) + }; set_txdmaen(T::REGS, true); T::REGS.cr1().modify(|w| { diff --git a/embassy-stm32/src/traits.rs b/embassy-stm32/src/traits.rs index 539302c49..f603f661f 100644 --- a/embassy-stm32/src/traits.rs +++ b/embassy-stm32/src/traits.rs @@ -73,8 +73,11 @@ macro_rules! dma_trait_impl { macro_rules! new_dma { ($name:ident) => {{ let dma = $name.into_ref(); - let req = dma.request(); - Some((dma.map_into(), req)) + let request = dma.request(); + Some(crate::dma::ChannelAndRequest { + channel: dma.map_into(), + request, + }) }}; } From 09a284e9592cc426b5a3c3b72b3f02c0c4844742 Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Mon, 15 Apr 2024 21:48:10 +0200 Subject: [PATCH 151/581] stm32: rename mod traits to macros. --- embassy-stm32/src/lib.rs | 2 +- embassy-stm32/src/{traits.rs => macros.rs} | 0 2 files changed, 1 insertion(+), 1 deletion(-) rename embassy-stm32/src/{traits.rs => macros.rs} (100%) diff --git a/embassy-stm32/src/lib.rs b/embassy-stm32/src/lib.rs index 1f0f85936..7d2b49ff4 100644 --- a/embassy-stm32/src/lib.rs +++ b/embassy-stm32/src/lib.rs @@ -15,8 +15,8 @@ mod fmt; include!(concat!(env!("OUT_DIR"), "/_macros.rs")); // Utilities +mod macros; pub mod time; -mod traits; /// Operating modes for peripherals. pub mod mode { trait SealedMode {} diff --git a/embassy-stm32/src/traits.rs b/embassy-stm32/src/macros.rs similarity index 100% rename from embassy-stm32/src/traits.rs rename to embassy-stm32/src/macros.rs From 2eab099b85a7e0ba10d1f558dce89112cd577c68 Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Mon, 15 Apr 2024 21:56:08 +0200 Subject: [PATCH 152/581] stm32/spi: rename rxdma, txdma -> rx_dma, tx_dma. --- embassy-stm32/src/spi/mod.rs | 54 ++++++++++++++++++------------------ 1 file changed, 27 insertions(+), 27 deletions(-) diff --git a/embassy-stm32/src/spi/mod.rs b/embassy-stm32/src/spi/mod.rs index 303b85346..c39ef1913 100644 --- a/embassy-stm32/src/spi/mod.rs +++ b/embassy-stm32/src/spi/mod.rs @@ -97,8 +97,8 @@ pub struct Spi<'d, T: Instance, M: PeriMode> { sck: Option>, mosi: Option>, miso: Option>, - txdma: Option>, - rxdma: Option>, + tx_dma: Option>, + rx_dma: Option>, _phantom: PhantomData, current_word_size: word_impl::Config, } @@ -109,8 +109,8 @@ impl<'d, T: Instance, M: PeriMode> Spi<'d, T, M> { sck: Option>, mosi: Option>, miso: Option>, - txdma: Option>, - rxdma: Option>, + tx_dma: Option>, + rx_dma: Option>, config: Config, ) -> Self { into_ref!(peri); @@ -209,8 +209,8 @@ impl<'d, T: Instance, M: PeriMode> Spi<'d, T, M> { sck, mosi, miso, - txdma, - rxdma, + tx_dma, + rx_dma, current_word_size: ::CONFIG, _phantom: PhantomData, } @@ -479,8 +479,8 @@ impl<'d, T: Instance> Spi<'d, T, Async> { sck: impl Peripheral

> + 'd, mosi: impl Peripheral

> + 'd, miso: impl Peripheral

> + 'd, - txdma: impl Peripheral

> + 'd, - rxdma: impl Peripheral

> + 'd, + tx_dma: impl Peripheral

> + 'd, + rx_dma: impl Peripheral

> + 'd, config: Config, ) -> Self { Self::new_inner( @@ -488,8 +488,8 @@ impl<'d, T: Instance> Spi<'d, T, Async> { new_pin!(sck, AFType::OutputPushPull, Speed::VeryHigh, config.sck_pull_mode()), new_pin!(mosi, AFType::OutputPushPull, Speed::VeryHigh), new_pin!(miso, AFType::Input, Speed::VeryHigh), - new_dma!(txdma), - new_dma!(rxdma), + new_dma!(tx_dma), + new_dma!(rx_dma), config, ) } @@ -499,7 +499,7 @@ impl<'d, T: Instance> Spi<'d, T, Async> { peri: impl Peripheral

+ 'd, sck: impl Peripheral

> + 'd, miso: impl Peripheral

> + 'd, - rxdma: impl Peripheral

> + 'd, + rx_dma: impl Peripheral

> + 'd, config: Config, ) -> Self { Self::new_inner( @@ -508,7 +508,7 @@ impl<'d, T: Instance> Spi<'d, T, Async> { None, new_pin!(miso, AFType::Input, Speed::VeryHigh), None, - new_dma!(rxdma), + new_dma!(rx_dma), config, ) } @@ -518,7 +518,7 @@ impl<'d, T: Instance> Spi<'d, T, Async> { peri: impl Peripheral

+ 'd, sck: impl Peripheral

> + 'd, mosi: impl Peripheral

> + 'd, - txdma: impl Peripheral

> + 'd, + tx_dma: impl Peripheral

> + 'd, config: Config, ) -> Self { Self::new_inner( @@ -526,7 +526,7 @@ impl<'d, T: Instance> Spi<'d, T, Async> { new_pin!(sck, AFType::OutputPushPull, Speed::VeryHigh, config.sck_pull_mode()), new_pin!(mosi, AFType::OutputPushPull, Speed::VeryHigh), None, - new_dma!(txdma), + new_dma!(tx_dma), None, config, ) @@ -538,7 +538,7 @@ impl<'d, T: Instance> Spi<'d, T, Async> { pub fn new_txonly_nosck( peri: impl Peripheral

+ 'd, mosi: impl Peripheral

> + 'd, - txdma: impl Peripheral

> + 'd, + tx_dma: impl Peripheral

> + 'd, config: Config, ) -> Self { Self::new_inner( @@ -546,7 +546,7 @@ impl<'d, T: Instance> Spi<'d, T, Async> { None, new_pin!(mosi, AFType::OutputPushPull, Speed::VeryHigh), None, - new_dma!(txdma), + new_dma!(tx_dma), None, config, ) @@ -556,8 +556,8 @@ impl<'d, T: Instance> Spi<'d, T, Async> { /// Useful for on chip peripherals like SUBGHZ which are hardwired. pub fn new_subghz( peri: impl Peripheral

+ 'd, - txdma: impl Peripheral

> + 'd, - rxdma: impl Peripheral

> + 'd, + tx_dma: impl Peripheral

> + 'd, + rx_dma: impl Peripheral

> + 'd, ) -> Self { // see RM0453 rev 1 section 7.2.13 page 291 // The SUBGHZSPI_SCK frequency is obtained by PCLK3 divided by two. @@ -569,17 +569,17 @@ impl<'d, T: Instance> Spi<'d, T, Async> { config.bit_order = BitOrder::MsbFirst; config.frequency = freq; - Self::new_inner(peri, None, None, None, new_dma!(txdma), new_dma!(rxdma), config) + Self::new_inner(peri, None, None, None, new_dma!(tx_dma), new_dma!(rx_dma), config) } #[allow(dead_code)] pub(crate) fn new_internal( peri: impl Peripheral

+ 'd, - txdma: impl Peripheral

> + 'd, - rxdma: impl Peripheral

> + 'd, + tx_dma: impl Peripheral

> + 'd, + rx_dma: impl Peripheral

> + 'd, config: Config, ) -> Self { - Self::new_inner(peri, None, None, None, new_dma!(txdma), new_dma!(rxdma), config) + Self::new_inner(peri, None, None, None, new_dma!(tx_dma), new_dma!(rx_dma), config) } /// SPI write, using DMA. @@ -594,7 +594,7 @@ impl<'d, T: Instance> Spi<'d, T, Async> { }); let tx_dst = T::REGS.tx_ptr(); - let tx_f = unsafe { self.txdma.as_mut().unwrap().write(data, tx_dst, Default::default()) }; + let tx_f = unsafe { self.tx_dma.as_mut().unwrap().write(data, tx_dst, Default::default()) }; set_txdmaen(T::REGS, true); T::REGS.cr1().modify(|w| { @@ -632,12 +632,12 @@ impl<'d, T: Instance> Spi<'d, T, Async> { let clock_byte_count = data.len(); let rx_src = T::REGS.rx_ptr(); - let rx_f = unsafe { self.rxdma.as_mut().unwrap().read(rx_src, data, Default::default()) }; + let rx_f = unsafe { self.rx_dma.as_mut().unwrap().read(rx_src, data, Default::default()) }; let tx_dst = T::REGS.tx_ptr(); let clock_byte = 0x00u8; let tx_f = unsafe { - self.txdma + self.tx_dma .as_mut() .unwrap() .write_repeated(&clock_byte, clock_byte_count, tx_dst, Default::default()) @@ -679,11 +679,11 @@ impl<'d, T: Instance> Spi<'d, T, Async> { set_rxdmaen(T::REGS, true); let rx_src = T::REGS.rx_ptr(); - let rx_f = unsafe { self.rxdma.as_mut().unwrap().read_raw(rx_src, read, Default::default()) }; + let rx_f = unsafe { self.rx_dma.as_mut().unwrap().read_raw(rx_src, read, Default::default()) }; let tx_dst = T::REGS.tx_ptr(); let tx_f = unsafe { - self.txdma + self.tx_dma .as_mut() .unwrap() .write_raw(write, tx_dst, Default::default()) From 913bb19a34b88e996972c6666679b2b99ae01ce0 Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Mon, 15 Apr 2024 23:40:12 +0200 Subject: [PATCH 153/581] stm32/i2c: remove DMA generic params. --- embassy-stm32/src/i2c/mod.rs | 61 +- embassy-stm32/src/i2c/v1.rs | 50 +- embassy-stm32/src/i2c/v2.rs | 522 +++++++++--------- examples/stm32f4/src/bin/i2c.rs | 18 +- examples/stm32l4/src/bin/i2c.rs | 18 +- .../stm32l4/src/bin/i2c_blocking_async.rs | 18 +- .../src/bin/spe_adin1110_http_server.rs | 2 +- examples/stm32u5/src/bin/i2c.rs | 18 +- 8 files changed, 312 insertions(+), 395 deletions(-) diff --git a/embassy-stm32/src/i2c/mod.rs b/embassy-stm32/src/i2c/mod.rs index a46061d54..ccbea9831 100644 --- a/embassy-stm32/src/i2c/mod.rs +++ b/embassy-stm32/src/i2c/mod.rs @@ -14,9 +14,10 @@ use embassy_sync::waitqueue::AtomicWaker; #[cfg(feature = "time")] use embassy_time::{Duration, Instant}; -use crate::dma::NoDma; +use crate::dma::ChannelAndRequest; use crate::gpio::{AFType, Pull}; use crate::interrupt::typelevel::Interrupt; +use crate::mode::{Async, Blocking, Mode}; use crate::time::Hertz; use crate::{interrupt, peripherals}; @@ -71,17 +72,16 @@ impl Default for Config { } /// I2C driver. -pub struct I2c<'d, T: Instance, TXDMA = NoDma, RXDMA = NoDma> { +pub struct I2c<'d, T: Instance, M: Mode> { _peri: PeripheralRef<'d, T>, - #[allow(dead_code)] - tx_dma: PeripheralRef<'d, TXDMA>, - #[allow(dead_code)] - rx_dma: PeripheralRef<'d, RXDMA>, + tx_dma: Option>, + rx_dma: Option>, #[cfg(feature = "time")] timeout: Duration, + _phantom: PhantomData, } -impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> { +impl<'d, T: Instance> I2c<'d, T, Async> { /// Create a new I2C driver. pub fn new( peri: impl Peripheral

+ 'd, @@ -90,12 +90,40 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> { _irq: impl interrupt::typelevel::Binding> + interrupt::typelevel::Binding> + 'd, - tx_dma: impl Peripheral

+ 'd, - rx_dma: impl Peripheral

+ 'd, + tx_dma: impl Peripheral

> + 'd, + rx_dma: impl Peripheral

> + 'd, freq: Hertz, config: Config, ) -> Self { - into_ref!(peri, scl, sda, tx_dma, rx_dma); + Self::new_inner(peri, scl, sda, new_dma!(tx_dma), new_dma!(rx_dma), freq, config) + } +} + +impl<'d, T: Instance> I2c<'d, T, Blocking> { + /// Create a new blocking I2C driver. + pub fn new_blocking( + peri: impl Peripheral

+ 'd, + scl: impl Peripheral

> + 'd, + sda: impl Peripheral

> + 'd, + freq: Hertz, + config: Config, + ) -> Self { + Self::new_inner(peri, scl, sda, None, None, freq, config) + } +} + +impl<'d, T: Instance, M: Mode> I2c<'d, T, M> { + /// Create a new I2C driver. + fn new_inner( + peri: impl Peripheral

+ 'd, + scl: impl Peripheral

> + 'd, + sda: impl Peripheral

> + 'd, + tx_dma: Option>, + rx_dma: Option>, + freq: Hertz, + config: Config, + ) -> Self { + into_ref!(peri, scl, sda); T::enable_and_reset(); @@ -125,6 +153,7 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> { rx_dma, #[cfg(feature = "time")] timeout: config.timeout, + _phantom: PhantomData, }; this.init(freq, config); @@ -249,7 +278,7 @@ foreach_peripheral!( }; ); -impl<'d, T: Instance> embedded_hal_02::blocking::i2c::Read for I2c<'d, T> { +impl<'d, T: Instance, M: Mode> embedded_hal_02::blocking::i2c::Read for I2c<'d, T, M> { type Error = Error; fn read(&mut self, address: u8, buffer: &mut [u8]) -> Result<(), Self::Error> { @@ -257,7 +286,7 @@ impl<'d, T: Instance> embedded_hal_02::blocking::i2c::Read for I2c<'d, T> { } } -impl<'d, T: Instance> embedded_hal_02::blocking::i2c::Write for I2c<'d, T> { +impl<'d, T: Instance, M: Mode> embedded_hal_02::blocking::i2c::Write for I2c<'d, T, M> { type Error = Error; fn write(&mut self, address: u8, write: &[u8]) -> Result<(), Self::Error> { @@ -265,7 +294,7 @@ impl<'d, T: Instance> embedded_hal_02::blocking::i2c::Write for I2c<'d, T> { } } -impl<'d, T: Instance> embedded_hal_02::blocking::i2c::WriteRead for I2c<'d, T> { +impl<'d, T: Instance, M: Mode> embedded_hal_02::blocking::i2c::WriteRead for I2c<'d, T, M> { type Error = Error; fn write_read(&mut self, address: u8, write: &[u8], read: &mut [u8]) -> Result<(), Self::Error> { @@ -289,11 +318,11 @@ impl embedded_hal_1::i2c::Error for Error { } } -impl<'d, T: Instance, TXDMA, RXDMA> embedded_hal_1::i2c::ErrorType for I2c<'d, T, TXDMA, RXDMA> { +impl<'d, T: Instance, M: Mode> embedded_hal_1::i2c::ErrorType for I2c<'d, T, M> { type Error = Error; } -impl<'d, T: Instance> embedded_hal_1::i2c::I2c for I2c<'d, T, NoDma, NoDma> { +impl<'d, T: Instance, M: Mode> embedded_hal_1::i2c::I2c for I2c<'d, T, M> { fn read(&mut self, address: u8, read: &mut [u8]) -> Result<(), Self::Error> { self.blocking_read(address, read) } @@ -315,7 +344,7 @@ impl<'d, T: Instance> embedded_hal_1::i2c::I2c for I2c<'d, T, NoDma, NoDma> { } } -impl<'d, T: Instance, TXDMA: TxDma, RXDMA: RxDma> embedded_hal_async::i2c::I2c for I2c<'d, T, TXDMA, RXDMA> { +impl<'d, T: Instance> embedded_hal_async::i2c::I2c for I2c<'d, T, Async> { async fn read(&mut self, address: u8, read: &mut [u8]) -> Result<(), Self::Error> { self.read(address, read).await } diff --git a/embassy-stm32/src/i2c/v1.rs b/embassy-stm32/src/i2c/v1.rs index d45c48b24..13a473344 100644 --- a/embassy-stm32/src/i2c/v1.rs +++ b/embassy-stm32/src/i2c/v1.rs @@ -13,7 +13,7 @@ use embassy_hal_internal::drop::OnDrop; use embedded_hal_1::i2c::Operation; use super::*; -use crate::dma::Transfer; +use crate::mode::Mode as PeriMode; use crate::pac::i2c; // /!\ /!\ @@ -41,7 +41,7 @@ pub unsafe fn on_interrupt() { }); } -impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> { +impl<'d, T: Instance, M: PeriMode> I2c<'d, T, M> { pub(crate) fn init(&mut self, freq: Hertz, _config: Config) { T::regs().cr1().modify(|reg| { reg.set_pe(false); @@ -326,11 +326,10 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> { w.set_itevten(true); }); } +} - async fn write_frame(&mut self, address: u8, write: &[u8], frame: FrameOptions) -> Result<(), Error> - where - TXDMA: crate::i2c::TxDma, - { +impl<'d, T: Instance> I2c<'d, T, Async> { + async fn write_frame(&mut self, address: u8, write: &[u8], frame: FrameOptions) -> Result<(), Error> { T::regs().cr2().modify(|w| { // Note: Do not enable the ITBUFEN bit in the I2C_CR2 register if DMA is used for // reception. @@ -415,9 +414,7 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> { // this address from the memory after each TxE event. let dst = T::regs().dr().as_ptr() as *mut u8; - let ch = &mut self.tx_dma; - let request = ch.request(); - Transfer::new_write(ch, request, write, dst, Default::default()) + self.tx_dma.as_mut().unwrap().write(write, dst, Default::default()) }; // Wait for bytes to be sent, or an error to occur. @@ -479,10 +476,7 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> { } /// Write. - pub async fn write(&mut self, address: u8, write: &[u8]) -> Result<(), Error> - where - TXDMA: crate::i2c::TxDma, - { + pub async fn write(&mut self, address: u8, write: &[u8]) -> Result<(), Error> { self.write_frame(address, write, FrameOptions::FirstAndLastFrame) .await?; @@ -490,20 +484,14 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> { } /// Read. - pub async fn read(&mut self, address: u8, buffer: &mut [u8]) -> Result<(), Error> - where - RXDMA: crate::i2c::RxDma, - { + pub async fn read(&mut self, address: u8, buffer: &mut [u8]) -> Result<(), Error> { self.read_frame(address, buffer, FrameOptions::FirstAndLastFrame) .await?; Ok(()) } - async fn read_frame(&mut self, address: u8, buffer: &mut [u8], frame: FrameOptions) -> Result<(), Error> - where - RXDMA: crate::i2c::RxDma, - { + async fn read_frame(&mut self, address: u8, buffer: &mut [u8], frame: FrameOptions) -> Result<(), Error> { if buffer.is_empty() { return Err(Error::Overrun); } @@ -623,9 +611,7 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> { // from this address from the memory after each RxE event. let src = T::regs().dr().as_ptr() as *mut u8; - let ch = &mut self.rx_dma; - let request = ch.request(); - Transfer::new_read(ch, request, src, buffer, Default::default()) + self.rx_dma.as_mut().unwrap().read(src, buffer, Default::default()) }; // Wait for bytes to be received, or an error to occur. @@ -664,11 +650,7 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> { } /// Write, restart, read. - pub async fn write_read(&mut self, address: u8, write: &[u8], read: &mut [u8]) -> Result<(), Error> - where - RXDMA: crate::i2c::RxDma, - TXDMA: crate::i2c::TxDma, - { + pub async fn write_read(&mut self, address: u8, write: &[u8], read: &mut [u8]) -> Result<(), Error> { // Check empty read buffer before starting transaction. Otherwise, we would not generate the // stop condition below. if read.is_empty() { @@ -684,11 +666,7 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> { /// Consecutive operations of same type are merged. See [transaction contract] for details. /// /// [transaction contract]: embedded_hal_1::i2c::I2c::transaction - pub async fn transaction(&mut self, addr: u8, operations: &mut [Operation<'_>]) -> Result<(), Error> - where - RXDMA: crate::i2c::RxDma, - TXDMA: crate::i2c::TxDma, - { + pub async fn transaction(&mut self, addr: u8, operations: &mut [Operation<'_>]) -> Result<(), Error> { for (op, frame) in operation_frames(operations)? { match op { Operation::Read(read) => self.read_frame(addr, read, frame).await?, @@ -700,7 +678,7 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> { } } -impl<'d, T: Instance, TXDMA, RXDMA> Drop for I2c<'d, T, TXDMA, RXDMA> { +impl<'d, T: Instance, M: PeriMode> Drop for I2c<'d, T, M> { fn drop(&mut self) { T::disable(); } @@ -806,7 +784,7 @@ impl Timings { } } -impl<'d, T: Instance> SetConfig for I2c<'d, T> { +impl<'d, T: Instance, M: PeriMode> SetConfig for I2c<'d, T, M> { type Config = Hertz; type ConfigError = (); fn set_config(&mut self, config: &Self::Config) -> Result<(), ()> { diff --git a/embassy-stm32/src/i2c/v2.rs b/embassy-stm32/src/i2c/v2.rs index da3b0ee30..12df98534 100644 --- a/embassy-stm32/src/i2c/v2.rs +++ b/embassy-stm32/src/i2c/v2.rs @@ -7,7 +7,6 @@ use embassy_hal_internal::drop::OnDrop; use embedded_hal_1::i2c::Operation; use super::*; -use crate::dma::Transfer; use crate::pac::i2c; pub(crate) unsafe fn on_interrupt() { @@ -24,7 +23,7 @@ pub(crate) unsafe fn on_interrupt() { }); } -impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> { +impl<'d, T: Instance, M: Mode> I2c<'d, T, M> { pub(crate) fn init(&mut self, freq: Hertz, _config: Config) { T::regs().cr1().modify(|reg| { reg.set_pe(false); @@ -302,276 +301,6 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> { result } - async fn write_dma_internal( - &mut self, - address: u8, - write: &[u8], - first_slice: bool, - last_slice: bool, - timeout: Timeout, - ) -> Result<(), Error> - where - TXDMA: crate::i2c::TxDma, - { - let total_len = write.len(); - - let dma_transfer = unsafe { - let regs = T::regs(); - regs.cr1().modify(|w| { - w.set_txdmaen(true); - if first_slice { - w.set_tcie(true); - } - }); - let dst = regs.txdr().as_ptr() as *mut u8; - - let ch = &mut self.tx_dma; - let request = ch.request(); - Transfer::new_write(ch, request, write, dst, Default::default()) - }; - - let state = T::state(); - let mut remaining_len = total_len; - - let on_drop = OnDrop::new(|| { - let regs = T::regs(); - regs.cr1().modify(|w| { - if last_slice { - w.set_txdmaen(false); - } - w.set_tcie(false); - }) - }); - - poll_fn(|cx| { - state.waker.register(cx.waker()); - - let isr = T::regs().isr().read(); - if remaining_len == total_len { - if first_slice { - Self::master_write( - address, - total_len.min(255), - Stop::Software, - (total_len > 255) || !last_slice, - timeout, - )?; - } else { - Self::master_continue(total_len.min(255), (total_len > 255) || !last_slice, timeout)?; - T::regs().cr1().modify(|w| w.set_tcie(true)); - } - } else if !(isr.tcr() || isr.tc()) { - // poll_fn was woken without an interrupt present - return Poll::Pending; - } else if remaining_len == 0 { - return Poll::Ready(Ok(())); - } else { - let last_piece = (remaining_len <= 255) && last_slice; - - if let Err(e) = Self::master_continue(remaining_len.min(255), !last_piece, timeout) { - return Poll::Ready(Err(e)); - } - T::regs().cr1().modify(|w| w.set_tcie(true)); - } - - remaining_len = remaining_len.saturating_sub(255); - Poll::Pending - }) - .await?; - - dma_transfer.await; - - if last_slice { - // This should be done already - self.wait_tc(timeout)?; - self.master_stop(); - } - - drop(on_drop); - - Ok(()) - } - - async fn read_dma_internal( - &mut self, - address: u8, - buffer: &mut [u8], - restart: bool, - timeout: Timeout, - ) -> Result<(), Error> - where - RXDMA: crate::i2c::RxDma, - { - let total_len = buffer.len(); - - let dma_transfer = unsafe { - let regs = T::regs(); - regs.cr1().modify(|w| { - w.set_rxdmaen(true); - w.set_tcie(true); - }); - let src = regs.rxdr().as_ptr() as *mut u8; - - let ch = &mut self.rx_dma; - let request = ch.request(); - Transfer::new_read(ch, request, src, buffer, Default::default()) - }; - - let state = T::state(); - let mut remaining_len = total_len; - - let on_drop = OnDrop::new(|| { - let regs = T::regs(); - regs.cr1().modify(|w| { - w.set_rxdmaen(false); - w.set_tcie(false); - }) - }); - - poll_fn(|cx| { - state.waker.register(cx.waker()); - - let isr = T::regs().isr().read(); - if remaining_len == total_len { - Self::master_read( - address, - total_len.min(255), - Stop::Software, - total_len > 255, - restart, - timeout, - )?; - } else if !(isr.tcr() || isr.tc()) { - // poll_fn was woken without an interrupt present - return Poll::Pending; - } else if remaining_len == 0 { - return Poll::Ready(Ok(())); - } else { - let last_piece = remaining_len <= 255; - - if let Err(e) = Self::master_continue(remaining_len.min(255), !last_piece, timeout) { - return Poll::Ready(Err(e)); - } - T::regs().cr1().modify(|w| w.set_tcie(true)); - } - - remaining_len = remaining_len.saturating_sub(255); - Poll::Pending - }) - .await?; - - dma_transfer.await; - - // This should be done already - self.wait_tc(timeout)?; - self.master_stop(); - - drop(on_drop); - - Ok(()) - } - - // ========================= - // Async public API - - /// Write. - pub async fn write(&mut self, address: u8, write: &[u8]) -> Result<(), Error> - where - TXDMA: crate::i2c::TxDma, - { - let timeout = self.timeout(); - if write.is_empty() { - self.write_internal(address, write, true, timeout) - } else { - timeout - .with(self.write_dma_internal(address, write, true, true, timeout)) - .await - } - } - - /// Write multiple buffers. - /// - /// The buffers are concatenated in a single write transaction. - pub async fn write_vectored(&mut self, address: u8, write: &[&[u8]]) -> Result<(), Error> - where - TXDMA: crate::i2c::TxDma, - { - let timeout = self.timeout(); - - if write.is_empty() { - return Err(Error::ZeroLengthTransfer); - } - let mut iter = write.iter(); - - let mut first = true; - let mut current = iter.next(); - while let Some(c) = current { - let next = iter.next(); - let is_last = next.is_none(); - - let fut = self.write_dma_internal(address, c, first, is_last, timeout); - timeout.with(fut).await?; - first = false; - current = next; - } - Ok(()) - } - - /// Read. - pub async fn read(&mut self, address: u8, buffer: &mut [u8]) -> Result<(), Error> - where - RXDMA: crate::i2c::RxDma, - { - let timeout = self.timeout(); - - if buffer.is_empty() { - self.read_internal(address, buffer, false, timeout) - } else { - let fut = self.read_dma_internal(address, buffer, false, timeout); - timeout.with(fut).await - } - } - - /// Write, restart, read. - pub async fn write_read(&mut self, address: u8, write: &[u8], read: &mut [u8]) -> Result<(), Error> - where - TXDMA: super::TxDma, - RXDMA: super::RxDma, - { - let timeout = self.timeout(); - - if write.is_empty() { - self.write_internal(address, write, false, timeout)?; - } else { - let fut = self.write_dma_internal(address, write, true, true, timeout); - timeout.with(fut).await?; - } - - if read.is_empty() { - self.read_internal(address, read, true, timeout)?; - } else { - let fut = self.read_dma_internal(address, read, true, timeout); - timeout.with(fut).await?; - } - - Ok(()) - } - - /// Transaction with operations. - /// - /// Consecutive operations of same type are merged. See [transaction contract] for details. - /// - /// [transaction contract]: embedded_hal_1::i2c::I2c::transaction - pub async fn transaction(&mut self, addr: u8, operations: &mut [Operation<'_>]) -> Result<(), Error> - where - RXDMA: crate::i2c::RxDma, - TXDMA: crate::i2c::TxDma, - { - let _ = addr; - let _ = operations; - todo!() - } - // ========================= // Blocking public API @@ -684,7 +413,252 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> { } } -impl<'d, T: Instance, TXDMA, RXDMA> Drop for I2c<'d, T, TXDMA, RXDMA> { +impl<'d, T: Instance> I2c<'d, T, Async> { + async fn write_dma_internal( + &mut self, + address: u8, + write: &[u8], + first_slice: bool, + last_slice: bool, + timeout: Timeout, + ) -> Result<(), Error> { + let total_len = write.len(); + + let dma_transfer = unsafe { + let regs = T::regs(); + regs.cr1().modify(|w| { + w.set_txdmaen(true); + if first_slice { + w.set_tcie(true); + } + }); + let dst = regs.txdr().as_ptr() as *mut u8; + + self.tx_dma.as_mut().unwrap().write(write, dst, Default::default()) + }; + + let state = T::state(); + let mut remaining_len = total_len; + + let on_drop = OnDrop::new(|| { + let regs = T::regs(); + regs.cr1().modify(|w| { + if last_slice { + w.set_txdmaen(false); + } + w.set_tcie(false); + }) + }); + + poll_fn(|cx| { + state.waker.register(cx.waker()); + + let isr = T::regs().isr().read(); + if remaining_len == total_len { + if first_slice { + Self::master_write( + address, + total_len.min(255), + Stop::Software, + (total_len > 255) || !last_slice, + timeout, + )?; + } else { + Self::master_continue(total_len.min(255), (total_len > 255) || !last_slice, timeout)?; + T::regs().cr1().modify(|w| w.set_tcie(true)); + } + } else if !(isr.tcr() || isr.tc()) { + // poll_fn was woken without an interrupt present + return Poll::Pending; + } else if remaining_len == 0 { + return Poll::Ready(Ok(())); + } else { + let last_piece = (remaining_len <= 255) && last_slice; + + if let Err(e) = Self::master_continue(remaining_len.min(255), !last_piece, timeout) { + return Poll::Ready(Err(e)); + } + T::regs().cr1().modify(|w| w.set_tcie(true)); + } + + remaining_len = remaining_len.saturating_sub(255); + Poll::Pending + }) + .await?; + + dma_transfer.await; + + if last_slice { + // This should be done already + self.wait_tc(timeout)?; + self.master_stop(); + } + + drop(on_drop); + + Ok(()) + } + + async fn read_dma_internal( + &mut self, + address: u8, + buffer: &mut [u8], + restart: bool, + timeout: Timeout, + ) -> Result<(), Error> { + let total_len = buffer.len(); + + let dma_transfer = unsafe { + let regs = T::regs(); + regs.cr1().modify(|w| { + w.set_rxdmaen(true); + w.set_tcie(true); + }); + let src = regs.rxdr().as_ptr() as *mut u8; + + self.rx_dma.as_mut().unwrap().read(src, buffer, Default::default()) + }; + + let state = T::state(); + let mut remaining_len = total_len; + + let on_drop = OnDrop::new(|| { + let regs = T::regs(); + regs.cr1().modify(|w| { + w.set_rxdmaen(false); + w.set_tcie(false); + }) + }); + + poll_fn(|cx| { + state.waker.register(cx.waker()); + + let isr = T::regs().isr().read(); + if remaining_len == total_len { + Self::master_read( + address, + total_len.min(255), + Stop::Software, + total_len > 255, + restart, + timeout, + )?; + } else if !(isr.tcr() || isr.tc()) { + // poll_fn was woken without an interrupt present + return Poll::Pending; + } else if remaining_len == 0 { + return Poll::Ready(Ok(())); + } else { + let last_piece = remaining_len <= 255; + + if let Err(e) = Self::master_continue(remaining_len.min(255), !last_piece, timeout) { + return Poll::Ready(Err(e)); + } + T::regs().cr1().modify(|w| w.set_tcie(true)); + } + + remaining_len = remaining_len.saturating_sub(255); + Poll::Pending + }) + .await?; + + dma_transfer.await; + + // This should be done already + self.wait_tc(timeout)?; + self.master_stop(); + + drop(on_drop); + + Ok(()) + } + + // ========================= + // Async public API + + /// Write. + pub async fn write(&mut self, address: u8, write: &[u8]) -> Result<(), Error> { + let timeout = self.timeout(); + if write.is_empty() { + self.write_internal(address, write, true, timeout) + } else { + timeout + .with(self.write_dma_internal(address, write, true, true, timeout)) + .await + } + } + + /// Write multiple buffers. + /// + /// The buffers are concatenated in a single write transaction. + pub async fn write_vectored(&mut self, address: u8, write: &[&[u8]]) -> Result<(), Error> { + let timeout = self.timeout(); + + if write.is_empty() { + return Err(Error::ZeroLengthTransfer); + } + let mut iter = write.iter(); + + let mut first = true; + let mut current = iter.next(); + while let Some(c) = current { + let next = iter.next(); + let is_last = next.is_none(); + + let fut = self.write_dma_internal(address, c, first, is_last, timeout); + timeout.with(fut).await?; + first = false; + current = next; + } + Ok(()) + } + + /// Read. + pub async fn read(&mut self, address: u8, buffer: &mut [u8]) -> Result<(), Error> { + let timeout = self.timeout(); + + if buffer.is_empty() { + self.read_internal(address, buffer, false, timeout) + } else { + let fut = self.read_dma_internal(address, buffer, false, timeout); + timeout.with(fut).await + } + } + + /// Write, restart, read. + pub async fn write_read(&mut self, address: u8, write: &[u8], read: &mut [u8]) -> Result<(), Error> { + let timeout = self.timeout(); + + if write.is_empty() { + self.write_internal(address, write, false, timeout)?; + } else { + let fut = self.write_dma_internal(address, write, true, true, timeout); + timeout.with(fut).await?; + } + + if read.is_empty() { + self.read_internal(address, read, true, timeout)?; + } else { + let fut = self.read_dma_internal(address, read, true, timeout); + timeout.with(fut).await?; + } + + Ok(()) + } + + /// Transaction with operations. + /// + /// Consecutive operations of same type are merged. See [transaction contract] for details. + /// + /// [transaction contract]: embedded_hal_1::i2c::I2c::transaction + pub async fn transaction(&mut self, addr: u8, operations: &mut [Operation<'_>]) -> Result<(), Error> { + let _ = addr; + let _ = operations; + todo!() + } +} + +impl<'d, T: Instance, M: Mode> Drop for I2c<'d, T, M> { fn drop(&mut self) { T::disable(); } @@ -814,7 +788,7 @@ impl Timings { } } -impl<'d, T: Instance> SetConfig for I2c<'d, T> { +impl<'d, T: Instance, M: Mode> SetConfig for I2c<'d, T, M> { type Config = Hertz; type ConfigError = (); fn set_config(&mut self, config: &Self::Config) -> Result<(), ()> { diff --git a/examples/stm32f4/src/bin/i2c.rs b/examples/stm32f4/src/bin/i2c.rs index 4b5da774d..4a96357a4 100644 --- a/examples/stm32f4/src/bin/i2c.rs +++ b/examples/stm32f4/src/bin/i2c.rs @@ -3,35 +3,19 @@ use defmt::*; use embassy_executor::Spawner; -use embassy_stm32::dma::NoDma; use embassy_stm32::i2c::{Error, I2c}; use embassy_stm32::time::Hertz; -use embassy_stm32::{bind_interrupts, i2c, peripherals}; use {defmt_rtt as _, panic_probe as _}; const ADDRESS: u8 = 0x5F; const WHOAMI: u8 = 0x0F; -bind_interrupts!(struct Irqs { - I2C2_EV => i2c::EventInterruptHandler; - I2C2_ER => i2c::ErrorInterruptHandler; -}); - #[embassy_executor::main] async fn main(_spawner: Spawner) { info!("Hello world!"); let p = embassy_stm32::init(Default::default()); - let mut i2c = I2c::new( - p.I2C2, - p.PB10, - p.PB11, - Irqs, - NoDma, - NoDma, - Hertz(100_000), - Default::default(), - ); + let mut i2c = I2c::new_blocking(p.I2C2, p.PB10, p.PB11, Hertz(100_000), Default::default()); let mut data = [0u8; 1]; diff --git a/examples/stm32l4/src/bin/i2c.rs b/examples/stm32l4/src/bin/i2c.rs index f553deb82..2861bc091 100644 --- a/examples/stm32l4/src/bin/i2c.rs +++ b/examples/stm32l4/src/bin/i2c.rs @@ -3,33 +3,17 @@ use defmt::*; use embassy_executor::Spawner; -use embassy_stm32::dma::NoDma; use embassy_stm32::i2c::I2c; use embassy_stm32::time::Hertz; -use embassy_stm32::{bind_interrupts, i2c, peripherals}; use {defmt_rtt as _, panic_probe as _}; const ADDRESS: u8 = 0x5F; const WHOAMI: u8 = 0x0F; -bind_interrupts!(struct Irqs { - I2C2_EV => i2c::EventInterruptHandler; - I2C2_ER => i2c::ErrorInterruptHandler; -}); - #[embassy_executor::main] async fn main(_spawner: Spawner) { let p = embassy_stm32::init(Default::default()); - let mut i2c = I2c::new( - p.I2C2, - p.PB10, - p.PB11, - Irqs, - NoDma, - NoDma, - Hertz(100_000), - Default::default(), - ); + let mut i2c = I2c::new_blocking(p.I2C2, p.PB10, p.PB11, Hertz(100_000), Default::default()); let mut data = [0u8; 1]; unwrap!(i2c.blocking_write_read(ADDRESS, &[WHOAMI], &mut data)); diff --git a/examples/stm32l4/src/bin/i2c_blocking_async.rs b/examples/stm32l4/src/bin/i2c_blocking_async.rs index 1b8652bcc..a014b23e0 100644 --- a/examples/stm32l4/src/bin/i2c_blocking_async.rs +++ b/examples/stm32l4/src/bin/i2c_blocking_async.rs @@ -4,34 +4,18 @@ use defmt::*; use embassy_embedded_hal::adapter::BlockingAsync; use embassy_executor::Spawner; -use embassy_stm32::dma::NoDma; use embassy_stm32::i2c::I2c; use embassy_stm32::time::Hertz; -use embassy_stm32::{bind_interrupts, i2c, peripherals}; use embedded_hal_async::i2c::I2c as I2cTrait; use {defmt_rtt as _, panic_probe as _}; const ADDRESS: u8 = 0x5F; const WHOAMI: u8 = 0x0F; -bind_interrupts!(struct Irqs { - I2C2_EV => i2c::EventInterruptHandler; - I2C2_ER => i2c::ErrorInterruptHandler; -}); - #[embassy_executor::main] async fn main(_spawner: Spawner) { let p = embassy_stm32::init(Default::default()); - let i2c = I2c::new( - p.I2C2, - p.PB10, - p.PB11, - Irqs, - NoDma, - NoDma, - Hertz(100_000), - Default::default(), - ); + let i2c = I2c::new_blocking(p.I2C2, p.PB10, p.PB11, Hertz(100_000), Default::default()); let mut i2c = BlockingAsync::new(i2c); let mut data = [0u8; 1]; diff --git a/examples/stm32l4/src/bin/spe_adin1110_http_server.rs b/examples/stm32l4/src/bin/spe_adin1110_http_server.rs index a99d08924..694629ede 100644 --- a/examples/stm32l4/src/bin/spe_adin1110_http_server.rs +++ b/examples/stm32l4/src/bin/spe_adin1110_http_server.rs @@ -60,7 +60,7 @@ pub type SpeSpiCs = ExclusiveDevice, Delay>; pub type SpeInt = exti::ExtiInput<'static>; pub type SpeRst = Output<'static>; pub type Adin1110T = ADIN1110; -pub type TempSensI2c = I2c<'static, peripherals::I2C3, peripherals::DMA1_CH6, peripherals::DMA1_CH7>; +pub type TempSensI2c = I2c<'static, peripherals::I2C3, Async>; static TEMP: AtomicI32 = AtomicI32::new(0); diff --git a/examples/stm32u5/src/bin/i2c.rs b/examples/stm32u5/src/bin/i2c.rs index e376c6bc8..19a78eac9 100644 --- a/examples/stm32u5/src/bin/i2c.rs +++ b/examples/stm32u5/src/bin/i2c.rs @@ -3,33 +3,17 @@ use defmt::{info, unwrap}; use embassy_executor::Spawner; -use embassy_stm32::dma::NoDma; use embassy_stm32::i2c::I2c; use embassy_stm32::time::Hertz; -use embassy_stm32::{bind_interrupts, i2c, peripherals}; use {defmt_rtt as _, panic_probe as _}; const HTS221_ADDRESS: u8 = 0x5F; const WHOAMI: u8 = 0x0F; -bind_interrupts!(struct Irqs { - I2C2_EV => i2c::EventInterruptHandler; - I2C2_ER => i2c::ErrorInterruptHandler; -}); - #[embassy_executor::main] async fn main(_spawner: Spawner) { let p = embassy_stm32::init(Default::default()); - let mut i2c = I2c::new( - p.I2C2, - p.PH4, - p.PH5, - Irqs, - NoDma, - NoDma, - Hertz(100_000), - Default::default(), - ); + let mut i2c = I2c::new_blocking(p.I2C2, p.PH4, p.PH5, Hertz(100_000), Default::default()); let mut data = [0u8; 1]; unwrap!(i2c.blocking_write_read(HTS221_ADDRESS, &[WHOAMI], &mut data)); From c5119c6318f72a69f1bdfb91e7987dff954d6c1e Mon Sep 17 00:00:00 2001 From: Warren Campbell Date: Mon, 15 Apr 2024 17:32:44 -0400 Subject: [PATCH 154/581] Add support for using secure registers --- embassy-stm32/Cargo.toml | 3 +++ embassy-stm32/src/flash/u5.rs | 39 +++++++++++++++++++++++++++++++++++ examples/stm32u5/Cargo.toml | 4 ++++ 3 files changed, 46 insertions(+) diff --git a/embassy-stm32/Cargo.toml b/embassy-stm32/Cargo.toml index 459d2e370..1f9a51678 100644 --- a/embassy-stm32/Cargo.toml +++ b/embassy-stm32/Cargo.toml @@ -115,6 +115,9 @@ low-power-debug-with-sleep = [] ## Automatically generate `memory.x` file using [`stm32-metapac`](https://docs.rs/stm32-metapac/) memory-x = ["stm32-metapac/memory-x"] +## Use secure registers when TrustZone is enabled +trustzone-secure = [] + ## Re-export stm32-metapac at `embassy_stm32::pac`. ## This is unstable because semver-minor (non-breaking) releases of embassy-stm32 may major-bump (breaking) the stm32-metapac version. ## If this is an issue for you, you're encouraged to directly depend on a fixed version of the PAC. diff --git a/embassy-stm32/src/flash/u5.rs b/embassy-stm32/src/flash/u5.rs index 4a2168b14..ddd4d73ff 100644 --- a/embassy-stm32/src/flash/u5.rs +++ b/embassy-stm32/src/flash/u5.rs @@ -14,10 +14,19 @@ pub(crate) const fn get_flash_regions() -> &'static [&'static FlashRegion] { } pub(crate) unsafe fn lock() { + #[cfg(feature = "trustzone-secure")] + pac::FLASH.seccr().modify(|w| w.set_lock(true)); + #[cfg(not(feature = "trustzone-secure"))] pac::FLASH.nscr().modify(|w| w.set_lock(true)); } pub(crate) unsafe fn unlock() { + #[cfg(feature = "trustzone-secure")] + if pac::FLASH.seccr().read().lock() { + pac::FLASH.seckeyr().write_value(0x4567_0123); + pac::FLASH.seckeyr().write_value(0xCDEF_89AB); + } + #[cfg(not(feature = "trustzone-secure"))] if pac::FLASH.nscr().read().lock() { pac::FLASH.nskeyr().write_value(0x4567_0123); pac::FLASH.nskeyr().write_value(0xCDEF_89AB); @@ -27,12 +36,20 @@ pub(crate) unsafe fn unlock() { pub(crate) unsafe fn enable_blocking_write() { assert_eq!(0, WRITE_SIZE % 4); + #[cfg(feature = "trustzone-secure")] + pac::FLASH.seccr().write(|w| { + w.set_pg(pac::flash::vals::SeccrPg::B_0X1); + }); + #[cfg(not(feature = "trustzone-secure"))] pac::FLASH.nscr().write(|w| { w.set_pg(pac::flash::vals::NscrPg::B_0X1); }); } pub(crate) unsafe fn disable_blocking_write() { + #[cfg(feature = "trustzone-secure")] + pac::FLASH.seccr().write(|w| w.set_pg(pac::flash::vals::SeccrPg::B_0X0)); + #[cfg(not(feature = "trustzone-secure"))] pac::FLASH.nscr().write(|w| w.set_pg(pac::flash::vals::NscrPg::B_0X0)); } @@ -50,16 +67,32 @@ pub(crate) unsafe fn blocking_write(start_address: u32, buf: &[u8; WRITE_SIZE]) } pub(crate) unsafe fn blocking_erase_sector(sector: &FlashSector) -> Result<(), Error> { + #[cfg(feature = "trustzone-secure")] + pac::FLASH.seccr().modify(|w| { + w.set_per(pac::flash::vals::SeccrPer::B_0X1); + w.set_pnb(sector.index_in_bank) + }); + #[cfg(not(feature = "trustzone-secure"))] pac::FLASH.nscr().modify(|w| { w.set_per(pac::flash::vals::NscrPer::B_0X1); w.set_pnb(sector.index_in_bank) }); + #[cfg(feature = "trustzone-secure")] + pac::FLASH.seccr().modify(|w| { + w.set_strt(true); + }); + #[cfg(not(feature = "trustzone-secure"))] pac::FLASH.nscr().modify(|w| { w.set_strt(true); }); let ret: Result<(), Error> = blocking_wait_ready(); + #[cfg(feature = "trustzone-secure")] + pac::FLASH + .seccr() + .modify(|w| w.set_per(pac::flash::vals::SeccrPer::B_0X0)); + #[cfg(not(feature = "trustzone-secure"))] pac::FLASH .nscr() .modify(|w| w.set_per(pac::flash::vals::NscrPer::B_0X0)); @@ -70,11 +103,17 @@ pub(crate) unsafe fn blocking_erase_sector(sector: &FlashSector) -> Result<(), E pub(crate) unsafe fn clear_all_err() { // read and write back the same value. // This clears all "write 1 to clear" bits. + #[cfg(feature = "trustzone-secure")] + pac::FLASH.secsr().modify(|_| {}); + #[cfg(not(feature = "trustzone-secure"))] pac::FLASH.nssr().modify(|_| {}); } unsafe fn blocking_wait_ready() -> Result<(), Error> { loop { + #[cfg(feature = "trustzone-secure")] + let sr = pac::FLASH.secsr().read(); + #[cfg(not(feature = "trustzone-secure"))] let sr = pac::FLASH.nssr().read(); if !sr.bsy() { diff --git a/examples/stm32u5/Cargo.toml b/examples/stm32u5/Cargo.toml index 03294339d..01320b88d 100644 --- a/examples/stm32u5/Cargo.toml +++ b/examples/stm32u5/Cargo.toml @@ -24,5 +24,9 @@ heapless = { version = "0.8", default-features = false } micromath = "2.0.0" +[features] +## Use secure registers when TrustZone is enabled +trustzone-secure = ["embassy-stm32/trustzone-secure"] + [profile.release] debug = 2 From d6b1233f16407e3501efcd1885460645a75ed57b Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Tue, 16 Apr 2024 02:00:43 +0200 Subject: [PATCH 155/581] stm32/usart: remove DMA generic params. --- embassy-stm32/src/macros.rs | 10 +- embassy-stm32/src/usart/mod.rs | 868 ++++++++++++------- embassy-stm32/src/usart/ringbuffered.rs | 20 +- examples/stm32f3/src/bin/usart_dma.rs | 3 +- examples/stm32f4/src/bin/usart.rs | 3 +- examples/stm32f4/src/bin/usart_dma.rs | 3 +- examples/stm32f7/src/bin/usart_dma.rs | 3 +- examples/stm32h5/src/bin/usart.rs | 8 +- examples/stm32h5/src/bin/usart_dma.rs | 3 +- examples/stm32h5/src/bin/usart_split.rs | 18 +- examples/stm32h7/src/bin/usart.rs | 8 +- examples/stm32h7/src/bin/usart_dma.rs | 3 +- examples/stm32h7/src/bin/usart_split.rs | 18 +- examples/stm32l4/src/bin/usart.rs | 3 +- examples/stm32l4/src/bin/usart_dma.rs | 3 +- tests/stm32/src/bin/usart.rs | 8 +- tests/stm32/src/bin/usart_rx_ringbuffered.rs | 3 +- 17 files changed, 574 insertions(+), 411 deletions(-) diff --git a/embassy-stm32/src/macros.rs b/embassy-stm32/src/macros.rs index f603f661f..14137bc37 100644 --- a/embassy-stm32/src/macros.rs +++ b/embassy-stm32/src/macros.rs @@ -82,12 +82,12 @@ macro_rules! new_dma { } macro_rules! new_pin { - ($name:ident, $aftype:expr, $speed:expr) => {{ - let pin = $name.into_ref(); - pin.set_as_af(pin.af_num(), $aftype); - pin.set_speed($speed); - Some(pin.map_into()) + ($name:ident, $aftype:expr) => {{ + new_pin!($name, $aftype, crate::gpio::Speed::Medium, crate::gpio::Pull::None) }}; + ($name:ident, $aftype:expr, $speed:expr) => { + new_pin!($name, $aftype, $speed, crate::gpio::Pull::None) + }; ($name:ident, $aftype:expr, $speed:expr, $pull:expr) => {{ let pin = $name.into_ref(); pin.set_as_af_pull(pin.af_num(), $aftype, $pull); diff --git a/embassy-stm32/src/usart/mod.rs b/embassy-stm32/src/usart/mod.rs index 7c0523a25..e7fdf4da6 100644 --- a/embassy-stm32/src/usart/mod.rs +++ b/embassy-stm32/src/usart/mod.rs @@ -13,9 +13,10 @@ use embassy_hal_internal::{into_ref, PeripheralRef}; use embassy_sync::waitqueue::AtomicWaker; use futures::future::{select, Either}; -use crate::dma::{NoDma, Transfer}; -use crate::gpio::AFType; +use crate::dma::ChannelAndRequest; +use crate::gpio::{AFType, AnyPin, SealedPin}; use crate::interrupt::typelevel::Interrupt; +use crate::mode::{Async, Blocking, Mode}; #[allow(unused_imports)] #[cfg(not(any(usart_v1, usart_v2)))] use crate::pac::usart::regs::Isr as Sr; @@ -162,6 +163,26 @@ pub struct Config { /// Set this to true to invert RX pin signal values (VDD =0/mark, Gnd = 1/idle). #[cfg(any(usart_v3, usart_v4))] pub invert_rx: bool, + + // private: set by new_half_duplex, not by the user. + half_duplex: bool, +} + +impl Config { + fn tx_af(&self) -> AFType { + #[cfg(any(usart_v3, usart_v4))] + if self.swap_rx_tx { + return AFType::Input; + }; + AFType::OutputPushPull + } + fn rx_af(&self) -> AFType { + #[cfg(any(usart_v3, usart_v4))] + if self.swap_rx_tx { + return AFType::OutputPushPull; + }; + AFType::Input + } } impl Default for Config { @@ -181,6 +202,7 @@ impl Default for Config { invert_tx: false, #[cfg(any(usart_v3, usart_v4))] invert_rx: false, + half_duplex: false, } } } @@ -217,12 +239,12 @@ enum ReadCompletionEvent { /// /// See [`UartRx`] for more details, and see [`BufferedUart`] and [`RingBufferedUartRx`] /// as alternatives that do provide the necessary guarantees for `embedded_io::Read`. -pub struct Uart<'d, T: BasicInstance, TxDma = NoDma, RxDma = NoDma> { - tx: UartTx<'d, T, TxDma>, - rx: UartRx<'d, T, RxDma>, +pub struct Uart<'d, T: BasicInstance, M: Mode> { + tx: UartTx<'d, T, M>, + rx: UartRx<'d, T, M>, } -impl<'d, T: BasicInstance, TxDma, RxDma> SetConfig for Uart<'d, T, TxDma, RxDma> { +impl<'d, T: BasicInstance, M: Mode> SetConfig for Uart<'d, T, M> { type Config = Config; type ConfigError = ConfigError; @@ -236,12 +258,15 @@ impl<'d, T: BasicInstance, TxDma, RxDma> SetConfig for Uart<'d, T, TxDma, RxDma> /// /// Can be obtained from [`Uart::split`], or can be constructed independently, /// if you do not need the receiving half of the driver. -pub struct UartTx<'d, T: BasicInstance, TxDma = NoDma> { - phantom: PhantomData<&'d mut T>, - tx_dma: PeripheralRef<'d, TxDma>, +pub struct UartTx<'d, T: BasicInstance, M: Mode> { + _phantom: PhantomData<(T, M)>, + tx: Option>, + cts: Option>, + de: Option>, + tx_dma: Option>, } -impl<'d, T: BasicInstance, TxDma> SetConfig for UartTx<'d, T, TxDma> { +impl<'d, T: BasicInstance, M: Mode> SetConfig for UartTx<'d, T, M> { type Config = Config; type ConfigError = ConfigError; @@ -279,15 +304,17 @@ impl<'d, T: BasicInstance, TxDma> SetConfig for UartTx<'d, T, TxDma> { /// store data received between calls. /// /// Also see [this github comment](https://github.com/embassy-rs/embassy/pull/2185#issuecomment-1810047043). -pub struct UartRx<'d, T: BasicInstance, RxDma = NoDma> { - _peri: PeripheralRef<'d, T>, - rx_dma: PeripheralRef<'d, RxDma>, +pub struct UartRx<'d, T: BasicInstance, M: Mode> { + _phantom: PhantomData<(T, M)>, + rx: Option>, + rts: Option>, + rx_dma: Option>, detect_previous_overrun: bool, #[cfg(any(usart_v1, usart_v2))] buffered_sr: stm32_metapac::usart::regs::Sr, } -impl<'d, T: BasicInstance, RxDma> SetConfig for UartRx<'d, T, RxDma> { +impl<'d, T: BasicInstance, M: Mode> SetConfig for UartRx<'d, T, M> { type Config = Config; type ConfigError = ConfigError; @@ -296,17 +323,21 @@ impl<'d, T: BasicInstance, RxDma> SetConfig for UartRx<'d, T, RxDma> { } } -impl<'d, T: BasicInstance, TxDma> UartTx<'d, T, TxDma> { +impl<'d, T: BasicInstance> UartTx<'d, T, Async> { /// Useful if you only want Uart Tx. It saves 1 pin and consumes a little less power. pub fn new( peri: impl Peripheral

+ 'd, tx: impl Peripheral

> + 'd, - tx_dma: impl Peripheral

+ 'd, + tx_dma: impl Peripheral

> + 'd, config: Config, ) -> Result { - T::enable_and_reset(); - - Self::new_inner(peri, tx, tx_dma, config) + Self::new_inner( + peri, + new_pin!(tx, AFType::OutputPushPull), + None, + new_dma!(tx_dma), + config, + ) } /// Create a new tx-only UART with a clear-to-send pin @@ -314,40 +345,86 @@ impl<'d, T: BasicInstance, TxDma> UartTx<'d, T, TxDma> { peri: impl Peripheral

+ 'd, tx: impl Peripheral

> + 'd, cts: impl Peripheral

> + 'd, - tx_dma: impl Peripheral

+ 'd, + tx_dma: impl Peripheral

> + 'd, config: Config, ) -> Result { - into_ref!(cts); - - T::enable_and_reset(); - - cts.set_as_af(cts.af_num(), AFType::Input); - T::regs().cr3().write(|w| { - w.set_ctse(true); - }); - Self::new_inner(peri, tx, tx_dma, config) + Self::new_inner( + peri, + new_pin!(tx, AFType::OutputPushPull), + new_pin!(cts, AFType::Input), + new_dma!(tx_dma), + config, + ) } - fn new_inner( - _peri: impl Peripheral

+ 'd, + /// Initiate an asynchronous UART write + pub async fn write(&mut self, buffer: &[u8]) -> Result<(), Error> { + let ch = self.tx_dma.as_mut().unwrap(); + T::regs().cr3().modify(|reg| { + reg.set_dmat(true); + }); + // If we don't assign future to a variable, the data register pointer + // is held across an await and makes the future non-Send. + let transfer = unsafe { ch.write(buffer, tdr(T::regs()), Default::default()) }; + transfer.await; + Ok(()) + } +} + +impl<'d, T: BasicInstance> UartTx<'d, T, Blocking> { + /// Create a new blocking tx-only UART with no hardware flow control. + /// + /// Useful if you only want Uart Tx. It saves 1 pin and consumes a little less power. + pub fn new_blocking( + peri: impl Peripheral

+ 'd, tx: impl Peripheral

> + 'd, - tx_dma: impl Peripheral

+ 'd, config: Config, ) -> Result { - into_ref!(_peri, tx, tx_dma); + Self::new_inner(peri, new_pin!(tx, AFType::OutputPushPull), None, None, config) + } + + /// Create a new blocking tx-only UART with a clear-to-send pin + pub fn new_blocking_with_cts( + peri: impl Peripheral

+ 'd, + tx: impl Peripheral

> + 'd, + cts: impl Peripheral

> + 'd, + config: Config, + ) -> Result { + Self::new_inner( + peri, + new_pin!(tx, AFType::OutputPushPull), + new_pin!(cts, AFType::Input), + None, + config, + ) + } +} + +impl<'d, T: BasicInstance, M: Mode> UartTx<'d, T, M> { + fn new_inner( + _peri: impl Peripheral

+ 'd, + tx: Option>, + cts: Option>, + tx_dma: Option>, + config: Config, + ) -> Result { + T::enable_and_reset(); let r = T::regs(); - - tx.set_as_af(tx.af_num(), AFType::OutputPushPull); - + r.cr3().modify(|w| { + w.set_ctse(cts.is_some()); + }); configure(r, &config, T::frequency(), T::KIND, false, true)?; // create state once! let _s = T::state(); Ok(Self { + tx, + cts, + de: None, tx_dma, - phantom: PhantomData, + _phantom: PhantomData, }) } @@ -356,23 +433,6 @@ impl<'d, T: BasicInstance, TxDma> UartTx<'d, T, TxDma> { reconfigure::(config) } - /// Initiate an asynchronous UART write - pub async fn write(&mut self, buffer: &[u8]) -> Result<(), Error> - where - TxDma: crate::usart::TxDma, - { - let ch = &mut self.tx_dma; - let request = ch.request(); - T::regs().cr3().modify(|reg| { - reg.set_dmat(true); - }); - // If we don't assign future to a variable, the data register pointer - // is held across an await and makes the future non-Send. - let transfer = unsafe { Transfer::new_write(ch, request, buffer, tdr(T::regs()), Default::default()) }; - transfer.await; - Ok(()) - } - /// Perform a blocking UART write pub fn blocking_write(&mut self, buffer: &[u8]) -> Result<(), Error> { let r = T::regs(); @@ -391,18 +451,18 @@ impl<'d, T: BasicInstance, TxDma> UartTx<'d, T, TxDma> { } } -impl<'d, T: BasicInstance, RxDma> UartRx<'d, T, RxDma> { +impl<'d, T: BasicInstance> UartRx<'d, T, Async> { + /// Create a new rx-only UART with no hardware flow control. + /// /// Useful if you only want Uart Rx. It saves 1 pin and consumes a little less power. pub fn new( peri: impl Peripheral

+ 'd, _irq: impl interrupt::typelevel::Binding> + 'd, rx: impl Peripheral

> + 'd, - rx_dma: impl Peripheral

+ 'd, + rx_dma: impl Peripheral

> + 'd, config: Config, ) -> Result { - T::enable_and_reset(); - - Self::new_inner(peri, rx, rx_dma, config) + Self::new_inner(peri, new_pin!(rx, AFType::Input), None, new_dma!(rx_dma), config) } /// Create a new rx-only UART with a request-to-send pin @@ -411,143 +471,27 @@ impl<'d, T: BasicInstance, RxDma> UartRx<'d, T, RxDma> { _irq: impl interrupt::typelevel::Binding> + 'd, rx: impl Peripheral

> + 'd, rts: impl Peripheral

> + 'd, - rx_dma: impl Peripheral

+ 'd, + rx_dma: impl Peripheral

> + 'd, config: Config, ) -> Result { - into_ref!(rts); - - T::enable_and_reset(); - - rts.set_as_af(rts.af_num(), AFType::OutputPushPull); - T::regs().cr3().write(|w| { - w.set_rtse(true); - }); - - Self::new_inner(peri, rx, rx_dma, config) - } - - fn new_inner( - peri: impl Peripheral

+ 'd, - rx: impl Peripheral

> + 'd, - rx_dma: impl Peripheral

+ 'd, - config: Config, - ) -> Result { - into_ref!(peri, rx, rx_dma); - - let r = T::regs(); - - rx.set_as_af(rx.af_num(), AFType::Input); - - configure(r, &config, T::frequency(), T::KIND, true, false)?; - - T::Interrupt::unpend(); - unsafe { T::Interrupt::enable() }; - - // create state once! - let _s = T::state(); - - Ok(Self { - _peri: peri, - rx_dma, - detect_previous_overrun: config.detect_previous_overrun, - #[cfg(any(usart_v1, usart_v2))] - buffered_sr: stm32_metapac::usart::regs::Sr(0), - }) - } - - /// Reconfigure the driver - pub fn set_config(&mut self, config: &Config) -> Result<(), ConfigError> { - reconfigure::(config) - } - - #[cfg(any(usart_v1, usart_v2))] - fn check_rx_flags(&mut self) -> Result { - let r = T::regs(); - loop { - // Handle all buffered error flags. - if self.buffered_sr.pe() { - self.buffered_sr.set_pe(false); - return Err(Error::Parity); - } else if self.buffered_sr.fe() { - self.buffered_sr.set_fe(false); - return Err(Error::Framing); - } else if self.buffered_sr.ne() { - self.buffered_sr.set_ne(false); - return Err(Error::Noise); - } else if self.buffered_sr.ore() { - self.buffered_sr.set_ore(false); - return Err(Error::Overrun); - } else if self.buffered_sr.rxne() { - self.buffered_sr.set_rxne(false); - return Ok(true); - } else { - // No error flags from previous iterations were set: Check the actual status register - let sr = r.sr().read(); - if !sr.rxne() { - return Ok(false); - } - - // Buffer the status register and let the loop handle the error flags. - self.buffered_sr = sr; - } - } - } - - #[cfg(any(usart_v3, usart_v4))] - fn check_rx_flags(&mut self) -> Result { - let r = T::regs(); - let sr = r.isr().read(); - if sr.pe() { - r.icr().write(|w| w.set_pe(true)); - return Err(Error::Parity); - } else if sr.fe() { - r.icr().write(|w| w.set_fe(true)); - return Err(Error::Framing); - } else if sr.ne() { - r.icr().write(|w| w.set_ne(true)); - return Err(Error::Noise); - } else if sr.ore() { - r.icr().write(|w| w.set_ore(true)); - return Err(Error::Overrun); - } - Ok(sr.rxne()) + Self::new_inner( + peri, + new_pin!(rx, AFType::Input), + new_pin!(rts, AFType::OutputPushPull), + new_dma!(rx_dma), + config, + ) } /// Initiate an asynchronous UART read - pub async fn read(&mut self, buffer: &mut [u8]) -> Result<(), Error> - where - RxDma: crate::usart::RxDma, - { + pub async fn read(&mut self, buffer: &mut [u8]) -> Result<(), Error> { self.inner_read(buffer, false).await?; Ok(()) } - /// Read a single u8 if there is one available, otherwise return WouldBlock - pub fn nb_read(&mut self) -> Result> { - let r = T::regs(); - if self.check_rx_flags()? { - Ok(unsafe { rdr(r).read_volatile() }) - } else { - Err(nb::Error::WouldBlock) - } - } - - /// Perform a blocking read into `buffer` - pub fn blocking_read(&mut self, buffer: &mut [u8]) -> Result<(), Error> { - let r = T::regs(); - for b in buffer { - while !self.check_rx_flags()? {} - unsafe { *b = rdr(r).read_volatile() } - } - Ok(()) - } - /// Initiate an asynchronous read with idle line detection enabled - pub async fn read_until_idle(&mut self, buffer: &mut [u8]) -> Result - where - RxDma: crate::usart::RxDma, - { + pub async fn read_until_idle(&mut self, buffer: &mut [u8]) -> Result { self.inner_read(buffer, true).await } @@ -555,10 +499,7 @@ impl<'d, T: BasicInstance, RxDma> UartRx<'d, T, RxDma> { &mut self, buffer: &mut [u8], enable_idle_line_detection: bool, - ) -> Result - where - RxDma: crate::usart::RxDma, - { + ) -> Result { let r = T::regs(); // make sure USART state is restored to neutral state when this future is dropped @@ -581,15 +522,14 @@ impl<'d, T: BasicInstance, RxDma> UartRx<'d, T, RxDma> { }); }); - let ch = &mut self.rx_dma; - let request = ch.request(); + let ch = self.rx_dma.as_mut().unwrap(); let buffer_len = buffer.len(); // Start USART DMA // will not do anything yet because DMAR is not yet set // future which will complete when DMA Read request completes - let transfer = unsafe { Transfer::new_read(ch, request, rdr(T::regs()), buffer, Default::default()) }; + let transfer = unsafe { ch.read(rdr(T::regs()), buffer, Default::default()) }; // clear ORE flag just before enabling DMA Rx Request: can be mandatory for the second transfer if !self.detect_previous_overrun { @@ -732,10 +672,7 @@ impl<'d, T: BasicInstance, RxDma> UartRx<'d, T, RxDma> { r } - async fn inner_read(&mut self, buffer: &mut [u8], enable_idle_line_detection: bool) -> Result - where - RxDma: crate::usart::RxDma, - { + async fn inner_read(&mut self, buffer: &mut [u8], enable_idle_line_detection: bool) -> Result { if buffer.is_empty() { return Ok(0); } else if buffer.len() > 0xFFFF { @@ -755,34 +692,186 @@ impl<'d, T: BasicInstance, RxDma> UartRx<'d, T, RxDma> { } } -impl<'d, T: BasicInstance, TxDma> Drop for UartTx<'d, T, TxDma> { +impl<'d, T: BasicInstance> UartRx<'d, T, Blocking> { + /// Create a new rx-only UART with no hardware flow control. + /// + /// Useful if you only want Uart Rx. It saves 1 pin and consumes a little less power. + pub fn new_blocking( + peri: impl Peripheral

+ 'd, + rx: impl Peripheral

> + 'd, + config: Config, + ) -> Result { + Self::new_inner(peri, new_pin!(rx, AFType::Input), None, None, config) + } + + /// Create a new rx-only UART with a request-to-send pin + pub fn new_blocking_with_rts( + peri: impl Peripheral

+ 'd, + rx: impl Peripheral

> + 'd, + rts: impl Peripheral

> + 'd, + config: Config, + ) -> Result { + Self::new_inner( + peri, + new_pin!(rx, AFType::Input), + new_pin!(rts, AFType::OutputPushPull), + None, + config, + ) + } +} + +impl<'d, T: BasicInstance, M: Mode> UartRx<'d, T, M> { + fn new_inner( + _peri: impl Peripheral

+ 'd, + rx: Option>, + rts: Option>, + rx_dma: Option>, + config: Config, + ) -> Result { + T::enable_and_reset(); + + let r = T::regs(); + r.cr3().write(|w| { + w.set_rtse(rts.is_some()); + }); + configure(r, &config, T::frequency(), T::KIND, true, false)?; + + T::Interrupt::unpend(); + unsafe { T::Interrupt::enable() }; + + // create state once! + let _s = T::state(); + + Ok(Self { + _phantom: PhantomData, + rx, + rts, + rx_dma, + detect_previous_overrun: config.detect_previous_overrun, + #[cfg(any(usart_v1, usart_v2))] + buffered_sr: stm32_metapac::usart::regs::Sr(0), + }) + } + + /// Reconfigure the driver + pub fn set_config(&mut self, config: &Config) -> Result<(), ConfigError> { + reconfigure::(config) + } + + #[cfg(any(usart_v1, usart_v2))] + fn check_rx_flags(&mut self) -> Result { + let r = T::regs(); + loop { + // Handle all buffered error flags. + if self.buffered_sr.pe() { + self.buffered_sr.set_pe(false); + return Err(Error::Parity); + } else if self.buffered_sr.fe() { + self.buffered_sr.set_fe(false); + return Err(Error::Framing); + } else if self.buffered_sr.ne() { + self.buffered_sr.set_ne(false); + return Err(Error::Noise); + } else if self.buffered_sr.ore() { + self.buffered_sr.set_ore(false); + return Err(Error::Overrun); + } else if self.buffered_sr.rxne() { + self.buffered_sr.set_rxne(false); + return Ok(true); + } else { + // No error flags from previous iterations were set: Check the actual status register + let sr = r.sr().read(); + if !sr.rxne() { + return Ok(false); + } + + // Buffer the status register and let the loop handle the error flags. + self.buffered_sr = sr; + } + } + } + + #[cfg(any(usart_v3, usart_v4))] + fn check_rx_flags(&mut self) -> Result { + let r = T::regs(); + let sr = r.isr().read(); + if sr.pe() { + r.icr().write(|w| w.set_pe(true)); + return Err(Error::Parity); + } else if sr.fe() { + r.icr().write(|w| w.set_fe(true)); + return Err(Error::Framing); + } else if sr.ne() { + r.icr().write(|w| w.set_ne(true)); + return Err(Error::Noise); + } else if sr.ore() { + r.icr().write(|w| w.set_ore(true)); + return Err(Error::Overrun); + } + Ok(sr.rxne()) + } + + /// Read a single u8 if there is one available, otherwise return WouldBlock + pub(crate) fn nb_read(&mut self) -> Result> { + let r = T::regs(); + if self.check_rx_flags()? { + Ok(unsafe { rdr(r).read_volatile() }) + } else { + Err(nb::Error::WouldBlock) + } + } + + /// Perform a blocking read into `buffer` + pub fn blocking_read(&mut self, buffer: &mut [u8]) -> Result<(), Error> { + let r = T::regs(); + for b in buffer { + while !self.check_rx_flags()? {} + unsafe { *b = rdr(r).read_volatile() } + } + Ok(()) + } +} + +impl<'d, T: BasicInstance, M: Mode> Drop for UartTx<'d, T, M> { fn drop(&mut self) { + self.tx.as_ref().map(|x| x.set_as_disconnected()); + self.cts.as_ref().map(|x| x.set_as_disconnected()); + self.de.as_ref().map(|x| x.set_as_disconnected()); T::disable(); } } -impl<'d, T: BasicInstance, TxDma> Drop for UartRx<'d, T, TxDma> { +impl<'d, T: BasicInstance, M: Mode> Drop for UartRx<'d, T, M> { fn drop(&mut self) { + self.rx.as_ref().map(|x| x.set_as_disconnected()); + self.rts.as_ref().map(|x| x.set_as_disconnected()); T::disable(); } } -impl<'d, T: BasicInstance, TxDma, RxDma> Uart<'d, T, TxDma, RxDma> { +impl<'d, T: BasicInstance> Uart<'d, T, Async> { /// Create a new bidirectional UART pub fn new( peri: impl Peripheral

+ 'd, rx: impl Peripheral

> + 'd, tx: impl Peripheral

> + 'd, _irq: impl interrupt::typelevel::Binding> + 'd, - tx_dma: impl Peripheral

+ 'd, - rx_dma: impl Peripheral

+ 'd, + tx_dma: impl Peripheral

> + 'd, + rx_dma: impl Peripheral

> + 'd, config: Config, ) -> Result { - // UartRx and UartTx have one refcount ea. - T::enable_and_reset(); - T::enable_and_reset(); - - Self::new_inner_configure(peri, rx, tx, tx_dma, rx_dma, config) + Self::new_inner( + peri, + new_pin!(rx, config.rx_af()), + new_pin!(tx, config.tx_af()), + None, + None, + None, + new_dma!(tx_dma), + new_dma!(rx_dma), + config, + ) } /// Create a new bidirectional UART with request-to-send and clear-to-send pins @@ -793,23 +882,21 @@ impl<'d, T: BasicInstance, TxDma, RxDma> Uart<'d, T, TxDma, RxDma> { _irq: impl interrupt::typelevel::Binding> + 'd, rts: impl Peripheral

> + 'd, cts: impl Peripheral

> + 'd, - tx_dma: impl Peripheral

+ 'd, - rx_dma: impl Peripheral

+ 'd, + tx_dma: impl Peripheral

> + 'd, + rx_dma: impl Peripheral

> + 'd, config: Config, ) -> Result { - into_ref!(cts, rts); - - // UartRx and UartTx have one refcount ea. - T::enable_and_reset(); - T::enable_and_reset(); - - rts.set_as_af(rts.af_num(), AFType::OutputPushPull); - cts.set_as_af(cts.af_num(), AFType::Input); - T::regs().cr3().write(|w| { - w.set_rtse(true); - w.set_ctse(true); - }); - Self::new_inner_configure(peri, rx, tx, tx_dma, rx_dma, config) + Self::new_inner( + peri, + new_pin!(rx, config.rx_af()), + new_pin!(tx, config.tx_af()), + new_pin!(rts, AFType::OutputPushPull), + new_pin!(cts, AFType::Input), + None, + new_dma!(tx_dma), + new_dma!(rx_dma), + config, + ) } #[cfg(not(any(usart_v1, usart_v2)))] @@ -820,21 +907,21 @@ impl<'d, T: BasicInstance, TxDma, RxDma> Uart<'d, T, TxDma, RxDma> { tx: impl Peripheral

> + 'd, _irq: impl interrupt::typelevel::Binding> + 'd, de: impl Peripheral

> + 'd, - tx_dma: impl Peripheral

+ 'd, - rx_dma: impl Peripheral

+ 'd, + tx_dma: impl Peripheral

> + 'd, + rx_dma: impl Peripheral

> + 'd, config: Config, ) -> Result { - into_ref!(de); - - // UartRx and UartTx have one refcount ea. - T::enable_and_reset(); - T::enable_and_reset(); - - de.set_as_af(de.af_num(), AFType::OutputPushPull); - T::regs().cr3().write(|w| { - w.set_dem(true); - }); - Self::new_inner_configure(peri, rx, tx, tx_dma, rx_dma, config) + Self::new_inner( + peri, + new_pin!(rx, config.rx_af()), + new_pin!(tx, config.tx_af()), + None, + None, + new_pin!(de, AFType::OutputPushPull), + new_dma!(tx_dma), + new_dma!(rx_dma), + config, + ) } /// Create a single-wire half-duplex Uart transceiver on a single Tx pin. @@ -852,22 +939,24 @@ impl<'d, T: BasicInstance, TxDma, RxDma> Uart<'d, T, TxDma, RxDma> { peri: impl Peripheral

+ 'd, tx: impl Peripheral

> + 'd, _irq: impl interrupt::typelevel::Binding> + 'd, - tx_dma: impl Peripheral

+ 'd, - rx_dma: impl Peripheral

+ 'd, + tx_dma: impl Peripheral

> + 'd, + rx_dma: impl Peripheral

> + 'd, mut config: Config, ) -> Result { - // UartRx and UartTx have one refcount ea. - T::enable_and_reset(); - T::enable_and_reset(); - config.swap_rx_tx = false; + config.half_duplex = true; - into_ref!(peri, tx, tx_dma, rx_dma); - - T::regs().cr3().write(|w| w.set_hdsel(true)); - tx.set_as_af(tx.af_num(), AFType::OutputPushPull); - - Self::new_inner(peri, tx_dma, rx_dma, config) + Self::new_inner( + peri, + None, + new_pin!(tx, AFType::OutputPushPull), + None, + None, + None, + new_dma!(tx_dma), + new_dma!(rx_dma), + config, + ) } /// Create a single-wire half-duplex Uart transceiver on a single Rx pin. @@ -885,62 +974,196 @@ impl<'d, T: BasicInstance, TxDma, RxDma> Uart<'d, T, TxDma, RxDma> { peri: impl Peripheral

+ 'd, rx: impl Peripheral

> + 'd, _irq: impl interrupt::typelevel::Binding> + 'd, - tx_dma: impl Peripheral

+ 'd, - rx_dma: impl Peripheral

+ 'd, + tx_dma: impl Peripheral

> + 'd, + rx_dma: impl Peripheral

> + 'd, mut config: Config, ) -> Result { - // UartRx and UartTx have one refcount ea. - T::enable_and_reset(); - T::enable_and_reset(); - config.swap_rx_tx = true; + config.half_duplex = true; - into_ref!(peri, rx, tx_dma, rx_dma); - - T::regs().cr3().write(|w| w.set_hdsel(true)); - rx.set_as_af(rx.af_num(), AFType::OutputPushPull); - - Self::new_inner(peri, tx_dma, rx_dma, config) + Self::new_inner( + peri, + None, + None, + new_pin!(rx, AFType::OutputPushPull), + None, + None, + new_dma!(tx_dma), + new_dma!(rx_dma), + config, + ) } - fn new_inner_configure( + /// Perform an asynchronous write + pub async fn write(&mut self, buffer: &[u8]) -> Result<(), Error> { + self.tx.write(buffer).await + } + + /// Perform an asynchronous read into `buffer` + pub async fn read(&mut self, buffer: &mut [u8]) -> Result<(), Error> { + self.rx.read(buffer).await + } + + /// Perform an an asynchronous read with idle line detection enabled + pub async fn read_until_idle(&mut self, buffer: &mut [u8]) -> Result { + self.rx.read_until_idle(buffer).await + } +} + +impl<'d, T: BasicInstance> Uart<'d, T, Blocking> { + /// Create a new blocking bidirectional UART. + pub fn new_blocking( peri: impl Peripheral

+ 'd, rx: impl Peripheral

> + 'd, tx: impl Peripheral

> + 'd, - tx_dma: impl Peripheral

+ 'd, - rx_dma: impl Peripheral

+ 'd, config: Config, ) -> Result { - into_ref!(peri, rx, tx, tx_dma, rx_dma); - - // Some chips do not have swap_rx_tx bit - cfg_if::cfg_if! { - if #[cfg(any(usart_v3, usart_v4))] { - if config.swap_rx_tx { - let (rx, tx) = (tx, rx); - rx.set_as_af(rx.af_num(), AFType::Input); - tx.set_as_af(tx.af_num(), AFType::OutputPushPull); - } else { - rx.set_as_af(rx.af_num(), AFType::Input); - tx.set_as_af(tx.af_num(), AFType::OutputPushPull); - } - } else { - rx.set_as_af(rx.af_num(), AFType::Input); - tx.set_as_af(tx.af_num(), AFType::OutputPushPull); - } - } - - Self::new_inner(peri, tx_dma, rx_dma, config) + Self::new_inner( + peri, + new_pin!(rx, config.rx_af()), + new_pin!(tx, config.tx_af()), + None, + None, + None, + None, + None, + config, + ) } - fn new_inner( - peri: PeripheralRef<'d, T>, - tx_dma: PeripheralRef<'d, TxDma>, - rx_dma: PeripheralRef<'d, RxDma>, + /// Create a new bidirectional UART with request-to-send and clear-to-send pins + pub fn new_blocking_with_rtscts( + peri: impl Peripheral

+ 'd, + rx: impl Peripheral

> + 'd, + tx: impl Peripheral

> + 'd, + rts: impl Peripheral

> + 'd, + cts: impl Peripheral

> + 'd, config: Config, ) -> Result { + Self::new_inner( + peri, + new_pin!(rx, config.rx_af()), + new_pin!(tx, config.tx_af()), + new_pin!(rts, AFType::OutputPushPull), + new_pin!(cts, AFType::Input), + None, + None, + None, + config, + ) + } + + #[cfg(not(any(usart_v1, usart_v2)))] + /// Create a new bidirectional UART with a driver-enable pin + pub fn new_blocking_with_de( + peri: impl Peripheral

+ 'd, + rx: impl Peripheral

> + 'd, + tx: impl Peripheral

> + 'd, + de: impl Peripheral

> + 'd, + config: Config, + ) -> Result { + Self::new_inner( + peri, + new_pin!(rx, config.rx_af()), + new_pin!(tx, config.tx_af()), + None, + None, + new_pin!(de, AFType::OutputPushPull), + None, + None, + config, + ) + } + + /// Create a single-wire half-duplex Uart transceiver on a single Tx pin. + /// + /// See [`new_half_duplex_on_rx`][`Self::new_half_duplex_on_rx`] if you would prefer to use an Rx pin. + /// There is no functional difference between these methods, as both allow bidirectional communication. + /// + /// The pin is always released when no data is transmitted. Thus, it acts as a standard + /// I/O in idle or in reception. + /// Apart from this, the communication protocol is similar to normal USART mode. Any conflict + /// on the line must be managed by software (for instance by using a centralized arbiter). + #[cfg(not(any(usart_v1, usart_v2)))] + #[doc(alias("HDSEL"))] + pub fn new_blocking_half_duplex( + peri: impl Peripheral

+ 'd, + tx: impl Peripheral

> + 'd, + mut config: Config, + ) -> Result { + config.swap_rx_tx = false; + config.half_duplex = true; + + Self::new_inner( + peri, + None, + new_pin!(tx, AFType::OutputPushPull), + None, + None, + None, + None, + None, + config, + ) + } + + /// Create a single-wire half-duplex Uart transceiver on a single Rx pin. + /// + /// See [`new_half_duplex`][`Self::new_half_duplex`] if you would prefer to use an Tx pin. + /// There is no functional difference between these methods, as both allow bidirectional communication. + /// + /// The pin is always released when no data is transmitted. Thus, it acts as a standard + /// I/O in idle or in reception. + /// Apart from this, the communication protocol is similar to normal USART mode. Any conflict + /// on the line must be managed by software (for instance by using a centralized arbiter). + #[cfg(not(any(usart_v1, usart_v2)))] + #[doc(alias("HDSEL"))] + pub fn new_blocking_half_duplex_on_rx( + peri: impl Peripheral

+ 'd, + rx: impl Peripheral

> + 'd, + mut config: Config, + ) -> Result { + config.swap_rx_tx = true; + config.half_duplex = true; + + Self::new_inner( + peri, + None, + None, + new_pin!(rx, AFType::OutputPushPull), + None, + None, + None, + None, + config, + ) + } +} + +impl<'d, T: BasicInstance, M: Mode> Uart<'d, T, M> { + fn new_inner( + _peri: impl Peripheral

+ 'd, + rx: Option>, + tx: Option>, + rts: Option>, + cts: Option>, + de: Option>, + tx_dma: Option>, + rx_dma: Option>, + config: Config, + ) -> Result { + // UartRx and UartTx have one refcount each. + T::enable_and_reset(); + T::enable_and_reset(); + let r = T::regs(); + r.cr3().write(|w| { + w.set_rtse(rts.is_some()); + w.set_ctse(cts.is_some()); + #[cfg(not(any(usart_v1, usart_v2)))] + w.set_dem(de.is_some()); + }); configure(r, &config, T::frequency(), T::KIND, true, true)?; T::Interrupt::unpend(); @@ -951,11 +1174,16 @@ impl<'d, T: BasicInstance, TxDma, RxDma> Uart<'d, T, TxDma, RxDma> { Ok(Self { tx: UartTx { + _phantom: PhantomData, + tx, + cts, + de, tx_dma, - phantom: PhantomData, }, rx: UartRx { - _peri: peri, + _phantom: PhantomData, + rx, + rts, rx_dma, detect_previous_overrun: config.detect_previous_overrun, #[cfg(any(usart_v1, usart_v2))] @@ -964,14 +1192,6 @@ impl<'d, T: BasicInstance, TxDma, RxDma> Uart<'d, T, TxDma, RxDma> { }) } - /// Initiate an asynchronous write - pub async fn write(&mut self, buffer: &[u8]) -> Result<(), Error> - where - TxDma: crate::usart::TxDma, - { - self.tx.write(buffer).await - } - /// Perform a blocking write pub fn blocking_write(&mut self, buffer: &[u8]) -> Result<(), Error> { self.tx.blocking_write(buffer) @@ -982,16 +1202,8 @@ impl<'d, T: BasicInstance, TxDma, RxDma> Uart<'d, T, TxDma, RxDma> { self.tx.blocking_flush() } - /// Initiate an asynchronous read into `buffer` - pub async fn read(&mut self, buffer: &mut [u8]) -> Result<(), Error> - where - RxDma: crate::usart::RxDma, - { - self.rx.read(buffer).await - } - /// Read a single `u8` or return `WouldBlock` - pub fn nb_read(&mut self) -> Result> { + pub(crate) fn nb_read(&mut self) -> Result> { self.rx.nb_read() } @@ -1000,18 +1212,10 @@ impl<'d, T: BasicInstance, TxDma, RxDma> Uart<'d, T, TxDma, RxDma> { self.rx.blocking_read(buffer) } - /// Initiate an an asynchronous read with idle line detection enabled - pub async fn read_until_idle(&mut self, buffer: &mut [u8]) -> Result - where - RxDma: crate::usart::RxDma, - { - self.rx.read_until_idle(buffer).await - } - /// Split the Uart into a transmitter and receiver, which is /// particularly useful when having two tasks correlating to /// transmitting and receiving. - pub fn split(self) -> (UartTx<'d, T, TxDma>, UartRx<'d, T, RxDma>) { + pub fn split(self) -> (UartTx<'d, T, M>, UartRx<'d, T, M>) { (self.tx, self.rx) } } @@ -1153,6 +1357,8 @@ fn configure( #[cfg(not(usart_v1))] r.cr3().modify(|w| { w.set_onebit(config.assume_noise_free); + #[cfg(any(usart_v3, usart_v4))] + w.set_hdsel(config.half_duplex); }); r.cr1().write(|w| { @@ -1185,14 +1391,14 @@ fn configure( Ok(()) } -impl<'d, T: BasicInstance, RxDma> embedded_hal_02::serial::Read for UartRx<'d, T, RxDma> { +impl<'d, T: BasicInstance, M: Mode> embedded_hal_02::serial::Read for UartRx<'d, T, M> { type Error = Error; fn read(&mut self) -> Result> { self.nb_read() } } -impl<'d, T: BasicInstance, TxDma> embedded_hal_02::blocking::serial::Write for UartTx<'d, T, TxDma> { +impl<'d, T: BasicInstance, M: Mode> embedded_hal_02::blocking::serial::Write for UartTx<'d, T, M> { type Error = Error; fn bwrite_all(&mut self, buffer: &[u8]) -> Result<(), Self::Error> { self.blocking_write(buffer) @@ -1202,14 +1408,14 @@ impl<'d, T: BasicInstance, TxDma> embedded_hal_02::blocking::serial::Write f } } -impl<'d, T: BasicInstance, TxDma, RxDma> embedded_hal_02::serial::Read for Uart<'d, T, TxDma, RxDma> { +impl<'d, T: BasicInstance, M: Mode> embedded_hal_02::serial::Read for Uart<'d, T, M> { type Error = Error; fn read(&mut self) -> Result> { self.nb_read() } } -impl<'d, T: BasicInstance, TxDma, RxDma> embedded_hal_02::blocking::serial::Write for Uart<'d, T, TxDma, RxDma> { +impl<'d, T: BasicInstance, M: Mode> embedded_hal_02::blocking::serial::Write for Uart<'d, T, M> { type Error = Error; fn bwrite_all(&mut self, buffer: &[u8]) -> Result<(), Self::Error> { self.blocking_write(buffer) @@ -1231,25 +1437,25 @@ impl embedded_hal_nb::serial::Error for Error { } } -impl<'d, T: BasicInstance, TxDma, RxDma> embedded_hal_nb::serial::ErrorType for Uart<'d, T, TxDma, RxDma> { +impl<'d, T: BasicInstance, M: Mode> embedded_hal_nb::serial::ErrorType for Uart<'d, T, M> { type Error = Error; } -impl<'d, T: BasicInstance, TxDma> embedded_hal_nb::serial::ErrorType for UartTx<'d, T, TxDma> { +impl<'d, T: BasicInstance, M: Mode> embedded_hal_nb::serial::ErrorType for UartTx<'d, T, M> { type Error = Error; } -impl<'d, T: BasicInstance, RxDma> embedded_hal_nb::serial::ErrorType for UartRx<'d, T, RxDma> { +impl<'d, T: BasicInstance, M: Mode> embedded_hal_nb::serial::ErrorType for UartRx<'d, T, M> { type Error = Error; } -impl<'d, T: BasicInstance, RxDma> embedded_hal_nb::serial::Read for UartRx<'d, T, RxDma> { +impl<'d, T: BasicInstance, M: Mode> embedded_hal_nb::serial::Read for UartRx<'d, T, M> { fn read(&mut self) -> nb::Result { self.nb_read() } } -impl<'d, T: BasicInstance, TxDma> embedded_hal_nb::serial::Write for UartTx<'d, T, TxDma> { +impl<'d, T: BasicInstance, M: Mode> embedded_hal_nb::serial::Write for UartTx<'d, T, M> { fn write(&mut self, char: u8) -> nb::Result<(), Self::Error> { self.blocking_write(&[char]).map_err(nb::Error::Other) } @@ -1259,13 +1465,13 @@ impl<'d, T: BasicInstance, TxDma> embedded_hal_nb::serial::Write for UartTx<'d, } } -impl<'d, T: BasicInstance, TxDma, RxDma> embedded_hal_nb::serial::Read for Uart<'d, T, TxDma, RxDma> { +impl<'d, T: BasicInstance, M: Mode> embedded_hal_nb::serial::Read for Uart<'d, T, M> { fn read(&mut self) -> Result> { self.nb_read() } } -impl<'d, T: BasicInstance, TxDma, RxDma> embedded_hal_nb::serial::Write for Uart<'d, T, TxDma, RxDma> { +impl<'d, T: BasicInstance, M: Mode> embedded_hal_nb::serial::Write for Uart<'d, T, M> { fn write(&mut self, char: u8) -> nb::Result<(), Self::Error> { self.blocking_write(&[char]).map_err(nb::Error::Other) } @@ -1281,21 +1487,21 @@ impl embedded_io::Error for Error { } } -impl embedded_io::ErrorType for Uart<'_, T, TxDma, RxDma> +impl embedded_io::ErrorType for Uart<'_, T, M> where T: BasicInstance, { type Error = Error; } -impl embedded_io::ErrorType for UartTx<'_, T, TxDma> +impl embedded_io::ErrorType for UartTx<'_, T, M> where T: BasicInstance, { type Error = Error; } -impl embedded_io::Write for Uart<'_, T, TxDma, RxDma> +impl embedded_io::Write for Uart<'_, T, M> where T: BasicInstance, { @@ -1309,7 +1515,7 @@ where } } -impl embedded_io::Write for UartTx<'_, T, TxDma> +impl embedded_io::Write for UartTx<'_, T, M> where T: BasicInstance, { @@ -1323,10 +1529,9 @@ where } } -impl embedded_io_async::Write for Uart<'_, T, TxDma, RxDma> +impl embedded_io_async::Write for Uart<'_, T, Async> where T: BasicInstance, - TxDma: self::TxDma, { async fn write(&mut self, buf: &[u8]) -> Result { self.write(buf).await?; @@ -1338,10 +1543,9 @@ where } } -impl embedded_io_async::Write for UartTx<'_, T, TxDma> +impl embedded_io_async::Write for UartTx<'_, T, Async> where T: BasicInstance, - TxDma: self::TxDma, { async fn write(&mut self, buf: &[u8]) -> Result { self.write(buf).await?; diff --git a/embassy-stm32/src/usart/ringbuffered.rs b/embassy-stm32/src/usart/ringbuffered.rs index b852f0176..8eb18fe5b 100644 --- a/embassy-stm32/src/usart/ringbuffered.rs +++ b/embassy-stm32/src/usart/ringbuffered.rs @@ -1,21 +1,22 @@ use core::future::poll_fn; +use core::marker::PhantomData; use core::mem; use core::sync::atomic::{compiler_fence, Ordering}; use core::task::Poll; use embassy_embedded_hal::SetConfig; -use embassy_hal_internal::PeripheralRef; use futures::future::{select, Either}; use super::{clear_interrupt_flags, rdr, reconfigure, sr, BasicInstance, Config, ConfigError, Error, UartRx}; use crate::dma::ReadableRingBuffer; +use crate::mode::Async; use crate::usart::{Regs, Sr}; /// Rx-only Ring-buffered UART Driver /// /// Created with [UartRx::into_ring_buffered] pub struct RingBufferedUartRx<'d, T: BasicInstance> { - _peri: PeripheralRef<'d, T>, + _phantom: PhantomData, ring_buf: ReadableRingBuffer<'d, u8>, } @@ -28,26 +29,29 @@ impl<'d, T: BasicInstance> SetConfig for RingBufferedUartRx<'d, T> { } } -impl<'d, T: BasicInstance, RxDma: super::RxDma> UartRx<'d, T, RxDma> { +impl<'d, T: BasicInstance> UartRx<'d, T, Async> { /// Turn the `UartRx` into a buffered uart which can continously receive in the background /// without the possibility of losing bytes. The `dma_buf` is a buffer registered to the /// DMA controller, and must be large enough to prevent overflows. - pub fn into_ring_buffered(self, dma_buf: &'d mut [u8]) -> RingBufferedUartRx<'d, T> { + pub fn into_ring_buffered(mut self, dma_buf: &'d mut [u8]) -> RingBufferedUartRx<'d, T> { assert!(!dma_buf.is_empty() && dma_buf.len() <= 0xFFFF); - let request = self.rx_dma.request(); let opts = Default::default(); // Safety: we forget the struct before this function returns. - let rx_dma = unsafe { self.rx_dma.clone_unchecked() }; - let _peri = unsafe { self._peri.clone_unchecked() }; + let rx_dma = self.rx_dma.as_mut().unwrap(); + let request = rx_dma.request; + let rx_dma = unsafe { rx_dma.channel.clone_unchecked() }; let ring_buf = unsafe { ReadableRingBuffer::new(rx_dma, request, rdr(T::regs()), dma_buf, opts) }; // Don't disable the clock mem::forget(self); - RingBufferedUartRx { _peri, ring_buf } + RingBufferedUartRx { + _phantom: PhantomData, + ring_buf, + } } } diff --git a/examples/stm32f3/src/bin/usart_dma.rs b/examples/stm32f3/src/bin/usart_dma.rs index 5234e53b9..573a49f19 100644 --- a/examples/stm32f3/src/bin/usart_dma.rs +++ b/examples/stm32f3/src/bin/usart_dma.rs @@ -5,7 +5,6 @@ use core::fmt::Write; use defmt::*; use embassy_executor::Spawner; -use embassy_stm32::dma::NoDma; use embassy_stm32::usart::{Config, Uart}; use embassy_stm32::{bind_interrupts, peripherals, usart}; use heapless::String; @@ -21,7 +20,7 @@ async fn main(_spawner: Spawner) { info!("Hello World!"); let config = Config::default(); - let mut usart = Uart::new(p.USART1, p.PE1, p.PE0, Irqs, p.DMA1_CH4, NoDma, config).unwrap(); + let mut usart = Uart::new(p.USART1, p.PE1, p.PE0, Irqs, p.DMA1_CH4, p.DMA1_CH5, config).unwrap(); for n in 0u32.. { let mut s: String<128> = String::new(); diff --git a/examples/stm32f4/src/bin/usart.rs b/examples/stm32f4/src/bin/usart.rs index 40d9d70f1..991bf6673 100644 --- a/examples/stm32f4/src/bin/usart.rs +++ b/examples/stm32f4/src/bin/usart.rs @@ -3,7 +3,6 @@ use cortex_m_rt::entry; use defmt::*; -use embassy_stm32::dma::NoDma; use embassy_stm32::usart::{Config, Uart}; use embassy_stm32::{bind_interrupts, peripherals, usart}; use {defmt_rtt as _, panic_probe as _}; @@ -19,7 +18,7 @@ fn main() -> ! { let p = embassy_stm32::init(Default::default()); let config = Config::default(); - let mut usart = Uart::new(p.USART3, p.PD9, p.PD8, Irqs, NoDma, NoDma, config).unwrap(); + let mut usart = Uart::new_blocking(p.USART3, p.PD9, p.PD8, config).unwrap(); unwrap!(usart.blocking_write(b"Hello Embassy World!\r\n")); info!("wrote Hello, starting echo"); diff --git a/examples/stm32f4/src/bin/usart_dma.rs b/examples/stm32f4/src/bin/usart_dma.rs index dd6de599c..aaf8d6c4f 100644 --- a/examples/stm32f4/src/bin/usart_dma.rs +++ b/examples/stm32f4/src/bin/usart_dma.rs @@ -5,7 +5,6 @@ use core::fmt::Write; use defmt::*; use embassy_executor::Spawner; -use embassy_stm32::dma::NoDma; use embassy_stm32::usart::{Config, Uart}; use embassy_stm32::{bind_interrupts, peripherals, usart}; use heapless::String; @@ -21,7 +20,7 @@ async fn main(_spawner: Spawner) { info!("Hello World!"); let config = Config::default(); - let mut usart = Uart::new(p.USART3, p.PD9, p.PD8, Irqs, p.DMA1_CH3, NoDma, config).unwrap(); + let mut usart = Uart::new(p.USART3, p.PD9, p.PD8, Irqs, p.DMA1_CH3, p.DMA1_CH1, config).unwrap(); for n in 0u32.. { let mut s: String<128> = String::new(); diff --git a/examples/stm32f7/src/bin/usart_dma.rs b/examples/stm32f7/src/bin/usart_dma.rs index fb604b34f..47456adf2 100644 --- a/examples/stm32f7/src/bin/usart_dma.rs +++ b/examples/stm32f7/src/bin/usart_dma.rs @@ -5,7 +5,6 @@ use core::fmt::Write; use defmt::*; use embassy_executor::Spawner; -use embassy_stm32::dma::NoDma; use embassy_stm32::usart::{Config, Uart}; use embassy_stm32::{bind_interrupts, peripherals, usart}; use heapless::String; @@ -19,7 +18,7 @@ bind_interrupts!(struct Irqs { async fn main(_spawner: Spawner) { let p = embassy_stm32::init(Default::default()); let config = Config::default(); - let mut usart = Uart::new(p.UART7, p.PA8, p.PA15, Irqs, p.DMA1_CH1, NoDma, config).unwrap(); + let mut usart = Uart::new(p.UART7, p.PA8, p.PA15, Irqs, p.DMA1_CH1, p.DMA1_CH3, config).unwrap(); for n in 0u32.. { let mut s: String<128> = String::new(); diff --git a/examples/stm32h5/src/bin/usart.rs b/examples/stm32h5/src/bin/usart.rs index f9cbad6af..cc49c2fdb 100644 --- a/examples/stm32h5/src/bin/usart.rs +++ b/examples/stm32h5/src/bin/usart.rs @@ -4,22 +4,16 @@ use cortex_m_rt::entry; use defmt::*; use embassy_executor::Executor; -use embassy_stm32::dma::NoDma; use embassy_stm32::usart::{Config, Uart}; -use embassy_stm32::{bind_interrupts, peripherals, usart}; use static_cell::StaticCell; use {defmt_rtt as _, panic_probe as _}; -bind_interrupts!(struct Irqs { - UART7 => usart::InterruptHandler; -}); - #[embassy_executor::task] async fn main_task() { let p = embassy_stm32::init(Default::default()); let config = Config::default(); - let mut usart = Uart::new(p.UART7, p.PF6, p.PF7, Irqs, NoDma, NoDma, config).unwrap(); + let mut usart = Uart::new_blocking(p.UART7, p.PF6, p.PF7, config).unwrap(); unwrap!(usart.blocking_write(b"Hello Embassy World!\r\n")); info!("wrote Hello, starting echo"); diff --git a/examples/stm32h5/src/bin/usart_dma.rs b/examples/stm32h5/src/bin/usart_dma.rs index caae0dd18..c644e84bd 100644 --- a/examples/stm32h5/src/bin/usart_dma.rs +++ b/examples/stm32h5/src/bin/usart_dma.rs @@ -6,7 +6,6 @@ use core::fmt::Write; use cortex_m_rt::entry; use defmt::*; use embassy_executor::Executor; -use embassy_stm32::dma::NoDma; use embassy_stm32::usart::{Config, Uart}; use embassy_stm32::{bind_interrupts, peripherals, usart}; use heapless::String; @@ -22,7 +21,7 @@ async fn main_task() { let p = embassy_stm32::init(Default::default()); let config = Config::default(); - let mut usart = Uart::new(p.UART7, p.PF6, p.PF7, Irqs, p.GPDMA1_CH0, NoDma, config).unwrap(); + let mut usart = Uart::new(p.UART7, p.PF6, p.PF7, Irqs, p.GPDMA1_CH0, p.GPDMA1_CH1, config).unwrap(); for n in 0u32.. { let mut s: String<128> = String::new(); diff --git a/examples/stm32h5/src/bin/usart_split.rs b/examples/stm32h5/src/bin/usart_split.rs index 92047de8d..77b4caa9e 100644 --- a/examples/stm32h5/src/bin/usart_split.rs +++ b/examples/stm32h5/src/bin/usart_split.rs @@ -3,8 +3,8 @@ use defmt::*; use embassy_executor::Spawner; -use embassy_stm32::dma::NoDma; -use embassy_stm32::peripherals::{GPDMA1_CH1, UART7}; +use embassy_stm32::mode::Async; +use embassy_stm32::peripherals::UART7; use embassy_stm32::usart::{Config, Uart, UartRx}; use embassy_stm32::{bind_interrupts, peripherals, usart}; use embassy_sync::blocking_mutex::raw::ThreadModeRawMutex; @@ -15,18 +15,6 @@ bind_interrupts!(struct Irqs { UART7 => usart::InterruptHandler; }); -#[embassy_executor::task] -async fn writer(mut usart: Uart<'static, UART7, NoDma, NoDma>) { - unwrap!(usart.blocking_write(b"Hello Embassy World!\r\n")); - info!("wrote Hello, starting echo"); - - let mut buf = [0u8; 1]; - loop { - unwrap!(usart.blocking_read(&mut buf)); - unwrap!(usart.blocking_write(&buf)); - } -} - static CHANNEL: Channel = Channel::new(); #[embassy_executor::main] @@ -50,7 +38,7 @@ async fn main(spawner: Spawner) -> ! { } #[embassy_executor::task] -async fn reader(mut rx: UartRx<'static, UART7, GPDMA1_CH1>) { +async fn reader(mut rx: UartRx<'static, UART7, Async>) { let mut buf = [0; 8]; loop { info!("reading..."); diff --git a/examples/stm32h7/src/bin/usart.rs b/examples/stm32h7/src/bin/usart.rs index f9cbad6af..cc49c2fdb 100644 --- a/examples/stm32h7/src/bin/usart.rs +++ b/examples/stm32h7/src/bin/usart.rs @@ -4,22 +4,16 @@ use cortex_m_rt::entry; use defmt::*; use embassy_executor::Executor; -use embassy_stm32::dma::NoDma; use embassy_stm32::usart::{Config, Uart}; -use embassy_stm32::{bind_interrupts, peripherals, usart}; use static_cell::StaticCell; use {defmt_rtt as _, panic_probe as _}; -bind_interrupts!(struct Irqs { - UART7 => usart::InterruptHandler; -}); - #[embassy_executor::task] async fn main_task() { let p = embassy_stm32::init(Default::default()); let config = Config::default(); - let mut usart = Uart::new(p.UART7, p.PF6, p.PF7, Irqs, NoDma, NoDma, config).unwrap(); + let mut usart = Uart::new_blocking(p.UART7, p.PF6, p.PF7, config).unwrap(); unwrap!(usart.blocking_write(b"Hello Embassy World!\r\n")); info!("wrote Hello, starting echo"); diff --git a/examples/stm32h7/src/bin/usart_dma.rs b/examples/stm32h7/src/bin/usart_dma.rs index ae1f3a2e9..6f340d40a 100644 --- a/examples/stm32h7/src/bin/usart_dma.rs +++ b/examples/stm32h7/src/bin/usart_dma.rs @@ -6,7 +6,6 @@ use core::fmt::Write; use cortex_m_rt::entry; use defmt::*; use embassy_executor::Executor; -use embassy_stm32::dma::NoDma; use embassy_stm32::usart::{Config, Uart}; use embassy_stm32::{bind_interrupts, peripherals, usart}; use heapless::String; @@ -22,7 +21,7 @@ async fn main_task() { let p = embassy_stm32::init(Default::default()); let config = Config::default(); - let mut usart = Uart::new(p.UART7, p.PF6, p.PF7, Irqs, p.DMA1_CH0, NoDma, config).unwrap(); + let mut usart = Uart::new(p.UART7, p.PF6, p.PF7, Irqs, p.DMA1_CH0, p.DMA1_CH1, config).unwrap(); for n in 0u32.. { let mut s: String<128> = String::new(); diff --git a/examples/stm32h7/src/bin/usart_split.rs b/examples/stm32h7/src/bin/usart_split.rs index b98c40877..4ad8e77ce 100644 --- a/examples/stm32h7/src/bin/usart_split.rs +++ b/examples/stm32h7/src/bin/usart_split.rs @@ -3,8 +3,8 @@ use defmt::*; use embassy_executor::Spawner; -use embassy_stm32::dma::NoDma; -use embassy_stm32::peripherals::{DMA1_CH1, UART7}; +use embassy_stm32::mode::Async; +use embassy_stm32::peripherals::UART7; use embassy_stm32::usart::{Config, Uart, UartRx}; use embassy_stm32::{bind_interrupts, peripherals, usart}; use embassy_sync::blocking_mutex::raw::ThreadModeRawMutex; @@ -15,18 +15,6 @@ bind_interrupts!(struct Irqs { UART7 => usart::InterruptHandler; }); -#[embassy_executor::task] -async fn writer(mut usart: Uart<'static, UART7, NoDma, NoDma>) { - unwrap!(usart.blocking_write(b"Hello Embassy World!\r\n")); - info!("wrote Hello, starting echo"); - - let mut buf = [0u8; 1]; - loop { - unwrap!(usart.blocking_read(&mut buf)); - unwrap!(usart.blocking_write(&buf)); - } -} - static CHANNEL: Channel = Channel::new(); #[embassy_executor::main] @@ -50,7 +38,7 @@ async fn main(spawner: Spawner) -> ! { } #[embassy_executor::task] -async fn reader(mut rx: UartRx<'static, UART7, DMA1_CH1>) { +async fn reader(mut rx: UartRx<'static, UART7, Async>) { let mut buf = [0; 8]; loop { info!("reading..."); diff --git a/examples/stm32l4/src/bin/usart.rs b/examples/stm32l4/src/bin/usart.rs index 7bab23950..d9b388026 100644 --- a/examples/stm32l4/src/bin/usart.rs +++ b/examples/stm32l4/src/bin/usart.rs @@ -2,7 +2,6 @@ #![no_main] use defmt::*; -use embassy_stm32::dma::NoDma; use embassy_stm32::usart::{Config, Uart}; use embassy_stm32::{bind_interrupts, peripherals, usart}; use {defmt_rtt as _, panic_probe as _}; @@ -18,7 +17,7 @@ fn main() -> ! { let p = embassy_stm32::init(Default::default()); let config = Config::default(); - let mut usart = Uart::new(p.UART4, p.PA1, p.PA0, Irqs, NoDma, NoDma, config).unwrap(); + let mut usart = Uart::new_blocking(p.UART4, p.PA1, p.PA0, config).unwrap(); unwrap!(usart.blocking_write(b"Hello Embassy World!\r\n")); info!("wrote Hello, starting echo"); diff --git a/examples/stm32l4/src/bin/usart_dma.rs b/examples/stm32l4/src/bin/usart_dma.rs index 031888f70..b4f7a1643 100644 --- a/examples/stm32l4/src/bin/usart_dma.rs +++ b/examples/stm32l4/src/bin/usart_dma.rs @@ -5,7 +5,6 @@ use core::fmt::Write; use defmt::*; use embassy_executor::Spawner; -use embassy_stm32::dma::NoDma; use embassy_stm32::usart::{Config, Uart}; use embassy_stm32::{bind_interrupts, peripherals, usart}; use heapless::String; @@ -21,7 +20,7 @@ async fn main(_spawner: Spawner) { info!("Hello World!"); let config = Config::default(); - let mut usart = Uart::new(p.UART4, p.PA1, p.PA0, Irqs, p.DMA1_CH3, NoDma, config).unwrap(); + let mut usart = Uart::new(p.UART4, p.PA1, p.PA0, Irqs, p.DMA1_CH3, p.DMA1_CH4, config).unwrap(); for n in 0u32.. { let mut s: String<128> = String::new(); diff --git a/tests/stm32/src/bin/usart.rs b/tests/stm32/src/bin/usart.rs index 9b20eb784..a6e34674d 100644 --- a/tests/stm32/src/bin/usart.rs +++ b/tests/stm32/src/bin/usart.rs @@ -6,7 +6,6 @@ mod common; use common::*; use defmt::{assert, assert_eq, unreachable}; use embassy_executor::Spawner; -use embassy_stm32::dma::NoDma; use embassy_stm32::usart::{Config, ConfigError, Error, Uart}; use embassy_time::{block_for, Duration, Instant}; @@ -20,11 +19,10 @@ async fn main(_spawner: Spawner) { let mut usart = peri!(p, UART); let mut rx = peri!(p, UART_RX); let mut tx = peri!(p, UART_TX); - let irq = irqs!(UART); { let config = Config::default(); - let mut usart = Uart::new(&mut usart, &mut rx, &mut tx, irq, NoDma, NoDma, config).unwrap(); + let mut usart = Uart::new_blocking(&mut usart, &mut rx, &mut tx, config).unwrap(); // We can't send too many bytes, they have to fit in the FIFO. // This is because we aren't sending+receiving at the same time. @@ -40,7 +38,7 @@ async fn main(_spawner: Spawner) { // Test error handling with with an overflow error { let config = Config::default(); - let mut usart = Uart::new(&mut usart, &mut rx, &mut tx, irq, NoDma, NoDma, config).unwrap(); + let mut usart = Uart::new_blocking(&mut usart, &mut rx, &mut tx, config).unwrap(); // Send enough bytes to fill the RX FIFOs off all USART versions. let data = [0; 64]; @@ -70,7 +68,7 @@ async fn main(_spawner: Spawner) { let mut config = Config::default(); config.baudrate = baudrate; - let mut usart = match Uart::new(&mut usart, &mut rx, &mut tx, irq, NoDma, NoDma, config) { + let mut usart = match Uart::new_blocking(&mut usart, &mut rx, &mut tx, config) { Ok(x) => x, Err(ConfigError::BaudrateTooHigh) => { info!("baudrate too high"); diff --git a/tests/stm32/src/bin/usart_rx_ringbuffered.rs b/tests/stm32/src/bin/usart_rx_ringbuffered.rs index 0c110421d..908452eaf 100644 --- a/tests/stm32/src/bin/usart_rx_ringbuffered.rs +++ b/tests/stm32/src/bin/usart_rx_ringbuffered.rs @@ -8,6 +8,7 @@ mod common; use common::*; use defmt::{assert_eq, panic}; use embassy_executor::Spawner; +use embassy_stm32::mode::Async; use embassy_stm32::usart::{Config, DataBits, Parity, RingBufferedUartRx, StopBits, Uart, UartTx}; use embassy_time::Timer; use rand_chacha::ChaCha8Rng; @@ -51,7 +52,7 @@ async fn main(spawner: Spawner) { } #[embassy_executor::task] -async fn transmit_task(mut tx: UartTx<'static, peris::UART, peris::UART_TX_DMA>) { +async fn transmit_task(mut tx: UartTx<'static, peris::UART, Async>) { // workaround https://github.com/embassy-rs/embassy/issues/1426 Timer::after_millis(100).await; From 8988df9ac15eccfaa1f2e5abe862cf2e7043ee46 Mon Sep 17 00:00:00 2001 From: James Munns Date: Tue, 16 Apr 2024 11:07:42 +0200 Subject: [PATCH 156/581] FAQ: Common STM32 stumbling blocks Adds some commonly encountered issues. Help wanted: if anyone has a working BDMA linker script setup, it would be good to add here. --- docs/modules/ROOT/pages/faq.adoc | 31 +++++++++++++++++++++++++++++++ 1 file changed, 31 insertions(+) diff --git a/docs/modules/ROOT/pages/faq.adoc b/docs/modules/ROOT/pages/faq.adoc index c6b893de5..0944127a5 100644 --- a/docs/modules/ROOT/pages/faq.adoc +++ b/docs/modules/ROOT/pages/faq.adoc @@ -231,3 +231,34 @@ Please refer to the STM32 documentation for the specific values suitable for you Look for the `MEMORY` section and try to determine the FLASH and RAM sizes and section start. If you find a case where the memory.x is wrong, please report it on [this Github issue](https://github.com/embassy-rs/stm32-data/issues/301) so other users are not caught by surprise. + +== Known issues (details and/or mitigations) + +These are issues that are commonly reported. Help wanted fixing them, or improving the UX when possible! + +=== STM32H5 and STM32H7 power issues + +STM32 chips with built-in power management (SMPS and LDO) settings often cause user problems when the configuration does not match how the board was designed. + +Settings from the examples, or even from other working boards, may not work on YOUR board, because they are wired differently. + +Additionally, some PWR settings require a full device reboot (and enough time to discharge any power capacitors!), making this hard to troubleshoot. Also, some +"wrong" power settings will ALMOST work, meaning it will sometimes work on some boots, or for a while, but crash unexpectedly. + +There is not a fix for this yet, as it is board/hardware dependant. See link:https://github.com/embassy-rs/embassy/issues/2806[this tracking issue] for more details + +=== STM32 BDMA only work out of some RAM regions + +The STM32 BDMA controller included in some chips (TODO: list which ones) has a limitation in that it only works out of certain regions of RAM (TODO: list which ones), otherwise the transfer +will fail. + +If you see errors that look like this: + +[source,plain] +---- +DMA: error on BDMA@1234ABCD channel 4 +---- + +You likely need to set up your linker script to define a special region for this area, and copy data to that region before using with BDMA. + +TODO: show how to do that From 75352d181c7076300b939b487931b3c783dc1581 Mon Sep 17 00:00:00 2001 From: James Munns Date: Tue, 16 Apr 2024 12:07:40 +0200 Subject: [PATCH 157/581] Add critical sections to avoid USB OTG Errata --- embassy-stm32/src/usb/otg.rs | 108 +++++++++++++++++++---------------- 1 file changed, 60 insertions(+), 48 deletions(-) diff --git a/embassy-stm32/src/usb/otg.rs b/embassy-stm32/src/usb/otg.rs index cabc06367..dc5d47006 100644 --- a/embassy-stm32/src/usb/otg.rs +++ b/embassy-stm32/src/usb/otg.rs @@ -672,45 +672,51 @@ impl<'d, T: Instance> Bus<'d, T> { let r = T::regs(); - // Configure RX fifo size. All endpoints share the same FIFO area. - let rx_fifo_size_words = RX_FIFO_EXTRA_SIZE_WORDS + ep_fifo_size(&self.ep_out); - trace!("configuring rx fifo size={}", rx_fifo_size_words); + // ERRATA NOTE: Don't interrupt FIFOs being written to. The interrupt + // handler COULD interrupt us here and do FIFO operations, so ensure + // the interrupt does not occur. + critical_section::with(|_| { + // Configure RX fifo size. All endpoints share the same FIFO area. + let rx_fifo_size_words = RX_FIFO_EXTRA_SIZE_WORDS + ep_fifo_size(&self.ep_out); + trace!("configuring rx fifo size={}", rx_fifo_size_words); - r.grxfsiz().modify(|w| w.set_rxfd(rx_fifo_size_words)); + r.grxfsiz().modify(|w| w.set_rxfd(rx_fifo_size_words)); - // Configure TX (USB in direction) fifo size for each endpoint - let mut fifo_top = rx_fifo_size_words; - for i in 0..T::ENDPOINT_COUNT { - if let Some(ep) = self.ep_in[i] { - trace!( - "configuring tx fifo ep={}, offset={}, size={}", - i, - fifo_top, - ep.fifo_size_words - ); + // Configure TX (USB in direction) fifo size for each endpoint + let mut fifo_top = rx_fifo_size_words; + for i in 0..T::ENDPOINT_COUNT { + if let Some(ep) = self.ep_in[i] { + trace!( + "configuring tx fifo ep={}, offset={}, size={}", + i, + fifo_top, + ep.fifo_size_words + ); - let dieptxf = if i == 0 { r.dieptxf0() } else { r.dieptxf(i - 1) }; + let dieptxf = if i == 0 { r.dieptxf0() } else { r.dieptxf(i - 1) }; - dieptxf.write(|w| { - w.set_fd(ep.fifo_size_words); - w.set_sa(fifo_top); - }); + dieptxf.write(|w| { + w.set_fd(ep.fifo_size_words); + w.set_sa(fifo_top); + }); - fifo_top += ep.fifo_size_words; + fifo_top += ep.fifo_size_words; + } } - } - assert!( - fifo_top <= T::FIFO_DEPTH_WORDS, - "FIFO allocations exceeded maximum capacity" - ); + assert!( + fifo_top <= T::FIFO_DEPTH_WORDS, + "FIFO allocations exceeded maximum capacity" + ); - // Flush fifos - r.grstctl().write(|w| { - w.set_rxfflsh(true); - w.set_txfflsh(true); - w.set_txfnum(0x10); + // Flush fifos + r.grstctl().write(|w| { + w.set_rxfflsh(true); + w.set_txfflsh(true); + w.set_txfnum(0x10); + }); }); + loop { let x = r.grstctl().read(); if !x.rxfflsh() && !x.txfflsh() { @@ -1208,27 +1214,33 @@ impl<'d, T: Instance> embassy_usb_driver::EndpointIn for Endpoint<'d, T, In> { .await } - // Setup transfer size - r.dieptsiz(index).write(|w| { - w.set_mcnt(1); - w.set_pktcnt(1); - w.set_xfrsiz(buf.len() as _); - }); - + // ERRATA: Transmit data FIFO is corrupted when a write sequence to the FIFO is interrupted with + // accesses to certain OTG_FS registers. + // + // Prevent the interrupt (which might poke FIFOs) from executing while copying data to FIFOs. critical_section::with(|_| { - // Enable endpoint - r.diepctl(index).modify(|w| { - w.set_cnak(true); - w.set_epena(true); + // Setup transfer size + r.dieptsiz(index).write(|w| { + w.set_mcnt(1); + w.set_pktcnt(1); + w.set_xfrsiz(buf.len() as _); }); - }); - // Write data to FIFO - for chunk in buf.chunks(4) { - let mut tmp = [0u8; 4]; - tmp[0..chunk.len()].copy_from_slice(chunk); - r.fifo(index).write_value(regs::Fifo(u32::from_ne_bytes(tmp))); - } + critical_section::with(|_| { + // Enable endpoint + r.diepctl(index).modify(|w| { + w.set_cnak(true); + w.set_epena(true); + }); + }); + + // Write data to FIFO + for chunk in buf.chunks(4) { + let mut tmp = [0u8; 4]; + tmp[0..chunk.len()].copy_from_slice(chunk); + r.fifo(index).write_value(regs::Fifo(u32::from_ne_bytes(tmp))); + } + }); trace!("write done ep={:?}", self.info.addr); From 2315a39293488488ced2369a1d23629af57cc0fb Mon Sep 17 00:00:00 2001 From: James Munns Date: Tue, 16 Apr 2024 13:39:00 +0200 Subject: [PATCH 158/581] Remove nested CS --- embassy-stm32/src/usb/otg.rs | 10 ++++------ 1 file changed, 4 insertions(+), 6 deletions(-) diff --git a/embassy-stm32/src/usb/otg.rs b/embassy-stm32/src/usb/otg.rs index dc5d47006..b386c6977 100644 --- a/embassy-stm32/src/usb/otg.rs +++ b/embassy-stm32/src/usb/otg.rs @@ -1226,12 +1226,10 @@ impl<'d, T: Instance> embassy_usb_driver::EndpointIn for Endpoint<'d, T, In> { w.set_xfrsiz(buf.len() as _); }); - critical_section::with(|_| { - // Enable endpoint - r.diepctl(index).modify(|w| { - w.set_cnak(true); - w.set_epena(true); - }); + // Enable endpoint + r.diepctl(index).modify(|w| { + w.set_cnak(true); + w.set_epena(true); }); // Write data to FIFO From 53cb84d3d65b96b5f92f434b113cffe62810c0ad Mon Sep 17 00:00:00 2001 From: Dion Dokter Date: Tue, 16 Apr 2024 15:24:20 +0200 Subject: [PATCH 159/581] Added RTC example --- examples/stm32u0/Cargo.toml | 3 +- examples/stm32u0/src/bin/rtc.rs | 49 +++++++++++++++++++++++++++++++++ 2 files changed, 51 insertions(+), 1 deletion(-) create mode 100644 examples/stm32u0/src/bin/rtc.rs diff --git a/examples/stm32u0/Cargo.toml b/examples/stm32u0/Cargo.toml index 64fd837a2..5868372dd 100644 --- a/examples/stm32u0/Cargo.toml +++ b/examples/stm32u0/Cargo.toml @@ -6,7 +6,7 @@ license = "MIT OR Apache-2.0" [dependencies] # Change stm32u083rc to your chip name, if necessary. -embassy-stm32 = { version = "0.1.0", path = "../../embassy-stm32", features = [ "defmt", "time-driver-any", "stm32u083rc", "memory-x", "unstable-pac", "exti"] } +embassy-stm32 = { version = "0.1.0", path = "../../embassy-stm32", features = [ "defmt", "time-driver-any", "stm32u083rc", "memory-x", "unstable-pac", "exti", "chrono"] } embassy-sync = { version = "0.5.0", path = "../../embassy-sync", features = ["defmt"] } embassy-executor = { version = "0.5.0", path = "../../embassy-executor", features = ["arch-cortex-m", "executor-thread", "defmt", "integrated-timers"] } embassy-time = { version = "0.3.0", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime", "tick-hz-32_768"] } @@ -23,6 +23,7 @@ futures = { version = "0.3.17", default-features = false, features = ["async-awa heapless = { version = "0.8", default-features = false } micromath = "2.0.0" +chrono = { version = "0.4.38", default-features = false } [profile.release] debug = 2 diff --git a/examples/stm32u0/src/bin/rtc.rs b/examples/stm32u0/src/bin/rtc.rs new file mode 100644 index 000000000..72fa0fde4 --- /dev/null +++ b/examples/stm32u0/src/bin/rtc.rs @@ -0,0 +1,49 @@ +#![no_std] +#![no_main] + +use chrono::{NaiveDate, NaiveDateTime}; +use defmt::*; +use embassy_executor::Spawner; +use embassy_stm32::rtc::{Rtc, RtcConfig}; +use embassy_stm32::Config; +use embassy_time::Timer; +use {defmt_rtt as _, panic_probe as _}; + +#[embassy_executor::main] +async fn main(_spawner: Spawner) { + let mut config = Config::default(); + { + use embassy_stm32::rcc::*; + config.rcc.sys = Sysclk::PLL1_R; + config.rcc.hsi = true; + config.rcc.pll = Some(Pll { + source: PllSource::HSI, // 16 MHz + prediv: PllPreDiv::DIV1, + mul: PllMul::MUL7, // 16 * 7 = 112 MHz + divp: None, + divq: None, + divr: Some(PllRDiv::DIV2), // 112 / 2 = 56 MHz + }); + config.rcc.ls = LsConfig::default(); + } + + let p = embassy_stm32::init(config); + + info!("Hello World!"); + + let now = NaiveDate::from_ymd_opt(2020, 5, 15) + .unwrap() + .and_hms_opt(10, 30, 15) + .unwrap(); + + let mut rtc = Rtc::new(p.RTC, RtcConfig::default()); + info!("Got RTC! {:?}", now.and_utc().timestamp()); + + rtc.set_datetime(now.into()).expect("datetime not set"); + + // In reality the delay would be much longer + Timer::after_millis(20000).await; + + let then: NaiveDateTime = rtc.now().unwrap().into(); + info!("Got RTC! {:?}", then.and_utc().timestamp()); +} From a5f754238b77a8ef9ec8c6ad4c59af8fa5d5b374 Mon Sep 17 00:00:00 2001 From: Dion Dokter Date: Tue, 16 Apr 2024 15:33:23 +0200 Subject: [PATCH 160/581] Add spi, i2c and fix usart --- examples/stm32u0/src/bin/i2c.rs | 21 +++++++++++++++++++++ examples/stm32u0/src/bin/spi.rs | 30 ++++++++++++++++++++++++++++++ examples/stm32u0/src/bin/usart.rs | 8 +------- 3 files changed, 52 insertions(+), 7 deletions(-) create mode 100644 examples/stm32u0/src/bin/i2c.rs create mode 100644 examples/stm32u0/src/bin/spi.rs diff --git a/examples/stm32u0/src/bin/i2c.rs b/examples/stm32u0/src/bin/i2c.rs new file mode 100644 index 000000000..2861bc091 --- /dev/null +++ b/examples/stm32u0/src/bin/i2c.rs @@ -0,0 +1,21 @@ +#![no_std] +#![no_main] + +use defmt::*; +use embassy_executor::Spawner; +use embassy_stm32::i2c::I2c; +use embassy_stm32::time::Hertz; +use {defmt_rtt as _, panic_probe as _}; + +const ADDRESS: u8 = 0x5F; +const WHOAMI: u8 = 0x0F; + +#[embassy_executor::main] +async fn main(_spawner: Spawner) { + let p = embassy_stm32::init(Default::default()); + let mut i2c = I2c::new_blocking(p.I2C2, p.PB10, p.PB11, Hertz(100_000), Default::default()); + + let mut data = [0u8; 1]; + unwrap!(i2c.blocking_write_read(ADDRESS, &[WHOAMI], &mut data)); + info!("Whoami: {}", data[0]); +} diff --git a/examples/stm32u0/src/bin/spi.rs b/examples/stm32u0/src/bin/spi.rs new file mode 100644 index 000000000..5693a3765 --- /dev/null +++ b/examples/stm32u0/src/bin/spi.rs @@ -0,0 +1,30 @@ +#![no_std] +#![no_main] + +use defmt::*; +use embassy_stm32::gpio::{Level, Output, Speed}; +use embassy_stm32::spi::{Config, Spi}; +use embassy_stm32::time::Hertz; +use {defmt_rtt as _, panic_probe as _}; + +#[cortex_m_rt::entry] +fn main() -> ! { + info!("Hello World!"); + + let p = embassy_stm32::init(Default::default()); + + let mut spi_config = Config::default(); + spi_config.frequency = Hertz(1_000_000); + + let mut spi = Spi::new_blocking(p.SPI3, p.PC10, p.PC12, p.PC11, spi_config); + + let mut cs = Output::new(p.PE0, Level::High, Speed::VeryHigh); + + loop { + let mut buf = [0x0Au8; 4]; + cs.set_low(); + unwrap!(spi.blocking_transfer_in_place(&mut buf)); + cs.set_high(); + info!("xfer {=[u8]:x}", buf); + } +} diff --git a/examples/stm32u0/src/bin/usart.rs b/examples/stm32u0/src/bin/usart.rs index 1fcf0029a..037a5c833 100644 --- a/examples/stm32u0/src/bin/usart.rs +++ b/examples/stm32u0/src/bin/usart.rs @@ -2,15 +2,9 @@ #![no_main] use defmt::*; -use embassy_stm32::dma::NoDma; use embassy_stm32::usart::{Config, Uart}; -use embassy_stm32::{bind_interrupts, peripherals, usart}; use {defmt_rtt as _, panic_probe as _}; -bind_interrupts!(struct Irqs { - USART2_LPUART2 => usart::InterruptHandler; -}); - #[cortex_m_rt::entry] fn main() -> ! { info!("Hello World!"); @@ -18,7 +12,7 @@ fn main() -> ! { let p = embassy_stm32::init(Default::default()); let config = Config::default(); - let mut usart = Uart::new(p.USART2, p.PA3, p.PA2, Irqs, NoDma, NoDma, config).unwrap(); + let mut usart = Uart::new_blocking(p.USART2, p.PA3, p.PA2, config).unwrap(); unwrap!(usart.blocking_write(b"Hello Embassy World!\r\n")); info!("wrote Hello, starting echo"); From d928663baeb851e830e04e469f3a338ad3f4bc15 Mon Sep 17 00:00:00 2001 From: Torin Cooper-Bennun Date: Tue, 16 Apr 2024 15:13:31 +0100 Subject: [PATCH 161/581] stm32: adc: fix blocking_delay_us() overflowing when sys freq is high e.g. H503 running at 250 MHz resulted in an upper bound of 17 us here. casting up to u64 for intermediate calc allows the upper bound to be increased by a factor of 1e6 --- embassy-stm32/src/adc/mod.rs | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/embassy-stm32/src/adc/mod.rs b/embassy-stm32/src/adc/mod.rs index 12c5751bd..2ff2ed6a8 100644 --- a/embassy-stm32/src/adc/mod.rs +++ b/embassy-stm32/src/adc/mod.rs @@ -76,7 +76,12 @@ pub(crate) fn blocking_delay_us(us: u32) { #[cfg(time)] embassy_time::block_for(embassy_time::Duration::from_micros(us)); #[cfg(not(time))] - cortex_m::asm::delay(unsafe { crate::rcc::get_freqs() }.sys.unwrap().0 * us / 1_000_000); + { + let freq = unsafe { crate::rcc::get_freqs() }.sys.unwrap().0 as u64; + let us = us as u64; + let cycles = freq * us / 1_000_000; + cortex_m::asm::delay(cycles as u32); + } } /// ADC instance. From 90f1d29c2470d51337a3666cde2efacad3e054e5 Mon Sep 17 00:00:00 2001 From: Dion Dokter Date: Tue, 16 Apr 2024 16:36:10 +0200 Subject: [PATCH 162/581] Fix rng clock --- examples/stm32u0/src/bin/rng.rs | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/examples/stm32u0/src/bin/rng.rs b/examples/stm32u0/src/bin/rng.rs index 9b4c2537e..89445b042 100644 --- a/examples/stm32u0/src/bin/rng.rs +++ b/examples/stm32u0/src/bin/rng.rs @@ -3,6 +3,7 @@ use defmt::*; use embassy_executor::Spawner; +use embassy_stm32::rcc::mux::Clk48sel; use embassy_stm32::rng::Rng; use embassy_stm32::{bind_interrupts, peripherals, rng, Config}; use {defmt_rtt as _, panic_probe as _}; @@ -26,6 +27,8 @@ async fn main(_spawner: Spawner) { divr: Some(PllRDiv::DIV2), // 112 / 2 = 56 MHz }); config.rcc.sys = Sysclk::PLL1_R; + config.rcc.hsi48 = Some(Hsi48Config { sync_from_usb: false }); // needed for RNG + config.rcc.mux.clk48sel = Clk48sel::HSI48; // needed for RNG (or use MSI or PLLQ if you want) } let p = embassy_stm32::init(config); @@ -33,7 +36,6 @@ async fn main(_spawner: Spawner) { info!("Hello World!"); let mut rng = Rng::new(p.RNG, Irqs); - info!("Hello World 2!"); let mut buf = [0u8; 16]; unwrap!(rng.async_fill_bytes(&mut buf).await); From 4202dac8a6cc3a8ef32696d7f551025bf19cca4b Mon Sep 17 00:00:00 2001 From: James Munns Date: Tue, 16 Apr 2024 17:03:44 +0200 Subject: [PATCH 163/581] L4 Example: probe-run to probe-rs Reverts some change made in https://github.com/embassy-rs/embassy/pull/1792 --- examples/stm32l4/.cargo/config.toml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/examples/stm32l4/.cargo/config.toml b/examples/stm32l4/.cargo/config.toml index db3a7ceff..83fc6d6f8 100644 --- a/examples/stm32l4/.cargo/config.toml +++ b/examples/stm32l4/.cargo/config.toml @@ -2,7 +2,7 @@ # replace STM32F429ZITx with your chip as listed in `probe-rs chip list` #runner = "probe-rs run --chip STM32L475VGT6" #runner = "probe-rs run --chip STM32L475VG" -runner = "probe-run --chip STM32L4S5QI" +runner = "probe-rs run --chip STM32L4S5QI" [build] target = "thumbv7em-none-eabi" From bd13b5c0604787a52322308353bec9996f9a199d Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Tue, 16 Apr 2024 17:07:13 +0200 Subject: [PATCH 164/581] More probe-run -> probe-rs run. --- examples/stm32f334/.cargo/config.toml | 2 +- examples/stm32wb/.cargo/config.toml | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/examples/stm32f334/.cargo/config.toml b/examples/stm32f334/.cargo/config.toml index caf947be6..f38c90a31 100644 --- a/examples/stm32f334/.cargo/config.toml +++ b/examples/stm32f334/.cargo/config.toml @@ -1,6 +1,6 @@ [target.'cfg(all(target_arch = "arm", target_os = "none"))'] # replace STM32F429ZITx with your chip as listed in `probe-rs-cli chip list` -runner = "probe-run --chip STM32F334R8" +runner = "probe-rs run --chip STM32F334R8" [build] target = "thumbv7em-none-eabihf" diff --git a/examples/stm32wb/.cargo/config.toml b/examples/stm32wb/.cargo/config.toml index 51c499ee7..8b6d6d754 100644 --- a/examples/stm32wb/.cargo/config.toml +++ b/examples/stm32wb/.cargo/config.toml @@ -1,6 +1,6 @@ [target.'cfg(all(target_arch = "arm", target_os = "none"))'] # replace STM32WB55CCUx with your chip as listed in `probe-rs chip list` -# runner = "probe-run --chip STM32WB55RGVx --speed 1000 --connect-under-reset" +# runner = "probe-rs run --chip STM32WB55RGVx --speed 1000 --connect-under-reset" runner = "teleprobe local run --chip STM32WB55RG --elf" [build] From 34668bae5c646d03e744efddc86052dbebe0ec40 Mon Sep 17 00:00:00 2001 From: Alex Moon Date: Tue, 16 Apr 2024 12:14:22 -0400 Subject: [PATCH 165/581] Add `wait_disabled` method to `embassy_nrf::usb::Endpoint` --- embassy-nrf/src/usb/mod.rs | 14 +++++++++++++- 1 file changed, 13 insertions(+), 1 deletion(-) diff --git a/embassy-nrf/src/usb/mod.rs b/embassy-nrf/src/usb/mod.rs index 09cf87e97..8cbb1a350 100644 --- a/embassy-nrf/src/usb/mod.rs +++ b/embassy-nrf/src/usb/mod.rs @@ -471,12 +471,19 @@ impl<'d, T: Instance, Dir: EndpointDir> driver::Endpoint for Endpoint<'d, T, Dir } async fn wait_enabled(&mut self) { + self.wait_enabled_state(true).await + } +} + +#[allow(private_bounds)] +impl<'d, T: Instance, Dir: EndpointDir> Endpoint<'d, T, Dir> { + async fn wait_enabled_state(&mut self, state: bool) { let i = self.info.addr.index(); assert!(i != 0); poll_fn(move |cx| { Dir::waker(i).register(cx.waker()); - if Dir::is_enabled(T::regs(), i) { + if Dir::is_enabled(T::regs(), i) == state { Poll::Ready(()) } else { Poll::Pending @@ -484,6 +491,11 @@ impl<'d, T: Instance, Dir: EndpointDir> driver::Endpoint for Endpoint<'d, T, Dir }) .await } + + /// Wait for the endpoint to be disabled + pub async fn wait_disabled(&mut self) { + self.wait_enabled_state(false).await + } } impl<'d, T: Instance, Dir> Endpoint<'d, T, Dir> { From 32b1b4067fe0645b36ab0727183ac6a9a5f7ac14 Mon Sep 17 00:00:00 2001 From: Daniel Igaz Date: Tue, 16 Apr 2024 20:27:12 +0200 Subject: [PATCH 166/581] Bug: There are at most 18 channels for the ADC. --- embassy-stm32/src/adc/g4.rs | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/embassy-stm32/src/adc/g4.rs b/embassy-stm32/src/adc/g4.rs index f6741f019..221cc2a40 100644 --- a/embassy-stm32/src/adc/g4.rs +++ b/embassy-stm32/src/adc/g4.rs @@ -170,7 +170,7 @@ impl<'d, T: Instance> Adc<'d, T> { fn configure_differential_inputs(&mut self) { T::regs().difsel().modify(|w| { - for n in 0..20 { + for n in 0..18 { w.set_difsel(n, Difsel::SINGLEENDED); } }); From e5e9fb78af71871216111023f8ad850e80ae7bda Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Tue, 16 Apr 2024 20:37:10 +0200 Subject: [PATCH 167/581] update stm32-metapac. --- embassy-stm32/Cargo.toml | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/embassy-stm32/Cargo.toml b/embassy-stm32/Cargo.toml index 1f9a51678..095427171 100644 --- a/embassy-stm32/Cargo.toml +++ b/embassy-stm32/Cargo.toml @@ -71,7 +71,7 @@ rand_core = "0.6.3" sdio-host = "0.5.0" critical-section = "1.1" #stm32-metapac = { version = "15" } -stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-d674277b78ca7400ecfeeb1b5af4e460a65c1a61" } +stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-01ac9bfd035961dc75f32dcd6080501538246d5c" } vcell = "0.1.3" nb = "1.0.0" @@ -97,7 +97,7 @@ proc-macro2 = "1.0.36" quote = "1.0.15" #stm32-metapac = { version = "15", default-features = false, features = ["metadata"]} -stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-d674277b78ca7400ecfeeb1b5af4e460a65c1a61", default-features = false, features = ["metadata"]} +stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-01ac9bfd035961dc75f32dcd6080501538246d5c", default-features = false, features = ["metadata"]} [features] default = ["rt"] From 2bd5095991cb5068d23a76a7c32c4bbbcfc7a441 Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Tue, 16 Apr 2024 20:37:42 +0200 Subject: [PATCH 168/581] stm32/usb: enable USV for U0. --- embassy-stm32/src/usb/mod.rs | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/embassy-stm32/src/usb/mod.rs b/embassy-stm32/src/usb/mod.rs index 1e3c44167..349438ec5 100644 --- a/embassy-stm32/src/usb/mod.rs +++ b/embassy-stm32/src/usb/mod.rs @@ -23,7 +23,7 @@ fn common_init() { ) } - #[cfg(any(stm32l4, stm32l5, stm32wb))] + #[cfg(any(stm32l4, stm32l5, stm32wb, stm32u0))] critical_section::with(|_| crate::pac::PWR.cr2().modify(|w| w.set_usv(true))); #[cfg(pwr_h5)] From 38e71a2438c8ae934bda646b4c7bbe51f1dd6f61 Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Tue, 16 Apr 2024 20:38:09 +0200 Subject: [PATCH 169/581] ci: add u0 examples. --- ci.sh | 1 + 1 file changed, 1 insertion(+) diff --git a/ci.sh b/ci.sh index 514c6769b..e95714b65 100755 --- a/ci.sh +++ b/ci.sh @@ -189,6 +189,7 @@ cargo batch \ --- build --release --manifest-path examples/stm32l1/Cargo.toml --target thumbv7m-none-eabi --out-dir out/examples/stm32l1 \ --- build --release --manifest-path examples/stm32l4/Cargo.toml --target thumbv7em-none-eabi --out-dir out/examples/stm32l4 \ --- build --release --manifest-path examples/stm32l5/Cargo.toml --target thumbv8m.main-none-eabihf --out-dir out/examples/stm32l5 \ + --- build --release --manifest-path examples/stm32u0/Cargo.toml --target thumbv6m-none-eabi --out-dir out/examples/stm32u0 \ --- build --release --manifest-path examples/stm32u5/Cargo.toml --target thumbv8m.main-none-eabihf --out-dir out/examples/stm32u5 \ --- build --release --manifest-path examples/stm32wb/Cargo.toml --target thumbv7em-none-eabi --out-dir out/examples/stm32wb \ --- build --release --manifest-path examples/stm32wba/Cargo.toml --target thumbv8m.main-none-eabihf --out-dir out/examples/stm32wba \ From 10ee1c1ae8cc7d1b561235c04b5dcc153b35e552 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Aur=C3=A9lien=20Jacobs?= Date: Tue, 16 Apr 2024 23:36:47 +0200 Subject: [PATCH 170/581] stm32: ensure the core runs on HSI clock while setting up rcc --- embassy-stm32/src/rcc/f247.rs | 24 +++++++++++++++--------- 1 file changed, 15 insertions(+), 9 deletions(-) diff --git a/embassy-stm32/src/rcc/f247.rs b/embassy-stm32/src/rcc/f247.rs index 7b252870c..7b2d93027 100644 --- a/embassy-stm32/src/rcc/f247.rs +++ b/embassy-stm32/src/rcc/f247.rs @@ -146,17 +146,18 @@ pub(crate) unsafe fn init(config: Config) { while !PWR.csr1().read().odswrdy() {} } + // Turn on the HSI + RCC.cr().modify(|w| w.set_hsion(true)); + while !RCC.cr().read().hsirdy() {} + + // Use the HSI clock as system clock during the actual clock setup + RCC.cfgr().modify(|w| w.set_sw(Sysclk::HSI)); + while RCC.cfgr().read().sws() != Sysclk::HSI {} + // Configure HSI let hsi = match config.hsi { - false => { - RCC.cr().modify(|w| w.set_hsion(false)); - None - } - true => { - RCC.cr().modify(|w| w.set_hsion(true)); - while !RCC.cr().read().hsirdy() {} - Some(HSI_FREQ) - } + false => None, + true => Some(HSI_FREQ), }; // Configure HSE @@ -260,6 +261,11 @@ pub(crate) unsafe fn init(config: Config) { }); while RCC.cfgr().read().sws() != config.sys {} + // Disable HSI if not used + if !config.hsi { + RCC.cr().modify(|w| w.set_hsion(false)); + } + config.mux.init(); set_clocks!( From 34362b77ccdef42e7a7accbb23dcab96d5515f92 Mon Sep 17 00:00:00 2001 From: Cyril Marpaud <9333398+cyril-marpaud@users.noreply.github.com> Date: Wed, 17 Apr 2024 12:56:18 +0200 Subject: [PATCH 171/581] fix: typo --- embassy-nrf/src/pdm.rs | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/embassy-nrf/src/pdm.rs b/embassy-nrf/src/pdm.rs index ef2662c85..c1501e02e 100644 --- a/embassy-nrf/src/pdm.rs +++ b/embassy-nrf/src/pdm.rs @@ -1,4 +1,4 @@ -//! Pulse Density Modulation (PDM) mirophone driver +//! Pulse Density Modulation (PDM) microphone driver #![macro_use] From 901bdfc7b8d8e1dc5d04b28a69feb50b99d0be57 Mon Sep 17 00:00:00 2001 From: Torin Cooper-Bennun Date: Wed, 17 Apr 2024 14:54:47 +0100 Subject: [PATCH 172/581] stm32: can: fd: on_interrupt: simplify, rm redundant code PED, PEA are never enabled in the interrupt enable code in peripheral.rs; no need to process the flags here --- embassy-stm32/src/can/fdcan.rs | 64 ++++++++++++++-------------------- 1 file changed, 27 insertions(+), 37 deletions(-) diff --git a/embassy-stm32/src/can/fdcan.rs b/embassy-stm32/src/can/fdcan.rs index e31821ca2..23a35168b 100644 --- a/embassy-stm32/src/can/fdcan.rs +++ b/embassy-stm32/src/can/fdcan.rs @@ -44,50 +44,40 @@ impl interrupt::typelevel::Handler for IT0Interrup let ir = regs.ir().read(); - { - if ir.tc() { - regs.ir().write(|w| w.set_tc(true)); - } - if ir.tefn() { - regs.ir().write(|w| w.set_tefn(true)); - } - - match &T::state().tx_mode { - TxMode::NonBuffered(waker) => waker.wake(), - TxMode::ClassicBuffered(buf) => { - if !T::registers().tx_queue_is_full() { - match buf.tx_receiver.try_receive() { - Ok(frame) => { - _ = T::registers().write(&frame); - } - Err(_) => {} - } - } - } - TxMode::FdBuffered(buf) => { - if !T::registers().tx_queue_is_full() { - match buf.tx_receiver.try_receive() { - Ok(frame) => { - _ = T::registers().write(&frame); - } - Err(_) => {} - } - } - } - } + if ir.tc() { + regs.ir().write(|w| w.set_tc(true)); + } + if ir.tefn() { + regs.ir().write(|w| w.set_tefn(true)); } - if ir.ped() || ir.pea() { - regs.ir().write(|w| { - w.set_ped(true); - w.set_pea(true); - }); + match &T::state().tx_mode { + TxMode::NonBuffered(waker) => waker.wake(), + TxMode::ClassicBuffered(buf) => { + if !T::registers().tx_queue_is_full() { + match buf.tx_receiver.try_receive() { + Ok(frame) => { + _ = T::registers().write(&frame); + } + Err(_) => {} + } + } + } + TxMode::FdBuffered(buf) => { + if !T::registers().tx_queue_is_full() { + match buf.tx_receiver.try_receive() { + Ok(frame) => { + _ = T::registers().write(&frame); + } + Err(_) => {} + } + } + } } if ir.rfn(0) { T::state().rx_mode.on_interrupt::(0); } - if ir.rfn(1) { T::state().rx_mode.on_interrupt::(1); } From 80b3db4ea6b5b85ab87ec002c2029b868515f8ef Mon Sep 17 00:00:00 2001 From: Torin Cooper-Bennun Date: Wed, 17 Apr 2024 14:58:08 +0100 Subject: [PATCH 173/581] stm32: can: fd: implement bus-off recovery as per RM0492 and other relevant RMs, bus-off recovery is not automatic. CCCR.INIT is set by the device upon bus-off; the CPU must reset CCCR.INIT to initiate the recovery. --- embassy-stm32/src/can/fd/peripheral.rs | 1 + embassy-stm32/src/can/fdcan.rs | 8 ++++++++ 2 files changed, 9 insertions(+) diff --git a/embassy-stm32/src/can/fd/peripheral.rs b/embassy-stm32/src/can/fd/peripheral.rs index e32f19d91..e5cfee528 100644 --- a/embassy-stm32/src/can/fd/peripheral.rs +++ b/embassy-stm32/src/can/fd/peripheral.rs @@ -368,6 +368,7 @@ impl Registers { w.set_rfne(0, true); // Rx Fifo 0 New Msg w.set_rfne(1, true); // Rx Fifo 1 New Msg w.set_tce(true); // Tx Complete + w.set_boe(true); // Bus-Off Status Changed }); self.regs.ile().modify(|w| { w.set_eint0(true); // Interrupt Line 0 diff --git a/embassy-stm32/src/can/fdcan.rs b/embassy-stm32/src/can/fdcan.rs index 23a35168b..563f542d4 100644 --- a/embassy-stm32/src/can/fdcan.rs +++ b/embassy-stm32/src/can/fdcan.rs @@ -81,6 +81,14 @@ impl interrupt::typelevel::Handler for IT0Interrup if ir.rfn(1) { T::state().rx_mode.on_interrupt::(1); } + + if ir.bo() { + regs.ir().write(|w| w.set_bo(true)); + if regs.psr().read().bo() { + // Initiate bus-off recovery sequence by resetting CCCR.INIT + regs.cccr().modify(|w| w.set_init(false)); + } + } } } From ce58cd0f1c8d524b9ca0c274a51722a7bcde2ada Mon Sep 17 00:00:00 2001 From: qwerty19106 Date: Wed, 17 Apr 2024 18:07:24 +0400 Subject: [PATCH 174/581] Allow Uart::new_half_duplex for all usart_vx --- embassy-stm32/src/usart/mod.rs | 15 +++++++++------ 1 file changed, 9 insertions(+), 6 deletions(-) diff --git a/embassy-stm32/src/usart/mod.rs b/embassy-stm32/src/usart/mod.rs index e7fdf4da6..d21e5c47c 100644 --- a/embassy-stm32/src/usart/mod.rs +++ b/embassy-stm32/src/usart/mod.rs @@ -933,7 +933,6 @@ impl<'d, T: BasicInstance> Uart<'d, T, Async> { /// I/O in idle or in reception. /// Apart from this, the communication protocol is similar to normal USART mode. Any conflict /// on the line must be managed by software (for instance by using a centralized arbiter). - #[cfg(not(any(usart_v1, usart_v2)))] #[doc(alias("HDSEL"))] pub fn new_half_duplex( peri: impl Peripheral

+ 'd, @@ -943,7 +942,10 @@ impl<'d, T: BasicInstance> Uart<'d, T, Async> { rx_dma: impl Peripheral

> + 'd, mut config: Config, ) -> Result { - config.swap_rx_tx = false; + #[cfg(not(any(usart_v1, usart_v2)))] + { + config.swap_rx_tx = false; + } config.half_duplex = true; Self::new_inner( @@ -1084,14 +1086,16 @@ impl<'d, T: BasicInstance> Uart<'d, T, Blocking> { /// I/O in idle or in reception. /// Apart from this, the communication protocol is similar to normal USART mode. Any conflict /// on the line must be managed by software (for instance by using a centralized arbiter). - #[cfg(not(any(usart_v1, usart_v2)))] #[doc(alias("HDSEL"))] pub fn new_blocking_half_duplex( peri: impl Peripheral

+ 'd, tx: impl Peripheral

> + 'd, mut config: Config, ) -> Result { - config.swap_rx_tx = false; + #[cfg(not(any(usart_v1, usart_v2)))] + { + config.swap_rx_tx = false; + } config.half_duplex = true; Self::new_inner( @@ -1354,10 +1358,9 @@ fn configure( } }); - #[cfg(not(usart_v1))] r.cr3().modify(|w| { + #[cfg(not(usart_v1))] w.set_onebit(config.assume_noise_free); - #[cfg(any(usart_v3, usart_v4))] w.set_hdsel(config.half_duplex); }); From 0dcf0348575bcf3fde7b9a829bcb66217c55320b Mon Sep 17 00:00:00 2001 From: Oleksandr Kuksenko Date: Fri, 19 Apr 2024 13:37:58 +0300 Subject: [PATCH 175/581] Update layer_by_layer.adoc Fixed typo --- docs/modules/ROOT/pages/layer_by_layer.adoc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/docs/modules/ROOT/pages/layer_by_layer.adoc b/docs/modules/ROOT/pages/layer_by_layer.adoc index 1d7bdc89b..fa419f75e 100644 --- a/docs/modules/ROOT/pages/layer_by_layer.adoc +++ b/docs/modules/ROOT/pages/layer_by_layer.adoc @@ -63,7 +63,7 @@ Luckily, there is an elegant solution to this problem when using Embassy. == Async version -It's time to use the Embassy capabilities to its fullest. At the core, Embassy has an async excecutor, or a runtime for async tasks if you will. The executor polls a set of tasks (defined at compile time), and whenever a task `blocks`, the executor will run another task, or put the microcontroller to sleep. +It's time to use the Embassy capabilities to its fullest. At the core, Embassy has an async executor, or a runtime for async tasks if you will. The executor polls a set of tasks (defined at compile time), and whenever a task `blocks`, the executor will run another task, or put the microcontroller to sleep. [source,rust] ---- From 2c7c39d1db198447e52d7c9c5c6a39a71868c311 Mon Sep 17 00:00:00 2001 From: chrysn Date: Fri, 19 Apr 2024 15:51:27 +0200 Subject: [PATCH 176/581] fixup! net/udp: Relay full UdpMetadata instead of only remote endpoint in poll_ functions --- embassy-net/src/udp.rs | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/embassy-net/src/udp.rs b/embassy-net/src/udp.rs index 3e72327c6..494a1bd71 100644 --- a/embassy-net/src/udp.rs +++ b/embassy-net/src/udp.rs @@ -145,9 +145,9 @@ impl<'a> UdpSocket<'a> { /// When the remote endpoint is not reachable, this method will return `Err(SendError::NoRoute)` pub async fn send_to(&self, buf: &[u8], remote_endpoint: T) -> Result<(), SendError> where - T: Into, + T: Into, { - let remote_endpoint: IpEndpoint = remote_endpoint.into(); + let remote_endpoint: UdpMetadata = remote_endpoint.into(); poll_fn(move |cx| self.poll_send_to(buf, remote_endpoint, cx)).await } From 49435f79b35cc031c5ccd93991bf4b7011741053 Mon Sep 17 00:00:00 2001 From: chrysn Date: Fri, 19 Apr 2024 15:54:56 +0200 Subject: [PATCH 177/581] fixup! net/udp: Relay full UdpMetadata instead of only remote endpoint in poll_ functions --- embassy-net/src/udp.rs | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/embassy-net/src/udp.rs b/embassy-net/src/udp.rs index 494a1bd71..6e50c4e01 100644 --- a/embassy-net/src/udp.rs +++ b/embassy-net/src/udp.rs @@ -9,7 +9,7 @@ use embassy_net_driver::Driver; use smoltcp::iface::{Interface, SocketHandle}; use smoltcp::socket::udp; pub use smoltcp::socket::udp::{PacketMetadata, UdpMetadata}; -use smoltcp::wire::{IpEndpoint, IpListenEndpoint}; +use smoltcp::wire::IpListenEndpoint; use crate::{SocketStack, Stack}; From 30dcc880933a6e37f4b4e3e297d0a4fab586befb Mon Sep 17 00:00:00 2001 From: nerwalt Date: Fri, 19 Apr 2024 12:16:12 -0600 Subject: [PATCH 178/581] Adding ready_to_receive to Channel and Receiver Adding ReceiveReadyFuture --- embassy-sync/src/channel.rs | 35 +++++++++++++++++++++++++++++++++++ 1 file changed, 35 insertions(+) diff --git a/embassy-sync/src/channel.rs b/embassy-sync/src/channel.rs index 18be462cb..c4267064c 100644 --- a/embassy-sync/src/channel.rs +++ b/embassy-sync/src/channel.rs @@ -152,6 +152,13 @@ where self.channel.receive() } + /// Is a value ready to be received in the channel + /// + /// See [`Channel::ready_to_receive()`]. + pub fn ready_to_receive(&self) -> ReceiveReadyFuture<'_, M, T, N> { + self.channel.ready_to_receive() + } + /// Attempt to immediately receive the next value. /// /// See [`Channel::try_receive()`] @@ -246,6 +253,26 @@ where } } +/// Future returned by [`Channel::ready_to_receive`] and [`Receiver::ready_to_receive`]. +#[must_use = "futures do nothing unless you `.await` or poll them"] +pub struct ReceiveReadyFuture<'ch, M, T, const N: usize> +where + M: RawMutex, +{ + channel: &'ch Channel, +} + +impl<'ch, M, T, const N: usize> Future for ReceiveReadyFuture<'ch, M, T, N> +where + M: RawMutex, +{ + type Output = (); + + fn poll(self: Pin<&mut Self>, cx: &mut Context<'_>) -> Poll<()> { + self.channel.poll_ready_to_receive(cx) + } +} + /// Future returned by [`DynamicReceiver::receive`]. #[must_use = "futures do nothing unless you `.await` or poll them"] pub struct DynamicReceiveFuture<'ch, T> { @@ -577,6 +604,14 @@ where ReceiveFuture { channel: self } } + /// Is a value ready to be received in the channel + /// + /// If there are no messages in the channel's buffer, this method will + /// wait until there is at least one + pub fn ready_to_receive(&self) -> ReceiveReadyFuture<'_, M, T, N> { + ReceiveReadyFuture { channel: self } + } + /// Attempt to immediately receive a message. /// /// This method will either receive a message from the channel immediately or return an error From b2f7ce99d6f74383ed104353e284baf5e3e0aeb3 Mon Sep 17 00:00:00 2001 From: Mark Tomlin Date: Fri, 19 Apr 2024 21:35:25 -0400 Subject: [PATCH 179/581] Update time_keeping.adoc --- docs/modules/ROOT/pages/time_keeping.adoc | 2 ++ 1 file changed, 2 insertions(+) diff --git a/docs/modules/ROOT/pages/time_keeping.adoc b/docs/modules/ROOT/pages/time_keeping.adoc index 5068216ed..5fa7c53ae 100644 --- a/docs/modules/ROOT/pages/time_keeping.adoc +++ b/docs/modules/ROOT/pages/time_keeping.adoc @@ -16,6 +16,7 @@ The `embassy::time::Timer` type provides two timing methods. An example of a delay is provided as follows: +TIP: The depenencies you need to run this example link:/book/dev/basic_application.html#_the_cargo_toml[can be found here]. [,rust] ---- use embassy::executor::{task, Executor}; @@ -40,6 +41,7 @@ that expect a generic delay implementation to be provided. An example of how this can be used: +TIP: The depenencies you need to run this example link:/book/dev/basic_application.html#_the_cargo_toml[can be found here]. [,rust] ---- use embassy::executor::{task, Executor}; From b03f23ab648ecba0a98d8c39cbda7081b6179701 Mon Sep 17 00:00:00 2001 From: Mark Tomlin Date: Fri, 19 Apr 2024 21:36:03 -0400 Subject: [PATCH 180/581] Update sharing_peripherals.adoc --- docs/modules/ROOT/pages/sharing_peripherals.adoc | 2 ++ 1 file changed, 2 insertions(+) diff --git a/docs/modules/ROOT/pages/sharing_peripherals.adoc b/docs/modules/ROOT/pages/sharing_peripherals.adoc index fcba0e27b..000a7b1de 100644 --- a/docs/modules/ROOT/pages/sharing_peripherals.adoc +++ b/docs/modules/ROOT/pages/sharing_peripherals.adoc @@ -8,6 +8,7 @@ The following examples shows different ways to use the on-board LED on a Raspber Using mutual exclusion is the simplest way to share a peripheral. +TIP: The depenencies you need to run this example link:/book/dev/basic_application.html#_the_cargo_toml[can be found here]. [,rust] ---- use defmt::*; @@ -77,6 +78,7 @@ To indicate that the pin will be set to an Output. The `AnyPin` could have been A channel is another way to ensure exclusive access to a resource. Using a channel is great in the cases where the access can happen at a later point in time, allowing you to enqueue operations and do other things. +TIP: The depenencies you need to run this example link:/book/dev/basic_application.html#_the_cargo_toml[can be found here]. [,rust] ---- use defmt::*; From 0a2d58ec5b8d1d7663108ebb4add02083222874b Mon Sep 17 00:00:00 2001 From: Bjorn <75190918+BjornTheProgrammer@users.noreply.github.com> Date: Sat, 20 Apr 2024 22:12:24 -0700 Subject: [PATCH 181/581] Added PIO pwm examples for rp Two additionally `rp` examples, `pio_pwm.rs`, which is a baremetal example of how to do pwm with pio, and `pio_servo.rs`, which is a more extended example of pwm and pio with servos. --- examples/rp/src/bin/pio_pwm.rs | 118 ++++++++++++++++++ examples/rp/src/bin/pio_servo.rs | 208 +++++++++++++++++++++++++++++++ 2 files changed, 326 insertions(+) create mode 100644 examples/rp/src/bin/pio_pwm.rs create mode 100644 examples/rp/src/bin/pio_servo.rs diff --git a/examples/rp/src/bin/pio_pwm.rs b/examples/rp/src/bin/pio_pwm.rs new file mode 100644 index 000000000..e14f243aa --- /dev/null +++ b/examples/rp/src/bin/pio_pwm.rs @@ -0,0 +1,118 @@ +//! This example shows how to create a pwm using the PIO module in the RP2040 chip. + +#![no_std] +#![no_main] +use core::time::Duration; + +use embassy_executor::Spawner; +use embassy_rp::gpio::Level; +use embassy_rp::peripherals::PIO0; +use embassy_rp::pio::{Common, Config, Direction, Instance, InterruptHandler, Pio, PioPin, StateMachine}; +use embassy_rp::{bind_interrupts, clocks}; +use embassy_time::Timer; +use pio::InstructionOperands; +use {defmt_rtt as _, panic_probe as _}; + +const REFRESH_INTERVAL: u64 = 20000; + +bind_interrupts!(struct Irqs { + PIO0_IRQ_0 => InterruptHandler; +}); + +pub fn to_pio_cycles(duration: Duration) -> u32 { + (clocks::clk_sys_freq() / 1_000_000) / 3 * duration.as_micros() as u32 // parentheses are required to prevent overflow +} + +pub struct PwmPio<'d, T: Instance, const SM: usize> { + sm: StateMachine<'d, T, SM>, +} + +impl<'d, T: Instance, const SM: usize> PwmPio<'d, T, SM> { + pub fn attach(pio: &mut Common<'d, T>, mut sm: StateMachine<'d, T, SM>, pin: impl PioPin) -> Self { + let prg = pio_proc::pio_asm!( + ".side_set 1 opt" + "pull noblock side 0" + "mov x, osr" + "mov y, isr" + "countloop:" + "jmp x!=y noset" + "jmp skip side 1" + "noset:" + "nop" + "skip:" + "jmp y-- countloop" + ); + + pio.load_program(&prg.program); + let pin = pio.make_pio_pin(pin); + sm.set_pins(Level::High, &[&pin]); + sm.set_pin_dirs(Direction::Out, &[&pin]); + + let mut cfg = Config::default(); + cfg.use_program(&pio.load_program(&prg.program), &[&pin]); + + sm.set_config(&cfg); + + Self { sm } + } + + pub fn start(&mut self) { + self.sm.set_enable(true); + } + + pub fn stop(&mut self) { + self.sm.set_enable(false); + } + + pub fn set_period(&mut self, duration: Duration) { + let is_enabled = self.sm.is_enabled(); + while !self.sm.tx().empty() {} // Make sure that the queue is empty + self.sm.set_enable(false); + self.sm.tx().push(to_pio_cycles(duration)); + unsafe { + self.sm.exec_instr( + InstructionOperands::PULL { + if_empty: false, + block: false, + } + .encode(), + ); + self.sm.exec_instr( + InstructionOperands::OUT { + destination: ::pio::OutDestination::ISR, + bit_count: 32, + } + .encode(), + ); + }; + if is_enabled { + self.sm.set_enable(true) // Enable if previously enabled + } + } + + pub fn set_level(&mut self, level: u32) { + self.sm.tx().push(level); + } + + pub fn write(&mut self, duration: Duration) { + self.set_level(to_pio_cycles(duration)); + } +} + +#[embassy_executor::main] +async fn main(_spawner: Spawner) { + let p = embassy_rp::init(Default::default()); + let Pio { mut common, sm0, .. } = Pio::new(p.PIO0, Irqs); + + // Note that PIN_25 is the led pin on the Pico + let mut pwm_pio = PwmPio::attach(&mut common, sm0, p.PIN_25); + pwm_pio.set_period(Duration::from_micros(REFRESH_INTERVAL)); + pwm_pio.start(); + + let mut duration = 0; + loop { + duration = (duration + 1) % 1000; + pwm_pio.write(Duration::from_micros(duration)); + Timer::after_millis(1).await; + } +} diff --git a/examples/rp/src/bin/pio_servo.rs b/examples/rp/src/bin/pio_servo.rs new file mode 100644 index 000000000..47c3121fc --- /dev/null +++ b/examples/rp/src/bin/pio_servo.rs @@ -0,0 +1,208 @@ +//! This example shows how to create a pwm using the PIO module in the RP2040 chip. + +#![no_std] +#![no_main] +use core::time::Duration; + +use embassy_executor::Spawner; +use embassy_rp::gpio::Level; +use embassy_rp::peripherals::PIO0; +use embassy_rp::pio::{Common, Config, Direction, Instance, InterruptHandler, Pio, PioPin, StateMachine}; +use embassy_rp::{bind_interrupts, clocks}; +use embassy_time::Timer; +use pio::InstructionOperands; +use {defmt_rtt as _, panic_probe as _}; + +const DEFAULT_MIN_PULSE_WIDTH: u64 = 1000; // uncalibrated default, the shortest duty cycle sent to a servo +const DEFAULT_MAX_PULSE_WIDTH: u64 = 2000; // uncalibrated default, the longest duty cycle sent to a servo +const DEFAULT_MAX_DEGREE_ROTATION: u64 = 160; // 160 degrees is typical +const REFRESH_INTERVAL: u64 = 20000; // The period of each cycle + +bind_interrupts!(struct Irqs { + PIO0_IRQ_0 => InterruptHandler; +}); + +pub fn to_pio_cycles(duration: Duration) -> u32 { + (clocks::clk_sys_freq() / 1_000_000) / 3 * duration.as_micros() as u32 // parentheses are required to prevent overflow +} + +pub struct PwmPio<'d, T: Instance, const SM: usize> { + sm: StateMachine<'d, T, SM>, +} + +impl<'d, T: Instance, const SM: usize> PwmPio<'d, T, SM> { + pub fn attach(pio: &mut Common<'d, T>, mut sm: StateMachine<'d, T, SM>, pin: impl PioPin) -> Self { + let prg = pio_proc::pio_asm!( + ".side_set 1 opt" + "pull noblock side 0" + "mov x, osr" + "mov y, isr" + "countloop:" + "jmp x!=y noset" + "jmp skip side 1" + "noset:" + "nop" + "skip:" + "jmp y-- countloop" + ); + + pio.load_program(&prg.program); + let pin = pio.make_pio_pin(pin); + sm.set_pins(Level::High, &[&pin]); + sm.set_pin_dirs(Direction::Out, &[&pin]); + + let mut cfg = Config::default(); + cfg.use_program(&pio.load_program(&prg.program), &[&pin]); + + sm.set_config(&cfg); + + Self { sm } + } + + pub fn start(&mut self) { + self.sm.set_enable(true); + } + + pub fn stop(&mut self) { + self.sm.set_enable(false); + } + + pub fn set_period(&mut self, duration: Duration) { + let is_enabled = self.sm.is_enabled(); + while !self.sm.tx().empty() {} // Make sure that the queue is empty + self.sm.set_enable(false); + self.sm.tx().push(to_pio_cycles(duration)); + unsafe { + self.sm.exec_instr( + InstructionOperands::PULL { + if_empty: false, + block: false, + } + .encode(), + ); + self.sm.exec_instr( + InstructionOperands::OUT { + destination: ::pio::OutDestination::ISR, + bit_count: 32, + } + .encode(), + ); + }; + if is_enabled { + self.sm.set_enable(true) // Enable if previously enabled + } + } + + pub fn set_level(&mut self, level: u32) { + self.sm.tx().push(level); + } + + pub fn write(&mut self, duration: Duration) { + self.set_level(to_pio_cycles(duration)); + } +} + +pub struct ServoBuilder<'d, T: Instance, const SM: usize> { + pwm: PwmPio<'d, T, SM>, + period: Duration, + min_pulse_width: Duration, + max_pulse_width: Duration, + max_degree_rotation: u64, +} + +impl<'d, T: Instance, const SM: usize> ServoBuilder<'d, T, SM> { + pub fn new(pwm: PwmPio<'d, T, SM>) -> Self { + Self { + pwm, + period: Duration::from_micros(REFRESH_INTERVAL), + min_pulse_width: Duration::from_micros(DEFAULT_MIN_PULSE_WIDTH), + max_pulse_width: Duration::from_micros(DEFAULT_MAX_PULSE_WIDTH), + max_degree_rotation: DEFAULT_MAX_DEGREE_ROTATION, + } + } + + pub fn set_period(mut self, duration: Duration) -> Self { + self.period = duration; + self + } + + pub fn set_min_pulse_width(mut self, duration: Duration) -> Self { + self.min_pulse_width = duration; + self + } + + pub fn set_max_pulse_width(mut self, duration: Duration) -> Self { + self.max_pulse_width = duration; + self + } + + pub fn set_max_degree_rotation(mut self, degree: u64) -> Self { + self.max_degree_rotation = degree; + self + } + + pub fn build(mut self) -> Servo<'d, T, SM> { + self.pwm.set_period(self.period); + Servo { + pwm: self.pwm, + min_pulse_width: self.min_pulse_width, + max_pulse_width: self.max_pulse_width, + max_degree_rotation: self.max_degree_rotation, + } + } +} + +pub struct Servo<'d, T: Instance, const SM: usize> { + pwm: PwmPio<'d, T, SM>, + min_pulse_width: Duration, + max_pulse_width: Duration, + max_degree_rotation: u64, +} + +impl<'d, T: Instance, const SM: usize> Servo<'d, T, SM> { + pub fn start(&mut self) { + self.pwm.start(); + } + + pub fn stop(&mut self) { + self.pwm.stop(); + } + + pub fn write_time(&mut self, duration: Duration) { + self.pwm.write(duration); + } + + pub fn rotate(&mut self, degree: u64) { + let degree_per_nano_second = (self.max_pulse_width.as_nanos() as u64 - self.min_pulse_width.as_nanos() as u64) + / self.max_degree_rotation; + let mut duration = + Duration::from_nanos(degree * degree_per_nano_second + self.min_pulse_width.as_nanos() as u64); + if self.max_pulse_width < duration { + duration = self.max_pulse_width; + } + + self.pwm.write(duration); + } +} + +#[embassy_executor::main] +async fn main(_spawner: Spawner) { + let p = embassy_rp::init(Default::default()); + let Pio { mut common, sm0, .. } = Pio::new(p.PIO0, Irqs); + + let pwm_pio = PwmPio::attach(&mut common, sm0, p.PIN_1); + let mut servo = ServoBuilder::new(pwm_pio) + .set_max_degree_rotation(120) // Example of adjusting values for MG996R servo + .set_min_pulse_width(Duration::from_micros(350)) // This value was detemined by a rough experiment. + .set_max_pulse_width(Duration::from_micros(2600)) // Along with this value. + .build(); + + servo.start(); + + let mut degree = 0; + loop { + degree = (degree + 1) % 120; + servo.rotate(degree); + Timer::after_millis(50).await; + } +} From d2ba751c06725c62a576da9a27be301666118955 Mon Sep 17 00:00:00 2001 From: Bjorn <75190918+BjornTheProgrammer@users.noreply.github.com> Date: Sun, 21 Apr 2024 10:00:57 -0700 Subject: [PATCH 182/581] Changed attach to new --- examples/rp/src/bin/pio_pwm.rs | 4 ++-- examples/rp/src/bin/pio_servo.rs | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/examples/rp/src/bin/pio_pwm.rs b/examples/rp/src/bin/pio_pwm.rs index e14f243aa..23d63d435 100644 --- a/examples/rp/src/bin/pio_pwm.rs +++ b/examples/rp/src/bin/pio_pwm.rs @@ -28,7 +28,7 @@ pub struct PwmPio<'d, T: Instance, const SM: usize> { } impl<'d, T: Instance, const SM: usize> PwmPio<'d, T, SM> { - pub fn attach(pio: &mut Common<'d, T>, mut sm: StateMachine<'d, T, SM>, pin: impl PioPin) -> Self { + pub fn new(pio: &mut Common<'d, T>, mut sm: StateMachine<'d, T, SM>, pin: impl PioPin) -> Self { let prg = pio_proc::pio_asm!( ".side_set 1 opt" "pull noblock side 0" @@ -105,7 +105,7 @@ async fn main(_spawner: Spawner) { let Pio { mut common, sm0, .. } = Pio::new(p.PIO0, Irqs); // Note that PIN_25 is the led pin on the Pico - let mut pwm_pio = PwmPio::attach(&mut common, sm0, p.PIN_25); + let mut pwm_pio = PwmPio::new(&mut common, sm0, p.PIN_25); pwm_pio.set_period(Duration::from_micros(REFRESH_INTERVAL)); pwm_pio.start(); diff --git a/examples/rp/src/bin/pio_servo.rs b/examples/rp/src/bin/pio_servo.rs index 47c3121fc..a79540479 100644 --- a/examples/rp/src/bin/pio_servo.rs +++ b/examples/rp/src/bin/pio_servo.rs @@ -31,7 +31,7 @@ pub struct PwmPio<'d, T: Instance, const SM: usize> { } impl<'d, T: Instance, const SM: usize> PwmPio<'d, T, SM> { - pub fn attach(pio: &mut Common<'d, T>, mut sm: StateMachine<'d, T, SM>, pin: impl PioPin) -> Self { + pub fn new(pio: &mut Common<'d, T>, mut sm: StateMachine<'d, T, SM>, pin: impl PioPin) -> Self { let prg = pio_proc::pio_asm!( ".side_set 1 opt" "pull noblock side 0" @@ -190,7 +190,7 @@ async fn main(_spawner: Spawner) { let p = embassy_rp::init(Default::default()); let Pio { mut common, sm0, .. } = Pio::new(p.PIO0, Irqs); - let pwm_pio = PwmPio::attach(&mut common, sm0, p.PIN_1); + let pwm_pio = PwmPio::new(&mut common, sm0, p.PIN_1); let mut servo = ServoBuilder::new(pwm_pio) .set_max_degree_rotation(120) // Example of adjusting values for MG996R servo .set_min_pulse_width(Duration::from_micros(350)) // This value was detemined by a rough experiment. From 3f8736e87210b2c73e94b6bda47bd4e18a26d845 Mon Sep 17 00:00:00 2001 From: Jan Niehusmann Date: Sun, 21 Apr 2024 21:24:15 +0000 Subject: [PATCH 183/581] Add a comment to the pio rx fifo pull function --- embassy-rp/src/pio/mod.rs | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/embassy-rp/src/pio/mod.rs b/embassy-rp/src/pio/mod.rs index 2e5c57a26..1f7adbda3 100644 --- a/embassy-rp/src/pio/mod.rs +++ b/embassy-rp/src/pio/mod.rs @@ -324,6 +324,10 @@ impl<'d, PIO: Instance, const SM: usize> StateMachineRx<'d, PIO, SM> { } /// Pull data from RX FIFO. + /// + /// This function doesn't check if there is data available to be read. + /// If the rx FIFO is empty, an undefined value is returned. If you only + /// want to pull if data is available, use `try_pull` instead. pub fn pull(&mut self) -> u32 { PIO::PIO.rxf(SM).read() } From 79fbdb1fe042390122adb13a9ea98a93b280b251 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Jo=C3=ABl=20Schulz-Ansres?= Date: Mon, 22 Apr 2024 00:38:09 +0200 Subject: [PATCH 184/581] Add USB debugging section to FAQ --- docs/modules/ROOT/pages/faq.adoc | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/docs/modules/ROOT/pages/faq.adoc b/docs/modules/ROOT/pages/faq.adoc index 0944127a5..6cb7233c1 100644 --- a/docs/modules/ROOT/pages/faq.adoc +++ b/docs/modules/ROOT/pages/faq.adoc @@ -232,6 +232,26 @@ Look for the `MEMORY` section and try to determine the FLASH and RAM sizes and s If you find a case where the memory.x is wrong, please report it on [this Github issue](https://github.com/embassy-rs/stm32-data/issues/301) so other users are not caught by surprise. +== The USB examples are not working on my board, is there anything else I need to configure? + +If you are trying out the USB examples and your device doesn not connect, the most common issues are listed below. + +=== Incorrect RCC config + +Check your board and crystal/oscillator, in particular make sure that `HSE` is set to the correct value, e.g. `8_000_000` Hertz if your board does indeed run on a 8 MHz oscillator. + +=== VBUS detection on STM32 platform + +The USB specification requires that all USB devices monitor the bus for detection of plugging/unplugging actions. The devices must pull-up the D+ or D- lane as soon as the host supplies VBUS. + +See the docs, for example at link:https://docs.embassy.dev/embassy-stm32/git/stm32f401vc/usb/struct.Config.html[`usb/struct.Config.html`] for information on how to enable/disable `vbus_detection`. + +When the device is powered only from the USB bus that simultaneously serves as the data connection, this is optional. (If there's no power in VBUS the device would be off anyway, so it's safe to always assume there's power in VBUS, i.e. the USB cable is always plugged in). If your device doesn't have the required connections in place to allow VBUS sensing (see below), then this option needs to be set to `false` to work. + +When the device is powered from another power source and therefore can stay powered through USB cable plug/unplug events, then this must be implemented and `vbus_detection` MUST be set to `true`. + +If your board is powered from the USB and you are unsure whether it supports `vbus_detection`, consult the schematics of your board to see if VBUS is connected to PA9 for USB Full Speed or PB13 for USB High Speed, vice versa, possibly with a voltage divider. When designing your own hardware, see ST application note AN4879 (in particular section 2.6) and the reference manual of your specific chip for more details. + == Known issues (details and/or mitigations) These are issues that are commonly reported. Help wanted fixing them, or improving the UX when possible! From 152d514f52fab3b6b1f58c5b5bc57b13b86b7126 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Jo=C3=ABl=20Schulz-Ansres?= Date: Mon, 22 Apr 2024 00:39:59 +0200 Subject: [PATCH 185/581] Fix spelling in vbus_detection doc comment --- embassy-stm32/src/usb/otg.rs | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/embassy-stm32/src/usb/otg.rs b/embassy-stm32/src/usb/otg.rs index b386c6977..29572d3c6 100644 --- a/embassy-stm32/src/usb/otg.rs +++ b/embassy-stm32/src/usb/otg.rs @@ -281,10 +281,10 @@ pub struct Config { /// Enable VBUS detection. /// /// The USB spec requires USB devices monitor for USB cable plug/unplug and react accordingly. - /// This is done by checkihg whether there is 5V on the VBUS pin or not. + /// This is done by checking whether there is 5V on the VBUS pin or not. /// /// If your device is bus-powered (powers itself from the USB host via VBUS), then this is optional. - /// (if there's no power in VBUS your device would be off anyway, so it's fine to always assume + /// (If there's no power in VBUS your device would be off anyway, so it's fine to always assume /// there's power in VBUS, i.e. the USB cable is always plugged in.) /// /// If your device is self-powered (i.e. it gets power from a source other than the USB cable, and From 896d0e7cd846971eb472555eb13ebe28e0b2d536 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Jo=C3=ABl=20Schulz-Ansres?= Date: Mon, 22 Apr 2024 00:52:37 +0200 Subject: [PATCH 186/581] Add comment on vbus_detection to all USB examples --- examples/stm32f4/src/bin/usb_ethernet.rs | 13 +++++++++++++ examples/stm32f4/src/bin/usb_hid_keyboard.rs | 14 +++++++++++++- examples/stm32f4/src/bin/usb_hid_mouse.rs | 13 +++++++++++++ examples/stm32f4/src/bin/usb_raw.rs | 13 +++++++++++++ examples/stm32f4/src/bin/usb_serial.rs | 13 +++++++++++++ examples/stm32f7/src/bin/usb_serial.rs | 13 +++++++++++++ examples/stm32h7/src/bin/usb_serial.rs | 13 +++++++++++++ examples/stm32l4/src/bin/usb_serial.rs | 13 +++++++++++++ 8 files changed, 104 insertions(+), 1 deletion(-) diff --git a/examples/stm32f4/src/bin/usb_ethernet.rs b/examples/stm32f4/src/bin/usb_ethernet.rs index d2cbeea1b..284c74564 100644 --- a/examples/stm32f4/src/bin/usb_ethernet.rs +++ b/examples/stm32f4/src/bin/usb_ethernet.rs @@ -40,6 +40,11 @@ bind_interrupts!(struct Irqs { HASH_RNG => rng::InterruptHandler; }); +// If you are trying this and your USB device doesn't connect, the most +// common issues are the RCC config and vbus_detection +// +// See https://embassy.dev/book/dev/faq.html#_the_usb_examples_are_not_working_on_my_board_is_there_anything_else_i_need_to_configure +// for more information. #[embassy_executor::main] async fn main(spawner: Spawner) { info!("Hello World!"); @@ -71,7 +76,15 @@ async fn main(spawner: Spawner) { static OUTPUT_BUFFER: StaticCell<[u8; 256]> = StaticCell::new(); let ep_out_buffer = &mut OUTPUT_BUFFER.init([0; 256])[..]; let mut config = embassy_stm32::usb::Config::default(); + + // Enable vbus_detection + // Note: some boards don't have this wired up and might not require it, + // as they are powered through usb! + // If you hang on boot, try setting this to "false"! + // See https://embassy.dev/book/dev/faq.html#_the_usb_examples_are_not_working_on_my_board_is_there_anything_else_i_need_to_configure + // for more information config.vbus_detection = true; + let driver = Driver::new_fs(p.USB_OTG_FS, Irqs, p.PA12, p.PA11, ep_out_buffer, config); // Create embassy-usb Config diff --git a/examples/stm32f4/src/bin/usb_hid_keyboard.rs b/examples/stm32f4/src/bin/usb_hid_keyboard.rs index d6e0be5ea..4d9086156 100644 --- a/examples/stm32f4/src/bin/usb_hid_keyboard.rs +++ b/examples/stm32f4/src/bin/usb_hid_keyboard.rs @@ -21,6 +21,11 @@ bind_interrupts!(struct Irqs { OTG_FS => usb::InterruptHandler; }); +// If you are trying this and your USB device doesn't connect, the most +// common issues are the RCC config and vbus_detection +// +// See https://embassy.dev/book/dev/faq.html#_the_usb_examples_are_not_working_on_my_board_is_there_anything_else_i_need_to_configure +// for more information. #[embassy_executor::main] async fn main(_spawner: Spawner) { let mut config = Config::default(); @@ -49,8 +54,15 @@ async fn main(_spawner: Spawner) { // Create the driver, from the HAL. let mut ep_out_buffer = [0u8; 256]; let mut config = embassy_stm32::usb::Config::default(); - // If the board you’re using doesn’t have the VBUS pin wired up correctly for detecting the USB bus voltage (e.g. on the f4 blackpill board), set this to false + + // Enable vbus_detection + // Note: some boards don't have this wired up and might not require it, + // as they are powered through usb! + // If you hang on boot, try setting this to "false"! + // See https://embassy.dev/book/dev/faq.html#_the_usb_examples_are_not_working_on_my_board_is_there_anything_else_i_need_to_configure + // for more information config.vbus_detection = true; + let driver = Driver::new_fs(p.USB_OTG_FS, Irqs, p.PA12, p.PA11, &mut ep_out_buffer, config); // Create embassy-usb Config diff --git a/examples/stm32f4/src/bin/usb_hid_mouse.rs b/examples/stm32f4/src/bin/usb_hid_mouse.rs index 0bc236119..2b8e2f147 100644 --- a/examples/stm32f4/src/bin/usb_hid_mouse.rs +++ b/examples/stm32f4/src/bin/usb_hid_mouse.rs @@ -18,6 +18,11 @@ bind_interrupts!(struct Irqs { OTG_FS => usb::InterruptHandler; }); +// If you are trying this and your USB device doesn't connect, the most +// common issues are the RCC config and vbus_detection +// +// See https://embassy.dev/book/dev/faq.html#_the_usb_examples_are_not_working_on_my_board_is_there_anything_else_i_need_to_configure +// for more information. #[embassy_executor::main] async fn main(_spawner: Spawner) { let mut config = Config::default(); @@ -46,7 +51,15 @@ async fn main(_spawner: Spawner) { // Create the driver, from the HAL. let mut ep_out_buffer = [0u8; 256]; let mut config = embassy_stm32::usb::Config::default(); + + // Enable vbus_detection + // Note: some boards don't have this wired up and might not require it, + // as they are powered through usb! + // If you hang on boot, try setting this to "false"! + // See https://embassy.dev/book/dev/faq.html#_the_usb_examples_are_not_working_on_my_board_is_there_anything_else_i_need_to_configure + // for more information config.vbus_detection = true; + let driver = Driver::new_fs(p.USB_OTG_FS, Irqs, p.PA12, p.PA11, &mut ep_out_buffer, config); // Create embassy-usb Config diff --git a/examples/stm32f4/src/bin/usb_raw.rs b/examples/stm32f4/src/bin/usb_raw.rs index 4e583aeb8..00fdff2bf 100644 --- a/examples/stm32f4/src/bin/usb_raw.rs +++ b/examples/stm32f4/src/bin/usb_raw.rs @@ -69,6 +69,11 @@ bind_interrupts!(struct Irqs { OTG_FS => usb::InterruptHandler; }); +// If you are trying this and your USB device doesn't connect, the most +// common issues are the RCC config and vbus_detection +// +// See https://embassy.dev/book/dev/faq.html#_the_usb_examples_are_not_working_on_my_board_is_there_anything_else_i_need_to_configure +// for more information. #[embassy_executor::main] async fn main(_spawner: Spawner) { info!("Hello World!"); @@ -99,7 +104,15 @@ async fn main(_spawner: Spawner) { // Create the driver, from the HAL. let mut ep_out_buffer = [0u8; 256]; let mut config = embassy_stm32::usb::Config::default(); + + // Enable vbus_detection + // Note: some boards don't have this wired up and might not require it, + // as they are powered through usb! + // If you hang on boot, try setting this to "false"! + // See https://embassy.dev/book/dev/faq.html#_the_usb_examples_are_not_working_on_my_board_is_there_anything_else_i_need_to_configure + // for more information config.vbus_detection = true; + let driver = Driver::new_fs(p.USB_OTG_FS, Irqs, p.PA12, p.PA11, &mut ep_out_buffer, config); // Create embassy-usb Config diff --git a/examples/stm32f4/src/bin/usb_serial.rs b/examples/stm32f4/src/bin/usb_serial.rs index f3a375d31..94c6a4301 100644 --- a/examples/stm32f4/src/bin/usb_serial.rs +++ b/examples/stm32f4/src/bin/usb_serial.rs @@ -16,6 +16,11 @@ bind_interrupts!(struct Irqs { OTG_FS => usb::InterruptHandler; }); +// If you are trying this and your USB device doesn't connect, the most +// common issues are the RCC config and vbus_detection +// +// See https://embassy.dev/book/dev/faq.html#_the_usb_examples_are_not_working_on_my_board_is_there_anything_else_i_need_to_configure +// for more information. #[embassy_executor::main] async fn main(_spawner: Spawner) { info!("Hello World!"); @@ -46,7 +51,15 @@ async fn main(_spawner: Spawner) { // Create the driver, from the HAL. let mut ep_out_buffer = [0u8; 256]; let mut config = embassy_stm32::usb::Config::default(); + + // Enable vbus_detection + // Note: some boards don't have this wired up and might not require it, + // as they are powered through usb! + // If you hang on boot, try setting this to "false"! + // See https://embassy.dev/book/dev/faq.html#_the_usb_examples_are_not_working_on_my_board_is_there_anything_else_i_need_to_configure + // for more information config.vbus_detection = true; + let driver = Driver::new_fs(p.USB_OTG_FS, Irqs, p.PA12, p.PA11, &mut ep_out_buffer, config); // Create embassy-usb Config diff --git a/examples/stm32f7/src/bin/usb_serial.rs b/examples/stm32f7/src/bin/usb_serial.rs index 39a5512f4..bb42f4cc8 100644 --- a/examples/stm32f7/src/bin/usb_serial.rs +++ b/examples/stm32f7/src/bin/usb_serial.rs @@ -16,6 +16,11 @@ bind_interrupts!(struct Irqs { OTG_FS => usb::InterruptHandler; }); +// If you are trying this and your USB device doesn't connect, the most +// common issues are the RCC config and vbus_detection +// +// See https://embassy.dev/book/dev/faq.html#_the_usb_examples_are_not_working_on_my_board_is_there_anything_else_i_need_to_configure +// for more information. #[embassy_executor::main] async fn main(_spawner: Spawner) { info!("Hello World!"); @@ -46,7 +51,15 @@ async fn main(_spawner: Spawner) { // Create the driver, from the HAL. let mut ep_out_buffer = [0u8; 256]; let mut config = embassy_stm32::usb::Config::default(); + + // Enable vbus_detection + // Note: some boards don't have this wired up and might not require it, + // as they are powered through usb! + // If you hang on boot, try setting this to "false"! + // See https://embassy.dev/book/dev/faq.html#_the_usb_examples_are_not_working_on_my_board_is_there_anything_else_i_need_to_configure + // for more information config.vbus_detection = true; + let driver = Driver::new_fs(p.USB_OTG_FS, Irqs, p.PA12, p.PA11, &mut ep_out_buffer, config); // Create embassy-usb Config diff --git a/examples/stm32h7/src/bin/usb_serial.rs b/examples/stm32h7/src/bin/usb_serial.rs index 576506ad3..725c9bb02 100644 --- a/examples/stm32h7/src/bin/usb_serial.rs +++ b/examples/stm32h7/src/bin/usb_serial.rs @@ -15,6 +15,11 @@ bind_interrupts!(struct Irqs { OTG_FS => usb::InterruptHandler; }); +// If you are trying this and your USB device doesn't connect, the most +// common issues are the RCC config and vbus_detection +// +// See https://embassy.dev/book/dev/faq.html#_the_usb_examples_are_not_working_on_my_board_is_there_anything_else_i_need_to_configure +// for more information. #[embassy_executor::main] async fn main(_spawner: Spawner) { info!("Hello World!"); @@ -47,7 +52,15 @@ async fn main(_spawner: Spawner) { // Create the driver, from the HAL. let mut ep_out_buffer = [0u8; 256]; let mut config = embassy_stm32::usb::Config::default(); + + // Enable vbus_detection + // Note: some boards don't have this wired up and might not require it, + // as they are powered through usb! + // If you hang on boot, try setting this to "false"! + // See https://embassy.dev/book/dev/faq.html#_the_usb_examples_are_not_working_on_my_board_is_there_anything_else_i_need_to_configure + // for more information config.vbus_detection = true; + let driver = Driver::new_fs(p.USB_OTG_FS, Irqs, p.PA12, p.PA11, &mut ep_out_buffer, config); // Create embassy-usb Config diff --git a/examples/stm32l4/src/bin/usb_serial.rs b/examples/stm32l4/src/bin/usb_serial.rs index 198504b59..58229d0be 100644 --- a/examples/stm32l4/src/bin/usb_serial.rs +++ b/examples/stm32l4/src/bin/usb_serial.rs @@ -16,6 +16,11 @@ bind_interrupts!(struct Irqs { OTG_FS => usb::InterruptHandler; }); +// If you are trying this and your USB device doesn't connect, the most +// common issues are the RCC config and vbus_detection +// +// See https://embassy.dev/book/dev/faq.html#_the_usb_examples_are_not_working_on_my_board_is_there_anything_else_i_need_to_configure +// for more information. #[embassy_executor::main] async fn main(_spawner: Spawner) { info!("Hello World!"); @@ -41,7 +46,15 @@ async fn main(_spawner: Spawner) { // Create the driver, from the HAL. let mut ep_out_buffer = [0u8; 256]; let mut config = embassy_stm32::usb::Config::default(); + + // Enable vbus_detection + // Note: some boards don't have this wired up and might not require it, + // as they are powered through usb! + // If you hang on boot, try setting this to "false"! + // See https://embassy.dev/book/dev/faq.html#_the_usb_examples_are_not_working_on_my_board_is_there_anything_else_i_need_to_configure + // for more information config.vbus_detection = true; + let driver = Driver::new_fs(p.USB_OTG_FS, Irqs, p.PA12, p.PA11, &mut ep_out_buffer, config); // Create embassy-usb Config From 01b36a44348dc8c065fdeb8787ac5a97ca8197f3 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Jo=C3=ABl=20Schulz-Ansres?= Date: Mon, 22 Apr 2024 01:06:59 +0200 Subject: [PATCH 187/581] rustfmt usb examples --- examples/stm32f4/src/bin/usb_ethernet.rs | 2 +- examples/stm32f4/src/bin/usb_hid_keyboard.rs | 4 ++-- examples/stm32f4/src/bin/usb_hid_mouse.rs | 2 +- examples/stm32f4/src/bin/usb_raw.rs | 4 ++-- examples/stm32f4/src/bin/usb_serial.rs | 4 ++-- examples/stm32f7/src/bin/usb_serial.rs | 4 ++-- examples/stm32h7/src/bin/usb_serial.rs | 4 ++-- examples/stm32l4/src/bin/usb_serial.rs | 2 +- 8 files changed, 13 insertions(+), 13 deletions(-) diff --git a/examples/stm32f4/src/bin/usb_ethernet.rs b/examples/stm32f4/src/bin/usb_ethernet.rs index 284c74564..34e58f282 100644 --- a/examples/stm32f4/src/bin/usb_ethernet.rs +++ b/examples/stm32f4/src/bin/usb_ethernet.rs @@ -79,7 +79,7 @@ async fn main(spawner: Spawner) { // Enable vbus_detection // Note: some boards don't have this wired up and might not require it, - // as they are powered through usb! + // as they are powered through usb! // If you hang on boot, try setting this to "false"! // See https://embassy.dev/book/dev/faq.html#_the_usb_examples_are_not_working_on_my_board_is_there_anything_else_i_need_to_configure // for more information diff --git a/examples/stm32f4/src/bin/usb_hid_keyboard.rs b/examples/stm32f4/src/bin/usb_hid_keyboard.rs index 4d9086156..7067d15a3 100644 --- a/examples/stm32f4/src/bin/usb_hid_keyboard.rs +++ b/examples/stm32f4/src/bin/usb_hid_keyboard.rs @@ -57,12 +57,12 @@ async fn main(_spawner: Spawner) { // Enable vbus_detection // Note: some boards don't have this wired up and might not require it, - // as they are powered through usb! + // as they are powered through usb! // If you hang on boot, try setting this to "false"! // See https://embassy.dev/book/dev/faq.html#_the_usb_examples_are_not_working_on_my_board_is_there_anything_else_i_need_to_configure // for more information config.vbus_detection = true; - + let driver = Driver::new_fs(p.USB_OTG_FS, Irqs, p.PA12, p.PA11, &mut ep_out_buffer, config); // Create embassy-usb Config diff --git a/examples/stm32f4/src/bin/usb_hid_mouse.rs b/examples/stm32f4/src/bin/usb_hid_mouse.rs index 2b8e2f147..0d04d2a9c 100644 --- a/examples/stm32f4/src/bin/usb_hid_mouse.rs +++ b/examples/stm32f4/src/bin/usb_hid_mouse.rs @@ -54,7 +54,7 @@ async fn main(_spawner: Spawner) { // Enable vbus_detection // Note: some boards don't have this wired up and might not require it, - // as they are powered through usb! + // as they are powered through usb! // If you hang on boot, try setting this to "false"! // See https://embassy.dev/book/dev/faq.html#_the_usb_examples_are_not_working_on_my_board_is_there_anything_else_i_need_to_configure // for more information diff --git a/examples/stm32f4/src/bin/usb_raw.rs b/examples/stm32f4/src/bin/usb_raw.rs index 00fdff2bf..d058abdd0 100644 --- a/examples/stm32f4/src/bin/usb_raw.rs +++ b/examples/stm32f4/src/bin/usb_raw.rs @@ -107,12 +107,12 @@ async fn main(_spawner: Spawner) { // Enable vbus_detection // Note: some boards don't have this wired up and might not require it, - // as they are powered through usb! + // as they are powered through usb! // If you hang on boot, try setting this to "false"! // See https://embassy.dev/book/dev/faq.html#_the_usb_examples_are_not_working_on_my_board_is_there_anything_else_i_need_to_configure // for more information config.vbus_detection = true; - + let driver = Driver::new_fs(p.USB_OTG_FS, Irqs, p.PA12, p.PA11, &mut ep_out_buffer, config); // Create embassy-usb Config diff --git a/examples/stm32f4/src/bin/usb_serial.rs b/examples/stm32f4/src/bin/usb_serial.rs index 94c6a4301..25806dd85 100644 --- a/examples/stm32f4/src/bin/usb_serial.rs +++ b/examples/stm32f4/src/bin/usb_serial.rs @@ -54,12 +54,12 @@ async fn main(_spawner: Spawner) { // Enable vbus_detection // Note: some boards don't have this wired up and might not require it, - // as they are powered through usb! + // as they are powered through usb! // If you hang on boot, try setting this to "false"! // See https://embassy.dev/book/dev/faq.html#_the_usb_examples_are_not_working_on_my_board_is_there_anything_else_i_need_to_configure // for more information config.vbus_detection = true; - + let driver = Driver::new_fs(p.USB_OTG_FS, Irqs, p.PA12, p.PA11, &mut ep_out_buffer, config); // Create embassy-usb Config diff --git a/examples/stm32f7/src/bin/usb_serial.rs b/examples/stm32f7/src/bin/usb_serial.rs index bb42f4cc8..2fee561c7 100644 --- a/examples/stm32f7/src/bin/usb_serial.rs +++ b/examples/stm32f7/src/bin/usb_serial.rs @@ -54,12 +54,12 @@ async fn main(_spawner: Spawner) { // Enable vbus_detection // Note: some boards don't have this wired up and might not require it, - // as they are powered through usb! + // as they are powered through usb! // If you hang on boot, try setting this to "false"! // See https://embassy.dev/book/dev/faq.html#_the_usb_examples_are_not_working_on_my_board_is_there_anything_else_i_need_to_configure // for more information config.vbus_detection = true; - + let driver = Driver::new_fs(p.USB_OTG_FS, Irqs, p.PA12, p.PA11, &mut ep_out_buffer, config); // Create embassy-usb Config diff --git a/examples/stm32h7/src/bin/usb_serial.rs b/examples/stm32h7/src/bin/usb_serial.rs index 725c9bb02..872ff815c 100644 --- a/examples/stm32h7/src/bin/usb_serial.rs +++ b/examples/stm32h7/src/bin/usb_serial.rs @@ -55,12 +55,12 @@ async fn main(_spawner: Spawner) { // Enable vbus_detection // Note: some boards don't have this wired up and might not require it, - // as they are powered through usb! + // as they are powered through usb! // If you hang on boot, try setting this to "false"! // See https://embassy.dev/book/dev/faq.html#_the_usb_examples_are_not_working_on_my_board_is_there_anything_else_i_need_to_configure // for more information config.vbus_detection = true; - + let driver = Driver::new_fs(p.USB_OTG_FS, Irqs, p.PA12, p.PA11, &mut ep_out_buffer, config); // Create embassy-usb Config diff --git a/examples/stm32l4/src/bin/usb_serial.rs b/examples/stm32l4/src/bin/usb_serial.rs index 58229d0be..b905fc66f 100644 --- a/examples/stm32l4/src/bin/usb_serial.rs +++ b/examples/stm32l4/src/bin/usb_serial.rs @@ -49,7 +49,7 @@ async fn main(_spawner: Spawner) { // Enable vbus_detection // Note: some boards don't have this wired up and might not require it, - // as they are powered through usb! + // as they are powered through usb! // If you hang on boot, try setting this to "false"! // See https://embassy.dev/book/dev/faq.html#_the_usb_examples_are_not_working_on_my_board_is_there_anything_else_i_need_to_configure // for more information From 6e1290b3f14f141fd2f53d001ef56186b2b80a42 Mon Sep 17 00:00:00 2001 From: Eric Yanush Date: Mon, 22 Apr 2024 01:45:09 -0600 Subject: [PATCH 188/581] Ensure bus errors are forwarded only once, enable bus off/passive/warning interrupts --- embassy-stm32/src/can/bxcan/mod.rs | 15 +++++++++++++-- embassy-stm32/src/can/bxcan/registers.rs | 16 +++++++++++++++- 2 files changed, 28 insertions(+), 3 deletions(-) diff --git a/embassy-stm32/src/can/bxcan/mod.rs b/embassy-stm32/src/can/bxcan/mod.rs index 65fd0e9c2..d43ce778d 100644 --- a/embassy-stm32/src/can/bxcan/mod.rs +++ b/embassy-stm32/src/can/bxcan/mod.rs @@ -67,12 +67,20 @@ pub struct SceInterruptHandler { impl interrupt::typelevel::Handler for SceInterruptHandler { unsafe fn on_interrupt() { - // info!("sce irq"); + info!("sce irq"); let msr = T::regs().msr(); let msr_val = msr.read(); if msr_val.erri() { - msr.modify(|v| v.set_erri(true)); + info!("Error interrupt"); + // Disable the interrupt, but don't acknowledge the error, so that it can be + // forwarded off the the bus message consumer. If we don't provide some way for + // downstream code to determine that it has already provided this bus error instance + // to the bus message consumer, we are doomed to re-provide a single error instance for + // an indefinite amount of time. + let ier = T::regs().ier(); + ier.modify(|i| i.set_errie(false)); + T::state().err_waker.wake(); } } @@ -180,6 +188,9 @@ impl<'d, T: Instance> Can<'d, T> { w.set_fmpie(0, true); w.set_fmpie(1, true); w.set_tmeie(true); + w.set_bofie(true); + w.set_epvie(true); + w.set_ewgie(true); }); T::regs().mcr().write(|w| { diff --git a/embassy-stm32/src/can/bxcan/registers.rs b/embassy-stm32/src/can/bxcan/registers.rs index 732567797..225b25d8a 100644 --- a/embassy-stm32/src/can/bxcan/registers.rs +++ b/embassy-stm32/src/can/bxcan/registers.rs @@ -145,7 +145,21 @@ impl Registers { } pub fn curr_error(&self) -> Option { - let err = { self.0.esr().read() }; + if !self.0.msr().read().erri() { + // This ensures that once a single error instance has + // been acknowledged and forwared to the bus message consumer + // we don't continue to re-forward the same error occurrance for an + // in-definite amount of time. + return None; + } + + // Since we have not already acknowledge the error, and the interrupt was + // disabled in the ISR, we will acknowledge the current error and re-enable the interrupt + // so futher errors are captured + self.0.msr().modify(|m| m.set_erri(true)); + self.0.ier().modify(|i| i.set_errie(true)); + + let err = self.0.esr().read(); if err.boff() { return Some(BusError::BusOff); } else if err.epvf() { From 68a4fd8f4a18a33a9045d7128a39d8dff5652491 Mon Sep 17 00:00:00 2001 From: Eric Yanush Date: Mon, 22 Apr 2024 01:52:10 -0600 Subject: [PATCH 189/581] Enable LEC interrupt as well --- embassy-stm32/src/can/bxcan/mod.rs | 1 + 1 file changed, 1 insertion(+) diff --git a/embassy-stm32/src/can/bxcan/mod.rs b/embassy-stm32/src/can/bxcan/mod.rs index d43ce778d..c524c68a9 100644 --- a/embassy-stm32/src/can/bxcan/mod.rs +++ b/embassy-stm32/src/can/bxcan/mod.rs @@ -191,6 +191,7 @@ impl<'d, T: Instance> Can<'d, T> { w.set_bofie(true); w.set_epvie(true); w.set_ewgie(true); + w.set_lecie(true); }); T::regs().mcr().write(|w| { From 7f55a28a50bf5ac8acbeac4e47ad4e2fc73895f4 Mon Sep 17 00:00:00 2001 From: Torin Cooper-Bennun Date: Thu, 18 Apr 2024 09:59:39 +0100 Subject: [PATCH 190/581] stm32: can: fd: Properties for common runtime get/set operations --- embassy-stm32/src/can/fdcan.rs | 132 ++++++++++++++++++++++++++------- 1 file changed, 105 insertions(+), 27 deletions(-) diff --git a/embassy-stm32/src/can/fdcan.rs b/embassy-stm32/src/can/fdcan.rs index 563f542d4..cec94e78a 100644 --- a/embassy-stm32/src/can/fdcan.rs +++ b/embassy-stm32/src/can/fdcan.rs @@ -146,6 +146,7 @@ pub struct CanConfigurator<'d, T: Instance> { config: crate::can::fd::config::FdCanConfig, /// Reference to internals. instance: FdcanInstance<'d, T>, + properties: Properties, } fn calc_ns_per_timer_tick(mode: crate::can::fd::config::FrameTransmissionConfig) -> u64 { @@ -199,9 +200,20 @@ impl<'d, T: Instance> CanConfigurator<'d, T> { Self { config, instance: FdcanInstance(peri), + properties: Properties::new(), } } + /// Get driver properties + pub fn properties(&self) -> &Properties { + &self.properties + } + + /// Get mutable driver properties + pub fn properties_mut(&mut self) -> &mut Properties { + &mut self.properties + } + /// Get configuration pub fn config(&self) -> crate::can::fd::config::FdCanConfig { return self.config; @@ -240,32 +252,6 @@ impl<'d, T: Instance> CanConfigurator<'d, T> { self.config = self.config.set_data_bit_timing(nbtr); } - /// Set an Standard Address CAN filter into slot 'id' - #[inline] - pub fn set_standard_filter(&mut self, slot: StandardFilterSlot, filter: StandardFilter) { - T::registers().msg_ram_mut().filters.flssa[slot as usize].activate(filter); - } - - /// Set an array of Standard Address CAN filters and overwrite the current set - pub fn set_standard_filters(&mut self, filters: &[StandardFilter; STANDARD_FILTER_MAX as usize]) { - for (i, f) in filters.iter().enumerate() { - T::registers().msg_ram_mut().filters.flssa[i].activate(*f); - } - } - - /// Set an Extended Address CAN filter into slot 'id' - #[inline] - pub fn set_extended_filter(&mut self, slot: ExtendedFilterSlot, filter: ExtendedFilter) { - T::registers().msg_ram_mut().filters.flesa[slot as usize].activate(filter); - } - - /// Set an array of Extended Address CAN filters and overwrite the current set - pub fn set_extended_filters(&mut self, filters: &[ExtendedFilter; EXTENDED_FILTER_MAX as usize]) { - for (i, f) in filters.iter().enumerate() { - T::registers().msg_ram_mut().filters.flesa[i].activate(*f); - } - } - /// Start in mode. pub fn start(self, mode: OperatingMode) -> Can<'d, T> { let ns_per_timer_tick = calc_ns_per_timer_tick::(self.config.frame_transmit); @@ -277,6 +263,7 @@ impl<'d, T: Instance> CanConfigurator<'d, T> { config: self.config, instance: self.instance, _mode: mode, + properties: self.properties, }; ret } @@ -303,9 +290,20 @@ pub struct Can<'d, T: Instance> { /// Reference to internals. instance: FdcanInstance<'d, T>, _mode: OperatingMode, + properties: Properties, } impl<'d, T: Instance> Can<'d, T> { + /// Get properties + pub fn properties(&self) -> &Properties { + &self.properties + } + + /// Get mutable driver properties + pub fn properties_mut(&mut self) -> &mut Properties { + &mut self.properties + } + /// Flush one of the TX mailboxes. pub async fn flush(&self, idx: usize) { poll_fn(|cx| { @@ -351,7 +349,7 @@ impl<'d, T: Instance> Can<'d, T> { } /// Split instance into separate Tx(write) and Rx(read) portions - pub fn split(self) -> (CanTx<'d, T>, CanRx<'d, T>) { + pub fn split(self) -> (CanTx<'d, T>, CanRx<'d, T>, Properties) { ( CanTx { config: self.config, @@ -363,6 +361,7 @@ impl<'d, T: Instance> Can<'d, T> { _instance2: T::regs(), _mode: self._mode, }, + self.properties, ) } @@ -373,6 +372,7 @@ impl<'d, T: Instance> Can<'d, T> { //_instance2: T::regs(), instance: tx._instance, _mode: rx._mode, + properties: Properties::new(), } } @@ -408,6 +408,7 @@ pub struct BufferedCan<'d, T: Instance, const TX_BUF_SIZE: usize, const RX_BUF_S _mode: OperatingMode, tx_buf: &'static TxBuf, rx_buf: &'static RxBuf, + properties: Properties, } impl<'c, 'd, T: Instance, const TX_BUF_SIZE: usize, const RX_BUF_SIZE: usize> @@ -426,10 +427,21 @@ impl<'c, 'd, T: Instance, const TX_BUF_SIZE: usize, const RX_BUF_SIZE: usize> _mode, tx_buf, rx_buf, + properties: Properties::new(), } .setup() } + /// Get driver properties + pub fn properties(&self) -> &Properties { + &self.properties + } + + /// Get mutable driver properties + pub fn properties_mut(&mut self) -> &mut Properties { + &mut self.properties + } + fn setup(self) -> Self { // We don't want interrupts being processed while we change modes. critical_section::with(|_| unsafe { @@ -494,6 +506,7 @@ pub struct BufferedCanFd<'d, T: Instance, const TX_BUF_SIZE: usize, const RX_BUF _mode: OperatingMode, tx_buf: &'static TxFdBuf, rx_buf: &'static RxFdBuf, + properties: Properties, } /// Sender that can be used for sending CAN frames. @@ -542,10 +555,21 @@ impl<'c, 'd, T: Instance, const TX_BUF_SIZE: usize, const RX_BUF_SIZE: usize> _mode, tx_buf, rx_buf, + properties: Properties::new(), } .setup() } + /// Get driver properties + pub fn properties(&self) -> &Properties { + &self.properties + } + + /// Get mutable driver properties + pub fn properties_mut(&mut self) -> &mut Properties { + &mut self.properties + } + fn setup(self) -> Self { // We don't want interrupts being processed while we change modes. critical_section::with(|_| unsafe { @@ -804,6 +828,60 @@ impl TxMode { } } +/// Common driver properties, including filters and error counters +pub struct Properties { + instance: PhantomData, +} + +impl Properties { + fn new() -> Self { + Self { + instance: Default::default(), + } + } + + /// Set an Standard Address CAN filter into slot 'id' + #[inline] + pub fn set_standard_filter(&mut self, slot: StandardFilterSlot, filter: StandardFilter) { + T::registers().msg_ram_mut().filters.flssa[slot as usize].activate(filter); + } + + /// Set an array of Standard Address CAN filters and overwrite the current set + pub fn set_standard_filters(&mut self, filters: &[StandardFilter; STANDARD_FILTER_MAX as usize]) { + for (i, f) in filters.iter().enumerate() { + T::registers().msg_ram_mut().filters.flssa[i].activate(*f); + } + } + + /// Set an Extended Address CAN filter into slot 'id' + #[inline] + pub fn set_extended_filter(&mut self, slot: ExtendedFilterSlot, filter: ExtendedFilter) { + T::registers().msg_ram_mut().filters.flesa[slot as usize].activate(filter); + } + + /// Set an array of Extended Address CAN filters and overwrite the current set + pub fn set_extended_filters(&mut self, filters: &[ExtendedFilter; EXTENDED_FILTER_MAX as usize]) { + for (i, f) in filters.iter().enumerate() { + T::registers().msg_ram_mut().filters.flesa[i].activate(*f); + } + } + + /// Get the CAN RX error counter + pub fn get_rx_error_count(&self) -> u8 { + T::registers().regs.ecr().read().rec() + } + + /// Get the CAN TX error counter + pub fn get_tx_error_count(&self) -> u8 { + T::registers().regs.ecr().read().tec() + } + + /// Get the current Bus-Off state + pub fn get_bus_off(&self) -> bool { + T::registers().regs.psr().read().bo() + } +} + struct State { pub rx_mode: RxMode, pub tx_mode: TxMode, From 263071d0169318ab24e0f6caac87a13d1c906769 Mon Sep 17 00:00:00 2001 From: Torin Cooper-Bennun Date: Fri, 19 Apr 2024 14:41:49 +0100 Subject: [PATCH 191/581] stm32: can: fd: Properties: rm &mut refs; make !Sync; rename getters --- embassy-stm32/src/can/fdcan.rs | 47 +++++++++++----------------------- 1 file changed, 15 insertions(+), 32 deletions(-) diff --git a/embassy-stm32/src/can/fdcan.rs b/embassy-stm32/src/can/fdcan.rs index cec94e78a..0916f6ac6 100644 --- a/embassy-stm32/src/can/fdcan.rs +++ b/embassy-stm32/src/can/fdcan.rs @@ -209,11 +209,6 @@ impl<'d, T: Instance> CanConfigurator<'d, T> { &self.properties } - /// Get mutable driver properties - pub fn properties_mut(&mut self) -> &mut Properties { - &mut self.properties - } - /// Get configuration pub fn config(&self) -> crate::can::fd::config::FdCanConfig { return self.config; @@ -299,11 +294,6 @@ impl<'d, T: Instance> Can<'d, T> { &self.properties } - /// Get mutable driver properties - pub fn properties_mut(&mut self) -> &mut Properties { - &mut self.properties - } - /// Flush one of the TX mailboxes. pub async fn flush(&self, idx: usize) { poll_fn(|cx| { @@ -437,11 +427,6 @@ impl<'c, 'd, T: Instance, const TX_BUF_SIZE: usize, const RX_BUF_SIZE: usize> &self.properties } - /// Get mutable driver properties - pub fn properties_mut(&mut self) -> &mut Properties { - &mut self.properties - } - fn setup(self) -> Self { // We don't want interrupts being processed while we change modes. critical_section::with(|_| unsafe { @@ -565,11 +550,6 @@ impl<'c, 'd, T: Instance, const TX_BUF_SIZE: usize, const RX_BUF_SIZE: usize> &self.properties } - /// Get mutable driver properties - pub fn properties_mut(&mut self) -> &mut Properties { - &mut self.properties - } - fn setup(self) -> Self { // We don't want interrupts being processed while we change modes. critical_section::with(|_| unsafe { @@ -830,7 +810,8 @@ impl TxMode { /// Common driver properties, including filters and error counters pub struct Properties { - instance: PhantomData, + // phantom pointer to ensure !Sync + instance: PhantomData<*const T>, } impl Properties { @@ -840,44 +821,46 @@ impl Properties { } } - /// Set an Standard Address CAN filter into slot 'id' + /// Set a standard address CAN filter in the specified slot in FDCAN memory. #[inline] - pub fn set_standard_filter(&mut self, slot: StandardFilterSlot, filter: StandardFilter) { + pub fn set_standard_filter(&self, slot: StandardFilterSlot, filter: StandardFilter) { T::registers().msg_ram_mut().filters.flssa[slot as usize].activate(filter); } - /// Set an array of Standard Address CAN filters and overwrite the current set - pub fn set_standard_filters(&mut self, filters: &[StandardFilter; STANDARD_FILTER_MAX as usize]) { + /// Set the full array of standard address CAN filters in FDCAN memory. + /// Overwrites all standard address filters in memory. + pub fn set_standard_filters(&self, filters: &[StandardFilter; STANDARD_FILTER_MAX as usize]) { for (i, f) in filters.iter().enumerate() { T::registers().msg_ram_mut().filters.flssa[i].activate(*f); } } - /// Set an Extended Address CAN filter into slot 'id' + /// Set an extended address CAN filter in the specified slot in FDCAN memory. #[inline] - pub fn set_extended_filter(&mut self, slot: ExtendedFilterSlot, filter: ExtendedFilter) { + pub fn set_extended_filter(&self, slot: ExtendedFilterSlot, filter: ExtendedFilter) { T::registers().msg_ram_mut().filters.flesa[slot as usize].activate(filter); } - /// Set an array of Extended Address CAN filters and overwrite the current set - pub fn set_extended_filters(&mut self, filters: &[ExtendedFilter; EXTENDED_FILTER_MAX as usize]) { + /// Set the full array of extended address CAN filters in FDCAN memory. + /// Overwrites all extended address filters in memory. + pub fn set_extended_filters(&self, filters: &[ExtendedFilter; EXTENDED_FILTER_MAX as usize]) { for (i, f) in filters.iter().enumerate() { T::registers().msg_ram_mut().filters.flesa[i].activate(*f); } } /// Get the CAN RX error counter - pub fn get_rx_error_count(&self) -> u8 { + pub fn rx_error_count(&self) -> u8 { T::registers().regs.ecr().read().rec() } /// Get the CAN TX error counter - pub fn get_tx_error_count(&self) -> u8 { + pub fn tx_error_count(&self) -> u8 { T::registers().regs.ecr().read().tec() } /// Get the current Bus-Off state - pub fn get_bus_off(&self) -> bool { + pub fn bus_off(&self) -> bool { T::registers().regs.psr().read().bo() } } From 543c02e649ea8ec05597daca3816c05db2c6ab53 Mon Sep 17 00:00:00 2001 From: Torin Cooper-Bennun Date: Fri, 19 Apr 2024 15:09:01 +0100 Subject: [PATCH 192/581] stm32: can: fd: fix test build for all relevant chips --- tests/stm32/Cargo.toml | 2 +- tests/stm32/src/bin/fdcan.rs | 22 +++++++++++++++++----- 2 files changed, 18 insertions(+), 6 deletions(-) diff --git a/tests/stm32/Cargo.toml b/tests/stm32/Cargo.toml index e09083111..004846a9b 100644 --- a/tests/stm32/Cargo.toml +++ b/tests/stm32/Cargo.toml @@ -15,7 +15,7 @@ stm32f446re = ["embassy-stm32/stm32f446re", "chrono", "stop", "can", "not-gpdma" stm32f767zi = ["embassy-stm32/stm32f767zi", "chrono", "not-gpdma", "eth", "rng"] stm32g071rb = ["embassy-stm32/stm32g071rb", "cm0", "not-gpdma", "dac", "ucpd"] stm32g491re = ["embassy-stm32/stm32g491re", "chrono", "stop", "not-gpdma", "rng", "fdcan", "cordic"] -stm32h563zi = ["embassy-stm32/stm32h563zi", "chrono", "eth", "rng", "hash", "cordic"] +stm32h563zi = ["embassy-stm32/stm32h563zi", "chrono", "eth", "rng", "fdcan", "hash", "cordic"] stm32h753zi = ["embassy-stm32/stm32h753zi", "chrono", "not-gpdma", "eth", "rng", "fdcan", "hash", "cryp"] stm32h755zi = ["embassy-stm32/stm32h755zi-cm7", "chrono", "not-gpdma", "eth", "dac", "rng", "fdcan", "hash", "cryp"] stm32h7a3zi = ["embassy-stm32/stm32h7a3zi", "not-gpdma", "rng", "fdcan"] diff --git a/tests/stm32/src/bin/fdcan.rs b/tests/stm32/src/bin/fdcan.rs index 27bdd038a..b0c0cd82e 100644 --- a/tests/stm32/src/bin/fdcan.rs +++ b/tests/stm32/src/bin/fdcan.rs @@ -24,7 +24,19 @@ bind_interrupts!(struct Irqs1 { FDCAN1_IT1 => can::IT1InterruptHandler; }); -#[cfg(any(feature = "stm32h755zi", feature = "stm32h753zi", feature = "stm32h563zi"))] +#[cfg(feature = "stm32h563zi")] +fn options() -> (Config, TestOptions) { + info!("H563 config"); + ( + config(), + TestOptions { + max_latency: Duration::from_micros(1200), + max_buffered: 3, + }, + ) +} + +#[cfg(any(feature = "stm32h755zi", feature = "stm32h753zi"))] fn options() -> (Config, TestOptions) { use embassy_stm32::rcc; info!("H75 config"); @@ -88,11 +100,11 @@ async fn main(_spawner: Spawner) { can.set_bitrate(250_000); can2.set_bitrate(250_000); - can.set_extended_filter( + can.properties().set_extended_filter( can::filter::ExtendedFilterSlot::_0, can::filter::ExtendedFilter::accept_all_into_fifo1(), ); - can2.set_extended_filter( + can2.properties().set_extended_filter( can::filter::ExtendedFilterSlot::_0, can::filter::ExtendedFilter::accept_all_into_fifo1(), ); @@ -106,8 +118,8 @@ async fn main(_spawner: Spawner) { info!("CAN Configured"); // Test again with a split - let (mut tx, mut rx) = can.split(); - let (mut tx2, mut rx2) = can2.split(); + let (mut tx, mut rx, _props) = can.split(); + let (mut tx2, mut rx2, _props) = can2.split(); run_split_can_tests(&mut tx, &mut rx, &options).await; run_split_can_tests(&mut tx2, &mut rx2, &options).await; From 846abfae2b8a24715542d57d4e6ea4386607d845 Mon Sep 17 00:00:00 2001 From: Torin Cooper-Bennun Date: Fri, 19 Apr 2024 15:20:04 +0100 Subject: [PATCH 193/581] examples: stm32: can: fix build --- examples/stm32g4/src/bin/can.rs | 4 ++-- examples/stm32h5/src/bin/can.rs | 2 +- examples/stm32h7/src/bin/can.rs | 2 +- 3 files changed, 4 insertions(+), 4 deletions(-) diff --git a/examples/stm32g4/src/bin/can.rs b/examples/stm32g4/src/bin/can.rs index 2ed632a93..7836334af 100644 --- a/examples/stm32g4/src/bin/can.rs +++ b/examples/stm32g4/src/bin/can.rs @@ -38,7 +38,7 @@ async fn main(_spawner: Spawner) { let mut can = can::CanConfigurator::new(peripherals.FDCAN1, peripherals.PA11, peripherals.PA12, Irqs); - can.set_extended_filter( + can.properties().set_extended_filter( can::filter::ExtendedFilterSlot::_0, can::filter::ExtendedFilter::accept_all_into_fifo1(), ); @@ -128,7 +128,7 @@ async fn main(_spawner: Spawner) { } } i = 0; - let (mut tx, mut rx) = can.split(); + let (mut tx, mut rx, _props) = can.split(); // With split loop { let frame = can::frame::Frame::new_extended(0x123456F, &[i; 8]).unwrap(); diff --git a/examples/stm32h5/src/bin/can.rs b/examples/stm32h5/src/bin/can.rs index dd625c90a..dc77ec3bf 100644 --- a/examples/stm32h5/src/bin/can.rs +++ b/examples/stm32h5/src/bin/can.rs @@ -67,7 +67,7 @@ async fn main(_spawner: Spawner) { } } - let (mut tx, mut rx) = can.split(); + let (mut tx, mut rx, _props) = can.split(); // With split loop { let frame = can::frame::Frame::new_extended(0x123456F, &[i; 8]).unwrap(); diff --git a/examples/stm32h7/src/bin/can.rs b/examples/stm32h7/src/bin/can.rs index 22cb27481..a889d5860 100644 --- a/examples/stm32h7/src/bin/can.rs +++ b/examples/stm32h7/src/bin/can.rs @@ -67,7 +67,7 @@ async fn main(_spawner: Spawner) { } } - let (mut tx, mut rx) = can.split(); + let (mut tx, mut rx, _props) = can.split(); // With split loop { let frame = can::frame::Frame::new_extended(0x123456F, &[i; 8]).unwrap(); From 3e00c1ac52ac847db44f83b6d94d493356a990ff Mon Sep 17 00:00:00 2001 From: Eric Yanush Date: Mon, 22 Apr 2024 14:01:48 -0600 Subject: [PATCH 194/581] rustfmt whitespace fixes --- embassy-stm32/src/can/bxcan/mod.rs | 2 +- embassy-stm32/src/can/bxcan/registers.rs | 4 ++-- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/embassy-stm32/src/can/bxcan/mod.rs b/embassy-stm32/src/can/bxcan/mod.rs index c524c68a9..fa408c260 100644 --- a/embassy-stm32/src/can/bxcan/mod.rs +++ b/embassy-stm32/src/can/bxcan/mod.rs @@ -76,7 +76,7 @@ impl interrupt::typelevel::Handler for SceInterrup // Disable the interrupt, but don't acknowledge the error, so that it can be // forwarded off the the bus message consumer. If we don't provide some way for // downstream code to determine that it has already provided this bus error instance - // to the bus message consumer, we are doomed to re-provide a single error instance for + // to the bus message consumer, we are doomed to re-provide a single error instance for // an indefinite amount of time. let ier = T::regs().ier(); ier.modify(|i| i.set_errie(false)); diff --git a/embassy-stm32/src/can/bxcan/registers.rs b/embassy-stm32/src/can/bxcan/registers.rs index 225b25d8a..446f3ad6f 100644 --- a/embassy-stm32/src/can/bxcan/registers.rs +++ b/embassy-stm32/src/can/bxcan/registers.rs @@ -148,10 +148,10 @@ impl Registers { if !self.0.msr().read().erri() { // This ensures that once a single error instance has // been acknowledged and forwared to the bus message consumer - // we don't continue to re-forward the same error occurrance for an + // we don't continue to re-forward the same error occurrance for an // in-definite amount of time. return None; - } + } // Since we have not already acknowledge the error, and the interrupt was // disabled in the ISR, we will acknowledge the current error and re-enable the interrupt From e65503e25537ba872f02137713bdc4e5bf645a13 Mon Sep 17 00:00:00 2001 From: Eric Yanush Date: Mon, 22 Apr 2024 13:54:15 -0600 Subject: [PATCH 195/581] Add sleep/wakeup handling for bxCAN peripherals --- embassy-stm32/src/can/bxcan/mod.rs | 48 +++++++++++++++++++++++++++++- 1 file changed, 47 insertions(+), 1 deletion(-) diff --git a/embassy-stm32/src/can/bxcan/mod.rs b/embassy-stm32/src/can/bxcan/mod.rs index fa408c260..342040c25 100644 --- a/embassy-stm32/src/can/bxcan/mod.rs +++ b/embassy-stm32/src/can/bxcan/mod.rs @@ -71,7 +71,10 @@ impl interrupt::typelevel::Handler for SceInterrup let msr = T::regs().msr(); let msr_val = msr.read(); - if msr_val.erri() { + if msr_val.slaki() { + msr.modify(|m| m.set_slaki(true)); + T::state().err_waker.wake(); + } else if msr_val.erri() { info!("Error interrupt"); // Disable the interrupt, but don't acknowledge the error, so that it can be // forwarded off the the bus message consumer. If we don't provide some way for @@ -251,6 +254,49 @@ impl<'d, T: Instance> Can<'d, T> { } } + /// Enables or disables the peripheral from automatically wakeup when a SOF is detected on the bus + /// while the peripheral is in sleep mode + pub fn set_automatic_wakeup(&mut self, enabled: bool) { + Registers(T::regs()).set_automatic_wakeup(enabled); + } + + /// Manually wake the peripheral from sleep mode. + /// + /// Waking the peripheral manually does not trigger a wake-up interrupt. + /// This will wait until the peripheral has acknowledged it has awoken from sleep mode + pub fn wakeup(&mut self) { + Registers(T::regs()).wakeup() + } + + /// Check if the peripheral is currently in sleep mode + pub fn is_sleeping(&self) -> bool { + T::regs().msr().read().slak() + } + + /// Put the peripheral in sleep mode + /// + /// When the peripherial is in sleep mode, messages can still be queued for transmission + /// and any previously received messages can be read from the receive FIFOs, however + /// no messages will be transmitted and no additional messages will be received. + /// + /// If the peripheral has automatic wakeup enabled, when a Start-of-Frame is detected + /// the peripheral will automatically wake and receive the incoming message. + pub async fn sleep(&mut self) { + T::regs().ier().modify(|i| i.set_slkie(true)); + T::regs().mcr().modify(|m| m.set_sleep(true)); + + poll_fn(|cx| { + T::state().err_waker.register(cx.waker()); + if self.is_sleeping() { + Poll::Ready(()) + } else { + Poll::Pending + } + }).await; + + T::regs().ier().modify(|i| i.set_slkie(false)); + } + /// Queues the message to be sent. /// /// If the TX queue is full, this will wait until there is space, therefore exerting backpressure. From 5c56aff9c263308ccc866082bfbcfff2dadf80c4 Mon Sep 17 00:00:00 2001 From: Eric Yanush Date: Mon, 22 Apr 2024 14:05:28 -0600 Subject: [PATCH 196/581] rustfmt fixes --- embassy-stm32/src/can/bxcan/mod.rs | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-) diff --git a/embassy-stm32/src/can/bxcan/mod.rs b/embassy-stm32/src/can/bxcan/mod.rs index 342040c25..912634b84 100644 --- a/embassy-stm32/src/can/bxcan/mod.rs +++ b/embassy-stm32/src/can/bxcan/mod.rs @@ -261,7 +261,7 @@ impl<'d, T: Instance> Can<'d, T> { } /// Manually wake the peripheral from sleep mode. - /// + /// /// Waking the peripheral manually does not trigger a wake-up interrupt. /// This will wait until the peripheral has acknowledged it has awoken from sleep mode pub fn wakeup(&mut self) { @@ -274,17 +274,17 @@ impl<'d, T: Instance> Can<'d, T> { } /// Put the peripheral in sleep mode - /// + /// /// When the peripherial is in sleep mode, messages can still be queued for transmission /// and any previously received messages can be read from the receive FIFOs, however /// no messages will be transmitted and no additional messages will be received. - /// + /// /// If the peripheral has automatic wakeup enabled, when a Start-of-Frame is detected /// the peripheral will automatically wake and receive the incoming message. pub async fn sleep(&mut self) { T::regs().ier().modify(|i| i.set_slkie(true)); T::regs().mcr().modify(|m| m.set_sleep(true)); - + poll_fn(|cx| { T::state().err_waker.register(cx.waker()); if self.is_sleeping() { @@ -292,7 +292,8 @@ impl<'d, T: Instance> Can<'d, T> { } else { Poll::Pending } - }).await; + }) + .await; T::regs().ier().modify(|i| i.set_slkie(false)); } From ebb31481240f4e6565eee229f718dcd0069fe8f0 Mon Sep 17 00:00:00 2001 From: Mark Tomlin Date: Mon, 22 Apr 2024 17:00:44 -0400 Subject: [PATCH 197/581] Update time_keeping.adoc Fixed Typo. --- docs/modules/ROOT/pages/time_keeping.adoc | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/docs/modules/ROOT/pages/time_keeping.adoc b/docs/modules/ROOT/pages/time_keeping.adoc index 5fa7c53ae..17492a884 100644 --- a/docs/modules/ROOT/pages/time_keeping.adoc +++ b/docs/modules/ROOT/pages/time_keeping.adoc @@ -16,7 +16,7 @@ The `embassy::time::Timer` type provides two timing methods. An example of a delay is provided as follows: -TIP: The depenencies you need to run this example link:/book/dev/basic_application.html#_the_cargo_toml[can be found here]. +TIP: Dependencies needed to run this example link:/book/dev/basic_application.html#_the_cargo_toml[can be found here]. [,rust] ---- use embassy::executor::{task, Executor}; @@ -41,7 +41,7 @@ that expect a generic delay implementation to be provided. An example of how this can be used: -TIP: The depenencies you need to run this example link:/book/dev/basic_application.html#_the_cargo_toml[can be found here]. +TIP: Dependencies needed to run this example link:/book/dev/basic_application.html#_the_cargo_toml[can be found here]. [,rust] ---- use embassy::executor::{task, Executor}; From 7b47d53de2fa15882354189d6ba69e0141cc11ec Mon Sep 17 00:00:00 2001 From: Mark Tomlin Date: Mon, 22 Apr 2024 17:01:22 -0400 Subject: [PATCH 198/581] Update sharing_peripherals.adoc Fixed Typo. --- docs/modules/ROOT/pages/sharing_peripherals.adoc | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/docs/modules/ROOT/pages/sharing_peripherals.adoc b/docs/modules/ROOT/pages/sharing_peripherals.adoc index 000a7b1de..784239fb1 100644 --- a/docs/modules/ROOT/pages/sharing_peripherals.adoc +++ b/docs/modules/ROOT/pages/sharing_peripherals.adoc @@ -8,7 +8,7 @@ The following examples shows different ways to use the on-board LED on a Raspber Using mutual exclusion is the simplest way to share a peripheral. -TIP: The depenencies you need to run this example link:/book/dev/basic_application.html#_the_cargo_toml[can be found here]. +TIP: Dependencies needed to run this example link:/book/dev/basic_application.html#_the_cargo_toml[can be found here]. [,rust] ---- use defmt::*; @@ -78,7 +78,7 @@ To indicate that the pin will be set to an Output. The `AnyPin` could have been A channel is another way to ensure exclusive access to a resource. Using a channel is great in the cases where the access can happen at a later point in time, allowing you to enqueue operations and do other things. -TIP: The depenencies you need to run this example link:/book/dev/basic_application.html#_the_cargo_toml[can be found here]. +TIP: Dependencies needed to run this example link:/book/dev/basic_application.html#_the_cargo_toml[can be found here]. [,rust] ---- use defmt::*; From 6ca7e0feab9eb16261adacc8c2327e4d018acb13 Mon Sep 17 00:00:00 2001 From: Torin Cooper-Bennun Date: Tue, 23 Apr 2024 12:33:20 +0100 Subject: [PATCH 199/581] stm32: can: fd: fix a couple doc comments --- embassy-stm32/src/can/fdcan.rs | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/embassy-stm32/src/can/fdcan.rs b/embassy-stm32/src/can/fdcan.rs index 0916f6ac6..0df74a778 100644 --- a/embassy-stm32/src/can/fdcan.rs +++ b/embassy-stm32/src/can/fdcan.rs @@ -289,7 +289,7 @@ pub struct Can<'d, T: Instance> { } impl<'d, T: Instance> Can<'d, T> { - /// Get properties + /// Get driver properties pub fn properties(&self) -> &Properties { &self.properties } @@ -338,7 +338,7 @@ impl<'d, T: Instance> Can<'d, T> { T::state().rx_mode.read_fd::().await } - /// Split instance into separate Tx(write) and Rx(read) portions + /// Split instance into separate portions: Tx(write), Rx(read), common properties pub fn split(self) -> (CanTx<'d, T>, CanRx<'d, T>, Properties) { ( CanTx { From 521c132e348054e6326e9c9387516b0e98743092 Mon Sep 17 00:00:00 2001 From: Torin Cooper-Bennun Date: Tue, 23 Apr 2024 12:33:27 +0100 Subject: [PATCH 200/581] stm32: can: fd: introduce BusErrorMode with docs and Properties getter --- embassy-stm32/src/can/enums.rs | 18 ++++++++++++++++++ embassy-stm32/src/can/fdcan.rs | 14 +++++++++++--- 2 files changed, 29 insertions(+), 3 deletions(-) diff --git a/embassy-stm32/src/can/enums.rs b/embassy-stm32/src/can/enums.rs index 4d89c84d1..a5cca424d 100644 --- a/embassy-stm32/src/can/enums.rs +++ b/embassy-stm32/src/can/enums.rs @@ -29,6 +29,24 @@ pub enum BusError { BusWarning, } +/// Bus error modes. +/// +/// Contrary to the `BusError` enum which also includes last-seen acute protocol +/// errors, this enum includes only the mutually exclusive bus error modes. +#[derive(Debug)] +#[cfg_attr(feature = "defmt", derive(defmt::Format))] +pub enum BusErrorMode { + /// Error active mode (default). Controller will transmit an active error + /// frame upon protocol error. + ErrorActive, + /// Error passive mode. An error counter exceeded 127. Controller will + /// transmit a passive error frame upon protocol error. + ErrorPassive, + /// Bus off mode. The transmit error counter exceeded 255. Controller is not + /// participating in bus traffic. + BusOff, +} + /// Frame Create Errors #[derive(Debug)] #[cfg_attr(feature = "defmt", derive(defmt::Format))] diff --git a/embassy-stm32/src/can/fdcan.rs b/embassy-stm32/src/can/fdcan.rs index 0df74a778..faf8a1176 100644 --- a/embassy-stm32/src/can/fdcan.rs +++ b/embassy-stm32/src/can/fdcan.rs @@ -859,9 +859,17 @@ impl Properties { T::registers().regs.ecr().read().tec() } - /// Get the current Bus-Off state - pub fn bus_off(&self) -> bool { - T::registers().regs.psr().read().bo() + /// Get the current bus error mode + pub fn bus_error_mode(&self) -> BusErrorMode { + // This read will clear LEC and DLEC. This is not ideal, but protocol + // error reporting in this driver should have a big ol' FIXME on it + // anyway! + let psr = T::regs().psr().read(); + match (psr.bo(), psr.ep()) { + (false, false) => BusErrorMode::ErrorActive, + (false, true) => BusErrorMode::ErrorPassive, + (true, _) => BusErrorMode::BusOff, + } } } From e15fd5895fc375c85880cf7fb846b2652df50c01 Mon Sep 17 00:00:00 2001 From: Torin Cooper-Bennun Date: Tue, 23 Apr 2024 12:46:42 +0100 Subject: [PATCH 201/581] stm32: can: fd: Properties: simplify reg accesses --- embassy-stm32/src/can/fdcan.rs | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/embassy-stm32/src/can/fdcan.rs b/embassy-stm32/src/can/fdcan.rs index faf8a1176..6144ba520 100644 --- a/embassy-stm32/src/can/fdcan.rs +++ b/embassy-stm32/src/can/fdcan.rs @@ -851,12 +851,12 @@ impl Properties { /// Get the CAN RX error counter pub fn rx_error_count(&self) -> u8 { - T::registers().regs.ecr().read().rec() + T::regs().ecr().read().rec() } /// Get the CAN TX error counter pub fn tx_error_count(&self) -> u8 { - T::registers().regs.ecr().read().tec() + T::regs().ecr().read().tec() } /// Get the current bus error mode From 8c98809f1eb1a1953949dc3a0d5190994ede381a Mon Sep 17 00:00:00 2001 From: James Munns Date: Tue, 23 Apr 2024 19:44:34 +0200 Subject: [PATCH 202/581] Update version and add changelog --- embassy-usb/CHANGELOG.md | 16 ++++++++++++++++ embassy-usb/Cargo.toml | 2 +- 2 files changed, 17 insertions(+), 1 deletion(-) create mode 100644 embassy-usb/CHANGELOG.md diff --git a/embassy-usb/CHANGELOG.md b/embassy-usb/CHANGELOG.md new file mode 100644 index 000000000..00f3be06c --- /dev/null +++ b/embassy-usb/CHANGELOG.md @@ -0,0 +1,16 @@ +# Changelog + +All notable changes to this project will be documented in this file. + +The format is based on [Keep a Changelog](https://keepachangelog.com/en/1.0.0/), +and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0.html). + +## Unreleased + +## 0.2.0 - 2024-04-23 + +- Removed dynamically sized `device_descriptor` fields + +## 0.1.0 - 2024-01-11 + +- Initial Release diff --git a/embassy-usb/Cargo.toml b/embassy-usb/Cargo.toml index fe5e36b32..5fb174894 100644 --- a/embassy-usb/Cargo.toml +++ b/embassy-usb/Cargo.toml @@ -1,6 +1,6 @@ [package] name = "embassy-usb" -version = "0.1.0" +version = "0.2.0" edition = "2021" license = "MIT OR Apache-2.0" description = "Async USB device stack for embedded devices in Rust." From 0d0d8e14e2b0e81307ff70c5a31e300785da19f9 Mon Sep 17 00:00:00 2001 From: James Munns Date: Tue, 23 Apr 2024 19:48:16 +0200 Subject: [PATCH 203/581] Update dependent versions --- embassy-usb-dfu/Cargo.toml | 2 +- embassy-usb-logger/Cargo.toml | 2 +- examples/boot/application/stm32wb-dfu/Cargo.toml | 2 +- examples/boot/bootloader/stm32wb-dfu/Cargo.toml | 2 +- examples/nrf52840/Cargo.toml | 2 +- examples/nrf5340/Cargo.toml | 2 +- examples/rp/Cargo.toml | 2 +- examples/stm32f1/Cargo.toml | 2 +- examples/stm32f3/Cargo.toml | 2 +- examples/stm32f334/Cargo.toml | 2 +- examples/stm32f4/Cargo.toml | 2 +- examples/stm32f7/Cargo.toml | 2 +- examples/stm32g0/Cargo.toml | 2 +- examples/stm32g4/Cargo.toml | 2 +- examples/stm32h5/Cargo.toml | 2 +- examples/stm32h7/Cargo.toml | 2 +- examples/stm32l1/Cargo.toml | 2 +- examples/stm32l4/Cargo.toml | 2 +- examples/stm32l5/Cargo.toml | 2 +- examples/stm32u0/Cargo.toml | 2 +- examples/stm32u5/Cargo.toml | 2 +- 21 files changed, 21 insertions(+), 21 deletions(-) diff --git a/embassy-usb-dfu/Cargo.toml b/embassy-usb-dfu/Cargo.toml index 4d6ffeb5f..53d20b7d5 100644 --- a/embassy-usb-dfu/Cargo.toml +++ b/embassy-usb-dfu/Cargo.toml @@ -33,7 +33,7 @@ embassy-boot = { version = "0.2.0", path = "../embassy-boot" } embassy-futures = { version = "0.1.1", path = "../embassy-futures" } embassy-sync = { version = "0.5.0", path = "../embassy-sync" } embassy-time = { version = "0.3.0", path = "../embassy-time" } -embassy-usb = { version = "0.1.0", path = "../embassy-usb", default-features = false } +embassy-usb = { version = "0.2.0", path = "../embassy-usb", default-features = false } embedded-storage = { version = "0.3.1" } esp32c3-hal = { version = "0.13.0", optional = true, default-features = false } diff --git a/embassy-usb-logger/Cargo.toml b/embassy-usb-logger/Cargo.toml index cb23fed1b..81bcfc0da 100644 --- a/embassy-usb-logger/Cargo.toml +++ b/embassy-usb-logger/Cargo.toml @@ -15,7 +15,7 @@ src_base_git = "https://github.com/embassy-rs/embassy/blob/$COMMIT/embassy-usb-l target = "thumbv7em-none-eabi" [dependencies] -embassy-usb = { version = "0.1.0", path = "../embassy-usb" } +embassy-usb = { version = "0.2.0", path = "../embassy-usb" } embassy-sync = { version = "0.5.0", path = "../embassy-sync" } embassy-futures = { version = "0.1.0", path = "../embassy-futures" } log = "0.4" diff --git a/examples/boot/application/stm32wb-dfu/Cargo.toml b/examples/boot/application/stm32wb-dfu/Cargo.toml index 0bdf94331..84d6d04c1 100644 --- a/examples/boot/application/stm32wb-dfu/Cargo.toml +++ b/examples/boot/application/stm32wb-dfu/Cargo.toml @@ -11,7 +11,7 @@ embassy-time = { version = "0.3.0", path = "../../../../embassy-time", features embassy-stm32 = { version = "0.1.0", path = "../../../../embassy-stm32", features = ["stm32wb55rg", "time-driver-any", "exti"] } embassy-boot-stm32 = { version = "0.2.0", path = "../../../../embassy-boot-stm32", features = [] } embassy-embedded-hal = { version = "0.1.0", path = "../../../../embassy-embedded-hal" } -embassy-usb = { version = "0.1.0", path = "../../../../embassy-usb" } +embassy-usb = { version = "0.2.0", path = "../../../../embassy-usb" } embassy-usb-dfu = { version = "0.1.0", path = "../../../../embassy-usb-dfu", features = ["application", "cortex-m"] } defmt = { version = "0.3", optional = true } diff --git a/examples/boot/bootloader/stm32wb-dfu/Cargo.toml b/examples/boot/bootloader/stm32wb-dfu/Cargo.toml index 854f94d85..27b6b46df 100644 --- a/examples/boot/bootloader/stm32wb-dfu/Cargo.toml +++ b/examples/boot/bootloader/stm32wb-dfu/Cargo.toml @@ -18,7 +18,7 @@ embedded-storage = "0.3.1" embedded-storage-async = "0.4.0" cfg-if = "1.0.0" embassy-usb-dfu = { version = "0.1.0", path = "../../../../embassy-usb-dfu", features = ["dfu", "cortex-m"] } -embassy-usb = { version = "0.1.0", path = "../../../../embassy-usb", default-features = false } +embassy-usb = { version = "0.2.0", path = "../../../../embassy-usb", default-features = false } embassy-futures = { version = "0.1.1", path = "../../../../embassy-futures" } [features] diff --git a/examples/nrf52840/Cargo.toml b/examples/nrf52840/Cargo.toml index 4ab5c7b7c..f0553a92d 100644 --- a/examples/nrf52840/Cargo.toml +++ b/examples/nrf52840/Cargo.toml @@ -11,7 +11,7 @@ embassy-executor = { version = "0.5.0", path = "../../embassy-executor", feature embassy-time = { version = "0.3.0", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime"] } embassy-nrf = { version = "0.1.0", path = "../../embassy-nrf", features = ["defmt", "nrf52840", "time-driver-rtc1", "gpiote", "unstable-pac", "time"] } embassy-net = { version = "0.4.0", path = "../../embassy-net", features = ["defmt", "tcp", "dhcpv4", "medium-ethernet"] } -embassy-usb = { version = "0.1.0", path = "../../embassy-usb", features = ["defmt"] } +embassy-usb = { version = "0.2.0", path = "../../embassy-usb", features = ["defmt"] } embedded-io = { version = "0.6.0", features = ["defmt-03"] } embedded-io-async = { version = "0.6.1", features = ["defmt-03"] } embassy-net-esp-hosted = { version = "0.1.0", path = "../../embassy-net-esp-hosted", features = ["defmt"] } diff --git a/examples/nrf5340/Cargo.toml b/examples/nrf5340/Cargo.toml index 24aa560d5..1d994d925 100644 --- a/examples/nrf5340/Cargo.toml +++ b/examples/nrf5340/Cargo.toml @@ -11,7 +11,7 @@ embassy-executor = { version = "0.5.0", path = "../../embassy-executor", feature embassy-time = { version = "0.3.0", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime"] } embassy-nrf = { version = "0.1.0", path = "../../embassy-nrf", features = ["defmt", "nrf5340-app-s", "time-driver-rtc1", "gpiote", "unstable-pac"] } embassy-net = { version = "0.4.0", path = "../../embassy-net", features = ["defmt", "tcp", "dhcpv4", "medium-ethernet"] } -embassy-usb = { version = "0.1.0", path = "../../embassy-usb", features = ["defmt"] } +embassy-usb = { version = "0.2.0", path = "../../embassy-usb", features = ["defmt"] } embedded-io-async = { version = "0.6.1" } defmt = "0.3" diff --git a/examples/rp/Cargo.toml b/examples/rp/Cargo.toml index 0f58f143c..d5263deb8 100644 --- a/examples/rp/Cargo.toml +++ b/examples/rp/Cargo.toml @@ -11,7 +11,7 @@ embassy-sync = { version = "0.5.0", path = "../../embassy-sync", features = ["de embassy-executor = { version = "0.5.0", path = "../../embassy-executor", features = ["task-arena-size-32768", "arch-cortex-m", "executor-thread", "executor-interrupt", "defmt", "integrated-timers"] } embassy-time = { version = "0.3.0", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime"] } embassy-rp = { version = "0.1.0", path = "../../embassy-rp", features = ["defmt", "unstable-pac", "time-driver", "critical-section-impl"] } -embassy-usb = { version = "0.1.0", path = "../../embassy-usb", features = ["defmt"] } +embassy-usb = { version = "0.2.0", path = "../../embassy-usb", features = ["defmt"] } embassy-net = { version = "0.4.0", path = "../../embassy-net", features = ["defmt", "tcp", "udp", "raw", "dhcpv4", "medium-ethernet"] } embassy-net-wiznet = { version = "0.1.0", path = "../../embassy-net-wiznet", features = ["defmt"] } embassy-futures = { version = "0.1.0", path = "../../embassy-futures" } diff --git a/examples/stm32f1/Cargo.toml b/examples/stm32f1/Cargo.toml index 4f282f326..712ce246d 100644 --- a/examples/stm32f1/Cargo.toml +++ b/examples/stm32f1/Cargo.toml @@ -10,7 +10,7 @@ embassy-stm32 = { version = "0.1.0", path = "../../embassy-stm32", features = [ embassy-sync = { version = "0.5.0", path = "../../embassy-sync", features = ["defmt"] } embassy-executor = { version = "0.5.0", path = "../../embassy-executor", features = ["arch-cortex-m", "executor-thread", "defmt", "integrated-timers"] } embassy-time = { version = "0.3.0", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime", "tick-hz-32_768"] } -embassy-usb = { version = "0.1.0", path = "../../embassy-usb", features = ["defmt"] } +embassy-usb = { version = "0.2.0", path = "../../embassy-usb", features = ["defmt"] } embassy-futures = { version = "0.1.0", path = "../../embassy-futures" } defmt = "0.3" diff --git a/examples/stm32f3/Cargo.toml b/examples/stm32f3/Cargo.toml index 64bb2e560..5b457a5ae 100644 --- a/examples/stm32f3/Cargo.toml +++ b/examples/stm32f3/Cargo.toml @@ -10,7 +10,7 @@ embassy-stm32 = { version = "0.1.0", path = "../../embassy-stm32", features = [ embassy-sync = { version = "0.5.0", path = "../../embassy-sync", features = ["defmt"] } embassy-executor = { version = "0.5.0", path = "../../embassy-executor", features = ["arch-cortex-m", "executor-thread", "executor-interrupt", "defmt", "integrated-timers"] } embassy-time = { version = "0.3.0", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime", "tick-hz-32_768"] } -embassy-usb = { version = "0.1.0", path = "../../embassy-usb", features = ["defmt"] } +embassy-usb = { version = "0.2.0", path = "../../embassy-usb", features = ["defmt"] } embassy-futures = { version = "0.1.0", path = "../../embassy-futures" } defmt = "0.3" diff --git a/examples/stm32f334/Cargo.toml b/examples/stm32f334/Cargo.toml index 3e5a7cc8c..b8b06afa2 100644 --- a/examples/stm32f334/Cargo.toml +++ b/examples/stm32f334/Cargo.toml @@ -9,7 +9,7 @@ embassy-sync = { version = "0.5.0", path = "../../embassy-sync", features = ["de embassy-executor = { version = "0.5.0", path = "../../embassy-executor", features = ["arch-cortex-m", "executor-thread", "executor-interrupt", "defmt", "integrated-timers"] } embassy-time = { version = "0.3.0", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime", "tick-hz-32_768"] } embassy-stm32 = { version = "0.1.0", path = "../../embassy-stm32", features = [ "defmt", "stm32f334r8", "unstable-pac", "memory-x", "time-driver-any", "exti"] } -embassy-usb = { version = "0.1.0", path = "../../embassy-usb", features = ["defmt"] } +embassy-usb = { version = "0.2.0", path = "../../embassy-usb", features = ["defmt"] } embassy-futures = { version = "0.1.0", path = "../../embassy-futures" } defmt = "0.3" diff --git a/examples/stm32f4/Cargo.toml b/examples/stm32f4/Cargo.toml index 512158bef..e6a9141e7 100644 --- a/examples/stm32f4/Cargo.toml +++ b/examples/stm32f4/Cargo.toml @@ -10,7 +10,7 @@ embassy-stm32 = { version = "0.1.0", path = "../../embassy-stm32", features = [" embassy-sync = { version = "0.5.0", path = "../../embassy-sync", features = ["defmt"] } embassy-executor = { version = "0.5.0", path = "../../embassy-executor", features = ["task-arena-size-32768", "arch-cortex-m", "executor-thread", "executor-interrupt", "defmt", "integrated-timers"] } embassy-time = { version = "0.3.0", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime", "tick-hz-32_768"] } -embassy-usb = { version = "0.1.0", path = "../../embassy-usb", features = ["defmt" ] } +embassy-usb = { version = "0.2.0", path = "../../embassy-usb", features = ["defmt" ] } embassy-net = { version = "0.4.0", path = "../../embassy-net", features = ["defmt", "tcp", "dhcpv4", "medium-ethernet", ] } defmt = "0.3" diff --git a/examples/stm32f7/Cargo.toml b/examples/stm32f7/Cargo.toml index 305816a2b..0a217e9ad 100644 --- a/examples/stm32f7/Cargo.toml +++ b/examples/stm32f7/Cargo.toml @@ -12,7 +12,7 @@ embassy-executor = { version = "0.5.0", path = "../../embassy-executor", feature embassy-time = { version = "0.3.0", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime", "tick-hz-32_768"] } embassy-net = { version = "0.4.0", path = "../../embassy-net", features = ["defmt", "tcp", "dhcpv4", "medium-ethernet"] } embedded-io-async = { version = "0.6.1" } -embassy-usb = { version = "0.1.0", path = "../../embassy-usb", features = ["defmt"] } +embassy-usb = { version = "0.2.0", path = "../../embassy-usb", features = ["defmt"] } defmt = "0.3" defmt-rtt = "0.4" diff --git a/examples/stm32g0/Cargo.toml b/examples/stm32g0/Cargo.toml index 6ce3418e5..ccc5143aa 100644 --- a/examples/stm32g0/Cargo.toml +++ b/examples/stm32g0/Cargo.toml @@ -10,7 +10,7 @@ embassy-stm32 = { version = "0.1.0", path = "../../embassy-stm32", features = [ embassy-sync = { version = "0.5.0", path = "../../embassy-sync", features = ["defmt"] } embassy-executor = { version = "0.5.0", path = "../../embassy-executor", features = ["arch-cortex-m", "executor-thread", "defmt", "integrated-timers"] } embassy-time = { version = "0.3.0", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime", "tick-hz-32_768"] } -embassy-usb = { version = "0.1.0", path = "../../embassy-usb", default-features = false, features = ["defmt"] } +embassy-usb = { version = "0.2.0", path = "../../embassy-usb", default-features = false, features = ["defmt"] } embassy-futures = { version = "0.1.0", path = "../../embassy-futures" } defmt = "0.3" diff --git a/examples/stm32g4/Cargo.toml b/examples/stm32g4/Cargo.toml index 64c749b9b..2d702aeb5 100644 --- a/examples/stm32g4/Cargo.toml +++ b/examples/stm32g4/Cargo.toml @@ -10,7 +10,7 @@ embassy-stm32 = { version = "0.1.0", path = "../../embassy-stm32", features = [ embassy-sync = { version = "0.5.0", path = "../../embassy-sync", features = ["defmt"] } embassy-executor = { version = "0.5.0", path = "../../embassy-executor", features = ["arch-cortex-m", "executor-thread", "defmt", "integrated-timers"] } embassy-time = { version = "0.3.0", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime", "tick-hz-32_768"] } -embassy-usb = { version = "0.1.0", path = "../../embassy-usb", features = ["defmt"] } +embassy-usb = { version = "0.2.0", path = "../../embassy-usb", features = ["defmt"] } embassy-futures = { version = "0.1.0", path = "../../embassy-futures" } usbd-hid = "0.7.0" diff --git a/examples/stm32h5/Cargo.toml b/examples/stm32h5/Cargo.toml index c9f08d24e..ea5cca80f 100644 --- a/examples/stm32h5/Cargo.toml +++ b/examples/stm32h5/Cargo.toml @@ -11,7 +11,7 @@ embassy-sync = { version = "0.5.0", path = "../../embassy-sync", features = ["de embassy-executor = { version = "0.5.0", path = "../../embassy-executor", features = ["task-arena-size-32768", "arch-cortex-m", "executor-thread", "defmt", "integrated-timers"] } embassy-time = { version = "0.3.0", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime", "tick-hz-32_768"] } embassy-net = { version = "0.4.0", path = "../../embassy-net", features = ["defmt", "tcp", "dhcpv4", "medium-ethernet", "proto-ipv6"] } -embassy-usb = { version = "0.1.0", path = "../../embassy-usb", features = ["defmt"] } +embassy-usb = { version = "0.2.0", path = "../../embassy-usb", features = ["defmt"] } defmt = "0.3" defmt-rtt = "0.4" diff --git a/examples/stm32h7/Cargo.toml b/examples/stm32h7/Cargo.toml index 84a89b378..05c284fc0 100644 --- a/examples/stm32h7/Cargo.toml +++ b/examples/stm32h7/Cargo.toml @@ -11,7 +11,7 @@ embassy-sync = { version = "0.5.0", path = "../../embassy-sync", features = ["de embassy-executor = { version = "0.5.0", path = "../../embassy-executor", features = ["task-arena-size-32768", "arch-cortex-m", "executor-thread", "executor-interrupt", "defmt", "integrated-timers"] } embassy-time = { version = "0.3.0", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime", "tick-hz-32_768"] } embassy-net = { version = "0.4.0", path = "../../embassy-net", features = ["defmt", "tcp", "dhcpv4", "medium-ethernet", "proto-ipv6", "dns"] } -embassy-usb = { version = "0.1.0", path = "../../embassy-usb", features = ["defmt"] } +embassy-usb = { version = "0.2.0", path = "../../embassy-usb", features = ["defmt"] } defmt = "0.3" defmt-rtt = "0.4" diff --git a/examples/stm32l1/Cargo.toml b/examples/stm32l1/Cargo.toml index 322c41262..5ec1ee5db 100644 --- a/examples/stm32l1/Cargo.toml +++ b/examples/stm32l1/Cargo.toml @@ -9,7 +9,7 @@ embassy-sync = { version = "0.5.0", path = "../../embassy-sync", features = ["de embassy-executor = { version = "0.5.0", path = "../../embassy-executor", features = ["arch-cortex-m", "executor-thread", "defmt", "integrated-timers"] } embassy-time = { version = "0.3.0", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime", "tick-hz-32_768"] } embassy-stm32 = { version = "0.1.0", path = "../../embassy-stm32", features = [ "defmt", "stm32l151cb-a", "time-driver-any", "memory-x"] } -embassy-usb = { version = "0.1.0", path = "../../embassy-usb", features = ["defmt"] } +embassy-usb = { version = "0.2.0", path = "../../embassy-usb", features = ["defmt"] } defmt = "0.3" defmt-rtt = "0.4" diff --git a/examples/stm32l4/Cargo.toml b/examples/stm32l4/Cargo.toml index d42e69578..dd7292f7f 100644 --- a/examples/stm32l4/Cargo.toml +++ b/examples/stm32l4/Cargo.toml @@ -11,7 +11,7 @@ embassy-sync = { version = "0.5.0", path = "../../embassy-sync", features = ["de embassy-executor = { version = "0.5.0", path = "../../embassy-executor", features = ["task-arena-size-32768", "arch-cortex-m", "executor-thread", "defmt", "integrated-timers"] } embassy-time = { version = "0.3.0", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime", "tick-hz-32_768", ] } embassy-embedded-hal = { version = "0.1.0", path = "../../embassy-embedded-hal" } -embassy-usb = { version = "0.1.0", path = "../../embassy-usb", features = ["defmt"] } +embassy-usb = { version = "0.2.0", path = "../../embassy-usb", features = ["defmt"] } embassy-net-adin1110 = { version = "0.2.0", path = "../../embassy-net-adin1110" } embassy-net = { version = "0.4.0", path = "../../embassy-net", features = ["defmt", "udp", "tcp", "dhcpv4", "medium-ethernet"] } embassy-futures = { version = "0.1.0", path = "../../embassy-futures" } diff --git a/examples/stm32l5/Cargo.toml b/examples/stm32l5/Cargo.toml index 5bcee178f..9f3b28cbe 100644 --- a/examples/stm32l5/Cargo.toml +++ b/examples/stm32l5/Cargo.toml @@ -10,7 +10,7 @@ embassy-stm32 = { version = "0.1.0", path = "../../embassy-stm32", features = [ embassy-sync = { version = "0.5.0", path = "../../embassy-sync", features = ["defmt"] } embassy-executor = { version = "0.5.0", path = "../../embassy-executor", features = ["task-arena-size-32768", "arch-cortex-m", "executor-thread", "defmt", "integrated-timers"] } embassy-time = { version = "0.3.0", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime", "tick-hz-32_768"] } -embassy-usb = { version = "0.1.0", path = "../../embassy-usb", features = ["defmt"] } +embassy-usb = { version = "0.2.0", path = "../../embassy-usb", features = ["defmt"] } embassy-net = { version = "0.4.0", path = "../../embassy-net", features = ["defmt", "tcp", "dhcpv4", "medium-ethernet"] } embassy-futures = { version = "0.1.0", path = "../../embassy-futures" } usbd-hid = "0.7.0" diff --git a/examples/stm32u0/Cargo.toml b/examples/stm32u0/Cargo.toml index 5868372dd..6e16eb478 100644 --- a/examples/stm32u0/Cargo.toml +++ b/examples/stm32u0/Cargo.toml @@ -10,7 +10,7 @@ embassy-stm32 = { version = "0.1.0", path = "../../embassy-stm32", features = [ embassy-sync = { version = "0.5.0", path = "../../embassy-sync", features = ["defmt"] } embassy-executor = { version = "0.5.0", path = "../../embassy-executor", features = ["arch-cortex-m", "executor-thread", "defmt", "integrated-timers"] } embassy-time = { version = "0.3.0", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime", "tick-hz-32_768"] } -embassy-usb = { version = "0.1.0", path = "../../embassy-usb", default-features = false, features = ["defmt"] } +embassy-usb = { version = "0.2.0", path = "../../embassy-usb", default-features = false, features = ["defmt"] } defmt = "0.3" defmt-rtt = "0.4" diff --git a/examples/stm32u5/Cargo.toml b/examples/stm32u5/Cargo.toml index 01320b88d..3cbce74a7 100644 --- a/examples/stm32u5/Cargo.toml +++ b/examples/stm32u5/Cargo.toml @@ -10,7 +10,7 @@ embassy-stm32 = { version = "0.1.0", path = "../../embassy-stm32", features = [" embassy-sync = { version = "0.5.0", path = "../../embassy-sync", features = ["defmt"] } embassy-executor = { version = "0.5.0", path = "../../embassy-executor", features = ["task-arena-size-32768", "arch-cortex-m", "executor-thread", "defmt", "integrated-timers"] } embassy-time = { version = "0.3.0", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime", "tick-hz-32_768"] } -embassy-usb = { version = "0.1.0", path = "../../embassy-usb", features = ["defmt"] } +embassy-usb = { version = "0.2.0", path = "../../embassy-usb", features = ["defmt"] } defmt = "0.3" defmt-rtt = "0.4" From 02bb85a791bc2c27cdfbf9db5492c8d65b591608 Mon Sep 17 00:00:00 2001 From: Michael de Silva Date: Wed, 24 Apr 2024 01:59:00 +0530 Subject: [PATCH 204/581] Add trace logging for USART --- embassy-stm32/src/usart/mod.rs | 32 ++++++++++++++++++++++++++------ 1 file changed, 26 insertions(+), 6 deletions(-) diff --git a/embassy-stm32/src/usart/mod.rs b/embassy-stm32/src/usart/mod.rs index d21e5c47c..6d6e678c8 100644 --- a/embassy-stm32/src/usart/mod.rs +++ b/embassy-stm32/src/usart/mod.rs @@ -1270,8 +1270,14 @@ fn configure( let (mul, brr_min, brr_max) = match kind { #[cfg(any(usart_v3, usart_v4))] - Kind::Lpuart => (256, 0x300, 0x10_0000), - Kind::Uart => (1, 0x10, 0x1_0000), + Kind::Lpuart => { + trace!("USART: Kind::Lpuart"); + (256, 0x300, 0x10_0000) + } + Kind::Uart => { + trace!("USART: Kind::Uart"); + (1, 0x10, 0x1_0000) + } }; fn calculate_brr(baud: u32, pclk: u32, presc: u32, mul: u32) -> u32 { @@ -1374,21 +1380,35 @@ fn configure( // configure word size // if using odd or even parity it must be configured to 9bits w.set_m0(if config.parity != Parity::ParityNone { + trace!("USART: m0: vals::M0::BIT9"); vals::M0::BIT9 } else { + trace!("USART: m0: vals::M0::BIT8"); vals::M0::BIT8 }); // configure parity w.set_pce(config.parity != Parity::ParityNone); w.set_ps(match config.parity { - Parity::ParityOdd => vals::Ps::ODD, - Parity::ParityEven => vals::Ps::EVEN, - _ => vals::Ps::EVEN, + Parity::ParityOdd => { + trace!("USART: set_ps: vals::Ps::ODD"); + vals::Ps::ODD + } + Parity::ParityEven => { + trace!("USART: set_ps: vals::Ps::EVEN"); + vals::Ps::EVEN + } + _ => { + trace!("USART: set_ps: vals::Ps::EVEN"); + vals::Ps::EVEN + } }); #[cfg(not(usart_v1))] w.set_over8(vals::Over8::from_bits(over8 as _)); #[cfg(usart_v4)] - w.set_fifoen(true); + { + trace!("USART: set_fifoen: true (usart_v4)"); + w.set_fifoen(true); + } }); Ok(()) From 5002ff00def54494316f96dfc927f898dcba348b Mon Sep 17 00:00:00 2001 From: Haobo Gu Date: Thu, 25 Apr 2024 23:50:51 +0800 Subject: [PATCH 205/581] doc: add RMK to embassy in the wild Signed-off-by: Haobo Gu --- docs/modules/ROOT/pages/embassy_in_the_wild.adoc | 3 +++ 1 file changed, 3 insertions(+) diff --git a/docs/modules/ROOT/pages/embassy_in_the_wild.adoc b/docs/modules/ROOT/pages/embassy_in_the_wild.adoc index 4b650449f..a7d63f990 100644 --- a/docs/modules/ROOT/pages/embassy_in_the_wild.adoc +++ b/docs/modules/ROOT/pages/embassy_in_the_wild.adoc @@ -2,6 +2,9 @@ Here are known examples of real-world projects which make use of Embassy. Feel free to link:https://github.com/embassy-rs/embassy/blob/main/docs/modules/ROOT/pages/embassy_in_the_wild.adoc[add more]! +* link:https://github.com/haobogu/rmk/[RMK: A feature-rich Rust keyboard firmware] +** RMK has built-in layer support, wireless(BLE) support, real-time key editing support using vial, and more! +** Targets STM32, RP2040, nRF52 and ESP32 MCUs * link:https://github.com/cbruiz/printhor/[Printhor: The highly reliable but not necessarily functional 3D printer firmware] ** Targets some STM32 MCUs * link:https://github.com/card-io-ecg/card-io-fw[Card/IO firmware] - firmware for an open source ECG device From 91c42e0b9e118d88a51fecf07dc3f41b61c0762c Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?D=C3=A1niel=20Buga?= Date: Fri, 26 Apr 2024 17:35:28 +0200 Subject: [PATCH 206/581] Extract synopsys otg driver --- embassy-stm32/Cargo.toml | 1 + embassy-stm32/src/usb/otg.rs | 1316 +------ embassy-usb-synopsys-otg/Cargo.toml | 13 + embassy-usb-synopsys-otg/README.md | 1 + embassy-usb-synopsys-otg/src/fmt.rs | 257 ++ embassy-usb-synopsys-otg/src/lib.rs | 1300 +++++++ embassy-usb-synopsys-otg/src/otg_v1.rs | 4482 ++++++++++++++++++++++++ 7 files changed, 6164 insertions(+), 1206 deletions(-) create mode 100644 embassy-usb-synopsys-otg/Cargo.toml create mode 100644 embassy-usb-synopsys-otg/README.md create mode 100644 embassy-usb-synopsys-otg/src/fmt.rs create mode 100644 embassy-usb-synopsys-otg/src/lib.rs create mode 100644 embassy-usb-synopsys-otg/src/otg_v1.rs diff --git a/embassy-stm32/Cargo.toml b/embassy-stm32/Cargo.toml index 095427171..da8978599 100644 --- a/embassy-stm32/Cargo.toml +++ b/embassy-stm32/Cargo.toml @@ -50,6 +50,7 @@ embassy-hal-internal = {version = "0.1.0", path = "../embassy-hal-internal", fea embassy-embedded-hal = {version = "0.1.0", path = "../embassy-embedded-hal" } embassy-net-driver = { version = "0.2.0", path = "../embassy-net-driver" } embassy-usb-driver = {version = "0.1.0", path = "../embassy-usb-driver" } +embassy-usb-synopsys-otg = {version = "0.1.0", path = "../embassy-usb-synopsys-otg" } embassy-executor = { version = "0.5.0", path = "../embassy-executor", optional = true } embedded-hal-02 = { package = "embedded-hal", version = "0.2.6", features = ["unproven"] } diff --git a/embassy-stm32/src/usb/otg.rs b/embassy-stm32/src/usb/otg.rs index 29572d3c6..c59aae87f 100644 --- a/embassy-stm32/src/usb/otg.rs +++ b/embassy-stm32/src/usb/otg.rs @@ -1,22 +1,19 @@ -use core::cell::UnsafeCell; use core::marker::PhantomData; -use core::sync::atomic::{AtomicBool, AtomicU16, Ordering}; -use core::task::Poll; use embassy_hal_internal::{into_ref, Peripheral}; -use embassy_sync::waitqueue::AtomicWaker; -use embassy_usb_driver::{ - Bus as _, Direction, EndpointAddress, EndpointAllocError, EndpointError, EndpointIn, EndpointInfo, EndpointOut, - EndpointType, Event, Unsupported, +use embassy_usb_driver::{EndpointAddress, EndpointAllocError, EndpointType, Event, Unsupported}; +use embassy_usb_synopsys_otg::otg_v1::vals::Dspd; +use embassy_usb_synopsys_otg::otg_v1::Otg; +pub use embassy_usb_synopsys_otg::Config; +use embassy_usb_synopsys_otg::{ + on_interrupt as on_interrupt_impl, Bus as OtgBus, ControlPipe, Driver as OtgDriver, Endpoint, In, OtgInstance, Out, + PhyType, State, MAX_EP_COUNT, }; -use futures::future::poll_fn; use crate::gpio::AFType; use crate::interrupt; use crate::interrupt::typelevel::Interrupt; -use crate::pac::otg::{regs, vals}; use crate::rcc::{RccPeripheral, SealedRccPeripheral}; -use crate::time::Hertz; /// Interrupt handler. pub struct InterruptHandler { @@ -29,142 +26,9 @@ impl interrupt::typelevel::Handler for InterruptHandl let r = T::regs(); let state = T::state(); - let ints = r.gintsts().read(); - if ints.wkupint() || ints.usbsusp() || ints.usbrst() || ints.enumdne() || ints.otgint() || ints.srqint() { - // Mask interrupts and notify `Bus` to process them - r.gintmsk().write(|_| {}); - T::state().bus_waker.wake(); - } + let setup_late_cnak = quirk_setup_late_cnak(r); - // Handle RX - while r.gintsts().read().rxflvl() { - let status = r.grxstsp().read(); - trace!("=== status {:08x}", status.0); - let ep_num = status.epnum() as usize; - let len = status.bcnt() as usize; - - assert!(ep_num < T::ENDPOINT_COUNT); - - match status.pktstsd() { - vals::Pktstsd::SETUP_DATA_RX => { - trace!("SETUP_DATA_RX"); - assert!(len == 8, "invalid SETUP packet length={}", len); - assert!(ep_num == 0, "invalid SETUP packet endpoint={}", ep_num); - - // flushing TX if something stuck in control endpoint - if r.dieptsiz(ep_num).read().pktcnt() != 0 { - r.grstctl().modify(|w| { - w.set_txfnum(ep_num as _); - w.set_txfflsh(true); - }); - while r.grstctl().read().txfflsh() {} - } - - if state.ep0_setup_ready.load(Ordering::Relaxed) == false { - // SAFETY: exclusive access ensured by atomic bool - let data = unsafe { &mut *state.ep0_setup_data.get() }; - data[0..4].copy_from_slice(&r.fifo(0).read().0.to_ne_bytes()); - data[4..8].copy_from_slice(&r.fifo(0).read().0.to_ne_bytes()); - state.ep0_setup_ready.store(true, Ordering::Release); - state.ep_out_wakers[0].wake(); - } else { - error!("received SETUP before previous finished processing"); - // discard FIFO - r.fifo(0).read(); - r.fifo(0).read(); - } - } - vals::Pktstsd::OUT_DATA_RX => { - trace!("OUT_DATA_RX ep={} len={}", ep_num, len); - - if state.ep_out_size[ep_num].load(Ordering::Acquire) == EP_OUT_BUFFER_EMPTY { - // SAFETY: Buffer size is allocated to be equal to endpoint's maximum packet size - // We trust the peripheral to not exceed its configured MPSIZ - let buf = unsafe { core::slice::from_raw_parts_mut(*state.ep_out_buffers[ep_num].get(), len) }; - - for chunk in buf.chunks_mut(4) { - // RX FIFO is shared so always read from fifo(0) - let data = r.fifo(0).read().0; - chunk.copy_from_slice(&data.to_ne_bytes()[0..chunk.len()]); - } - - state.ep_out_size[ep_num].store(len as u16, Ordering::Release); - state.ep_out_wakers[ep_num].wake(); - } else { - error!("ep_out buffer overflow index={}", ep_num); - - // discard FIFO data - let len_words = (len + 3) / 4; - for _ in 0..len_words { - r.fifo(0).read().data(); - } - } - } - vals::Pktstsd::OUT_DATA_DONE => { - trace!("OUT_DATA_DONE ep={}", ep_num); - } - vals::Pktstsd::SETUP_DATA_DONE => { - trace!("SETUP_DATA_DONE ep={}", ep_num); - - if quirk_setup_late_cnak(r) { - // Clear NAK to indicate we are ready to receive more data - r.doepctl(ep_num).modify(|w| w.set_cnak(true)); - } - } - x => trace!("unknown PKTSTS: {}", x.to_bits()), - } - } - - // IN endpoint interrupt - if ints.iepint() { - let mut ep_mask = r.daint().read().iepint(); - let mut ep_num = 0; - - // Iterate over endpoints while there are non-zero bits in the mask - while ep_mask != 0 { - if ep_mask & 1 != 0 { - let ep_ints = r.diepint(ep_num).read(); - - // clear all - r.diepint(ep_num).write_value(ep_ints); - - // TXFE is cleared in DIEPEMPMSK - if ep_ints.txfe() { - critical_section::with(|_| { - r.diepempmsk().modify(|w| { - w.set_ineptxfem(w.ineptxfem() & !(1 << ep_num)); - }); - }); - } - - state.ep_in_wakers[ep_num].wake(); - trace!("in ep={} irq val={:08x}", ep_num, ep_ints.0); - } - - ep_mask >>= 1; - ep_num += 1; - } - } - - // not needed? reception handled in rxflvl - // OUT endpoint interrupt - // if ints.oepint() { - // let mut ep_mask = r.daint().read().oepint(); - // let mut ep_num = 0; - - // while ep_mask != 0 { - // if ep_mask & 1 != 0 { - // let ep_ints = r.doepint(ep_num).read(); - // // clear all - // r.doepint(ep_num).write_value(ep_ints); - // state.ep_out_wakers[ep_num].wake(); - // trace!("out ep={} irq val={:08x}", ep_num, ep_ints.0); - // } - - // ep_mask >>= 1; - // ep_num += 1; - // } - // } + on_interrupt_impl(r, state, T::ENDPOINT_COUNT, setup_late_cnak); } } @@ -187,129 +51,10 @@ macro_rules! config_ulpi_pins { // The following numbers are pessimistic and were figured out empirically. const RX_FIFO_EXTRA_SIZE_WORDS: u16 = 30; -/// USB PHY type -#[derive(Copy, Clone, Debug, Eq, PartialEq)] -pub enum PhyType { - /// Internal Full-Speed PHY - /// - /// Available on most High-Speed peripherals. - InternalFullSpeed, - /// Internal High-Speed PHY - /// - /// Available on a few STM32 chips. - InternalHighSpeed, - /// External ULPI High-Speed PHY - ExternalHighSpeed, -} - -impl PhyType { - /// Get whether this PHY is any of the internal types. - pub fn internal(&self) -> bool { - match self { - PhyType::InternalFullSpeed | PhyType::InternalHighSpeed => true, - PhyType::ExternalHighSpeed => false, - } - } - - /// Get whether this PHY is any of the high-speed types. - pub fn high_speed(&self) -> bool { - match self { - PhyType::InternalFullSpeed => false, - PhyType::ExternalHighSpeed | PhyType::InternalHighSpeed => true, - } - } - - fn to_dspd(&self) -> vals::Dspd { - match self { - PhyType::InternalFullSpeed => vals::Dspd::FULL_SPEED_INTERNAL, - PhyType::InternalHighSpeed => vals::Dspd::HIGH_SPEED, - PhyType::ExternalHighSpeed => vals::Dspd::HIGH_SPEED, - } - } -} - -/// Indicates that [State::ep_out_buffers] is empty. -const EP_OUT_BUFFER_EMPTY: u16 = u16::MAX; - -/// USB OTG driver state. -pub struct State { - /// Holds received SETUP packets. Available if [State::ep0_setup_ready] is true. - ep0_setup_data: UnsafeCell<[u8; 8]>, - ep0_setup_ready: AtomicBool, - ep_in_wakers: [AtomicWaker; EP_COUNT], - ep_out_wakers: [AtomicWaker; EP_COUNT], - /// RX FIFO is shared so extra buffers are needed to dequeue all data without waiting on each endpoint. - /// Buffers are ready when associated [State::ep_out_size] != [EP_OUT_BUFFER_EMPTY]. - ep_out_buffers: [UnsafeCell<*mut u8>; EP_COUNT], - ep_out_size: [AtomicU16; EP_COUNT], - bus_waker: AtomicWaker, -} - -unsafe impl Send for State {} -unsafe impl Sync for State {} - -impl State { - /// Create a new State. - pub const fn new() -> Self { - const NEW_AW: AtomicWaker = AtomicWaker::new(); - const NEW_BUF: UnsafeCell<*mut u8> = UnsafeCell::new(0 as _); - const NEW_SIZE: AtomicU16 = AtomicU16::new(EP_OUT_BUFFER_EMPTY); - - Self { - ep0_setup_data: UnsafeCell::new([0u8; 8]), - ep0_setup_ready: AtomicBool::new(false), - ep_in_wakers: [NEW_AW; EP_COUNT], - ep_out_wakers: [NEW_AW; EP_COUNT], - ep_out_buffers: [NEW_BUF; EP_COUNT], - ep_out_size: [NEW_SIZE; EP_COUNT], - bus_waker: NEW_AW, - } - } -} - -#[derive(Debug, Clone, Copy)] -struct EndpointData { - ep_type: EndpointType, - max_packet_size: u16, - fifo_size_words: u16, -} - -/// USB driver config. -#[non_exhaustive] -#[derive(Clone, Copy, PartialEq, Eq, Debug)] -pub struct Config { - /// Enable VBUS detection. - /// - /// The USB spec requires USB devices monitor for USB cable plug/unplug and react accordingly. - /// This is done by checking whether there is 5V on the VBUS pin or not. - /// - /// If your device is bus-powered (powers itself from the USB host via VBUS), then this is optional. - /// (If there's no power in VBUS your device would be off anyway, so it's fine to always assume - /// there's power in VBUS, i.e. the USB cable is always plugged in.) - /// - /// If your device is self-powered (i.e. it gets power from a source other than the USB cable, and - /// therefore can stay powered through USB cable plug/unplug) then you MUST set this to true. - /// - /// If you set this to true, you must connect VBUS to PA9 for FS, PB13 for HS, possibly with a - /// voltage divider. See ST application note AN4879 and the reference manual for more details. - pub vbus_detection: bool, -} - -impl Default for Config { - fn default() -> Self { - Self { vbus_detection: true } - } -} - /// USB driver. pub struct Driver<'d, T: Instance> { - config: Config, phantom: PhantomData<&'d mut T>, - ep_in: [Option; MAX_EP_COUNT], - ep_out: [Option; MAX_EP_COUNT], - ep_out_buffer: &'d mut [u8], - ep_out_buffer_offset: usize, - phy_type: PhyType, + inner: OtgDriver<'d>, } impl<'d, T: Instance> Driver<'d, T> { @@ -333,14 +78,22 @@ impl<'d, T: Instance> Driver<'d, T> { dp.set_as_af(dp.af_num(), AFType::OutputPushPull); dm.set_as_af(dm.af_num(), AFType::OutputPushPull); - Self { - config, - phantom: PhantomData, - ep_in: [None; MAX_EP_COUNT], - ep_out: [None; MAX_EP_COUNT], - ep_out_buffer, - ep_out_buffer_offset: 0, + let regs = T::regs(); + + let instance = OtgInstance { + regs, + state: T::state(), + fifo_depth_words: T::FIFO_DEPTH_WORDS, + extra_rx_fifo_words: RX_FIFO_EXTRA_SIZE_WORDS, + endpoint_count: T::ENDPOINT_COUNT, phy_type: PhyType::InternalFullSpeed, + quirk_setup_late_cnak: quirk_setup_late_cnak(regs), + calculate_trdt_fn: calculate_trdt::, + }; + + Self { + inner: OtgDriver::new(ep_out_buffer, instance, config), + phantom: PhantomData, } } @@ -376,111 +129,30 @@ impl<'d, T: Instance> Driver<'d, T> { ulpi_d7 ); - Self { - config, - phantom: PhantomData, - ep_in: [None; MAX_EP_COUNT], - ep_out: [None; MAX_EP_COUNT], - ep_out_buffer, - ep_out_buffer_offset: 0, + let regs = T::regs(); + + let instance = OtgInstance { + regs: T::regs(), + state: T::state(), + fifo_depth_words: T::FIFO_DEPTH_WORDS, + extra_rx_fifo_words: RX_FIFO_EXTRA_SIZE_WORDS, + endpoint_count: T::ENDPOINT_COUNT, phy_type: PhyType::ExternalHighSpeed, + quirk_setup_late_cnak: quirk_setup_late_cnak(regs), + calculate_trdt_fn: calculate_trdt::, + }; + + Self { + inner: OtgDriver::new(ep_out_buffer, instance, config), + phantom: PhantomData, } } - - // Returns total amount of words (u32) allocated in dedicated FIFO - fn allocated_fifo_words(&self) -> u16 { - RX_FIFO_EXTRA_SIZE_WORDS + ep_fifo_size(&self.ep_out) + ep_fifo_size(&self.ep_in) - } - - fn alloc_endpoint( - &mut self, - ep_type: EndpointType, - max_packet_size: u16, - interval_ms: u8, - ) -> Result, EndpointAllocError> { - trace!( - "allocating type={:?} mps={:?} interval_ms={}, dir={:?}", - ep_type, - max_packet_size, - interval_ms, - D::dir() - ); - - if D::dir() == Direction::Out { - if self.ep_out_buffer_offset + max_packet_size as usize >= self.ep_out_buffer.len() { - error!("Not enough endpoint out buffer capacity"); - return Err(EndpointAllocError); - } - }; - - let fifo_size_words = match D::dir() { - Direction::Out => (max_packet_size + 3) / 4, - // INEPTXFD requires minimum size of 16 words - Direction::In => u16::max((max_packet_size + 3) / 4, 16), - }; - - if fifo_size_words + self.allocated_fifo_words() > T::FIFO_DEPTH_WORDS { - error!("Not enough FIFO capacity"); - return Err(EndpointAllocError); - } - - let eps = match D::dir() { - Direction::Out => &mut self.ep_out, - Direction::In => &mut self.ep_in, - }; - - // Find free endpoint slot - let slot = eps.iter_mut().enumerate().find(|(i, ep)| { - if *i == 0 && ep_type != EndpointType::Control { - // reserved for control pipe - false - } else { - ep.is_none() - } - }); - - let index = match slot { - Some((index, ep)) => { - *ep = Some(EndpointData { - ep_type, - max_packet_size, - fifo_size_words, - }); - index - } - None => { - error!("No free endpoints available"); - return Err(EndpointAllocError); - } - }; - - trace!(" index={}", index); - - if D::dir() == Direction::Out { - // Buffer capacity check was done above, now allocation cannot fail - unsafe { - *T::state().ep_out_buffers[index].get() = - self.ep_out_buffer.as_mut_ptr().offset(self.ep_out_buffer_offset as _); - } - self.ep_out_buffer_offset += max_packet_size as usize; - } - - Ok(Endpoint { - _phantom: PhantomData, - info: EndpointInfo { - addr: EndpointAddress::from_parts(index, D::dir()), - ep_type, - max_packet_size, - interval_ms, - }, - }) - } } impl<'d, T: Instance> embassy_usb_driver::Driver<'d> for Driver<'d, T> { - type EndpointOut = Endpoint<'d, T, Out>; - type EndpointIn = Endpoint<'d, T, In>; - type ControlPipe = ControlPipe<'d, T>; + type EndpointOut = Endpoint<'d, Out>; + type EndpointIn = Endpoint<'d, In>; + type ControlPipe = ControlPipe<'d>; type Bus = Bus<'d, T>; fn alloc_endpoint_in( @@ -489,7 +161,7 @@ impl<'d, T: Instance> embassy_usb_driver::Driver<'d> for Driver<'d, T> { max_packet_size: u16, interval_ms: u8, ) -> Result { - self.alloc_endpoint(ep_type, max_packet_size, interval_ms) + self.inner.alloc_endpoint(ep_type, max_packet_size, interval_ms) } fn alloc_endpoint_out( @@ -498,72 +170,37 @@ impl<'d, T: Instance> embassy_usb_driver::Driver<'d> for Driver<'d, T> { max_packet_size: u16, interval_ms: u8, ) -> Result { - self.alloc_endpoint(ep_type, max_packet_size, interval_ms) + self.inner.alloc_endpoint(ep_type, max_packet_size, interval_ms) } - fn start(mut self, control_max_packet_size: u16) -> (Self::Bus, Self::ControlPipe) { - let ep_out = self - .alloc_endpoint(EndpointType::Control, control_max_packet_size, 0) - .unwrap(); - let ep_in = self - .alloc_endpoint(EndpointType::Control, control_max_packet_size, 0) - .unwrap(); - assert_eq!(ep_out.info.addr.index(), 0); - assert_eq!(ep_in.info.addr.index(), 0); - - trace!("start"); + fn start(self, control_max_packet_size: u16) -> (Self::Bus, Self::ControlPipe) { + let (bus, cp) = self.inner.start(control_max_packet_size); ( Bus { - config: self.config, phantom: PhantomData, - ep_in: self.ep_in, - ep_out: self.ep_out, - phy_type: self.phy_type, + inner: bus, inited: false, }, - ControlPipe { - _phantom: PhantomData, - max_packet_size: control_max_packet_size, - ep_out, - ep_in, - }, + cp, ) } } /// USB bus. pub struct Bus<'d, T: Instance> { - config: Config, phantom: PhantomData<&'d mut T>, - ep_in: [Option; MAX_EP_COUNT], - ep_out: [Option; MAX_EP_COUNT], - phy_type: PhyType, + inner: OtgBus<'d>, inited: bool, } -impl<'d, T: Instance> Bus<'d, T> { - fn restore_irqs() { - T::regs().gintmsk().write(|w| { - w.set_usbrst(true); - w.set_enumdnem(true); - w.set_usbsuspm(true); - w.set_wuim(true); - w.set_iepint(true); - w.set_oepint(true); - w.set_rxflvlm(true); - w.set_srqim(true); - w.set_otgint(true); - }); - } -} - impl<'d, T: Instance> Bus<'d, T> { fn init(&mut self) { super::common_init::(); // Enable ULPI clock if external PHY is used - let _ulpien = !self.phy_type.internal(); + let phy_type = self.inner.phy_type(); + let _ulpien = !phy_type.internal(); #[cfg(any(stm32f2, stm32f4, stm32f7))] if T::HIGH_SPEED { @@ -594,200 +231,14 @@ impl<'d, T: Instance> Bus<'d, T> { while !r.grstctl().read().ahbidl() {} // Configure as device. - r.gusbcfg().write(|w| { - // Force device mode - w.set_fdmod(true); - // Enable internal full-speed PHY - w.set_physel(self.phy_type.internal() && !self.phy_type.high_speed()); - }); + self.inner.configure_as_device(); // Configuring Vbus sense and SOF output match core_id { - 0x0000_1200 | 0x0000_1100 => { - assert!(self.phy_type != PhyType::InternalHighSpeed); - - r.gccfg_v1().modify(|w| { - // Enable internal full-speed PHY, logic is inverted - w.set_pwrdwn(self.phy_type.internal()); - }); - - // F429-like chips have the GCCFG.NOVBUSSENS bit - r.gccfg_v1().modify(|w| { - w.set_novbussens(!self.config.vbus_detection); - w.set_vbusasen(false); - w.set_vbusbsen(self.config.vbus_detection); - w.set_sofouten(false); - }); - } - 0x0000_2000 | 0x0000_2100 | 0x0000_2300 | 0x0000_3000 | 0x0000_3100 => { - // F446-like chips have the GCCFG.VBDEN bit with the opposite meaning - r.gccfg_v2().modify(|w| { - // Enable internal full-speed PHY, logic is inverted - w.set_pwrdwn(self.phy_type.internal() && !self.phy_type.high_speed()); - w.set_phyhsen(self.phy_type.internal() && self.phy_type.high_speed()); - }); - - r.gccfg_v2().modify(|w| { - w.set_vbden(self.config.vbus_detection); - }); - - // Force B-peripheral session - r.gotgctl().modify(|w| { - w.set_bvaloen(!self.config.vbus_detection); - w.set_bvaloval(true); - }); - } + 0x0000_1200 | 0x0000_1100 => self.inner.config_v1(), + 0x0000_2000 | 0x0000_2100 | 0x0000_2300 | 0x0000_3000 | 0x0000_3100 => self.inner.config_v2v3(), _ => unimplemented!("Unknown USB core id {:X}", core_id), } - - // Soft disconnect. - r.dctl().write(|w| w.set_sdis(true)); - - // Set speed. - r.dcfg().write(|w| { - w.set_pfivl(vals::Pfivl::FRAME_INTERVAL_80); - w.set_dspd(self.phy_type.to_dspd()); - }); - - // Unmask transfer complete EP interrupt - r.diepmsk().write(|w| { - w.set_xfrcm(true); - }); - - // Unmask and clear core interrupts - Bus::::restore_irqs(); - r.gintsts().write_value(regs::Gintsts(0xFFFF_FFFF)); - - // Unmask global interrupt - r.gahbcfg().write(|w| { - w.set_gint(true); // unmask global interrupt - }); - - // Connect - r.dctl().write(|w| w.set_sdis(false)); - } - - fn init_fifo(&mut self) { - trace!("init_fifo"); - - let r = T::regs(); - - // ERRATA NOTE: Don't interrupt FIFOs being written to. The interrupt - // handler COULD interrupt us here and do FIFO operations, so ensure - // the interrupt does not occur. - critical_section::with(|_| { - // Configure RX fifo size. All endpoints share the same FIFO area. - let rx_fifo_size_words = RX_FIFO_EXTRA_SIZE_WORDS + ep_fifo_size(&self.ep_out); - trace!("configuring rx fifo size={}", rx_fifo_size_words); - - r.grxfsiz().modify(|w| w.set_rxfd(rx_fifo_size_words)); - - // Configure TX (USB in direction) fifo size for each endpoint - let mut fifo_top = rx_fifo_size_words; - for i in 0..T::ENDPOINT_COUNT { - if let Some(ep) = self.ep_in[i] { - trace!( - "configuring tx fifo ep={}, offset={}, size={}", - i, - fifo_top, - ep.fifo_size_words - ); - - let dieptxf = if i == 0 { r.dieptxf0() } else { r.dieptxf(i - 1) }; - - dieptxf.write(|w| { - w.set_fd(ep.fifo_size_words); - w.set_sa(fifo_top); - }); - - fifo_top += ep.fifo_size_words; - } - } - - assert!( - fifo_top <= T::FIFO_DEPTH_WORDS, - "FIFO allocations exceeded maximum capacity" - ); - - // Flush fifos - r.grstctl().write(|w| { - w.set_rxfflsh(true); - w.set_txfflsh(true); - w.set_txfnum(0x10); - }); - }); - - loop { - let x = r.grstctl().read(); - if !x.rxfflsh() && !x.txfflsh() { - break; - } - } - } - - fn configure_endpoints(&mut self) { - trace!("configure_endpoints"); - - let r = T::regs(); - - // Configure IN endpoints - for (index, ep) in self.ep_in.iter().enumerate() { - if let Some(ep) = ep { - critical_section::with(|_| { - r.diepctl(index).write(|w| { - if index == 0 { - w.set_mpsiz(ep0_mpsiz(ep.max_packet_size)); - } else { - w.set_mpsiz(ep.max_packet_size); - w.set_eptyp(to_eptyp(ep.ep_type)); - w.set_sd0pid_sevnfrm(true); - w.set_txfnum(index as _); - w.set_snak(true); - } - }); - }); - } - } - - // Configure OUT endpoints - for (index, ep) in self.ep_out.iter().enumerate() { - if let Some(ep) = ep { - critical_section::with(|_| { - r.doepctl(index).write(|w| { - if index == 0 { - w.set_mpsiz(ep0_mpsiz(ep.max_packet_size)); - } else { - w.set_mpsiz(ep.max_packet_size); - w.set_eptyp(to_eptyp(ep.ep_type)); - w.set_sd0pid_sevnfrm(true); - } - }); - - r.doeptsiz(index).modify(|w| { - w.set_xfrsiz(ep.max_packet_size as _); - if index == 0 { - w.set_rxdpid_stupcnt(1); - } else { - w.set_pktcnt(1); - } - }); - }); - } - } - - // Enable IRQs for allocated endpoints - r.daintmsk().modify(|w| { - w.set_iepm(ep_irq_mask(&self.ep_in)); - // OUT interrupts not used, handled in RXFLVL - // w.set_oepm(ep_irq_mask(&self.ep_out)); - }); - } - - fn disable_all_endpoints(&mut self) { - for i in 0..T::ENDPOINT_COUNT { - self.endpoint_set_enabled(EndpointAddress::from_parts(i, Direction::In), false); - self.endpoint_set_enabled(EndpointAddress::from_parts(i, Direction::Out), false); - } } fn disable(&mut self) { @@ -803,634 +254,52 @@ impl<'d, T: Instance> Bus<'d, T> { impl<'d, T: Instance> embassy_usb_driver::Bus for Bus<'d, T> { async fn poll(&mut self) -> Event { - poll_fn(move |cx| { - if !self.inited { - self.init(); - self.inited = true; + if !self.inited { + self.init(); + self.inited = true; + } - // If no vbus detection, just return a single PowerDetected event at startup. - if !self.config.vbus_detection { - return Poll::Ready(Event::PowerDetected); - } - } - - let r = T::regs(); - - T::state().bus_waker.register(cx.waker()); - - let ints = r.gintsts().read(); - - if ints.srqint() { - trace!("vbus detected"); - - r.gintsts().write(|w| w.set_srqint(true)); // clear - Self::restore_irqs(); - - if self.config.vbus_detection { - return Poll::Ready(Event::PowerDetected); - } - } - - if ints.otgint() { - let otgints = r.gotgint().read(); - r.gotgint().write_value(otgints); // clear all - Self::restore_irqs(); - - if otgints.sedet() { - trace!("vbus removed"); - if self.config.vbus_detection { - self.disable_all_endpoints(); - return Poll::Ready(Event::PowerRemoved); - } - } - } - - if ints.usbrst() { - trace!("reset"); - - self.init_fifo(); - self.configure_endpoints(); - - // Reset address - critical_section::with(|_| { - r.dcfg().modify(|w| { - w.set_dad(0); - }); - }); - - r.gintsts().write(|w| w.set_usbrst(true)); // clear - Self::restore_irqs(); - } - - if ints.enumdne() { - trace!("enumdne"); - - let speed = r.dsts().read().enumspd(); - let trdt = calculate_trdt(speed, T::frequency()); - trace!(" speed={} trdt={}", speed.to_bits(), trdt); - r.gusbcfg().modify(|w| w.set_trdt(trdt)); - - r.gintsts().write(|w| w.set_enumdne(true)); // clear - Self::restore_irqs(); - - return Poll::Ready(Event::Reset); - } - - if ints.usbsusp() { - trace!("suspend"); - r.gintsts().write(|w| w.set_usbsusp(true)); // clear - Self::restore_irqs(); - return Poll::Ready(Event::Suspend); - } - - if ints.wkupint() { - trace!("resume"); - r.gintsts().write(|w| w.set_wkupint(true)); // clear - Self::restore_irqs(); - return Poll::Ready(Event::Resume); - } - - Poll::Pending - }) - .await + self.inner.poll().await } fn endpoint_set_stalled(&mut self, ep_addr: EndpointAddress, stalled: bool) { - trace!("endpoint_set_stalled ep={:?} en={}", ep_addr, stalled); - - assert!( - ep_addr.index() < T::ENDPOINT_COUNT, - "endpoint_set_stalled index {} out of range", - ep_addr.index() - ); - - let regs = T::regs(); - match ep_addr.direction() { - Direction::Out => { - critical_section::with(|_| { - regs.doepctl(ep_addr.index()).modify(|w| { - w.set_stall(stalled); - }); - }); - - T::state().ep_out_wakers[ep_addr.index()].wake(); - } - Direction::In => { - critical_section::with(|_| { - regs.diepctl(ep_addr.index()).modify(|w| { - w.set_stall(stalled); - }); - }); - - T::state().ep_in_wakers[ep_addr.index()].wake(); - } - } + self.inner.endpoint_set_stalled(ep_addr, stalled) } fn endpoint_is_stalled(&mut self, ep_addr: EndpointAddress) -> bool { - assert!( - ep_addr.index() < T::ENDPOINT_COUNT, - "endpoint_is_stalled index {} out of range", - ep_addr.index() - ); - - let regs = T::regs(); - - match ep_addr.direction() { - Direction::Out => regs.doepctl(ep_addr.index()).read().stall(), - Direction::In => regs.diepctl(ep_addr.index()).read().stall(), - } + self.inner.endpoint_is_stalled(ep_addr) } fn endpoint_set_enabled(&mut self, ep_addr: EndpointAddress, enabled: bool) { - trace!("endpoint_set_enabled ep={:?} en={}", ep_addr, enabled); - - assert!( - ep_addr.index() < T::ENDPOINT_COUNT, - "endpoint_set_enabled index {} out of range", - ep_addr.index() - ); - - let r = T::regs(); - match ep_addr.direction() { - Direction::Out => { - critical_section::with(|_| { - // cancel transfer if active - if !enabled && r.doepctl(ep_addr.index()).read().epena() { - r.doepctl(ep_addr.index()).modify(|w| { - w.set_snak(true); - w.set_epdis(true); - }) - } - - r.doepctl(ep_addr.index()).modify(|w| { - w.set_usbaep(enabled); - }); - - // Flush tx fifo - r.grstctl().write(|w| { - w.set_txfflsh(true); - w.set_txfnum(ep_addr.index() as _); - }); - loop { - let x = r.grstctl().read(); - if !x.txfflsh() { - break; - } - } - }); - - // Wake `Endpoint::wait_enabled()` - T::state().ep_out_wakers[ep_addr.index()].wake(); - } - Direction::In => { - critical_section::with(|_| { - // cancel transfer if active - if !enabled && r.diepctl(ep_addr.index()).read().epena() { - r.diepctl(ep_addr.index()).modify(|w| { - w.set_snak(true); // set NAK - w.set_epdis(true); - }) - } - - r.diepctl(ep_addr.index()).modify(|w| { - w.set_usbaep(enabled); - w.set_cnak(enabled); // clear NAK that might've been set by SNAK above. - }) - }); - - // Wake `Endpoint::wait_enabled()` - T::state().ep_in_wakers[ep_addr.index()].wake(); - } - } + self.inner.endpoint_set_enabled(ep_addr, enabled) } async fn enable(&mut self) { - trace!("enable"); - // TODO: enable the peripheral once enable/disable semantics are cleared up in embassy-usb + self.inner.enable().await } async fn disable(&mut self) { - trace!("disable"); - - // TODO: disable the peripheral once enable/disable semantics are cleared up in embassy-usb - //Bus::disable(self); + Bus::disable(self); + // NOTE: inner call is a no-op + self.inner.disable().await } async fn remote_wakeup(&mut self) -> Result<(), Unsupported> { - Err(Unsupported) + self.inner.remote_wakeup().await } } impl<'d, T: Instance> Drop for Bus<'d, T> { - fn drop(&mut self) { - Bus::disable(self); - } + fn drop(&mut self) {} } -trait Dir { - fn dir() -> Direction; -} - -/// Marker type for the "IN" direction. -pub enum In {} -impl Dir for In { - fn dir() -> Direction { - Direction::In - } -} - -/// Marker type for the "OUT" direction. -pub enum Out {} -impl Dir for Out { - fn dir() -> Direction { - Direction::Out - } -} - -/// USB endpoint. -pub struct Endpoint<'d, T: Instance, D> { - _phantom: PhantomData<(&'d mut T, D)>, - info: EndpointInfo, -} - -impl<'d, T: Instance> embassy_usb_driver::Endpoint for Endpoint<'d, T, In> { - fn info(&self) -> &EndpointInfo { - &self.info - } - - async fn wait_enabled(&mut self) { - poll_fn(|cx| { - let ep_index = self.info.addr.index(); - - T::state().ep_in_wakers[ep_index].register(cx.waker()); - - if T::regs().diepctl(ep_index).read().usbaep() { - Poll::Ready(()) - } else { - Poll::Pending - } - }) - .await - } -} - -impl<'d, T: Instance> embassy_usb_driver::Endpoint for Endpoint<'d, T, Out> { - fn info(&self) -> &EndpointInfo { - &self.info - } - - async fn wait_enabled(&mut self) { - poll_fn(|cx| { - let ep_index = self.info.addr.index(); - - T::state().ep_out_wakers[ep_index].register(cx.waker()); - - if T::regs().doepctl(ep_index).read().usbaep() { - Poll::Ready(()) - } else { - Poll::Pending - } - }) - .await - } -} - -impl<'d, T: Instance> embassy_usb_driver::EndpointOut for Endpoint<'d, T, Out> { - async fn read(&mut self, buf: &mut [u8]) -> Result { - trace!("read start len={}", buf.len()); - - poll_fn(|cx| { - let r = T::regs(); - let index = self.info.addr.index(); - let state = T::state(); - - state.ep_out_wakers[index].register(cx.waker()); - - let doepctl = r.doepctl(index).read(); - trace!("read ep={:?}: doepctl {:08x}", self.info.addr, doepctl.0,); - if !doepctl.usbaep() { - trace!("read ep={:?} error disabled", self.info.addr); - return Poll::Ready(Err(EndpointError::Disabled)); - } - - let len = state.ep_out_size[index].load(Ordering::Relaxed); - if len != EP_OUT_BUFFER_EMPTY { - trace!("read ep={:?} done len={}", self.info.addr, len); - - if len as usize > buf.len() { - return Poll::Ready(Err(EndpointError::BufferOverflow)); - } - - // SAFETY: exclusive access ensured by `ep_out_size` atomic variable - let data = unsafe { core::slice::from_raw_parts(*state.ep_out_buffers[index].get(), len as usize) }; - buf[..len as usize].copy_from_slice(data); - - // Release buffer - state.ep_out_size[index].store(EP_OUT_BUFFER_EMPTY, Ordering::Release); - - critical_section::with(|_| { - // Receive 1 packet - T::regs().doeptsiz(index).modify(|w| { - w.set_xfrsiz(self.info.max_packet_size as _); - w.set_pktcnt(1); - }); - - // Clear NAK to indicate we are ready to receive more data - T::regs().doepctl(index).modify(|w| { - w.set_cnak(true); - }); - }); - - Poll::Ready(Ok(len as usize)) - } else { - Poll::Pending - } - }) - .await - } -} - -impl<'d, T: Instance> embassy_usb_driver::EndpointIn for Endpoint<'d, T, In> { - async fn write(&mut self, buf: &[u8]) -> Result<(), EndpointError> { - trace!("write ep={:?} data={:?}", self.info.addr, buf); - - if buf.len() > self.info.max_packet_size as usize { - return Err(EndpointError::BufferOverflow); - } - - let r = T::regs(); - let index = self.info.addr.index(); - let state = T::state(); - - // Wait for previous transfer to complete and check if endpoint is disabled - poll_fn(|cx| { - state.ep_in_wakers[index].register(cx.waker()); - - let diepctl = r.diepctl(index).read(); - let dtxfsts = r.dtxfsts(index).read(); - trace!( - "write ep={:?}: diepctl {:08x} ftxfsts {:08x}", - self.info.addr, - diepctl.0, - dtxfsts.0 - ); - if !diepctl.usbaep() { - trace!("write ep={:?} wait for prev: error disabled", self.info.addr); - Poll::Ready(Err(EndpointError::Disabled)) - } else if !diepctl.epena() { - trace!("write ep={:?} wait for prev: ready", self.info.addr); - Poll::Ready(Ok(())) - } else { - trace!("write ep={:?} wait for prev: pending", self.info.addr); - Poll::Pending - } - }) - .await?; - - if buf.len() > 0 { - poll_fn(|cx| { - state.ep_in_wakers[index].register(cx.waker()); - - let size_words = (buf.len() + 3) / 4; - - let fifo_space = r.dtxfsts(index).read().ineptfsav() as usize; - if size_words > fifo_space { - // Not enough space in fifo, enable tx fifo empty interrupt - critical_section::with(|_| { - r.diepempmsk().modify(|w| { - w.set_ineptxfem(w.ineptxfem() | (1 << index)); - }); - }); - - trace!("tx fifo for ep={} full, waiting for txfe", index); - - Poll::Pending - } else { - trace!("write ep={:?} wait for fifo: ready", self.info.addr); - Poll::Ready(()) - } - }) - .await - } - - // ERRATA: Transmit data FIFO is corrupted when a write sequence to the FIFO is interrupted with - // accesses to certain OTG_FS registers. - // - // Prevent the interrupt (which might poke FIFOs) from executing while copying data to FIFOs. - critical_section::with(|_| { - // Setup transfer size - r.dieptsiz(index).write(|w| { - w.set_mcnt(1); - w.set_pktcnt(1); - w.set_xfrsiz(buf.len() as _); - }); - - // Enable endpoint - r.diepctl(index).modify(|w| { - w.set_cnak(true); - w.set_epena(true); - }); - - // Write data to FIFO - for chunk in buf.chunks(4) { - let mut tmp = [0u8; 4]; - tmp[0..chunk.len()].copy_from_slice(chunk); - r.fifo(index).write_value(regs::Fifo(u32::from_ne_bytes(tmp))); - } - }); - - trace!("write done ep={:?}", self.info.addr); - - Ok(()) - } -} - -/// USB control pipe. -pub struct ControlPipe<'d, T: Instance> { - _phantom: PhantomData<&'d mut T>, - max_packet_size: u16, - ep_in: Endpoint<'d, T, In>, - ep_out: Endpoint<'d, T, Out>, -} - -impl<'d, T: Instance> embassy_usb_driver::ControlPipe for ControlPipe<'d, T> { - fn max_packet_size(&self) -> usize { - usize::from(self.max_packet_size) - } - - async fn setup(&mut self) -> [u8; 8] { - poll_fn(|cx| { - let state = T::state(); - - state.ep_out_wakers[0].register(cx.waker()); - - let r = T::regs(); - - if state.ep0_setup_ready.load(Ordering::Relaxed) { - let data = unsafe { *state.ep0_setup_data.get() }; - state.ep0_setup_ready.store(false, Ordering::Release); - - // EP0 should not be controlled by `Bus` so this RMW does not need a critical section - // Receive 1 SETUP packet - r.doeptsiz(self.ep_out.info.addr.index()).modify(|w| { - w.set_rxdpid_stupcnt(1); - }); - - // Clear NAK to indicate we are ready to receive more data - if !quirk_setup_late_cnak(r) { - r.doepctl(self.ep_out.info.addr.index()).modify(|w| w.set_cnak(true)); - } - - trace!("SETUP received: {:?}", data); - Poll::Ready(data) - } else { - trace!("SETUP waiting"); - Poll::Pending - } - }) - .await - } - - async fn data_out(&mut self, buf: &mut [u8], _first: bool, _last: bool) -> Result { - trace!("control: data_out"); - let len = self.ep_out.read(buf).await?; - trace!("control: data_out read: {:?}", &buf[..len]); - Ok(len) - } - - async fn data_in(&mut self, data: &[u8], _first: bool, last: bool) -> Result<(), EndpointError> { - trace!("control: data_in write: {:?}", data); - self.ep_in.write(data).await?; - - // wait for status response from host after sending the last packet - if last { - trace!("control: data_in waiting for status"); - self.ep_out.read(&mut []).await?; - trace!("control: complete"); - } - - Ok(()) - } - - async fn accept(&mut self) { - trace!("control: accept"); - - self.ep_in.write(&[]).await.ok(); - - trace!("control: accept OK"); - } - - async fn reject(&mut self) { - trace!("control: reject"); - - // EP0 should not be controlled by `Bus` so this RMW does not need a critical section - let regs = T::regs(); - regs.diepctl(self.ep_in.info.addr.index()).modify(|w| { - w.set_stall(true); - }); - regs.doepctl(self.ep_out.info.addr.index()).modify(|w| { - w.set_stall(true); - }); - } - - async fn accept_set_address(&mut self, addr: u8) { - trace!("setting addr: {}", addr); - critical_section::with(|_| { - T::regs().dcfg().modify(|w| { - w.set_dad(addr); - }); - }); - - // synopsys driver requires accept to be sent after changing address - self.accept().await - } -} - -/// Translates HAL [EndpointType] into PAC [vals::Eptyp] -fn to_eptyp(ep_type: EndpointType) -> vals::Eptyp { - match ep_type { - EndpointType::Control => vals::Eptyp::CONTROL, - EndpointType::Isochronous => vals::Eptyp::ISOCHRONOUS, - EndpointType::Bulk => vals::Eptyp::BULK, - EndpointType::Interrupt => vals::Eptyp::INTERRUPT, - } -} - -/// Calculates total allocated FIFO size in words -fn ep_fifo_size(eps: &[Option]) -> u16 { - eps.iter().map(|ep| ep.map(|ep| ep.fifo_size_words).unwrap_or(0)).sum() -} - -/// Generates IRQ mask for enabled endpoints -fn ep_irq_mask(eps: &[Option]) -> u16 { - eps.iter().enumerate().fold( - 0, - |mask, (index, ep)| { - if ep.is_some() { - mask | (1 << index) - } else { - mask - } - }, - ) -} - -/// Calculates MPSIZ value for EP0, which uses special values. -fn ep0_mpsiz(max_packet_size: u16) -> u16 { - match max_packet_size { - 8 => 0b11, - 16 => 0b10, - 32 => 0b01, - 64 => 0b00, - other => panic!("Unsupported EP0 size: {}", other), - } -} - -fn calculate_trdt(speed: vals::Dspd, ahb_freq: Hertz) -> u8 { - match speed { - vals::Dspd::HIGH_SPEED => { - // From RM0431 (F72xx), RM0090 (F429), RM0390 (F446) - if ahb_freq.0 >= 30_000_000 { - 0x9 - } else { - panic!("AHB frequency is too low") - } - } - vals::Dspd::FULL_SPEED_EXTERNAL | vals::Dspd::FULL_SPEED_INTERNAL => { - // From RM0431 (F72xx), RM0090 (F429) - match ahb_freq.0 { - 0..=14_199_999 => panic!("AHB frequency is too low"), - 14_200_000..=14_999_999 => 0xF, - 15_000_000..=15_999_999 => 0xE, - 16_000_000..=17_199_999 => 0xD, - 17_200_000..=18_499_999 => 0xC, - 18_500_000..=19_999_999 => 0xB, - 20_000_000..=21_799_999 => 0xA, - 21_800_000..=23_999_999 => 0x9, - 24_000_000..=27_499_999 => 0x8, - 27_500_000..=31_999_999 => 0x7, // 27.7..32 in code from CubeIDE - 32_000_000..=u32::MAX => 0x6, - } - } - _ => unimplemented!(), - } -} - -fn quirk_setup_late_cnak(r: crate::pac::otg::Otg) -> bool { - r.cid().read().0 & 0xf000 == 0x1000 -} - -// Using Instance::ENDPOINT_COUNT requires feature(const_generic_expr) so just define maximum eps -const MAX_EP_COUNT: usize = 9; - trait SealedInstance { const HIGH_SPEED: bool; const FIFO_DEPTH_WORDS: u16; const ENDPOINT_COUNT: usize; - fn regs() -> crate::pac::otg::Otg; - fn state() -> &'static super::State<{ MAX_EP_COUNT }>; + fn regs() -> Otg; + fn state() -> &'static State<{ MAX_EP_COUNT }>; } /// USB instance trait. @@ -1509,8 +378,8 @@ foreach_interrupt!( } } - fn regs() -> crate::pac::otg::Otg { - crate::pac::USB_OTG_FS + fn regs() -> Otg { + unsafe { Otg::from_ptr(crate::pac::USB_OTG_FS.as_ptr()) } } fn state() -> &'static State { @@ -1559,9 +428,9 @@ foreach_interrupt!( } } - fn regs() -> crate::pac::otg::Otg { + fn regs() -> Otg { // OTG HS registers are a superset of FS registers - unsafe { crate::pac::otg::Otg::from_ptr(crate::pac::USB_OTG_HS.as_ptr()) } + unsafe { Otg::from_ptr(crate::pac::USB_OTG_HS.as_ptr()) } } fn state() -> &'static State { @@ -1575,3 +444,38 @@ foreach_interrupt!( } }; ); + +fn calculate_trdt(speed: Dspd) -> u8 { + let ahb_freq = T::frequency().0; + match speed { + Dspd::HIGH_SPEED => { + // From RM0431 (F72xx), RM0090 (F429), RM0390 (F446) + if ahb_freq >= 30_000_000 { + 0x9 + } else { + panic!("AHB frequency is too low") + } + } + Dspd::FULL_SPEED_EXTERNAL | Dspd::FULL_SPEED_INTERNAL => { + // From RM0431 (F72xx), RM0090 (F429) + match ahb_freq { + 0..=14_199_999 => panic!("AHB frequency is too low"), + 14_200_000..=14_999_999 => 0xF, + 15_000_000..=15_999_999 => 0xE, + 16_000_000..=17_199_999 => 0xD, + 17_200_000..=18_499_999 => 0xC, + 18_500_000..=19_999_999 => 0xB, + 20_000_000..=21_799_999 => 0xA, + 21_800_000..=23_999_999 => 0x9, + 24_000_000..=27_499_999 => 0x8, + 27_500_000..=31_999_999 => 0x7, // 27.7..32 in code from CubeIDE + 32_000_000..=u32::MAX => 0x6, + } + } + _ => unimplemented!(), + } +} + +fn quirk_setup_late_cnak(r: Otg) -> bool { + r.cid().read().0 & 0xf000 == 0x1000 +} diff --git a/embassy-usb-synopsys-otg/Cargo.toml b/embassy-usb-synopsys-otg/Cargo.toml new file mode 100644 index 000000000..5693acc38 --- /dev/null +++ b/embassy-usb-synopsys-otg/Cargo.toml @@ -0,0 +1,13 @@ +[package] +name = "embassy-usb-synopsys-otg" +version = "0.1.0" +edition = "2021" + +# See more keys and their definitions at https://doc.rust-lang.org/cargo/reference/manifest.html + +[dependencies] +critical-section = "1.1" +futures = { version = "0.3.17", default-features = false } + +embassy-sync = { version = "0.5.0", path = "../embassy-sync" } +embassy-usb-driver = {version = "0.1.0", path = "../embassy-usb-driver" } diff --git a/embassy-usb-synopsys-otg/README.md b/embassy-usb-synopsys-otg/README.md new file mode 100644 index 000000000..c3f914896 --- /dev/null +++ b/embassy-usb-synopsys-otg/README.md @@ -0,0 +1 @@ +# Embassy USB driver for the Synopsys OTG core diff --git a/embassy-usb-synopsys-otg/src/fmt.rs b/embassy-usb-synopsys-otg/src/fmt.rs new file mode 100644 index 000000000..2ac42c557 --- /dev/null +++ b/embassy-usb-synopsys-otg/src/fmt.rs @@ -0,0 +1,257 @@ +#![macro_use] +#![allow(unused)] + +use core::fmt::{Debug, Display, LowerHex}; + +#[cfg(all(feature = "defmt", feature = "log"))] +compile_error!("You may not enable both `defmt` and `log` features."); + +macro_rules! assert { + ($($x:tt)*) => { + { + #[cfg(not(feature = "defmt"))] + ::core::assert!($($x)*); + #[cfg(feature = "defmt")] + ::defmt::assert!($($x)*); + } + }; +} + +macro_rules! assert_eq { + ($($x:tt)*) => { + { + #[cfg(not(feature = "defmt"))] + ::core::assert_eq!($($x)*); + #[cfg(feature = "defmt")] + ::defmt::assert_eq!($($x)*); + } + }; +} + +macro_rules! assert_ne { + ($($x:tt)*) => { + { + #[cfg(not(feature = "defmt"))] + ::core::assert_ne!($($x)*); + #[cfg(feature = "defmt")] + ::defmt::assert_ne!($($x)*); + } + }; +} + +macro_rules! debug_assert { + ($($x:tt)*) => { + { + #[cfg(not(feature = "defmt"))] + ::core::debug_assert!($($x)*); + #[cfg(feature = "defmt")] + ::defmt::debug_assert!($($x)*); + } + }; +} + +macro_rules! debug_assert_eq { + ($($x:tt)*) => { + { + #[cfg(not(feature = "defmt"))] + ::core::debug_assert_eq!($($x)*); + #[cfg(feature = "defmt")] + ::defmt::debug_assert_eq!($($x)*); + } + }; +} + +macro_rules! debug_assert_ne { + ($($x:tt)*) => { + { + #[cfg(not(feature = "defmt"))] + ::core::debug_assert_ne!($($x)*); + #[cfg(feature = "defmt")] + ::defmt::debug_assert_ne!($($x)*); + } + }; +} + +macro_rules! todo { + ($($x:tt)*) => { + { + #[cfg(not(feature = "defmt"))] + ::core::todo!($($x)*); + #[cfg(feature = "defmt")] + ::defmt::todo!($($x)*); + } + }; +} + +#[cfg(not(feature = "defmt"))] +macro_rules! unreachable { + ($($x:tt)*) => { + ::core::unreachable!($($x)*) + }; +} + +#[cfg(feature = "defmt")] +macro_rules! unreachable { + ($($x:tt)*) => { + ::defmt::unreachable!($($x)*) + }; +} + +macro_rules! panic { + ($($x:tt)*) => { + { + #[cfg(not(feature = "defmt"))] + ::core::panic!($($x)*); + #[cfg(feature = "defmt")] + ::defmt::panic!($($x)*); + } + }; +} + +macro_rules! trace { + ($s:literal $(, $x:expr)* $(,)?) => { + { + #[cfg(feature = "log")] + ::log::trace!($s $(, $x)*); + #[cfg(feature = "defmt")] + ::defmt::trace!($s $(, $x)*); + #[cfg(not(any(feature = "log", feature="defmt")))] + let _ = ($( & $x ),*); + } + }; +} + +macro_rules! debug { + ($s:literal $(, $x:expr)* $(,)?) => { + { + #[cfg(feature = "log")] + ::log::debug!($s $(, $x)*); + #[cfg(feature = "defmt")] + ::defmt::debug!($s $(, $x)*); + #[cfg(not(any(feature = "log", feature="defmt")))] + let _ = ($( & $x ),*); + } + }; +} + +macro_rules! info { + ($s:literal $(, $x:expr)* $(,)?) => { + { + #[cfg(feature = "log")] + ::log::info!($s $(, $x)*); + #[cfg(feature = "defmt")] + ::defmt::info!($s $(, $x)*); + #[cfg(not(any(feature = "log", feature="defmt")))] + let _ = ($( & $x ),*); + } + }; +} + +macro_rules! warn { + ($s:literal $(, $x:expr)* $(,)?) => { + { + #[cfg(feature = "log")] + ::log::warn!($s $(, $x)*); + #[cfg(feature = "defmt")] + ::defmt::warn!($s $(, $x)*); + #[cfg(not(any(feature = "log", feature="defmt")))] + let _ = ($( & $x ),*); + } + }; +} + +macro_rules! error { + ($s:literal $(, $x:expr)* $(,)?) => { + { + #[cfg(feature = "log")] + ::log::error!($s $(, $x)*); + #[cfg(feature = "defmt")] + ::defmt::error!($s $(, $x)*); + #[cfg(not(any(feature = "log", feature="defmt")))] + let _ = ($( & $x ),*); + } + }; +} + +#[cfg(feature = "defmt")] +macro_rules! unwrap { + ($($x:tt)*) => { + ::defmt::unwrap!($($x)*) + }; +} + +#[cfg(not(feature = "defmt"))] +macro_rules! unwrap { + ($arg:expr) => { + match $crate::fmt::Try::into_result($arg) { + ::core::result::Result::Ok(t) => t, + ::core::result::Result::Err(e) => { + ::core::panic!("unwrap of `{}` failed: {:?}", ::core::stringify!($arg), e); + } + } + }; + ($arg:expr, $($msg:expr),+ $(,)? ) => { + match $crate::fmt::Try::into_result($arg) { + ::core::result::Result::Ok(t) => t, + ::core::result::Result::Err(e) => { + ::core::panic!("unwrap of `{}` failed: {}: {:?}", ::core::stringify!($arg), ::core::format_args!($($msg,)*), e); + } + } + } +} + +#[derive(Debug, Copy, Clone, Eq, PartialEq)] +pub struct NoneError; + +pub trait Try { + type Ok; + type Error; + fn into_result(self) -> Result; +} + +impl Try for Option { + type Ok = T; + type Error = NoneError; + + #[inline] + fn into_result(self) -> Result { + self.ok_or(NoneError) + } +} + +impl Try for Result { + type Ok = T; + type Error = E; + + #[inline] + fn into_result(self) -> Self { + self + } +} + +pub(crate) struct Bytes<'a>(pub &'a [u8]); + +impl<'a> Debug for Bytes<'a> { + fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { + write!(f, "{:#02x?}", self.0) + } +} + +impl<'a> Display for Bytes<'a> { + fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { + write!(f, "{:#02x?}", self.0) + } +} + +impl<'a> LowerHex for Bytes<'a> { + fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { + write!(f, "{:#02x?}", self.0) + } +} + +#[cfg(feature = "defmt")] +impl<'a> defmt::Format for Bytes<'a> { + fn format(&self, fmt: defmt::Formatter) { + defmt::write!(fmt, "{:02x}", self.0) + } +} diff --git a/embassy-usb-synopsys-otg/src/lib.rs b/embassy-usb-synopsys-otg/src/lib.rs new file mode 100644 index 000000000..6d6cc9b0f --- /dev/null +++ b/embassy-usb-synopsys-otg/src/lib.rs @@ -0,0 +1,1300 @@ +#![cfg_attr(not(test), no_std)] +#![allow(async_fn_in_trait)] +#![doc = include_str!("../README.md")] +#![warn(missing_docs)] + +// This must go FIRST so that all the other modules see its macros. +mod fmt; + +use core::cell::UnsafeCell; +use core::marker::PhantomData; +use core::sync::atomic::{AtomicBool, AtomicU16, Ordering}; +use core::task::Poll; + +use embassy_sync::waitqueue::AtomicWaker; +use embassy_usb_driver::{ + Bus as _, Direction, EndpointAddress, EndpointAllocError, EndpointError, EndpointIn, EndpointInfo, EndpointOut, + EndpointType, Event, Unsupported, +}; +use futures::future::poll_fn; + +pub mod otg_v1; + +use otg_v1::{regs, vals, Otg}; + +/// Handle interrupts. +pub unsafe fn on_interrupt(r: Otg, state: &State<{ MAX_EP_COUNT }>, ep_count: usize, quirk_setup_late_cnak: bool) { + let ints = r.gintsts().read(); + if ints.wkupint() || ints.usbsusp() || ints.usbrst() || ints.enumdne() || ints.otgint() || ints.srqint() { + // Mask interrupts and notify `Bus` to process them + r.gintmsk().write(|_| {}); + state.bus_waker.wake(); + } + + // Handle RX + while r.gintsts().read().rxflvl() { + let status = r.grxstsp().read(); + trace!("=== status {:08x}", status.0); + let ep_num = status.epnum() as usize; + let len = status.bcnt() as usize; + + assert!(ep_num < ep_count); + + match status.pktstsd() { + vals::Pktstsd::SETUP_DATA_RX => { + trace!("SETUP_DATA_RX"); + assert!(len == 8, "invalid SETUP packet length={}", len); + assert!(ep_num == 0, "invalid SETUP packet endpoint={}", ep_num); + + // flushing TX if something stuck in control endpoint + if r.dieptsiz(ep_num).read().pktcnt() != 0 { + r.grstctl().modify(|w| { + w.set_txfnum(ep_num as _); + w.set_txfflsh(true); + }); + while r.grstctl().read().txfflsh() {} + } + + if state.ep0_setup_ready.load(Ordering::Relaxed) == false { + // SAFETY: exclusive access ensured by atomic bool + let data = unsafe { &mut *state.ep0_setup_data.get() }; + data[0..4].copy_from_slice(&r.fifo(0).read().0.to_ne_bytes()); + data[4..8].copy_from_slice(&r.fifo(0).read().0.to_ne_bytes()); + state.ep0_setup_ready.store(true, Ordering::Release); + state.ep_out_wakers[0].wake(); + } else { + error!("received SETUP before previous finished processing"); + // discard FIFO + r.fifo(0).read(); + r.fifo(0).read(); + } + } + vals::Pktstsd::OUT_DATA_RX => { + trace!("OUT_DATA_RX ep={} len={}", ep_num, len); + + if state.ep_out_size[ep_num].load(Ordering::Acquire) == EP_OUT_BUFFER_EMPTY { + // SAFETY: Buffer size is allocated to be equal to endpoint's maximum packet size + // We trust the peripheral to not exceed its configured MPSIZ + let buf = unsafe { core::slice::from_raw_parts_mut(*state.ep_out_buffers[ep_num].get(), len) }; + + for chunk in buf.chunks_mut(4) { + // RX FIFO is shared so always read from fifo(0) + let data = r.fifo(0).read().0; + chunk.copy_from_slice(&data.to_ne_bytes()[0..chunk.len()]); + } + + state.ep_out_size[ep_num].store(len as u16, Ordering::Release); + state.ep_out_wakers[ep_num].wake(); + } else { + error!("ep_out buffer overflow index={}", ep_num); + + // discard FIFO data + let len_words = (len + 3) / 4; + for _ in 0..len_words { + r.fifo(0).read().data(); + } + } + } + vals::Pktstsd::OUT_DATA_DONE => { + trace!("OUT_DATA_DONE ep={}", ep_num); + } + vals::Pktstsd::SETUP_DATA_DONE => { + trace!("SETUP_DATA_DONE ep={}", ep_num); + + if quirk_setup_late_cnak { + // Clear NAK to indicate we are ready to receive more data + r.doepctl(ep_num).modify(|w| w.set_cnak(true)); + } + } + x => trace!("unknown PKTSTS: {}", x.to_bits()), + } + } + + // IN endpoint interrupt + if ints.iepint() { + let mut ep_mask = r.daint().read().iepint(); + let mut ep_num = 0; + + // Iterate over endpoints while there are non-zero bits in the mask + while ep_mask != 0 { + if ep_mask & 1 != 0 { + let ep_ints = r.diepint(ep_num).read(); + + // clear all + r.diepint(ep_num).write_value(ep_ints); + + // TXFE is cleared in DIEPEMPMSK + if ep_ints.txfe() { + critical_section::with(|_| { + r.diepempmsk().modify(|w| { + w.set_ineptxfem(w.ineptxfem() & !(1 << ep_num)); + }); + }); + } + + state.ep_in_wakers[ep_num].wake(); + trace!("in ep={} irq val={:08x}", ep_num, ep_ints.0); + } + + ep_mask >>= 1; + ep_num += 1; + } + } + + // not needed? reception handled in rxflvl + // OUT endpoint interrupt + // if ints.oepint() { + // let mut ep_mask = r.daint().read().oepint(); + // let mut ep_num = 0; + + // while ep_mask != 0 { + // if ep_mask & 1 != 0 { + // let ep_ints = r.doepint(ep_num).read(); + // // clear all + // r.doepint(ep_num).write_value(ep_ints); + // state.ep_out_wakers[ep_num].wake(); + // trace!("out ep={} irq val={:08x}", ep_num, ep_ints.0); + // } + + // ep_mask >>= 1; + // ep_num += 1; + // } + // } +} + +/// USB PHY type +#[derive(Copy, Clone, Debug, Eq, PartialEq)] +pub enum PhyType { + /// Internal Full-Speed PHY + /// + /// Available on most High-Speed peripherals. + InternalFullSpeed, + /// Internal High-Speed PHY + /// + /// Available on a few STM32 chips. + InternalHighSpeed, + /// External ULPI High-Speed PHY + ExternalHighSpeed, +} + +impl PhyType { + /// Get whether this PHY is any of the internal types. + pub fn internal(&self) -> bool { + match self { + PhyType::InternalFullSpeed | PhyType::InternalHighSpeed => true, + PhyType::ExternalHighSpeed => false, + } + } + + /// Get whether this PHY is any of the high-speed types. + pub fn high_speed(&self) -> bool { + match self { + PhyType::InternalFullSpeed => false, + PhyType::ExternalHighSpeed | PhyType::InternalHighSpeed => true, + } + } + + fn to_dspd(&self) -> vals::Dspd { + match self { + PhyType::InternalFullSpeed => vals::Dspd::FULL_SPEED_INTERNAL, + PhyType::InternalHighSpeed => vals::Dspd::HIGH_SPEED, + PhyType::ExternalHighSpeed => vals::Dspd::HIGH_SPEED, + } + } +} + +/// Indicates that [State::ep_out_buffers] is empty. +const EP_OUT_BUFFER_EMPTY: u16 = u16::MAX; + +/// USB OTG driver state. +pub struct State { + /// Holds received SETUP packets. Available if [State::ep0_setup_ready] is true. + ep0_setup_data: UnsafeCell<[u8; 8]>, + ep0_setup_ready: AtomicBool, + ep_in_wakers: [AtomicWaker; EP_COUNT], + ep_out_wakers: [AtomicWaker; EP_COUNT], + /// RX FIFO is shared so extra buffers are needed to dequeue all data without waiting on each endpoint. + /// Buffers are ready when associated [State::ep_out_size] != [EP_OUT_BUFFER_EMPTY]. + ep_out_buffers: [UnsafeCell<*mut u8>; EP_COUNT], + ep_out_size: [AtomicU16; EP_COUNT], + bus_waker: AtomicWaker, +} + +unsafe impl Send for State {} +unsafe impl Sync for State {} + +impl State { + /// Create a new State. + pub const fn new() -> Self { + const NEW_AW: AtomicWaker = AtomicWaker::new(); + const NEW_BUF: UnsafeCell<*mut u8> = UnsafeCell::new(0 as _); + const NEW_SIZE: AtomicU16 = AtomicU16::new(EP_OUT_BUFFER_EMPTY); + + Self { + ep0_setup_data: UnsafeCell::new([0u8; 8]), + ep0_setup_ready: AtomicBool::new(false), + ep_in_wakers: [NEW_AW; EP_COUNT], + ep_out_wakers: [NEW_AW; EP_COUNT], + ep_out_buffers: [NEW_BUF; EP_COUNT], + ep_out_size: [NEW_SIZE; EP_COUNT], + bus_waker: NEW_AW, + } + } +} + +#[derive(Debug, Clone, Copy)] +struct EndpointData { + ep_type: EndpointType, + max_packet_size: u16, + fifo_size_words: u16, +} + +/// USB driver config. +#[non_exhaustive] +#[derive(Clone, Copy, PartialEq, Eq, Debug)] +pub struct Config { + /// Enable VBUS detection. + /// + /// The USB spec requires USB devices monitor for USB cable plug/unplug and react accordingly. + /// This is done by checking whether there is 5V on the VBUS pin or not. + /// + /// If your device is bus-powered (powers itself from the USB host via VBUS), then this is optional. + /// (If there's no power in VBUS your device would be off anyway, so it's fine to always assume + /// there's power in VBUS, i.e. the USB cable is always plugged in.) + /// + /// If your device is self-powered (i.e. it gets power from a source other than the USB cable, and + /// therefore can stay powered through USB cable plug/unplug) then you MUST set this to true. + /// + /// If you set this to true, you must connect VBUS to PA9 for FS, PB13 for HS, possibly with a + /// voltage divider. See ST application note AN4879 and the reference manual for more details. + pub vbus_detection: bool, +} + +impl Default for Config { + fn default() -> Self { + Self { vbus_detection: true } + } +} + +/// USB driver. +pub struct Driver<'d> { + config: Config, + ep_in: [Option; MAX_EP_COUNT], + ep_out: [Option; MAX_EP_COUNT], + ep_out_buffer: &'d mut [u8], + ep_out_buffer_offset: usize, + instance: OtgInstance<'d>, +} + +impl<'d> Driver<'d> { + /// Initializes USB OTG peripheral. + /// + /// # Arguments + /// + /// * `ep_out_buffer` - An internal buffer used to temporarily store received packets. + /// Must be large enough to fit all OUT endpoint max packet sizes. + /// Endpoint allocation will fail if it is too small. + pub fn new(ep_out_buffer: &'d mut [u8], instance: OtgInstance<'d>, config: Config) -> Self { + Self { + config, + ep_in: [None; MAX_EP_COUNT], + ep_out: [None; MAX_EP_COUNT], + ep_out_buffer, + ep_out_buffer_offset: 0, + instance, + } + } + + // Returns total amount of words (u32) allocated in dedicated FIFO + fn allocated_fifo_words(&self) -> u16 { + self.instance.extra_rx_fifo_words + ep_fifo_size(&self.ep_out) + ep_fifo_size(&self.ep_in) + } + + /// Creates an [`Endpoint`] with the given parameters. + pub fn alloc_endpoint( + &mut self, + ep_type: EndpointType, + max_packet_size: u16, + interval_ms: u8, + ) -> Result, EndpointAllocError> { + trace!( + "allocating type={:?} mps={:?} interval_ms={}, dir={:?}", + ep_type, + max_packet_size, + interval_ms, + D::dir() + ); + + if D::dir() == Direction::Out { + if self.ep_out_buffer_offset + max_packet_size as usize >= self.ep_out_buffer.len() { + error!("Not enough endpoint out buffer capacity"); + return Err(EndpointAllocError); + } + }; + + let fifo_size_words = match D::dir() { + Direction::Out => (max_packet_size + 3) / 4, + // INEPTXFD requires minimum size of 16 words + Direction::In => u16::max((max_packet_size + 3) / 4, 16), + }; + + if fifo_size_words + self.allocated_fifo_words() > self.instance.fifo_depth_words { + error!("Not enough FIFO capacity"); + return Err(EndpointAllocError); + } + + let eps = match D::dir() { + Direction::Out => &mut self.ep_out, + Direction::In => &mut self.ep_in, + }; + + // Find free endpoint slot + let slot = eps.iter_mut().enumerate().find(|(i, ep)| { + if *i == 0 && ep_type != EndpointType::Control { + // reserved for control pipe + false + } else { + ep.is_none() + } + }); + + let index = match slot { + Some((index, ep)) => { + *ep = Some(EndpointData { + ep_type, + max_packet_size, + fifo_size_words, + }); + index + } + None => { + error!("No free endpoints available"); + return Err(EndpointAllocError); + } + }; + + trace!(" index={}", index); + + if D::dir() == Direction::Out { + // Buffer capacity check was done above, now allocation cannot fail + unsafe { + *self.instance.state.ep_out_buffers[index].get() = + self.ep_out_buffer.as_mut_ptr().offset(self.ep_out_buffer_offset as _); + } + self.ep_out_buffer_offset += max_packet_size as usize; + } + + Ok(Endpoint { + _phantom: PhantomData, + regs: self.instance.regs, + state: self.instance.state, + info: EndpointInfo { + addr: EndpointAddress::from_parts(index, D::dir()), + ep_type, + max_packet_size, + interval_ms, + }, + }) + } +} + +impl<'d> embassy_usb_driver::Driver<'d> for Driver<'d> { + type EndpointOut = Endpoint<'d, Out>; + type EndpointIn = Endpoint<'d, In>; + type ControlPipe = ControlPipe<'d>; + type Bus = Bus<'d>; + + fn alloc_endpoint_in( + &mut self, + ep_type: EndpointType, + max_packet_size: u16, + interval_ms: u8, + ) -> Result { + self.alloc_endpoint(ep_type, max_packet_size, interval_ms) + } + + fn alloc_endpoint_out( + &mut self, + ep_type: EndpointType, + max_packet_size: u16, + interval_ms: u8, + ) -> Result { + self.alloc_endpoint(ep_type, max_packet_size, interval_ms) + } + + fn start(mut self, control_max_packet_size: u16) -> (Self::Bus, Self::ControlPipe) { + let ep_out = self + .alloc_endpoint(EndpointType::Control, control_max_packet_size, 0) + .unwrap(); + let ep_in = self + .alloc_endpoint(EndpointType::Control, control_max_packet_size, 0) + .unwrap(); + assert_eq!(ep_out.info.addr.index(), 0); + assert_eq!(ep_in.info.addr.index(), 0); + + trace!("start"); + + let regs = self.instance.regs; + let quirk_setup_late_cnak = self.instance.quirk_setup_late_cnak; + ( + Bus { + config: self.config, + ep_in: self.ep_in, + ep_out: self.ep_out, + inited: false, + instance: self.instance, + }, + ControlPipe { + max_packet_size: control_max_packet_size, + ep_out, + ep_in, + regs, + quirk_setup_late_cnak, + }, + ) + } +} + +/// USB bus. +pub struct Bus<'d> { + config: Config, + ep_in: [Option; MAX_EP_COUNT], + ep_out: [Option; MAX_EP_COUNT], + instance: OtgInstance<'d>, + inited: bool, +} + +impl<'d> Bus<'d> { + fn restore_irqs(&mut self) { + self.instance.regs.gintmsk().write(|w| { + w.set_usbrst(true); + w.set_enumdnem(true); + w.set_usbsuspm(true); + w.set_wuim(true); + w.set_iepint(true); + w.set_oepint(true); + w.set_rxflvlm(true); + w.set_srqim(true); + w.set_otgint(true); + }); + } +} + +impl<'d> Bus<'d> { + /// Returns the PHY type. + pub fn phy_type(&self) -> PhyType { + self.instance.phy_type + } + + /// Configures the PHY as a device. + pub fn configure_as_device(&mut self) { + let r = self.instance.regs; + let phy_type = self.instance.phy_type; + r.gusbcfg().write(|w| { + // Force device mode + w.set_fdmod(true); + // Enable internal full-speed PHY + w.set_physel(phy_type.internal() && !phy_type.high_speed()); + }); + } + + /// Applies configuration specific to + /// Core ID 0x0000_1100 and 0x0000_1200 + pub fn config_v1(&mut self) { + let r = self.instance.regs; + let phy_type = self.instance.phy_type; + assert!(phy_type != PhyType::InternalHighSpeed); + + r.gccfg_v1().modify(|w| { + // Enable internal full-speed PHY, logic is inverted + w.set_pwrdwn(phy_type.internal()); + }); + + // F429-like chips have the GCCFG.NOVBUSSENS bit + r.gccfg_v1().modify(|w| { + w.set_novbussens(!self.config.vbus_detection); + w.set_vbusasen(false); + w.set_vbusbsen(self.config.vbus_detection); + w.set_sofouten(false); + }); + } + + /// Applies configuration specific to + /// Core ID 0x0000_2000, 0x0000_2100, 0x0000_2300, 0x0000_3000 and 0x0000_3100 + pub fn config_v2v3(&mut self) { + let r = self.instance.regs; + let phy_type = self.instance.phy_type; + + // F446-like chips have the GCCFG.VBDEN bit with the opposite meaning + r.gccfg_v2().modify(|w| { + // Enable internal full-speed PHY, logic is inverted + w.set_pwrdwn(phy_type.internal() && !phy_type.high_speed()); + w.set_phyhsen(phy_type.internal() && phy_type.high_speed()); + }); + + r.gccfg_v2().modify(|w| { + w.set_vbden(self.config.vbus_detection); + }); + + // Force B-peripheral session + r.gotgctl().modify(|w| { + w.set_bvaloen(!self.config.vbus_detection); + w.set_bvaloval(true); + }); + } + + fn init(&mut self) { + let r = self.instance.regs; + let phy_type = self.instance.phy_type; + + // Soft disconnect. + r.dctl().write(|w| w.set_sdis(true)); + + // Set speed. + r.dcfg().write(|w| { + w.set_pfivl(vals::Pfivl::FRAME_INTERVAL_80); + w.set_dspd(phy_type.to_dspd()); + }); + + // Unmask transfer complete EP interrupt + r.diepmsk().write(|w| { + w.set_xfrcm(true); + }); + + // Unmask and clear core interrupts + self.restore_irqs(); + r.gintsts().write_value(regs::Gintsts(0xFFFF_FFFF)); + + // Unmask global interrupt + r.gahbcfg().write(|w| { + w.set_gint(true); // unmask global interrupt + }); + + // Connect + r.dctl().write(|w| w.set_sdis(false)); + } + + fn init_fifo(&mut self) { + trace!("init_fifo"); + + let regs = self.instance.regs; + // ERRATA NOTE: Don't interrupt FIFOs being written to. The interrupt + // handler COULD interrupt us here and do FIFO operations, so ensure + // the interrupt does not occur. + critical_section::with(|_| { + // Configure RX fifo size. All endpoints share the same FIFO area. + let rx_fifo_size_words = self.instance.extra_rx_fifo_words + ep_fifo_size(&self.ep_out); + trace!("configuring rx fifo size={}", rx_fifo_size_words); + + regs.grxfsiz().modify(|w| w.set_rxfd(rx_fifo_size_words)); + + // Configure TX (USB in direction) fifo size for each endpoint + let mut fifo_top = rx_fifo_size_words; + for i in 0..self.instance.endpoint_count { + if let Some(ep) = self.ep_in[i] { + trace!( + "configuring tx fifo ep={}, offset={}, size={}", + i, + fifo_top, + ep.fifo_size_words + ); + + let dieptxf = if i == 0 { regs.dieptxf0() } else { regs.dieptxf(i - 1) }; + + dieptxf.write(|w| { + w.set_fd(ep.fifo_size_words); + w.set_sa(fifo_top); + }); + + fifo_top += ep.fifo_size_words; + } + } + + assert!( + fifo_top <= self.instance.fifo_depth_words, + "FIFO allocations exceeded maximum capacity" + ); + + // Flush fifos + regs.grstctl().write(|w| { + w.set_rxfflsh(true); + w.set_txfflsh(true); + w.set_txfnum(0x10); + }); + }); + + loop { + let x = regs.grstctl().read(); + if !x.rxfflsh() && !x.txfflsh() { + break; + } + } + } + + fn configure_endpoints(&mut self) { + trace!("configure_endpoints"); + + let regs = self.instance.regs; + + // Configure IN endpoints + for (index, ep) in self.ep_in.iter().enumerate() { + if let Some(ep) = ep { + critical_section::with(|_| { + regs.diepctl(index).write(|w| { + if index == 0 { + w.set_mpsiz(ep0_mpsiz(ep.max_packet_size)); + } else { + w.set_mpsiz(ep.max_packet_size); + w.set_eptyp(to_eptyp(ep.ep_type)); + w.set_sd0pid_sevnfrm(true); + w.set_txfnum(index as _); + w.set_snak(true); + } + }); + }); + } + } + + // Configure OUT endpoints + for (index, ep) in self.ep_out.iter().enumerate() { + if let Some(ep) = ep { + critical_section::with(|_| { + regs.doepctl(index).write(|w| { + if index == 0 { + w.set_mpsiz(ep0_mpsiz(ep.max_packet_size)); + } else { + w.set_mpsiz(ep.max_packet_size); + w.set_eptyp(to_eptyp(ep.ep_type)); + w.set_sd0pid_sevnfrm(true); + } + }); + + regs.doeptsiz(index).modify(|w| { + w.set_xfrsiz(ep.max_packet_size as _); + if index == 0 { + w.set_rxdpid_stupcnt(1); + } else { + w.set_pktcnt(1); + } + }); + }); + } + } + + // Enable IRQs for allocated endpoints + regs.daintmsk().modify(|w| { + w.set_iepm(ep_irq_mask(&self.ep_in)); + // OUT interrupts not used, handled in RXFLVL + // w.set_oepm(ep_irq_mask(&self.ep_out)); + }); + } + + fn disable_all_endpoints(&mut self) { + for i in 0..self.instance.endpoint_count { + self.endpoint_set_enabled(EndpointAddress::from_parts(i, Direction::In), false); + self.endpoint_set_enabled(EndpointAddress::from_parts(i, Direction::Out), false); + } + } +} + +impl<'d> embassy_usb_driver::Bus for Bus<'d> { + async fn poll(&mut self) -> Event { + poll_fn(move |cx| { + if !self.inited { + self.init(); + self.inited = true; + + // If no vbus detection, just return a single PowerDetected event at startup. + if !self.config.vbus_detection { + return Poll::Ready(Event::PowerDetected); + } + } + + let regs = self.instance.regs; + self.instance.state.bus_waker.register(cx.waker()); + + let ints = regs.gintsts().read(); + + if ints.srqint() { + trace!("vbus detected"); + + regs.gintsts().write(|w| w.set_srqint(true)); // clear + self.restore_irqs(); + + if self.config.vbus_detection { + return Poll::Ready(Event::PowerDetected); + } + } + + if ints.otgint() { + let otgints = regs.gotgint().read(); + regs.gotgint().write_value(otgints); // clear all + self.restore_irqs(); + + if otgints.sedet() { + trace!("vbus removed"); + if self.config.vbus_detection { + self.disable_all_endpoints(); + return Poll::Ready(Event::PowerRemoved); + } + } + } + + if ints.usbrst() { + trace!("reset"); + + self.init_fifo(); + self.configure_endpoints(); + + // Reset address + critical_section::with(|_| { + regs.dcfg().modify(|w| { + w.set_dad(0); + }); + }); + + regs.gintsts().write(|w| w.set_usbrst(true)); // clear + self.restore_irqs(); + } + + if ints.enumdne() { + trace!("enumdne"); + + let speed = regs.dsts().read().enumspd(); + let trdt = (self.instance.calculate_trdt_fn)(speed); + trace!(" speed={} trdt={}", speed.to_bits(), trdt); + regs.gusbcfg().modify(|w| w.set_trdt(trdt)); + + regs.gintsts().write(|w| w.set_enumdne(true)); // clear + self.restore_irqs(); + + return Poll::Ready(Event::Reset); + } + + if ints.usbsusp() { + trace!("suspend"); + regs.gintsts().write(|w| w.set_usbsusp(true)); // clear + self.restore_irqs(); + return Poll::Ready(Event::Suspend); + } + + if ints.wkupint() { + trace!("resume"); + regs.gintsts().write(|w| w.set_wkupint(true)); // clear + self.restore_irqs(); + return Poll::Ready(Event::Resume); + } + + Poll::Pending + }) + .await + } + + fn endpoint_set_stalled(&mut self, ep_addr: EndpointAddress, stalled: bool) { + trace!("endpoint_set_stalled ep={:?} en={}", ep_addr, stalled); + + assert!( + ep_addr.index() < self.instance.endpoint_count, + "endpoint_set_stalled index {} out of range", + ep_addr.index() + ); + + let regs = self.instance.regs; + let state = self.instance.state; + match ep_addr.direction() { + Direction::Out => { + critical_section::with(|_| { + regs.doepctl(ep_addr.index()).modify(|w| { + w.set_stall(stalled); + }); + }); + + state.ep_out_wakers[ep_addr.index()].wake(); + } + Direction::In => { + critical_section::with(|_| { + regs.diepctl(ep_addr.index()).modify(|w| { + w.set_stall(stalled); + }); + }); + + state.ep_in_wakers[ep_addr.index()].wake(); + } + } + } + + fn endpoint_is_stalled(&mut self, ep_addr: EndpointAddress) -> bool { + assert!( + ep_addr.index() < self.instance.endpoint_count, + "endpoint_is_stalled index {} out of range", + ep_addr.index() + ); + + let regs = self.instance.regs; + match ep_addr.direction() { + Direction::Out => regs.doepctl(ep_addr.index()).read().stall(), + Direction::In => regs.diepctl(ep_addr.index()).read().stall(), + } + } + + fn endpoint_set_enabled(&mut self, ep_addr: EndpointAddress, enabled: bool) { + trace!("endpoint_set_enabled ep={:?} en={}", ep_addr, enabled); + + assert!( + ep_addr.index() < self.instance.endpoint_count, + "endpoint_set_enabled index {} out of range", + ep_addr.index() + ); + + let regs = self.instance.regs; + let state = self.instance.state; + match ep_addr.direction() { + Direction::Out => { + critical_section::with(|_| { + // cancel transfer if active + if !enabled && regs.doepctl(ep_addr.index()).read().epena() { + regs.doepctl(ep_addr.index()).modify(|w| { + w.set_snak(true); + w.set_epdis(true); + }) + } + + regs.doepctl(ep_addr.index()).modify(|w| { + w.set_usbaep(enabled); + }); + + // Flush tx fifo + regs.grstctl().write(|w| { + w.set_txfflsh(true); + w.set_txfnum(ep_addr.index() as _); + }); + loop { + let x = regs.grstctl().read(); + if !x.txfflsh() { + break; + } + } + }); + + // Wake `Endpoint::wait_enabled()` + state.ep_out_wakers[ep_addr.index()].wake(); + } + Direction::In => { + critical_section::with(|_| { + // cancel transfer if active + if !enabled && regs.diepctl(ep_addr.index()).read().epena() { + regs.diepctl(ep_addr.index()).modify(|w| { + w.set_snak(true); // set NAK + w.set_epdis(true); + }) + } + + regs.diepctl(ep_addr.index()).modify(|w| { + w.set_usbaep(enabled); + w.set_cnak(enabled); // clear NAK that might've been set by SNAK above. + }) + }); + + // Wake `Endpoint::wait_enabled()` + state.ep_in_wakers[ep_addr.index()].wake(); + } + } + } + + async fn enable(&mut self) { + trace!("enable"); + // TODO: enable the peripheral once enable/disable semantics are cleared up in embassy-usb + } + + async fn disable(&mut self) { + trace!("disable"); + + // TODO: disable the peripheral once enable/disable semantics are cleared up in embassy-usb + //Bus::disable(self); + } + + async fn remote_wakeup(&mut self) -> Result<(), Unsupported> { + Err(Unsupported) + } +} + +/// USB endpoint direction. +pub trait Dir { + /// Returns the direction value. + fn dir() -> Direction; +} + +/// Marker type for the "IN" direction. +pub enum In {} +impl Dir for In { + fn dir() -> Direction { + Direction::In + } +} + +/// Marker type for the "OUT" direction. +pub enum Out {} +impl Dir for Out { + fn dir() -> Direction { + Direction::Out + } +} + +/// USB endpoint. +pub struct Endpoint<'d, D> { + _phantom: PhantomData, + regs: Otg, + info: EndpointInfo, + state: &'d State<{ MAX_EP_COUNT }>, +} + +impl<'d> embassy_usb_driver::Endpoint for Endpoint<'d, In> { + fn info(&self) -> &EndpointInfo { + &self.info + } + + async fn wait_enabled(&mut self) { + poll_fn(|cx| { + let ep_index = self.info.addr.index(); + + self.state.ep_in_wakers[ep_index].register(cx.waker()); + + if self.regs.diepctl(ep_index).read().usbaep() { + Poll::Ready(()) + } else { + Poll::Pending + } + }) + .await + } +} + +impl<'d> embassy_usb_driver::Endpoint for Endpoint<'d, Out> { + fn info(&self) -> &EndpointInfo { + &self.info + } + + async fn wait_enabled(&mut self) { + poll_fn(|cx| { + let ep_index = self.info.addr.index(); + + self.state.ep_out_wakers[ep_index].register(cx.waker()); + + if self.regs.doepctl(ep_index).read().usbaep() { + Poll::Ready(()) + } else { + Poll::Pending + } + }) + .await + } +} + +impl<'d> embassy_usb_driver::EndpointOut for Endpoint<'d, Out> { + async fn read(&mut self, buf: &mut [u8]) -> Result { + trace!("read start len={}", buf.len()); + + poll_fn(|cx| { + let index = self.info.addr.index(); + self.state.ep_out_wakers[index].register(cx.waker()); + + let doepctl = self.regs.doepctl(index).read(); + trace!("read ep={:?}: doepctl {:08x}", self.info.addr, doepctl.0,); + if !doepctl.usbaep() { + trace!("read ep={:?} error disabled", self.info.addr); + return Poll::Ready(Err(EndpointError::Disabled)); + } + + let len = self.state.ep_out_size[index].load(Ordering::Relaxed); + if len != EP_OUT_BUFFER_EMPTY { + trace!("read ep={:?} done len={}", self.info.addr, len); + + if len as usize > buf.len() { + return Poll::Ready(Err(EndpointError::BufferOverflow)); + } + + // SAFETY: exclusive access ensured by `ep_out_size` atomic variable + let data = + unsafe { core::slice::from_raw_parts(*self.state.ep_out_buffers[index].get(), len as usize) }; + buf[..len as usize].copy_from_slice(data); + + // Release buffer + self.state.ep_out_size[index].store(EP_OUT_BUFFER_EMPTY, Ordering::Release); + + critical_section::with(|_| { + // Receive 1 packet + self.regs.doeptsiz(index).modify(|w| { + w.set_xfrsiz(self.info.max_packet_size as _); + w.set_pktcnt(1); + }); + + // Clear NAK to indicate we are ready to receive more data + self.regs.doepctl(index).modify(|w| { + w.set_cnak(true); + }); + }); + + Poll::Ready(Ok(len as usize)) + } else { + Poll::Pending + } + }) + .await + } +} + +impl<'d> embassy_usb_driver::EndpointIn for Endpoint<'d, In> { + async fn write(&mut self, buf: &[u8]) -> Result<(), EndpointError> { + trace!("write ep={:?} data={:?}", self.info.addr, buf); + + if buf.len() > self.info.max_packet_size as usize { + return Err(EndpointError::BufferOverflow); + } + + let index = self.info.addr.index(); + // Wait for previous transfer to complete and check if endpoint is disabled + poll_fn(|cx| { + self.state.ep_in_wakers[index].register(cx.waker()); + + let diepctl = self.regs.diepctl(index).read(); + let dtxfsts = self.regs.dtxfsts(index).read(); + trace!( + "write ep={:?}: diepctl {:08x} ftxfsts {:08x}", + self.info.addr, + diepctl.0, + dtxfsts.0 + ); + if !diepctl.usbaep() { + trace!("write ep={:?} wait for prev: error disabled", self.info.addr); + Poll::Ready(Err(EndpointError::Disabled)) + } else if !diepctl.epena() { + trace!("write ep={:?} wait for prev: ready", self.info.addr); + Poll::Ready(Ok(())) + } else { + trace!("write ep={:?} wait for prev: pending", self.info.addr); + Poll::Pending + } + }) + .await?; + + if buf.len() > 0 { + poll_fn(|cx| { + self.state.ep_in_wakers[index].register(cx.waker()); + + let size_words = (buf.len() + 3) / 4; + + let fifo_space = self.regs.dtxfsts(index).read().ineptfsav() as usize; + if size_words > fifo_space { + // Not enough space in fifo, enable tx fifo empty interrupt + critical_section::with(|_| { + self.regs.diepempmsk().modify(|w| { + w.set_ineptxfem(w.ineptxfem() | (1 << index)); + }); + }); + + trace!("tx fifo for ep={} full, waiting for txfe", index); + + Poll::Pending + } else { + trace!("write ep={:?} wait for fifo: ready", self.info.addr); + Poll::Ready(()) + } + }) + .await + } + + // ERRATA: Transmit data FIFO is corrupted when a write sequence to the FIFO is interrupted with + // accesses to certain OTG_FS registers. + // + // Prevent the interrupt (which might poke FIFOs) from executing while copying data to FIFOs. + critical_section::with(|_| { + // Setup transfer size + self.regs.dieptsiz(index).write(|w| { + w.set_mcnt(1); + w.set_pktcnt(1); + w.set_xfrsiz(buf.len() as _); + }); + + // Enable endpoint + self.regs.diepctl(index).modify(|w| { + w.set_cnak(true); + w.set_epena(true); + }); + + // Write data to FIFO + for chunk in buf.chunks(4) { + let mut tmp = [0u8; 4]; + tmp[0..chunk.len()].copy_from_slice(chunk); + self.regs.fifo(index).write_value(regs::Fifo(u32::from_ne_bytes(tmp))); + } + }); + + trace!("write done ep={:?}", self.info.addr); + + Ok(()) + } +} + +/// USB control pipe. +pub struct ControlPipe<'d> { + max_packet_size: u16, + regs: Otg, + ep_in: Endpoint<'d, In>, + ep_out: Endpoint<'d, Out>, + quirk_setup_late_cnak: bool, +} + +impl<'d> embassy_usb_driver::ControlPipe for ControlPipe<'d> { + fn max_packet_size(&self) -> usize { + usize::from(self.max_packet_size) + } + + async fn setup(&mut self) -> [u8; 8] { + poll_fn(|cx| { + self.ep_out.state.ep_out_wakers[0].register(cx.waker()); + + if self.ep_out.state.ep0_setup_ready.load(Ordering::Relaxed) { + let data = unsafe { *self.ep_out.state.ep0_setup_data.get() }; + self.ep_out.state.ep0_setup_ready.store(false, Ordering::Release); + + // EP0 should not be controlled by `Bus` so this RMW does not need a critical section + // Receive 1 SETUP packet + self.regs.doeptsiz(self.ep_out.info.addr.index()).modify(|w| { + w.set_rxdpid_stupcnt(1); + }); + + // Clear NAK to indicate we are ready to receive more data + if !self.quirk_setup_late_cnak { + self.regs + .doepctl(self.ep_out.info.addr.index()) + .modify(|w| w.set_cnak(true)); + } + + trace!("SETUP received: {:?}", data); + Poll::Ready(data) + } else { + trace!("SETUP waiting"); + Poll::Pending + } + }) + .await + } + + async fn data_out(&mut self, buf: &mut [u8], _first: bool, _last: bool) -> Result { + trace!("control: data_out"); + let len = self.ep_out.read(buf).await?; + trace!("control: data_out read: {:?}", &buf[..len]); + Ok(len) + } + + async fn data_in(&mut self, data: &[u8], _first: bool, last: bool) -> Result<(), EndpointError> { + trace!("control: data_in write: {:?}", data); + self.ep_in.write(data).await?; + + // wait for status response from host after sending the last packet + if last { + trace!("control: data_in waiting for status"); + self.ep_out.read(&mut []).await?; + trace!("control: complete"); + } + + Ok(()) + } + + async fn accept(&mut self) { + trace!("control: accept"); + + self.ep_in.write(&[]).await.ok(); + + trace!("control: accept OK"); + } + + async fn reject(&mut self) { + trace!("control: reject"); + + // EP0 should not be controlled by `Bus` so this RMW does not need a critical section + self.regs.diepctl(self.ep_in.info.addr.index()).modify(|w| { + w.set_stall(true); + }); + self.regs.doepctl(self.ep_out.info.addr.index()).modify(|w| { + w.set_stall(true); + }); + } + + async fn accept_set_address(&mut self, addr: u8) { + trace!("setting addr: {}", addr); + critical_section::with(|_| { + self.regs.dcfg().modify(|w| { + w.set_dad(addr); + }); + }); + + // synopsys driver requires accept to be sent after changing address + self.accept().await + } +} + +/// Translates HAL [EndpointType] into PAC [vals::Eptyp] +fn to_eptyp(ep_type: EndpointType) -> vals::Eptyp { + match ep_type { + EndpointType::Control => vals::Eptyp::CONTROL, + EndpointType::Isochronous => vals::Eptyp::ISOCHRONOUS, + EndpointType::Bulk => vals::Eptyp::BULK, + EndpointType::Interrupt => vals::Eptyp::INTERRUPT, + } +} + +/// Calculates total allocated FIFO size in words +fn ep_fifo_size(eps: &[Option]) -> u16 { + eps.iter().map(|ep| ep.map(|ep| ep.fifo_size_words).unwrap_or(0)).sum() +} + +/// Generates IRQ mask for enabled endpoints +fn ep_irq_mask(eps: &[Option]) -> u16 { + eps.iter().enumerate().fold( + 0, + |mask, (index, ep)| { + if ep.is_some() { + mask | (1 << index) + } else { + mask + } + }, + ) +} + +/// Calculates MPSIZ value for EP0, which uses special values. +fn ep0_mpsiz(max_packet_size: u16) -> u16 { + match max_packet_size { + 8 => 0b11, + 16 => 0b10, + 32 => 0b01, + 64 => 0b00, + other => panic!("Unsupported EP0 size: {}", other), + } +} + +/// The number of maximum configurable EPs. +// TODO: this should at least be configurable, but ideally not a constant. +// Using OtgInstance::ENDPOINT_COUNT requires feature(const_generic_expr) so just define maximum eps +pub const MAX_EP_COUNT: usize = 9; + +/// USB instance. +pub struct OtgInstance<'d> { + /// The USB peripheral. + pub regs: Otg, + /// The USB state. + pub state: &'d State<{ MAX_EP_COUNT }>, + /// FIFO depth in words. + pub fifo_depth_words: u16, + /// Number of used endpoints. + pub endpoint_count: usize, + /// The PHY type. + pub phy_type: PhyType, + /// Extra RX FIFO words needed by some implementations. + pub extra_rx_fifo_words: u16, + /// Whether to set up late cnak + pub quirk_setup_late_cnak: bool, + /// Function to calculate TRDT value based on some internal clock speed. + pub calculate_trdt_fn: fn(speed: vals::Dspd) -> u8, +} diff --git a/embassy-usb-synopsys-otg/src/otg_v1.rs b/embassy-usb-synopsys-otg/src/otg_v1.rs new file mode 100644 index 000000000..111bc4a63 --- /dev/null +++ b/embassy-usb-synopsys-otg/src/otg_v1.rs @@ -0,0 +1,4482 @@ +//! Register definitions for Synopsys DesignWare USB OTG core + +#![allow(missing_docs)] + +use core::marker::PhantomData; + +#[derive(Copy, Clone, PartialEq, Eq)] +pub struct RW; +#[derive(Copy, Clone, PartialEq, Eq)] +pub struct R; +#[derive(Copy, Clone, PartialEq, Eq)] +pub struct W; + +mod sealed { + use super::*; + pub trait Access {} + impl Access for R {} + impl Access for W {} + impl Access for RW {} +} + +pub trait Access: sealed::Access + Copy {} +impl Access for R {} +impl Access for W {} +impl Access for RW {} + +pub trait Read: Access {} +impl Read for RW {} +impl Read for R {} + +pub trait Write: Access {} +impl Write for RW {} +impl Write for W {} + +#[derive(Copy, Clone, PartialEq, Eq)] +pub struct Reg { + ptr: *mut u8, + phantom: PhantomData<*mut (T, A)>, +} +unsafe impl Send for Reg {} +unsafe impl Sync for Reg {} + +impl Reg { + #[allow(clippy::missing_safety_doc)] + #[inline(always)] + pub const unsafe fn from_ptr(ptr: *mut T) -> Self { + Self { + ptr: ptr as _, + phantom: PhantomData, + } + } + + #[inline(always)] + pub const fn as_ptr(&self) -> *mut T { + self.ptr as _ + } +} + +impl Reg { + #[inline(always)] + pub fn read(&self) -> T { + unsafe { (self.ptr as *mut T).read_volatile() } + } +} + +impl Reg { + #[inline(always)] + pub fn write_value(&self, val: T) { + unsafe { (self.ptr as *mut T).write_volatile(val) } + } +} + +impl Reg { + #[inline(always)] + pub fn write(&self, f: impl FnOnce(&mut T) -> R) -> R { + let mut val = Default::default(); + let res = f(&mut val); + self.write_value(val); + res + } +} + +impl Reg { + #[inline(always)] + pub fn modify(&self, f: impl FnOnce(&mut T) -> R) -> R { + let mut val = self.read(); + let res = f(&mut val); + self.write_value(val); + res + } +} + +#[doc = "USB on the go"] +#[derive(Copy, Clone, Eq, PartialEq)] +pub struct Otg { + ptr: *mut u8, +} +unsafe impl Send for Otg {} +unsafe impl Sync for Otg {} +impl Otg { + #[inline(always)] + pub const unsafe fn from_ptr(ptr: *mut ()) -> Self { + Self { ptr: ptr as _ } + } + #[inline(always)] + pub const fn as_ptr(&self) -> *mut () { + self.ptr as _ + } + #[doc = "Control and status register"] + #[inline(always)] + pub const fn gotgctl(self) -> Reg { + unsafe { Reg::from_ptr(self.ptr.add(0x0usize) as _) } + } + #[doc = "Interrupt register"] + #[inline(always)] + pub const fn gotgint(self) -> Reg { + unsafe { Reg::from_ptr(self.ptr.add(0x04usize) as _) } + } + #[doc = "AHB configuration register"] + #[inline(always)] + pub const fn gahbcfg(self) -> Reg { + unsafe { Reg::from_ptr(self.ptr.add(0x08usize) as _) } + } + #[doc = "USB configuration register"] + #[inline(always)] + pub const fn gusbcfg(self) -> Reg { + unsafe { Reg::from_ptr(self.ptr.add(0x0cusize) as _) } + } + #[doc = "Reset register"] + #[inline(always)] + pub const fn grstctl(self) -> Reg { + unsafe { Reg::from_ptr(self.ptr.add(0x10usize) as _) } + } + #[doc = "Core interrupt register"] + #[inline(always)] + pub const fn gintsts(self) -> Reg { + unsafe { Reg::from_ptr(self.ptr.add(0x14usize) as _) } + } + #[doc = "Interrupt mask register"] + #[inline(always)] + pub const fn gintmsk(self) -> Reg { + unsafe { Reg::from_ptr(self.ptr.add(0x18usize) as _) } + } + #[doc = "Receive status debug read register"] + #[inline(always)] + pub const fn grxstsr(self) -> Reg { + unsafe { Reg::from_ptr(self.ptr.add(0x1cusize) as _) } + } + #[doc = "Status read and pop register"] + #[inline(always)] + pub const fn grxstsp(self) -> Reg { + unsafe { Reg::from_ptr(self.ptr.add(0x20usize) as _) } + } + #[doc = "Receive FIFO size register"] + #[inline(always)] + pub const fn grxfsiz(self) -> Reg { + unsafe { Reg::from_ptr(self.ptr.add(0x24usize) as _) } + } + #[doc = "Endpoint 0 transmit FIFO size register (device mode)"] + #[inline(always)] + pub const fn dieptxf0(self) -> Reg { + unsafe { Reg::from_ptr(self.ptr.add(0x28usize) as _) } + } + #[doc = "Non-periodic transmit FIFO size register (host mode)"] + #[inline(always)] + pub const fn hnptxfsiz(self) -> Reg { + unsafe { Reg::from_ptr(self.ptr.add(0x28usize) as _) } + } + #[doc = "Non-periodic transmit FIFO/queue status register (host mode)"] + #[inline(always)] + pub const fn hnptxsts(self) -> Reg { + unsafe { Reg::from_ptr(self.ptr.add(0x2cusize) as _) } + } + #[doc = "OTG I2C access register"] + #[inline(always)] + pub const fn gi2cctl(self) -> Reg { + unsafe { Reg::from_ptr(self.ptr.add(0x30usize) as _) } + } + #[doc = "General core configuration register, for core_id 0x0000_1xxx"] + #[inline(always)] + pub const fn gccfg_v1(self) -> Reg { + unsafe { Reg::from_ptr(self.ptr.add(0x38usize) as _) } + } + #[doc = "General core configuration register, for core_id 0x0000_\\[23\\]xxx"] + #[inline(always)] + pub const fn gccfg_v2(self) -> Reg { + unsafe { Reg::from_ptr(self.ptr.add(0x38usize) as _) } + } + #[doc = "Core ID register"] + #[inline(always)] + pub const fn cid(self) -> Reg { + unsafe { Reg::from_ptr(self.ptr.add(0x3cusize) as _) } + } + #[doc = "OTG core LPM configuration register"] + #[inline(always)] + pub const fn glpmcfg(self) -> Reg { + unsafe { Reg::from_ptr(self.ptr.add(0x54usize) as _) } + } + #[doc = "Host periodic transmit FIFO size register"] + #[inline(always)] + pub const fn hptxfsiz(self) -> Reg { + unsafe { Reg::from_ptr(self.ptr.add(0x0100usize) as _) } + } + #[doc = "Device IN endpoint transmit FIFO size register"] + #[inline(always)] + pub const fn dieptxf(self, n: usize) -> Reg { + assert!(n < 7usize); + unsafe { Reg::from_ptr(self.ptr.add(0x0104usize + n * 4usize) as _) } + } + #[doc = "Host configuration register"] + #[inline(always)] + pub const fn hcfg(self) -> Reg { + unsafe { Reg::from_ptr(self.ptr.add(0x0400usize) as _) } + } + #[doc = "Host frame interval register"] + #[inline(always)] + pub const fn hfir(self) -> Reg { + unsafe { Reg::from_ptr(self.ptr.add(0x0404usize) as _) } + } + #[doc = "Host frame number/frame time remaining register"] + #[inline(always)] + pub const fn hfnum(self) -> Reg { + unsafe { Reg::from_ptr(self.ptr.add(0x0408usize) as _) } + } + #[doc = "Periodic transmit FIFO/queue status register"] + #[inline(always)] + pub const fn hptxsts(self) -> Reg { + unsafe { Reg::from_ptr(self.ptr.add(0x0410usize) as _) } + } + #[doc = "Host all channels interrupt register"] + #[inline(always)] + pub const fn haint(self) -> Reg { + unsafe { Reg::from_ptr(self.ptr.add(0x0414usize) as _) } + } + #[doc = "Host all channels interrupt mask register"] + #[inline(always)] + pub const fn haintmsk(self) -> Reg { + unsafe { Reg::from_ptr(self.ptr.add(0x0418usize) as _) } + } + #[doc = "Host port control and status register"] + #[inline(always)] + pub const fn hprt(self) -> Reg { + unsafe { Reg::from_ptr(self.ptr.add(0x0440usize) as _) } + } + #[doc = "Host channel characteristics register"] + #[inline(always)] + pub const fn hcchar(self, n: usize) -> Reg { + assert!(n < 12usize); + unsafe { Reg::from_ptr(self.ptr.add(0x0500usize + n * 32usize) as _) } + } + #[doc = "Host channel split control register"] + #[inline(always)] + pub const fn hcsplt(self, n: usize) -> Reg { + assert!(n < 12usize); + unsafe { Reg::from_ptr(self.ptr.add(0x0504usize + n * 32usize) as _) } + } + #[doc = "Host channel interrupt register"] + #[inline(always)] + pub const fn hcint(self, n: usize) -> Reg { + assert!(n < 12usize); + unsafe { Reg::from_ptr(self.ptr.add(0x0508usize + n * 32usize) as _) } + } + #[doc = "Host channel mask register"] + #[inline(always)] + pub const fn hcintmsk(self, n: usize) -> Reg { + assert!(n < 12usize); + unsafe { Reg::from_ptr(self.ptr.add(0x050cusize + n * 32usize) as _) } + } + #[doc = "Host channel transfer size register"] + #[inline(always)] + pub const fn hctsiz(self, n: usize) -> Reg { + assert!(n < 12usize); + unsafe { Reg::from_ptr(self.ptr.add(0x0510usize + n * 32usize) as _) } + } + #[doc = "Device configuration register"] + #[inline(always)] + pub const fn dcfg(self) -> Reg { + unsafe { Reg::from_ptr(self.ptr.add(0x0800usize) as _) } + } + #[doc = "Device control register"] + #[inline(always)] + pub const fn dctl(self) -> Reg { + unsafe { Reg::from_ptr(self.ptr.add(0x0804usize) as _) } + } + #[doc = "Device status register"] + #[inline(always)] + pub const fn dsts(self) -> Reg { + unsafe { Reg::from_ptr(self.ptr.add(0x0808usize) as _) } + } + #[doc = "Device IN endpoint common interrupt mask register"] + #[inline(always)] + pub const fn diepmsk(self) -> Reg { + unsafe { Reg::from_ptr(self.ptr.add(0x0810usize) as _) } + } + #[doc = "Device OUT endpoint common interrupt mask register"] + #[inline(always)] + pub const fn doepmsk(self) -> Reg { + unsafe { Reg::from_ptr(self.ptr.add(0x0814usize) as _) } + } + #[doc = "Device all endpoints interrupt register"] + #[inline(always)] + pub const fn daint(self) -> Reg { + unsafe { Reg::from_ptr(self.ptr.add(0x0818usize) as _) } + } + #[doc = "All endpoints interrupt mask register"] + #[inline(always)] + pub const fn daintmsk(self) -> Reg { + unsafe { Reg::from_ptr(self.ptr.add(0x081cusize) as _) } + } + #[doc = "Device VBUS discharge time register"] + #[inline(always)] + pub const fn dvbusdis(self) -> Reg { + unsafe { Reg::from_ptr(self.ptr.add(0x0828usize) as _) } + } + #[doc = "Device VBUS pulsing time register"] + #[inline(always)] + pub const fn dvbuspulse(self) -> Reg { + unsafe { Reg::from_ptr(self.ptr.add(0x082cusize) as _) } + } + #[doc = "Device IN endpoint FIFO empty interrupt mask register"] + #[inline(always)] + pub const fn diepempmsk(self) -> Reg { + unsafe { Reg::from_ptr(self.ptr.add(0x0834usize) as _) } + } + #[doc = "Device IN endpoint control register"] + #[inline(always)] + pub const fn diepctl(self, n: usize) -> Reg { + assert!(n < 16usize); + unsafe { Reg::from_ptr(self.ptr.add(0x0900usize + n * 32usize) as _) } + } + #[doc = "Device IN endpoint interrupt register"] + #[inline(always)] + pub const fn diepint(self, n: usize) -> Reg { + assert!(n < 16usize); + unsafe { Reg::from_ptr(self.ptr.add(0x0908usize + n * 32usize) as _) } + } + #[doc = "Device IN endpoint transfer size register"] + #[inline(always)] + pub const fn dieptsiz(self, n: usize) -> Reg { + assert!(n < 16usize); + unsafe { Reg::from_ptr(self.ptr.add(0x0910usize + n * 32usize) as _) } + } + #[doc = "Device IN endpoint transmit FIFO status register"] + #[inline(always)] + pub const fn dtxfsts(self, n: usize) -> Reg { + assert!(n < 16usize); + unsafe { Reg::from_ptr(self.ptr.add(0x0918usize + n * 32usize) as _) } + } + #[doc = "Device OUT endpoint control register"] + #[inline(always)] + pub const fn doepctl(self, n: usize) -> Reg { + assert!(n < 16usize); + unsafe { Reg::from_ptr(self.ptr.add(0x0b00usize + n * 32usize) as _) } + } + #[doc = "Device OUT endpoint interrupt register"] + #[inline(always)] + pub const fn doepint(self, n: usize) -> Reg { + assert!(n < 16usize); + unsafe { Reg::from_ptr(self.ptr.add(0x0b08usize + n * 32usize) as _) } + } + #[doc = "Device OUT endpoint transfer size register"] + #[inline(always)] + pub const fn doeptsiz(self, n: usize) -> Reg { + assert!(n < 16usize); + unsafe { Reg::from_ptr(self.ptr.add(0x0b10usize + n * 32usize) as _) } + } + #[doc = "Power and clock gating control register"] + #[inline(always)] + pub const fn pcgcctl(self) -> Reg { + unsafe { Reg::from_ptr(self.ptr.add(0x0e00usize) as _) } + } + #[doc = "Device endpoint / host channel FIFO register"] + #[inline(always)] + pub const fn fifo(self, n: usize) -> Reg { + assert!(n < 16usize); + unsafe { Reg::from_ptr(self.ptr.add(0x1000usize + n * 4096usize) as _) } + } +} +pub mod regs { + #[doc = "Core ID register"] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct Cid(pub u32); + impl Cid { + #[doc = "Product ID field"] + #[inline(always)] + pub const fn product_id(&self) -> u32 { + let val = (self.0 >> 0usize) & 0xffff_ffff; + val as u32 + } + #[doc = "Product ID field"] + #[inline(always)] + pub fn set_product_id(&mut self, val: u32) { + self.0 = (self.0 & !(0xffff_ffff << 0usize)) | (((val as u32) & 0xffff_ffff) << 0usize); + } + } + impl Default for Cid { + #[inline(always)] + fn default() -> Cid { + Cid(0) + } + } + #[doc = "Device all endpoints interrupt register"] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct Daint(pub u32); + impl Daint { + #[doc = "IN endpoint interrupt bits"] + #[inline(always)] + pub const fn iepint(&self) -> u16 { + let val = (self.0 >> 0usize) & 0xffff; + val as u16 + } + #[doc = "IN endpoint interrupt bits"] + #[inline(always)] + pub fn set_iepint(&mut self, val: u16) { + self.0 = (self.0 & !(0xffff << 0usize)) | (((val as u32) & 0xffff) << 0usize); + } + #[doc = "OUT endpoint interrupt bits"] + #[inline(always)] + pub const fn oepint(&self) -> u16 { + let val = (self.0 >> 16usize) & 0xffff; + val as u16 + } + #[doc = "OUT endpoint interrupt bits"] + #[inline(always)] + pub fn set_oepint(&mut self, val: u16) { + self.0 = (self.0 & !(0xffff << 16usize)) | (((val as u32) & 0xffff) << 16usize); + } + } + impl Default for Daint { + #[inline(always)] + fn default() -> Daint { + Daint(0) + } + } + #[doc = "All endpoints interrupt mask register"] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct Daintmsk(pub u32); + impl Daintmsk { + #[doc = "IN EP interrupt mask bits"] + #[inline(always)] + pub const fn iepm(&self) -> u16 { + let val = (self.0 >> 0usize) & 0xffff; + val as u16 + } + #[doc = "IN EP interrupt mask bits"] + #[inline(always)] + pub fn set_iepm(&mut self, val: u16) { + self.0 = (self.0 & !(0xffff << 0usize)) | (((val as u32) & 0xffff) << 0usize); + } + #[doc = "OUT EP interrupt mask bits"] + #[inline(always)] + pub const fn oepm(&self) -> u16 { + let val = (self.0 >> 16usize) & 0xffff; + val as u16 + } + #[doc = "OUT EP interrupt mask bits"] + #[inline(always)] + pub fn set_oepm(&mut self, val: u16) { + self.0 = (self.0 & !(0xffff << 16usize)) | (((val as u32) & 0xffff) << 16usize); + } + } + impl Default for Daintmsk { + #[inline(always)] + fn default() -> Daintmsk { + Daintmsk(0) + } + } + #[doc = "Device configuration register"] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct Dcfg(pub u32); + impl Dcfg { + #[doc = "Device speed"] + #[inline(always)] + pub const fn dspd(&self) -> super::vals::Dspd { + let val = (self.0 >> 0usize) & 0x03; + super::vals::Dspd::from_bits(val as u8) + } + #[doc = "Device speed"] + #[inline(always)] + pub fn set_dspd(&mut self, val: super::vals::Dspd) { + self.0 = (self.0 & !(0x03 << 0usize)) | (((val.to_bits() as u32) & 0x03) << 0usize); + } + #[doc = "Non-zero-length status OUT handshake"] + #[inline(always)] + pub const fn nzlsohsk(&self) -> bool { + let val = (self.0 >> 2usize) & 0x01; + val != 0 + } + #[doc = "Non-zero-length status OUT handshake"] + #[inline(always)] + pub fn set_nzlsohsk(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 2usize)) | (((val as u32) & 0x01) << 2usize); + } + #[doc = "Device address"] + #[inline(always)] + pub const fn dad(&self) -> u8 { + let val = (self.0 >> 4usize) & 0x7f; + val as u8 + } + #[doc = "Device address"] + #[inline(always)] + pub fn set_dad(&mut self, val: u8) { + self.0 = (self.0 & !(0x7f << 4usize)) | (((val as u32) & 0x7f) << 4usize); + } + #[doc = "Periodic frame interval"] + #[inline(always)] + pub const fn pfivl(&self) -> super::vals::Pfivl { + let val = (self.0 >> 11usize) & 0x03; + super::vals::Pfivl::from_bits(val as u8) + } + #[doc = "Periodic frame interval"] + #[inline(always)] + pub fn set_pfivl(&mut self, val: super::vals::Pfivl) { + self.0 = (self.0 & !(0x03 << 11usize)) | (((val.to_bits() as u32) & 0x03) << 11usize); + } + #[doc = "Transceiver delay"] + #[inline(always)] + pub const fn xcvrdly(&self) -> bool { + let val = (self.0 >> 14usize) & 0x01; + val != 0 + } + #[doc = "Transceiver delay"] + #[inline(always)] + pub fn set_xcvrdly(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 14usize)) | (((val as u32) & 0x01) << 14usize); + } + } + impl Default for Dcfg { + #[inline(always)] + fn default() -> Dcfg { + Dcfg(0) + } + } + #[doc = "Device control register"] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct Dctl(pub u32); + impl Dctl { + #[doc = "Remote wakeup signaling"] + #[inline(always)] + pub const fn rwusig(&self) -> bool { + let val = (self.0 >> 0usize) & 0x01; + val != 0 + } + #[doc = "Remote wakeup signaling"] + #[inline(always)] + pub fn set_rwusig(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize); + } + #[doc = "Soft disconnect"] + #[inline(always)] + pub const fn sdis(&self) -> bool { + let val = (self.0 >> 1usize) & 0x01; + val != 0 + } + #[doc = "Soft disconnect"] + #[inline(always)] + pub fn set_sdis(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 1usize)) | (((val as u32) & 0x01) << 1usize); + } + #[doc = "Global IN NAK status"] + #[inline(always)] + pub const fn ginsts(&self) -> bool { + let val = (self.0 >> 2usize) & 0x01; + val != 0 + } + #[doc = "Global IN NAK status"] + #[inline(always)] + pub fn set_ginsts(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 2usize)) | (((val as u32) & 0x01) << 2usize); + } + #[doc = "Global OUT NAK status"] + #[inline(always)] + pub const fn gonsts(&self) -> bool { + let val = (self.0 >> 3usize) & 0x01; + val != 0 + } + #[doc = "Global OUT NAK status"] + #[inline(always)] + pub fn set_gonsts(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 3usize)) | (((val as u32) & 0x01) << 3usize); + } + #[doc = "Test control"] + #[inline(always)] + pub const fn tctl(&self) -> u8 { + let val = (self.0 >> 4usize) & 0x07; + val as u8 + } + #[doc = "Test control"] + #[inline(always)] + pub fn set_tctl(&mut self, val: u8) { + self.0 = (self.0 & !(0x07 << 4usize)) | (((val as u32) & 0x07) << 4usize); + } + #[doc = "Set global IN NAK"] + #[inline(always)] + pub const fn sginak(&self) -> bool { + let val = (self.0 >> 7usize) & 0x01; + val != 0 + } + #[doc = "Set global IN NAK"] + #[inline(always)] + pub fn set_sginak(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 7usize)) | (((val as u32) & 0x01) << 7usize); + } + #[doc = "Clear global IN NAK"] + #[inline(always)] + pub const fn cginak(&self) -> bool { + let val = (self.0 >> 8usize) & 0x01; + val != 0 + } + #[doc = "Clear global IN NAK"] + #[inline(always)] + pub fn set_cginak(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 8usize)) | (((val as u32) & 0x01) << 8usize); + } + #[doc = "Set global OUT NAK"] + #[inline(always)] + pub const fn sgonak(&self) -> bool { + let val = (self.0 >> 9usize) & 0x01; + val != 0 + } + #[doc = "Set global OUT NAK"] + #[inline(always)] + pub fn set_sgonak(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 9usize)) | (((val as u32) & 0x01) << 9usize); + } + #[doc = "Clear global OUT NAK"] + #[inline(always)] + pub const fn cgonak(&self) -> bool { + let val = (self.0 >> 10usize) & 0x01; + val != 0 + } + #[doc = "Clear global OUT NAK"] + #[inline(always)] + pub fn set_cgonak(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 10usize)) | (((val as u32) & 0x01) << 10usize); + } + #[doc = "Power-on programming done"] + #[inline(always)] + pub const fn poprgdne(&self) -> bool { + let val = (self.0 >> 11usize) & 0x01; + val != 0 + } + #[doc = "Power-on programming done"] + #[inline(always)] + pub fn set_poprgdne(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 11usize)) | (((val as u32) & 0x01) << 11usize); + } + } + impl Default for Dctl { + #[inline(always)] + fn default() -> Dctl { + Dctl(0) + } + } + #[doc = "Device endpoint control register"] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct Diepctl(pub u32); + impl Diepctl { + #[doc = "MPSIZ"] + #[inline(always)] + pub const fn mpsiz(&self) -> u16 { + let val = (self.0 >> 0usize) & 0x07ff; + val as u16 + } + #[doc = "MPSIZ"] + #[inline(always)] + pub fn set_mpsiz(&mut self, val: u16) { + self.0 = (self.0 & !(0x07ff << 0usize)) | (((val as u32) & 0x07ff) << 0usize); + } + #[doc = "USBAEP"] + #[inline(always)] + pub const fn usbaep(&self) -> bool { + let val = (self.0 >> 15usize) & 0x01; + val != 0 + } + #[doc = "USBAEP"] + #[inline(always)] + pub fn set_usbaep(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 15usize)) | (((val as u32) & 0x01) << 15usize); + } + #[doc = "EONUM/DPID"] + #[inline(always)] + pub const fn eonum_dpid(&self) -> bool { + let val = (self.0 >> 16usize) & 0x01; + val != 0 + } + #[doc = "EONUM/DPID"] + #[inline(always)] + pub fn set_eonum_dpid(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 16usize)) | (((val as u32) & 0x01) << 16usize); + } + #[doc = "NAKSTS"] + #[inline(always)] + pub const fn naksts(&self) -> bool { + let val = (self.0 >> 17usize) & 0x01; + val != 0 + } + #[doc = "NAKSTS"] + #[inline(always)] + pub fn set_naksts(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 17usize)) | (((val as u32) & 0x01) << 17usize); + } + #[doc = "EPTYP"] + #[inline(always)] + pub const fn eptyp(&self) -> super::vals::Eptyp { + let val = (self.0 >> 18usize) & 0x03; + super::vals::Eptyp::from_bits(val as u8) + } + #[doc = "EPTYP"] + #[inline(always)] + pub fn set_eptyp(&mut self, val: super::vals::Eptyp) { + self.0 = (self.0 & !(0x03 << 18usize)) | (((val.to_bits() as u32) & 0x03) << 18usize); + } + #[doc = "SNPM"] + #[inline(always)] + pub const fn snpm(&self) -> bool { + let val = (self.0 >> 20usize) & 0x01; + val != 0 + } + #[doc = "SNPM"] + #[inline(always)] + pub fn set_snpm(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 20usize)) | (((val as u32) & 0x01) << 20usize); + } + #[doc = "STALL"] + #[inline(always)] + pub const fn stall(&self) -> bool { + let val = (self.0 >> 21usize) & 0x01; + val != 0 + } + #[doc = "STALL"] + #[inline(always)] + pub fn set_stall(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 21usize)) | (((val as u32) & 0x01) << 21usize); + } + #[doc = "TXFNUM"] + #[inline(always)] + pub const fn txfnum(&self) -> u8 { + let val = (self.0 >> 22usize) & 0x0f; + val as u8 + } + #[doc = "TXFNUM"] + #[inline(always)] + pub fn set_txfnum(&mut self, val: u8) { + self.0 = (self.0 & !(0x0f << 22usize)) | (((val as u32) & 0x0f) << 22usize); + } + #[doc = "CNAK"] + #[inline(always)] + pub const fn cnak(&self) -> bool { + let val = (self.0 >> 26usize) & 0x01; + val != 0 + } + #[doc = "CNAK"] + #[inline(always)] + pub fn set_cnak(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 26usize)) | (((val as u32) & 0x01) << 26usize); + } + #[doc = "SNAK"] + #[inline(always)] + pub const fn snak(&self) -> bool { + let val = (self.0 >> 27usize) & 0x01; + val != 0 + } + #[doc = "SNAK"] + #[inline(always)] + pub fn set_snak(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 27usize)) | (((val as u32) & 0x01) << 27usize); + } + #[doc = "SD0PID/SEVNFRM"] + #[inline(always)] + pub const fn sd0pid_sevnfrm(&self) -> bool { + let val = (self.0 >> 28usize) & 0x01; + val != 0 + } + #[doc = "SD0PID/SEVNFRM"] + #[inline(always)] + pub fn set_sd0pid_sevnfrm(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 28usize)) | (((val as u32) & 0x01) << 28usize); + } + #[doc = "SODDFRM/SD1PID"] + #[inline(always)] + pub const fn soddfrm_sd1pid(&self) -> bool { + let val = (self.0 >> 29usize) & 0x01; + val != 0 + } + #[doc = "SODDFRM/SD1PID"] + #[inline(always)] + pub fn set_soddfrm_sd1pid(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 29usize)) | (((val as u32) & 0x01) << 29usize); + } + #[doc = "EPDIS"] + #[inline(always)] + pub const fn epdis(&self) -> bool { + let val = (self.0 >> 30usize) & 0x01; + val != 0 + } + #[doc = "EPDIS"] + #[inline(always)] + pub fn set_epdis(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 30usize)) | (((val as u32) & 0x01) << 30usize); + } + #[doc = "EPENA"] + #[inline(always)] + pub const fn epena(&self) -> bool { + let val = (self.0 >> 31usize) & 0x01; + val != 0 + } + #[doc = "EPENA"] + #[inline(always)] + pub fn set_epena(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 31usize)) | (((val as u32) & 0x01) << 31usize); + } + } + impl Default for Diepctl { + #[inline(always)] + fn default() -> Diepctl { + Diepctl(0) + } + } + #[doc = "Device IN endpoint FIFO empty interrupt mask register"] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct Diepempmsk(pub u32); + impl Diepempmsk { + #[doc = "IN EP Tx FIFO empty interrupt mask bits"] + #[inline(always)] + pub const fn ineptxfem(&self) -> u16 { + let val = (self.0 >> 0usize) & 0xffff; + val as u16 + } + #[doc = "IN EP Tx FIFO empty interrupt mask bits"] + #[inline(always)] + pub fn set_ineptxfem(&mut self, val: u16) { + self.0 = (self.0 & !(0xffff << 0usize)) | (((val as u32) & 0xffff) << 0usize); + } + } + impl Default for Diepempmsk { + #[inline(always)] + fn default() -> Diepempmsk { + Diepempmsk(0) + } + } + #[doc = "Device endpoint interrupt register"] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct Diepint(pub u32); + impl Diepint { + #[doc = "XFRC"] + #[inline(always)] + pub const fn xfrc(&self) -> bool { + let val = (self.0 >> 0usize) & 0x01; + val != 0 + } + #[doc = "XFRC"] + #[inline(always)] + pub fn set_xfrc(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize); + } + #[doc = "EPDISD"] + #[inline(always)] + pub const fn epdisd(&self) -> bool { + let val = (self.0 >> 1usize) & 0x01; + val != 0 + } + #[doc = "EPDISD"] + #[inline(always)] + pub fn set_epdisd(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 1usize)) | (((val as u32) & 0x01) << 1usize); + } + #[doc = "TOC"] + #[inline(always)] + pub const fn toc(&self) -> bool { + let val = (self.0 >> 3usize) & 0x01; + val != 0 + } + #[doc = "TOC"] + #[inline(always)] + pub fn set_toc(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 3usize)) | (((val as u32) & 0x01) << 3usize); + } + #[doc = "ITTXFE"] + #[inline(always)] + pub const fn ittxfe(&self) -> bool { + let val = (self.0 >> 4usize) & 0x01; + val != 0 + } + #[doc = "ITTXFE"] + #[inline(always)] + pub fn set_ittxfe(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 4usize)) | (((val as u32) & 0x01) << 4usize); + } + #[doc = "INEPNE"] + #[inline(always)] + pub const fn inepne(&self) -> bool { + let val = (self.0 >> 6usize) & 0x01; + val != 0 + } + #[doc = "INEPNE"] + #[inline(always)] + pub fn set_inepne(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 6usize)) | (((val as u32) & 0x01) << 6usize); + } + #[doc = "TXFE"] + #[inline(always)] + pub const fn txfe(&self) -> bool { + let val = (self.0 >> 7usize) & 0x01; + val != 0 + } + #[doc = "TXFE"] + #[inline(always)] + pub fn set_txfe(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 7usize)) | (((val as u32) & 0x01) << 7usize); + } + } + impl Default for Diepint { + #[inline(always)] + fn default() -> Diepint { + Diepint(0) + } + } + #[doc = "Device IN endpoint common interrupt mask register"] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct Diepmsk(pub u32); + impl Diepmsk { + #[doc = "Transfer completed interrupt mask"] + #[inline(always)] + pub const fn xfrcm(&self) -> bool { + let val = (self.0 >> 0usize) & 0x01; + val != 0 + } + #[doc = "Transfer completed interrupt mask"] + #[inline(always)] + pub fn set_xfrcm(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize); + } + #[doc = "Endpoint disabled interrupt mask"] + #[inline(always)] + pub const fn epdm(&self) -> bool { + let val = (self.0 >> 1usize) & 0x01; + val != 0 + } + #[doc = "Endpoint disabled interrupt mask"] + #[inline(always)] + pub fn set_epdm(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 1usize)) | (((val as u32) & 0x01) << 1usize); + } + #[doc = "Timeout condition mask (Non-isochronous endpoints)"] + #[inline(always)] + pub const fn tom(&self) -> bool { + let val = (self.0 >> 3usize) & 0x01; + val != 0 + } + #[doc = "Timeout condition mask (Non-isochronous endpoints)"] + #[inline(always)] + pub fn set_tom(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 3usize)) | (((val as u32) & 0x01) << 3usize); + } + #[doc = "IN token received when TxFIFO empty mask"] + #[inline(always)] + pub const fn ittxfemsk(&self) -> bool { + let val = (self.0 >> 4usize) & 0x01; + val != 0 + } + #[doc = "IN token received when TxFIFO empty mask"] + #[inline(always)] + pub fn set_ittxfemsk(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 4usize)) | (((val as u32) & 0x01) << 4usize); + } + #[doc = "IN token received with EP mismatch mask"] + #[inline(always)] + pub const fn inepnmm(&self) -> bool { + let val = (self.0 >> 5usize) & 0x01; + val != 0 + } + #[doc = "IN token received with EP mismatch mask"] + #[inline(always)] + pub fn set_inepnmm(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 5usize)) | (((val as u32) & 0x01) << 5usize); + } + #[doc = "IN endpoint NAK effective mask"] + #[inline(always)] + pub const fn inepnem(&self) -> bool { + let val = (self.0 >> 6usize) & 0x01; + val != 0 + } + #[doc = "IN endpoint NAK effective mask"] + #[inline(always)] + pub fn set_inepnem(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 6usize)) | (((val as u32) & 0x01) << 6usize); + } + } + impl Default for Diepmsk { + #[inline(always)] + fn default() -> Diepmsk { + Diepmsk(0) + } + } + #[doc = "Device endpoint transfer size register"] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct Dieptsiz(pub u32); + impl Dieptsiz { + #[doc = "Transfer size"] + #[inline(always)] + pub const fn xfrsiz(&self) -> u32 { + let val = (self.0 >> 0usize) & 0x0007_ffff; + val as u32 + } + #[doc = "Transfer size"] + #[inline(always)] + pub fn set_xfrsiz(&mut self, val: u32) { + self.0 = (self.0 & !(0x0007_ffff << 0usize)) | (((val as u32) & 0x0007_ffff) << 0usize); + } + #[doc = "Packet count"] + #[inline(always)] + pub const fn pktcnt(&self) -> u16 { + let val = (self.0 >> 19usize) & 0x03ff; + val as u16 + } + #[doc = "Packet count"] + #[inline(always)] + pub fn set_pktcnt(&mut self, val: u16) { + self.0 = (self.0 & !(0x03ff << 19usize)) | (((val as u32) & 0x03ff) << 19usize); + } + #[doc = "Multi count"] + #[inline(always)] + pub const fn mcnt(&self) -> u8 { + let val = (self.0 >> 29usize) & 0x03; + val as u8 + } + #[doc = "Multi count"] + #[inline(always)] + pub fn set_mcnt(&mut self, val: u8) { + self.0 = (self.0 & !(0x03 << 29usize)) | (((val as u32) & 0x03) << 29usize); + } + } + impl Default for Dieptsiz { + #[inline(always)] + fn default() -> Dieptsiz { + Dieptsiz(0) + } + } + #[doc = "Device endpoint control register"] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct Doepctl(pub u32); + impl Doepctl { + #[doc = "MPSIZ"] + #[inline(always)] + pub const fn mpsiz(&self) -> u16 { + let val = (self.0 >> 0usize) & 0x07ff; + val as u16 + } + #[doc = "MPSIZ"] + #[inline(always)] + pub fn set_mpsiz(&mut self, val: u16) { + self.0 = (self.0 & !(0x07ff << 0usize)) | (((val as u32) & 0x07ff) << 0usize); + } + #[doc = "USBAEP"] + #[inline(always)] + pub const fn usbaep(&self) -> bool { + let val = (self.0 >> 15usize) & 0x01; + val != 0 + } + #[doc = "USBAEP"] + #[inline(always)] + pub fn set_usbaep(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 15usize)) | (((val as u32) & 0x01) << 15usize); + } + #[doc = "EONUM/DPID"] + #[inline(always)] + pub const fn eonum_dpid(&self) -> bool { + let val = (self.0 >> 16usize) & 0x01; + val != 0 + } + #[doc = "EONUM/DPID"] + #[inline(always)] + pub fn set_eonum_dpid(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 16usize)) | (((val as u32) & 0x01) << 16usize); + } + #[doc = "NAKSTS"] + #[inline(always)] + pub const fn naksts(&self) -> bool { + let val = (self.0 >> 17usize) & 0x01; + val != 0 + } + #[doc = "NAKSTS"] + #[inline(always)] + pub fn set_naksts(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 17usize)) | (((val as u32) & 0x01) << 17usize); + } + #[doc = "EPTYP"] + #[inline(always)] + pub const fn eptyp(&self) -> super::vals::Eptyp { + let val = (self.0 >> 18usize) & 0x03; + super::vals::Eptyp::from_bits(val as u8) + } + #[doc = "EPTYP"] + #[inline(always)] + pub fn set_eptyp(&mut self, val: super::vals::Eptyp) { + self.0 = (self.0 & !(0x03 << 18usize)) | (((val.to_bits() as u32) & 0x03) << 18usize); + } + #[doc = "SNPM"] + #[inline(always)] + pub const fn snpm(&self) -> bool { + let val = (self.0 >> 20usize) & 0x01; + val != 0 + } + #[doc = "SNPM"] + #[inline(always)] + pub fn set_snpm(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 20usize)) | (((val as u32) & 0x01) << 20usize); + } + #[doc = "STALL"] + #[inline(always)] + pub const fn stall(&self) -> bool { + let val = (self.0 >> 21usize) & 0x01; + val != 0 + } + #[doc = "STALL"] + #[inline(always)] + pub fn set_stall(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 21usize)) | (((val as u32) & 0x01) << 21usize); + } + #[doc = "CNAK"] + #[inline(always)] + pub const fn cnak(&self) -> bool { + let val = (self.0 >> 26usize) & 0x01; + val != 0 + } + #[doc = "CNAK"] + #[inline(always)] + pub fn set_cnak(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 26usize)) | (((val as u32) & 0x01) << 26usize); + } + #[doc = "SNAK"] + #[inline(always)] + pub const fn snak(&self) -> bool { + let val = (self.0 >> 27usize) & 0x01; + val != 0 + } + #[doc = "SNAK"] + #[inline(always)] + pub fn set_snak(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 27usize)) | (((val as u32) & 0x01) << 27usize); + } + #[doc = "SD0PID/SEVNFRM"] + #[inline(always)] + pub const fn sd0pid_sevnfrm(&self) -> bool { + let val = (self.0 >> 28usize) & 0x01; + val != 0 + } + #[doc = "SD0PID/SEVNFRM"] + #[inline(always)] + pub fn set_sd0pid_sevnfrm(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 28usize)) | (((val as u32) & 0x01) << 28usize); + } + #[doc = "SODDFRM"] + #[inline(always)] + pub const fn soddfrm(&self) -> bool { + let val = (self.0 >> 29usize) & 0x01; + val != 0 + } + #[doc = "SODDFRM"] + #[inline(always)] + pub fn set_soddfrm(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 29usize)) | (((val as u32) & 0x01) << 29usize); + } + #[doc = "EPDIS"] + #[inline(always)] + pub const fn epdis(&self) -> bool { + let val = (self.0 >> 30usize) & 0x01; + val != 0 + } + #[doc = "EPDIS"] + #[inline(always)] + pub fn set_epdis(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 30usize)) | (((val as u32) & 0x01) << 30usize); + } + #[doc = "EPENA"] + #[inline(always)] + pub const fn epena(&self) -> bool { + let val = (self.0 >> 31usize) & 0x01; + val != 0 + } + #[doc = "EPENA"] + #[inline(always)] + pub fn set_epena(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 31usize)) | (((val as u32) & 0x01) << 31usize); + } + } + impl Default for Doepctl { + #[inline(always)] + fn default() -> Doepctl { + Doepctl(0) + } + } + #[doc = "Device endpoint interrupt register"] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct Doepint(pub u32); + impl Doepint { + #[doc = "XFRC"] + #[inline(always)] + pub const fn xfrc(&self) -> bool { + let val = (self.0 >> 0usize) & 0x01; + val != 0 + } + #[doc = "XFRC"] + #[inline(always)] + pub fn set_xfrc(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize); + } + #[doc = "EPDISD"] + #[inline(always)] + pub const fn epdisd(&self) -> bool { + let val = (self.0 >> 1usize) & 0x01; + val != 0 + } + #[doc = "EPDISD"] + #[inline(always)] + pub fn set_epdisd(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 1usize)) | (((val as u32) & 0x01) << 1usize); + } + #[doc = "STUP"] + #[inline(always)] + pub const fn stup(&self) -> bool { + let val = (self.0 >> 3usize) & 0x01; + val != 0 + } + #[doc = "STUP"] + #[inline(always)] + pub fn set_stup(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 3usize)) | (((val as u32) & 0x01) << 3usize); + } + #[doc = "OTEPDIS"] + #[inline(always)] + pub const fn otepdis(&self) -> bool { + let val = (self.0 >> 4usize) & 0x01; + val != 0 + } + #[doc = "OTEPDIS"] + #[inline(always)] + pub fn set_otepdis(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 4usize)) | (((val as u32) & 0x01) << 4usize); + } + #[doc = "B2BSTUP"] + #[inline(always)] + pub const fn b2bstup(&self) -> bool { + let val = (self.0 >> 6usize) & 0x01; + val != 0 + } + #[doc = "B2BSTUP"] + #[inline(always)] + pub fn set_b2bstup(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 6usize)) | (((val as u32) & 0x01) << 6usize); + } + } + impl Default for Doepint { + #[inline(always)] + fn default() -> Doepint { + Doepint(0) + } + } + #[doc = "Device OUT endpoint common interrupt mask register"] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct Doepmsk(pub u32); + impl Doepmsk { + #[doc = "Transfer completed interrupt mask"] + #[inline(always)] + pub const fn xfrcm(&self) -> bool { + let val = (self.0 >> 0usize) & 0x01; + val != 0 + } + #[doc = "Transfer completed interrupt mask"] + #[inline(always)] + pub fn set_xfrcm(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize); + } + #[doc = "Endpoint disabled interrupt mask"] + #[inline(always)] + pub const fn epdm(&self) -> bool { + let val = (self.0 >> 1usize) & 0x01; + val != 0 + } + #[doc = "Endpoint disabled interrupt mask"] + #[inline(always)] + pub fn set_epdm(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 1usize)) | (((val as u32) & 0x01) << 1usize); + } + #[doc = "SETUP phase done mask"] + #[inline(always)] + pub const fn stupm(&self) -> bool { + let val = (self.0 >> 3usize) & 0x01; + val != 0 + } + #[doc = "SETUP phase done mask"] + #[inline(always)] + pub fn set_stupm(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 3usize)) | (((val as u32) & 0x01) << 3usize); + } + #[doc = "OUT token received when endpoint disabled mask"] + #[inline(always)] + pub const fn otepdm(&self) -> bool { + let val = (self.0 >> 4usize) & 0x01; + val != 0 + } + #[doc = "OUT token received when endpoint disabled mask"] + #[inline(always)] + pub fn set_otepdm(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 4usize)) | (((val as u32) & 0x01) << 4usize); + } + } + impl Default for Doepmsk { + #[inline(always)] + fn default() -> Doepmsk { + Doepmsk(0) + } + } + #[doc = "Device OUT endpoint transfer size register"] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct Doeptsiz(pub u32); + impl Doeptsiz { + #[doc = "Transfer size"] + #[inline(always)] + pub const fn xfrsiz(&self) -> u32 { + let val = (self.0 >> 0usize) & 0x0007_ffff; + val as u32 + } + #[doc = "Transfer size"] + #[inline(always)] + pub fn set_xfrsiz(&mut self, val: u32) { + self.0 = (self.0 & !(0x0007_ffff << 0usize)) | (((val as u32) & 0x0007_ffff) << 0usize); + } + #[doc = "Packet count"] + #[inline(always)] + pub const fn pktcnt(&self) -> u16 { + let val = (self.0 >> 19usize) & 0x03ff; + val as u16 + } + #[doc = "Packet count"] + #[inline(always)] + pub fn set_pktcnt(&mut self, val: u16) { + self.0 = (self.0 & !(0x03ff << 19usize)) | (((val as u32) & 0x03ff) << 19usize); + } + #[doc = "Received data PID/SETUP packet count"] + #[inline(always)] + pub const fn rxdpid_stupcnt(&self) -> u8 { + let val = (self.0 >> 29usize) & 0x03; + val as u8 + } + #[doc = "Received data PID/SETUP packet count"] + #[inline(always)] + pub fn set_rxdpid_stupcnt(&mut self, val: u8) { + self.0 = (self.0 & !(0x03 << 29usize)) | (((val as u32) & 0x03) << 29usize); + } + } + impl Default for Doeptsiz { + #[inline(always)] + fn default() -> Doeptsiz { + Doeptsiz(0) + } + } + #[doc = "Device status register"] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct Dsts(pub u32); + impl Dsts { + #[doc = "Suspend status"] + #[inline(always)] + pub const fn suspsts(&self) -> bool { + let val = (self.0 >> 0usize) & 0x01; + val != 0 + } + #[doc = "Suspend status"] + #[inline(always)] + pub fn set_suspsts(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize); + } + #[doc = "Enumerated speed"] + #[inline(always)] + pub const fn enumspd(&self) -> super::vals::Dspd { + let val = (self.0 >> 1usize) & 0x03; + super::vals::Dspd::from_bits(val as u8) + } + #[doc = "Enumerated speed"] + #[inline(always)] + pub fn set_enumspd(&mut self, val: super::vals::Dspd) { + self.0 = (self.0 & !(0x03 << 1usize)) | (((val.to_bits() as u32) & 0x03) << 1usize); + } + #[doc = "Erratic error"] + #[inline(always)] + pub const fn eerr(&self) -> bool { + let val = (self.0 >> 3usize) & 0x01; + val != 0 + } + #[doc = "Erratic error"] + #[inline(always)] + pub fn set_eerr(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 3usize)) | (((val as u32) & 0x01) << 3usize); + } + #[doc = "Frame number of the received SOF"] + #[inline(always)] + pub const fn fnsof(&self) -> u16 { + let val = (self.0 >> 8usize) & 0x3fff; + val as u16 + } + #[doc = "Frame number of the received SOF"] + #[inline(always)] + pub fn set_fnsof(&mut self, val: u16) { + self.0 = (self.0 & !(0x3fff << 8usize)) | (((val as u32) & 0x3fff) << 8usize); + } + } + impl Default for Dsts { + #[inline(always)] + fn default() -> Dsts { + Dsts(0) + } + } + #[doc = "Device IN endpoint transmit FIFO status register"] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct Dtxfsts(pub u32); + impl Dtxfsts { + #[doc = "IN endpoint TxFIFO space available"] + #[inline(always)] + pub const fn ineptfsav(&self) -> u16 { + let val = (self.0 >> 0usize) & 0xffff; + val as u16 + } + #[doc = "IN endpoint TxFIFO space available"] + #[inline(always)] + pub fn set_ineptfsav(&mut self, val: u16) { + self.0 = (self.0 & !(0xffff << 0usize)) | (((val as u32) & 0xffff) << 0usize); + } + } + impl Default for Dtxfsts { + #[inline(always)] + fn default() -> Dtxfsts { + Dtxfsts(0) + } + } + #[doc = "Device VBUS discharge time register"] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct Dvbusdis(pub u32); + impl Dvbusdis { + #[doc = "Device VBUS discharge time"] + #[inline(always)] + pub const fn vbusdt(&self) -> u16 { + let val = (self.0 >> 0usize) & 0xffff; + val as u16 + } + #[doc = "Device VBUS discharge time"] + #[inline(always)] + pub fn set_vbusdt(&mut self, val: u16) { + self.0 = (self.0 & !(0xffff << 0usize)) | (((val as u32) & 0xffff) << 0usize); + } + } + impl Default for Dvbusdis { + #[inline(always)] + fn default() -> Dvbusdis { + Dvbusdis(0) + } + } + #[doc = "Device VBUS pulsing time register"] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct Dvbuspulse(pub u32); + impl Dvbuspulse { + #[doc = "Device VBUS pulsing time"] + #[inline(always)] + pub const fn dvbusp(&self) -> u16 { + let val = (self.0 >> 0usize) & 0x0fff; + val as u16 + } + #[doc = "Device VBUS pulsing time"] + #[inline(always)] + pub fn set_dvbusp(&mut self, val: u16) { + self.0 = (self.0 & !(0x0fff << 0usize)) | (((val as u32) & 0x0fff) << 0usize); + } + } + impl Default for Dvbuspulse { + #[inline(always)] + fn default() -> Dvbuspulse { + Dvbuspulse(0) + } + } + #[doc = "FIFO register"] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct Fifo(pub u32); + impl Fifo { + #[doc = "Data"] + #[inline(always)] + pub const fn data(&self) -> u32 { + let val = (self.0 >> 0usize) & 0xffff_ffff; + val as u32 + } + #[doc = "Data"] + #[inline(always)] + pub fn set_data(&mut self, val: u32) { + self.0 = (self.0 & !(0xffff_ffff << 0usize)) | (((val as u32) & 0xffff_ffff) << 0usize); + } + } + impl Default for Fifo { + #[inline(always)] + fn default() -> Fifo { + Fifo(0) + } + } + #[doc = "FIFO size register"] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct Fsiz(pub u32); + impl Fsiz { + #[doc = "RAM start address"] + #[inline(always)] + pub const fn sa(&self) -> u16 { + let val = (self.0 >> 0usize) & 0xffff; + val as u16 + } + #[doc = "RAM start address"] + #[inline(always)] + pub fn set_sa(&mut self, val: u16) { + self.0 = (self.0 & !(0xffff << 0usize)) | (((val as u32) & 0xffff) << 0usize); + } + #[doc = "FIFO depth"] + #[inline(always)] + pub const fn fd(&self) -> u16 { + let val = (self.0 >> 16usize) & 0xffff; + val as u16 + } + #[doc = "FIFO depth"] + #[inline(always)] + pub fn set_fd(&mut self, val: u16) { + self.0 = (self.0 & !(0xffff << 16usize)) | (((val as u32) & 0xffff) << 16usize); + } + } + impl Default for Fsiz { + #[inline(always)] + fn default() -> Fsiz { + Fsiz(0) + } + } + #[doc = "AHB configuration register"] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct Gahbcfg(pub u32); + impl Gahbcfg { + #[doc = "Global interrupt mask"] + #[inline(always)] + pub const fn gint(&self) -> bool { + let val = (self.0 >> 0usize) & 0x01; + val != 0 + } + #[doc = "Global interrupt mask"] + #[inline(always)] + pub fn set_gint(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize); + } + #[doc = "Burst length/type"] + #[inline(always)] + pub const fn hbstlen(&self) -> u8 { + let val = (self.0 >> 1usize) & 0x0f; + val as u8 + } + #[doc = "Burst length/type"] + #[inline(always)] + pub fn set_hbstlen(&mut self, val: u8) { + self.0 = (self.0 & !(0x0f << 1usize)) | (((val as u32) & 0x0f) << 1usize); + } + #[doc = "DMA enable"] + #[inline(always)] + pub const fn dmaen(&self) -> bool { + let val = (self.0 >> 5usize) & 0x01; + val != 0 + } + #[doc = "DMA enable"] + #[inline(always)] + pub fn set_dmaen(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 5usize)) | (((val as u32) & 0x01) << 5usize); + } + #[doc = "TxFIFO empty level"] + #[inline(always)] + pub const fn txfelvl(&self) -> bool { + let val = (self.0 >> 7usize) & 0x01; + val != 0 + } + #[doc = "TxFIFO empty level"] + #[inline(always)] + pub fn set_txfelvl(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 7usize)) | (((val as u32) & 0x01) << 7usize); + } + #[doc = "Periodic TxFIFO empty level"] + #[inline(always)] + pub const fn ptxfelvl(&self) -> bool { + let val = (self.0 >> 8usize) & 0x01; + val != 0 + } + #[doc = "Periodic TxFIFO empty level"] + #[inline(always)] + pub fn set_ptxfelvl(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 8usize)) | (((val as u32) & 0x01) << 8usize); + } + } + impl Default for Gahbcfg { + #[inline(always)] + fn default() -> Gahbcfg { + Gahbcfg(0) + } + } + #[doc = "General core configuration register"] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct GccfgV1(pub u32); + impl GccfgV1 { + #[doc = "Power down"] + #[inline(always)] + pub const fn pwrdwn(&self) -> bool { + let val = (self.0 >> 16usize) & 0x01; + val != 0 + } + #[doc = "Power down"] + #[inline(always)] + pub fn set_pwrdwn(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 16usize)) | (((val as u32) & 0x01) << 16usize); + } + #[doc = "Enable the VBUS \"A\" sensing device"] + #[inline(always)] + pub const fn vbusasen(&self) -> bool { + let val = (self.0 >> 18usize) & 0x01; + val != 0 + } + #[doc = "Enable the VBUS \"A\" sensing device"] + #[inline(always)] + pub fn set_vbusasen(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 18usize)) | (((val as u32) & 0x01) << 18usize); + } + #[doc = "Enable the VBUS \"B\" sensing device"] + #[inline(always)] + pub const fn vbusbsen(&self) -> bool { + let val = (self.0 >> 19usize) & 0x01; + val != 0 + } + #[doc = "Enable the VBUS \"B\" sensing device"] + #[inline(always)] + pub fn set_vbusbsen(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 19usize)) | (((val as u32) & 0x01) << 19usize); + } + #[doc = "SOF output enable"] + #[inline(always)] + pub const fn sofouten(&self) -> bool { + let val = (self.0 >> 20usize) & 0x01; + val != 0 + } + #[doc = "SOF output enable"] + #[inline(always)] + pub fn set_sofouten(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 20usize)) | (((val as u32) & 0x01) << 20usize); + } + #[doc = "VBUS sensing disable"] + #[inline(always)] + pub const fn novbussens(&self) -> bool { + let val = (self.0 >> 21usize) & 0x01; + val != 0 + } + #[doc = "VBUS sensing disable"] + #[inline(always)] + pub fn set_novbussens(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 21usize)) | (((val as u32) & 0x01) << 21usize); + } + } + impl Default for GccfgV1 { + #[inline(always)] + fn default() -> GccfgV1 { + GccfgV1(0) + } + } + #[doc = "General core configuration register"] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct GccfgV2(pub u32); + impl GccfgV2 { + #[doc = "Data contact detection (DCD) status"] + #[inline(always)] + pub const fn dcdet(&self) -> bool { + let val = (self.0 >> 0usize) & 0x01; + val != 0 + } + #[doc = "Data contact detection (DCD) status"] + #[inline(always)] + pub fn set_dcdet(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize); + } + #[doc = "Primary detection (PD) status"] + #[inline(always)] + pub const fn pdet(&self) -> bool { + let val = (self.0 >> 1usize) & 0x01; + val != 0 + } + #[doc = "Primary detection (PD) status"] + #[inline(always)] + pub fn set_pdet(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 1usize)) | (((val as u32) & 0x01) << 1usize); + } + #[doc = "Secondary detection (SD) status"] + #[inline(always)] + pub const fn sdet(&self) -> bool { + let val = (self.0 >> 2usize) & 0x01; + val != 0 + } + #[doc = "Secondary detection (SD) status"] + #[inline(always)] + pub fn set_sdet(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 2usize)) | (((val as u32) & 0x01) << 2usize); + } + #[doc = "DM pull-up detection status"] + #[inline(always)] + pub const fn ps2det(&self) -> bool { + let val = (self.0 >> 3usize) & 0x01; + val != 0 + } + #[doc = "DM pull-up detection status"] + #[inline(always)] + pub fn set_ps2det(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 3usize)) | (((val as u32) & 0x01) << 3usize); + } + #[doc = "Power down"] + #[inline(always)] + pub const fn pwrdwn(&self) -> bool { + let val = (self.0 >> 16usize) & 0x01; + val != 0 + } + #[doc = "Power down"] + #[inline(always)] + pub fn set_pwrdwn(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 16usize)) | (((val as u32) & 0x01) << 16usize); + } + #[doc = "Battery charging detector (BCD) enable"] + #[inline(always)] + pub const fn bcden(&self) -> bool { + let val = (self.0 >> 17usize) & 0x01; + val != 0 + } + #[doc = "Battery charging detector (BCD) enable"] + #[inline(always)] + pub fn set_bcden(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 17usize)) | (((val as u32) & 0x01) << 17usize); + } + #[doc = "Data contact detection (DCD) mode enable"] + #[inline(always)] + pub const fn dcden(&self) -> bool { + let val = (self.0 >> 18usize) & 0x01; + val != 0 + } + #[doc = "Data contact detection (DCD) mode enable"] + #[inline(always)] + pub fn set_dcden(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 18usize)) | (((val as u32) & 0x01) << 18usize); + } + #[doc = "Primary detection (PD) mode enable"] + #[inline(always)] + pub const fn pden(&self) -> bool { + let val = (self.0 >> 19usize) & 0x01; + val != 0 + } + #[doc = "Primary detection (PD) mode enable"] + #[inline(always)] + pub fn set_pden(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 19usize)) | (((val as u32) & 0x01) << 19usize); + } + #[doc = "Secondary detection (SD) mode enable"] + #[inline(always)] + pub const fn sden(&self) -> bool { + let val = (self.0 >> 20usize) & 0x01; + val != 0 + } + #[doc = "Secondary detection (SD) mode enable"] + #[inline(always)] + pub fn set_sden(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 20usize)) | (((val as u32) & 0x01) << 20usize); + } + #[doc = "USB VBUS detection enable"] + #[inline(always)] + pub const fn vbden(&self) -> bool { + let val = (self.0 >> 21usize) & 0x01; + val != 0 + } + #[doc = "USB VBUS detection enable"] + #[inline(always)] + pub fn set_vbden(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 21usize)) | (((val as u32) & 0x01) << 21usize); + } + #[doc = "Internal high-speed PHY enable."] + #[inline(always)] + pub const fn phyhsen(&self) -> bool { + let val = (self.0 >> 23usize) & 0x01; + val != 0 + } + #[doc = "Internal high-speed PHY enable."] + #[inline(always)] + pub fn set_phyhsen(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 23usize)) | (((val as u32) & 0x01) << 23usize); + } + } + impl Default for GccfgV2 { + #[inline(always)] + fn default() -> GccfgV2 { + GccfgV2(0) + } + } + #[doc = "I2C access register"] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct Gi2cctl(pub u32); + impl Gi2cctl { + #[doc = "I2C Read/Write Data"] + #[inline(always)] + pub const fn rwdata(&self) -> u8 { + let val = (self.0 >> 0usize) & 0xff; + val as u8 + } + #[doc = "I2C Read/Write Data"] + #[inline(always)] + pub fn set_rwdata(&mut self, val: u8) { + self.0 = (self.0 & !(0xff << 0usize)) | (((val as u32) & 0xff) << 0usize); + } + #[doc = "I2C Register Address"] + #[inline(always)] + pub const fn regaddr(&self) -> u8 { + let val = (self.0 >> 8usize) & 0xff; + val as u8 + } + #[doc = "I2C Register Address"] + #[inline(always)] + pub fn set_regaddr(&mut self, val: u8) { + self.0 = (self.0 & !(0xff << 8usize)) | (((val as u32) & 0xff) << 8usize); + } + #[doc = "I2C Address"] + #[inline(always)] + pub const fn addr(&self) -> u8 { + let val = (self.0 >> 16usize) & 0x7f; + val as u8 + } + #[doc = "I2C Address"] + #[inline(always)] + pub fn set_addr(&mut self, val: u8) { + self.0 = (self.0 & !(0x7f << 16usize)) | (((val as u32) & 0x7f) << 16usize); + } + #[doc = "I2C Enable"] + #[inline(always)] + pub const fn i2cen(&self) -> bool { + let val = (self.0 >> 23usize) & 0x01; + val != 0 + } + #[doc = "I2C Enable"] + #[inline(always)] + pub fn set_i2cen(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 23usize)) | (((val as u32) & 0x01) << 23usize); + } + #[doc = "I2C ACK"] + #[inline(always)] + pub const fn ack(&self) -> bool { + let val = (self.0 >> 24usize) & 0x01; + val != 0 + } + #[doc = "I2C ACK"] + #[inline(always)] + pub fn set_ack(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 24usize)) | (((val as u32) & 0x01) << 24usize); + } + #[doc = "I2C Device Address"] + #[inline(always)] + pub const fn i2cdevadr(&self) -> u8 { + let val = (self.0 >> 26usize) & 0x03; + val as u8 + } + #[doc = "I2C Device Address"] + #[inline(always)] + pub fn set_i2cdevadr(&mut self, val: u8) { + self.0 = (self.0 & !(0x03 << 26usize)) | (((val as u32) & 0x03) << 26usize); + } + #[doc = "I2C DatSe0 USB mode"] + #[inline(always)] + pub const fn i2cdatse0(&self) -> bool { + let val = (self.0 >> 28usize) & 0x01; + val != 0 + } + #[doc = "I2C DatSe0 USB mode"] + #[inline(always)] + pub fn set_i2cdatse0(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 28usize)) | (((val as u32) & 0x01) << 28usize); + } + #[doc = "Read/Write Indicator"] + #[inline(always)] + pub const fn rw(&self) -> bool { + let val = (self.0 >> 30usize) & 0x01; + val != 0 + } + #[doc = "Read/Write Indicator"] + #[inline(always)] + pub fn set_rw(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 30usize)) | (((val as u32) & 0x01) << 30usize); + } + #[doc = "I2C Busy/Done"] + #[inline(always)] + pub const fn bsydne(&self) -> bool { + let val = (self.0 >> 31usize) & 0x01; + val != 0 + } + #[doc = "I2C Busy/Done"] + #[inline(always)] + pub fn set_bsydne(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 31usize)) | (((val as u32) & 0x01) << 31usize); + } + } + impl Default for Gi2cctl { + #[inline(always)] + fn default() -> Gi2cctl { + Gi2cctl(0) + } + } + #[doc = "Interrupt mask register"] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct Gintmsk(pub u32); + impl Gintmsk { + #[doc = "Mode mismatch interrupt mask"] + #[inline(always)] + pub const fn mmism(&self) -> bool { + let val = (self.0 >> 1usize) & 0x01; + val != 0 + } + #[doc = "Mode mismatch interrupt mask"] + #[inline(always)] + pub fn set_mmism(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 1usize)) | (((val as u32) & 0x01) << 1usize); + } + #[doc = "OTG interrupt mask"] + #[inline(always)] + pub const fn otgint(&self) -> bool { + let val = (self.0 >> 2usize) & 0x01; + val != 0 + } + #[doc = "OTG interrupt mask"] + #[inline(always)] + pub fn set_otgint(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 2usize)) | (((val as u32) & 0x01) << 2usize); + } + #[doc = "Start of frame mask"] + #[inline(always)] + pub const fn sofm(&self) -> bool { + let val = (self.0 >> 3usize) & 0x01; + val != 0 + } + #[doc = "Start of frame mask"] + #[inline(always)] + pub fn set_sofm(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 3usize)) | (((val as u32) & 0x01) << 3usize); + } + #[doc = "Receive FIFO non-empty mask"] + #[inline(always)] + pub const fn rxflvlm(&self) -> bool { + let val = (self.0 >> 4usize) & 0x01; + val != 0 + } + #[doc = "Receive FIFO non-empty mask"] + #[inline(always)] + pub fn set_rxflvlm(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 4usize)) | (((val as u32) & 0x01) << 4usize); + } + #[doc = "Non-periodic TxFIFO empty mask"] + #[inline(always)] + pub const fn nptxfem(&self) -> bool { + let val = (self.0 >> 5usize) & 0x01; + val != 0 + } + #[doc = "Non-periodic TxFIFO empty mask"] + #[inline(always)] + pub fn set_nptxfem(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 5usize)) | (((val as u32) & 0x01) << 5usize); + } + #[doc = "Global non-periodic IN NAK effective mask"] + #[inline(always)] + pub const fn ginakeffm(&self) -> bool { + let val = (self.0 >> 6usize) & 0x01; + val != 0 + } + #[doc = "Global non-periodic IN NAK effective mask"] + #[inline(always)] + pub fn set_ginakeffm(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 6usize)) | (((val as u32) & 0x01) << 6usize); + } + #[doc = "Global OUT NAK effective mask"] + #[inline(always)] + pub const fn gonakeffm(&self) -> bool { + let val = (self.0 >> 7usize) & 0x01; + val != 0 + } + #[doc = "Global OUT NAK effective mask"] + #[inline(always)] + pub fn set_gonakeffm(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 7usize)) | (((val as u32) & 0x01) << 7usize); + } + #[doc = "Early suspend mask"] + #[inline(always)] + pub const fn esuspm(&self) -> bool { + let val = (self.0 >> 10usize) & 0x01; + val != 0 + } + #[doc = "Early suspend mask"] + #[inline(always)] + pub fn set_esuspm(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 10usize)) | (((val as u32) & 0x01) << 10usize); + } + #[doc = "USB suspend mask"] + #[inline(always)] + pub const fn usbsuspm(&self) -> bool { + let val = (self.0 >> 11usize) & 0x01; + val != 0 + } + #[doc = "USB suspend mask"] + #[inline(always)] + pub fn set_usbsuspm(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 11usize)) | (((val as u32) & 0x01) << 11usize); + } + #[doc = "USB reset mask"] + #[inline(always)] + pub const fn usbrst(&self) -> bool { + let val = (self.0 >> 12usize) & 0x01; + val != 0 + } + #[doc = "USB reset mask"] + #[inline(always)] + pub fn set_usbrst(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 12usize)) | (((val as u32) & 0x01) << 12usize); + } + #[doc = "Enumeration done mask"] + #[inline(always)] + pub const fn enumdnem(&self) -> bool { + let val = (self.0 >> 13usize) & 0x01; + val != 0 + } + #[doc = "Enumeration done mask"] + #[inline(always)] + pub fn set_enumdnem(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 13usize)) | (((val as u32) & 0x01) << 13usize); + } + #[doc = "Isochronous OUT packet dropped interrupt mask"] + #[inline(always)] + pub const fn isoodrpm(&self) -> bool { + let val = (self.0 >> 14usize) & 0x01; + val != 0 + } + #[doc = "Isochronous OUT packet dropped interrupt mask"] + #[inline(always)] + pub fn set_isoodrpm(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 14usize)) | (((val as u32) & 0x01) << 14usize); + } + #[doc = "End of periodic frame interrupt mask"] + #[inline(always)] + pub const fn eopfm(&self) -> bool { + let val = (self.0 >> 15usize) & 0x01; + val != 0 + } + #[doc = "End of periodic frame interrupt mask"] + #[inline(always)] + pub fn set_eopfm(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 15usize)) | (((val as u32) & 0x01) << 15usize); + } + #[doc = "Endpoint mismatch interrupt mask"] + #[inline(always)] + pub const fn epmism(&self) -> bool { + let val = (self.0 >> 17usize) & 0x01; + val != 0 + } + #[doc = "Endpoint mismatch interrupt mask"] + #[inline(always)] + pub fn set_epmism(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 17usize)) | (((val as u32) & 0x01) << 17usize); + } + #[doc = "IN endpoints interrupt mask"] + #[inline(always)] + pub const fn iepint(&self) -> bool { + let val = (self.0 >> 18usize) & 0x01; + val != 0 + } + #[doc = "IN endpoints interrupt mask"] + #[inline(always)] + pub fn set_iepint(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 18usize)) | (((val as u32) & 0x01) << 18usize); + } + #[doc = "OUT endpoints interrupt mask"] + #[inline(always)] + pub const fn oepint(&self) -> bool { + let val = (self.0 >> 19usize) & 0x01; + val != 0 + } + #[doc = "OUT endpoints interrupt mask"] + #[inline(always)] + pub fn set_oepint(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 19usize)) | (((val as u32) & 0x01) << 19usize); + } + #[doc = "Incomplete isochronous IN transfer mask"] + #[inline(always)] + pub const fn iisoixfrm(&self) -> bool { + let val = (self.0 >> 20usize) & 0x01; + val != 0 + } + #[doc = "Incomplete isochronous IN transfer mask"] + #[inline(always)] + pub fn set_iisoixfrm(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 20usize)) | (((val as u32) & 0x01) << 20usize); + } + #[doc = "Incomplete periodic transfer mask (host mode) / Incomplete isochronous OUT transfer mask (device mode)"] + #[inline(always)] + pub const fn ipxfrm_iisooxfrm(&self) -> bool { + let val = (self.0 >> 21usize) & 0x01; + val != 0 + } + #[doc = "Incomplete periodic transfer mask (host mode) / Incomplete isochronous OUT transfer mask (device mode)"] + #[inline(always)] + pub fn set_ipxfrm_iisooxfrm(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 21usize)) | (((val as u32) & 0x01) << 21usize); + } + #[doc = "Data fetch suspended mask"] + #[inline(always)] + pub const fn fsuspm(&self) -> bool { + let val = (self.0 >> 22usize) & 0x01; + val != 0 + } + #[doc = "Data fetch suspended mask"] + #[inline(always)] + pub fn set_fsuspm(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 22usize)) | (((val as u32) & 0x01) << 22usize); + } + #[doc = "Reset detected interrupt mask"] + #[inline(always)] + pub const fn rstde(&self) -> bool { + let val = (self.0 >> 23usize) & 0x01; + val != 0 + } + #[doc = "Reset detected interrupt mask"] + #[inline(always)] + pub fn set_rstde(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 23usize)) | (((val as u32) & 0x01) << 23usize); + } + #[doc = "Host port interrupt mask"] + #[inline(always)] + pub const fn prtim(&self) -> bool { + let val = (self.0 >> 24usize) & 0x01; + val != 0 + } + #[doc = "Host port interrupt mask"] + #[inline(always)] + pub fn set_prtim(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 24usize)) | (((val as u32) & 0x01) << 24usize); + } + #[doc = "Host channels interrupt mask"] + #[inline(always)] + pub const fn hcim(&self) -> bool { + let val = (self.0 >> 25usize) & 0x01; + val != 0 + } + #[doc = "Host channels interrupt mask"] + #[inline(always)] + pub fn set_hcim(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 25usize)) | (((val as u32) & 0x01) << 25usize); + } + #[doc = "Periodic TxFIFO empty mask"] + #[inline(always)] + pub const fn ptxfem(&self) -> bool { + let val = (self.0 >> 26usize) & 0x01; + val != 0 + } + #[doc = "Periodic TxFIFO empty mask"] + #[inline(always)] + pub fn set_ptxfem(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 26usize)) | (((val as u32) & 0x01) << 26usize); + } + #[doc = "LPM interrupt mask"] + #[inline(always)] + pub const fn lpmintm(&self) -> bool { + let val = (self.0 >> 27usize) & 0x01; + val != 0 + } + #[doc = "LPM interrupt mask"] + #[inline(always)] + pub fn set_lpmintm(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 27usize)) | (((val as u32) & 0x01) << 27usize); + } + #[doc = "Connector ID status change mask"] + #[inline(always)] + pub const fn cidschgm(&self) -> bool { + let val = (self.0 >> 28usize) & 0x01; + val != 0 + } + #[doc = "Connector ID status change mask"] + #[inline(always)] + pub fn set_cidschgm(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 28usize)) | (((val as u32) & 0x01) << 28usize); + } + #[doc = "Disconnect detected interrupt mask"] + #[inline(always)] + pub const fn discint(&self) -> bool { + let val = (self.0 >> 29usize) & 0x01; + val != 0 + } + #[doc = "Disconnect detected interrupt mask"] + #[inline(always)] + pub fn set_discint(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 29usize)) | (((val as u32) & 0x01) << 29usize); + } + #[doc = "Session request/new session detected interrupt mask"] + #[inline(always)] + pub const fn srqim(&self) -> bool { + let val = (self.0 >> 30usize) & 0x01; + val != 0 + } + #[doc = "Session request/new session detected interrupt mask"] + #[inline(always)] + pub fn set_srqim(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 30usize)) | (((val as u32) & 0x01) << 30usize); + } + #[doc = "Resume/remote wakeup detected interrupt mask"] + #[inline(always)] + pub const fn wuim(&self) -> bool { + let val = (self.0 >> 31usize) & 0x01; + val != 0 + } + #[doc = "Resume/remote wakeup detected interrupt mask"] + #[inline(always)] + pub fn set_wuim(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 31usize)) | (((val as u32) & 0x01) << 31usize); + } + } + impl Default for Gintmsk { + #[inline(always)] + fn default() -> Gintmsk { + Gintmsk(0) + } + } + #[doc = "Core interrupt register"] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct Gintsts(pub u32); + impl Gintsts { + #[doc = "Current mode of operation"] + #[inline(always)] + pub const fn cmod(&self) -> bool { + let val = (self.0 >> 0usize) & 0x01; + val != 0 + } + #[doc = "Current mode of operation"] + #[inline(always)] + pub fn set_cmod(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize); + } + #[doc = "Mode mismatch interrupt"] + #[inline(always)] + pub const fn mmis(&self) -> bool { + let val = (self.0 >> 1usize) & 0x01; + val != 0 + } + #[doc = "Mode mismatch interrupt"] + #[inline(always)] + pub fn set_mmis(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 1usize)) | (((val as u32) & 0x01) << 1usize); + } + #[doc = "OTG interrupt"] + #[inline(always)] + pub const fn otgint(&self) -> bool { + let val = (self.0 >> 2usize) & 0x01; + val != 0 + } + #[doc = "OTG interrupt"] + #[inline(always)] + pub fn set_otgint(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 2usize)) | (((val as u32) & 0x01) << 2usize); + } + #[doc = "Start of frame"] + #[inline(always)] + pub const fn sof(&self) -> bool { + let val = (self.0 >> 3usize) & 0x01; + val != 0 + } + #[doc = "Start of frame"] + #[inline(always)] + pub fn set_sof(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 3usize)) | (((val as u32) & 0x01) << 3usize); + } + #[doc = "RxFIFO non-empty"] + #[inline(always)] + pub const fn rxflvl(&self) -> bool { + let val = (self.0 >> 4usize) & 0x01; + val != 0 + } + #[doc = "RxFIFO non-empty"] + #[inline(always)] + pub fn set_rxflvl(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 4usize)) | (((val as u32) & 0x01) << 4usize); + } + #[doc = "Non-periodic TxFIFO empty"] + #[inline(always)] + pub const fn nptxfe(&self) -> bool { + let val = (self.0 >> 5usize) & 0x01; + val != 0 + } + #[doc = "Non-periodic TxFIFO empty"] + #[inline(always)] + pub fn set_nptxfe(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 5usize)) | (((val as u32) & 0x01) << 5usize); + } + #[doc = "Global IN non-periodic NAK effective"] + #[inline(always)] + pub const fn ginakeff(&self) -> bool { + let val = (self.0 >> 6usize) & 0x01; + val != 0 + } + #[doc = "Global IN non-periodic NAK effective"] + #[inline(always)] + pub fn set_ginakeff(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 6usize)) | (((val as u32) & 0x01) << 6usize); + } + #[doc = "Global OUT NAK effective"] + #[inline(always)] + pub const fn goutnakeff(&self) -> bool { + let val = (self.0 >> 7usize) & 0x01; + val != 0 + } + #[doc = "Global OUT NAK effective"] + #[inline(always)] + pub fn set_goutnakeff(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 7usize)) | (((val as u32) & 0x01) << 7usize); + } + #[doc = "Early suspend"] + #[inline(always)] + pub const fn esusp(&self) -> bool { + let val = (self.0 >> 10usize) & 0x01; + val != 0 + } + #[doc = "Early suspend"] + #[inline(always)] + pub fn set_esusp(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 10usize)) | (((val as u32) & 0x01) << 10usize); + } + #[doc = "USB suspend"] + #[inline(always)] + pub const fn usbsusp(&self) -> bool { + let val = (self.0 >> 11usize) & 0x01; + val != 0 + } + #[doc = "USB suspend"] + #[inline(always)] + pub fn set_usbsusp(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 11usize)) | (((val as u32) & 0x01) << 11usize); + } + #[doc = "USB reset"] + #[inline(always)] + pub const fn usbrst(&self) -> bool { + let val = (self.0 >> 12usize) & 0x01; + val != 0 + } + #[doc = "USB reset"] + #[inline(always)] + pub fn set_usbrst(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 12usize)) | (((val as u32) & 0x01) << 12usize); + } + #[doc = "Enumeration done"] + #[inline(always)] + pub const fn enumdne(&self) -> bool { + let val = (self.0 >> 13usize) & 0x01; + val != 0 + } + #[doc = "Enumeration done"] + #[inline(always)] + pub fn set_enumdne(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 13usize)) | (((val as u32) & 0x01) << 13usize); + } + #[doc = "Isochronous OUT packet dropped interrupt"] + #[inline(always)] + pub const fn isoodrp(&self) -> bool { + let val = (self.0 >> 14usize) & 0x01; + val != 0 + } + #[doc = "Isochronous OUT packet dropped interrupt"] + #[inline(always)] + pub fn set_isoodrp(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 14usize)) | (((val as u32) & 0x01) << 14usize); + } + #[doc = "End of periodic frame interrupt"] + #[inline(always)] + pub const fn eopf(&self) -> bool { + let val = (self.0 >> 15usize) & 0x01; + val != 0 + } + #[doc = "End of periodic frame interrupt"] + #[inline(always)] + pub fn set_eopf(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 15usize)) | (((val as u32) & 0x01) << 15usize); + } + #[doc = "IN endpoint interrupt"] + #[inline(always)] + pub const fn iepint(&self) -> bool { + let val = (self.0 >> 18usize) & 0x01; + val != 0 + } + #[doc = "IN endpoint interrupt"] + #[inline(always)] + pub fn set_iepint(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 18usize)) | (((val as u32) & 0x01) << 18usize); + } + #[doc = "OUT endpoint interrupt"] + #[inline(always)] + pub const fn oepint(&self) -> bool { + let val = (self.0 >> 19usize) & 0x01; + val != 0 + } + #[doc = "OUT endpoint interrupt"] + #[inline(always)] + pub fn set_oepint(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 19usize)) | (((val as u32) & 0x01) << 19usize); + } + #[doc = "Incomplete isochronous IN transfer"] + #[inline(always)] + pub const fn iisoixfr(&self) -> bool { + let val = (self.0 >> 20usize) & 0x01; + val != 0 + } + #[doc = "Incomplete isochronous IN transfer"] + #[inline(always)] + pub fn set_iisoixfr(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 20usize)) | (((val as u32) & 0x01) << 20usize); + } + #[doc = "Incomplete periodic transfer (host mode) / Incomplete isochronous OUT transfer (device mode)"] + #[inline(always)] + pub const fn ipxfr_incompisoout(&self) -> bool { + let val = (self.0 >> 21usize) & 0x01; + val != 0 + } + #[doc = "Incomplete periodic transfer (host mode) / Incomplete isochronous OUT transfer (device mode)"] + #[inline(always)] + pub fn set_ipxfr_incompisoout(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 21usize)) | (((val as u32) & 0x01) << 21usize); + } + #[doc = "Data fetch suspended"] + #[inline(always)] + pub const fn datafsusp(&self) -> bool { + let val = (self.0 >> 22usize) & 0x01; + val != 0 + } + #[doc = "Data fetch suspended"] + #[inline(always)] + pub fn set_datafsusp(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 22usize)) | (((val as u32) & 0x01) << 22usize); + } + #[doc = "Host port interrupt"] + #[inline(always)] + pub const fn hprtint(&self) -> bool { + let val = (self.0 >> 24usize) & 0x01; + val != 0 + } + #[doc = "Host port interrupt"] + #[inline(always)] + pub fn set_hprtint(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 24usize)) | (((val as u32) & 0x01) << 24usize); + } + #[doc = "Host channels interrupt"] + #[inline(always)] + pub const fn hcint(&self) -> bool { + let val = (self.0 >> 25usize) & 0x01; + val != 0 + } + #[doc = "Host channels interrupt"] + #[inline(always)] + pub fn set_hcint(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 25usize)) | (((val as u32) & 0x01) << 25usize); + } + #[doc = "Periodic TxFIFO empty"] + #[inline(always)] + pub const fn ptxfe(&self) -> bool { + let val = (self.0 >> 26usize) & 0x01; + val != 0 + } + #[doc = "Periodic TxFIFO empty"] + #[inline(always)] + pub fn set_ptxfe(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 26usize)) | (((val as u32) & 0x01) << 26usize); + } + #[doc = "Connector ID status change"] + #[inline(always)] + pub const fn cidschg(&self) -> bool { + let val = (self.0 >> 28usize) & 0x01; + val != 0 + } + #[doc = "Connector ID status change"] + #[inline(always)] + pub fn set_cidschg(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 28usize)) | (((val as u32) & 0x01) << 28usize); + } + #[doc = "Disconnect detected interrupt"] + #[inline(always)] + pub const fn discint(&self) -> bool { + let val = (self.0 >> 29usize) & 0x01; + val != 0 + } + #[doc = "Disconnect detected interrupt"] + #[inline(always)] + pub fn set_discint(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 29usize)) | (((val as u32) & 0x01) << 29usize); + } + #[doc = "Session request/new session detected interrupt"] + #[inline(always)] + pub const fn srqint(&self) -> bool { + let val = (self.0 >> 30usize) & 0x01; + val != 0 + } + #[doc = "Session request/new session detected interrupt"] + #[inline(always)] + pub fn set_srqint(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 30usize)) | (((val as u32) & 0x01) << 30usize); + } + #[doc = "Resume/remote wakeup detected interrupt"] + #[inline(always)] + pub const fn wkupint(&self) -> bool { + let val = (self.0 >> 31usize) & 0x01; + val != 0 + } + #[doc = "Resume/remote wakeup detected interrupt"] + #[inline(always)] + pub fn set_wkupint(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 31usize)) | (((val as u32) & 0x01) << 31usize); + } + } + impl Default for Gintsts { + #[inline(always)] + fn default() -> Gintsts { + Gintsts(0) + } + } + #[doc = "Core LPM configuration register"] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct Glpmcfg(pub u32); + impl Glpmcfg { + #[doc = "LPM support enable"] + #[inline(always)] + pub const fn lpmen(&self) -> bool { + let val = (self.0 >> 0usize) & 0x01; + val != 0 + } + #[doc = "LPM support enable"] + #[inline(always)] + pub fn set_lpmen(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize); + } + #[doc = "LPM token acknowledge enable"] + #[inline(always)] + pub const fn lpmack(&self) -> bool { + let val = (self.0 >> 1usize) & 0x01; + val != 0 + } + #[doc = "LPM token acknowledge enable"] + #[inline(always)] + pub fn set_lpmack(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 1usize)) | (((val as u32) & 0x01) << 1usize); + } + #[doc = "Best effort service latency"] + #[inline(always)] + pub const fn besl(&self) -> u8 { + let val = (self.0 >> 2usize) & 0x0f; + val as u8 + } + #[doc = "Best effort service latency"] + #[inline(always)] + pub fn set_besl(&mut self, val: u8) { + self.0 = (self.0 & !(0x0f << 2usize)) | (((val as u32) & 0x0f) << 2usize); + } + #[doc = "bRemoteWake value"] + #[inline(always)] + pub const fn remwake(&self) -> bool { + let val = (self.0 >> 6usize) & 0x01; + val != 0 + } + #[doc = "bRemoteWake value"] + #[inline(always)] + pub fn set_remwake(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 6usize)) | (((val as u32) & 0x01) << 6usize); + } + #[doc = "L1 Shallow Sleep enable"] + #[inline(always)] + pub const fn l1ssen(&self) -> bool { + let val = (self.0 >> 7usize) & 0x01; + val != 0 + } + #[doc = "L1 Shallow Sleep enable"] + #[inline(always)] + pub fn set_l1ssen(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 7usize)) | (((val as u32) & 0x01) << 7usize); + } + #[doc = "BESL threshold"] + #[inline(always)] + pub const fn beslthrs(&self) -> u8 { + let val = (self.0 >> 8usize) & 0x0f; + val as u8 + } + #[doc = "BESL threshold"] + #[inline(always)] + pub fn set_beslthrs(&mut self, val: u8) { + self.0 = (self.0 & !(0x0f << 8usize)) | (((val as u32) & 0x0f) << 8usize); + } + #[doc = "L1 deep sleep enable"] + #[inline(always)] + pub const fn l1dsen(&self) -> bool { + let val = (self.0 >> 12usize) & 0x01; + val != 0 + } + #[doc = "L1 deep sleep enable"] + #[inline(always)] + pub fn set_l1dsen(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 12usize)) | (((val as u32) & 0x01) << 12usize); + } + #[doc = "LPM response"] + #[inline(always)] + pub const fn lpmrst(&self) -> u8 { + let val = (self.0 >> 13usize) & 0x03; + val as u8 + } + #[doc = "LPM response"] + #[inline(always)] + pub fn set_lpmrst(&mut self, val: u8) { + self.0 = (self.0 & !(0x03 << 13usize)) | (((val as u32) & 0x03) << 13usize); + } + #[doc = "Port sleep status"] + #[inline(always)] + pub const fn slpsts(&self) -> bool { + let val = (self.0 >> 15usize) & 0x01; + val != 0 + } + #[doc = "Port sleep status"] + #[inline(always)] + pub fn set_slpsts(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 15usize)) | (((val as u32) & 0x01) << 15usize); + } + #[doc = "Sleep State Resume OK"] + #[inline(always)] + pub const fn l1rsmok(&self) -> bool { + let val = (self.0 >> 16usize) & 0x01; + val != 0 + } + #[doc = "Sleep State Resume OK"] + #[inline(always)] + pub fn set_l1rsmok(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 16usize)) | (((val as u32) & 0x01) << 16usize); + } + #[doc = "LPM Channel Index"] + #[inline(always)] + pub const fn lpmchidx(&self) -> u8 { + let val = (self.0 >> 17usize) & 0x0f; + val as u8 + } + #[doc = "LPM Channel Index"] + #[inline(always)] + pub fn set_lpmchidx(&mut self, val: u8) { + self.0 = (self.0 & !(0x0f << 17usize)) | (((val as u32) & 0x0f) << 17usize); + } + #[doc = "LPM retry count"] + #[inline(always)] + pub const fn lpmrcnt(&self) -> u8 { + let val = (self.0 >> 21usize) & 0x07; + val as u8 + } + #[doc = "LPM retry count"] + #[inline(always)] + pub fn set_lpmrcnt(&mut self, val: u8) { + self.0 = (self.0 & !(0x07 << 21usize)) | (((val as u32) & 0x07) << 21usize); + } + #[doc = "Send LPM transaction"] + #[inline(always)] + pub const fn sndlpm(&self) -> bool { + let val = (self.0 >> 24usize) & 0x01; + val != 0 + } + #[doc = "Send LPM transaction"] + #[inline(always)] + pub fn set_sndlpm(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 24usize)) | (((val as u32) & 0x01) << 24usize); + } + #[doc = "LPM retry count status"] + #[inline(always)] + pub const fn lpmrcntsts(&self) -> u8 { + let val = (self.0 >> 25usize) & 0x07; + val as u8 + } + #[doc = "LPM retry count status"] + #[inline(always)] + pub fn set_lpmrcntsts(&mut self, val: u8) { + self.0 = (self.0 & !(0x07 << 25usize)) | (((val as u32) & 0x07) << 25usize); + } + #[doc = "Enable best effort service latency"] + #[inline(always)] + pub const fn enbesl(&self) -> bool { + let val = (self.0 >> 28usize) & 0x01; + val != 0 + } + #[doc = "Enable best effort service latency"] + #[inline(always)] + pub fn set_enbesl(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 28usize)) | (((val as u32) & 0x01) << 28usize); + } + } + impl Default for Glpmcfg { + #[inline(always)] + fn default() -> Glpmcfg { + Glpmcfg(0) + } + } + #[doc = "Control and status register"] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct Gotgctl(pub u32); + impl Gotgctl { + #[doc = "Session request success"] + #[inline(always)] + pub const fn srqscs(&self) -> bool { + let val = (self.0 >> 0usize) & 0x01; + val != 0 + } + #[doc = "Session request success"] + #[inline(always)] + pub fn set_srqscs(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize); + } + #[doc = "Session request"] + #[inline(always)] + pub const fn srq(&self) -> bool { + let val = (self.0 >> 1usize) & 0x01; + val != 0 + } + #[doc = "Session request"] + #[inline(always)] + pub fn set_srq(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 1usize)) | (((val as u32) & 0x01) << 1usize); + } + #[doc = "VBUS valid override enable"] + #[inline(always)] + pub const fn vbvaloen(&self) -> bool { + let val = (self.0 >> 2usize) & 0x01; + val != 0 + } + #[doc = "VBUS valid override enable"] + #[inline(always)] + pub fn set_vbvaloen(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 2usize)) | (((val as u32) & 0x01) << 2usize); + } + #[doc = "VBUS valid override value"] + #[inline(always)] + pub const fn vbvaloval(&self) -> bool { + let val = (self.0 >> 3usize) & 0x01; + val != 0 + } + #[doc = "VBUS valid override value"] + #[inline(always)] + pub fn set_vbvaloval(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 3usize)) | (((val as u32) & 0x01) << 3usize); + } + #[doc = "A-peripheral session valid override enable"] + #[inline(always)] + pub const fn avaloen(&self) -> bool { + let val = (self.0 >> 4usize) & 0x01; + val != 0 + } + #[doc = "A-peripheral session valid override enable"] + #[inline(always)] + pub fn set_avaloen(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 4usize)) | (((val as u32) & 0x01) << 4usize); + } + #[doc = "A-peripheral session valid override value"] + #[inline(always)] + pub const fn avaloval(&self) -> bool { + let val = (self.0 >> 5usize) & 0x01; + val != 0 + } + #[doc = "A-peripheral session valid override value"] + #[inline(always)] + pub fn set_avaloval(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 5usize)) | (((val as u32) & 0x01) << 5usize); + } + #[doc = "B-peripheral session valid override enable"] + #[inline(always)] + pub const fn bvaloen(&self) -> bool { + let val = (self.0 >> 6usize) & 0x01; + val != 0 + } + #[doc = "B-peripheral session valid override enable"] + #[inline(always)] + pub fn set_bvaloen(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 6usize)) | (((val as u32) & 0x01) << 6usize); + } + #[doc = "B-peripheral session valid override value"] + #[inline(always)] + pub const fn bvaloval(&self) -> bool { + let val = (self.0 >> 7usize) & 0x01; + val != 0 + } + #[doc = "B-peripheral session valid override value"] + #[inline(always)] + pub fn set_bvaloval(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 7usize)) | (((val as u32) & 0x01) << 7usize); + } + #[doc = "Host negotiation success"] + #[inline(always)] + pub const fn hngscs(&self) -> bool { + let val = (self.0 >> 8usize) & 0x01; + val != 0 + } + #[doc = "Host negotiation success"] + #[inline(always)] + pub fn set_hngscs(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 8usize)) | (((val as u32) & 0x01) << 8usize); + } + #[doc = "HNP request"] + #[inline(always)] + pub const fn hnprq(&self) -> bool { + let val = (self.0 >> 9usize) & 0x01; + val != 0 + } + #[doc = "HNP request"] + #[inline(always)] + pub fn set_hnprq(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 9usize)) | (((val as u32) & 0x01) << 9usize); + } + #[doc = "Host set HNP enable"] + #[inline(always)] + pub const fn hshnpen(&self) -> bool { + let val = (self.0 >> 10usize) & 0x01; + val != 0 + } + #[doc = "Host set HNP enable"] + #[inline(always)] + pub fn set_hshnpen(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 10usize)) | (((val as u32) & 0x01) << 10usize); + } + #[doc = "Device HNP enabled"] + #[inline(always)] + pub const fn dhnpen(&self) -> bool { + let val = (self.0 >> 11usize) & 0x01; + val != 0 + } + #[doc = "Device HNP enabled"] + #[inline(always)] + pub fn set_dhnpen(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 11usize)) | (((val as u32) & 0x01) << 11usize); + } + #[doc = "Embedded host enable"] + #[inline(always)] + pub const fn ehen(&self) -> bool { + let val = (self.0 >> 12usize) & 0x01; + val != 0 + } + #[doc = "Embedded host enable"] + #[inline(always)] + pub fn set_ehen(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 12usize)) | (((val as u32) & 0x01) << 12usize); + } + #[doc = "Connector ID status"] + #[inline(always)] + pub const fn cidsts(&self) -> bool { + let val = (self.0 >> 16usize) & 0x01; + val != 0 + } + #[doc = "Connector ID status"] + #[inline(always)] + pub fn set_cidsts(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 16usize)) | (((val as u32) & 0x01) << 16usize); + } + #[doc = "Long/short debounce time"] + #[inline(always)] + pub const fn dbct(&self) -> bool { + let val = (self.0 >> 17usize) & 0x01; + val != 0 + } + #[doc = "Long/short debounce time"] + #[inline(always)] + pub fn set_dbct(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 17usize)) | (((val as u32) & 0x01) << 17usize); + } + #[doc = "A-session valid"] + #[inline(always)] + pub const fn asvld(&self) -> bool { + let val = (self.0 >> 18usize) & 0x01; + val != 0 + } + #[doc = "A-session valid"] + #[inline(always)] + pub fn set_asvld(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 18usize)) | (((val as u32) & 0x01) << 18usize); + } + #[doc = "B-session valid"] + #[inline(always)] + pub const fn bsvld(&self) -> bool { + let val = (self.0 >> 19usize) & 0x01; + val != 0 + } + #[doc = "B-session valid"] + #[inline(always)] + pub fn set_bsvld(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 19usize)) | (((val as u32) & 0x01) << 19usize); + } + } + impl Default for Gotgctl { + #[inline(always)] + fn default() -> Gotgctl { + Gotgctl(0) + } + } + #[doc = "Interrupt register"] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct Gotgint(pub u32); + impl Gotgint { + #[doc = "Session end detected"] + #[inline(always)] + pub const fn sedet(&self) -> bool { + let val = (self.0 >> 2usize) & 0x01; + val != 0 + } + #[doc = "Session end detected"] + #[inline(always)] + pub fn set_sedet(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 2usize)) | (((val as u32) & 0x01) << 2usize); + } + #[doc = "Session request success status change"] + #[inline(always)] + pub const fn srsschg(&self) -> bool { + let val = (self.0 >> 8usize) & 0x01; + val != 0 + } + #[doc = "Session request success status change"] + #[inline(always)] + pub fn set_srsschg(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 8usize)) | (((val as u32) & 0x01) << 8usize); + } + #[doc = "Host negotiation success status change"] + #[inline(always)] + pub const fn hnsschg(&self) -> bool { + let val = (self.0 >> 9usize) & 0x01; + val != 0 + } + #[doc = "Host negotiation success status change"] + #[inline(always)] + pub fn set_hnsschg(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 9usize)) | (((val as u32) & 0x01) << 9usize); + } + #[doc = "Host negotiation detected"] + #[inline(always)] + pub const fn hngdet(&self) -> bool { + let val = (self.0 >> 17usize) & 0x01; + val != 0 + } + #[doc = "Host negotiation detected"] + #[inline(always)] + pub fn set_hngdet(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 17usize)) | (((val as u32) & 0x01) << 17usize); + } + #[doc = "A-device timeout change"] + #[inline(always)] + pub const fn adtochg(&self) -> bool { + let val = (self.0 >> 18usize) & 0x01; + val != 0 + } + #[doc = "A-device timeout change"] + #[inline(always)] + pub fn set_adtochg(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 18usize)) | (((val as u32) & 0x01) << 18usize); + } + #[doc = "Debounce done"] + #[inline(always)] + pub const fn dbcdne(&self) -> bool { + let val = (self.0 >> 19usize) & 0x01; + val != 0 + } + #[doc = "Debounce done"] + #[inline(always)] + pub fn set_dbcdne(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 19usize)) | (((val as u32) & 0x01) << 19usize); + } + #[doc = "ID input pin changed"] + #[inline(always)] + pub const fn idchng(&self) -> bool { + let val = (self.0 >> 20usize) & 0x01; + val != 0 + } + #[doc = "ID input pin changed"] + #[inline(always)] + pub fn set_idchng(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 20usize)) | (((val as u32) & 0x01) << 20usize); + } + } + impl Default for Gotgint { + #[inline(always)] + fn default() -> Gotgint { + Gotgint(0) + } + } + #[doc = "Reset register"] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct Grstctl(pub u32); + impl Grstctl { + #[doc = "Core soft reset"] + #[inline(always)] + pub const fn csrst(&self) -> bool { + let val = (self.0 >> 0usize) & 0x01; + val != 0 + } + #[doc = "Core soft reset"] + #[inline(always)] + pub fn set_csrst(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize); + } + #[doc = "HCLK soft reset"] + #[inline(always)] + pub const fn hsrst(&self) -> bool { + let val = (self.0 >> 1usize) & 0x01; + val != 0 + } + #[doc = "HCLK soft reset"] + #[inline(always)] + pub fn set_hsrst(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 1usize)) | (((val as u32) & 0x01) << 1usize); + } + #[doc = "Host frame counter reset"] + #[inline(always)] + pub const fn fcrst(&self) -> bool { + let val = (self.0 >> 2usize) & 0x01; + val != 0 + } + #[doc = "Host frame counter reset"] + #[inline(always)] + pub fn set_fcrst(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 2usize)) | (((val as u32) & 0x01) << 2usize); + } + #[doc = "RxFIFO flush"] + #[inline(always)] + pub const fn rxfflsh(&self) -> bool { + let val = (self.0 >> 4usize) & 0x01; + val != 0 + } + #[doc = "RxFIFO flush"] + #[inline(always)] + pub fn set_rxfflsh(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 4usize)) | (((val as u32) & 0x01) << 4usize); + } + #[doc = "TxFIFO flush"] + #[inline(always)] + pub const fn txfflsh(&self) -> bool { + let val = (self.0 >> 5usize) & 0x01; + val != 0 + } + #[doc = "TxFIFO flush"] + #[inline(always)] + pub fn set_txfflsh(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 5usize)) | (((val as u32) & 0x01) << 5usize); + } + #[doc = "TxFIFO number"] + #[inline(always)] + pub const fn txfnum(&self) -> u8 { + let val = (self.0 >> 6usize) & 0x1f; + val as u8 + } + #[doc = "TxFIFO number"] + #[inline(always)] + pub fn set_txfnum(&mut self, val: u8) { + self.0 = (self.0 & !(0x1f << 6usize)) | (((val as u32) & 0x1f) << 6usize); + } + #[doc = "DMA request signal enabled for USB OTG HS"] + #[inline(always)] + pub const fn dmareq(&self) -> bool { + let val = (self.0 >> 30usize) & 0x01; + val != 0 + } + #[doc = "DMA request signal enabled for USB OTG HS"] + #[inline(always)] + pub fn set_dmareq(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 30usize)) | (((val as u32) & 0x01) << 30usize); + } + #[doc = "AHB master idle"] + #[inline(always)] + pub const fn ahbidl(&self) -> bool { + let val = (self.0 >> 31usize) & 0x01; + val != 0 + } + #[doc = "AHB master idle"] + #[inline(always)] + pub fn set_ahbidl(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 31usize)) | (((val as u32) & 0x01) << 31usize); + } + } + impl Default for Grstctl { + #[inline(always)] + fn default() -> Grstctl { + Grstctl(0) + } + } + #[doc = "Receive FIFO size register"] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct Grxfsiz(pub u32); + impl Grxfsiz { + #[doc = "RxFIFO depth"] + #[inline(always)] + pub const fn rxfd(&self) -> u16 { + let val = (self.0 >> 0usize) & 0xffff; + val as u16 + } + #[doc = "RxFIFO depth"] + #[inline(always)] + pub fn set_rxfd(&mut self, val: u16) { + self.0 = (self.0 & !(0xffff << 0usize)) | (((val as u32) & 0xffff) << 0usize); + } + } + impl Default for Grxfsiz { + #[inline(always)] + fn default() -> Grxfsiz { + Grxfsiz(0) + } + } + #[doc = "Status read and pop register"] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct Grxsts(pub u32); + impl Grxsts { + #[doc = "Endpoint number (device mode) / Channel number (host mode)"] + #[inline(always)] + pub const fn epnum(&self) -> u8 { + let val = (self.0 >> 0usize) & 0x0f; + val as u8 + } + #[doc = "Endpoint number (device mode) / Channel number (host mode)"] + #[inline(always)] + pub fn set_epnum(&mut self, val: u8) { + self.0 = (self.0 & !(0x0f << 0usize)) | (((val as u32) & 0x0f) << 0usize); + } + #[doc = "Byte count"] + #[inline(always)] + pub const fn bcnt(&self) -> u16 { + let val = (self.0 >> 4usize) & 0x07ff; + val as u16 + } + #[doc = "Byte count"] + #[inline(always)] + pub fn set_bcnt(&mut self, val: u16) { + self.0 = (self.0 & !(0x07ff << 4usize)) | (((val as u32) & 0x07ff) << 4usize); + } + #[doc = "Data PID"] + #[inline(always)] + pub const fn dpid(&self) -> super::vals::Dpid { + let val = (self.0 >> 15usize) & 0x03; + super::vals::Dpid::from_bits(val as u8) + } + #[doc = "Data PID"] + #[inline(always)] + pub fn set_dpid(&mut self, val: super::vals::Dpid) { + self.0 = (self.0 & !(0x03 << 15usize)) | (((val.to_bits() as u32) & 0x03) << 15usize); + } + #[doc = "Packet status (device mode)"] + #[inline(always)] + pub const fn pktstsd(&self) -> super::vals::Pktstsd { + let val = (self.0 >> 17usize) & 0x0f; + super::vals::Pktstsd::from_bits(val as u8) + } + #[doc = "Packet status (device mode)"] + #[inline(always)] + pub fn set_pktstsd(&mut self, val: super::vals::Pktstsd) { + self.0 = (self.0 & !(0x0f << 17usize)) | (((val.to_bits() as u32) & 0x0f) << 17usize); + } + #[doc = "Packet status (host mode)"] + #[inline(always)] + pub const fn pktstsh(&self) -> super::vals::Pktstsh { + let val = (self.0 >> 17usize) & 0x0f; + super::vals::Pktstsh::from_bits(val as u8) + } + #[doc = "Packet status (host mode)"] + #[inline(always)] + pub fn set_pktstsh(&mut self, val: super::vals::Pktstsh) { + self.0 = (self.0 & !(0x0f << 17usize)) | (((val.to_bits() as u32) & 0x0f) << 17usize); + } + #[doc = "Frame number (device mode)"] + #[inline(always)] + pub const fn frmnum(&self) -> u8 { + let val = (self.0 >> 21usize) & 0x0f; + val as u8 + } + #[doc = "Frame number (device mode)"] + #[inline(always)] + pub fn set_frmnum(&mut self, val: u8) { + self.0 = (self.0 & !(0x0f << 21usize)) | (((val as u32) & 0x0f) << 21usize); + } + } + impl Default for Grxsts { + #[inline(always)] + fn default() -> Grxsts { + Grxsts(0) + } + } + #[doc = "USB configuration register"] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct Gusbcfg(pub u32); + impl Gusbcfg { + #[doc = "FS timeout calibration"] + #[inline(always)] + pub const fn tocal(&self) -> u8 { + let val = (self.0 >> 0usize) & 0x07; + val as u8 + } + #[doc = "FS timeout calibration"] + #[inline(always)] + pub fn set_tocal(&mut self, val: u8) { + self.0 = (self.0 & !(0x07 << 0usize)) | (((val as u32) & 0x07) << 0usize); + } + #[doc = "Full-speed internal serial transceiver enable"] + #[inline(always)] + pub const fn physel(&self) -> bool { + let val = (self.0 >> 6usize) & 0x01; + val != 0 + } + #[doc = "Full-speed internal serial transceiver enable"] + #[inline(always)] + pub fn set_physel(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 6usize)) | (((val as u32) & 0x01) << 6usize); + } + #[doc = "SRP-capable"] + #[inline(always)] + pub const fn srpcap(&self) -> bool { + let val = (self.0 >> 8usize) & 0x01; + val != 0 + } + #[doc = "SRP-capable"] + #[inline(always)] + pub fn set_srpcap(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 8usize)) | (((val as u32) & 0x01) << 8usize); + } + #[doc = "HNP-capable"] + #[inline(always)] + pub const fn hnpcap(&self) -> bool { + let val = (self.0 >> 9usize) & 0x01; + val != 0 + } + #[doc = "HNP-capable"] + #[inline(always)] + pub fn set_hnpcap(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 9usize)) | (((val as u32) & 0x01) << 9usize); + } + #[doc = "USB turnaround time"] + #[inline(always)] + pub const fn trdt(&self) -> u8 { + let val = (self.0 >> 10usize) & 0x0f; + val as u8 + } + #[doc = "USB turnaround time"] + #[inline(always)] + pub fn set_trdt(&mut self, val: u8) { + self.0 = (self.0 & !(0x0f << 10usize)) | (((val as u32) & 0x0f) << 10usize); + } + #[doc = "PHY Low-power clock select"] + #[inline(always)] + pub const fn phylpcs(&self) -> bool { + let val = (self.0 >> 15usize) & 0x01; + val != 0 + } + #[doc = "PHY Low-power clock select"] + #[inline(always)] + pub fn set_phylpcs(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 15usize)) | (((val as u32) & 0x01) << 15usize); + } + #[doc = "ULPI FS/LS select"] + #[inline(always)] + pub const fn ulpifsls(&self) -> bool { + let val = (self.0 >> 17usize) & 0x01; + val != 0 + } + #[doc = "ULPI FS/LS select"] + #[inline(always)] + pub fn set_ulpifsls(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 17usize)) | (((val as u32) & 0x01) << 17usize); + } + #[doc = "ULPI Auto-resume"] + #[inline(always)] + pub const fn ulpiar(&self) -> bool { + let val = (self.0 >> 18usize) & 0x01; + val != 0 + } + #[doc = "ULPI Auto-resume"] + #[inline(always)] + pub fn set_ulpiar(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 18usize)) | (((val as u32) & 0x01) << 18usize); + } + #[doc = "ULPI Clock SuspendM"] + #[inline(always)] + pub const fn ulpicsm(&self) -> bool { + let val = (self.0 >> 19usize) & 0x01; + val != 0 + } + #[doc = "ULPI Clock SuspendM"] + #[inline(always)] + pub fn set_ulpicsm(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 19usize)) | (((val as u32) & 0x01) << 19usize); + } + #[doc = "ULPI External VBUS Drive"] + #[inline(always)] + pub const fn ulpievbusd(&self) -> bool { + let val = (self.0 >> 20usize) & 0x01; + val != 0 + } + #[doc = "ULPI External VBUS Drive"] + #[inline(always)] + pub fn set_ulpievbusd(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 20usize)) | (((val as u32) & 0x01) << 20usize); + } + #[doc = "ULPI external VBUS indicator"] + #[inline(always)] + pub const fn ulpievbusi(&self) -> bool { + let val = (self.0 >> 21usize) & 0x01; + val != 0 + } + #[doc = "ULPI external VBUS indicator"] + #[inline(always)] + pub fn set_ulpievbusi(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 21usize)) | (((val as u32) & 0x01) << 21usize); + } + #[doc = "TermSel DLine pulsing selection"] + #[inline(always)] + pub const fn tsdps(&self) -> bool { + let val = (self.0 >> 22usize) & 0x01; + val != 0 + } + #[doc = "TermSel DLine pulsing selection"] + #[inline(always)] + pub fn set_tsdps(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 22usize)) | (((val as u32) & 0x01) << 22usize); + } + #[doc = "Indicator complement"] + #[inline(always)] + pub const fn pcci(&self) -> bool { + let val = (self.0 >> 23usize) & 0x01; + val != 0 + } + #[doc = "Indicator complement"] + #[inline(always)] + pub fn set_pcci(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 23usize)) | (((val as u32) & 0x01) << 23usize); + } + #[doc = "Indicator pass through"] + #[inline(always)] + pub const fn ptci(&self) -> bool { + let val = (self.0 >> 24usize) & 0x01; + val != 0 + } + #[doc = "Indicator pass through"] + #[inline(always)] + pub fn set_ptci(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 24usize)) | (((val as u32) & 0x01) << 24usize); + } + #[doc = "ULPI interface protect disable"] + #[inline(always)] + pub const fn ulpiipd(&self) -> bool { + let val = (self.0 >> 25usize) & 0x01; + val != 0 + } + #[doc = "ULPI interface protect disable"] + #[inline(always)] + pub fn set_ulpiipd(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 25usize)) | (((val as u32) & 0x01) << 25usize); + } + #[doc = "Force host mode"] + #[inline(always)] + pub const fn fhmod(&self) -> bool { + let val = (self.0 >> 29usize) & 0x01; + val != 0 + } + #[doc = "Force host mode"] + #[inline(always)] + pub fn set_fhmod(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 29usize)) | (((val as u32) & 0x01) << 29usize); + } + #[doc = "Force device mode"] + #[inline(always)] + pub const fn fdmod(&self) -> bool { + let val = (self.0 >> 30usize) & 0x01; + val != 0 + } + #[doc = "Force device mode"] + #[inline(always)] + pub fn set_fdmod(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 30usize)) | (((val as u32) & 0x01) << 30usize); + } + #[doc = "Corrupt Tx packet"] + #[inline(always)] + pub const fn ctxpkt(&self) -> bool { + let val = (self.0 >> 31usize) & 0x01; + val != 0 + } + #[doc = "Corrupt Tx packet"] + #[inline(always)] + pub fn set_ctxpkt(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 31usize)) | (((val as u32) & 0x01) << 31usize); + } + } + impl Default for Gusbcfg { + #[inline(always)] + fn default() -> Gusbcfg { + Gusbcfg(0) + } + } + #[doc = "Host all channels interrupt register"] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct Haint(pub u32); + impl Haint { + #[doc = "Channel interrupts"] + #[inline(always)] + pub const fn haint(&self) -> u16 { + let val = (self.0 >> 0usize) & 0xffff; + val as u16 + } + #[doc = "Channel interrupts"] + #[inline(always)] + pub fn set_haint(&mut self, val: u16) { + self.0 = (self.0 & !(0xffff << 0usize)) | (((val as u32) & 0xffff) << 0usize); + } + } + impl Default for Haint { + #[inline(always)] + fn default() -> Haint { + Haint(0) + } + } + #[doc = "Host all channels interrupt mask register"] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct Haintmsk(pub u32); + impl Haintmsk { + #[doc = "Channel interrupt mask"] + #[inline(always)] + pub const fn haintm(&self) -> u16 { + let val = (self.0 >> 0usize) & 0xffff; + val as u16 + } + #[doc = "Channel interrupt mask"] + #[inline(always)] + pub fn set_haintm(&mut self, val: u16) { + self.0 = (self.0 & !(0xffff << 0usize)) | (((val as u32) & 0xffff) << 0usize); + } + } + impl Default for Haintmsk { + #[inline(always)] + fn default() -> Haintmsk { + Haintmsk(0) + } + } + #[doc = "Host channel characteristics register"] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct Hcchar(pub u32); + impl Hcchar { + #[doc = "Maximum packet size"] + #[inline(always)] + pub const fn mpsiz(&self) -> u16 { + let val = (self.0 >> 0usize) & 0x07ff; + val as u16 + } + #[doc = "Maximum packet size"] + #[inline(always)] + pub fn set_mpsiz(&mut self, val: u16) { + self.0 = (self.0 & !(0x07ff << 0usize)) | (((val as u32) & 0x07ff) << 0usize); + } + #[doc = "Endpoint number"] + #[inline(always)] + pub const fn epnum(&self) -> u8 { + let val = (self.0 >> 11usize) & 0x0f; + val as u8 + } + #[doc = "Endpoint number"] + #[inline(always)] + pub fn set_epnum(&mut self, val: u8) { + self.0 = (self.0 & !(0x0f << 11usize)) | (((val as u32) & 0x0f) << 11usize); + } + #[doc = "Endpoint direction"] + #[inline(always)] + pub const fn epdir(&self) -> bool { + let val = (self.0 >> 15usize) & 0x01; + val != 0 + } + #[doc = "Endpoint direction"] + #[inline(always)] + pub fn set_epdir(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 15usize)) | (((val as u32) & 0x01) << 15usize); + } + #[doc = "Low-speed device"] + #[inline(always)] + pub const fn lsdev(&self) -> bool { + let val = (self.0 >> 17usize) & 0x01; + val != 0 + } + #[doc = "Low-speed device"] + #[inline(always)] + pub fn set_lsdev(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 17usize)) | (((val as u32) & 0x01) << 17usize); + } + #[doc = "Endpoint type"] + #[inline(always)] + pub const fn eptyp(&self) -> super::vals::Eptyp { + let val = (self.0 >> 18usize) & 0x03; + super::vals::Eptyp::from_bits(val as u8) + } + #[doc = "Endpoint type"] + #[inline(always)] + pub fn set_eptyp(&mut self, val: super::vals::Eptyp) { + self.0 = (self.0 & !(0x03 << 18usize)) | (((val.to_bits() as u32) & 0x03) << 18usize); + } + #[doc = "Multicount"] + #[inline(always)] + pub const fn mcnt(&self) -> u8 { + let val = (self.0 >> 20usize) & 0x03; + val as u8 + } + #[doc = "Multicount"] + #[inline(always)] + pub fn set_mcnt(&mut self, val: u8) { + self.0 = (self.0 & !(0x03 << 20usize)) | (((val as u32) & 0x03) << 20usize); + } + #[doc = "Device address"] + #[inline(always)] + pub const fn dad(&self) -> u8 { + let val = (self.0 >> 22usize) & 0x7f; + val as u8 + } + #[doc = "Device address"] + #[inline(always)] + pub fn set_dad(&mut self, val: u8) { + self.0 = (self.0 & !(0x7f << 22usize)) | (((val as u32) & 0x7f) << 22usize); + } + #[doc = "Odd frame"] + #[inline(always)] + pub const fn oddfrm(&self) -> bool { + let val = (self.0 >> 29usize) & 0x01; + val != 0 + } + #[doc = "Odd frame"] + #[inline(always)] + pub fn set_oddfrm(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 29usize)) | (((val as u32) & 0x01) << 29usize); + } + #[doc = "Channel disable"] + #[inline(always)] + pub const fn chdis(&self) -> bool { + let val = (self.0 >> 30usize) & 0x01; + val != 0 + } + #[doc = "Channel disable"] + #[inline(always)] + pub fn set_chdis(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 30usize)) | (((val as u32) & 0x01) << 30usize); + } + #[doc = "Channel enable"] + #[inline(always)] + pub const fn chena(&self) -> bool { + let val = (self.0 >> 31usize) & 0x01; + val != 0 + } + #[doc = "Channel enable"] + #[inline(always)] + pub fn set_chena(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 31usize)) | (((val as u32) & 0x01) << 31usize); + } + } + impl Default for Hcchar { + #[inline(always)] + fn default() -> Hcchar { + Hcchar(0) + } + } + #[doc = "Host configuration register"] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct Hcfg(pub u32); + impl Hcfg { + #[doc = "FS/LS PHY clock select"] + #[inline(always)] + pub const fn fslspcs(&self) -> u8 { + let val = (self.0 >> 0usize) & 0x03; + val as u8 + } + #[doc = "FS/LS PHY clock select"] + #[inline(always)] + pub fn set_fslspcs(&mut self, val: u8) { + self.0 = (self.0 & !(0x03 << 0usize)) | (((val as u32) & 0x03) << 0usize); + } + #[doc = "FS- and LS-only support"] + #[inline(always)] + pub const fn fslss(&self) -> bool { + let val = (self.0 >> 2usize) & 0x01; + val != 0 + } + #[doc = "FS- and LS-only support"] + #[inline(always)] + pub fn set_fslss(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 2usize)) | (((val as u32) & 0x01) << 2usize); + } + } + impl Default for Hcfg { + #[inline(always)] + fn default() -> Hcfg { + Hcfg(0) + } + } + #[doc = "Host channel interrupt register"] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct Hcint(pub u32); + impl Hcint { + #[doc = "Transfer completed"] + #[inline(always)] + pub const fn xfrc(&self) -> bool { + let val = (self.0 >> 0usize) & 0x01; + val != 0 + } + #[doc = "Transfer completed"] + #[inline(always)] + pub fn set_xfrc(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize); + } + #[doc = "Channel halted"] + #[inline(always)] + pub const fn chh(&self) -> bool { + let val = (self.0 >> 1usize) & 0x01; + val != 0 + } + #[doc = "Channel halted"] + #[inline(always)] + pub fn set_chh(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 1usize)) | (((val as u32) & 0x01) << 1usize); + } + #[doc = "STALL response received interrupt"] + #[inline(always)] + pub const fn stall(&self) -> bool { + let val = (self.0 >> 3usize) & 0x01; + val != 0 + } + #[doc = "STALL response received interrupt"] + #[inline(always)] + pub fn set_stall(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 3usize)) | (((val as u32) & 0x01) << 3usize); + } + #[doc = "NAK response received interrupt"] + #[inline(always)] + pub const fn nak(&self) -> bool { + let val = (self.0 >> 4usize) & 0x01; + val != 0 + } + #[doc = "NAK response received interrupt"] + #[inline(always)] + pub fn set_nak(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 4usize)) | (((val as u32) & 0x01) << 4usize); + } + #[doc = "ACK response received/transmitted interrupt"] + #[inline(always)] + pub const fn ack(&self) -> bool { + let val = (self.0 >> 5usize) & 0x01; + val != 0 + } + #[doc = "ACK response received/transmitted interrupt"] + #[inline(always)] + pub fn set_ack(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 5usize)) | (((val as u32) & 0x01) << 5usize); + } + #[doc = "Transaction error"] + #[inline(always)] + pub const fn txerr(&self) -> bool { + let val = (self.0 >> 7usize) & 0x01; + val != 0 + } + #[doc = "Transaction error"] + #[inline(always)] + pub fn set_txerr(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 7usize)) | (((val as u32) & 0x01) << 7usize); + } + #[doc = "Babble error"] + #[inline(always)] + pub const fn bberr(&self) -> bool { + let val = (self.0 >> 8usize) & 0x01; + val != 0 + } + #[doc = "Babble error"] + #[inline(always)] + pub fn set_bberr(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 8usize)) | (((val as u32) & 0x01) << 8usize); + } + #[doc = "Frame overrun"] + #[inline(always)] + pub const fn frmor(&self) -> bool { + let val = (self.0 >> 9usize) & 0x01; + val != 0 + } + #[doc = "Frame overrun"] + #[inline(always)] + pub fn set_frmor(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 9usize)) | (((val as u32) & 0x01) << 9usize); + } + #[doc = "Data toggle error"] + #[inline(always)] + pub const fn dterr(&self) -> bool { + let val = (self.0 >> 10usize) & 0x01; + val != 0 + } + #[doc = "Data toggle error"] + #[inline(always)] + pub fn set_dterr(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 10usize)) | (((val as u32) & 0x01) << 10usize); + } + } + impl Default for Hcint { + #[inline(always)] + fn default() -> Hcint { + Hcint(0) + } + } + #[doc = "Host channel mask register"] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct Hcintmsk(pub u32); + impl Hcintmsk { + #[doc = "Transfer completed mask"] + #[inline(always)] + pub const fn xfrcm(&self) -> bool { + let val = (self.0 >> 0usize) & 0x01; + val != 0 + } + #[doc = "Transfer completed mask"] + #[inline(always)] + pub fn set_xfrcm(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize); + } + #[doc = "Channel halted mask"] + #[inline(always)] + pub const fn chhm(&self) -> bool { + let val = (self.0 >> 1usize) & 0x01; + val != 0 + } + #[doc = "Channel halted mask"] + #[inline(always)] + pub fn set_chhm(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 1usize)) | (((val as u32) & 0x01) << 1usize); + } + #[doc = "STALL response received interrupt mask"] + #[inline(always)] + pub const fn stallm(&self) -> bool { + let val = (self.0 >> 3usize) & 0x01; + val != 0 + } + #[doc = "STALL response received interrupt mask"] + #[inline(always)] + pub fn set_stallm(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 3usize)) | (((val as u32) & 0x01) << 3usize); + } + #[doc = "NAK response received interrupt mask"] + #[inline(always)] + pub const fn nakm(&self) -> bool { + let val = (self.0 >> 4usize) & 0x01; + val != 0 + } + #[doc = "NAK response received interrupt mask"] + #[inline(always)] + pub fn set_nakm(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 4usize)) | (((val as u32) & 0x01) << 4usize); + } + #[doc = "ACK response received/transmitted interrupt mask"] + #[inline(always)] + pub const fn ackm(&self) -> bool { + let val = (self.0 >> 5usize) & 0x01; + val != 0 + } + #[doc = "ACK response received/transmitted interrupt mask"] + #[inline(always)] + pub fn set_ackm(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 5usize)) | (((val as u32) & 0x01) << 5usize); + } + #[doc = "Response received interrupt mask"] + #[inline(always)] + pub const fn nyet(&self) -> bool { + let val = (self.0 >> 6usize) & 0x01; + val != 0 + } + #[doc = "Response received interrupt mask"] + #[inline(always)] + pub fn set_nyet(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 6usize)) | (((val as u32) & 0x01) << 6usize); + } + #[doc = "Transaction error mask"] + #[inline(always)] + pub const fn txerrm(&self) -> bool { + let val = (self.0 >> 7usize) & 0x01; + val != 0 + } + #[doc = "Transaction error mask"] + #[inline(always)] + pub fn set_txerrm(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 7usize)) | (((val as u32) & 0x01) << 7usize); + } + #[doc = "Babble error mask"] + #[inline(always)] + pub const fn bberrm(&self) -> bool { + let val = (self.0 >> 8usize) & 0x01; + val != 0 + } + #[doc = "Babble error mask"] + #[inline(always)] + pub fn set_bberrm(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 8usize)) | (((val as u32) & 0x01) << 8usize); + } + #[doc = "Frame overrun mask"] + #[inline(always)] + pub const fn frmorm(&self) -> bool { + let val = (self.0 >> 9usize) & 0x01; + val != 0 + } + #[doc = "Frame overrun mask"] + #[inline(always)] + pub fn set_frmorm(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 9usize)) | (((val as u32) & 0x01) << 9usize); + } + #[doc = "Data toggle error mask"] + #[inline(always)] + pub const fn dterrm(&self) -> bool { + let val = (self.0 >> 10usize) & 0x01; + val != 0 + } + #[doc = "Data toggle error mask"] + #[inline(always)] + pub fn set_dterrm(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 10usize)) | (((val as u32) & 0x01) << 10usize); + } + } + impl Default for Hcintmsk { + #[inline(always)] + fn default() -> Hcintmsk { + Hcintmsk(0) + } + } + #[doc = "Host channel transfer size register"] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct Hctsiz(pub u32); + impl Hctsiz { + #[doc = "Transfer size"] + #[inline(always)] + pub const fn xfrsiz(&self) -> u32 { + let val = (self.0 >> 0usize) & 0x0007_ffff; + val as u32 + } + #[doc = "Transfer size"] + #[inline(always)] + pub fn set_xfrsiz(&mut self, val: u32) { + self.0 = (self.0 & !(0x0007_ffff << 0usize)) | (((val as u32) & 0x0007_ffff) << 0usize); + } + #[doc = "Packet count"] + #[inline(always)] + pub const fn pktcnt(&self) -> u16 { + let val = (self.0 >> 19usize) & 0x03ff; + val as u16 + } + #[doc = "Packet count"] + #[inline(always)] + pub fn set_pktcnt(&mut self, val: u16) { + self.0 = (self.0 & !(0x03ff << 19usize)) | (((val as u32) & 0x03ff) << 19usize); + } + #[doc = "Data PID"] + #[inline(always)] + pub const fn dpid(&self) -> u8 { + let val = (self.0 >> 29usize) & 0x03; + val as u8 + } + #[doc = "Data PID"] + #[inline(always)] + pub fn set_dpid(&mut self, val: u8) { + self.0 = (self.0 & !(0x03 << 29usize)) | (((val as u32) & 0x03) << 29usize); + } + } + impl Default for Hctsiz { + #[inline(always)] + fn default() -> Hctsiz { + Hctsiz(0) + } + } + #[doc = "Host frame interval register"] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct Hfir(pub u32); + impl Hfir { + #[doc = "Frame interval"] + #[inline(always)] + pub const fn frivl(&self) -> u16 { + let val = (self.0 >> 0usize) & 0xffff; + val as u16 + } + #[doc = "Frame interval"] + #[inline(always)] + pub fn set_frivl(&mut self, val: u16) { + self.0 = (self.0 & !(0xffff << 0usize)) | (((val as u32) & 0xffff) << 0usize); + } + } + impl Default for Hfir { + #[inline(always)] + fn default() -> Hfir { + Hfir(0) + } + } + #[doc = "Host frame number/frame time remaining register"] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct Hfnum(pub u32); + impl Hfnum { + #[doc = "Frame number"] + #[inline(always)] + pub const fn frnum(&self) -> u16 { + let val = (self.0 >> 0usize) & 0xffff; + val as u16 + } + #[doc = "Frame number"] + #[inline(always)] + pub fn set_frnum(&mut self, val: u16) { + self.0 = (self.0 & !(0xffff << 0usize)) | (((val as u32) & 0xffff) << 0usize); + } + #[doc = "Frame time remaining"] + #[inline(always)] + pub const fn ftrem(&self) -> u16 { + let val = (self.0 >> 16usize) & 0xffff; + val as u16 + } + #[doc = "Frame time remaining"] + #[inline(always)] + pub fn set_ftrem(&mut self, val: u16) { + self.0 = (self.0 & !(0xffff << 16usize)) | (((val as u32) & 0xffff) << 16usize); + } + } + impl Default for Hfnum { + #[inline(always)] + fn default() -> Hfnum { + Hfnum(0) + } + } + #[doc = "Non-periodic transmit FIFO/queue status register"] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct Hnptxsts(pub u32); + impl Hnptxsts { + #[doc = "Non-periodic TxFIFO space available"] + #[inline(always)] + pub const fn nptxfsav(&self) -> u16 { + let val = (self.0 >> 0usize) & 0xffff; + val as u16 + } + #[doc = "Non-periodic TxFIFO space available"] + #[inline(always)] + pub fn set_nptxfsav(&mut self, val: u16) { + self.0 = (self.0 & !(0xffff << 0usize)) | (((val as u32) & 0xffff) << 0usize); + } + #[doc = "Non-periodic transmit request queue space available"] + #[inline(always)] + pub const fn nptqxsav(&self) -> u8 { + let val = (self.0 >> 16usize) & 0xff; + val as u8 + } + #[doc = "Non-periodic transmit request queue space available"] + #[inline(always)] + pub fn set_nptqxsav(&mut self, val: u8) { + self.0 = (self.0 & !(0xff << 16usize)) | (((val as u32) & 0xff) << 16usize); + } + #[doc = "Top of the non-periodic transmit request queue"] + #[inline(always)] + pub const fn nptxqtop(&self) -> u8 { + let val = (self.0 >> 24usize) & 0x7f; + val as u8 + } + #[doc = "Top of the non-periodic transmit request queue"] + #[inline(always)] + pub fn set_nptxqtop(&mut self, val: u8) { + self.0 = (self.0 & !(0x7f << 24usize)) | (((val as u32) & 0x7f) << 24usize); + } + } + impl Default for Hnptxsts { + #[inline(always)] + fn default() -> Hnptxsts { + Hnptxsts(0) + } + } + #[doc = "Host port control and status register"] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct Hprt(pub u32); + impl Hprt { + #[doc = "Port connect status"] + #[inline(always)] + pub const fn pcsts(&self) -> bool { + let val = (self.0 >> 0usize) & 0x01; + val != 0 + } + #[doc = "Port connect status"] + #[inline(always)] + pub fn set_pcsts(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize); + } + #[doc = "Port connect detected"] + #[inline(always)] + pub const fn pcdet(&self) -> bool { + let val = (self.0 >> 1usize) & 0x01; + val != 0 + } + #[doc = "Port connect detected"] + #[inline(always)] + pub fn set_pcdet(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 1usize)) | (((val as u32) & 0x01) << 1usize); + } + #[doc = "Port enable"] + #[inline(always)] + pub const fn pena(&self) -> bool { + let val = (self.0 >> 2usize) & 0x01; + val != 0 + } + #[doc = "Port enable"] + #[inline(always)] + pub fn set_pena(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 2usize)) | (((val as u32) & 0x01) << 2usize); + } + #[doc = "Port enable/disable change"] + #[inline(always)] + pub const fn penchng(&self) -> bool { + let val = (self.0 >> 3usize) & 0x01; + val != 0 + } + #[doc = "Port enable/disable change"] + #[inline(always)] + pub fn set_penchng(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 3usize)) | (((val as u32) & 0x01) << 3usize); + } + #[doc = "Port overcurrent active"] + #[inline(always)] + pub const fn poca(&self) -> bool { + let val = (self.0 >> 4usize) & 0x01; + val != 0 + } + #[doc = "Port overcurrent active"] + #[inline(always)] + pub fn set_poca(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 4usize)) | (((val as u32) & 0x01) << 4usize); + } + #[doc = "Port overcurrent change"] + #[inline(always)] + pub const fn pocchng(&self) -> bool { + let val = (self.0 >> 5usize) & 0x01; + val != 0 + } + #[doc = "Port overcurrent change"] + #[inline(always)] + pub fn set_pocchng(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 5usize)) | (((val as u32) & 0x01) << 5usize); + } + #[doc = "Port resume"] + #[inline(always)] + pub const fn pres(&self) -> bool { + let val = (self.0 >> 6usize) & 0x01; + val != 0 + } + #[doc = "Port resume"] + #[inline(always)] + pub fn set_pres(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 6usize)) | (((val as u32) & 0x01) << 6usize); + } + #[doc = "Port suspend"] + #[inline(always)] + pub const fn psusp(&self) -> bool { + let val = (self.0 >> 7usize) & 0x01; + val != 0 + } + #[doc = "Port suspend"] + #[inline(always)] + pub fn set_psusp(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 7usize)) | (((val as u32) & 0x01) << 7usize); + } + #[doc = "Port reset"] + #[inline(always)] + pub const fn prst(&self) -> bool { + let val = (self.0 >> 8usize) & 0x01; + val != 0 + } + #[doc = "Port reset"] + #[inline(always)] + pub fn set_prst(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 8usize)) | (((val as u32) & 0x01) << 8usize); + } + #[doc = "Port line status"] + #[inline(always)] + pub const fn plsts(&self) -> u8 { + let val = (self.0 >> 10usize) & 0x03; + val as u8 + } + #[doc = "Port line status"] + #[inline(always)] + pub fn set_plsts(&mut self, val: u8) { + self.0 = (self.0 & !(0x03 << 10usize)) | (((val as u32) & 0x03) << 10usize); + } + #[doc = "Port power"] + #[inline(always)] + pub const fn ppwr(&self) -> bool { + let val = (self.0 >> 12usize) & 0x01; + val != 0 + } + #[doc = "Port power"] + #[inline(always)] + pub fn set_ppwr(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 12usize)) | (((val as u32) & 0x01) << 12usize); + } + #[doc = "Port test control"] + #[inline(always)] + pub const fn ptctl(&self) -> u8 { + let val = (self.0 >> 13usize) & 0x0f; + val as u8 + } + #[doc = "Port test control"] + #[inline(always)] + pub fn set_ptctl(&mut self, val: u8) { + self.0 = (self.0 & !(0x0f << 13usize)) | (((val as u32) & 0x0f) << 13usize); + } + #[doc = "Port speed"] + #[inline(always)] + pub const fn pspd(&self) -> u8 { + let val = (self.0 >> 17usize) & 0x03; + val as u8 + } + #[doc = "Port speed"] + #[inline(always)] + pub fn set_pspd(&mut self, val: u8) { + self.0 = (self.0 & !(0x03 << 17usize)) | (((val as u32) & 0x03) << 17usize); + } + } + impl Default for Hprt { + #[inline(always)] + fn default() -> Hprt { + Hprt(0) + } + } + #[doc = "Periodic transmit FIFO/queue status register"] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct Hptxsts(pub u32); + impl Hptxsts { + #[doc = "Periodic transmit data FIFO space available"] + #[inline(always)] + pub const fn ptxfsavl(&self) -> u16 { + let val = (self.0 >> 0usize) & 0xffff; + val as u16 + } + #[doc = "Periodic transmit data FIFO space available"] + #[inline(always)] + pub fn set_ptxfsavl(&mut self, val: u16) { + self.0 = (self.0 & !(0xffff << 0usize)) | (((val as u32) & 0xffff) << 0usize); + } + #[doc = "Periodic transmit request queue space available"] + #[inline(always)] + pub const fn ptxqsav(&self) -> u8 { + let val = (self.0 >> 16usize) & 0xff; + val as u8 + } + #[doc = "Periodic transmit request queue space available"] + #[inline(always)] + pub fn set_ptxqsav(&mut self, val: u8) { + self.0 = (self.0 & !(0xff << 16usize)) | (((val as u32) & 0xff) << 16usize); + } + #[doc = "Top of the periodic transmit request queue"] + #[inline(always)] + pub const fn ptxqtop(&self) -> u8 { + let val = (self.0 >> 24usize) & 0xff; + val as u8 + } + #[doc = "Top of the periodic transmit request queue"] + #[inline(always)] + pub fn set_ptxqtop(&mut self, val: u8) { + self.0 = (self.0 & !(0xff << 24usize)) | (((val as u32) & 0xff) << 24usize); + } + } + impl Default for Hptxsts { + #[inline(always)] + fn default() -> Hptxsts { + Hptxsts(0) + } + } + #[doc = "Power and clock gating control register"] + #[repr(transparent)] + #[derive(Copy, Clone, Eq, PartialEq)] + pub struct Pcgcctl(pub u32); + impl Pcgcctl { + #[doc = "Stop PHY clock"] + #[inline(always)] + pub const fn stppclk(&self) -> bool { + let val = (self.0 >> 0usize) & 0x01; + val != 0 + } + #[doc = "Stop PHY clock"] + #[inline(always)] + pub fn set_stppclk(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize); + } + #[doc = "Gate HCLK"] + #[inline(always)] + pub const fn gatehclk(&self) -> bool { + let val = (self.0 >> 1usize) & 0x01; + val != 0 + } + #[doc = "Gate HCLK"] + #[inline(always)] + pub fn set_gatehclk(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 1usize)) | (((val as u32) & 0x01) << 1usize); + } + #[doc = "PHY Suspended"] + #[inline(always)] + pub const fn physusp(&self) -> bool { + let val = (self.0 >> 4usize) & 0x01; + val != 0 + } + #[doc = "PHY Suspended"] + #[inline(always)] + pub fn set_physusp(&mut self, val: bool) { + self.0 = (self.0 & !(0x01 << 4usize)) | (((val as u32) & 0x01) << 4usize); + } + } + impl Default for Pcgcctl { + #[inline(always)] + fn default() -> Pcgcctl { + Pcgcctl(0) + } + } +} +pub mod vals { + #[repr(u8)] + #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] + #[allow(non_camel_case_types)] + pub enum Dpid { + DATA0 = 0x0, + DATA2 = 0x01, + DATA1 = 0x02, + MDATA = 0x03, + } + impl Dpid { + #[inline(always)] + pub const fn from_bits(val: u8) -> Dpid { + unsafe { core::mem::transmute(val & 0x03) } + } + #[inline(always)] + pub const fn to_bits(self) -> u8 { + unsafe { core::mem::transmute(self) } + } + } + impl From for Dpid { + #[inline(always)] + fn from(val: u8) -> Dpid { + Dpid::from_bits(val) + } + } + impl From for u8 { + #[inline(always)] + fn from(val: Dpid) -> u8 { + Dpid::to_bits(val) + } + } + #[repr(u8)] + #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] + #[allow(non_camel_case_types)] + pub enum Dspd { + #[doc = "High speed"] + HIGH_SPEED = 0x0, + #[doc = "Full speed using external ULPI PHY"] + FULL_SPEED_EXTERNAL = 0x01, + _RESERVED_2 = 0x02, + #[doc = "Full speed using internal embedded PHY"] + FULL_SPEED_INTERNAL = 0x03, + } + impl Dspd { + #[inline(always)] + pub const fn from_bits(val: u8) -> Dspd { + unsafe { core::mem::transmute(val & 0x03) } + } + #[inline(always)] + pub const fn to_bits(self) -> u8 { + unsafe { core::mem::transmute(self) } + } + } + impl From for Dspd { + #[inline(always)] + fn from(val: u8) -> Dspd { + Dspd::from_bits(val) + } + } + impl From for u8 { + #[inline(always)] + fn from(val: Dspd) -> u8 { + Dspd::to_bits(val) + } + } + #[repr(u8)] + #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] + #[allow(non_camel_case_types)] + pub enum Eptyp { + CONTROL = 0x0, + ISOCHRONOUS = 0x01, + BULK = 0x02, + INTERRUPT = 0x03, + } + impl Eptyp { + #[inline(always)] + pub const fn from_bits(val: u8) -> Eptyp { + unsafe { core::mem::transmute(val & 0x03) } + } + #[inline(always)] + pub const fn to_bits(self) -> u8 { + unsafe { core::mem::transmute(self) } + } + } + impl From for Eptyp { + #[inline(always)] + fn from(val: u8) -> Eptyp { + Eptyp::from_bits(val) + } + } + impl From for u8 { + #[inline(always)] + fn from(val: Eptyp) -> u8 { + Eptyp::to_bits(val) + } + } + #[repr(u8)] + #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] + #[allow(non_camel_case_types)] + pub enum Pfivl { + #[doc = "80% of the frame interval"] + FRAME_INTERVAL_80 = 0x0, + #[doc = "85% of the frame interval"] + FRAME_INTERVAL_85 = 0x01, + #[doc = "90% of the frame interval"] + FRAME_INTERVAL_90 = 0x02, + #[doc = "95% of the frame interval"] + FRAME_INTERVAL_95 = 0x03, + } + impl Pfivl { + #[inline(always)] + pub const fn from_bits(val: u8) -> Pfivl { + unsafe { core::mem::transmute(val & 0x03) } + } + #[inline(always)] + pub const fn to_bits(self) -> u8 { + unsafe { core::mem::transmute(self) } + } + } + impl From for Pfivl { + #[inline(always)] + fn from(val: u8) -> Pfivl { + Pfivl::from_bits(val) + } + } + impl From for u8 { + #[inline(always)] + fn from(val: Pfivl) -> u8 { + Pfivl::to_bits(val) + } + } + #[repr(u8)] + #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] + #[allow(non_camel_case_types)] + pub enum Pktstsd { + _RESERVED_0 = 0x0, + #[doc = "Global OUT NAK (triggers an interrupt)"] + OUT_NAK = 0x01, + #[doc = "OUT data packet received"] + OUT_DATA_RX = 0x02, + #[doc = "OUT transfer completed (triggers an interrupt)"] + OUT_DATA_DONE = 0x03, + #[doc = "SETUP transaction completed (triggers an interrupt)"] + SETUP_DATA_DONE = 0x04, + _RESERVED_5 = 0x05, + #[doc = "SETUP data packet received"] + SETUP_DATA_RX = 0x06, + _RESERVED_7 = 0x07, + _RESERVED_8 = 0x08, + _RESERVED_9 = 0x09, + _RESERVED_a = 0x0a, + _RESERVED_b = 0x0b, + _RESERVED_c = 0x0c, + _RESERVED_d = 0x0d, + _RESERVED_e = 0x0e, + _RESERVED_f = 0x0f, + } + impl Pktstsd { + #[inline(always)] + pub const fn from_bits(val: u8) -> Pktstsd { + unsafe { core::mem::transmute(val & 0x0f) } + } + #[inline(always)] + pub const fn to_bits(self) -> u8 { + unsafe { core::mem::transmute(self) } + } + } + impl From for Pktstsd { + #[inline(always)] + fn from(val: u8) -> Pktstsd { + Pktstsd::from_bits(val) + } + } + impl From for u8 { + #[inline(always)] + fn from(val: Pktstsd) -> u8 { + Pktstsd::to_bits(val) + } + } + #[repr(u8)] + #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)] + #[allow(non_camel_case_types)] + pub enum Pktstsh { + _RESERVED_0 = 0x0, + _RESERVED_1 = 0x01, + #[doc = "IN data packet received"] + IN_DATA_RX = 0x02, + #[doc = "IN transfer completed (triggers an interrupt)"] + IN_DATA_DONE = 0x03, + _RESERVED_4 = 0x04, + #[doc = "Data toggle error (triggers an interrupt)"] + DATA_TOGGLE_ERR = 0x05, + _RESERVED_6 = 0x06, + #[doc = "Channel halted (triggers an interrupt)"] + CHANNEL_HALTED = 0x07, + _RESERVED_8 = 0x08, + _RESERVED_9 = 0x09, + _RESERVED_a = 0x0a, + _RESERVED_b = 0x0b, + _RESERVED_c = 0x0c, + _RESERVED_d = 0x0d, + _RESERVED_e = 0x0e, + _RESERVED_f = 0x0f, + } + impl Pktstsh { + #[inline(always)] + pub const fn from_bits(val: u8) -> Pktstsh { + unsafe { core::mem::transmute(val & 0x0f) } + } + #[inline(always)] + pub const fn to_bits(self) -> u8 { + unsafe { core::mem::transmute(self) } + } + } + impl From for Pktstsh { + #[inline(always)] + fn from(val: u8) -> Pktstsh { + Pktstsh::from_bits(val) + } + } + impl From for u8 { + #[inline(always)] + fn from(val: Pktstsh) -> u8 { + Pktstsh::to_bits(val) + } + } +} From 50aefb417496f45a6c79abf2ac1737d737feb9ba Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?D=C3=A1niel=20Buga?= Date: Fri, 26 Apr 2024 18:13:10 +0200 Subject: [PATCH 207/581] Hide the Dir trait --- embassy-stm32/src/usb/otg.rs | 4 ++-- embassy-usb-synopsys-otg/src/lib.rs | 14 ++++++++------ 2 files changed, 10 insertions(+), 8 deletions(-) diff --git a/embassy-stm32/src/usb/otg.rs b/embassy-stm32/src/usb/otg.rs index c59aae87f..0525718e1 100644 --- a/embassy-stm32/src/usb/otg.rs +++ b/embassy-stm32/src/usb/otg.rs @@ -161,7 +161,7 @@ impl<'d, T: Instance> embassy_usb_driver::Driver<'d> for Driver<'d, T> { max_packet_size: u16, interval_ms: u8, ) -> Result { - self.inner.alloc_endpoint(ep_type, max_packet_size, interval_ms) + self.inner.alloc_endpoint_in(ep_type, max_packet_size, interval_ms) } fn alloc_endpoint_out( @@ -170,7 +170,7 @@ impl<'d, T: Instance> embassy_usb_driver::Driver<'d> for Driver<'d, T> { max_packet_size: u16, interval_ms: u8, ) -> Result { - self.inner.alloc_endpoint(ep_type, max_packet_size, interval_ms) + self.inner.alloc_endpoint_out(ep_type, max_packet_size, interval_ms) } fn start(self, control_max_packet_size: u16) -> (Self::Bus, Self::ControlPipe) { diff --git a/embassy-usb-synopsys-otg/src/lib.rs b/embassy-usb-synopsys-otg/src/lib.rs index 6d6cc9b0f..59a99796c 100644 --- a/embassy-usb-synopsys-otg/src/lib.rs +++ b/embassy-usb-synopsys-otg/src/lib.rs @@ -276,7 +276,7 @@ impl Default for Config { } } -/// USB driver. +/// USB OTG driver. pub struct Driver<'d> { config: Config, ep_in: [Option; MAX_EP_COUNT], @@ -287,13 +287,15 @@ pub struct Driver<'d> { } impl<'d> Driver<'d> { - /// Initializes USB OTG peripheral. + /// Initializes the USB OTG peripheral. /// /// # Arguments /// /// * `ep_out_buffer` - An internal buffer used to temporarily store received packets. /// Must be large enough to fit all OUT endpoint max packet sizes. /// Endpoint allocation will fail if it is too small. + /// * `instance` - The USB OTG peripheral instance and its configuration. + /// * `config` - The USB driver configuration. pub fn new(ep_out_buffer: &'d mut [u8], instance: OtgInstance<'d>, config: Config) -> Self { Self { config, @@ -305,13 +307,13 @@ impl<'d> Driver<'d> { } } - // Returns total amount of words (u32) allocated in dedicated FIFO + /// Returns the total amount of words (u32) allocated in dedicated FIFO. fn allocated_fifo_words(&self) -> u16 { self.instance.extra_rx_fifo_words + ep_fifo_size(&self.ep_out) + ep_fifo_size(&self.ep_in) } /// Creates an [`Endpoint`] with the given parameters. - pub fn alloc_endpoint( + fn alloc_endpoint( &mut self, ep_type: EndpointType, max_packet_size: u16, @@ -919,7 +921,7 @@ impl<'d> embassy_usb_driver::Bus for Bus<'d> { } /// USB endpoint direction. -pub trait Dir { +trait Dir { /// Returns the direction value. fn dir() -> Direction; } @@ -1279,7 +1281,7 @@ fn ep0_mpsiz(max_packet_size: u16) -> u16 { // Using OtgInstance::ENDPOINT_COUNT requires feature(const_generic_expr) so just define maximum eps pub const MAX_EP_COUNT: usize = 9; -/// USB instance. +/// Hardware-dependent USB IP configuration. pub struct OtgInstance<'d> { /// The USB peripheral. pub regs: Otg, From 7ce2594eb78a0160928d6a39b778f552f034ddc3 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?D=C3=A1niel=20Buga?= Date: Fri, 26 Apr 2024 18:18:08 +0200 Subject: [PATCH 208/581] Reset inited flag to allow re-enabling --- embassy-stm32/src/usb/otg.rs | 1 + 1 file changed, 1 insertion(+) diff --git a/embassy-stm32/src/usb/otg.rs b/embassy-stm32/src/usb/otg.rs index 0525718e1..fa1a80b17 100644 --- a/embassy-stm32/src/usb/otg.rs +++ b/embassy-stm32/src/usb/otg.rs @@ -245,6 +245,7 @@ impl<'d, T: Instance> Bus<'d, T> { T::Interrupt::disable(); ::disable(); + self.inited = false; #[cfg(stm32l4)] crate::pac::PWR.cr2().modify(|w| w.set_usv(false)); From 3dc54c8c445cd193110d5c18a695d18761bf04d9 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?D=C3=A1niel=20Buga?= Date: Fri, 26 Apr 2024 18:28:41 +0200 Subject: [PATCH 209/581] Add some metadata --- embassy-time/Cargo.toml | 6 +++--- embassy-usb-driver/Cargo.toml | 2 +- embassy-usb-synopsys-otg/Cargo.toml | 14 ++++++++++++++ embassy-usb-synopsys-otg/README.md | 6 +++++- 4 files changed, 23 insertions(+), 5 deletions(-) diff --git a/embassy-time/Cargo.toml b/embassy-time/Cargo.toml index 6b0a0f22d..ca7ad2d09 100644 --- a/embassy-time/Cargo.toml +++ b/embassy-time/Cargo.toml @@ -42,7 +42,7 @@ generic-queue = [] #! The following features set how many timers are used for the generic queue. At most one #! `generic-queue-*` feature can be enabled. If none is enabled, a default of 64 timers is used. -#! +#! #! When using embassy-time from libraries, you should *not* enable any `generic-queue-*` feature, to allow the #! end user to pick. @@ -60,7 +60,7 @@ generic-queue-128 = ["generic-queue"] #! ### Tick Rate #! #! At most 1 `tick-*` feature can be enabled. If none is enabled, a default of 1MHz is used. -#! +#! #! If the time driver in use supports using arbitrary tick rates, you can enable one `tick-*` #! feature from your binary crate to set the tick rate. The driver will use configured tick rate. #! If the time driver supports a fixed tick rate, it will enable one feature itself, so you should @@ -71,7 +71,7 @@ generic-queue-128 = ["generic-queue"] #!

#! Available tick rates: #! -#! +#! # BEGIN TICKS # Generated by gen_tick.py. DO NOT EDIT. diff --git a/embassy-usb-driver/Cargo.toml b/embassy-usb-driver/Cargo.toml index 837878621..00ed60cf9 100644 --- a/embassy-usb-driver/Cargo.toml +++ b/embassy-usb-driver/Cargo.toml @@ -12,7 +12,7 @@ documentation = "https://docs.embassy.dev/embassy-usb-driver" # See more keys and their definitions at https://doc.rust-lang.org/cargo/reference/manifest.html [package.metadata.embassy_docs] -src_base = "https://github.com/embassy-rs/embassy/blob/embassy-usb-driver-v$VERSION/embassy-usb/src/" +src_base = "https://github.com/embassy-rs/embassy/blob/embassy-usb-driver-v$VERSION/embassy-usb-driver/src/" src_base_git = "https://github.com/embassy-rs/embassy/blob/$COMMIT/embassy-usb-driver/src/" features = ["defmt"] target = "thumbv7em-none-eabi" diff --git a/embassy-usb-synopsys-otg/Cargo.toml b/embassy-usb-synopsys-otg/Cargo.toml index 5693acc38..b0562627b 100644 --- a/embassy-usb-synopsys-otg/Cargo.toml +++ b/embassy-usb-synopsys-otg/Cargo.toml @@ -2,12 +2,26 @@ name = "embassy-usb-synopsys-otg" version = "0.1.0" edition = "2021" +description = "`embassy-usb-driver` implementation for Synopsys OTG USB controllers" +keywords = ["embedded", "async", "usb", "hal", "embedded-hal"] +categories = ["embedded", "hardware-support", "no-std", "asynchronous"] +repository = "https://github.com/embassy-rs/embassy" +documentation = "https://docs.embassy.dev/embassy-usb-synopsys-otg" # See more keys and their definitions at https://doc.rust-lang.org/cargo/reference/manifest.html +[package.metadata.embassy_docs] +src_base = "https://github.com/embassy-rs/embassy/blob/embassy-usb-synopsys-otg-v$VERSION/embassy-usb-synopsys-otg/src/" +src_base_git = "https://github.com/embassy-rs/embassy/blob/$COMMIT/embassy-usb-synopsys-otg/src/" +features = ["defmt"] +target = "thumbv7em-none-eabi" + [dependencies] critical-section = "1.1" futures = { version = "0.3.17", default-features = false } embassy-sync = { version = "0.5.0", path = "../embassy-sync" } embassy-usb-driver = {version = "0.1.0", path = "../embassy-usb-driver" } + +defmt = { version = "0.3", optional = true } +log = { version = "0.4.14", optional = true } diff --git a/embassy-usb-synopsys-otg/README.md b/embassy-usb-synopsys-otg/README.md index c3f914896..fa8d5d6da 100644 --- a/embassy-usb-synopsys-otg/README.md +++ b/embassy-usb-synopsys-otg/README.md @@ -1 +1,5 @@ -# Embassy USB driver for the Synopsys OTG core +# Embassy USB driver for the Synopsys USB OTG core + +This crate implements `embassy-usb-driver` for Synopsys USB OTG devices. If you wish to +integrate this crate into your device's HAL, you will need to add device-specific initialization. +For an example, check out the `embassy-stm32` crate. From bc0408dc4bc935d88ce180113d99cd475aed6c44 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?D=C3=A1niel=20Buga?= Date: Fri, 26 Apr 2024 22:16:26 +0200 Subject: [PATCH 210/581] Remove extra disable call --- embassy-stm32/src/usb/otg.rs | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/embassy-stm32/src/usb/otg.rs b/embassy-stm32/src/usb/otg.rs index fa1a80b17..9551af99b 100644 --- a/embassy-stm32/src/usb/otg.rs +++ b/embassy-stm32/src/usb/otg.rs @@ -280,7 +280,6 @@ impl<'d, T: Instance> embassy_usb_driver::Bus for Bus<'d, T> { } async fn disable(&mut self) { - Bus::disable(self); // NOTE: inner call is a no-op self.inner.disable().await } @@ -291,7 +290,9 @@ impl<'d, T: Instance> embassy_usb_driver::Bus for Bus<'d, T> { } impl<'d, T: Instance> Drop for Bus<'d, T> { - fn drop(&mut self) {} + fn drop(&mut self) { + Bus::disable(self); + } } trait SealedInstance { From 0d07a7b95d1168b8632a02b6b60141a98ec58a82 Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Fri, 26 Apr 2024 22:21:04 +0200 Subject: [PATCH 211/581] Add embassy-usb-synopsys-otg to docs build. --- .github/ci/doc.sh | 1 + 1 file changed, 1 insertion(+) diff --git a/.github/ci/doc.sh b/.github/ci/doc.sh index 7112d8aaa..47babe8f5 100755 --- a/.github/ci/doc.sh +++ b/.github/ci/doc.sh @@ -38,6 +38,7 @@ docserver-builder -i ./embassy-usb -o webroot/crates/embassy-usb/git.zup docserver-builder -i ./embassy-usb-dfu -o webroot/crates/embassy-usb-dfu/git.zup docserver-builder -i ./embassy-usb-driver -o webroot/crates/embassy-usb-driver/git.zup docserver-builder -i ./embassy-usb-logger -o webroot/crates/embassy-usb-logger/git.zup +docserver-builder -i ./embassy-usb-synopsys-otg -o webroot/crates/embassy-usb-synopsys-otg/git.zup docserver-builder -i ./embassy-net -o webroot/crates/embassy-net/git.zup docserver-builder -i ./embassy-net-driver -o webroot/crates/embassy-net-driver/git.zup From a8401ec94e23f4fd039b17a09b7f65fe3353e98e Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Fri, 26 Apr 2024 22:59:11 +0200 Subject: [PATCH 212/581] stm32/usart: remove wildcard import. --- embassy-stm32/src/usart/buffered.rs | 17 +++++++++++++++-- embassy-stm32/src/usart/mod.rs | 2 +- 2 files changed, 16 insertions(+), 3 deletions(-) diff --git a/embassy-stm32/src/usart/buffered.rs b/embassy-stm32/src/usart/buffered.rs index 949ac1b13..52011cd1f 100644 --- a/embassy-stm32/src/usart/buffered.rs +++ b/embassy-stm32/src/usart/buffered.rs @@ -1,10 +1,23 @@ +use core::future::poll_fn; +use core::marker::PhantomData; use core::slice; -use core::sync::atomic::AtomicBool; +use core::sync::atomic::{AtomicBool, Ordering}; +use core::task::Poll; +use embassy_embedded_hal::SetConfig; use embassy_hal_internal::atomic_ring_buffer::RingBuffer; +use embassy_hal_internal::{into_ref, Peripheral}; use embassy_sync::waitqueue::AtomicWaker; -use super::*; +#[cfg(not(any(usart_v1, usart_v2)))] +use super::DePin; +use super::{ + clear_interrupt_flags, configure, rdr, reconfigure, sr, tdr, BasicInstance, Config, ConfigError, CtsPin, Error, + RtsPin, RxPin, TxPin, +}; +use crate::gpio::AFType; +use crate::interrupt; +use crate::interrupt::typelevel::Interrupt; /// Interrupt handler. pub struct InterruptHandler { diff --git a/embassy-stm32/src/usart/mod.rs b/embassy-stm32/src/usart/mod.rs index 6d6e678c8..169db1b5b 100644 --- a/embassy-stm32/src/usart/mod.rs +++ b/embassy-stm32/src/usart/mod.rs @@ -9,7 +9,7 @@ use core::task::Poll; use embassy_embedded_hal::SetConfig; use embassy_hal_internal::drop::OnDrop; -use embassy_hal_internal::{into_ref, PeripheralRef}; +use embassy_hal_internal::PeripheralRef; use embassy_sync::waitqueue::AtomicWaker; use futures::future::{select, Either}; From 597315873dbef394ae4cefe0af740fcb1bb951e0 Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Fri, 26 Apr 2024 22:59:50 +0200 Subject: [PATCH 213/581] Remove leftover `cargo new` boilerplate. --- embassy-usb-driver/Cargo.toml | 2 -- embassy-usb-synopsys-otg/Cargo.toml | 2 -- examples/stm32f0/Cargo.toml | 2 -- tests/perf-client/Cargo.toml | 2 -- tests/utils/Cargo.toml | 2 -- 5 files changed, 10 deletions(-) diff --git a/embassy-usb-driver/Cargo.toml b/embassy-usb-driver/Cargo.toml index 00ed60cf9..41493f00d 100644 --- a/embassy-usb-driver/Cargo.toml +++ b/embassy-usb-driver/Cargo.toml @@ -9,8 +9,6 @@ categories = ["embedded", "hardware-support", "no-std", "asynchronous"] repository = "https://github.com/embassy-rs/embassy" documentation = "https://docs.embassy.dev/embassy-usb-driver" -# See more keys and their definitions at https://doc.rust-lang.org/cargo/reference/manifest.html - [package.metadata.embassy_docs] src_base = "https://github.com/embassy-rs/embassy/blob/embassy-usb-driver-v$VERSION/embassy-usb-driver/src/" src_base_git = "https://github.com/embassy-rs/embassy/blob/$COMMIT/embassy-usb-driver/src/" diff --git a/embassy-usb-synopsys-otg/Cargo.toml b/embassy-usb-synopsys-otg/Cargo.toml index b0562627b..7292e8491 100644 --- a/embassy-usb-synopsys-otg/Cargo.toml +++ b/embassy-usb-synopsys-otg/Cargo.toml @@ -8,8 +8,6 @@ categories = ["embedded", "hardware-support", "no-std", "asynchronous"] repository = "https://github.com/embassy-rs/embassy" documentation = "https://docs.embassy.dev/embassy-usb-synopsys-otg" -# See more keys and their definitions at https://doc.rust-lang.org/cargo/reference/manifest.html - [package.metadata.embassy_docs] src_base = "https://github.com/embassy-rs/embassy/blob/embassy-usb-synopsys-otg-v$VERSION/embassy-usb-synopsys-otg/src/" src_base_git = "https://github.com/embassy-rs/embassy/blob/$COMMIT/embassy-usb-synopsys-otg/src/" diff --git a/examples/stm32f0/Cargo.toml b/examples/stm32f0/Cargo.toml index c74980dc4..cabeca687 100644 --- a/examples/stm32f0/Cargo.toml +++ b/examples/stm32f0/Cargo.toml @@ -4,8 +4,6 @@ version = "0.1.0" edition = "2021" license = "MIT OR Apache-2.0" -# See more keys and their definitions at https://doc.rust-lang.org/cargo/reference/manifest.html - [dependencies] # Change stm32f091rc to your chip name, if necessary. embassy-stm32 = { version = "0.1.0", path = "../../embassy-stm32", features = [ "defmt", "memory-x", "stm32f091rc", "time-driver-any", "exti", "unstable-pac"] } diff --git a/tests/perf-client/Cargo.toml b/tests/perf-client/Cargo.toml index 4390a6da1..a347608b3 100644 --- a/tests/perf-client/Cargo.toml +++ b/tests/perf-client/Cargo.toml @@ -3,8 +3,6 @@ name = "perf-client" version = "0.1.0" edition = "2021" -# See more keys and their definitions at https://doc.rust-lang.org/cargo/reference/manifest.html - [dependencies] embassy-net = { version = "0.4.0", path = "../../embassy-net", features = ["defmt", "tcp", "dhcpv4"] } embassy-time = { version = "0.3.0", path = "../../embassy-time", features = ["defmt", ] } diff --git a/tests/utils/Cargo.toml b/tests/utils/Cargo.toml index 7d66fd586..7b54a4f52 100644 --- a/tests/utils/Cargo.toml +++ b/tests/utils/Cargo.toml @@ -3,8 +3,6 @@ name = "test-utils" version = "0.1.0" edition = "2021" -# See more keys and their definitions at https://doc.rust-lang.org/cargo/reference/manifest.html - [dependencies] rand = "0.8" serial = "0.4" From 5732ee7ca975c0dd1afa83ade1667a2599d20985 Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Fri, 26 Apr 2024 23:18:28 +0200 Subject: [PATCH 214/581] Reduce use of the full `futures` crate. --- embassy-net/Cargo.toml | 1 - embassy-net/src/lib.rs | 5 ++--- embassy-rp/Cargo.toml | 1 - embassy-stm32-wpan/Cargo.toml | 2 +- embassy-stm32-wpan/src/mac/control.rs | 2 +- embassy-stm32/Cargo.toml | 2 +- embassy-stm32/src/eth/generic_smi.rs | 5 +++-- embassy-stm32/src/flash/f4.rs | 3 +-- embassy-stm32/src/i2c/mod.rs | 2 +- embassy-stm32/src/usart/mod.rs | 2 +- embassy-stm32/src/usart/ringbuffered.rs | 2 +- embassy-time/src/timer.rs | 10 ++++------ embassy-usb-synopsys-otg/Cargo.toml | 1 - embassy-usb-synopsys-otg/src/lib.rs | 2 +- examples/nrf-rtos-trace/Cargo.toml | 1 - examples/nrf52840-rtic/Cargo.toml | 1 - examples/nrf52840/Cargo.toml | 1 - examples/nrf52840/src/bin/gpiote_channel.rs | 2 +- examples/nrf5340/Cargo.toml | 1 - examples/nrf5340/src/bin/gpiote_channel.rs | 2 +- examples/rp/Cargo.toml | 1 - examples/stm32c0/Cargo.toml | 1 - examples/stm32f1/Cargo.toml | 1 - examples/stm32f2/Cargo.toml | 1 - examples/stm32f3/Cargo.toml | 1 - examples/stm32f334/Cargo.toml | 1 - examples/stm32f4/Cargo.toml | 3 ++- examples/stm32f4/src/bin/i2c_comparison.rs | 2 +- examples/stm32f4/src/bin/usb_hid_keyboard.rs | 2 +- examples/stm32f4/src/bin/usb_hid_mouse.rs | 2 +- examples/stm32f4/src/bin/usb_serial.rs | 2 +- examples/stm32f7/Cargo.toml | 2 +- examples/stm32f7/src/bin/usb_serial.rs | 2 +- examples/stm32g0/Cargo.toml | 1 - examples/stm32g4/Cargo.toml | 1 - examples/stm32g4/src/bin/usb_serial.rs | 2 +- examples/stm32h5/Cargo.toml | 2 +- examples/stm32h5/src/bin/usb_serial.rs | 2 +- examples/stm32h7/Cargo.toml | 2 +- examples/stm32h7/src/bin/usb_serial.rs | 2 +- examples/stm32l0/Cargo.toml | 1 - examples/stm32l1/Cargo.toml | 2 +- examples/stm32l1/src/bin/usb_serial.rs | 2 +- examples/stm32l4/Cargo.toml | 1 - examples/stm32l4/src/bin/usb_serial.rs | 2 +- examples/stm32l5/Cargo.toml | 1 - examples/stm32u0/Cargo.toml | 2 +- examples/stm32u0/src/bin/usb_serial.rs | 2 +- examples/stm32u5/Cargo.toml | 2 +- examples/stm32u5/src/bin/usb_serial.rs | 2 +- examples/stm32wb/Cargo.toml | 1 - examples/stm32wba/Cargo.toml | 1 - examples/stm32wl/Cargo.toml | 1 - tests/rp/Cargo.toml | 1 - 54 files changed, 39 insertions(+), 63 deletions(-) diff --git a/embassy-net/Cargo.toml b/embassy-net/Cargo.toml index ee7289ad8..7d71e902f 100644 --- a/embassy-net/Cargo.toml +++ b/embassy-net/Cargo.toml @@ -81,7 +81,6 @@ heapless = { version = "0.8", default-features = false } as-slice = "0.2.1" generic-array = { version = "0.14.4", default-features = false } stable_deref_trait = { version = "1.2.0", default-features = false } -futures = { version = "0.3.17", default-features = false, features = [ "async-await" ] } atomic-pool = "1.0" embedded-nal-async = { version = "0.7.1" } document-features = "0.2.7" diff --git a/embassy-net/src/lib.rs b/embassy-net/src/lib.rs index 86ced1ded..12f5f30b4 100644 --- a/embassy-net/src/lib.rs +++ b/embassy-net/src/lib.rs @@ -25,13 +25,13 @@ pub mod udp; use core::cell::RefCell; use core::future::{poll_fn, Future}; +use core::pin::pin; use core::task::{Context, Poll}; pub use embassy_net_driver as driver; use embassy_net_driver::{Driver, LinkState}; use embassy_sync::waitqueue::WakerRegistration; use embassy_time::{Instant, Timer}; -use futures::pin_mut; #[allow(unused_imports)] use heapless::Vec; #[cfg(feature = "igmp")] @@ -905,8 +905,7 @@ impl Inner { } if let Some(poll_at) = s.iface.poll_at(timestamp, &mut s.sockets) { - let t = Timer::at(instant_from_smoltcp(poll_at)); - pin_mut!(t); + let t = pin!(Timer::at(instant_from_smoltcp(poll_at))); if t.poll(cx).is_ready() { cx.waker().wake_by_ref(); } diff --git a/embassy-rp/Cargo.toml b/embassy-rp/Cargo.toml index 794f1109c..d97b7c6fc 100644 --- a/embassy-rp/Cargo.toml +++ b/embassy-rp/Cargo.toml @@ -96,7 +96,6 @@ cfg-if = "1.0.0" cortex-m-rt = ">=0.6.15,<0.8" cortex-m = "0.7.6" critical-section = "1.1" -futures = { version = "0.3.17", default-features = false, features = ["async-await"] } chrono = { version = "0.4", default-features = false, optional = true } embedded-io = { version = "0.6.1" } embedded-io-async = { version = "0.6.1" } diff --git a/embassy-stm32-wpan/Cargo.toml b/embassy-stm32-wpan/Cargo.toml index 360ca5f4b..d4f7e5892 100644 --- a/embassy-stm32-wpan/Cargo.toml +++ b/embassy-stm32-wpan/Cargo.toml @@ -35,7 +35,7 @@ aligned = "0.4.1" bit_field = "0.10.2" stm32-device-signature = { version = "0.3.3", features = ["stm32wb5x"] } stm32wb-hci = { version = "0.17.0", optional = true } -futures = { version = "0.3.17", default-features = false, features = ["async-await"] } +futures-util = { version = "0.3.30", default-features = false } bitflags = { version = "2.3.3", optional = true } [features] diff --git a/embassy-stm32-wpan/src/mac/control.rs b/embassy-stm32-wpan/src/mac/control.rs index 8a13de81c..e8d2f9f7b 100644 --- a/embassy-stm32-wpan/src/mac/control.rs +++ b/embassy-stm32-wpan/src/mac/control.rs @@ -5,7 +5,7 @@ use core::task::Poll; use embassy_sync::blocking_mutex::raw::CriticalSectionRawMutex; use embassy_sync::mutex::MutexGuard; use embassy_sync::signal::Signal; -use futures::FutureExt; +use futures_util::FutureExt; use super::commands::MacCommand; use super::event::MacEvent; diff --git a/embassy-stm32/Cargo.toml b/embassy-stm32/Cargo.toml index da8978599..669e6537a 100644 --- a/embassy-stm32/Cargo.toml +++ b/embassy-stm32/Cargo.toml @@ -67,7 +67,7 @@ defmt = { version = "0.3", optional = true } log = { version = "0.4.14", optional = true } cortex-m-rt = ">=0.6.15,<0.8" cortex-m = "0.7.6" -futures = { version = "0.3.17", default-features = false, features = ["async-await"] } +futures-util = { version = "0.3.30", default-features = false } rand_core = "0.6.3" sdio-host = "0.5.0" critical-section = "1.1" diff --git a/embassy-stm32/src/eth/generic_smi.rs b/embassy-stm32/src/eth/generic_smi.rs index 9c26e90f1..3b43051f4 100644 --- a/embassy-stm32/src/eth/generic_smi.rs +++ b/embassy-stm32/src/eth/generic_smi.rs @@ -1,10 +1,11 @@ //! Generic SMI Ethernet PHY +use core::task::Context; + #[cfg(feature = "time")] use embassy_time::{Duration, Timer}; -use futures::task::Context; #[cfg(feature = "time")] -use futures::FutureExt; +use futures_util::FutureExt; use super::{StationManagement, PHY}; diff --git a/embassy-stm32/src/flash/f4.rs b/embassy-stm32/src/flash/f4.rs index 90f13ff29..2634fba37 100644 --- a/embassy-stm32/src/flash/f4.rs +++ b/embassy-stm32/src/flash/f4.rs @@ -338,10 +338,9 @@ pub(crate) fn clear_all_err() { } pub(crate) async fn wait_ready() -> Result<(), Error> { + use core::future::poll_fn; use core::task::Poll; - use futures::future::poll_fn; - poll_fn(|cx| { WAKER.register(cx.waker()); diff --git a/embassy-stm32/src/i2c/mod.rs b/embassy-stm32/src/i2c/mod.rs index ccbea9831..6931beac7 100644 --- a/embassy-stm32/src/i2c/mod.rs +++ b/embassy-stm32/src/i2c/mod.rs @@ -191,7 +191,7 @@ impl Timeout { fn with(self, fut: impl Future>) -> impl Future> { #[cfg(feature = "time")] { - use futures::FutureExt; + use futures_util::FutureExt; embassy_futures::select::select(embassy_time::Timer::at(self.deadline), fut).map(|r| match r { embassy_futures::select::Either::First(_) => Err(Error::Timeout), diff --git a/embassy-stm32/src/usart/mod.rs b/embassy-stm32/src/usart/mod.rs index 169db1b5b..c00317983 100644 --- a/embassy-stm32/src/usart/mod.rs +++ b/embassy-stm32/src/usart/mod.rs @@ -11,7 +11,7 @@ use embassy_embedded_hal::SetConfig; use embassy_hal_internal::drop::OnDrop; use embassy_hal_internal::PeripheralRef; use embassy_sync::waitqueue::AtomicWaker; -use futures::future::{select, Either}; +use futures_util::future::{select, Either}; use crate::dma::ChannelAndRequest; use crate::gpio::{AFType, AnyPin, SealedPin}; diff --git a/embassy-stm32/src/usart/ringbuffered.rs b/embassy-stm32/src/usart/ringbuffered.rs index 8eb18fe5b..7ab6cbda7 100644 --- a/embassy-stm32/src/usart/ringbuffered.rs +++ b/embassy-stm32/src/usart/ringbuffered.rs @@ -5,7 +5,7 @@ use core::sync::atomic::{compiler_fence, Ordering}; use core::task::Poll; use embassy_embedded_hal::SetConfig; -use futures::future::{select, Either}; +use futures_util::future::{select, Either}; use super::{clear_interrupt_flags, rdr, reconfigure, sr, BasicInstance, Config, ConfigError, Error, UartRx}; use crate::dma::ReadableRingBuffer; diff --git a/embassy-time/src/timer.rs b/embassy-time/src/timer.rs index 757c3ff00..bc39d8bc7 100644 --- a/embassy-time/src/timer.rs +++ b/embassy-time/src/timer.rs @@ -1,10 +1,10 @@ use core::future::{poll_fn, Future}; -use core::pin::Pin; +use core::pin::{pin, Pin}; use core::task::{Context, Poll}; use futures_util::future::{select, Either}; use futures_util::stream::FusedStream; -use futures_util::{pin_mut, Stream}; +use futures_util::Stream; use crate::{Duration, Instant}; @@ -19,8 +19,7 @@ pub struct TimeoutError; /// work on the future is stopped (`poll` is no longer called), the future is dropped and `Err(TimeoutError)` is returned. pub async fn with_timeout(timeout: Duration, fut: F) -> Result { let timeout_fut = Timer::after(timeout); - pin_mut!(fut); - match select(fut, timeout_fut).await { + match select(pin!(fut), timeout_fut).await { Either::Left((r, _)) => Ok(r), Either::Right(_) => Err(TimeoutError), } @@ -32,8 +31,7 @@ pub async fn with_timeout(timeout: Duration, fut: F) -> Result(at: Instant, fut: F) -> Result { let timeout_fut = Timer::at(at); - pin_mut!(fut); - match select(fut, timeout_fut).await { + match select(pin!(fut), timeout_fut).await { Either::Left((r, _)) => Ok(r), Either::Right(_) => Err(TimeoutError), } diff --git a/embassy-usb-synopsys-otg/Cargo.toml b/embassy-usb-synopsys-otg/Cargo.toml index 7292e8491..f117d0cbf 100644 --- a/embassy-usb-synopsys-otg/Cargo.toml +++ b/embassy-usb-synopsys-otg/Cargo.toml @@ -16,7 +16,6 @@ target = "thumbv7em-none-eabi" [dependencies] critical-section = "1.1" -futures = { version = "0.3.17", default-features = false } embassy-sync = { version = "0.5.0", path = "../embassy-sync" } embassy-usb-driver = {version = "0.1.0", path = "../embassy-usb-driver" } diff --git a/embassy-usb-synopsys-otg/src/lib.rs b/embassy-usb-synopsys-otg/src/lib.rs index 59a99796c..af82de2c1 100644 --- a/embassy-usb-synopsys-otg/src/lib.rs +++ b/embassy-usb-synopsys-otg/src/lib.rs @@ -7,6 +7,7 @@ mod fmt; use core::cell::UnsafeCell; +use core::future::poll_fn; use core::marker::PhantomData; use core::sync::atomic::{AtomicBool, AtomicU16, Ordering}; use core::task::Poll; @@ -16,7 +17,6 @@ use embassy_usb_driver::{ Bus as _, Direction, EndpointAddress, EndpointAllocError, EndpointError, EndpointIn, EndpointInfo, EndpointOut, EndpointType, Event, Unsupported, }; -use futures::future::poll_fn; pub mod otg_v1; diff --git a/examples/nrf-rtos-trace/Cargo.toml b/examples/nrf-rtos-trace/Cargo.toml index 17210994b..f3a3f64af 100644 --- a/examples/nrf-rtos-trace/Cargo.toml +++ b/examples/nrf-rtos-trace/Cargo.toml @@ -23,7 +23,6 @@ embassy-nrf = { version = "0.1.0", path = "../../embassy-nrf", features = ["nrf5 cortex-m = { version = "0.7.6", features = ["inline-asm", "critical-section-single-core"] } cortex-m-rt = "0.7.0" panic-probe = { version = "0.3" } -futures = { version = "0.3.17", default-features = false, features = ["async-await"] } rand = { version = "0.8.4", default-features = false } serde = { version = "1.0.136", default-features = false } rtos-trace = "0.1.3" diff --git a/examples/nrf52840-rtic/Cargo.toml b/examples/nrf52840-rtic/Cargo.toml index d91f58d0e..a0687fa1e 100644 --- a/examples/nrf52840-rtic/Cargo.toml +++ b/examples/nrf52840-rtic/Cargo.toml @@ -18,7 +18,6 @@ defmt-rtt = "0.4" cortex-m = { version = "0.7.6", features = ["inline-asm", "critical-section-single-core"] } cortex-m-rt = "0.7.0" panic-probe = { version = "0.3", features = ["print-defmt"] } -futures = { version = "0.3.17", default-features = false, features = ["async-await"] } [profile.release] debug = 2 diff --git a/examples/nrf52840/Cargo.toml b/examples/nrf52840/Cargo.toml index f0553a92d..d693c5a02 100644 --- a/examples/nrf52840/Cargo.toml +++ b/examples/nrf52840/Cargo.toml @@ -25,7 +25,6 @@ static_cell = { version = "2" } cortex-m = { version = "0.7.6", features = ["inline-asm", "critical-section-single-core"] } cortex-m-rt = "0.7.0" panic-probe = { version = "0.3", features = ["print-defmt"] } -futures = { version = "0.3.17", default-features = false, features = ["async-await"] } rand = { version = "0.8.4", default-features = false } embedded-storage = "0.3.1" usbd-hid = "0.7.0" diff --git a/examples/nrf52840/src/bin/gpiote_channel.rs b/examples/nrf52840/src/bin/gpiote_channel.rs index e254d613d..dcfe7723a 100644 --- a/examples/nrf52840/src/bin/gpiote_channel.rs +++ b/examples/nrf52840/src/bin/gpiote_channel.rs @@ -61,5 +61,5 @@ async fn main(_spawner: Spawner) { } }; - futures::join!(button1, button2, button3, button4); + embassy_futures::join::join4(button1, button2, button3, button4).await; } diff --git a/examples/nrf5340/Cargo.toml b/examples/nrf5340/Cargo.toml index 1d994d925..0d3e39fe5 100644 --- a/examples/nrf5340/Cargo.toml +++ b/examples/nrf5340/Cargo.toml @@ -21,7 +21,6 @@ static_cell = "2" cortex-m = { version = "0.7.6", features = ["inline-asm", "critical-section-single-core"] } cortex-m-rt = "0.7.0" panic-probe = { version = "0.3", features = ["print-defmt"] } -futures = { version = "0.3.17", default-features = false, features = ["async-await"] } rand = { version = "0.8.4", default-features = false } embedded-storage = "0.3.1" usbd-hid = "0.7.0" diff --git a/examples/nrf5340/src/bin/gpiote_channel.rs b/examples/nrf5340/src/bin/gpiote_channel.rs index c0a55142f..23f6fca98 100644 --- a/examples/nrf5340/src/bin/gpiote_channel.rs +++ b/examples/nrf5340/src/bin/gpiote_channel.rs @@ -61,5 +61,5 @@ async fn main(_spawner: Spawner) { } }; - futures::join!(button1, button2, button3, button4); + embassy_futures::join::join4(button1, button2, button3, button4).await; } diff --git a/examples/rp/Cargo.toml b/examples/rp/Cargo.toml index d5263deb8..ae6746dce 100644 --- a/examples/rp/Cargo.toml +++ b/examples/rp/Cargo.toml @@ -28,7 +28,6 @@ fixed-macro = "1.2" cortex-m = { version = "0.7.6", features = ["inline-asm"] } cortex-m-rt = "0.7.0" panic-probe = { version = "0.3", features = ["print-defmt"] } -futures = { version = "0.3.17", default-features = false, features = ["async-await", "cfg-target-has-atomic", "unstable"] } display-interface-spi = "0.4.1" embedded-graphics = "0.7.1" st7789 = "0.6.1" diff --git a/examples/stm32c0/Cargo.toml b/examples/stm32c0/Cargo.toml index 7a3e03b75..aaca857ae 100644 --- a/examples/stm32c0/Cargo.toml +++ b/examples/stm32c0/Cargo.toml @@ -18,7 +18,6 @@ cortex-m = { version = "0.7.6", features = ["critical-section-single-core"] } cortex-m-rt = "0.7.0" embedded-hal = "0.2.6" panic-probe = { version = "0.3", features = ["print-defmt"] } -futures = { version = "0.3.17", default-features = false, features = ["async-await"] } heapless = { version = "0.8", default-features = false } [profile.release] diff --git a/examples/stm32f1/Cargo.toml b/examples/stm32f1/Cargo.toml index 712ce246d..55051703b 100644 --- a/examples/stm32f1/Cargo.toml +++ b/examples/stm32f1/Cargo.toml @@ -20,7 +20,6 @@ cortex-m = { version = "0.7.6", features = ["inline-asm", "critical-section-sing cortex-m-rt = "0.7.0" embedded-hal = "0.2.6" panic-probe = { version = "0.3", features = ["print-defmt"] } -futures = { version = "0.3.17", default-features = false, features = ["async-await"] } heapless = { version = "0.8", default-features = false } nb = "1.0.0" static_cell = "2.0.0" diff --git a/examples/stm32f2/Cargo.toml b/examples/stm32f2/Cargo.toml index 4cbf1dc84..86921580a 100644 --- a/examples/stm32f2/Cargo.toml +++ b/examples/stm32f2/Cargo.toml @@ -18,7 +18,6 @@ cortex-m = { version = "0.7.6", features = ["inline-asm", "critical-section-sing cortex-m-rt = "0.7.0" embedded-hal = "0.2.6" panic-probe = { version = "0.3", features = ["print-defmt"] } -futures = { version = "0.3.17", default-features = false, features = ["async-await"] } heapless = { version = "0.8", default-features = false } nb = "1.0.0" diff --git a/examples/stm32f3/Cargo.toml b/examples/stm32f3/Cargo.toml index 5b457a5ae..2cfb19c42 100644 --- a/examples/stm32f3/Cargo.toml +++ b/examples/stm32f3/Cargo.toml @@ -20,7 +20,6 @@ cortex-m = { version = "0.7.6", features = ["inline-asm", "critical-section-sing cortex-m-rt = "0.7.0" embedded-hal = "0.2.6" panic-probe = { version = "0.3", features = ["print-defmt"] } -futures = { version = "0.3.17", default-features = false, features = ["async-await"] } heapless = { version = "0.8", default-features = false } nb = "1.0.0" embedded-storage = "0.3.1" diff --git a/examples/stm32f334/Cargo.toml b/examples/stm32f334/Cargo.toml index b8b06afa2..7c067e140 100644 --- a/examples/stm32f334/Cargo.toml +++ b/examples/stm32f334/Cargo.toml @@ -19,7 +19,6 @@ cortex-m = { version = "0.7.6", features = ["inline-asm", "critical-section-sing cortex-m-rt = "0.7.0" embedded-hal = "0.2.6" panic-probe = { version = "0.3", features = ["print-defmt"] } -futures = { version = "0.3.17", default-features = false, features = ["async-await"] } heapless = { version = "0.8", default-features = false } nb = "1.0.0" embedded-storage = "0.3.1" diff --git a/examples/stm32f4/Cargo.toml b/examples/stm32f4/Cargo.toml index e6a9141e7..64ac50818 100644 --- a/examples/stm32f4/Cargo.toml +++ b/examples/stm32f4/Cargo.toml @@ -12,6 +12,7 @@ embassy-executor = { version = "0.5.0", path = "../../embassy-executor", feature embassy-time = { version = "0.3.0", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime", "tick-hz-32_768"] } embassy-usb = { version = "0.2.0", path = "../../embassy-usb", features = ["defmt" ] } embassy-net = { version = "0.4.0", path = "../../embassy-net", features = ["defmt", "tcp", "dhcpv4", "medium-ethernet", ] } +embassy-futures = { version = "0.1.0", path = "../../embassy-futures" } defmt = "0.3" defmt-rtt = "0.4" @@ -22,7 +23,7 @@ embedded-hal = "0.2.6" embedded-io = { version = "0.6.0" } embedded-io-async = { version = "0.6.1" } panic-probe = { version = "0.3", features = ["print-defmt"] } -futures = { version = "0.3.17", default-features = false, features = ["async-await"] } +futures-util = { version = "0.3.30", default-features = false } heapless = { version = "0.8", default-features = false } nb = "1.0.0" embedded-storage = "0.3.1" diff --git a/examples/stm32f4/src/bin/i2c_comparison.rs b/examples/stm32f4/src/bin/i2c_comparison.rs index 30cfbdf57..55c4891e3 100644 --- a/examples/stm32f4/src/bin/i2c_comparison.rs +++ b/examples/stm32f4/src/bin/i2c_comparison.rs @@ -13,7 +13,7 @@ use embassy_stm32::i2c::I2c; use embassy_stm32::time::Hertz; use embassy_stm32::{bind_interrupts, i2c, peripherals}; use embassy_time::Instant; -use futures::future::try_join3; +use futures_util::future::try_join3; use {defmt_rtt as _, panic_probe as _}; const ADDRESS: u8 = 96; diff --git a/examples/stm32f4/src/bin/usb_hid_keyboard.rs b/examples/stm32f4/src/bin/usb_hid_keyboard.rs index d48ae4a17..de9b692b1 100644 --- a/examples/stm32f4/src/bin/usb_hid_keyboard.rs +++ b/examples/stm32f4/src/bin/usb_hid_keyboard.rs @@ -5,6 +5,7 @@ use core::sync::atomic::{AtomicBool, Ordering}; use defmt::*; use embassy_executor::Spawner; +use embassy_futures::join::join; use embassy_stm32::exti::ExtiInput; use embassy_stm32::gpio::Pull; use embassy_stm32::time::Hertz; @@ -13,7 +14,6 @@ use embassy_stm32::{bind_interrupts, peripherals, usb, Config}; use embassy_usb::class::hid::{HidReaderWriter, ReportId, RequestHandler, State}; use embassy_usb::control::OutResponse; use embassy_usb::{Builder, Handler}; -use futures::future::join; use usbd_hid::descriptor::{KeyboardReport, SerializedDescriptor}; use {defmt_rtt as _, panic_probe as _}; diff --git a/examples/stm32f4/src/bin/usb_hid_mouse.rs b/examples/stm32f4/src/bin/usb_hid_mouse.rs index c35f4b002..d15ad52dc 100644 --- a/examples/stm32f4/src/bin/usb_hid_mouse.rs +++ b/examples/stm32f4/src/bin/usb_hid_mouse.rs @@ -3,6 +3,7 @@ use defmt::*; use embassy_executor::Spawner; +use embassy_futures::join::join; use embassy_stm32::time::Hertz; use embassy_stm32::usb::Driver; use embassy_stm32::{bind_interrupts, peripherals, usb, Config}; @@ -10,7 +11,6 @@ use embassy_time::Timer; use embassy_usb::class::hid::{HidWriter, ReportId, RequestHandler, State}; use embassy_usb::control::OutResponse; use embassy_usb::Builder; -use futures::future::join; use usbd_hid::descriptor::{MouseReport, SerializedDescriptor}; use {defmt_rtt as _, panic_probe as _}; diff --git a/examples/stm32f4/src/bin/usb_serial.rs b/examples/stm32f4/src/bin/usb_serial.rs index 25806dd85..91cfae87b 100644 --- a/examples/stm32f4/src/bin/usb_serial.rs +++ b/examples/stm32f4/src/bin/usb_serial.rs @@ -3,13 +3,13 @@ use defmt::{panic, *}; use embassy_executor::Spawner; +use embassy_futures::join::join; use embassy_stm32::time::Hertz; use embassy_stm32::usb::{Driver, Instance}; use embassy_stm32::{bind_interrupts, peripherals, usb, Config}; use embassy_usb::class::cdc_acm::{CdcAcmClass, State}; use embassy_usb::driver::EndpointError; use embassy_usb::Builder; -use futures::future::join; use {defmt_rtt as _, panic_probe as _}; bind_interrupts!(struct Irqs { diff --git a/examples/stm32f7/Cargo.toml b/examples/stm32f7/Cargo.toml index 0a217e9ad..37bec1bfa 100644 --- a/examples/stm32f7/Cargo.toml +++ b/examples/stm32f7/Cargo.toml @@ -13,6 +13,7 @@ embassy-time = { version = "0.3.0", path = "../../embassy-time", features = ["de embassy-net = { version = "0.4.0", path = "../../embassy-net", features = ["defmt", "tcp", "dhcpv4", "medium-ethernet"] } embedded-io-async = { version = "0.6.1" } embassy-usb = { version = "0.2.0", path = "../../embassy-usb", features = ["defmt"] } +embassy-futures = { version = "0.1.0", path = "../../embassy-futures" } defmt = "0.3" defmt-rtt = "0.4" @@ -21,7 +22,6 @@ cortex-m = { version = "0.7.6", features = ["inline-asm", "critical-section-sing cortex-m-rt = "0.7.0" embedded-hal = "0.2.6" panic-probe = { version = "0.3", features = ["print-defmt"] } -futures = { version = "0.3.17", default-features = false, features = ["async-await"] } heapless = { version = "0.8", default-features = false } nb = "1.0.0" rand_core = "0.6.3" diff --git a/examples/stm32f7/src/bin/usb_serial.rs b/examples/stm32f7/src/bin/usb_serial.rs index 2fee561c7..02ab4d1f2 100644 --- a/examples/stm32f7/src/bin/usb_serial.rs +++ b/examples/stm32f7/src/bin/usb_serial.rs @@ -3,13 +3,13 @@ use defmt::{panic, *}; use embassy_executor::Spawner; +use embassy_futures::join::join; use embassy_stm32::time::Hertz; use embassy_stm32::usb::{Driver, Instance}; use embassy_stm32::{bind_interrupts, peripherals, usb, Config}; use embassy_usb::class::cdc_acm::{CdcAcmClass, State}; use embassy_usb::driver::EndpointError; use embassy_usb::Builder; -use futures::future::join; use {defmt_rtt as _, panic_probe as _}; bind_interrupts!(struct Irqs { diff --git a/examples/stm32g0/Cargo.toml b/examples/stm32g0/Cargo.toml index ccc5143aa..803d0ae0e 100644 --- a/examples/stm32g0/Cargo.toml +++ b/examples/stm32g0/Cargo.toml @@ -20,7 +20,6 @@ cortex-m = { version = "0.7.6", features = ["inline-asm", "critical-section-sing cortex-m-rt = "0.7.0" embedded-hal = "0.2.6" panic-probe = { version = "0.3", features = ["print-defmt"] } -futures = { version = "0.3.17", default-features = false, features = ["async-await"] } heapless = { version = "0.8", default-features = false } portable-atomic = { version = "1.5", features = ["unsafe-assume-single-core"] } diff --git a/examples/stm32g4/Cargo.toml b/examples/stm32g4/Cargo.toml index 2d702aeb5..7f51631c0 100644 --- a/examples/stm32g4/Cargo.toml +++ b/examples/stm32g4/Cargo.toml @@ -22,7 +22,6 @@ cortex-m-rt = "0.7.0" embedded-hal = "0.2.6" embedded-can = { version = "0.4" } panic-probe = { version = "0.3", features = ["print-defmt"] } -futures = { version = "0.3.17", default-features = false, features = ["async-await"] } heapless = { version = "0.8", default-features = false } static_cell = "2.0.0" diff --git a/examples/stm32g4/src/bin/usb_serial.rs b/examples/stm32g4/src/bin/usb_serial.rs index dbe8f27c1..ed2ac7fac 100644 --- a/examples/stm32g4/src/bin/usb_serial.rs +++ b/examples/stm32g4/src/bin/usb_serial.rs @@ -3,13 +3,13 @@ use defmt::{panic, *}; use embassy_executor::Spawner; +use embassy_futures::join::join; use embassy_stm32::time::Hertz; use embassy_stm32::usb::{self, Driver, Instance}; use embassy_stm32::{bind_interrupts, peripherals, Config}; use embassy_usb::class::cdc_acm::{CdcAcmClass, State}; use embassy_usb::driver::EndpointError; use embassy_usb::Builder; -use futures::future::join; use {defmt_rtt as _, panic_probe as _}; bind_interrupts!(struct Irqs { diff --git a/examples/stm32h5/Cargo.toml b/examples/stm32h5/Cargo.toml index ea5cca80f..4527f4bcb 100644 --- a/examples/stm32h5/Cargo.toml +++ b/examples/stm32h5/Cargo.toml @@ -12,6 +12,7 @@ embassy-executor = { version = "0.5.0", path = "../../embassy-executor", feature embassy-time = { version = "0.3.0", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime", "tick-hz-32_768"] } embassy-net = { version = "0.4.0", path = "../../embassy-net", features = ["defmt", "tcp", "dhcpv4", "medium-ethernet", "proto-ipv6"] } embassy-usb = { version = "0.2.0", path = "../../embassy-usb", features = ["defmt"] } +embassy-futures = { version = "0.1.0", path = "../../embassy-futures" } defmt = "0.3" defmt-rtt = "0.4" @@ -24,7 +25,6 @@ embedded-hal-async = { version = "1.0" } embedded-io-async = { version = "0.6.1" } embedded-nal-async = { version = "0.7.1" } panic-probe = { version = "0.3", features = ["print-defmt"] } -futures = { version = "0.3.17", default-features = false, features = ["async-await"] } heapless = { version = "0.8", default-features = false } rand_core = "0.6.3" critical-section = "1.1" diff --git a/examples/stm32h5/src/bin/usb_serial.rs b/examples/stm32h5/src/bin/usb_serial.rs index 4f86bb342..fbcbdb5f9 100644 --- a/examples/stm32h5/src/bin/usb_serial.rs +++ b/examples/stm32h5/src/bin/usb_serial.rs @@ -3,13 +3,13 @@ use defmt::{panic, *}; use embassy_executor::Spawner; +use embassy_futures::join::join; use embassy_stm32::time::Hertz; use embassy_stm32::usb::{Driver, Instance}; use embassy_stm32::{bind_interrupts, peripherals, usb, Config}; use embassy_usb::class::cdc_acm::{CdcAcmClass, State}; use embassy_usb::driver::EndpointError; use embassy_usb::Builder; -use futures::future::join; use {defmt_rtt as _, panic_probe as _}; bind_interrupts!(struct Irqs { diff --git a/examples/stm32h7/Cargo.toml b/examples/stm32h7/Cargo.toml index 05c284fc0..a09af4b97 100644 --- a/examples/stm32h7/Cargo.toml +++ b/examples/stm32h7/Cargo.toml @@ -12,6 +12,7 @@ embassy-executor = { version = "0.5.0", path = "../../embassy-executor", feature embassy-time = { version = "0.3.0", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime", "tick-hz-32_768"] } embassy-net = { version = "0.4.0", path = "../../embassy-net", features = ["defmt", "tcp", "dhcpv4", "medium-ethernet", "proto-ipv6", "dns"] } embassy-usb = { version = "0.2.0", path = "../../embassy-usb", features = ["defmt"] } +embassy-futures = { version = "0.1.0", path = "../../embassy-futures" } defmt = "0.3" defmt-rtt = "0.4" @@ -24,7 +25,6 @@ embedded-hal-async = { version = "1.0" } embedded-nal-async = { version = "0.7.1" } embedded-io-async = { version = "0.6.1" } panic-probe = { version = "0.3", features = ["print-defmt"] } -futures = { version = "0.3.17", default-features = false, features = ["async-await"] } heapless = { version = "0.8", default-features = false } rand_core = "0.6.3" critical-section = "1.1" diff --git a/examples/stm32h7/src/bin/usb_serial.rs b/examples/stm32h7/src/bin/usb_serial.rs index 872ff815c..71d0c0a25 100644 --- a/examples/stm32h7/src/bin/usb_serial.rs +++ b/examples/stm32h7/src/bin/usb_serial.rs @@ -3,12 +3,12 @@ use defmt::{panic, *}; use embassy_executor::Spawner; +use embassy_futures::join::join; use embassy_stm32::usb::{Driver, Instance}; use embassy_stm32::{bind_interrupts, peripherals, usb, Config}; use embassy_usb::class::cdc_acm::{CdcAcmClass, State}; use embassy_usb::driver::EndpointError; use embassy_usb::Builder; -use futures::future::join; use {defmt_rtt as _, panic_probe as _}; bind_interrupts!(struct Irqs { diff --git a/examples/stm32l0/Cargo.toml b/examples/stm32l0/Cargo.toml index dd9097c9b..8831f9aaf 100644 --- a/examples/stm32l0/Cargo.toml +++ b/examples/stm32l0/Cargo.toml @@ -21,7 +21,6 @@ embedded-io-async = { version = "0.6.1" } cortex-m = { version = "0.7.6", features = ["inline-asm", "critical-section-single-core"] } cortex-m-rt = "0.7.0" panic-probe = { version = "0.3", features = ["print-defmt"] } -futures = { version = "0.3.17", default-features = false, features = ["async-await"] } heapless = { version = "0.8", default-features = false } embedded-hal = "0.2.6" static_cell = { version = "2" } diff --git a/examples/stm32l1/Cargo.toml b/examples/stm32l1/Cargo.toml index 5ec1ee5db..24d61043d 100644 --- a/examples/stm32l1/Cargo.toml +++ b/examples/stm32l1/Cargo.toml @@ -10,6 +10,7 @@ embassy-executor = { version = "0.5.0", path = "../../embassy-executor", feature embassy-time = { version = "0.3.0", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime", "tick-hz-32_768"] } embassy-stm32 = { version = "0.1.0", path = "../../embassy-stm32", features = [ "defmt", "stm32l151cb-a", "time-driver-any", "memory-x"] } embassy-usb = { version = "0.2.0", path = "../../embassy-usb", features = ["defmt"] } +embassy-futures = { version = "0.1.0", path = "../../embassy-futures" } defmt = "0.3" defmt-rtt = "0.4" @@ -18,7 +19,6 @@ cortex-m = { version = "0.7.6", features = ["inline-asm", "critical-section-sing cortex-m-rt = "0.7.0" embedded-hal = "0.2.6" panic-probe = { version = "0.3", features = ["print-defmt"] } -futures = { version = "0.3.17", default-features = false, features = ["async-await"] } heapless = { version = "0.8", default-features = false } embedded-storage = "0.3.1" diff --git a/examples/stm32l1/src/bin/usb_serial.rs b/examples/stm32l1/src/bin/usb_serial.rs index 653bbd6d2..837f7fa57 100644 --- a/examples/stm32l1/src/bin/usb_serial.rs +++ b/examples/stm32l1/src/bin/usb_serial.rs @@ -3,12 +3,12 @@ use defmt::{panic, *}; use embassy_executor::Spawner; +use embassy_futures::join::join; use embassy_stm32::usb::{self, Driver, Instance}; use embassy_stm32::{bind_interrupts, peripherals}; use embassy_usb::class::cdc_acm::{CdcAcmClass, State}; use embassy_usb::driver::EndpointError; use embassy_usb::Builder; -use futures::future::join; use {defmt_rtt as _, panic_probe as _}; bind_interrupts!(struct Irqs { diff --git a/examples/stm32l4/Cargo.toml b/examples/stm32l4/Cargo.toml index dd7292f7f..a8c6aa0e9 100644 --- a/examples/stm32l4/Cargo.toml +++ b/examples/stm32l4/Cargo.toml @@ -28,7 +28,6 @@ embedded-hal-1 = { package = "embedded-hal", version = "1.0" } embedded-hal-async = { version = "1.0" } embedded-hal-bus = { version = "0.1", features = ["async"] } panic-probe = { version = "0.3", features = ["print-defmt"] } -futures = { version = "0.3.17", default-features = false, features = ["async-await"] } heapless = { version = "0.8", default-features = false } chrono = { version = "^0.4", default-features = false } rand = { version = "0.8.5", default-features = false } diff --git a/examples/stm32l4/src/bin/usb_serial.rs b/examples/stm32l4/src/bin/usb_serial.rs index b905fc66f..a378cdc6b 100644 --- a/examples/stm32l4/src/bin/usb_serial.rs +++ b/examples/stm32l4/src/bin/usb_serial.rs @@ -4,12 +4,12 @@ use defmt::{panic, *}; use defmt_rtt as _; // global logger use embassy_executor::Spawner; +use embassy_futures::join::join; use embassy_stm32::usb::{Driver, Instance}; use embassy_stm32::{bind_interrupts, peripherals, usb, Config}; use embassy_usb::class::cdc_acm::{CdcAcmClass, State}; use embassy_usb::driver::EndpointError; use embassy_usb::Builder; -use futures::future::join; use panic_probe as _; bind_interrupts!(struct Irqs { diff --git a/examples/stm32l5/Cargo.toml b/examples/stm32l5/Cargo.toml index 9f3b28cbe..2c6c125dc 100644 --- a/examples/stm32l5/Cargo.toml +++ b/examples/stm32l5/Cargo.toml @@ -22,7 +22,6 @@ panic-probe = { version = "0.3", features = ["print-defmt"] } cortex-m = { version = "0.7.6", features = ["inline-asm", "critical-section-single-core"] } cortex-m-rt = "0.7.0" embedded-hal = "0.2.6" -futures = { version = "0.3.17", default-features = false, features = ["async-await"] } heapless = { version = "0.8", default-features = false } rand_core = { version = "0.6.3", default-features = false } embedded-io-async = { version = "0.6.1" } diff --git a/examples/stm32u0/Cargo.toml b/examples/stm32u0/Cargo.toml index 6e16eb478..e9a215589 100644 --- a/examples/stm32u0/Cargo.toml +++ b/examples/stm32u0/Cargo.toml @@ -11,6 +11,7 @@ embassy-sync = { version = "0.5.0", path = "../../embassy-sync", features = ["de embassy-executor = { version = "0.5.0", path = "../../embassy-executor", features = ["arch-cortex-m", "executor-thread", "defmt", "integrated-timers"] } embassy-time = { version = "0.3.0", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime", "tick-hz-32_768"] } embassy-usb = { version = "0.2.0", path = "../../embassy-usb", default-features = false, features = ["defmt"] } +embassy-futures = { version = "0.1.0", path = "../../embassy-futures" } defmt = "0.3" defmt-rtt = "0.4" @@ -19,7 +20,6 @@ cortex-m = { version = "0.7.6", features = ["critical-section-single-core"] } cortex-m-rt = "0.7.0" embedded-hal = "0.2.6" panic-probe = { version = "0.3", features = ["print-defmt"] } -futures = { version = "0.3.17", default-features = false, features = ["async-await"] } heapless = { version = "0.8", default-features = false } micromath = "2.0.0" diff --git a/examples/stm32u0/src/bin/usb_serial.rs b/examples/stm32u0/src/bin/usb_serial.rs index 9b38fd5dc..273f40643 100644 --- a/examples/stm32u0/src/bin/usb_serial.rs +++ b/examples/stm32u0/src/bin/usb_serial.rs @@ -4,12 +4,12 @@ use defmt::{panic, *}; use defmt_rtt as _; // global logger use embassy_executor::Spawner; +use embassy_futures::join::join; use embassy_stm32::usb::{Driver, Instance}; use embassy_stm32::{bind_interrupts, peripherals, usb, Config}; use embassy_usb::class::cdc_acm::{CdcAcmClass, State}; use embassy_usb::driver::EndpointError; use embassy_usb::Builder; -use futures::future::join; use panic_probe as _; bind_interrupts!(struct Irqs { diff --git a/examples/stm32u5/Cargo.toml b/examples/stm32u5/Cargo.toml index 3cbce74a7..93127bcb7 100644 --- a/examples/stm32u5/Cargo.toml +++ b/examples/stm32u5/Cargo.toml @@ -11,6 +11,7 @@ embassy-sync = { version = "0.5.0", path = "../../embassy-sync", features = ["de embassy-executor = { version = "0.5.0", path = "../../embassy-executor", features = ["task-arena-size-32768", "arch-cortex-m", "executor-thread", "defmt", "integrated-timers"] } embassy-time = { version = "0.3.0", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime", "tick-hz-32_768"] } embassy-usb = { version = "0.2.0", path = "../../embassy-usb", features = ["defmt"] } +embassy-futures = { version = "0.1.0", path = "../../embassy-futures" } defmt = "0.3" defmt-rtt = "0.4" @@ -19,7 +20,6 @@ cortex-m = { version = "0.7.6", features = ["inline-asm", "critical-section-sing cortex-m-rt = "0.7.0" embedded-hal = "0.2.6" panic-probe = { version = "0.3", features = ["print-defmt"] } -futures = { version = "0.3.17", default-features = false, features = ["async-await"] } heapless = { version = "0.8", default-features = false } micromath = "2.0.0" diff --git a/examples/stm32u5/src/bin/usb_serial.rs b/examples/stm32u5/src/bin/usb_serial.rs index 6a313efb0..f107928a9 100644 --- a/examples/stm32u5/src/bin/usb_serial.rs +++ b/examples/stm32u5/src/bin/usb_serial.rs @@ -4,12 +4,12 @@ use defmt::{panic, *}; use defmt_rtt as _; // global logger use embassy_executor::Spawner; +use embassy_futures::join::join; use embassy_stm32::usb::{Driver, Instance}; use embassy_stm32::{bind_interrupts, peripherals, usb, Config}; use embassy_usb::class::cdc_acm::{CdcAcmClass, State}; use embassy_usb::driver::EndpointError; use embassy_usb::Builder; -use futures::future::join; use panic_probe as _; bind_interrupts!(struct Irqs { diff --git a/examples/stm32wb/Cargo.toml b/examples/stm32wb/Cargo.toml index 94a5141f5..82419ed10 100644 --- a/examples/stm32wb/Cargo.toml +++ b/examples/stm32wb/Cargo.toml @@ -20,7 +20,6 @@ cortex-m = { version = "0.7.6", features = ["inline-asm", "critical-section-sing cortex-m-rt = "0.7.0" embedded-hal = "0.2.6" panic-probe = { version = "0.3", features = ["print-defmt"] } -futures = { version = "0.3.17", default-features = false, features = ["async-await"] } heapless = { version = "0.8", default-features = false } static_cell = "2" diff --git a/examples/stm32wba/Cargo.toml b/examples/stm32wba/Cargo.toml index 47279a012..ca55cbe92 100644 --- a/examples/stm32wba/Cargo.toml +++ b/examples/stm32wba/Cargo.toml @@ -18,7 +18,6 @@ cortex-m = { version = "0.7.6", features = ["inline-asm", "critical-section-sing cortex-m-rt = "0.7.0" embedded-hal = "0.2.6" panic-probe = { version = "0.3", features = ["print-defmt"] } -futures = { version = "0.3.17", default-features = false, features = ["async-await"] } heapless = { version = "0.8", default-features = false } static_cell = "2" diff --git a/examples/stm32wl/Cargo.toml b/examples/stm32wl/Cargo.toml index 4cb55930b..b467b97a9 100644 --- a/examples/stm32wl/Cargo.toml +++ b/examples/stm32wl/Cargo.toml @@ -20,7 +20,6 @@ cortex-m-rt = "0.7.0" embedded-hal = "0.2.6" embedded-storage = "0.3.1" panic-probe = { version = "0.3", features = ["print-defmt"] } -futures = { version = "0.3.17", default-features = false, features = ["async-await"] } heapless = { version = "0.8", default-features = false } chrono = { version = "^0.4", default-features = false } diff --git a/tests/rp/Cargo.toml b/tests/rp/Cargo.toml index e67f2117d..a602e4065 100644 --- a/tests/rp/Cargo.toml +++ b/tests/rp/Cargo.toml @@ -29,7 +29,6 @@ embedded-hal-1 = { package = "embedded-hal", version = "1.0" } embedded-hal-async = { version = "1.0" } embedded-hal-bus = { version = "0.1", features = ["async"] } panic-probe = { version = "0.3.0", features = ["print-defmt"] } -futures = { version = "0.3.17", default-features = false, features = ["async-await"] } embedded-io-async = { version = "0.6.1" } embedded-storage = { version = "0.3" } static_cell = "2" From c929ad226b93d41df68b7787a582072f79ee08b6 Mon Sep 17 00:00:00 2001 From: qwerty19106 Date: Sat, 27 Apr 2024 12:22:35 +0400 Subject: [PATCH 215/581] Improve Uart::new_half_duplex docs --- embassy-stm32/src/usart/mod.rs | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/embassy-stm32/src/usart/mod.rs b/embassy-stm32/src/usart/mod.rs index c00317983..68899bfff 100644 --- a/embassy-stm32/src/usart/mod.rs +++ b/embassy-stm32/src/usart/mod.rs @@ -926,8 +926,9 @@ impl<'d, T: BasicInstance> Uart<'d, T, Async> { /// Create a single-wire half-duplex Uart transceiver on a single Tx pin. /// - /// See [`new_half_duplex_on_rx`][`Self::new_half_duplex_on_rx`] if you would prefer to use an Rx pin. - /// There is no functional difference between these methods, as both allow bidirectional communication. + /// See [`new_half_duplex_on_rx`][`Self::new_half_duplex_on_rx`] if you would prefer to use an Rx pin + /// (when it is available for your chip). There is no functional difference between these methods, as both + /// allow bidirectional communication. /// /// The pin is always released when no data is transmitted. Thus, it acts as a standard /// I/O in idle or in reception. @@ -1079,8 +1080,9 @@ impl<'d, T: BasicInstance> Uart<'d, T, Blocking> { /// Create a single-wire half-duplex Uart transceiver on a single Tx pin. /// - /// See [`new_half_duplex_on_rx`][`Self::new_half_duplex_on_rx`] if you would prefer to use an Rx pin. - /// There is no functional difference between these methods, as both allow bidirectional communication. + /// See [`new_half_duplex_on_rx`][`Self::new_half_duplex_on_rx`] if you would prefer to use an Rx pin + /// (when it is available for your chip). There is no functional difference between these methods, as both + /// allow bidirectional communication. /// /// The pin is always released when no data is transmitted. Thus, it acts as a standard /// I/O in idle or in reception. From e7bfd7bac90d254ea6dee408564d5e0f8a80ca19 Mon Sep 17 00:00:00 2001 From: ftk Date: Sat, 27 Apr 2024 15:49:30 +0300 Subject: [PATCH 216/581] stm32 timer: fix 32bit timer off by 1 ARR error --- embassy-stm32/src/timer/low_level.rs | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/embassy-stm32/src/timer/low_level.rs b/embassy-stm32/src/timer/low_level.rs index a5d942314..294dff7ea 100644 --- a/embassy-stm32/src/timer/low_level.rs +++ b/embassy-stm32/src/timer/low_level.rs @@ -257,7 +257,10 @@ impl<'d, T: CoreInstance> Timer<'d, T> { TimerBits::Bits32 => { let pclk_ticks_per_timer_period = (timer_f / f) as u64; let psc: u16 = unwrap!(((pclk_ticks_per_timer_period - 1) / (1 << 32)).try_into()); - let arr: u32 = unwrap!((pclk_ticks_per_timer_period / (psc as u64 + 1)).try_into()); + let divide_by = pclk_ticks_per_timer_period / (u64::from(psc) + 1); + + // the timer counts `0..=arr`, we want it to count `0..divide_by` + let arr: u32 = unwrap!(u32::try_from(divide_by - 1)); let regs = self.regs_gp32_unchecked(); regs.psc().write_value(psc); From ede07883fe5136577b41d1bf63e318e92ffb959a Mon Sep 17 00:00:00 2001 From: Cyril Marpaud <9333398+cyril-marpaud@users.noreply.github.com> Date: Sat, 27 Apr 2024 16:39:21 +0200 Subject: [PATCH 217/581] fix: typo --- embassy-nrf/src/pwm.rs | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/embassy-nrf/src/pwm.rs b/embassy-nrf/src/pwm.rs index 1318d3f94..12057f7dd 100644 --- a/embassy-nrf/src/pwm.rs +++ b/embassy-nrf/src/pwm.rs @@ -368,7 +368,7 @@ impl<'s> Sequence<'s> { } /// A single sequence that can be started and stopped. -/// Takes at one sequence along with its configuration. +/// Takes one sequence along with its configuration. #[non_exhaustive] pub struct SingleSequencer<'d, 's, T: Instance> { sequencer: Sequencer<'d, 's, T>, From 7b4d2ab1bec554a4e4d8bf6950e424155fa61f19 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?D=C3=A1niel=20Buga?= Date: Sat, 27 Apr 2024 17:18:40 +0200 Subject: [PATCH 218/581] Group endpoint states into a per-endpoint struct --- embassy-usb-synopsys-otg/src/lib.rs | 70 ++++++++++++++++------------- 1 file changed, 40 insertions(+), 30 deletions(-) diff --git a/embassy-usb-synopsys-otg/src/lib.rs b/embassy-usb-synopsys-otg/src/lib.rs index af82de2c1..402347017 100644 --- a/embassy-usb-synopsys-otg/src/lib.rs +++ b/embassy-usb-synopsys-otg/src/lib.rs @@ -61,7 +61,7 @@ pub unsafe fn on_interrupt(r: Otg, state: &State<{ MAX_EP_COUNT }>, ep_count: us data[0..4].copy_from_slice(&r.fifo(0).read().0.to_ne_bytes()); data[4..8].copy_from_slice(&r.fifo(0).read().0.to_ne_bytes()); state.ep0_setup_ready.store(true, Ordering::Release); - state.ep_out_wakers[0].wake(); + state.ep_states[0].out_waker.wake(); } else { error!("received SETUP before previous finished processing"); // discard FIFO @@ -72,10 +72,11 @@ pub unsafe fn on_interrupt(r: Otg, state: &State<{ MAX_EP_COUNT }>, ep_count: us vals::Pktstsd::OUT_DATA_RX => { trace!("OUT_DATA_RX ep={} len={}", ep_num, len); - if state.ep_out_size[ep_num].load(Ordering::Acquire) == EP_OUT_BUFFER_EMPTY { + if state.ep_states[ep_num].out_size.load(Ordering::Acquire) == EP_OUT_BUFFER_EMPTY { // SAFETY: Buffer size is allocated to be equal to endpoint's maximum packet size // We trust the peripheral to not exceed its configured MPSIZ - let buf = unsafe { core::slice::from_raw_parts_mut(*state.ep_out_buffers[ep_num].get(), len) }; + let buf = + unsafe { core::slice::from_raw_parts_mut(*state.ep_states[ep_num].out_buffer.get(), len) }; for chunk in buf.chunks_mut(4) { // RX FIFO is shared so always read from fifo(0) @@ -83,8 +84,8 @@ pub unsafe fn on_interrupt(r: Otg, state: &State<{ MAX_EP_COUNT }>, ep_count: us chunk.copy_from_slice(&data.to_ne_bytes()[0..chunk.len()]); } - state.ep_out_size[ep_num].store(len as u16, Ordering::Release); - state.ep_out_wakers[ep_num].wake(); + state.ep_states[ep_num].out_size.store(len as u16, Ordering::Release); + state.ep_states[ep_num].out_waker.wake(); } else { error!("ep_out buffer overflow index={}", ep_num); @@ -132,7 +133,7 @@ pub unsafe fn on_interrupt(r: Otg, state: &State<{ MAX_EP_COUNT }>, ep_count: us }); } - state.ep_in_wakers[ep_num].wake(); + state.ep_states[ep_num].in_waker.wake(); trace!("in ep={} irq val={:08x}", ep_num, ep_ints.0); } @@ -206,17 +207,21 @@ impl PhyType { /// Indicates that [State::ep_out_buffers] is empty. const EP_OUT_BUFFER_EMPTY: u16 = u16::MAX; +struct EpState { + in_waker: AtomicWaker, + out_waker: AtomicWaker, + /// RX FIFO is shared so extra buffers are needed to dequeue all data without waiting on each endpoint. + /// Buffers are ready when associated [State::ep_out_size] != [EP_OUT_BUFFER_EMPTY]. + out_buffer: UnsafeCell<*mut u8>, + out_size: AtomicU16, +} + /// USB OTG driver state. pub struct State { /// Holds received SETUP packets. Available if [State::ep0_setup_ready] is true. ep0_setup_data: UnsafeCell<[u8; 8]>, ep0_setup_ready: AtomicBool, - ep_in_wakers: [AtomicWaker; EP_COUNT], - ep_out_wakers: [AtomicWaker; EP_COUNT], - /// RX FIFO is shared so extra buffers are needed to dequeue all data without waiting on each endpoint. - /// Buffers are ready when associated [State::ep_out_size] != [EP_OUT_BUFFER_EMPTY]. - ep_out_buffers: [UnsafeCell<*mut u8>; EP_COUNT], - ep_out_size: [AtomicU16; EP_COUNT], + ep_states: [EpState; EP_COUNT], bus_waker: AtomicWaker, } @@ -229,14 +234,17 @@ impl State { const NEW_AW: AtomicWaker = AtomicWaker::new(); const NEW_BUF: UnsafeCell<*mut u8> = UnsafeCell::new(0 as _); const NEW_SIZE: AtomicU16 = AtomicU16::new(EP_OUT_BUFFER_EMPTY); + const NEW_EP_STATE: EpState = EpState { + in_waker: NEW_AW, + out_waker: NEW_AW, + out_buffer: NEW_BUF, + out_size: NEW_SIZE, + }; Self { ep0_setup_data: UnsafeCell::new([0u8; 8]), ep0_setup_ready: AtomicBool::new(false), - ep_in_wakers: [NEW_AW; EP_COUNT], - ep_out_wakers: [NEW_AW; EP_COUNT], - ep_out_buffers: [NEW_BUF; EP_COUNT], - ep_out_size: [NEW_SIZE; EP_COUNT], + ep_states: [NEW_EP_STATE; EP_COUNT], bus_waker: NEW_AW, } } @@ -380,7 +388,7 @@ impl<'d> Driver<'d> { if D::dir() == Direction::Out { // Buffer capacity check was done above, now allocation cannot fail unsafe { - *self.instance.state.ep_out_buffers[index].get() = + *self.instance.state.ep_states[index].out_buffer.get() = self.ep_out_buffer.as_mut_ptr().offset(self.ep_out_buffer_offset as _); } self.ep_out_buffer_offset += max_packet_size as usize; @@ -811,7 +819,7 @@ impl<'d> embassy_usb_driver::Bus for Bus<'d> { }); }); - state.ep_out_wakers[ep_addr.index()].wake(); + state.ep_states[ep_addr.index()].out_waker.wake(); } Direction::In => { critical_section::with(|_| { @@ -820,7 +828,7 @@ impl<'d> embassy_usb_driver::Bus for Bus<'d> { }); }); - state.ep_in_wakers[ep_addr.index()].wake(); + state.ep_states[ep_addr.index()].in_waker.wake(); } } } @@ -879,7 +887,7 @@ impl<'d> embassy_usb_driver::Bus for Bus<'d> { }); // Wake `Endpoint::wait_enabled()` - state.ep_out_wakers[ep_addr.index()].wake(); + state.ep_states[ep_addr.index()].out_waker.wake(); } Direction::In => { critical_section::with(|_| { @@ -898,7 +906,7 @@ impl<'d> embassy_usb_driver::Bus for Bus<'d> { }); // Wake `Endpoint::wait_enabled()` - state.ep_in_wakers[ep_addr.index()].wake(); + state.ep_states[ep_addr.index()].in_waker.wake(); } } } @@ -959,7 +967,7 @@ impl<'d> embassy_usb_driver::Endpoint for Endpoint<'d, In> { poll_fn(|cx| { let ep_index = self.info.addr.index(); - self.state.ep_in_wakers[ep_index].register(cx.waker()); + self.state.ep_states[ep_index].in_waker.register(cx.waker()); if self.regs.diepctl(ep_index).read().usbaep() { Poll::Ready(()) @@ -980,7 +988,7 @@ impl<'d> embassy_usb_driver::Endpoint for Endpoint<'d, Out> { poll_fn(|cx| { let ep_index = self.info.addr.index(); - self.state.ep_out_wakers[ep_index].register(cx.waker()); + self.state.ep_states[ep_index].out_waker.register(cx.waker()); if self.regs.doepctl(ep_index).read().usbaep() { Poll::Ready(()) @@ -998,7 +1006,7 @@ impl<'d> embassy_usb_driver::EndpointOut for Endpoint<'d, Out> { poll_fn(|cx| { let index = self.info.addr.index(); - self.state.ep_out_wakers[index].register(cx.waker()); + self.state.ep_states[index].out_waker.register(cx.waker()); let doepctl = self.regs.doepctl(index).read(); trace!("read ep={:?}: doepctl {:08x}", self.info.addr, doepctl.0,); @@ -1007,7 +1015,7 @@ impl<'d> embassy_usb_driver::EndpointOut for Endpoint<'d, Out> { return Poll::Ready(Err(EndpointError::Disabled)); } - let len = self.state.ep_out_size[index].load(Ordering::Relaxed); + let len = self.state.ep_states[index].out_size.load(Ordering::Relaxed); if len != EP_OUT_BUFFER_EMPTY { trace!("read ep={:?} done len={}", self.info.addr, len); @@ -1017,11 +1025,13 @@ impl<'d> embassy_usb_driver::EndpointOut for Endpoint<'d, Out> { // SAFETY: exclusive access ensured by `ep_out_size` atomic variable let data = - unsafe { core::slice::from_raw_parts(*self.state.ep_out_buffers[index].get(), len as usize) }; + unsafe { core::slice::from_raw_parts(*self.state.ep_states[index].out_buffer.get(), len as usize) }; buf[..len as usize].copy_from_slice(data); // Release buffer - self.state.ep_out_size[index].store(EP_OUT_BUFFER_EMPTY, Ordering::Release); + self.state.ep_states[index] + .out_size + .store(EP_OUT_BUFFER_EMPTY, Ordering::Release); critical_section::with(|_| { // Receive 1 packet @@ -1056,7 +1066,7 @@ impl<'d> embassy_usb_driver::EndpointIn for Endpoint<'d, In> { let index = self.info.addr.index(); // Wait for previous transfer to complete and check if endpoint is disabled poll_fn(|cx| { - self.state.ep_in_wakers[index].register(cx.waker()); + self.state.ep_states[index].in_waker.register(cx.waker()); let diepctl = self.regs.diepctl(index).read(); let dtxfsts = self.regs.dtxfsts(index).read(); @@ -1081,7 +1091,7 @@ impl<'d> embassy_usb_driver::EndpointIn for Endpoint<'d, In> { if buf.len() > 0 { poll_fn(|cx| { - self.state.ep_in_wakers[index].register(cx.waker()); + self.state.ep_states[index].in_waker.register(cx.waker()); let size_words = (buf.len() + 3) / 4; @@ -1153,7 +1163,7 @@ impl<'d> embassy_usb_driver::ControlPipe for ControlPipe<'d> { async fn setup(&mut self) -> [u8; 8] { poll_fn(|cx| { - self.ep_out.state.ep_out_wakers[0].register(cx.waker()); + self.ep_out.state.ep_states[0].out_waker.register(cx.waker()); if self.ep_out.state.ep0_setup_ready.load(Ordering::Relaxed) { let data = unsafe { *self.ep_out.state.ep0_setup_data.get() }; From 61e3ca049c604384593168037e80186c317dacbb Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?D=C3=A1niel=20Buga?= Date: Sat, 27 Apr 2024 17:55:57 +0200 Subject: [PATCH 219/581] Only access the necessary parts of State --- embassy-usb-synopsys-otg/src/lib.rs | 60 ++++++++++++++++------------- 1 file changed, 33 insertions(+), 27 deletions(-) diff --git a/embassy-usb-synopsys-otg/src/lib.rs b/embassy-usb-synopsys-otg/src/lib.rs index 402347017..59be2c0be 100644 --- a/embassy-usb-synopsys-otg/src/lib.rs +++ b/embassy-usb-synopsys-otg/src/lib.rs @@ -55,12 +55,12 @@ pub unsafe fn on_interrupt(r: Otg, state: &State<{ MAX_EP_COUNT }>, ep_count: us while r.grstctl().read().txfflsh() {} } - if state.ep0_setup_ready.load(Ordering::Relaxed) == false { + if state.cp_state.setup_ready.load(Ordering::Relaxed) == false { // SAFETY: exclusive access ensured by atomic bool - let data = unsafe { &mut *state.ep0_setup_data.get() }; + let data = unsafe { &mut *state.cp_state.setup_data.get() }; data[0..4].copy_from_slice(&r.fifo(0).read().0.to_ne_bytes()); data[4..8].copy_from_slice(&r.fifo(0).read().0.to_ne_bytes()); - state.ep0_setup_ready.store(true, Ordering::Release); + state.cp_state.setup_ready.store(true, Ordering::Release); state.ep_states[0].out_waker.wake(); } else { error!("received SETUP before previous finished processing"); @@ -216,11 +216,15 @@ struct EpState { out_size: AtomicU16, } +struct ControlPipeSetupState { + /// Holds received SETUP packets. Available if [Ep0State::setup_ready] is true. + setup_data: UnsafeCell<[u8; 8]>, + setup_ready: AtomicBool, +} + /// USB OTG driver state. pub struct State { - /// Holds received SETUP packets. Available if [State::ep0_setup_ready] is true. - ep0_setup_data: UnsafeCell<[u8; 8]>, - ep0_setup_ready: AtomicBool, + cp_state: ControlPipeSetupState, ep_states: [EpState; EP_COUNT], bus_waker: AtomicWaker, } @@ -242,8 +246,10 @@ impl State { }; Self { - ep0_setup_data: UnsafeCell::new([0u8; 8]), - ep0_setup_ready: AtomicBool::new(false), + cp_state: ControlPipeSetupState { + setup_data: UnsafeCell::new([0u8; 8]), + setup_ready: AtomicBool::new(false), + }, ep_states: [NEW_EP_STATE; EP_COUNT], bus_waker: NEW_AW, } @@ -385,11 +391,11 @@ impl<'d> Driver<'d> { trace!(" index={}", index); + let state = &self.instance.state.ep_states[index]; if D::dir() == Direction::Out { // Buffer capacity check was done above, now allocation cannot fail unsafe { - *self.instance.state.ep_states[index].out_buffer.get() = - self.ep_out_buffer.as_mut_ptr().offset(self.ep_out_buffer_offset as _); + *state.out_buffer.get() = self.ep_out_buffer.as_mut_ptr().offset(self.ep_out_buffer_offset as _); } self.ep_out_buffer_offset += max_packet_size as usize; } @@ -397,7 +403,7 @@ impl<'d> Driver<'d> { Ok(Endpoint { _phantom: PhantomData, regs: self.instance.regs, - state: self.instance.state, + state, info: EndpointInfo { addr: EndpointAddress::from_parts(index, D::dir()), ep_type, @@ -446,6 +452,7 @@ impl<'d> embassy_usb_driver::Driver<'d> for Driver<'d> { let regs = self.instance.regs; let quirk_setup_late_cnak = self.instance.quirk_setup_late_cnak; + let cp_setup_state = &self.instance.state.cp_state; ( Bus { config: self.config, @@ -456,6 +463,7 @@ impl<'d> embassy_usb_driver::Driver<'d> for Driver<'d> { }, ControlPipe { max_packet_size: control_max_packet_size, + setup_state: cp_setup_state, ep_out, ep_in, regs, @@ -955,7 +963,7 @@ pub struct Endpoint<'d, D> { _phantom: PhantomData, regs: Otg, info: EndpointInfo, - state: &'d State<{ MAX_EP_COUNT }>, + state: &'d EpState, } impl<'d> embassy_usb_driver::Endpoint for Endpoint<'d, In> { @@ -967,7 +975,7 @@ impl<'d> embassy_usb_driver::Endpoint for Endpoint<'d, In> { poll_fn(|cx| { let ep_index = self.info.addr.index(); - self.state.ep_states[ep_index].in_waker.register(cx.waker()); + self.state.in_waker.register(cx.waker()); if self.regs.diepctl(ep_index).read().usbaep() { Poll::Ready(()) @@ -988,7 +996,7 @@ impl<'d> embassy_usb_driver::Endpoint for Endpoint<'d, Out> { poll_fn(|cx| { let ep_index = self.info.addr.index(); - self.state.ep_states[ep_index].out_waker.register(cx.waker()); + self.state.out_waker.register(cx.waker()); if self.regs.doepctl(ep_index).read().usbaep() { Poll::Ready(()) @@ -1006,7 +1014,7 @@ impl<'d> embassy_usb_driver::EndpointOut for Endpoint<'d, Out> { poll_fn(|cx| { let index = self.info.addr.index(); - self.state.ep_states[index].out_waker.register(cx.waker()); + self.state.out_waker.register(cx.waker()); let doepctl = self.regs.doepctl(index).read(); trace!("read ep={:?}: doepctl {:08x}", self.info.addr, doepctl.0,); @@ -1015,7 +1023,7 @@ impl<'d> embassy_usb_driver::EndpointOut for Endpoint<'d, Out> { return Poll::Ready(Err(EndpointError::Disabled)); } - let len = self.state.ep_states[index].out_size.load(Ordering::Relaxed); + let len = self.state.out_size.load(Ordering::Relaxed); if len != EP_OUT_BUFFER_EMPTY { trace!("read ep={:?} done len={}", self.info.addr, len); @@ -1024,14 +1032,11 @@ impl<'d> embassy_usb_driver::EndpointOut for Endpoint<'d, Out> { } // SAFETY: exclusive access ensured by `ep_out_size` atomic variable - let data = - unsafe { core::slice::from_raw_parts(*self.state.ep_states[index].out_buffer.get(), len as usize) }; + let data = unsafe { core::slice::from_raw_parts(*self.state.out_buffer.get(), len as usize) }; buf[..len as usize].copy_from_slice(data); // Release buffer - self.state.ep_states[index] - .out_size - .store(EP_OUT_BUFFER_EMPTY, Ordering::Release); + self.state.out_size.store(EP_OUT_BUFFER_EMPTY, Ordering::Release); critical_section::with(|_| { // Receive 1 packet @@ -1066,7 +1071,7 @@ impl<'d> embassy_usb_driver::EndpointIn for Endpoint<'d, In> { let index = self.info.addr.index(); // Wait for previous transfer to complete and check if endpoint is disabled poll_fn(|cx| { - self.state.ep_states[index].in_waker.register(cx.waker()); + self.state.in_waker.register(cx.waker()); let diepctl = self.regs.diepctl(index).read(); let dtxfsts = self.regs.dtxfsts(index).read(); @@ -1091,7 +1096,7 @@ impl<'d> embassy_usb_driver::EndpointIn for Endpoint<'d, In> { if buf.len() > 0 { poll_fn(|cx| { - self.state.ep_states[index].in_waker.register(cx.waker()); + self.state.in_waker.register(cx.waker()); let size_words = (buf.len() + 3) / 4; @@ -1151,6 +1156,7 @@ impl<'d> embassy_usb_driver::EndpointIn for Endpoint<'d, In> { pub struct ControlPipe<'d> { max_packet_size: u16, regs: Otg, + setup_state: &'d ControlPipeSetupState, ep_in: Endpoint<'d, In>, ep_out: Endpoint<'d, Out>, quirk_setup_late_cnak: bool, @@ -1163,11 +1169,11 @@ impl<'d> embassy_usb_driver::ControlPipe for ControlPipe<'d> { async fn setup(&mut self) -> [u8; 8] { poll_fn(|cx| { - self.ep_out.state.ep_states[0].out_waker.register(cx.waker()); + self.ep_out.state.out_waker.register(cx.waker()); - if self.ep_out.state.ep0_setup_ready.load(Ordering::Relaxed) { - let data = unsafe { *self.ep_out.state.ep0_setup_data.get() }; - self.ep_out.state.ep0_setup_ready.store(false, Ordering::Release); + if self.setup_state.setup_ready.load(Ordering::Relaxed) { + let data = unsafe { *self.setup_state.setup_data.get() }; + self.setup_state.setup_ready.store(false, Ordering::Release); // EP0 should not be controlled by `Bus` so this RMW does not need a critical section // Receive 1 SETUP packet From 887d7e143029998e84242a864e26f44b2fccb8a3 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?D=C3=A1niel=20Buga?= Date: Sat, 27 Apr 2024 18:01:45 +0200 Subject: [PATCH 220/581] Configure MAX_EP_COUNT via const generics --- embassy-stm32/src/usb/otg.rs | 8 +++--- embassy-usb-synopsys-otg/src/lib.rs | 38 ++++++++++++++--------------- 2 files changed, 23 insertions(+), 23 deletions(-) diff --git a/embassy-stm32/src/usb/otg.rs b/embassy-stm32/src/usb/otg.rs index 9551af99b..5d0e1116e 100644 --- a/embassy-stm32/src/usb/otg.rs +++ b/embassy-stm32/src/usb/otg.rs @@ -7,7 +7,7 @@ use embassy_usb_synopsys_otg::otg_v1::Otg; pub use embassy_usb_synopsys_otg::Config; use embassy_usb_synopsys_otg::{ on_interrupt as on_interrupt_impl, Bus as OtgBus, ControlPipe, Driver as OtgDriver, Endpoint, In, OtgInstance, Out, - PhyType, State, MAX_EP_COUNT, + PhyType, State, }; use crate::gpio::AFType; @@ -15,6 +15,8 @@ use crate::interrupt; use crate::interrupt::typelevel::Interrupt; use crate::rcc::{RccPeripheral, SealedRccPeripheral}; +const MAX_EP_COUNT: usize = 9; + /// Interrupt handler. pub struct InterruptHandler { _phantom: PhantomData, @@ -54,7 +56,7 @@ const RX_FIFO_EXTRA_SIZE_WORDS: u16 = 30; /// USB driver. pub struct Driver<'d, T: Instance> { phantom: PhantomData<&'d mut T>, - inner: OtgDriver<'d>, + inner: OtgDriver<'d, MAX_EP_COUNT>, } impl<'d, T: Instance> Driver<'d, T> { @@ -190,7 +192,7 @@ impl<'d, T: Instance> embassy_usb_driver::Driver<'d> for Driver<'d, T> { /// USB bus. pub struct Bus<'d, T: Instance> { phantom: PhantomData<&'d mut T>, - inner: OtgBus<'d>, + inner: OtgBus<'d, MAX_EP_COUNT>, inited: bool, } diff --git a/embassy-usb-synopsys-otg/src/lib.rs b/embassy-usb-synopsys-otg/src/lib.rs index 59be2c0be..a84f50e5a 100644 --- a/embassy-usb-synopsys-otg/src/lib.rs +++ b/embassy-usb-synopsys-otg/src/lib.rs @@ -23,7 +23,12 @@ pub mod otg_v1; use otg_v1::{regs, vals, Otg}; /// Handle interrupts. -pub unsafe fn on_interrupt(r: Otg, state: &State<{ MAX_EP_COUNT }>, ep_count: usize, quirk_setup_late_cnak: bool) { +pub unsafe fn on_interrupt( + r: Otg, + state: &State, + ep_count: usize, + quirk_setup_late_cnak: bool, +) { let ints = r.gintsts().read(); if ints.wkupint() || ints.usbsusp() || ints.usbrst() || ints.enumdne() || ints.otgint() || ints.srqint() { // Mask interrupts and notify `Bus` to process them @@ -291,16 +296,16 @@ impl Default for Config { } /// USB OTG driver. -pub struct Driver<'d> { +pub struct Driver<'d, const MAX_EP_COUNT: usize> { config: Config, ep_in: [Option; MAX_EP_COUNT], ep_out: [Option; MAX_EP_COUNT], ep_out_buffer: &'d mut [u8], ep_out_buffer_offset: usize, - instance: OtgInstance<'d>, + instance: OtgInstance<'d, MAX_EP_COUNT>, } -impl<'d> Driver<'d> { +impl<'d, const MAX_EP_COUNT: usize> Driver<'d, MAX_EP_COUNT> { /// Initializes the USB OTG peripheral. /// /// # Arguments @@ -310,7 +315,7 @@ impl<'d> Driver<'d> { /// Endpoint allocation will fail if it is too small. /// * `instance` - The USB OTG peripheral instance and its configuration. /// * `config` - The USB driver configuration. - pub fn new(ep_out_buffer: &'d mut [u8], instance: OtgInstance<'d>, config: Config) -> Self { + pub fn new(ep_out_buffer: &'d mut [u8], instance: OtgInstance<'d, MAX_EP_COUNT>, config: Config) -> Self { Self { config, ep_in: [None; MAX_EP_COUNT], @@ -414,11 +419,11 @@ impl<'d> Driver<'d> { } } -impl<'d> embassy_usb_driver::Driver<'d> for Driver<'d> { +impl<'d, const MAX_EP_COUNT: usize> embassy_usb_driver::Driver<'d> for Driver<'d, MAX_EP_COUNT> { type EndpointOut = Endpoint<'d, Out>; type EndpointIn = Endpoint<'d, In>; type ControlPipe = ControlPipe<'d>; - type Bus = Bus<'d>; + type Bus = Bus<'d, MAX_EP_COUNT>; fn alloc_endpoint_in( &mut self, @@ -474,15 +479,15 @@ impl<'d> embassy_usb_driver::Driver<'d> for Driver<'d> { } /// USB bus. -pub struct Bus<'d> { +pub struct Bus<'d, const MAX_EP_COUNT: usize> { config: Config, ep_in: [Option; MAX_EP_COUNT], ep_out: [Option; MAX_EP_COUNT], - instance: OtgInstance<'d>, + instance: OtgInstance<'d, MAX_EP_COUNT>, inited: bool, } -impl<'d> Bus<'d> { +impl<'d, const MAX_EP_COUNT: usize> Bus<'d, MAX_EP_COUNT> { fn restore_irqs(&mut self) { self.instance.regs.gintmsk().write(|w| { w.set_usbrst(true); @@ -496,9 +501,7 @@ impl<'d> Bus<'d> { w.set_otgint(true); }); } -} -impl<'d> Bus<'d> { /// Returns the PHY type. pub fn phy_type(&self) -> PhyType { self.instance.phy_type @@ -715,7 +718,7 @@ impl<'d> Bus<'d> { } } -impl<'d> embassy_usb_driver::Bus for Bus<'d> { +impl<'d, const MAX_EP_COUNT: usize> embassy_usb_driver::Bus for Bus<'d, MAX_EP_COUNT> { async fn poll(&mut self) -> Event { poll_fn(move |cx| { if !self.inited { @@ -1292,17 +1295,12 @@ fn ep0_mpsiz(max_packet_size: u16) -> u16 { } } -/// The number of maximum configurable EPs. -// TODO: this should at least be configurable, but ideally not a constant. -// Using OtgInstance::ENDPOINT_COUNT requires feature(const_generic_expr) so just define maximum eps -pub const MAX_EP_COUNT: usize = 9; - /// Hardware-dependent USB IP configuration. -pub struct OtgInstance<'d> { +pub struct OtgInstance<'d, const MAX_EP_COUNT: usize> { /// The USB peripheral. pub regs: Otg, /// The USB state. - pub state: &'d State<{ MAX_EP_COUNT }>, + pub state: &'d State, /// FIFO depth in words. pub fifo_depth_words: u16, /// Number of used endpoints. From d9e59e8e42ea009e365bb893b91d81fe47fe927d Mon Sep 17 00:00:00 2001 From: eZio Pan Date: Sat, 27 Apr 2024 21:37:58 +0800 Subject: [PATCH 221/581] low power for h5 --- embassy-stm32/Cargo.toml | 6 +-- embassy-stm32/src/low_power.rs | 41 +++++++++++------- embassy-stm32/src/rcc/f247.rs | 3 ++ embassy-stm32/src/rcc/h.rs | 2 + embassy-stm32/src/rcc/l.rs | 2 + embassy-stm32/src/rcc/u5.rs | 1 + embassy-stm32/src/rtc/datetime.rs | 4 +- embassy-stm32/src/rtc/mod.rs | 49 +++++++++------------ embassy-stm32/src/rtc/v3.rs | 36 +++++++--------- examples/stm32h5/Cargo.toml | 2 +- examples/stm32h5/src/bin/stop.rs | 71 +++++++++++++++++++++++++++++++ tests/stm32/Cargo.toml | 4 +- tests/stm32/src/bin/stop.rs | 7 +++ 13 files changed, 155 insertions(+), 73 deletions(-) create mode 100644 examples/stm32h5/src/bin/stop.rs diff --git a/embassy-stm32/Cargo.toml b/embassy-stm32/Cargo.toml index 669e6537a..653a376bd 100644 --- a/embassy-stm32/Cargo.toml +++ b/embassy-stm32/Cargo.toml @@ -24,7 +24,7 @@ flavors = [ { regex_feature = "stm32c0.*", target = "thumbv6m-none-eabi" }, { regex_feature = "stm32g0.*", target = "thumbv6m-none-eabi" }, { regex_feature = "stm32g4.*", target = "thumbv7em-none-eabi", features = ["low-power"] }, - { regex_feature = "stm32h5.*", target = "thumbv8m.main-none-eabihf" }, + { regex_feature = "stm32h5.*", target = "thumbv8m.main-none-eabihf", features = ["low-power"] }, { regex_feature = "stm32h7.*", target = "thumbv7em-none-eabi" }, { regex_feature = "stm32l0.*", target = "thumbv6m-none-eabi", features = ["low-power"] }, { regex_feature = "stm32l1.*", target = "thumbv7m-none-eabi" }, @@ -72,7 +72,7 @@ rand_core = "0.6.3" sdio-host = "0.5.0" critical-section = "1.1" #stm32-metapac = { version = "15" } -stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-01ac9bfd035961dc75f32dcd6080501538246d5c" } +stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-823168933f3860770111f7bde2a82b912eac58c0" } vcell = "0.1.3" nb = "1.0.0" @@ -98,7 +98,7 @@ proc-macro2 = "1.0.36" quote = "1.0.15" #stm32-metapac = { version = "15", default-features = false, features = ["metadata"]} -stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-01ac9bfd035961dc75f32dcd6080501538246d5c", default-features = false, features = ["metadata"]} +stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-823168933f3860770111f7bde2a82b912eac58c0", default-features = false, features = ["metadata"]} [features] default = ["rt"] diff --git a/embassy-stm32/src/low_power.rs b/embassy-stm32/src/low_power.rs index 4c3d288fd..604bdf416 100644 --- a/embassy-stm32/src/low_power.rs +++ b/embassy-stm32/src/low_power.rs @@ -10,14 +10,14 @@ //! exceptions to this rule: //! //! * `GPIO` -//! * `RCC` +//! * `RTC` //! //! Since entering and leaving low-power modes typically incurs a significant latency, the //! low-power executor will only attempt to enter when the next timer event is at least //! [`time_driver::MIN_STOP_PAUSE`] in the future. //! //! Currently there is no macro analogous to `embassy_executor::main` for this executor; -//! consequently one must define their entrypoint manually. Moveover, you must relinquish control +//! consequently one must define their entrypoint manually. Moreover, you must relinquish control //! of the `RTC` peripheral to the executor. This will typically look like //! //! ```rust,no_run @@ -99,7 +99,7 @@ pub fn stop_ready(stop_mode: StopMode) -> bool { } } -/// Available stop modes. +/// Available Stop modes. #[non_exhaustive] #[derive(PartialEq)] pub enum StopMode { @@ -183,6 +183,12 @@ impl Executor { fn configure_stop(&mut self, stop_mode: StopMode) { #[cfg(stm32l5)] crate::pac::PWR.cr1().modify(|m| m.set_lpms(stop_mode.into())); + #[cfg(stm32h5)] + crate::pac::PWR.pmcr().modify(|v| { + use crate::pac::pwr::vals; + v.set_lpms(vals::Lpms::STOP); + v.set_svos(vals::Svos::SCALE3); + }); } fn configure_pwr(&mut self) { @@ -191,21 +197,26 @@ impl Executor { compiler_fence(Ordering::SeqCst); let stop_mode = self.stop_mode(); + if stop_mode.is_none() { trace!("low power: not ready to stop"); - } else if self.time_driver.pause_time().is_err() { - trace!("low power: failed to pause time"); - } else { - let stop_mode = stop_mode.unwrap(); - match stop_mode { - StopMode::Stop1 => trace!("low power: stop 1"), - StopMode::Stop2 => trace!("low power: stop 2"), - } - self.configure_stop(stop_mode); - - #[cfg(not(feature = "low-power-debug-with-sleep"))] - self.scb.set_sleepdeep(); + return; } + + if self.time_driver.pause_time().is_err() { + trace!("low power: failed to pause time"); + return; + } + + let stop_mode = stop_mode.unwrap(); + match stop_mode { + StopMode::Stop1 => trace!("low power: stop 1"), + StopMode::Stop2 => trace!("low power: stop 2"), + } + self.configure_stop(stop_mode); + + #[cfg(not(feature = "low-power-debug-with-sleep"))] + self.scb.set_sleepdeep(); } /// Run the executor. diff --git a/embassy-stm32/src/rcc/f247.rs b/embassy-stm32/src/rcc/f247.rs index 7b252870c..e3ee9a039 100644 --- a/embassy-stm32/src/rcc/f247.rs +++ b/embassy-stm32/src/rcc/f247.rs @@ -277,6 +277,7 @@ pub(crate) unsafe fn init(config: Config) { pclk2_tim: Some(pclk2_tim), rtc: rtc, pll1_q: pll.q, + pll1_r: None, // TODO #[cfg(any(stm32f2, all(stm32f4, not(stm32f410)), stm32f7))] plli2s1_p: plli2s.p, @@ -299,6 +300,8 @@ pub(crate) unsafe fn init(config: Config) { hsi_div488: hsi.map(|hsi| hsi/488u32), hsi_hse: None, afif: None, + #[cfg(any(stm32f4, stm32f7))] + dsi_phy: None, // TODO ); } diff --git a/embassy-stm32/src/rcc/h.rs b/embassy-stm32/src/rcc/h.rs index 1949fc891..aa8c4b1f7 100644 --- a/embassy-stm32/src/rcc/h.rs +++ b/embassy-stm32/src/rcc/h.rs @@ -601,6 +601,8 @@ pub(crate) unsafe fn init(config: Config) { #[cfg(stm32h5)] audioclk: None, i2s_ckin: None, + #[cfg(stm32h7)] + dsi_phy: None, // TODO ); } diff --git a/embassy-stm32/src/rcc/l.rs b/embassy-stm32/src/rcc/l.rs index d7235ac7f..c625948fb 100644 --- a/embassy-stm32/src/rcc/l.rs +++ b/embassy-stm32/src/rcc/l.rs @@ -420,6 +420,8 @@ pub(crate) unsafe fn init(config: Config) { sai2_extclk: None, lsi: None, lse: None, + #[cfg(stm32l4)] + dsi_phy: None, ); } diff --git a/embassy-stm32/src/rcc/u5.rs b/embassy-stm32/src/rcc/u5.rs index 9533e16c4..4013d0a46 100644 --- a/embassy-stm32/src/rcc/u5.rs +++ b/embassy-stm32/src/rcc/u5.rs @@ -297,6 +297,7 @@ pub(crate) unsafe fn init(config: Config) { msik: None, shsi: None, shsi_div_2: None, + dsi_phy: None, ); } diff --git a/embassy-stm32/src/rtc/datetime.rs b/embassy-stm32/src/rtc/datetime.rs index bab8cf4a3..77d89293d 100644 --- a/embassy-stm32/src/rtc/datetime.rs +++ b/embassy-stm32/src/rtc/datetime.rs @@ -148,9 +148,9 @@ impl DateTime { ) -> Result { if year > 4095 { Err(Error::InvalidYear) - } else if month < 1 || month > 12 { + } else if !(1..=12).contains(&month) { Err(Error::InvalidMonth) - } else if day < 1 || day > 31 { + } else if !(1..=31).contains(&day) { Err(Error::InvalidDay) } else if hour > 23 { Err(Error::InvalidHour) diff --git a/embassy-stm32/src/rtc/mod.rs b/embassy-stm32/src/rtc/mod.rs index 00abe9356..b12a0db66 100644 --- a/embassy-stm32/src/rtc/mod.rs +++ b/embassy-stm32/src/rtc/mod.rs @@ -42,7 +42,7 @@ pub(crate) enum WakeupPrescaler { Div16 = 16, } -#[cfg(any(stm32wb, stm32f4, stm32l0, stm32g4, stm32l5, stm32g0))] +#[cfg(any(stm32f4, stm32l0, stm32g4, stm32l5, stm32wb, stm32h5, stm32g0))] impl From for crate::pac::rtc::vals::Wucksel { fn from(val: WakeupPrescaler) -> Self { use crate::pac::rtc::vals::Wucksel; @@ -56,7 +56,7 @@ impl From for crate::pac::rtc::vals::Wucksel { } } -#[cfg(any(stm32wb, stm32f4, stm32l0, stm32g4, stm32l5, stm32g0))] +#[cfg(any(stm32f4, stm32l0, stm32g4, stm32l5, stm32wb, stm32h5, stm32g0))] impl From for WakeupPrescaler { fn from(val: crate::pac::rtc::vals::Wucksel) -> Self { use crate::pac::rtc::vals::Wucksel; @@ -81,8 +81,7 @@ impl WakeupPrescaler { WakeupPrescaler::Div16, ] .iter() - .skip_while(|psc| **psc as u32 <= val) - .next() + .find(|psc| **psc as u32 > val) .unwrap_or(&WakeupPrescaler::Div16) } } @@ -159,7 +158,7 @@ impl RtcTimeProvider { } } - return Err(RtcError::ReadFailure); + Err(RtcError::ReadFailure) } } @@ -190,7 +189,7 @@ impl Default for RtcConfig { } /// Calibration cycle period. -#[derive(Copy, Clone, Debug, PartialEq)] +#[derive(Default, Copy, Clone, Debug, PartialEq)] #[repr(u8)] pub enum RtcCalibrationCyclePeriod { /// 8-second calibration period @@ -198,15 +197,10 @@ pub enum RtcCalibrationCyclePeriod { /// 16-second calibration period Seconds16, /// 32-second calibration period + #[default] Seconds32, } -impl Default for RtcCalibrationCyclePeriod { - fn default() -> Self { - RtcCalibrationCyclePeriod::Seconds32 - } -} - impl Rtc { /// Create a new RTC instance. pub fn new(_rtc: impl Peripheral

, rtc_config: RtcConfig) -> Self { @@ -254,13 +248,13 @@ impl Rtc { /// Will return `RtcError::InvalidDateTime` if the datetime is not a valid range. pub fn set_datetime(&mut self, t: DateTime) -> Result<(), RtcError> { self.write(true, |rtc| { - let (ht, hu) = byte_to_bcd2(t.hour() as u8); - let (mnt, mnu) = byte_to_bcd2(t.minute() as u8); - let (st, su) = byte_to_bcd2(t.second() as u8); + let (ht, hu) = byte_to_bcd2(t.hour()); + let (mnt, mnu) = byte_to_bcd2(t.minute()); + let (st, su) = byte_to_bcd2(t.second()); - let (dt, du) = byte_to_bcd2(t.day() as u8); - let (mt, mu) = byte_to_bcd2(t.month() as u8); - let yr = t.year() as u16; + let (dt, du) = byte_to_bcd2(t.day()); + let (mt, mu) = byte_to_bcd2(t.month()); + let yr = t.year(); let yr_offset = (yr - 2000_u16) as u8; let (yt, yu) = byte_to_bcd2(yr_offset); @@ -338,7 +332,7 @@ impl Rtc { } #[cfg(feature = "low-power")] - /// start the wakeup alarm and wtih a duration that is as close to but less than + /// start the wakeup alarm and with a duration that is as close to but less than /// the requested duration, and record the instant the wakeup alarm was started pub(crate) fn start_wakeup_alarm( &self, @@ -422,20 +416,15 @@ impl Rtc { #[cfg(any(rtc_v3, rtc_v3u5, rtc_v3l5))] regs.scr().write(|w| w.set_cwutf(Calrf::CLEAR)); - #[cfg(all(stm32g0))] - crate::pac::EXTI - .rpr(0) - .modify(|w| w.set_line(RTC::EXTI_WAKEUP_LINE, true)); - #[cfg(all(not(stm32g0), not(stm32l5)))] + // Check RM for EXTI and/or NVIC section, "Event event input mapping" or "EXTI interrupt/event mapping" or something similar, + // there is a table for every "Event input" / "EXTI Line". + // If you find the EXTI line related to "RTC wakeup" marks as "Configurable" (not "Direct"), + // then write 1 to related field of Pending Register, to clean it's pending state. + #[cfg(any(exti_v1, stm32h7, stm32wb))] crate::pac::EXTI .pr(0) .modify(|w| w.set_line(RTC::EXTI_WAKEUP_LINE, true)); - #[cfg(stm32l5)] - crate::pac::EXTI - .fpr(0) - .modify(|w| w.set_line(RTC::EXTI_WAKEUP_LINE, true)); - ::WakeupInterrupt::unpend(); }); } @@ -465,7 +454,7 @@ pub(crate) fn byte_to_bcd2(byte: u8) -> (u8, u8) { value -= 10; } - (bcd_high, ((bcd_high << 4) | value) as u8) + (bcd_high, ((bcd_high << 4) | value)) } pub(crate) fn bcd2_to_byte(bcd: (u8, u8)) -> u8 { diff --git a/embassy-stm32/src/rtc/v3.rs b/embassy-stm32/src/rtc/v3.rs index 8a78d16e1..e51e09e7c 100644 --- a/embassy-stm32/src/rtc/v3.rs +++ b/embassy-stm32/src/rtc/v3.rs @@ -50,7 +50,7 @@ impl super::Rtc { clock_drift = Self::RTC_CALR_MAX_PPM; } - clock_drift = clock_drift / Self::RTC_CALR_RESOLUTION_PPM; + clock_drift /= Self::RTC_CALR_RESOLUTION_PPM; self.write(false, |rtc| { rtc.calr().write(|w| { @@ -129,29 +129,25 @@ impl super::Rtc { impl SealedInstance for crate::peripherals::RTC { const BACKUP_REGISTER_COUNT: usize = 32; - #[cfg(all(feature = "low-power", stm32g4))] - const EXTI_WAKEUP_LINE: usize = 20; - - #[cfg(all(feature = "low-power", stm32g0))] - const EXTI_WAKEUP_LINE: usize = 19; - - #[cfg(all(feature = "low-power", stm32g0))] - type WakeupInterrupt = crate::interrupt::typelevel::RTC_TAMP; - - #[cfg(all(feature = "low-power", stm32g4))] - type WakeupInterrupt = crate::interrupt::typelevel::RTC_WKUP; - - #[cfg(all(feature = "low-power", stm32l5))] - const EXTI_WAKEUP_LINE: usize = 17; - - #[cfg(all(feature = "low-power", stm32l5))] - type WakeupInterrupt = crate::interrupt::typelevel::RTC; + #[cfg(feature = "low-power")] + cfg_if::cfg_if!( + if #[cfg(stm32g4)] { + const EXTI_WAKEUP_LINE: usize = 20; + type WakeupInterrupt = crate::interrupt::typelevel::RTC_WKUP; + } else if #[cfg(stm32g0)] { + const EXTI_WAKEUP_LINE: usize = 19; + type WakeupInterrupt = crate::interrupt::typelevel::RTC_TAMP; + } else if #[cfg(any(stm32l5, stm32h5))] { + const EXTI_WAKEUP_LINE: usize = 17; + type WakeupInterrupt = crate::interrupt::typelevel::RTC; + } + ); fn read_backup_register(_rtc: &Rtc, register: usize) -> Option { #[allow(clippy::if_same_then_else)] if register < Self::BACKUP_REGISTER_COUNT { //Some(rtc.bkpr()[register].read().bits()) - None // RTC3 backup registers come from the TAMP peripe=heral, not RTC. Not() even in the L412 PAC + None // RTC3 backup registers come from the TAMP peripheral, not RTC. Not() even in the L412 PAC } else { None } @@ -159,7 +155,7 @@ impl SealedInstance for crate::peripherals::RTC { fn write_backup_register(_rtc: &Rtc, register: usize, _value: u32) { if register < Self::BACKUP_REGISTER_COUNT { - // RTC3 backup registers come from the TAMP peripe=heral, not RTC. Not() even in the L412 PAC + // RTC3 backup registers come from the TAMP peripheral, not RTC. Not() even in the L412 PAC //self.rtc.bkpr()[register].write(|w| w.bits(value)) } } diff --git a/examples/stm32h5/Cargo.toml b/examples/stm32h5/Cargo.toml index 4527f4bcb..82760db64 100644 --- a/examples/stm32h5/Cargo.toml +++ b/examples/stm32h5/Cargo.toml @@ -6,7 +6,7 @@ license = "MIT OR Apache-2.0" [dependencies] # Change stm32h563zi to your chip name, if necessary. -embassy-stm32 = { version = "0.1.0", path = "../../embassy-stm32", features = ["defmt", "stm32h563zi", "memory-x", "time-driver-any", "exti", "unstable-pac"] } +embassy-stm32 = { version = "0.1.0", path = "../../embassy-stm32", features = ["defmt", "stm32h563zi", "memory-x", "time-driver-any", "exti", "unstable-pac", "low-power"] } embassy-sync = { version = "0.5.0", path = "../../embassy-sync", features = ["defmt"] } embassy-executor = { version = "0.5.0", path = "../../embassy-executor", features = ["task-arena-size-32768", "arch-cortex-m", "executor-thread", "defmt", "integrated-timers"] } embassy-time = { version = "0.3.0", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime", "tick-hz-32_768"] } diff --git a/examples/stm32h5/src/bin/stop.rs b/examples/stm32h5/src/bin/stop.rs new file mode 100644 index 000000000..0d14c0668 --- /dev/null +++ b/examples/stm32h5/src/bin/stop.rs @@ -0,0 +1,71 @@ +// Notice: +// the MCU might need an extra reset to make the code actually running + +#![no_std] +#![no_main] + +use defmt::*; +use embassy_executor::Spawner; +use embassy_stm32::gpio::{AnyPin, Level, Output, Speed}; +use embassy_stm32::low_power::Executor; +use embassy_stm32::rcc::{HSIPrescaler, LsConfig}; +use embassy_stm32::rtc::{Rtc, RtcConfig}; +use embassy_stm32::Config; +use embassy_time::Timer; +use static_cell::StaticCell; +use {defmt_rtt as _, panic_probe as _}; + +#[cortex_m_rt::entry] +fn main() -> ! { + Executor::take().run(|spawner| { + unwrap!(spawner.spawn(async_main(spawner))); + }) +} + +#[embassy_executor::task] +async fn async_main(spawner: Spawner) { + defmt::info!("Program Start"); + + let mut config = Config::default(); + + // System Clock seems need to be equal or lower than 16 MHz + config.rcc.hsi = Some(HSIPrescaler::DIV4); + + config.rcc.ls = LsConfig::default_lsi(); + // when enabled the power-consumption is much higher during stop, but debugging and RTT is working + // if you wan't to measure the power-consumption, or for production: uncomment this line + // config.enable_debug_during_sleep = false; + let p = embassy_stm32::init(config); + + // give the RTC to the executor... + let rtc = Rtc::new(p.RTC, RtcConfig::default()); + static RTC: StaticCell = StaticCell::new(); + let rtc = RTC.init(rtc); + embassy_stm32::low_power::stop_with_rtc(rtc); + + unwrap!(spawner.spawn(blinky(p.PB4.into()))); + unwrap!(spawner.spawn(timeout())); +} + +#[embassy_executor::task] +async fn blinky(led: AnyPin) { + let mut led = Output::new(led, Level::Low, Speed::Low); + loop { + info!("high"); + led.set_high(); + Timer::after_millis(300).await; + + info!("low"); + led.set_low(); + Timer::after_millis(300).await; + } +} + +// when enable_debug_during_sleep is false, it is more difficult to reprogram the MCU +// therefore we block the MCU after 30s to be able to reprogram it easily +#[embassy_executor::task] +async fn timeout() -> ! { + Timer::after_secs(30).await; + #[allow(clippy::empty_loop)] + loop {} +} diff --git a/tests/stm32/Cargo.toml b/tests/stm32/Cargo.toml index 004846a9b..30669b88c 100644 --- a/tests/stm32/Cargo.toml +++ b/tests/stm32/Cargo.toml @@ -15,7 +15,7 @@ stm32f446re = ["embassy-stm32/stm32f446re", "chrono", "stop", "can", "not-gpdma" stm32f767zi = ["embassy-stm32/stm32f767zi", "chrono", "not-gpdma", "eth", "rng"] stm32g071rb = ["embassy-stm32/stm32g071rb", "cm0", "not-gpdma", "dac", "ucpd"] stm32g491re = ["embassy-stm32/stm32g491re", "chrono", "stop", "not-gpdma", "rng", "fdcan", "cordic"] -stm32h563zi = ["embassy-stm32/stm32h563zi", "chrono", "eth", "rng", "fdcan", "hash", "cordic"] +stm32h563zi = ["embassy-stm32/stm32h563zi", "chrono", "eth", "rng", "fdcan", "hash", "cordic", "stop"] stm32h753zi = ["embassy-stm32/stm32h753zi", "chrono", "not-gpdma", "eth", "rng", "fdcan", "hash", "cryp"] stm32h755zi = ["embassy-stm32/stm32h755zi-cm7", "chrono", "not-gpdma", "eth", "dac", "rng", "fdcan", "hash", "cryp"] stm32h7a3zi = ["embassy-stm32/stm32h7a3zi", "not-gpdma", "rng", "fdcan"] @@ -31,7 +31,7 @@ stm32wb55rg = ["embassy-stm32/stm32wb55rg", "chrono", "not-gpdma", "ble", "mac" stm32wba52cg = ["embassy-stm32/stm32wba52cg", "chrono", "rng", "hash"] stm32wl55jc = ["embassy-stm32/stm32wl55jc-cm4", "not-gpdma", "rng", "chrono"] stm32f091rc = ["embassy-stm32/stm32f091rc", "cm0", "not-gpdma", "chrono"] -stm32h503rb = ["embassy-stm32/stm32h503rb", "rng"] +stm32h503rb = ["embassy-stm32/stm32h503rb", "rng", "stop"] cryp = [] hash = [] diff --git a/tests/stm32/src/bin/stop.rs b/tests/stm32/src/bin/stop.rs index 000296d46..c1106bb2f 100644 --- a/tests/stm32/src/bin/stop.rs +++ b/tests/stm32/src/bin/stop.rs @@ -51,6 +51,13 @@ async fn async_main(spawner: Spawner) { let mut config = Config::default(); config.rcc.ls = LsConfig::default_lse(); + // System Clock seems cannot be greater than 16 MHz + #[cfg(any(feature = "stm32h563zi", feature = "stm32h503rb"))] + { + use embassy_stm32::rcc::HSIPrescaler; + config.rcc.hsi = Some(HSIPrescaler::DIV4); // 64 MHz HSI will need a /4 + } + let p = embassy_stm32::init(config); info!("Hello World!"); From 095af927910b06f7af291f76c5236e0da8322402 Mon Sep 17 00:00:00 2001 From: Chris Maniewski Date: Mon, 22 Apr 2024 01:37:24 +0200 Subject: [PATCH 222/581] feature: WebUSB capability implementation This adds the WebUSB implementation as per https://wicg.github.io/webusb/, using one in-endpoint and one out-endpoint as well as an example for the RP2040 to illustrate this capability. --- embassy-usb/src/builder.rs | 5 + embassy-usb/src/class/mod.rs | 1 + embassy-usb/src/class/web_usb.rs | 186 ++++++++++++++++++++++++++++++ examples/rp/src/bin/usb_webusb.rs | 137 ++++++++++++++++++++++ 4 files changed, 329 insertions(+) create mode 100644 embassy-usb/src/class/web_usb.rs create mode 100644 examples/rp/src/bin/usb_webusb.rs diff --git a/embassy-usb/src/builder.rs b/embassy-usb/src/builder.rs index 387b780de..7168e077c 100644 --- a/embassy-usb/src/builder.rs +++ b/embassy-usb/src/builder.rs @@ -417,6 +417,11 @@ impl<'a, 'd, D: Driver<'d>> InterfaceAltBuilder<'a, 'd, D> { self.builder.config_descriptor.write(descriptor_type, descriptor); } + /// Add a custom Binary Object Store (BOS) descriptor to this alternate setting. + pub fn bos_capability(&mut self, capability_type: u8, capability: &[u8]) { + self.builder.bos_descriptor.capability(capability_type, capability); + } + fn endpoint_in(&mut self, ep_type: EndpointType, max_packet_size: u16, interval_ms: u8) -> D::EndpointIn { let ep = self .builder diff --git a/embassy-usb/src/class/mod.rs b/embassy-usb/src/class/mod.rs index 452eedf17..b883ed4e5 100644 --- a/embassy-usb/src/class/mod.rs +++ b/embassy-usb/src/class/mod.rs @@ -3,3 +3,4 @@ pub mod cdc_acm; pub mod cdc_ncm; pub mod hid; pub mod midi; +pub mod web_usb; diff --git a/embassy-usb/src/class/web_usb.rs b/embassy-usb/src/class/web_usb.rs new file mode 100644 index 000000000..10ebf318d --- /dev/null +++ b/embassy-usb/src/class/web_usb.rs @@ -0,0 +1,186 @@ +//! WebUSB API capability implementation. +//! +//! See https://wicg.github.io/webusb + +use core::mem::MaybeUninit; + +use crate::control::{InResponse, Recipient, Request, RequestType}; +use crate::descriptor::capability_type; +use crate::driver::Driver; +use crate::{Builder, Handler}; + +const USB_CLASS_VENDOR: u8 = 0xff; +const USB_SUBCLASS_NONE: u8 = 0x00; +const USB_PROTOCOL_NONE: u8 = 0x00; + +const WEB_USB_REQUEST_GET_URL: u16 = 0x02; +const WEB_USB_DESCRIPTOR_TYPE_URL: u8 = 0x03; + +/// URL descriptor for WebUSB landing page. +/// +/// An ecoded URL descriptor to point to a website that is suggested to the user when the device is connected. +pub struct Url<'d>(&'d str, u8); + +impl<'d> Url<'d> { + /// Create a new WebUSB URL descriptor. + pub fn new(url: &'d str) -> Self { + let (prefix, stripped_url) = if let Some(stripped) = url.strip_prefix("https://") { + (1, stripped) + } else if let Some(stripped) = url.strip_prefix("http://") { + (0, stripped) + } else { + (255, url) + }; + assert!( + stripped_url.len() <= 252, + "URL too long. ({} bytes). Maximum length is 252 bytes.", + stripped_url.len() + ); + Self(stripped_url, prefix) + } + + fn as_bytes(&self) -> &[u8] { + self.0.as_bytes() + } + + fn scheme(&self) -> u8 { + self.1 + } +} + +/// Configuration for WebUSB. +pub struct Config<'d> { + /// Maximum packet size in bytes for the data endpoints. + /// + /// Valid values depend on the speed at which the bus is enumerated. + /// - low speed: 8 + /// - full speed: 8, 16, 32, or 64 + /// - high speed: 64 + pub max_packet_size: u16, + /// URL to navigate to when the device is connected. + /// + /// If defined, shows a landing page which the device manufacturer would like the user to visit in order to control their device. + pub landing_url: Option>, + /// Vendor code for the WebUSB request. + /// + /// This value defines the request id (bRequest) the device expects the host to use when issuing control transfers these requests. This can be an arbitrary u8 and is not to be confused with the USB Vendor ID. + pub vendor_code: u8, +} + +struct Control<'d> { + ep_buf: [u8; 128], + vendor_code: u8, + landing_url: Option<&'d Url<'d>>, +} + +impl<'d> Control<'d> { + fn new(config: &'d Config<'d>) -> Self { + Control { + ep_buf: [0u8; 128], + vendor_code: config.vendor_code, + landing_url: config.landing_url.as_ref(), + } + } +} + +impl<'d> Handler for Control<'d> { + fn control_in(&mut self, req: Request, _data: &mut [u8]) -> Option { + let landing_value = if self.landing_url.is_some() { 1 } else { 0 }; + if req.request_type == RequestType::Vendor + && req.recipient == Recipient::Device + && req.request == self.vendor_code + && req.value == landing_value + && req.index == WEB_USB_REQUEST_GET_URL + { + if let Some(url) = self.landing_url { + let url_bytes = url.as_bytes(); + let len = url_bytes.len(); + + self.ep_buf[0] = len as u8 + 3; + self.ep_buf[1] = WEB_USB_DESCRIPTOR_TYPE_URL; + self.ep_buf[2] = url.scheme(); + self.ep_buf[3..3 + len].copy_from_slice(url_bytes); + + return Some(InResponse::Accepted(&self.ep_buf[..3 + len])); + } + } + None + } +} + +/// Internal state for WebUSB +pub struct State<'d> { + control: MaybeUninit>, +} + +impl<'d> Default for State<'d> { + fn default() -> Self { + Self::new() + } +} + +impl<'d> State<'d> { + /// Create a new `State`. + pub const fn new() -> Self { + State { + control: MaybeUninit::uninit(), + } + } +} + +/// WebUSB capability implementation. +/// +/// WebUSB is a W3C standard that allows a web page to communicate with USB devices. +/// See See https://wicg.github.io/webusb for more information and the browser API. +/// This implementation provides one read and one write endpoint. +pub struct WebUsb<'d, D: Driver<'d>> { + _driver: core::marker::PhantomData<&'d D>, +} + +impl<'d, D: Driver<'d>> WebUsb<'d, D> { + /// Builder for the WebUSB capability implementation. + /// + /// Pass in a USB `Builder`, a `State`, which holds the the control endpoint state, and a `Config` for the WebUSB configuration. + pub fn configure(builder: &mut Builder<'d, D>, state: &'d mut State<'d>, config: &'d Config<'d>) { + let mut func = builder.function(USB_CLASS_VENDOR, USB_SUBCLASS_NONE, USB_PROTOCOL_NONE); + let mut iface = func.interface(); + let mut alt = iface.alt_setting(USB_CLASS_VENDOR, USB_SUBCLASS_NONE, USB_PROTOCOL_NONE, None); + + alt.bos_capability( + capability_type::PLATFORM, + &[ + // PlatformCapabilityUUID (3408b638-09a9-47a0-8bfd-a0768815b665) + 0x0, + 0x38, + 0xb6, + 0x08, + 0x34, + 0xa9, + 0x09, + 0xa0, + 0x47, + 0x8b, + 0xfd, + 0xa0, + 0x76, + 0x88, + 0x15, + 0xb6, + 0x65, + // bcdVersion of WebUSB (1.0) + 0x00, + 0x01, + // bVendorCode + config.vendor_code, + // iLandingPage + if config.landing_url.is_some() { 1 } else { 0 }, + ], + ); + + let control = state.control.write(Control::new(config)); + + drop(func); + + builder.handler(control); + } +} diff --git a/examples/rp/src/bin/usb_webusb.rs b/examples/rp/src/bin/usb_webusb.rs new file mode 100644 index 000000000..09f2c1cfd --- /dev/null +++ b/examples/rp/src/bin/usb_webusb.rs @@ -0,0 +1,137 @@ +//! This example shows how to use USB (Universal Serial Bus) in the RP2040 chip. +//! +//! This creates a WebUSB capable device that echoes data back to the host. +//! +//! To test this in the browser (ideally host this on localhost:8080, to test the landing page +//! feature): +//! ```js +//! (async () => { +//! const device = await navigator.usb.requestDevice({ filters: [{ vendorId: 0xf569 }] }); +//! await device.open(); +//! await device.claimInterface(1); +//! device.transferIn(1, 64).then(data => console.log(data)); +//! await device.transferOut(1, new Uint8Array([1,2,3])); +//! })(); +//! ``` + +#![no_std] +#![no_main] + +use defmt::info; +use embassy_executor::Spawner; +use embassy_futures::join::join; +use embassy_rp::bind_interrupts; +use embassy_rp::peripherals::USB; +use embassy_rp::usb::{Driver as UsbDriver, InterruptHandler}; +use embassy_usb::class::web_usb::{Config as WebUsbConfig, State, Url, WebUsb}; +use embassy_usb::driver::{Driver, Endpoint, EndpointIn, EndpointOut}; +use embassy_usb::{Builder, Config}; +use {defmt_rtt as _, panic_probe as _}; + +bind_interrupts!(struct Irqs { + USBCTRL_IRQ => InterruptHandler; +}); + +#[embassy_executor::main] +async fn main(_spawner: Spawner) { + let p = embassy_rp::init(Default::default()); + + // Create the driver, from the HAL. + let driver = UsbDriver::new(p.USB, Irqs); + + // Create embassy-usb Config + let mut config = Config::new(0xf569, 0x0001); + config.manufacturer = Some("Embassy"); + config.product = Some("WebUSB example"); + config.serial_number = Some("12345678"); + config.max_power = 100; + config.max_packet_size_0 = 64; + + // Required for windows compatibility. + // https://developer.nordicsemi.com/nRF_Connect_SDK/doc/1.9.1/kconfig/CONFIG_CDC_ACM_IAD.html#help + config.device_class = 0xff; + config.device_sub_class = 0x00; + config.device_protocol = 0x00; + + // Create embassy-usb DeviceBuilder using the driver and config. + // It needs some buffers for building the descriptors. + let mut config_descriptor = [0; 256]; + let mut bos_descriptor = [0; 256]; + let mut control_buf = [0; 64]; + + let webusb_config = WebUsbConfig { + max_packet_size: 64, + vendor_code: 1, + // If defined, shows a landing page which the device manufacturer would like the user to visit in order to control their device. Suggest the user to navigate to this URL when the device is connected. + landing_url: Some(Url::new("http://localhost:8080")), + }; + + let mut state = State::new(); + + let mut builder = Builder::new( + driver, + config, + &mut config_descriptor, + &mut bos_descriptor, + &mut [], // no msos descriptors + &mut control_buf, + ); + + // Create classes on the builder (WebUSB just needs some setup, but doesn't return anything) + WebUsb::configure(&mut builder, &mut state, &webusb_config); + // Create some USB bulk endpoints for testing. + let mut endpoints = WebEndpoints::new(&mut builder, &webusb_config); + + // Build the builder. + let mut usb = builder.build(); + + // Run the USB device. + let usb_fut = usb.run(); + + // Do some WebUSB transfers. + let webusb_fut = async { + loop { + endpoints.wait_connected().await; + info!("Connected"); + endpoints.echo().await; + } + }; + + // Run everything concurrently. + // If we had made everything `'static` above instead, we could do this using separate tasks instead. + join(usb_fut, webusb_fut).await; +} + +struct WebEndpoints<'d, D: Driver<'d>> { + write_ep: D::EndpointIn, + read_ep: D::EndpointOut, +} + +impl<'d, D: Driver<'d>> WebEndpoints<'d, D> { + fn new(builder: &mut Builder<'d, D>, config: &'d WebUsbConfig<'d>) -> Self { + let mut func = builder.function(0xff, 0x00, 0x00); + let mut iface = func.interface(); + let mut alt = iface.alt_setting(0xff, 0x00, 0x00, None); + + let write_ep = alt.endpoint_bulk_in(config.max_packet_size); + let read_ep = alt.endpoint_bulk_out(config.max_packet_size); + + WebEndpoints { write_ep, read_ep } + } + + // Wait until the device's endpoints are enabled. + async fn wait_connected(&mut self) { + self.read_ep.wait_enabled().await + } + + // Echo data back to the host. + async fn echo(&mut self) { + let mut buf = [0; 64]; + loop { + let n = self.read_ep.read(&mut buf).await.unwrap(); + let data = &buf[..n]; + info!("Data read: {:x}", data); + self.write_ep.write(data).await.unwrap(); + } + } +} From d2f6ce5afd9f6d2587b6b78d82dbe06437a7c96c Mon Sep 17 00:00:00 2001 From: Cirrus Date: Sun, 28 Apr 2024 15:22:11 -0700 Subject: [PATCH 223/581] cyw43: Add function to join WPA2 network with precomputed PSK. With flags = 0 in PassphraseInfo, CYW firmware skips the PBKDF2 PSK derivation. This makes it possible avoid storing unhashed passwords. The wpa_passphrase utility may be used to generate this PSK. --- cyw43/src/control.rs | 45 ++++++++++++++++++++++++++++++++++---------- 1 file changed, 35 insertions(+), 10 deletions(-) diff --git a/cyw43/src/control.rs b/cyw43/src/control.rs index a3808f56f..0b7123eb9 100644 --- a/cyw43/src/control.rs +++ b/cyw43/src/control.rs @@ -228,8 +228,12 @@ impl<'a> Control<'a> { self.wait_for_join(i).await } - /// Join an protected network with the provided ssid and passphrase. - pub async fn join_wpa2(&mut self, ssid: &str, passphrase: &str) -> Result<(), Error> { + /// Join a protected network with the provided ssid and [`PassphraseInfo`]. + pub async fn join_wpa2_passphrase_info( + &mut self, + ssid: &str, + passphrase_info: &mut PassphraseInfo, + ) -> Result<(), Error> { self.set_iovar_u32("ampdu_ba_wsize", 8).await; self.ioctl_set_u32(134, 0, 4).await; // wsec = wpa2 @@ -239,14 +243,13 @@ impl<'a> Control<'a> { Timer::after_millis(100).await; - let mut pfi = PassphraseInfo { - len: passphrase.len() as _, - flags: 1, - passphrase: [0; 64], - }; - pfi.passphrase[..passphrase.len()].copy_from_slice(passphrase.as_bytes()); - self.ioctl(IoctlType::Set, IOCTL_CMD_SET_PASSPHRASE, 0, &mut pfi.to_bytes()) - .await; // WLC_SET_WSEC_PMK + self.ioctl( + IoctlType::Set, + IOCTL_CMD_SET_PASSPHRASE, + 0, + &mut passphrase_info.to_bytes(), + ) + .await; // WLC_SET_WSEC_PMK self.ioctl_set_u32(20, 0, 1).await; // set_infra = 1 self.ioctl_set_u32(22, 0, 0).await; // set_auth = 0 (open) @@ -261,6 +264,28 @@ impl<'a> Control<'a> { self.wait_for_join(i).await } + /// Join a protected network with the provided ssid and passphrase. + pub async fn join_wpa2(&mut self, ssid: &str, passphrase: &str) -> Result<(), Error> { + let mut pfi = PassphraseInfo { + len: passphrase.len() as _, + flags: 1, + passphrase: [0; 64], + }; + pfi.passphrase[..passphrase.len()].copy_from_slice(passphrase.as_bytes()); + self.join_wpa2_passphrase_info(ssid, &mut pfi).await + } + + /// Join a protected network with the provided ssid and precomputed PSK. + pub async fn join_wpa2_psk(&mut self, ssid: &str, psk: &[u8; 32]) -> Result<(), Error> { + let mut pfi = PassphraseInfo { + len: psk.len() as _, + flags: 0, + passphrase: [0; 64], + }; + pfi.passphrase[..psk.len()].copy_from_slice(psk); + self.join_wpa2_passphrase_info(ssid, &mut pfi).await + } + async fn wait_for_join(&mut self, i: SsidInfo) -> Result<(), Error> { self.events.mask.enable(&[Event::SET_SSID, Event::AUTH]); let mut subscriber = self.events.queue.subscriber().unwrap(); From 7432c4069bc5c8d91799a1a4f9c220ec8ffab475 Mon Sep 17 00:00:00 2001 From: Cirrus Date: Sun, 28 Apr 2024 15:34:54 -0700 Subject: [PATCH 224/581] passphrase_info does not have to be passed &mut --- cyw43/src/control.rs | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/cyw43/src/control.rs b/cyw43/src/control.rs index 0b7123eb9..50ef34367 100644 --- a/cyw43/src/control.rs +++ b/cyw43/src/control.rs @@ -232,7 +232,7 @@ impl<'a> Control<'a> { pub async fn join_wpa2_passphrase_info( &mut self, ssid: &str, - passphrase_info: &mut PassphraseInfo, + passphrase_info: &PassphraseInfo, ) -> Result<(), Error> { self.set_iovar_u32("ampdu_ba_wsize", 8).await; @@ -272,7 +272,7 @@ impl<'a> Control<'a> { passphrase: [0; 64], }; pfi.passphrase[..passphrase.len()].copy_from_slice(passphrase.as_bytes()); - self.join_wpa2_passphrase_info(ssid, &mut pfi).await + self.join_wpa2_passphrase_info(ssid, &pfi).await } /// Join a protected network with the provided ssid and precomputed PSK. @@ -283,7 +283,7 @@ impl<'a> Control<'a> { passphrase: [0; 64], }; pfi.passphrase[..psk.len()].copy_from_slice(psk); - self.join_wpa2_passphrase_info(ssid, &mut pfi).await + self.join_wpa2_passphrase_info(ssid, &pfi).await } async fn wait_for_join(&mut self, i: SsidInfo) -> Result<(), Error> { From 3db771f4b69c8cc0c6a3a6f19632119bec70cdf4 Mon Sep 17 00:00:00 2001 From: Cirrus Date: Sun, 28 Apr 2024 16:04:52 -0700 Subject: [PATCH 225/581] Make join_wpa2_passphrase_info private --- cyw43/src/control.rs | 6 +----- 1 file changed, 1 insertion(+), 5 deletions(-) diff --git a/cyw43/src/control.rs b/cyw43/src/control.rs index 50ef34367..cd890c982 100644 --- a/cyw43/src/control.rs +++ b/cyw43/src/control.rs @@ -229,11 +229,7 @@ impl<'a> Control<'a> { } /// Join a protected network with the provided ssid and [`PassphraseInfo`]. - pub async fn join_wpa2_passphrase_info( - &mut self, - ssid: &str, - passphrase_info: &PassphraseInfo, - ) -> Result<(), Error> { + async fn join_wpa2_passphrase_info(&mut self, ssid: &str, passphrase_info: &PassphraseInfo) -> Result<(), Error> { self.set_iovar_u32("ampdu_ba_wsize", 8).await; self.ioctl_set_u32(134, 0, 4).await; // wsec = wpa2 From cb60f06594bff074f6ead4284012fb3cc64ded47 Mon Sep 17 00:00:00 2001 From: Adam Greig Date: Mon, 29 Apr 2024 02:28:20 +0100 Subject: [PATCH 226/581] stm32: dac: fix new_internal not setting mode as documented --- embassy-stm32/src/dac/mod.rs | 63 +++++++++++++++++++++++------------- 1 file changed, 41 insertions(+), 22 deletions(-) diff --git a/embassy-stm32/src/dac/mod.rs b/embassy-stm32/src/dac/mod.rs index acfed8356..26298a08b 100644 --- a/embassy-stm32/src/dac/mod.rs +++ b/embassy-stm32/src/dac/mod.rs @@ -118,7 +118,7 @@ impl<'d, T: Instance, const N: u8, DMA> DacChannel<'d, T, N, DMA> { /// /// If you're not using DMA, pass [`dma::NoDma`] for the `dma` argument. /// - /// The channel is enabled on creation and begins to drive the output pin. + /// The channel is enabled on creation and begin to drive the output pin. /// Note that some methods, such as `set_trigger()` and `set_mode()`, will /// disable the channel; you must re-enable it with `enable()`. /// @@ -382,7 +382,7 @@ impl<'d, T: Instance, DMACh1, DMACh2> Dac<'d, T, DMACh1, DMACh2> { /// call `split()` to obtain separate `DacChannel`s, or use methods on `Dac` to use /// the two channels together. /// - /// The channels are enabled on creation and begins to drive their output pins. + /// The channels are enabled on creation and begin to drive their output pins. /// Note that some methods, such as `set_trigger()` and `set_mode()`, will /// disable the channel; you must re-enable them with `enable()`. /// @@ -398,19 +398,28 @@ impl<'d, T: Instance, DMACh1, DMACh2> Dac<'d, T, DMACh1, DMACh2> { into_ref!(dma_ch1, dma_ch2, pin_ch1, pin_ch2); pin_ch1.set_as_analog(); pin_ch2.set_as_analog(); + // Enable twice to increment the DAC refcount for each channel. T::enable_and_reset(); T::enable_and_reset(); - Self { - ch1: DacCh1 { - phantom: PhantomData, - dma: dma_ch1, - }, - ch2: DacCh2 { - phantom: PhantomData, - dma: dma_ch2, - }, - } + + let mut ch1 = DacCh1 { + phantom: PhantomData, + dma: dma_ch1, + }; + #[cfg(any(dac_v5, dac_v6, dac_v7))] + ch1.set_hfsel(); + ch1.enable(); + + let mut ch2 = DacCh2 { + phantom: PhantomData, + dma: dma_ch2, + }; + #[cfg(any(dac_v5, dac_v6, dac_v7))] + ch2.set_hfsel(); + ch2.enable(); + + Self { ch1, ch2 } } /// Create a new `Dac` instance where the external output pins are not used, @@ -437,16 +446,26 @@ impl<'d, T: Instance, DMACh1, DMACh2> Dac<'d, T, DMACh1, DMACh2> { // Enable twice to increment the DAC refcount for each channel. T::enable_and_reset(); T::enable_and_reset(); - Self { - ch1: DacCh1 { - phantom: PhantomData, - dma: dma_ch1, - }, - ch2: DacCh2 { - phantom: PhantomData, - dma: dma_ch2, - }, - } + + let mut ch1 = DacCh1 { + phantom: PhantomData, + dma: dma_ch1, + }; + #[cfg(any(dac_v5, dac_v6, dac_v7))] + ch1.set_hfsel(); + ch1.set_mode(Mode::NormalInternalUnbuffered); + ch1.enable(); + + let mut ch2 = DacCh2 { + phantom: PhantomData, + dma: dma_ch2, + }; + #[cfg(any(dac_v5, dac_v6, dac_v7))] + ch2.set_hfsel(); + ch2.set_mode(Mode::NormalInternalUnbuffered); + ch2.enable(); + + Self { ch1, ch2 } } /// Split this `Dac` into separate channels. From 5ce3a6b61ed7a4aaa48a687615e709d5d5309266 Mon Sep 17 00:00:00 2001 From: James Munns Date: Mon, 29 Apr 2024 12:32:33 +0200 Subject: [PATCH 227/581] Add workaround for STM32 i2cv1 errata --- embassy-stm32/src/i2c/v1.rs | 26 ++++++++++++++++++++++++++ 1 file changed, 26 insertions(+) diff --git a/embassy-stm32/src/i2c/v1.rs b/embassy-stm32/src/i2c/v1.rs index 13a473344..ac4fa1b9e 100644 --- a/embassy-stm32/src/i2c/v1.rs +++ b/embassy-stm32/src/i2c/v1.rs @@ -48,6 +48,32 @@ impl<'d, T: Instance, M: PeriMode> I2c<'d, T, M> { //reg.set_anfoff(false); }); + // Errata: "Start cannot be generated after a misplaced Stop" + // + // > If a master generates a misplaced Stop on the bus (bus error) + // > while the microcontroller I2C peripheral attempts to switch to + // > Master mode by setting the START bit, the Start condition is + // > not properly generated. + // + // This also can occur with falsely detected STOP events, for example + // if the SDA line is shorted to low. + // + // The workaround for this is to trigger the SWRST line AFTER power is + // enabled, AFTER PE is disabled and BEFORE making any other configuration. + // + // It COULD be possible to apply this workaround at runtime, instead of + // only on initialization, however this would require detecting the timeout + // or BUSY lockup condition, and re-configuring the peripheral after reset. + // + // This presents as an ~infinite hang on read or write, as the START condition + // is never generated, meaning the start event is never generated. + T::regs().cr1().modify(|reg| { + reg.set_swrst(true); + }); + T::regs().cr1().modify(|reg| { + reg.set_swrst(false); + }); + let timings = Timings::new(T::frequency(), freq); T::regs().cr2().modify(|reg| { From 6f44d7a9dfbb1dfe503c978e2277cfc5b1b6d486 Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Mon, 29 Apr 2024 20:52:27 +0200 Subject: [PATCH 228/581] stm32: update metapac. Adds U5 LPDMA, fixes ADC_COMMONs. --- embassy-stm32/Cargo.toml | 4 +- embassy-stm32/build.rs | 44 +++++++----------- embassy-stm32/src/adc/v1.rs | 14 +++--- embassy-stm32/src/dac/mod.rs | 2 +- embassy-stm32/src/dma/gpdma.rs | 6 +-- embassy-stm32/src/eth/v2/mod.rs | 4 -- embassy-stm32/src/rcc/f013.rs | 80 +++++++++++++++++++-------------- examples/stm32f0/src/bin/adc.rs | 6 +-- examples/stm32f4/src/bin/dac.rs | 2 +- examples/stm32l0/src/bin/adc.rs | 6 +-- tests/stm32/src/bin/dac_l1.rs | 2 +- tests/stm32/src/common.rs | 6 +-- 12 files changed, 87 insertions(+), 89 deletions(-) diff --git a/embassy-stm32/Cargo.toml b/embassy-stm32/Cargo.toml index 653a376bd..93a30c5c5 100644 --- a/embassy-stm32/Cargo.toml +++ b/embassy-stm32/Cargo.toml @@ -72,7 +72,7 @@ rand_core = "0.6.3" sdio-host = "0.5.0" critical-section = "1.1" #stm32-metapac = { version = "15" } -stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-823168933f3860770111f7bde2a82b912eac58c0" } +stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-37a0941112fd16fee53aaa2005fd67b77adab59c" } vcell = "0.1.3" nb = "1.0.0" @@ -98,7 +98,7 @@ proc-macro2 = "1.0.36" quote = "1.0.15" #stm32-metapac = { version = "15", default-features = false, features = ["metadata"]} -stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-823168933f3860770111f7bde2a82b912eac58c0", default-features = false, features = ["metadata"]} +stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-37a0941112fd16fee53aaa2005fd67b77adab59c", default-features = false, features = ["metadata"]} [features] default = ["rt"] diff --git a/embassy-stm32/build.rs b/embassy-stm32/build.rs index 67fceda56..49ffef217 100644 --- a/embassy-stm32/build.rs +++ b/embassy-stm32/build.rs @@ -49,6 +49,8 @@ fn main() { .unwrap() .to_ascii_lowercase(); + eprintln!("chip: {chip_name}"); + for p in METADATA.peripherals { if let Some(r) = &p.registers { println!("cargo:rustc-cfg={}", r.kind); @@ -1321,17 +1323,7 @@ fn main() { let mut interrupts_table: Vec> = Vec::new(); let mut peripherals_table: Vec> = Vec::new(); let mut pins_table: Vec> = Vec::new(); - let mut adc_common_table: Vec> = Vec::new(); - - /* - If ADC3_COMMON exists, ADC3 and higher are assigned to it - All other ADCs are assigned to ADC_COMMON - - ADC3 and higher are assigned to the adc34 clock in the table - The adc3_common cfg directive is added if ADC3_COMMON exists - */ - let has_adc3 = METADATA.peripherals.iter().any(|p| p.name == "ADC3_COMMON"); - let set_adc345 = HashSet::from(["ADC3", "ADC4", "ADC5"]); + let mut adc_table: Vec> = Vec::new(); for m in METADATA .memory @@ -1388,14 +1380,18 @@ fn main() { } if regs.kind == "adc" { - let (adc_common, adc_clock) = if set_adc345.contains(p.name) && has_adc3 { - ("ADC3_COMMON", "adc34") - } else { - ("ADC_COMMON", "adc") - }; - - let row = vec![p.name.to_string(), adc_common.to_string(), adc_clock.to_string()]; - adc_common_table.push(row); + let adc_num = p.name.strip_prefix("ADC").unwrap(); + let mut adc_common = None; + for p2 in METADATA.peripherals { + if let Some(common_nums) = p2.name.strip_prefix("ADC").and_then(|s| s.strip_suffix("_COMMON")) { + if common_nums.contains(adc_num) { + adc_common = Some(p2); + } + } + } + let adc_common = adc_common.map(|p| p.name).unwrap_or("none"); + let row = vec![p.name.to_string(), adc_common.to_string(), "adc".to_string()]; + adc_table.push(row); } for irq in p.interrupts { @@ -1441,6 +1437,7 @@ fn main() { "dma" => quote!(crate::dma::DmaInfo::Dma(crate::pac::#dma)), "bdma" => quote!(crate::dma::DmaInfo::Bdma(crate::pac::#dma)), "gpdma" => quote!(crate::pac::#dma), + "lpdma" => quote!(unsafe { crate::pac::gpdma::Gpdma::from_ptr(crate::pac::#dma.as_ptr())}), _ => panic!("bad dma channel kind {}", bi.kind), }; @@ -1535,7 +1532,7 @@ fn main() { make_table(&mut m, "foreach_interrupt", &interrupts_table); make_table(&mut m, "foreach_peripheral", &peripherals_table); make_table(&mut m, "foreach_pin", &pins_table); - make_table(&mut m, "foreach_adc", &adc_common_table); + make_table(&mut m, "foreach_adc", &adc_table); let out_dir = &PathBuf::from(env::var_os("OUT_DIR").unwrap()); let out_file = out_dir.join("_macros.rs").to_string_lossy().to_string(); @@ -1568,13 +1565,6 @@ fn main() { println!("cargo:rustc-cfg={}_{}", &chip_name[..chip_name.len() - 2], core); } - // ======= - // ADC3_COMMON is present - #[allow(clippy::print_literal)] - if has_adc3 { - println!("cargo:rustc-cfg={}", "adc3_common"); - } - // ======= // Features for targeting groups of chips diff --git a/embassy-stm32/src/adc/v1.rs b/embassy-stm32/src/adc/v1.rs index 1dda28cf2..f17522076 100644 --- a/embassy-stm32/src/adc/v1.rs +++ b/embassy-stm32/src/adc/v1.rs @@ -9,7 +9,7 @@ use stm32_metapac::adc::vals::Ckmode; use super::blocking_delay_us; use crate::adc::{Adc, AdcPin, Instance, Resolution, SampleTime}; use crate::interrupt::typelevel::Interrupt; -use crate::peripherals::ADC; +use crate::peripherals::ADC1; use crate::{interrupt, Peripheral}; pub const VDDA_CALIB_MV: u32 = 3300; @@ -36,26 +36,26 @@ impl interrupt::typelevel::Handler for InterruptHandl pub struct Vbat; #[cfg(not(adc_l0))] -impl AdcPin for Vbat {} +impl AdcPin for Vbat {} #[cfg(not(adc_l0))] -impl super::SealedAdcPin for Vbat { +impl super::SealedAdcPin for Vbat { fn channel(&self) -> u8 { 18 } } pub struct Vref; -impl AdcPin for Vref {} -impl super::SealedAdcPin for Vref { +impl AdcPin for Vref {} +impl super::SealedAdcPin for Vref { fn channel(&self) -> u8 { 17 } } pub struct Temperature; -impl AdcPin for Temperature {} -impl super::SealedAdcPin for Temperature { +impl AdcPin for Temperature {} +impl super::SealedAdcPin for Temperature { fn channel(&self) -> u8 { 16 } diff --git a/embassy-stm32/src/dac/mod.rs b/embassy-stm32/src/dac/mod.rs index 26298a08b..8a748ad72 100644 --- a/embassy-stm32/src/dac/mod.rs +++ b/embassy-stm32/src/dac/mod.rs @@ -368,7 +368,7 @@ impl<'d, T: Instance, const N: u8, DMA> Drop for DacChannel<'d, T, N, DMA> { /// /// ```ignore /// // Pins may need to be changed for your specific device. -/// let (dac_ch1, dac_ch2) = embassy_stm32::dac::Dac::new(p.DAC, NoDma, NoDma, p.PA4, p.PA5).split(); +/// let (dac_ch1, dac_ch2) = embassy_stm32::dac::Dac::new(p.DAC1, NoDma, NoDma, p.PA4, p.PA5).split(); /// ``` pub struct Dac<'d, T: Instance, DMACh1 = NoDma, DMACh2 = NoDma> { ch1: DacChannel<'d, T, 1, DMACh1>, diff --git a/embassy-stm32/src/dma/gpdma.rs b/embassy-stm32/src/dma/gpdma.rs index ef03970ef..a3717e67b 100644 --- a/embassy-stm32/src/dma/gpdma.rs +++ b/embassy-stm32/src/dma/gpdma.rs @@ -32,7 +32,7 @@ impl Default for TransferOptions { } } -impl From for vals::ChTr1Dw { +impl From for vals::Dw { fn from(raw: WordSize) -> Self { match raw { WordSize::OneByte => Self::BYTE, @@ -235,8 +235,8 @@ impl<'a> Transfer<'a> { }); ch.tr2().write(|w| { w.set_dreq(match dir { - Dir::MemoryToPeripheral => vals::ChTr2Dreq::DESTINATIONPERIPHERAL, - Dir::PeripheralToMemory => vals::ChTr2Dreq::SOURCEPERIPHERAL, + Dir::MemoryToPeripheral => vals::Dreq::DESTINATIONPERIPHERAL, + Dir::PeripheralToMemory => vals::Dreq::SOURCEPERIPHERAL, }); w.set_reqsel(request); }); diff --git a/embassy-stm32/src/eth/v2/mod.rs b/embassy-stm32/src/eth/v2/mod.rs index c6e015022..37f460574 100644 --- a/embassy-stm32/src/eth/v2/mod.rs +++ b/embassy-stm32/src/eth/v2/mod.rs @@ -94,8 +94,6 @@ impl<'d, T: Instance, P: PHY> Ethernet<'d, T, P> { #[cfg(rcc_h5)] critical_section::with(|_| { - crate::pac::RCC.apb3enr().modify(|w| w.set_sbsen(true)); - crate::pac::RCC.ahb1enr().modify(|w| { w.set_ethen(true); w.set_ethtxen(true); @@ -161,8 +159,6 @@ impl<'d, T: Instance, P: PHY> Ethernet<'d, T, P> { #[cfg(rcc_h5)] critical_section::with(|_| { - crate::pac::RCC.apb3enr().modify(|w| w.set_sbsen(true)); - crate::pac::RCC.ahb1enr().modify(|w| { w.set_ethen(true); w.set_ethtxen(true); diff --git a/embassy-stm32/src/rcc/f013.rs b/embassy-stm32/src/rcc/f013.rs index 215f8a3d2..f33351e74 100644 --- a/embassy-stm32/src/rcc/f013.rs +++ b/embassy-stm32/src/rcc/f013.rs @@ -299,54 +299,66 @@ pub(crate) unsafe fn init(config: Config) { let rtc = config.ls.init(); + // TODO: all this ADC stuff should probably go into the ADC module, not here. + // Most STM32s manage ADC clocks in a similar way with ADCx_COMMON. #[cfg(all(stm32f3, not(rcc_f37)))] use crate::pac::adccommon::vals::Ckmode; #[cfg(all(stm32f3, not(rcc_f37)))] - let adc = match config.adc { - AdcClockSource::Pll(adcpres) => { - RCC.cfgr2().modify(|w| w.set_adc12pres(adcpres)); - crate::pac::ADC_COMMON - .ccr() - .modify(|w| w.set_ckmode(Ckmode::ASYNCHRONOUS)); + let adc = { + #[cfg(peri_adc1_common)] + let common = crate::pac::ADC1_COMMON; + #[cfg(peri_adc12_common)] + let common = crate::pac::ADC12_COMMON; - unwrap!(pll) / adcpres - } - AdcClockSource::Hclk(adcpres) => { - assert!(!(adcpres == AdcHclkPrescaler::Div1 && config.ahb_pre != AHBPrescaler::DIV1)); + match config.adc { + AdcClockSource::Pll(adcpres) => { + RCC.cfgr2().modify(|w| w.set_adc12pres(adcpres)); + common.ccr().modify(|w| w.set_ckmode(Ckmode::ASYNCHRONOUS)); - let (div, ckmode) = match adcpres { - AdcHclkPrescaler::Div1 => (1u32, Ckmode::SYNCDIV1), - AdcHclkPrescaler::Div2 => (2u32, Ckmode::SYNCDIV2), - AdcHclkPrescaler::Div4 => (4u32, Ckmode::SYNCDIV4), - }; - crate::pac::ADC_COMMON.ccr().modify(|w| w.set_ckmode(ckmode)); + unwrap!(pll) / adcpres + } + AdcClockSource::Hclk(adcpres) => { + assert!(!(adcpres == AdcHclkPrescaler::Div1 && config.ahb_pre != AHBPrescaler::DIV1)); - hclk / div + let (div, ckmode) = match adcpres { + AdcHclkPrescaler::Div1 => (1u32, Ckmode::SYNCDIV1), + AdcHclkPrescaler::Div2 => (2u32, Ckmode::SYNCDIV2), + AdcHclkPrescaler::Div4 => (4u32, Ckmode::SYNCDIV4), + }; + common.ccr().modify(|w| w.set_ckmode(ckmode)); + + hclk / div + } } }; #[cfg(all(stm32f3, not(rcc_f37), adc3_common))] - let adc34 = match config.adc34 { - AdcClockSource::Pll(adcpres) => { - RCC.cfgr2().modify(|w| w.set_adc34pres(adcpres)); - crate::pac::ADC3_COMMON - .ccr() - .modify(|w| w.set_ckmode(Ckmode::ASYNCHRONOUS)); + let adc34 = { + #[cfg(peri_adc3_common)] + let common = crate::pac::ADC3_COMMON; + #[cfg(peri_adc34_common)] + let common = crate::pac::ADC34_COMMON; - unwrap!(pll) / adcpres - } - AdcClockSource::Hclk(adcpres) => { - assert!(!(adcpres == AdcHclkPrescaler::Div1 && config.ahb_pre != AHBPrescaler::DIV1)); + match config.adc34 { + AdcClockSource::Pll(adcpres) => { + RCC.cfgr2().modify(|w| w.set_adc34pres(adcpres)); + common.ccr().modify(|w| w.set_ckmode(Ckmode::ASYNCHRONOUS)); - let (div, ckmode) = match adcpres { - AdcHclkPrescaler::Div1 => (1u32, Ckmode::SYNCDIV1), - AdcHclkPrescaler::Div2 => (2u32, Ckmode::SYNCDIV2), - AdcHclkPrescaler::Div4 => (4u32, Ckmode::SYNCDIV4), - }; - crate::pac::ADC3_COMMON.ccr().modify(|w| w.set_ckmode(ckmode)); + unwrap!(pll) / adcpres + } + AdcClockSource::Hclk(adcpres) => { + assert!(!(adcpres == AdcHclkPrescaler::Div1 && config.ahb_pre != AHBPrescaler::DIV1)); - hclk / div + let (div, ckmode) = match adcpres { + AdcHclkPrescaler::Div1 => (1u32, Ckmode::SYNCDIV1), + AdcHclkPrescaler::Div2 => (2u32, Ckmode::SYNCDIV2), + AdcHclkPrescaler::Div4 => (4u32, Ckmode::SYNCDIV4), + }; + common.ccr().modify(|w| w.set_ckmode(ckmode)); + + hclk / div + } } }; diff --git a/examples/stm32f0/src/bin/adc.rs b/examples/stm32f0/src/bin/adc.rs index a5a4186ea..8825e2687 100644 --- a/examples/stm32f0/src/bin/adc.rs +++ b/examples/stm32f0/src/bin/adc.rs @@ -4,13 +4,13 @@ use defmt::*; use embassy_executor::Spawner; use embassy_stm32::adc::{Adc, SampleTime}; -use embassy_stm32::peripherals::ADC; +use embassy_stm32::peripherals::ADC1; use embassy_stm32::{adc, bind_interrupts}; use embassy_time::Timer; use {defmt_rtt as _, panic_probe as _}; bind_interrupts!(struct Irqs { - ADC1_COMP => adc::InterruptHandler; + ADC1_COMP => adc::InterruptHandler; }); #[embassy_executor::main] @@ -18,7 +18,7 @@ async fn main(_spawner: Spawner) { let p = embassy_stm32::init(Default::default()); info!("Hello World!"); - let mut adc = Adc::new(p.ADC, Irqs); + let mut adc = Adc::new(p.ADC1, Irqs); adc.set_sample_time(SampleTime::CYCLES71_5); let mut pin = p.PA1; diff --git a/examples/stm32f4/src/bin/dac.rs b/examples/stm32f4/src/bin/dac.rs index 9c7754c4f..dd2a45718 100644 --- a/examples/stm32f4/src/bin/dac.rs +++ b/examples/stm32f4/src/bin/dac.rs @@ -12,7 +12,7 @@ async fn main(_spawner: Spawner) -> ! { let p = embassy_stm32::init(Default::default()); info!("Hello World, dude!"); - let mut dac = DacCh1::new(p.DAC, NoDma, p.PA4); + let mut dac = DacCh1::new(p.DAC1, NoDma, p.PA4); loop { for v in 0..=255 { diff --git a/examples/stm32l0/src/bin/adc.rs b/examples/stm32l0/src/bin/adc.rs index 507c3204a..9dd09bc45 100644 --- a/examples/stm32l0/src/bin/adc.rs +++ b/examples/stm32l0/src/bin/adc.rs @@ -4,13 +4,13 @@ use defmt::*; use embassy_executor::Spawner; use embassy_stm32::adc::{Adc, SampleTime}; -use embassy_stm32::peripherals::ADC; +use embassy_stm32::peripherals::ADC1; use embassy_stm32::{adc, bind_interrupts}; use embassy_time::Timer; use {defmt_rtt as _, panic_probe as _}; bind_interrupts!(struct Irqs { - ADC1_COMP => adc::InterruptHandler; + ADC1_COMP => adc::InterruptHandler; }); #[embassy_executor::main] @@ -18,7 +18,7 @@ async fn main(_spawner: Spawner) { let p = embassy_stm32::init(Default::default()); info!("Hello World!"); - let mut adc = Adc::new(p.ADC, Irqs); + let mut adc = Adc::new(p.ADC1, Irqs); adc.set_sample_time(SampleTime::CYCLES79_5); let mut pin = p.PA1; diff --git a/tests/stm32/src/bin/dac_l1.rs b/tests/stm32/src/bin/dac_l1.rs index f8b00aaef..d5e9c9722 100644 --- a/tests/stm32/src/bin/dac_l1.rs +++ b/tests/stm32/src/bin/dac_l1.rs @@ -19,7 +19,7 @@ use micromath::F32Ext; use {defmt_rtt as _, panic_probe as _}; bind_interrupts!(struct Irqs { - ADC1 => embassy_stm32::adc::InterruptHandler; + ADC1 => embassy_stm32::adc::InterruptHandler; }); #[embassy_executor::main] diff --git a/tests/stm32/src/common.rs b/tests/stm32/src/common.rs index 0e555efc8..24d33dc3b 100644 --- a/tests/stm32/src/common.rs +++ b/tests/stm32/src/common.rs @@ -120,7 +120,7 @@ define_peris!( define_peris!( UART = USART6, UART_TX = PG14, UART_RX = PG9, UART_TX_DMA = DMA2_CH6, UART_RX_DMA = DMA2_CH1, SPI = SPI1, SPI_SCK = PA5, SPI_MOSI = PA7, SPI_MISO = PA6, SPI_TX_DMA = DMA2_CH3, SPI_RX_DMA = DMA2_CH2, - ADC = ADC1, DAC = DAC, DAC_PIN = PA4, + ADC = ADC1, DAC = DAC1, DAC_PIN = PA4, CAN = CAN1, CAN_RX = PD0, CAN_TX = PD1, @irq UART = {USART6 => embassy_stm32::usart::InterruptHandler;}, ); @@ -128,7 +128,7 @@ define_peris!( define_peris!( UART = USART1, UART_TX = PA9, UART_RX = PA10, UART_TX_DMA = DMA2_CH7, UART_RX_DMA = DMA2_CH5, SPI = SPI1, SPI_SCK = PA5, SPI_MOSI = PA7, SPI_MISO = PA6, SPI_TX_DMA = DMA2_CH3, SPI_RX_DMA = DMA2_CH2, - ADC = ADC1, DAC = DAC, DAC_PIN = PA4, + ADC = ADC1, DAC = DAC1, DAC_PIN = PA4, CAN = CAN1, CAN_RX = PA11, CAN_TX = PA12, @irq UART = {USART1 => embassy_stm32::usart::InterruptHandler;}, ); @@ -210,7 +210,7 @@ define_peris!( define_peris!( UART = USART3, UART_TX = PB10, UART_RX = PB11, UART_TX_DMA = DMA1_CH2, UART_RX_DMA = DMA1_CH3, SPI = SPI1, SPI_SCK = PA5, SPI_MOSI = PA7, SPI_MISO = PA6, SPI_TX_DMA = DMA1_CH3, SPI_RX_DMA = DMA1_CH2, - ADC = ADC, DAC = DAC, DAC_PIN = PA4, + ADC = ADC1, DAC = DAC1, DAC_PIN = PA4, @irq UART = {USART3 => embassy_stm32::usart::InterruptHandler;}, ); #[cfg(feature = "stm32l552ze")] From b6f9dbfb5b66190cd8d798ec0f99a7f3cdeb8ea0 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Peter=20K=C3=B6vesdi?= Date: Mon, 29 Apr 2024 22:31:16 +0200 Subject: [PATCH 229/581] fixed: example loops crashing after 256 passes --- examples/stm32f1/src/bin/can.rs | 4 ++-- examples/stm32f4/src/bin/can.rs | 2 +- examples/stm32f4/src/bin/wdt.rs | 2 +- examples/stm32g4/src/bin/can.rs | 4 ++-- examples/stm32h5/src/bin/can.rs | 2 +- examples/stm32h7/src/bin/can.rs | 2 +- examples/stm32u0/src/bin/wdt.rs | 2 +- 7 files changed, 9 insertions(+), 9 deletions(-) diff --git a/examples/stm32f1/src/bin/can.rs b/examples/stm32f1/src/bin/can.rs index 1c13d623d..ad0c8a5a5 100644 --- a/examples/stm32f1/src/bin/can.rs +++ b/examples/stm32f1/src/bin/can.rs @@ -85,7 +85,7 @@ async fn main(_spawner: Spawner) { defmt::println!("Error {}", err); } } - i += 1; + i = i.wrapping_add(1); } */ @@ -135,6 +135,6 @@ async fn main(_spawner: Spawner) { defmt::println!("Error {}", err); } } - i += 1; + i = i.wrapping_add(1); } } diff --git a/examples/stm32f4/src/bin/can.rs b/examples/stm32f4/src/bin/can.rs index cedc057a7..8e3beee24 100644 --- a/examples/stm32f4/src/bin/can.rs +++ b/examples/stm32f4/src/bin/can.rs @@ -63,6 +63,6 @@ async fn main(_spawner: Spawner) { envelope.frame.data()[0], latency.as_micros() ); - i += 1; + i = i.wrapping_add(1); } } diff --git a/examples/stm32f4/src/bin/wdt.rs b/examples/stm32f4/src/bin/wdt.rs index ea27ebce0..430898b40 100644 --- a/examples/stm32f4/src/bin/wdt.rs +++ b/examples/stm32f4/src/bin/wdt.rs @@ -36,6 +36,6 @@ async fn main(_spawner: Spawner) { wdt.pet(); } - i += 1; + i = i.wrapping_add(1); } } diff --git a/examples/stm32g4/src/bin/can.rs b/examples/stm32g4/src/bin/can.rs index 7836334af..90004f874 100644 --- a/examples/stm32g4/src/bin/can.rs +++ b/examples/stm32g4/src/bin/can.rs @@ -192,7 +192,7 @@ async fn main(_spawner: Spawner) { Timer::after_millis(250).await; - i += 1; + i = i.wrapping_add(1); } } else { static TX_BUF: StaticCell> = StaticCell::new(); @@ -228,7 +228,7 @@ async fn main(_spawner: Spawner) { Timer::after_millis(250).await; - i += 1; + i = i.wrapping_add(1); } } } diff --git a/examples/stm32h5/src/bin/can.rs b/examples/stm32h5/src/bin/can.rs index dc77ec3bf..194239d47 100644 --- a/examples/stm32h5/src/bin/can.rs +++ b/examples/stm32h5/src/bin/can.rs @@ -93,6 +93,6 @@ async fn main(_spawner: Spawner) { Timer::after_millis(250).await; - i += 1; + i = i.wrapping_add(1); } } diff --git a/examples/stm32h7/src/bin/can.rs b/examples/stm32h7/src/bin/can.rs index a889d5860..0af11ef3e 100644 --- a/examples/stm32h7/src/bin/can.rs +++ b/examples/stm32h7/src/bin/can.rs @@ -93,6 +93,6 @@ async fn main(_spawner: Spawner) { Timer::after_millis(250).await; - i += 1; + i = i.wrapping_add(1); } } diff --git a/examples/stm32u0/src/bin/wdt.rs b/examples/stm32u0/src/bin/wdt.rs index f6276e2e9..8f9ea516d 100644 --- a/examples/stm32u0/src/bin/wdt.rs +++ b/examples/stm32u0/src/bin/wdt.rs @@ -36,6 +36,6 @@ async fn main(_spawner: Spawner) { wdt.pet(); } - i += 1; + i = i.wrapping_add(1); } } From 5df703cf4b22f2fef2c2bed9fc6ceaca98d8ddfb Mon Sep 17 00:00:00 2001 From: pkoevesdi <33196971+pkoevesdi@users.noreply.github.com> Date: Mon, 29 Apr 2024 22:38:58 +0200 Subject: [PATCH 230/581] Update wdt.rs: added missing type --- examples/stm32u0/src/bin/wdt.rs | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/examples/stm32u0/src/bin/wdt.rs b/examples/stm32u0/src/bin/wdt.rs index 8f9ea516d..c0db89b22 100644 --- a/examples/stm32u0/src/bin/wdt.rs +++ b/examples/stm32u0/src/bin/wdt.rs @@ -18,7 +18,7 @@ async fn main(_spawner: Spawner) { let mut wdt = IndependentWatchdog::new(p.IWDG, 1_000_000); wdt.unleash(); - let mut i = 0; + let mut i:u8 = 0; loop { info!("high"); From a2ea307114cbfade6793819e30d8438a34b0b201 Mon Sep 17 00:00:00 2001 From: pkoevesdi <33196971+pkoevesdi@users.noreply.github.com> Date: Mon, 29 Apr 2024 22:42:46 +0200 Subject: [PATCH 231/581] Update wdt.rs: reverted changes, probably unneccesary --- examples/stm32u0/src/bin/wdt.rs | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/examples/stm32u0/src/bin/wdt.rs b/examples/stm32u0/src/bin/wdt.rs index c0db89b22..f6276e2e9 100644 --- a/examples/stm32u0/src/bin/wdt.rs +++ b/examples/stm32u0/src/bin/wdt.rs @@ -18,7 +18,7 @@ async fn main(_spawner: Spawner) { let mut wdt = IndependentWatchdog::new(p.IWDG, 1_000_000); wdt.unleash(); - let mut i:u8 = 0; + let mut i = 0; loop { info!("high"); @@ -36,6 +36,6 @@ async fn main(_spawner: Spawner) { wdt.pet(); } - i = i.wrapping_add(1); + i += 1; } } From 56b4d39df903d4dc235300dbe0fe57345c1e6fc1 Mon Sep 17 00:00:00 2001 From: pkoevesdi <33196971+pkoevesdi@users.noreply.github.com> Date: Mon, 29 Apr 2024 22:45:02 +0200 Subject: [PATCH 232/581] Update wdt.rs: reverted change, probably unneccesary here --- examples/stm32f4/src/bin/wdt.rs | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/examples/stm32f4/src/bin/wdt.rs b/examples/stm32f4/src/bin/wdt.rs index 430898b40..ea27ebce0 100644 --- a/examples/stm32f4/src/bin/wdt.rs +++ b/examples/stm32f4/src/bin/wdt.rs @@ -36,6 +36,6 @@ async fn main(_spawner: Spawner) { wdt.pet(); } - i = i.wrapping_add(1); + i += 1; } } From 7fb74ff756a3f4b8f770df6d070ba152439a0c45 Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Mon, 29 Apr 2024 23:51:33 +0200 Subject: [PATCH 233/581] stm32: rustfmt generated files in build.rs --- embassy-stm32/build.rs | 30 +++++++++++++++++++++++++++--- 1 file changed, 27 insertions(+), 3 deletions(-) diff --git a/embassy-stm32/build.rs b/embassy-stm32/build.rs index 49ffef217..d2b352742 100644 --- a/embassy-stm32/build.rs +++ b/embassy-stm32/build.rs @@ -1,6 +1,8 @@ use std::collections::{BTreeMap, BTreeSet, HashMap, HashSet}; use std::fmt::Write as _; -use std::path::PathBuf; +use std::io::Write; +use std::path::{Path, PathBuf}; +use std::process::Command; use std::{env, fs}; use proc_macro2::{Ident, TokenStream}; @@ -1536,13 +1538,15 @@ fn main() { let out_dir = &PathBuf::from(env::var_os("OUT_DIR").unwrap()); let out_file = out_dir.join("_macros.rs").to_string_lossy().to_string(); - fs::write(out_file, m).unwrap(); + fs::write(&out_file, m).unwrap(); + rustfmt(&out_file); // ======== // Write generated.rs let out_file = out_dir.join("_generated.rs").to_string_lossy().to_string(); - fs::write(out_file, g.to_string()).unwrap(); + fs::write(&out_file, g.to_string()).unwrap(); + rustfmt(&out_file); // ======== // Multicore @@ -1657,3 +1661,23 @@ fn get_flash_region_type_name(name: &str) -> String { .replace("REGION", "Region") .replace('_', "") } + +/// rustfmt a given path. +/// Failures are logged to stderr and ignored. +fn rustfmt(path: impl AsRef) { + let path = path.as_ref(); + match Command::new("rustfmt").args([path]).output() { + Err(e) => { + eprintln!("failed to exec rustfmt {:?}: {:?}", path, e); + } + Ok(out) => { + if !out.status.success() { + eprintln!("rustfmt {:?} failed:", path); + eprintln!("=== STDOUT:"); + std::io::stderr().write_all(&out.stdout).unwrap(); + eprintln!("=== STDERR:"); + std::io::stderr().write_all(&out.stderr).unwrap(); + } + } + } +} From 1ed2a0504aba38e4b404c776808ee5229cd72615 Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Mon, 29 Apr 2024 23:56:15 +0200 Subject: [PATCH 234/581] stm32/dma: add support for same channel with different req in different DMAs/DMAMUXes. --- embassy-stm32/build.rs | 59 ++++++++++++++++++--------------- embassy-stm32/src/dma/dmamux.rs | 24 -------------- embassy-stm32/src/dma/mod.rs | 2 +- embassy-stm32/src/macros.rs | 27 +-------------- 4 files changed, 35 insertions(+), 77 deletions(-) diff --git a/embassy-stm32/build.rs b/embassy-stm32/build.rs index d2b352742..ba3af2550 100644 --- a/embassy-stm32/build.rs +++ b/embassy-stm32/build.rs @@ -1169,42 +1169,52 @@ fn main() { let mut dupe = HashSet::new(); for ch in p.dma_channels { - // Some chips have multiple request numbers for the same (peri, signal, channel) combos. - // Ignore the dupes, picking the first one. Otherwise this causes conflicting trait impls - let key = (ch.signal, ch.channel); - if !dupe.insert(key) { - continue; - } - if let Some(tr) = signals.get(&(regs.kind, ch.signal)) { let peri = format_ident!("{}", p.name); - let channel = if let Some(channel) = &ch.channel { + let channels = if let Some(channel) = &ch.channel { // Chip with DMA/BDMA, without DMAMUX - let channel = format_ident!("{}", channel); - quote!({channel: #channel}) + vec![*channel] } else if let Some(dmamux) = &ch.dmamux { // Chip with DMAMUX - let dmamux = format_ident!("{}", dmamux); - quote!({dmamux: #dmamux}) + METADATA + .dma_channels + .iter() + .filter(|ch| ch.dmamux == Some(*dmamux)) + .map(|ch| ch.name) + .collect() } else if let Some(dma) = &ch.dma { // Chip with GPDMA - let dma = format_ident!("{}", dma); - quote!({dma: #dma}) + METADATA + .dma_channels + .iter() + .filter(|ch| ch.dma == *dma) + .map(|ch| ch.name) + .collect() } else { unreachable!(); }; - let request = if let Some(request) = ch.request { - let request = request as u8; - quote!(#request) - } else { - quote!(()) - }; + for channel in channels { + // Some chips have multiple request numbers for the same (peri, signal, channel) combos. + // Ignore the dupes, picking the first one. Otherwise this causes conflicting trait impls + let key = (ch.signal, channel.to_string()); + if !dupe.insert(key) { + continue; + } - g.extend(quote! { - dma_trait_impl!(#tr, #peri, #channel, #request); - }); + let request = if let Some(request) = ch.request { + let request = request as u8; + quote!(#request) + } else { + quote!(()) + }; + + let channel = format_ident!("{}", channel); + g.extend(quote! { + dma_trait_impl!(#tr, #peri, #channel, #request); + }); + } } } } @@ -1447,9 +1457,6 @@ fn main() { Some(dmamux) => { let dmamux = format_ident!("{}", dmamux); let num = ch.dmamux_channel.unwrap() as usize; - - g.extend(quote!(dmamux_channel_impl!(#name, #dmamux);)); - quote! { dmamux: crate::dma::DmamuxInfo { mux: crate::pac::#dmamux, diff --git a/embassy-stm32/src/dma/dmamux.rs b/embassy-stm32/src/dma/dmamux.rs index dc7cd3a66..1585b30d4 100644 --- a/embassy-stm32/src/dma/dmamux.rs +++ b/embassy-stm32/src/dma/dmamux.rs @@ -19,30 +19,6 @@ pub(crate) fn configure_dmamux(info: &DmamuxInfo, request: u8) { }); } -pub(crate) trait SealedMuxChannel {} - -/// DMAMUX1 instance. -pub struct DMAMUX1; -/// DMAMUX2 instance. -#[cfg(stm32h7)] -pub struct DMAMUX2; - -/// DMAMUX channel trait. -#[allow(private_bounds)] -pub trait MuxChannel: SealedMuxChannel { - /// DMAMUX instance this channel is on. - type Mux; -} - -macro_rules! dmamux_channel_impl { - ($channel_peri:ident, $dmamux:ident) => { - impl crate::dma::SealedMuxChannel for crate::peripherals::$channel_peri {} - impl crate::dma::MuxChannel for crate::peripherals::$channel_peri { - type Mux = crate::dma::$dmamux; - } - }; -} - /// safety: must be called only once pub(crate) unsafe fn init(_cs: critical_section::CriticalSection) { crate::_generated::init_dmamux(); diff --git a/embassy-stm32/src/dma/mod.rs b/embassy-stm32/src/dma/mod.rs index 8766d0a60..3f5687a62 100644 --- a/embassy-stm32/src/dma/mod.rs +++ b/embassy-stm32/src/dma/mod.rs @@ -14,7 +14,7 @@ pub use gpdma::*; #[cfg(dmamux)] mod dmamux; #[cfg(dmamux)] -pub use dmamux::*; +pub(crate) use dmamux::*; mod util; pub(crate) use util::*; diff --git a/embassy-stm32/src/macros.rs b/embassy-stm32/src/macros.rs index 14137bc37..02dce1266 100644 --- a/embassy-stm32/src/macros.rs +++ b/embassy-stm32/src/macros.rs @@ -36,32 +36,7 @@ macro_rules! dma_trait { #[allow(unused)] macro_rules! dma_trait_impl { - // DMAMUX - (crate::$mod:ident::$trait:ident$(<$mode:ident>)?, $instance:ident, {dmamux: $dmamux:ident}, $request:expr) => { - impl crate::$mod::$trait for T - where - T: crate::dma::Channel + crate::dma::MuxChannel, - { - fn request(&self) -> crate::dma::Request { - $request - } - } - }; - - // DMAMUX - (crate::$mod:ident::$trait:ident$(<$mode:ident>)?, $instance:ident, {dma: $dma:ident}, $request:expr) => { - impl crate::$mod::$trait for T - where - T: crate::dma::Channel, - { - fn request(&self) -> crate::dma::Request { - $request - } - } - }; - - // DMA/GPDMA, without DMAMUX - (crate::$mod:ident::$trait:ident$(<$mode:ident>)?, $instance:ident, {channel: $channel:ident}, $request:expr) => { + (crate::$mod:ident::$trait:ident$(<$mode:ident>)?, $instance:ident, $channel:ident, $request:expr) => { impl crate::$mod::$trait for crate::peripherals::$channel { fn request(&self) -> crate::dma::Request { $request From b3d94160b41af4beff53bb1252593d6fa3a1ee3d Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Tue, 30 Apr 2024 00:08:16 +0200 Subject: [PATCH 235/581] stm32: add support for H5[23], U5[FG], WBA5[045]. --- ci.sh | 4 ++++ embassy-stm32/Cargo.toml | 39 +++++++++++++++++++++++++++++++++++++++ 2 files changed, 43 insertions(+) diff --git a/ci.sh b/ci.sh index e95714b65..9e2237703 100755 --- a/ci.sh +++ b/ci.sh @@ -147,7 +147,11 @@ cargo batch \ --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7m-none-eabi --features stm32f103re,defmt,exti,time-driver-any,time \ --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7m-none-eabi --features stm32f100c4,defmt,exti,time-driver-any,time \ --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv8m.main-none-eabihf --features stm32h503rb,defmt,exti,time-driver-any,time \ + --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv8m.main-none-eabihf --features stm32h523cc,defmt,exti,time-driver-any,time \ --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv8m.main-none-eabihf --features stm32h562ag,defmt,exti,time-driver-any,time \ + --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv8m.main-none-eabihf --features stm32wba50ke,defmt,exti,time-driver-any,time \ + --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv8m.main-none-eabihf --features stm32wba55ug,defmt,exti,time-driver-any,time \ + --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv8m.main-none-eabihf --features stm32u5g9nj,defmt,exti,time-driver-any,time \ --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features stm32wb35ce,defmt,exti,time-driver-any,time \ --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv6m-none-eabi --features stm32u031r8,defmt,exti,time-driver-any,time \ --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv6m-none-eabi --features stm32u073mb,defmt,exti,time-driver-any,time \ diff --git a/embassy-stm32/Cargo.toml b/embassy-stm32/Cargo.toml index 93a30c5c5..6492d69f7 100644 --- a/embassy-stm32/Cargo.toml +++ b/embassy-stm32/Cargo.toml @@ -915,6 +915,20 @@ stm32h503cb = [ "stm32-metapac/stm32h503cb" ] stm32h503eb = [ "stm32-metapac/stm32h503eb" ] stm32h503kb = [ "stm32-metapac/stm32h503kb" ] stm32h503rb = [ "stm32-metapac/stm32h503rb" ] +stm32h523cc = [ "stm32-metapac/stm32h523cc" ] +stm32h523ce = [ "stm32-metapac/stm32h523ce" ] +stm32h523he = [ "stm32-metapac/stm32h523he" ] +stm32h523rc = [ "stm32-metapac/stm32h523rc" ] +stm32h523re = [ "stm32-metapac/stm32h523re" ] +stm32h523vc = [ "stm32-metapac/stm32h523vc" ] +stm32h523ve = [ "stm32-metapac/stm32h523ve" ] +stm32h523zc = [ "stm32-metapac/stm32h523zc" ] +stm32h523ze = [ "stm32-metapac/stm32h523ze" ] +stm32h533ce = [ "stm32-metapac/stm32h533ce" ] +stm32h533he = [ "stm32-metapac/stm32h533he" ] +stm32h533re = [ "stm32-metapac/stm32h533re" ] +stm32h533ve = [ "stm32-metapac/stm32h533ve" ] +stm32h533ze = [ "stm32-metapac/stm32h533ze" ] stm32h562ag = [ "stm32-metapac/stm32h562ag" ] stm32h562ai = [ "stm32-metapac/stm32h562ai" ] stm32h562ig = [ "stm32-metapac/stm32h562ig" ] @@ -1520,6 +1534,19 @@ stm32u5a9bj = [ "stm32-metapac/stm32u5a9bj" ] stm32u5a9nj = [ "stm32-metapac/stm32u5a9nj" ] stm32u5a9vj = [ "stm32-metapac/stm32u5a9vj" ] stm32u5a9zj = [ "stm32-metapac/stm32u5a9zj" ] +stm32u5f7vi = [ "stm32-metapac/stm32u5f7vi" ] +stm32u5f7vj = [ "stm32-metapac/stm32u5f7vj" ] +stm32u5f9bj = [ "stm32-metapac/stm32u5f9bj" ] +stm32u5f9nj = [ "stm32-metapac/stm32u5f9nj" ] +stm32u5f9vi = [ "stm32-metapac/stm32u5f9vi" ] +stm32u5f9vj = [ "stm32-metapac/stm32u5f9vj" ] +stm32u5f9zi = [ "stm32-metapac/stm32u5f9zi" ] +stm32u5f9zj = [ "stm32-metapac/stm32u5f9zj" ] +stm32u5g7vj = [ "stm32-metapac/stm32u5g7vj" ] +stm32u5g9bj = [ "stm32-metapac/stm32u5g9bj" ] +stm32u5g9nj = [ "stm32-metapac/stm32u5g9nj" ] +stm32u5g9vj = [ "stm32-metapac/stm32u5g9vj" ] +stm32u5g9zj = [ "stm32-metapac/stm32u5g9zj" ] stm32wb10cc = [ "stm32-metapac/stm32wb10cc" ] stm32wb15cc = [ "stm32-metapac/stm32wb15cc" ] stm32wb30ce = [ "stm32-metapac/stm32wb30ce" ] @@ -1536,10 +1563,22 @@ stm32wb55vc = [ "stm32-metapac/stm32wb55vc" ] stm32wb55ve = [ "stm32-metapac/stm32wb55ve" ] stm32wb55vg = [ "stm32-metapac/stm32wb55vg" ] stm32wb55vy = [ "stm32-metapac/stm32wb55vy" ] +stm32wba50ke = [ "stm32-metapac/stm32wba50ke" ] +stm32wba50kg = [ "stm32-metapac/stm32wba50kg" ] stm32wba52ce = [ "stm32-metapac/stm32wba52ce" ] stm32wba52cg = [ "stm32-metapac/stm32wba52cg" ] stm32wba52ke = [ "stm32-metapac/stm32wba52ke" ] stm32wba52kg = [ "stm32-metapac/stm32wba52kg" ] +stm32wba54ce = [ "stm32-metapac/stm32wba54ce" ] +stm32wba54cg = [ "stm32-metapac/stm32wba54cg" ] +stm32wba54ke = [ "stm32-metapac/stm32wba54ke" ] +stm32wba54kg = [ "stm32-metapac/stm32wba54kg" ] +stm32wba55ce = [ "stm32-metapac/stm32wba55ce" ] +stm32wba55cg = [ "stm32-metapac/stm32wba55cg" ] +stm32wba55he = [ "stm32-metapac/stm32wba55he" ] +stm32wba55hg = [ "stm32-metapac/stm32wba55hg" ] +stm32wba55ue = [ "stm32-metapac/stm32wba55ue" ] +stm32wba55ug = [ "stm32-metapac/stm32wba55ug" ] stm32wl54cc-cm4 = [ "stm32-metapac/stm32wl54cc-cm4" ] stm32wl54cc-cm0p = [ "stm32-metapac/stm32wl54cc-cm0p" ] stm32wl54jc-cm4 = [ "stm32-metapac/stm32wl54jc-cm4" ] From 7896e8aba7d08b46700b370def152de2b03feaad Mon Sep 17 00:00:00 2001 From: kalkyl Date: Tue, 30 Apr 2024 09:59:06 +0200 Subject: [PATCH 236/581] rp: WebUSB example - add Windows compatibility --- examples/rp/src/bin/usb_webusb.rs | 20 +++++++++++++++++++- 1 file changed, 19 insertions(+), 1 deletion(-) diff --git a/examples/rp/src/bin/usb_webusb.rs b/examples/rp/src/bin/usb_webusb.rs index 09f2c1cfd..e73938ac9 100644 --- a/examples/rp/src/bin/usb_webusb.rs +++ b/examples/rp/src/bin/usb_webusb.rs @@ -25,6 +25,7 @@ use embassy_rp::peripherals::USB; use embassy_rp::usb::{Driver as UsbDriver, InterruptHandler}; use embassy_usb::class::web_usb::{Config as WebUsbConfig, State, Url, WebUsb}; use embassy_usb::driver::{Driver, Endpoint, EndpointIn, EndpointOut}; +use embassy_usb::msos::{self, windows_version}; use embassy_usb::{Builder, Config}; use {defmt_rtt as _, panic_probe as _}; @@ -32,6 +33,9 @@ bind_interrupts!(struct Irqs { USBCTRL_IRQ => InterruptHandler; }); +// This is a randomly generated GUID to allow clients on Windows to find our device +const DEVICE_INTERFACE_GUIDS: &[&str] = &["{AFB9A6FB-30BA-44BC-9232-806CFC875321}"]; + #[embassy_executor::main] async fn main(_spawner: Spawner) { let p = embassy_rp::init(Default::default()); @@ -58,6 +62,7 @@ async fn main(_spawner: Spawner) { let mut config_descriptor = [0; 256]; let mut bos_descriptor = [0; 256]; let mut control_buf = [0; 64]; + let mut msos_descriptor = [0; 256]; let webusb_config = WebUsbConfig { max_packet_size: 64, @@ -73,10 +78,23 @@ async fn main(_spawner: Spawner) { config, &mut config_descriptor, &mut bos_descriptor, - &mut [], // no msos descriptors + &mut msos_descriptor, &mut control_buf, ); + // Add the Microsoft OS Descriptor (MSOS/MOD) descriptor. + // We tell Windows that this entire device is compatible with the "WINUSB" feature, + // which causes it to use the built-in WinUSB driver automatically, which in turn + // can be used by libusb/rusb software without needing a custom driver or INF file. + // In principle you might want to call msos_feature() just on a specific function, + // if your device also has other functions that still use standard class drivers. + builder.msos_descriptor(windows_version::WIN8_1, 0); + builder.msos_feature(msos::CompatibleIdFeatureDescriptor::new("WINUSB", "")); + builder.msos_feature(msos::RegistryPropertyFeatureDescriptor::new( + "DeviceInterfaceGUIDs", + msos::PropertyData::RegMultiSz(DEVICE_INTERFACE_GUIDS), + )); + // Create classes on the builder (WebUSB just needs some setup, but doesn't return anything) WebUsb::configure(&mut builder, &mut state, &webusb_config); // Create some USB bulk endpoints for testing. From ecc910b76dbfa2064f42e6917a7b5654a89b81ed Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Tue, 30 Apr 2024 17:23:38 +0200 Subject: [PATCH 237/581] Release embassy-usb-synopsys-otg v0.1.0 --- embassy-usb-synopsys-otg/Cargo.toml | 1 + embassy-usb-synopsys-otg/README.md | 17 ++++++++++++++--- 2 files changed, 15 insertions(+), 3 deletions(-) diff --git a/embassy-usb-synopsys-otg/Cargo.toml b/embassy-usb-synopsys-otg/Cargo.toml index f117d0cbf..9397ff607 100644 --- a/embassy-usb-synopsys-otg/Cargo.toml +++ b/embassy-usb-synopsys-otg/Cargo.toml @@ -2,6 +2,7 @@ name = "embassy-usb-synopsys-otg" version = "0.1.0" edition = "2021" +license = "MIT OR Apache-2.0" description = "`embassy-usb-driver` implementation for Synopsys OTG USB controllers" keywords = ["embedded", "async", "usb", "hal", "embedded-hal"] categories = ["embedded", "hardware-support", "no-std", "asynchronous"] diff --git a/embassy-usb-synopsys-otg/README.md b/embassy-usb-synopsys-otg/README.md index fa8d5d6da..5354f07bf 100644 --- a/embassy-usb-synopsys-otg/README.md +++ b/embassy-usb-synopsys-otg/README.md @@ -1,5 +1,16 @@ # Embassy USB driver for the Synopsys USB OTG core -This crate implements `embassy-usb-driver` for Synopsys USB OTG devices. If you wish to -integrate this crate into your device's HAL, you will need to add device-specific initialization. -For an example, check out the `embassy-stm32` crate. +This crate implements [`embassy-usb-driver`](https://crates.io/crates/embassy-usb-driver) for Synopsys USB OTG devices. + +It contains the "core" of the driver that is common across all chips using +the Synopsys OTG IP, but it doesn't contain chip-specific initialization such +as clock setup and GPIO muxing. You most likely don't want to use this crate +directly, but use it through a HAL that does the initialization for you. + +List of HALs integrating this driver: + +- [`embassy-stm32`](https://crates.io/crates/embassy-stm32), for STMicroelectronics STM32 chips. +- [`esp-hal`](https://crates.io/crates/esp-hal), for Espressif ESP32 chips. + +If you wish to integrate this crate into your device's HAL, you will need to add the +device-specific initialization. See the above crates for examples on how to do it. \ No newline at end of file From 5568cb89c327b9bfa32ec348b5d771947a2ea720 Mon Sep 17 00:00:00 2001 From: Andelf Date: Wed, 1 May 2024 08:15:22 +0800 Subject: [PATCH 238/581] Add ch32-hal to HAL list --- README.md | 1 + docs/modules/ROOT/pages/hal.adoc | 2 ++ docs/modules/ROOT/pages/index.adoc | 1 + 3 files changed, 4 insertions(+) diff --git a/README.md b/README.md index 0bd1ac594..ffc7899d7 100644 --- a/README.md +++ b/README.md @@ -18,6 +18,7 @@ Rust's async/await allows - esp-rs, for the Espressif Systems ESP32 series of chips. - Embassy HAL support for Espressif chips is being developed in the [esp-rs/esp-hal](https://github.com/esp-rs/esp-hal) repository. - Async WiFi, Bluetooth and ESP-NOW is being developed in the [esp-rs/esp-wifi](https://github.com/esp-rs/esp-wifi) repository. + - ch32-hal, for the WCH 32-bit RISC-V(CH32V) series of chips. - **Time that Just Works** - No more messing with hardware timers. embassy_time provides Instant, Duration and Timer types that are globally available and never overflow. diff --git a/docs/modules/ROOT/pages/hal.adoc b/docs/modules/ROOT/pages/hal.adoc index b1382e8e5..14b85e1f1 100644 --- a/docs/modules/ROOT/pages/hal.adoc +++ b/docs/modules/ROOT/pages/hal.adoc @@ -10,3 +10,5 @@ These HALs implement async/await functionality for most peripherals while also i async traits in `embedded-hal` and `embedded-hal-async`. You can also use these HALs with another executor. For the ESP32 series, there is an link:https://github.com/esp-rs/esp-hal[esp-hal] which you can use. + +For the WCH 32-bit RISC-V series, there is an link:https://github.com/ch32-rs/ch32-hal[ch32-hal], which you can use. diff --git a/docs/modules/ROOT/pages/index.adoc b/docs/modules/ROOT/pages/index.adoc index e17adbbd7..7116f357f 100644 --- a/docs/modules/ROOT/pages/index.adoc +++ b/docs/modules/ROOT/pages/index.adoc @@ -30,6 +30,7 @@ The Embassy project maintains HALs for select hardware, but you can still use HA * link:https://docs.embassy.dev/embassy-nrf/[embassy-nrf], for the Nordic Semiconductor nRF52, nRF53, nRF91 series. * link:https://docs.embassy.dev/embassy-rp/[embassy-rp], for the Raspberry Pi RP2040 microcontroller. * link:https://github.com/esp-rs[esp-rs], for the Espressif Systems ESP32 series of chips. +* link:https://github.com/ch32-rs/ch32-hal[ch32-hal], for the WCH 32-bit RISC-V(CH32V) series of chips. NOTE: A common question is if one can use the Embassy HALs standalone. Yes, it is possible! There are no dependency on the executor within the HALs. You can even use them without async, as they implement both the link:https://github.com/rust-embedded/embedded-hal[Embedded HAL] blocking and async traits. From fb67fe0a6c155191534955f1230dccaea0e11a94 Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Wed, 1 May 2024 02:21:06 +0200 Subject: [PATCH 239/581] stm32: add support for STM32H7[RS] "bootflash line", add HIL tests. --- ci.sh | 6 + embassy-stm32/Cargo.toml | 24 ++- embassy-stm32/build.rs | 17 +- embassy-stm32/src/can/fd/peripheral.rs | 30 +-- embassy-stm32/src/can/fdcan.rs | 4 +- embassy-stm32/src/cryp/mod.rs | 133 ++++++------- embassy-stm32/src/eth/v2/mod.rs | 36 +--- embassy-stm32/src/lib.rs | 6 +- embassy-stm32/src/rcc/bd.rs | 13 +- embassy-stm32/src/rcc/h.rs | 215 ++++++++++++++++------ embassy-stm32/src/rcc/hsi48.rs | 4 +- embassy-stm32/src/rcc/mco.rs | 26 ++- embassy-stm32/src/rcc/mod.rs | 2 +- embassy-stm32/src/ucpd.rs | 2 +- embassy-stm32/src/usb/otg.rs | 4 +- examples/stm32h7rs/.cargo/config.toml | 8 + examples/stm32h7rs/Cargo.toml | 73 ++++++++ examples/stm32h7rs/build.rs | 5 + examples/stm32h7rs/src/bin/blinky.rs | 51 +++++ examples/stm32h7rs/src/bin/button_exti.rs | 25 +++ examples/stm32h7rs/src/bin/can.rs | 98 ++++++++++ examples/stm32h7rs/src/bin/mco.rs | 29 +++ examples/stm32h7rs/src/bin/multiprio.rs | 150 +++++++++++++++ examples/stm32h7rs/src/bin/rng.rs | 26 +++ examples/stm32h7rs/src/bin/rtc.rs | 36 ++++ examples/stm32h7rs/src/bin/signal.rs | 36 ++++ examples/stm32h7rs/src/bin/spi.rs | 50 +++++ examples/stm32h7rs/src/bin/spi_dma.rs | 46 +++++ examples/stm32h7rs/src/bin/usart.rs | 39 ++++ examples/stm32h7rs/src/bin/usart_dma.rs | 47 +++++ examples/stm32h7rs/src/bin/usart_split.rs | 48 +++++ tests/stm32/.cargo/config.toml | 2 +- tests/stm32/Cargo.toml | 1 + tests/stm32/src/bin/cordic.rs | 7 +- tests/stm32/src/bin/fdcan.rs | 14 ++ tests/stm32/src/bin/gpio.rs | 7 +- tests/stm32/src/bin/hash.rs | 3 +- tests/stm32/src/common.rs | 33 +++- 38 files changed, 1162 insertions(+), 194 deletions(-) create mode 100644 examples/stm32h7rs/.cargo/config.toml create mode 100644 examples/stm32h7rs/Cargo.toml create mode 100644 examples/stm32h7rs/build.rs create mode 100644 examples/stm32h7rs/src/bin/blinky.rs create mode 100644 examples/stm32h7rs/src/bin/button_exti.rs create mode 100644 examples/stm32h7rs/src/bin/can.rs create mode 100644 examples/stm32h7rs/src/bin/mco.rs create mode 100644 examples/stm32h7rs/src/bin/multiprio.rs create mode 100644 examples/stm32h7rs/src/bin/rng.rs create mode 100644 examples/stm32h7rs/src/bin/rtc.rs create mode 100644 examples/stm32h7rs/src/bin/signal.rs create mode 100644 examples/stm32h7rs/src/bin/spi.rs create mode 100644 examples/stm32h7rs/src/bin/spi_dma.rs create mode 100644 examples/stm32h7rs/src/bin/usart.rs create mode 100644 examples/stm32h7rs/src/bin/usart_dma.rs create mode 100644 examples/stm32h7rs/src/bin/usart_split.rs diff --git a/ci.sh b/ci.sh index 9e2237703..1ba00f404 100755 --- a/ci.sh +++ b/ci.sh @@ -125,6 +125,10 @@ cargo batch \ --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features stm32h725re,defmt,exti,time-driver-any,time \ --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features stm32h7b3ai,defmt,exti,time-driver-any,time \ --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features stm32h7b3ai,defmt,exti,time-driver-tim1,time \ + --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features stm32h7r3z8,defmt,exti,time-driver-tim1,time \ + --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features stm32h7r7a8,defmt,exti,time-driver-tim1,time \ + --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features stm32h7s3a8,defmt,exti,time-driver-tim1,time \ + --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features stm32h7s7z8,defmt,exti,time-driver-tim1,time \ --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features stm32l431cb,defmt,exti,time-driver-any,time \ --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features stm32l476vg,defmt,exti,time-driver-any,time \ --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features stm32l422cb,defmt,exti,time-driver-any,time \ @@ -189,6 +193,7 @@ cargo batch \ --- build --release --manifest-path examples/stm32g4/Cargo.toml --target thumbv7em-none-eabi --out-dir out/examples/stm32g4 \ --- build --release --manifest-path examples/stm32h5/Cargo.toml --target thumbv8m.main-none-eabihf --out-dir out/examples/stm32h5 \ --- build --release --manifest-path examples/stm32h7/Cargo.toml --target thumbv7em-none-eabi --out-dir out/examples/stm32h7 \ + --- build --release --manifest-path examples/stm32h7rs/Cargo.toml --target thumbv7em-none-eabi --out-dir out/examples/stm32h7rs \ --- build --release --manifest-path examples/stm32l0/Cargo.toml --target thumbv6m-none-eabi --out-dir out/examples/stm32l0 \ --- build --release --manifest-path examples/stm32l1/Cargo.toml --target thumbv7m-none-eabi --out-dir out/examples/stm32l1 \ --- build --release --manifest-path examples/stm32l4/Cargo.toml --target thumbv7em-none-eabi --out-dir out/examples/stm32l4 \ @@ -240,6 +245,7 @@ cargo batch \ --- build --release --manifest-path tests/stm32/Cargo.toml --target thumbv7em-none-eabi --features stm32f303ze --out-dir out/tests/stm32f303ze \ --- build --release --manifest-path tests/stm32/Cargo.toml --target thumbv7em-none-eabi --features stm32l496zg --out-dir out/tests/stm32l496zg \ --- build --release --manifest-path tests/stm32/Cargo.toml --target thumbv7em-none-eabi --features stm32wl55jc --out-dir out/tests/stm32wl55jc \ + --- build --release --manifest-path tests/stm32/Cargo.toml --target thumbv7em-none-eabi --features stm32h7s3l8 --out-dir out/tests/stm32h7s3l8 \ --- build --release --manifest-path tests/stm32/Cargo.toml --target thumbv6m-none-eabi --features stm32f091rc --out-dir out/tests/stm32f091rc \ --- build --release --manifest-path tests/stm32/Cargo.toml --target thumbv8m.main-none-eabihf --features stm32h503rb --out-dir out/tests/stm32h503rb \ --- build --release --manifest-path tests/rp/Cargo.toml --target thumbv6m-none-eabi --out-dir out/tests/rpi-pico \ diff --git a/embassy-stm32/Cargo.toml b/embassy-stm32/Cargo.toml index 6492d69f7..cc126b3af 100644 --- a/embassy-stm32/Cargo.toml +++ b/embassy-stm32/Cargo.toml @@ -72,7 +72,7 @@ rand_core = "0.6.3" sdio-host = "0.5.0" critical-section = "1.1" #stm32-metapac = { version = "15" } -stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-37a0941112fd16fee53aaa2005fd67b77adab59c" } +stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-afee4331adc717f4cc52caab16838c95334535be" } vcell = "0.1.3" nb = "1.0.0" @@ -98,7 +98,7 @@ proc-macro2 = "1.0.36" quote = "1.0.15" #stm32-metapac = { version = "15", default-features = false, features = ["metadata"]} -stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-37a0941112fd16fee53aaa2005fd67b77adab59c", default-features = false, features = ["metadata"]} +stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-afee4331adc717f4cc52caab16838c95334535be", default-features = false, features = ["metadata"]} [features] default = ["rt"] @@ -1095,6 +1095,26 @@ stm32h7b3qi = [ "stm32-metapac/stm32h7b3qi" ] stm32h7b3ri = [ "stm32-metapac/stm32h7b3ri" ] stm32h7b3vi = [ "stm32-metapac/stm32h7b3vi" ] stm32h7b3zi = [ "stm32-metapac/stm32h7b3zi" ] +stm32h7r3a8 = [ "stm32-metapac/stm32h7r3a8" ] +stm32h7r3i8 = [ "stm32-metapac/stm32h7r3i8" ] +stm32h7r3l8 = [ "stm32-metapac/stm32h7r3l8" ] +stm32h7r3r8 = [ "stm32-metapac/stm32h7r3r8" ] +stm32h7r3v8 = [ "stm32-metapac/stm32h7r3v8" ] +stm32h7r3z8 = [ "stm32-metapac/stm32h7r3z8" ] +stm32h7r7a8 = [ "stm32-metapac/stm32h7r7a8" ] +stm32h7r7i8 = [ "stm32-metapac/stm32h7r7i8" ] +stm32h7r7l8 = [ "stm32-metapac/stm32h7r7l8" ] +stm32h7r7z8 = [ "stm32-metapac/stm32h7r7z8" ] +stm32h7s3a8 = [ "stm32-metapac/stm32h7s3a8" ] +stm32h7s3i8 = [ "stm32-metapac/stm32h7s3i8" ] +stm32h7s3l8 = [ "stm32-metapac/stm32h7s3l8" ] +stm32h7s3r8 = [ "stm32-metapac/stm32h7s3r8" ] +stm32h7s3v8 = [ "stm32-metapac/stm32h7s3v8" ] +stm32h7s3z8 = [ "stm32-metapac/stm32h7s3z8" ] +stm32h7s7a8 = [ "stm32-metapac/stm32h7s7a8" ] +stm32h7s7i8 = [ "stm32-metapac/stm32h7s7i8" ] +stm32h7s7l8 = [ "stm32-metapac/stm32h7s7l8" ] +stm32h7s7z8 = [ "stm32-metapac/stm32h7s7z8" ] stm32l010c6 = [ "stm32-metapac/stm32l010c6" ] stm32l010f4 = [ "stm32-metapac/stm32l010f4" ] stm32l010k4 = [ "stm32-metapac/stm32l010k4" ] diff --git a/embassy-stm32/build.rs b/embassy-stm32/build.rs index ba3af2550..ba118f338 100644 --- a/embassy-stm32/build.rs +++ b/embassy-stm32/build.rs @@ -406,7 +406,16 @@ fn main() { }, ); } - if chip_name.starts_with("stm32h7") { + + if chip_name.starts_with("stm32h7r") || chip_name.starts_with("stm32h7s") { + clock_gen.chained_muxes.insert( + "PER", + &PeripheralRccRegister { + register: "AHBPERCKSELR", + field: "PERSEL", + }, + ); + } else if chip_name.starts_with("stm32h7") { clock_gen.chained_muxes.insert( "PER", &PeripheralRccRegister { @@ -1585,7 +1594,11 @@ fn main() { println!("cargo:rustc-cfg=package_{}", &chip_name[10..11]); println!("cargo:rustc-cfg=flashsize_{}", &chip_name[11..12]); } else { - println!("cargo:rustc-cfg={}", &chip_name[..7]); // stm32f4 + if &chip_name[..8] == "stm32h7r" || &chip_name[..8] == "stm32h7s" { + println!("cargo:rustc-cfg=stm32h7rs"); + } else { + println!("cargo:rustc-cfg={}", &chip_name[..7]); // stm32f4 + } println!("cargo:rustc-cfg={}", &chip_name[..9]); // stm32f429 println!("cargo:rustc-cfg={}x", &chip_name[..8]); // stm32f42x println!("cargo:rustc-cfg={}x{}", &chip_name[..7], &chip_name[8..9]); // stm32f4x9 diff --git a/embassy-stm32/src/can/fd/peripheral.rs b/embassy-stm32/src/can/fd/peripheral.rs index e5cfee528..9cd5f0785 100644 --- a/embassy-stm32/src/can/fd/peripheral.rs +++ b/embassy-stm32/src/can/fd/peripheral.rs @@ -30,10 +30,10 @@ impl Registers { &mut self.msg_ram_mut().transmit.tbsa[bufidx] } pub fn msg_ram_mut(&self) -> &mut RegisterBlock { - #[cfg(stm32h7)] + #[cfg(can_fdcan_h7)] let ptr = self.msgram.ram(self.msg_ram_offset / 4).as_ptr() as *mut RegisterBlock; - #[cfg(not(stm32h7))] + #[cfg(not(can_fdcan_h7))] let ptr = self.msgram.as_ptr() as *mut RegisterBlock; unsafe { &mut (*ptr) } @@ -105,7 +105,7 @@ impl Registers { return Some(BusError::BusWarning); } else { cfg_if! { - if #[cfg(stm32h7)] { + if #[cfg(can_fdcan_h7)] { let lec = err.lec(); } else { let lec = err.lec().to_bits(); @@ -334,14 +334,14 @@ impl Registers { // set extended filters list size to 8 // REQUIRED: we use the memory map as if these settings are set // instead of re-calculating them. - #[cfg(not(stm32h7))] + #[cfg(not(can_fdcan_h7))] { self.regs.rxgfc().modify(|w| { w.set_lss(crate::can::fd::message_ram::STANDARD_FILTER_MAX); w.set_lse(crate::can::fd::message_ram::EXTENDED_FILTER_MAX); }); } - #[cfg(stm32h7)] + #[cfg(can_fdcan_h7)] { self.regs .sidfc() @@ -354,11 +354,11 @@ impl Registers { self.configure_msg_ram(); // Enable timestamping - #[cfg(not(stm32h7))] + #[cfg(not(can_fdcan_h7))] self.regs .tscc() .write(|w| w.set_tss(stm32_metapac::can::vals::Tss::INCREMENT)); - #[cfg(stm32h7)] + #[cfg(can_fdcan_h7)] self.regs.tscc().write(|w| w.set_tss(0x01)); // this isn't really documented in the reference manual @@ -491,9 +491,9 @@ impl Registers { self.regs.cccr().modify(|w| { w.set_fdoe(fdoe); - #[cfg(stm32h7)] + #[cfg(can_fdcan_h7)] w.set_bse(brse); - #[cfg(not(stm32h7))] + #[cfg(not(can_fdcan_h7))] w.set_brse(brse); }); } @@ -508,14 +508,14 @@ impl Registers { #[inline] #[allow(unused)] pub fn set_timestamp_counter_source(&mut self, select: TimestampSource) { - #[cfg(stm32h7)] + #[cfg(can_fdcan_h7)] let (tcp, tss) = match select { TimestampSource::None => (0, 0), TimestampSource::Prescaler(p) => (p as u8, 1), TimestampSource::FromTIM3 => (0, 2), }; - #[cfg(not(stm32h7))] + #[cfg(not(can_fdcan_h7))] let (tcp, tss) = match select { TimestampSource::None => (0, stm32_metapac::can::vals::Tss::ZERO), TimestampSource::Prescaler(p) => (p as u8, stm32_metapac::can::vals::Tss::INCREMENT), @@ -528,7 +528,7 @@ impl Registers { }); } - #[cfg(not(stm32h7))] + #[cfg(not(can_fdcan_h7))] /// Configures the global filter settings #[inline] pub fn set_global_filter(&mut self, filter: GlobalFilter) { @@ -551,7 +551,7 @@ impl Registers { }); } - #[cfg(stm32h7)] + #[cfg(can_fdcan_h7)] /// Configures the global filter settings #[inline] pub fn set_global_filter(&mut self, filter: GlobalFilter) { @@ -575,10 +575,10 @@ impl Registers { }); } - #[cfg(not(stm32h7))] + #[cfg(not(can_fdcan_h7))] fn configure_msg_ram(&mut self) {} - #[cfg(stm32h7)] + #[cfg(can_fdcan_h7)] fn configure_msg_ram(&mut self) { let r = self.regs; diff --git a/embassy-stm32/src/can/fdcan.rs b/embassy-stm32/src/can/fdcan.rs index 6144ba520..81ceb06aa 100644 --- a/embassy-stm32/src/can/fdcan.rs +++ b/embassy-stm32/src/can/fdcan.rs @@ -975,7 +975,7 @@ macro_rules! impl_fdcan { }; } -#[cfg(not(stm32h7))] +#[cfg(not(can_fdcan_h7))] foreach_peripheral!( (can, FDCAN) => { impl_fdcan!(FDCAN, FDCANRAM); }; (can, FDCAN1) => { impl_fdcan!(FDCAN1, FDCANRAM1); }; @@ -983,7 +983,7 @@ foreach_peripheral!( (can, FDCAN3) => { impl_fdcan!(FDCAN3, FDCANRAM3); }; ); -#[cfg(stm32h7)] +#[cfg(can_fdcan_h7)] foreach_peripheral!( (can, FDCAN1) => { impl_fdcan!(FDCAN1, FDCANRAM, 0x0000); }; (can, FDCAN2) => { impl_fdcan!(FDCAN2, FDCANRAM, 0x0C00); }; diff --git a/embassy-stm32/src/cryp/mod.rs b/embassy-stm32/src/cryp/mod.rs index 18b5ec918..f19c94fda 100644 --- a/embassy-stm32/src/cryp/mod.rs +++ b/embassy-stm32/src/cryp/mod.rs @@ -1,5 +1,5 @@ //! Crypto Accelerator (CRYP) -#[cfg(any(cryp_v2, cryp_v3))] +#[cfg(any(cryp_v2, cryp_v3, cryp_v4))] use core::cmp::min; use core::marker::PhantomData; use core::ptr; @@ -7,7 +7,7 @@ use core::ptr; use embassy_hal_internal::{into_ref, PeripheralRef}; use embassy_sync::waitqueue::AtomicWaker; -use crate::dma::{NoDma, Priority, Transfer, TransferOptions}; +use crate::dma::{NoDma, Transfer, TransferOptions}; use crate::interrupt::typelevel::Interrupt; use crate::{interrupt, pac, peripherals, Peripheral}; @@ -147,7 +147,7 @@ impl<'c, const KEY_SIZE: usize> Cipher<'c> for TdesEcb<'c, KEY_SIZE> { { p.cr().modify(|w| w.set_algomode(0)); } - #[cfg(any(cryp_v2, cryp_v3))] + #[cfg(any(cryp_v2, cryp_v3, cryp_v4))] { p.cr().modify(|w| w.set_algomode0(0)); p.cr().modify(|w| w.set_algomode3(false)); @@ -189,7 +189,7 @@ impl<'c, const KEY_SIZE: usize> Cipher<'c> for TdesCbc<'c, KEY_SIZE> { { p.cr().modify(|w| w.set_algomode(1)); } - #[cfg(any(cryp_v2, cryp_v3))] + #[cfg(any(cryp_v2, cryp_v3, cryp_v4))] { p.cr().modify(|w| w.set_algomode0(1)); p.cr().modify(|w| w.set_algomode3(false)); @@ -231,7 +231,7 @@ impl<'c, const KEY_SIZE: usize> Cipher<'c> for DesEcb<'c, KEY_SIZE> { { p.cr().modify(|w| w.set_algomode(2)); } - #[cfg(any(cryp_v2, cryp_v3))] + #[cfg(any(cryp_v2, cryp_v3, cryp_v4))] { p.cr().modify(|w| w.set_algomode0(2)); p.cr().modify(|w| w.set_algomode3(false)); @@ -272,7 +272,7 @@ impl<'c, const KEY_SIZE: usize> Cipher<'c> for DesCbc<'c, KEY_SIZE> { { p.cr().modify(|w| w.set_algomode(3)); } - #[cfg(any(cryp_v2, cryp_v3))] + #[cfg(any(cryp_v2, cryp_v3, cryp_v4))] { p.cr().modify(|w| w.set_algomode0(3)); p.cr().modify(|w| w.set_algomode3(false)); @@ -313,7 +313,7 @@ impl<'c, const KEY_SIZE: usize> Cipher<'c> for AesEcb<'c, KEY_SIZE> { { p.cr().modify(|w| w.set_algomode(7)); } - #[cfg(any(cryp_v2, cryp_v3))] + #[cfg(any(cryp_v2, cryp_v3, cryp_v4))] { p.cr().modify(|w| w.set_algomode0(7)); p.cr().modify(|w| w.set_algomode3(false)); @@ -327,7 +327,7 @@ impl<'c, const KEY_SIZE: usize> Cipher<'c> for AesEcb<'c, KEY_SIZE> { { p.cr().modify(|w| w.set_algomode(2)); } - #[cfg(any(cryp_v2, cryp_v3))] + #[cfg(any(cryp_v2, cryp_v3, cryp_v4))] { p.cr().modify(|w| w.set_algomode0(2)); p.cr().modify(|w| w.set_algomode3(false)); @@ -370,7 +370,7 @@ impl<'c, const KEY_SIZE: usize> Cipher<'c> for AesCbc<'c, KEY_SIZE> { { p.cr().modify(|w| w.set_algomode(7)); } - #[cfg(any(cryp_v2, cryp_v3))] + #[cfg(any(cryp_v2, cryp_v3, cryp_v4))] { p.cr().modify(|w| w.set_algomode0(7)); p.cr().modify(|w| w.set_algomode3(false)); @@ -384,7 +384,7 @@ impl<'c, const KEY_SIZE: usize> Cipher<'c> for AesCbc<'c, KEY_SIZE> { { p.cr().modify(|w| w.set_algomode(5)); } - #[cfg(any(cryp_v2, cryp_v3))] + #[cfg(any(cryp_v2, cryp_v3, cryp_v4))] { p.cr().modify(|w| w.set_algomode0(5)); p.cr().modify(|w| w.set_algomode3(false)); @@ -426,7 +426,7 @@ impl<'c, const KEY_SIZE: usize> Cipher<'c> for AesCtr<'c, KEY_SIZE> { { p.cr().modify(|w| w.set_algomode(6)); } - #[cfg(any(cryp_v2, cryp_v3))] + #[cfg(any(cryp_v2, cryp_v3, cryp_v4))] { p.cr().modify(|w| w.set_algomode0(6)); p.cr().modify(|w| w.set_algomode3(false)); @@ -439,14 +439,14 @@ impl<'c> CipherSized for AesCtr<'c, { 192 / 8 }> {} impl<'c> CipherSized for AesCtr<'c, { 256 / 8 }> {} impl<'c, const KEY_SIZE: usize> IVSized for AesCtr<'c, KEY_SIZE> {} -#[cfg(any(cryp_v2, cryp_v3))] +#[cfg(any(cryp_v2, cryp_v3, cryp_v4))] ///AES-GCM Cipher Mode pub struct AesGcm<'c, const KEY_SIZE: usize> { iv: [u8; 16], key: &'c [u8; KEY_SIZE], } -#[cfg(any(cryp_v2, cryp_v3))] +#[cfg(any(cryp_v2, cryp_v3, cryp_v4))] impl<'c, const KEY_SIZE: usize> AesGcm<'c, KEY_SIZE> { /// Constucts a new AES-GCM cipher for a cryptographic operation. pub fn new(key: &'c [u8; KEY_SIZE], iv: &'c [u8; 12]) -> Self { @@ -457,7 +457,7 @@ impl<'c, const KEY_SIZE: usize> AesGcm<'c, KEY_SIZE> { } } -#[cfg(any(cryp_v2, cryp_v3))] +#[cfg(any(cryp_v2, cryp_v3, cryp_v4))] impl<'c, const KEY_SIZE: usize> Cipher<'c> for AesGcm<'c, KEY_SIZE> { const BLOCK_SIZE: usize = AES_BLOCK_SIZE; @@ -504,7 +504,7 @@ impl<'c, const KEY_SIZE: usize> Cipher<'c> for AesGcm<'c, KEY_SIZE> { [0; 4] } - #[cfg(cryp_v3)] + #[cfg(any(cryp_v3, cryp_v4))] fn pre_final(&self, p: &pac::cryp::Cryp, _dir: Direction, padding_len: usize) -> [u32; 4] { //Handle special GCM partial block process. p.cr().modify(|w| w.set_npblb(padding_len as u8)); @@ -573,25 +573,25 @@ impl<'c, const KEY_SIZE: usize> Cipher<'c> for AesGcm<'c, KEY_SIZE> { } } -#[cfg(any(cryp_v2, cryp_v3))] +#[cfg(any(cryp_v2, cryp_v3, cryp_v4))] impl<'c> CipherSized for AesGcm<'c, { 128 / 8 }> {} -#[cfg(any(cryp_v2, cryp_v3))] +#[cfg(any(cryp_v2, cryp_v3, cryp_v4))] impl<'c> CipherSized for AesGcm<'c, { 192 / 8 }> {} -#[cfg(any(cryp_v2, cryp_v3))] +#[cfg(any(cryp_v2, cryp_v3, cryp_v4))] impl<'c> CipherSized for AesGcm<'c, { 256 / 8 }> {} -#[cfg(any(cryp_v2, cryp_v3))] +#[cfg(any(cryp_v2, cryp_v3, cryp_v4))] impl<'c, const KEY_SIZE: usize> CipherAuthenticated<16> for AesGcm<'c, KEY_SIZE> {} -#[cfg(any(cryp_v2, cryp_v3))] +#[cfg(any(cryp_v2, cryp_v3, cryp_v4))] impl<'c, const KEY_SIZE: usize> IVSized for AesGcm<'c, KEY_SIZE> {} -#[cfg(any(cryp_v2, cryp_v3))] +#[cfg(any(cryp_v2, cryp_v3, cryp_v4))] /// AES-GMAC Cipher Mode pub struct AesGmac<'c, const KEY_SIZE: usize> { iv: [u8; 16], key: &'c [u8; KEY_SIZE], } -#[cfg(any(cryp_v2, cryp_v3))] +#[cfg(any(cryp_v2, cryp_v3, cryp_v4))] impl<'c, const KEY_SIZE: usize> AesGmac<'c, KEY_SIZE> { /// Constructs a new AES-GMAC cipher for a cryptographic operation. pub fn new(key: &'c [u8; KEY_SIZE], iv: &'c [u8; 12]) -> Self { @@ -602,7 +602,7 @@ impl<'c, const KEY_SIZE: usize> AesGmac<'c, KEY_SIZE> { } } -#[cfg(any(cryp_v2, cryp_v3))] +#[cfg(any(cryp_v2, cryp_v3, cryp_v4))] impl<'c, const KEY_SIZE: usize> Cipher<'c> for AesGmac<'c, KEY_SIZE> { const BLOCK_SIZE: usize = AES_BLOCK_SIZE; @@ -649,7 +649,7 @@ impl<'c, const KEY_SIZE: usize> Cipher<'c> for AesGmac<'c, KEY_SIZE> { [0; 4] } - #[cfg(cryp_v3)] + #[cfg(any(cryp_v3, cryp_v4))] fn pre_final(&self, p: &pac::cryp::Cryp, _dir: Direction, padding_len: usize) -> [u32; 4] { //Handle special GCM partial block process. p.cr().modify(|w| w.set_npblb(padding_len as u8)); @@ -716,18 +716,18 @@ impl<'c, const KEY_SIZE: usize> Cipher<'c> for AesGmac<'c, KEY_SIZE> { } } -#[cfg(any(cryp_v2, cryp_v3))] +#[cfg(any(cryp_v2, cryp_v3, cryp_v4))] impl<'c> CipherSized for AesGmac<'c, { 128 / 8 }> {} -#[cfg(any(cryp_v2, cryp_v3))] +#[cfg(any(cryp_v2, cryp_v3, cryp_v4))] impl<'c> CipherSized for AesGmac<'c, { 192 / 8 }> {} -#[cfg(any(cryp_v2, cryp_v3))] +#[cfg(any(cryp_v2, cryp_v3, cryp_v4))] impl<'c> CipherSized for AesGmac<'c, { 256 / 8 }> {} -#[cfg(any(cryp_v2, cryp_v3))] +#[cfg(any(cryp_v2, cryp_v3, cryp_v4))] impl<'c, const KEY_SIZE: usize> CipherAuthenticated<16> for AesGmac<'c, KEY_SIZE> {} -#[cfg(any(cryp_v2, cryp_v3))] +#[cfg(any(cryp_v2, cryp_v3, cryp_v4))] impl<'c, const KEY_SIZE: usize> IVSized for AesGmac<'c, KEY_SIZE> {} -#[cfg(any(cryp_v2, cryp_v3))] +#[cfg(any(cryp_v2, cryp_v3, cryp_v4))] /// AES-CCM Cipher Mode pub struct AesCcm<'c, const KEY_SIZE: usize, const TAG_SIZE: usize, const IV_SIZE: usize> { key: &'c [u8; KEY_SIZE], @@ -737,7 +737,7 @@ pub struct AesCcm<'c, const KEY_SIZE: usize, const TAG_SIZE: usize, const IV_SIZ ctr: [u8; 16], } -#[cfg(any(cryp_v2, cryp_v3))] +#[cfg(any(cryp_v2, cryp_v3, cryp_v4))] impl<'c, const KEY_SIZE: usize, const TAG_SIZE: usize, const IV_SIZE: usize> AesCcm<'c, KEY_SIZE, TAG_SIZE, IV_SIZE> { /// Constructs a new AES-CCM cipher for a cryptographic operation. pub fn new(key: &'c [u8; KEY_SIZE], iv: &'c [u8; IV_SIZE], aad_len: usize, payload_len: usize) -> Self { @@ -801,7 +801,7 @@ impl<'c, const KEY_SIZE: usize, const TAG_SIZE: usize, const IV_SIZE: usize> Aes } } -#[cfg(any(cryp_v2, cryp_v3))] +#[cfg(any(cryp_v2, cryp_v3, cryp_v4))] impl<'c, const KEY_SIZE: usize, const TAG_SIZE: usize, const IV_SIZE: usize> Cipher<'c> for AesCcm<'c, KEY_SIZE, TAG_SIZE, IV_SIZE> { @@ -865,7 +865,7 @@ impl<'c, const KEY_SIZE: usize, const TAG_SIZE: usize, const IV_SIZE: usize> Cip return temp1; } - #[cfg(cryp_v3)] + #[cfg(any(cryp_v3, cryp_v4))] fn pre_final(&self, p: &pac::cryp::Cryp, _dir: Direction, padding_len: usize) -> [u32; 4] { //Handle special GCM partial block process. p.cr().modify(|w| w.set_npblb(padding_len as u8)); @@ -950,39 +950,39 @@ impl<'c, const KEY_SIZE: usize, const TAG_SIZE: usize, const IV_SIZE: usize> Cip } } -#[cfg(any(cryp_v2, cryp_v3))] +#[cfg(any(cryp_v2, cryp_v3, cryp_v4))] impl<'c, const TAG_SIZE: usize, const IV_SIZE: usize> CipherSized for AesCcm<'c, { 128 / 8 }, TAG_SIZE, IV_SIZE> {} -#[cfg(any(cryp_v2, cryp_v3))] +#[cfg(any(cryp_v2, cryp_v3, cryp_v4))] impl<'c, const TAG_SIZE: usize, const IV_SIZE: usize> CipherSized for AesCcm<'c, { 192 / 8 }, TAG_SIZE, IV_SIZE> {} -#[cfg(any(cryp_v2, cryp_v3))] +#[cfg(any(cryp_v2, cryp_v3, cryp_v4))] impl<'c, const TAG_SIZE: usize, const IV_SIZE: usize> CipherSized for AesCcm<'c, { 256 / 8 }, TAG_SIZE, IV_SIZE> {} -#[cfg(any(cryp_v2, cryp_v3))] +#[cfg(any(cryp_v2, cryp_v3, cryp_v4))] impl<'c, const KEY_SIZE: usize, const IV_SIZE: usize> CipherAuthenticated<4> for AesCcm<'c, KEY_SIZE, 4, IV_SIZE> {} -#[cfg(any(cryp_v2, cryp_v3))] +#[cfg(any(cryp_v2, cryp_v3, cryp_v4))] impl<'c, const KEY_SIZE: usize, const IV_SIZE: usize> CipherAuthenticated<6> for AesCcm<'c, KEY_SIZE, 6, IV_SIZE> {} -#[cfg(any(cryp_v2, cryp_v3))] +#[cfg(any(cryp_v2, cryp_v3, cryp_v4))] impl<'c, const KEY_SIZE: usize, const IV_SIZE: usize> CipherAuthenticated<8> for AesCcm<'c, KEY_SIZE, 8, IV_SIZE> {} -#[cfg(any(cryp_v2, cryp_v3))] +#[cfg(any(cryp_v2, cryp_v3, cryp_v4))] impl<'c, const KEY_SIZE: usize, const IV_SIZE: usize> CipherAuthenticated<10> for AesCcm<'c, KEY_SIZE, 10, IV_SIZE> {} -#[cfg(any(cryp_v2, cryp_v3))] +#[cfg(any(cryp_v2, cryp_v3, cryp_v4))] impl<'c, const KEY_SIZE: usize, const IV_SIZE: usize> CipherAuthenticated<12> for AesCcm<'c, KEY_SIZE, 12, IV_SIZE> {} -#[cfg(any(cryp_v2, cryp_v3))] +#[cfg(any(cryp_v2, cryp_v3, cryp_v4))] impl<'c, const KEY_SIZE: usize, const IV_SIZE: usize> CipherAuthenticated<14> for AesCcm<'c, KEY_SIZE, 14, IV_SIZE> {} -#[cfg(any(cryp_v2, cryp_v3))] +#[cfg(any(cryp_v2, cryp_v3, cryp_v4))] impl<'c, const KEY_SIZE: usize, const IV_SIZE: usize> CipherAuthenticated<16> for AesCcm<'c, KEY_SIZE, 16, IV_SIZE> {} -#[cfg(any(cryp_v2, cryp_v3))] +#[cfg(any(cryp_v2, cryp_v3, cryp_v4))] impl<'c, const KEY_SIZE: usize, const TAG_SIZE: usize> IVSized for AesCcm<'c, KEY_SIZE, TAG_SIZE, 7> {} -#[cfg(any(cryp_v2, cryp_v3))] +#[cfg(any(cryp_v2, cryp_v3, cryp_v4))] impl<'c, const KEY_SIZE: usize, const TAG_SIZE: usize> IVSized for AesCcm<'c, KEY_SIZE, TAG_SIZE, 8> {} -#[cfg(any(cryp_v2, cryp_v3))] +#[cfg(any(cryp_v2, cryp_v3, cryp_v4))] impl<'c, const KEY_SIZE: usize, const TAG_SIZE: usize> IVSized for AesCcm<'c, KEY_SIZE, TAG_SIZE, 9> {} -#[cfg(any(cryp_v2, cryp_v3))] +#[cfg(any(cryp_v2, cryp_v3, cryp_v4))] impl<'c, const KEY_SIZE: usize, const TAG_SIZE: usize> IVSized for AesCcm<'c, KEY_SIZE, TAG_SIZE, 10> {} -#[cfg(any(cryp_v2, cryp_v3))] +#[cfg(any(cryp_v2, cryp_v3, cryp_v4))] impl<'c, const KEY_SIZE: usize, const TAG_SIZE: usize> IVSized for AesCcm<'c, KEY_SIZE, TAG_SIZE, 11> {} -#[cfg(any(cryp_v2, cryp_v3))] +#[cfg(any(cryp_v2, cryp_v3, cryp_v4))] impl<'c, const KEY_SIZE: usize, const TAG_SIZE: usize> IVSized for AesCcm<'c, KEY_SIZE, TAG_SIZE, 12> {} -#[cfg(any(cryp_v2, cryp_v3))] +#[cfg(any(cryp_v2, cryp_v3, cryp_v4))] impl<'c, const KEY_SIZE: usize, const TAG_SIZE: usize> IVSized for AesCcm<'c, KEY_SIZE, TAG_SIZE, 13> {} #[allow(dead_code)] @@ -1205,7 +1205,7 @@ impl<'d, T: Instance, DmaIn, DmaOut> Cryp<'d, T, DmaIn, DmaOut> { ctx } - #[cfg(any(cryp_v2, cryp_v3))] + #[cfg(any(cryp_v2, cryp_v3, cryp_v4))] /// Controls the header phase of cipher processing. /// This function is only valid for authenticated ciphers including GCM, CCM, and GMAC. /// All additional associated data (AAD) must be supplied to this function prior to starting the payload phase with `payload_blocking`. @@ -1302,7 +1302,7 @@ impl<'d, T: Instance, DmaIn, DmaOut> Cryp<'d, T, DmaIn, DmaOut> { self.store_context(ctx); } - #[cfg(any(cryp_v2, cryp_v3))] + #[cfg(any(cryp_v2, cryp_v3, cryp_v4))] /// Controls the header phase of cipher processing. /// This function is only valid for authenticated ciphers including GCM, CCM, and GMAC. /// All additional associated data (AAD) must be supplied to this function prior to starting the payload phase with `payload`. @@ -1420,7 +1420,7 @@ impl<'d, T: Instance, DmaIn, DmaOut> Cryp<'d, T, DmaIn, DmaOut> { if !ctx.aad_complete && ctx.header_len > 0 { panic!("Additional associated data must be processed first!"); } else if !ctx.aad_complete { - #[cfg(any(cryp_v2, cryp_v3))] + #[cfg(any(cryp_v2, cryp_v3, cryp_v4))] { ctx.aad_complete = true; T::regs().cr().modify(|w| w.set_crypen(false)); @@ -1512,7 +1512,7 @@ impl<'d, T: Instance, DmaIn, DmaOut> Cryp<'d, T, DmaIn, DmaOut> { if !ctx.aad_complete && ctx.header_len > 0 { panic!("Additional associated data must be processed first!"); } else if !ctx.aad_complete { - #[cfg(any(cryp_v2, cryp_v3))] + #[cfg(any(cryp_v2, cryp_v3, cryp_v4))] { ctx.aad_complete = true; T::regs().cr().modify(|w| w.set_crypen(false)); @@ -1585,7 +1585,7 @@ impl<'d, T: Instance, DmaIn, DmaOut> Cryp<'d, T, DmaIn, DmaOut> { self.store_context(ctx); } - #[cfg(any(cryp_v2, cryp_v3))] + #[cfg(any(cryp_v2, cryp_v3, cryp_v4))] /// Generates an authentication tag for authenticated ciphers including GCM, CCM, and GMAC. /// Called after the all data has been encrypted/decrypted by `payload`. pub fn finish_blocking< @@ -1614,7 +1614,7 @@ impl<'d, T: Instance, DmaIn, DmaOut> Cryp<'d, T, DmaIn, DmaOut> { payloadlen1.swap_bytes(), payloadlen2.swap_bytes(), ]; - #[cfg(cryp_v3)] + #[cfg(any(cryp_v3, cryp_v4))] let footer: [u32; 4] = [headerlen1, headerlen2, payloadlen1, payloadlen2]; self.write_words_blocking(C::BLOCK_SIZE, &footer); @@ -1631,7 +1631,7 @@ impl<'d, T: Instance, DmaIn, DmaOut> Cryp<'d, T, DmaIn, DmaOut> { tag } - #[cfg(any(cryp_v2, cryp_v3))] + #[cfg(any(cryp_v2, cryp_v3, cryp_v4))] // Generates an authentication tag for authenticated ciphers including GCM, CCM, and GMAC. /// Called after the all data has been encrypted/decrypted by `payload`. pub async fn finish< @@ -1664,7 +1664,7 @@ impl<'d, T: Instance, DmaIn, DmaOut> Cryp<'d, T, DmaIn, DmaOut> { payloadlen1.swap_bytes(), payloadlen2.swap_bytes(), ]; - #[cfg(cryp_v3)] + #[cfg(any(cryp_v3, cryp_v4))] let footer: [u32; 4] = [headerlen1, headerlen2, payloadlen1, payloadlen2]; let write = Self::write_words(&mut self.indma, C::BLOCK_SIZE, &footer); @@ -1735,7 +1735,7 @@ impl<'d, T: Instance, DmaIn, DmaOut> Cryp<'d, T, DmaIn, DmaOut> { ctx.iv[2] = T::regs().init(1).ivlr().read(); ctx.iv[3] = T::regs().init(1).ivrr().read(); - #[cfg(any(cryp_v2, cryp_v3))] + #[cfg(any(cryp_v2, cryp_v3, cryp_v4))] for i in 0..8 { ctx.csgcmccm[i] = T::regs().csgcmccmr(i).read(); ctx.csgcm[i] = T::regs().csgcmr(i).read(); @@ -1750,7 +1750,7 @@ impl<'d, T: Instance, DmaIn, DmaOut> Cryp<'d, T, DmaIn, DmaOut> { T::regs().init(1).ivlr().write_value(ctx.iv[2]); T::regs().init(1).ivrr().write_value(ctx.iv[3]); - #[cfg(any(cryp_v2, cryp_v3))] + #[cfg(any(cryp_v2, cryp_v3, cryp_v4))] for i in 0..8 { T::regs().csgcmccmr(i).write_value(ctx.csgcmccm[i]); T::regs().csgcmr(i).write_value(ctx.csgcm[i]); @@ -1797,7 +1797,8 @@ impl<'d, T: Instance, DmaIn, DmaOut> Cryp<'d, T, DmaIn, DmaOut> { let num_words = blocks.len() / 4; let src_ptr = ptr::slice_from_raw_parts(blocks.as_ptr().cast(), num_words); let options = TransferOptions { - priority: Priority::High, + #[cfg(not(gpdma))] + priority: crate::dma::Priority::High, ..Default::default() }; let dma_transfer = unsafe { Transfer::new_write_raw(dma, dma_request, src_ptr, dst_ptr, options) }; @@ -1806,7 +1807,7 @@ impl<'d, T: Instance, DmaIn, DmaOut> Cryp<'d, T, DmaIn, DmaOut> { dma_transfer.await; } - #[cfg(any(cryp_v2, cryp_v3))] + #[cfg(any(cryp_v2, cryp_v3, cryp_v4))] fn write_words_blocking(&self, block_size: usize, blocks: &[u32]) { assert_eq!((blocks.len() * 4) % block_size, 0); let mut byte_counter: usize = 0; @@ -1820,7 +1821,7 @@ impl<'d, T: Instance, DmaIn, DmaOut> Cryp<'d, T, DmaIn, DmaOut> { } } - #[cfg(any(cryp_v2, cryp_v3))] + #[cfg(any(cryp_v2, cryp_v3, cryp_v4))] async fn write_words(dma: &mut PeripheralRef<'_, DmaIn>, block_size: usize, blocks: &[u32]) where DmaIn: crate::cryp::DmaIn, @@ -1836,7 +1837,8 @@ impl<'d, T: Instance, DmaIn, DmaOut> Cryp<'d, T, DmaIn, DmaOut> { let num_words = blocks.len(); let src_ptr = ptr::slice_from_raw_parts(blocks.as_ptr().cast(), num_words); let options = TransferOptions { - priority: Priority::High, + #[cfg(not(gpdma))] + priority: crate::dma::Priority::High, ..Default::default() }; let dma_transfer = unsafe { Transfer::new_write_raw(dma, dma_request, src_ptr, dst_ptr, options) }; @@ -1875,7 +1877,8 @@ impl<'d, T: Instance, DmaIn, DmaOut> Cryp<'d, T, DmaIn, DmaOut> { let num_words = blocks.len() / 4; let dst_ptr = ptr::slice_from_raw_parts_mut(blocks.as_mut_ptr().cast(), num_words); let options = TransferOptions { - priority: Priority::VeryHigh, + #[cfg(not(gpdma))] + priority: crate::dma::Priority::VeryHigh, ..Default::default() }; let dma_transfer = unsafe { Transfer::new_read_raw(dma, dma_request, src_ptr, dst_ptr, options) }; diff --git a/embassy-stm32/src/eth/v2/mod.rs b/embassy-stm32/src/eth/v2/mod.rs index 37f460574..a19aa42cf 100644 --- a/embassy-stm32/src/eth/v2/mod.rs +++ b/embassy-stm32/src/eth/v2/mod.rs @@ -4,6 +4,7 @@ use core::marker::PhantomData; use core::sync::atomic::{fence, Ordering}; use embassy_hal_internal::{into_ref, PeripheralRef}; +use stm32_metapac::syscfg::vals::EthSelPhy; pub(crate) use self::descriptors::{RDes, RDesRing, TDes, TDesRing}; use super::*; @@ -80,19 +81,7 @@ impl<'d, T: Instance, P: PHY> Ethernet<'d, T, P> { phy: P, mac_addr: [u8; 6], ) -> Self { - // Enable the necessary Clocks - #[cfg(not(rcc_h5))] - critical_section::with(|_| { - crate::pac::RCC.ahb1enr().modify(|w| { - w.set_eth1macen(true); - w.set_eth1txen(true); - w.set_eth1rxen(true); - }); - - crate::pac::SYSCFG.pmcr().modify(|w| w.set_epis(0b100)); - }); - - #[cfg(rcc_h5)] + // Enable the necessary clocks critical_section::with(|_| { crate::pac::RCC.ahb1enr().modify(|w| { w.set_ethen(true); @@ -100,9 +89,7 @@ impl<'d, T: Instance, P: PHY> Ethernet<'d, T, P> { w.set_ethrxen(true); }); - crate::pac::SYSCFG - .pmcr() - .modify(|w| w.set_eth_sel_phy(crate::pac::syscfg::vals::EthSelPhy::B_0X4)); + crate::pac::SYSCFG.pmcr().modify(|w| w.set_eth_sel_phy(EthSelPhy::RMII)); }); into_ref!(ref_clk, mdio, mdc, crs, rx_d0, rx_d1, tx_d0, tx_d1, tx_en); @@ -145,19 +132,7 @@ impl<'d, T: Instance, P: PHY> Ethernet<'d, T, P> { phy: P, mac_addr: [u8; 6], ) -> Self { - // Enable necessary clocks. - #[cfg(not(rcc_h5))] - critical_section::with(|_| { - crate::pac::RCC.ahb1enr().modify(|w| { - w.set_eth1macen(true); - w.set_eth1txen(true); - w.set_eth1rxen(true); - }); - - crate::pac::SYSCFG.pmcr().modify(|w| w.set_epis(0b000)); - }); - - #[cfg(rcc_h5)] + // Enable the necessary clocks critical_section::with(|_| { crate::pac::RCC.ahb1enr().modify(|w| { w.set_ethen(true); @@ -165,10 +140,9 @@ impl<'d, T: Instance, P: PHY> Ethernet<'d, T, P> { w.set_ethrxen(true); }); - // TODO: This is for RMII - what would MII need here? crate::pac::SYSCFG .pmcr() - .modify(|w| w.set_eth_sel_phy(crate::pac::syscfg::vals::EthSelPhy::B_0X4)); + .modify(|w| w.set_eth_sel_phy(EthSelPhy::MII_GMII)); }); into_ref!(rx_clk, tx_clk, mdio, mdc, rxdv, rx_d0, rx_d1, rx_d2, rx_d3, tx_d0, tx_d1, tx_d2, tx_d3, tx_en); diff --git a/embassy-stm32/src/lib.rs b/embassy-stm32/src/lib.rs index 7d2b49ff4..1f4e9ab1e 100644 --- a/embassy-stm32/src/lib.rs +++ b/embassy-stm32/src/lib.rs @@ -2,7 +2,7 @@ #![allow(async_fn_in_trait)] #![cfg_attr( docsrs, - doc = "

You might want to browse the `embassy-stm32` documentation on the Embassy website instead.

The documentation here on `docs.rs` is built for a single chip only (STM32H755 in particular), while on the Embassy website you can pick your exact chip from the top menu. Available peripherals and their APIs change depending on the chip.

\n\n" + doc = "

You might want to browse the `embassy-stm32` documentation on the Embassy website instead.

The documentation here on `docs.rs` is built for a single chip only (stm32h7, stm32h7rs55 in particular), while on the Embassy website you can pick your exact chip from the top menu. Available peripherals and their APIs change depending on the chip.

\n\n" )] #![doc = include_str!("../README.md")] #![warn(missing_docs)] @@ -303,9 +303,9 @@ pub fn init(config: Config) -> Peripherals { #[cfg(not(any(stm32f1, stm32wb, stm32wl)))] peripherals::SYSCFG::enable_and_reset_with_cs(cs); - #[cfg(not(any(stm32h5, stm32h7, stm32wb, stm32wl)))] + #[cfg(not(any(stm32h5, stm32h7, stm32h7rs, stm32wb, stm32wl)))] peripherals::PWR::enable_and_reset_with_cs(cs); - #[cfg(not(any(stm32f2, stm32f4, stm32f7, stm32l0, stm32h5, stm32h7)))] + #[cfg(not(any(stm32f2, stm32f4, stm32f7, stm32l0, stm32h5, stm32h7, stm32h7rs)))] peripherals::FLASH::enable_and_reset_with_cs(cs); // Enable the VDDIO2 power supply on chips that have it. diff --git a/embassy-stm32/src/rcc/bd.rs b/embassy-stm32/src/rcc/bd.rs index 54d3c662b..f3ac4fdbe 100644 --- a/embassy-stm32/src/rcc/bd.rs +++ b/embassy-stm32/src/rcc/bd.rs @@ -198,7 +198,7 @@ impl LsConfig { } // If not OK, reset backup domain and configure it. - #[cfg(not(any(rcc_l0, rcc_l0_v2, rcc_l1, stm32h5, stm32c0)))] + #[cfg(not(any(rcc_l0, rcc_l0_v2, rcc_l1, stm32h5, stm32h7rs, stm32c0)))] { bdcr().modify(|w| w.set_bdrst(true)); bdcr().modify(|w| w.set_bdrst(false)); @@ -210,11 +210,12 @@ impl LsConfig { // letting half our RAM go magically *poof*. // STM32H503CB/EB/KB/RB device errata - 2.2.8 SRAM2 unduly erased upon a backup domain reset // STM32H562xx/563xx/573xx device errata - 2.2.14 SRAM2 is erased when the backup domain is reset - //#[cfg(any(stm32h5))] - //{ - // bdcr().modify(|w| w.set_vswrst(true)); - // bdcr().modify(|w| w.set_vswrst(false)); - //} + //#[cfg(any(stm32h5, stm32h7rs))] + #[cfg(any(stm32h7rs))] + { + bdcr().modify(|w| w.set_vswrst(true)); + bdcr().modify(|w| w.set_vswrst(false)); + } #[cfg(any(stm32c0, stm32l0))] { bdcr().modify(|w| w.set_rtcrst(true)); diff --git a/embassy-stm32/src/rcc/h.rs b/embassy-stm32/src/rcc/h.rs index aa8c4b1f7..5d47d400c 100644 --- a/embassy-stm32/src/rcc/h.rs +++ b/embassy-stm32/src/rcc/h.rs @@ -1,7 +1,6 @@ use core::ops::RangeInclusive; use crate::pac; -use crate::pac::pwr::vals::Vos; pub use crate::pac::rcc::vals::{ Hsidiv as HSIPrescaler, Plldiv as PllDiv, Pllm as PllPreDiv, Plln as PllMul, Pllsrc as PllSource, Sw as Sysclk, }; @@ -22,9 +21,12 @@ const VCO_WIDE_RANGE: RangeInclusive = Hertz(128_000_000)..=Hertz(560_000 const VCO_WIDE_RANGE: RangeInclusive = Hertz(192_000_000)..=Hertz(836_000_000); #[cfg(any(pwr_h7rm0399, pwr_h7rm0433))] const VCO_WIDE_RANGE: RangeInclusive = Hertz(192_000_000)..=Hertz(960_000_000); +#[cfg(any(stm32h7rs))] +const VCO_WIDE_RANGE: RangeInclusive = Hertz(384_000_000)..=Hertz(1672_000_000); pub use crate::pac::rcc::vals::{Hpre as AHBPrescaler, Ppre as APBPrescaler}; +#[cfg(any(stm32h5, stm32h7))] #[derive(Clone, Copy, Eq, PartialEq)] pub enum VoltageScale { Scale0, @@ -32,6 +34,8 @@ pub enum VoltageScale { Scale2, Scale3, } +#[cfg(any(stm32h7rs))] +pub use crate::pac::pwr::vals::Vos as VoltageScale; #[derive(Clone, Copy, Eq, PartialEq)] pub enum HseMode { @@ -40,7 +44,7 @@ pub enum HseMode { /// external analog clock (low swing) (HSEBYP=1, HSEEXT=0) Bypass, /// external digital clock (full swing) (HSEBYP=1, HSEEXT=1) - #[cfg(any(rcc_h5, rcc_h50))] + #[cfg(any(rcc_h5, rcc_h50, rcc_h7rs))] BypassDigital, } @@ -65,8 +69,8 @@ pub struct Pll { /// PLL P division factor. If None, PLL P output is disabled. /// On PLL1, it must be even for most series (in particular, - /// it cannot be 1 in series other than STM32H723/733, - /// STM32H725/735 and STM32H730.) + /// it cannot be 1 in series other than stm32h7, stm32h7rs23/733, + /// stm32h7, stm32h7rs25/735 and stm32h7, stm32h7rs30.) pub divp: Option, /// PLL Q division factor. If None, PLL Q output is disabled. pub divq: Option, @@ -115,7 +119,7 @@ impl From for Timpre { /// Power supply configuration /// See RM0433 Rev 4 7.4 -#[cfg(any(pwr_h7rm0399, pwr_h7rm0455, pwr_h7rm0468))] +#[cfg(any(pwr_h7rm0399, pwr_h7rm0455, pwr_h7rm0468, pwr_h7rs))] #[derive(PartialEq)] pub enum SupplyConfig { /// Default power supply configuration. @@ -164,8 +168,15 @@ pub enum SupplyConfig { /// SMPS step-down converter voltage output level. /// This is only used in certain power supply configurations: /// SMPSLDO, SMPSExternalLDO, SMPSExternalLDOBypass. -#[cfg(any(pwr_h7rm0399, pwr_h7rm0455, pwr_h7rm0468))] -pub use pac::pwr::vals::Sdlevel as SMPSSupplyVoltage; +#[cfg(any(pwr_h7rm0399, pwr_h7rm0455, pwr_h7rm0468, pwr_h7rs))] +#[derive(Clone, Copy, Eq, PartialEq, Debug)] +pub enum SMPSSupplyVoltage { + /// 1.8v + V1_8, + /// 2.5v + #[cfg(not(pwr_h7rs))] + V2_5, +} /// Configuration of the core clocks #[non_exhaustive] @@ -178,22 +189,26 @@ pub struct Config { pub pll1: Option, pub pll2: Option, - #[cfg(any(rcc_h5, stm32h7))] + #[cfg(any(rcc_h5, stm32h7, stm32h7rs))] pub pll3: Option, + #[cfg(any(stm32h7, stm32h7rs))] pub d1c_pre: AHBPrescaler, pub ahb_pre: AHBPrescaler, pub apb1_pre: APBPrescaler, pub apb2_pre: APBPrescaler, + #[cfg(not(stm32h7rs))] pub apb3_pre: APBPrescaler, - #[cfg(stm32h7)] + #[cfg(any(stm32h7, stm32h7rs))] pub apb4_pre: APBPrescaler, + #[cfg(stm32h7rs)] + pub apb5_pre: APBPrescaler, pub timer_prescaler: TimerPrescaler, pub voltage_scale: VoltageScale, pub ls: super::LsConfig, - #[cfg(any(pwr_h7rm0399, pwr_h7rm0455, pwr_h7rm0468))] + #[cfg(any(pwr_h7rm0399, pwr_h7rm0455, pwr_h7rm0468, pwr_h7rs))] pub supply_config: SupplyConfig, /// Per-peripheral kernel clock selection muxes @@ -210,23 +225,30 @@ impl Default for Config { sys: Sysclk::HSI, pll1: None, pll2: None, - #[cfg(any(rcc_h5, stm32h7))] + #[cfg(any(rcc_h5, stm32h7, stm32h7rs))] pll3: None, + #[cfg(any(stm32h7, stm32h7rs))] d1c_pre: AHBPrescaler::DIV1, ahb_pre: AHBPrescaler::DIV1, apb1_pre: APBPrescaler::DIV1, apb2_pre: APBPrescaler::DIV1, + #[cfg(not(stm32h7rs))] apb3_pre: APBPrescaler::DIV1, - #[cfg(stm32h7)] + #[cfg(any(stm32h7, stm32h7rs))] apb4_pre: APBPrescaler::DIV1, + #[cfg(stm32h7rs)] + apb5_pre: APBPrescaler::DIV1, timer_prescaler: TimerPrescaler::DefaultX2, + #[cfg(not(rcc_h7rs))] voltage_scale: VoltageScale::Scale0, + #[cfg(rcc_h7rs)] + voltage_scale: VoltageScale::HIGH, ls: Default::default(), - #[cfg(any(pwr_h7rm0399, pwr_h7rm0455, pwr_h7rm0468))] - supply_config: SupplyConfig::Default, + #[cfg(any(pwr_h7rm0399, pwr_h7rm0455, pwr_h7rm0468, pwr_h7rs))] + supply_config: SupplyConfig::LDO, mux: Default::default(), } @@ -234,24 +256,30 @@ impl Default for Config { } pub(crate) unsafe fn init(config: Config) { + #[cfg(any(stm32h7))] + let pwr_reg = PWR.cr3(); + #[cfg(any(stm32h7rs))] + let pwr_reg = PWR.csr2(); + // NB. The lower bytes of CR3 can only be written once after // POR, and must be written with a valid combination. Refer to // RM0433 Rev 7 6.8.4. This is partially enforced by dropping // `self` at the end of this method, but of course we cannot // know what happened between the previous POR and here. #[cfg(pwr_h7rm0433)] - PWR.cr3().modify(|w| { + pwr_reg.modify(|w| { w.set_scuen(true); w.set_ldoen(true); w.set_bypass(false); }); - #[cfg(any(pwr_h7rm0399, pwr_h7rm0455, pwr_h7rm0468))] + #[cfg(any(pwr_h7rm0399, pwr_h7rm0455, pwr_h7rm0468, pwr_h7rs))] { + use pac::pwr::vals::Sdlevel; match config.supply_config { SupplyConfig::Default => { - PWR.cr3().modify(|w| { - w.set_sdlevel(SMPSSupplyVoltage::RESET); + pwr_reg.modify(|w| { + w.set_sdlevel(Sdlevel::RESET); w.set_sdexthp(false); w.set_sden(true); w.set_ldoen(true); @@ -259,25 +287,30 @@ pub(crate) unsafe fn init(config: Config) { }); } SupplyConfig::LDO => { - PWR.cr3().modify(|w| { + pwr_reg.modify(|w| { w.set_sden(false); w.set_ldoen(true); w.set_bypass(false); }); } SupplyConfig::DirectSMPS => { - PWR.cr3().modify(|w| { + pwr_reg.modify(|w| { w.set_sdexthp(false); w.set_sden(true); w.set_ldoen(false); w.set_bypass(false); }); } - SupplyConfig::SMPSLDO(smps_supply_voltage) - | SupplyConfig::SMPSExternalLDO(smps_supply_voltage) - | SupplyConfig::SMPSExternalLDOBypass(smps_supply_voltage) => { - PWR.cr3().modify(|w| { - w.set_sdlevel(smps_supply_voltage); + SupplyConfig::SMPSLDO(sdlevel) + | SupplyConfig::SMPSExternalLDO(sdlevel) + | SupplyConfig::SMPSExternalLDOBypass(sdlevel) => { + let sdlevel = match sdlevel { + SMPSSupplyVoltage::V1_8 => Sdlevel::V1_8, + #[cfg(not(pwr_h7rs))] + SMPSSupplyVoltage::V2_5 => Sdlevel::V2_5, + }; + pwr_reg.modify(|w| { + w.set_sdlevel(sdlevel); w.set_sdexthp(matches!( config.supply_config, SupplyConfig::SMPSExternalLDO(_) | SupplyConfig::SMPSExternalLDOBypass(_) @@ -291,7 +324,7 @@ pub(crate) unsafe fn init(config: Config) { }); } SupplyConfig::SMPSDisabledLDOBypass => { - PWR.cr3().modify(|w| { + pwr_reg.modify(|w| { w.set_sden(false); w.set_ldoen(false); w.set_bypass(true); @@ -305,43 +338,49 @@ pub(crate) unsafe fn init(config: Config) { // in the D3CR.VOS and CR3.SDLEVEL fields. By default after reset // VOS = Scale 3, so check that the voltage on the VCAP pins = // 1.0V. - #[cfg(any(pwr_h7rm0433, pwr_h7rm0399, pwr_h7rm0455, pwr_h7rm0468))] + #[cfg(any(stm32h7))] while !PWR.csr1().read().actvosrdy() {} + #[cfg(any(stm32h7rs))] + while !PWR.sr1().read().actvosrdy() {} // Configure voltage scale. #[cfg(any(pwr_h5, pwr_h50))] { PWR.voscr().modify(|w| { w.set_vos(match config.voltage_scale { - VoltageScale::Scale0 => Vos::SCALE0, - VoltageScale::Scale1 => Vos::SCALE1, - VoltageScale::Scale2 => Vos::SCALE2, - VoltageScale::Scale3 => Vos::SCALE3, + VoltageScale::Scale0 => crate::pac::pwr::vals::Vos::SCALE0, + VoltageScale::Scale1 => crate::pac::pwr::vals::Vos::SCALE1, + VoltageScale::Scale2 => crate::pac::pwr::vals::Vos::SCALE2, + VoltageScale::Scale3 => crate::pac::pwr::vals::Vos::SCALE3, }) }); while !PWR.vossr().read().vosrdy() {} } - #[cfg(syscfg_h7)] { // in chips without the overdrive bit, we can go from any scale to any scale directly. PWR.d3cr().modify(|w| { w.set_vos(match config.voltage_scale { - VoltageScale::Scale0 => Vos::SCALE0, - VoltageScale::Scale1 => Vos::SCALE1, - VoltageScale::Scale2 => Vos::SCALE2, - VoltageScale::Scale3 => Vos::SCALE3, + VoltageScale::Scale0 => crate::pac::pwr::vals::Vos::SCALE0, + VoltageScale::Scale1 => crate::pac::pwr::vals::Vos::SCALE1, + VoltageScale::Scale2 => crate::pac::pwr::vals::Vos::SCALE2, + VoltageScale::Scale3 => crate::pac::pwr::vals::Vos::SCALE3, }) }); while !PWR.d3cr().read().vosrdy() {} } + #[cfg(pwr_h7rs)] + { + PWR.csr4().modify(|w| w.set_vos(config.voltage_scale)); + while !PWR.csr4().read().vosrdy() {} + } #[cfg(syscfg_h7od)] { match config.voltage_scale { VoltageScale::Scale0 => { // to go to scale0, we must go to Scale1 first... - PWR.d3cr().modify(|w| w.set_vos(Vos::SCALE1)); + PWR.d3cr().modify(|w| w.set_vos(crate::pac::pwr::vals::Vos::SCALE1)); while !PWR.d3cr().read().vosrdy() {} // Then enable overdrive. @@ -353,9 +392,9 @@ pub(crate) unsafe fn init(config: Config) { PWR.d3cr().modify(|w| { w.set_vos(match config.voltage_scale { VoltageScale::Scale0 => unreachable!(), - VoltageScale::Scale1 => Vos::SCALE1, - VoltageScale::Scale2 => Vos::SCALE2, - VoltageScale::Scale3 => Vos::SCALE3, + VoltageScale::Scale1 => crate::pac::pwr::vals::Vos::SCALE1, + VoltageScale::Scale2 => crate::pac::pwr::vals::Vos::SCALE2, + VoltageScale::Scale3 => crate::pac::pwr::vals::Vos::SCALE3, }) }); while !PWR.d3cr().read().vosrdy() {} @@ -388,7 +427,7 @@ pub(crate) unsafe fn init(config: Config) { Some(hse) => { RCC.cr().modify(|w| { w.set_hsebyp(hse.mode != HseMode::Oscillator); - #[cfg(any(rcc_h5, rcc_h50))] + #[cfg(any(rcc_h5, rcc_h50, rcc_h7rs))] w.set_hseext(match hse.mode { HseMode::Oscillator | HseMode::Bypass => pac::rcc::vals::Hseext::ANALOG, HseMode::BypassDigital => pac::rcc::vals::Hseext::DIGITAL, @@ -414,7 +453,7 @@ pub(crate) unsafe fn init(config: Config) { }; // H7 has shared PLLSRC, check it's equal in all PLLs. - #[cfg(stm32h7)] + #[cfg(any(stm32h7, stm32h7rs))] { let plls = [&config.pll1, &config.pll2, &config.pll3]; if !super::util::all_equal(plls.into_iter().flatten().map(|p| p.source)) { @@ -426,7 +465,7 @@ pub(crate) unsafe fn init(config: Config) { let pll_input = PllInput { csi, hse, hsi }; let pll1 = init_pll(0, config.pll1, &pll_input); let pll2 = init_pll(1, config.pll2, &pll_input); - #[cfg(any(rcc_h5, stm32h7))] + #[cfg(any(rcc_h5, stm32h7, stm32h7rs))] let pll3 = init_pll(2, config.pll3, &pll_input); // Configure sysclk @@ -474,8 +513,13 @@ pub(crate) unsafe fn init(config: Config) { VoltageScale::Scale2 => (Hertz(300_000_000), Hertz(150_000_000), Hertz(75_000_000)), VoltageScale::Scale3 => (Hertz(200_000_000), Hertz(100_000_000), Hertz(50_000_000)), }; + #[cfg(stm32h7rs)] + let (d1cpre_clk_max, hclk_max, pclk_max) = match config.voltage_scale { + VoltageScale::HIGH => (Hertz(600_000_000), Hertz(300_000_000), Hertz(150_000_000)), + VoltageScale::LOW => (Hertz(400_000_000), Hertz(200_000_000), Hertz(100_000_000)), + }; - #[cfg(stm32h7)] + #[cfg(any(stm32h7, stm32h7rs))] let hclk = { let d1cpre_clk = sys / config.d1c_pre; assert!(d1cpre_clk <= d1cpre_clk_max); @@ -491,12 +535,18 @@ pub(crate) unsafe fn init(config: Config) { let apb2 = hclk / config.apb2_pre; let apb2_tim = apb_div_tim(&config.apb2_pre, hclk, config.timer_prescaler); assert!(apb2 <= pclk_max); + #[cfg(not(stm32h7rs))] let apb3 = hclk / config.apb3_pre; + #[cfg(not(stm32h7rs))] assert!(apb3 <= pclk_max); - #[cfg(stm32h7)] + #[cfg(any(stm32h7, stm32h7rs))] let apb4 = hclk / config.apb4_pre; - #[cfg(stm32h7)] + #[cfg(any(stm32h7, stm32h7rs))] assert!(apb4 <= pclk_max); + #[cfg(stm32h7rs)] + let apb5 = hclk / config.apb5_pre; + #[cfg(stm32h7rs)] + assert!(apb5 <= pclk_max); flash_setup(hclk, config.voltage_scale); @@ -520,6 +570,25 @@ pub(crate) unsafe fn init(config: Config) { w.set_d3ppre(config.apb4_pre); }); } + #[cfg(stm32h7rs)] + { + RCC.cdcfgr().write(|w| { + w.set_cpre(config.d1c_pre); + }); + while RCC.cdcfgr().read().cpre() != config.d1c_pre {} + + RCC.bmcfgr().write(|w| { + w.set_bmpre(config.ahb_pre); + }); + while RCC.bmcfgr().read().bmpre() != config.ahb_pre {} + + RCC.apbcfgr().modify(|w| { + w.set_ppre1(config.apb1_pre); + w.set_ppre2(config.apb2_pre); + w.set_ppre4(config.apb4_pre); + w.set_ppre5(config.apb5_pre); + }); + } #[cfg(stm32h5)] { // Set hpre @@ -540,7 +609,7 @@ pub(crate) unsafe fn init(config: Config) { while RCC.cfgr().read().sws() != config.sys {} // IO compensation cell - Requires CSI clock and SYSCFG - #[cfg(stm32h7)] // TODO h5 + #[cfg(any(stm32h7))] // TODO h5, h7rs if csi.is_some() { // Enable the compensation cell, using back-bias voltage code // provide by the cell. @@ -551,7 +620,7 @@ pub(crate) unsafe fn init(config: Config) { w.set_hslv(false); }) }); - while !pac::SYSCFG.cccsr().read().ready() {} + while !pac::SYSCFG.cccsr().read().rdy() {} } config.mux.init(); @@ -562,11 +631,17 @@ pub(crate) unsafe fn init(config: Config) { hclk2: Some(hclk), hclk3: Some(hclk), hclk4: Some(hclk), + #[cfg(stm32h7rs)] + hclk5: Some(hclk), pclk1: Some(apb1), pclk2: Some(apb2), + #[cfg(not(stm32h7rs))] pclk3: Some(apb3), - #[cfg(stm32h7)] + #[cfg(any(stm32h7, stm32h7rs))] pclk4: Some(apb4), + #[cfg(stm32h7rs)] + pclk5: Some(apb5), + pclk1_tim: Some(apb1_tim), pclk2_tim: Some(apb2_tim), rtc: rtc, @@ -584,11 +659,15 @@ pub(crate) unsafe fn init(config: Config) { pll2_p: pll2.p, pll2_q: pll2.q, pll2_r: pll2.r, - #[cfg(any(rcc_h5, stm32h7))] + #[cfg(stm32h7rs)] + pll2_s: None, // TODO + #[cfg(stm32h7rs)] + pll2_t: None, // TODO + #[cfg(any(rcc_h5, stm32h7, stm32h7rs))] pll3_p: pll3.p, - #[cfg(any(rcc_h5, stm32h7))] + #[cfg(any(rcc_h5, stm32h7, stm32h7rs))] pll3_q: pll3.q, - #[cfg(any(rcc_h5, stm32h7))] + #[cfg(any(rcc_h5, stm32h7, stm32h7rs))] pll3_r: pll3.r, #[cfg(rcc_h50)] @@ -601,8 +680,14 @@ pub(crate) unsafe fn init(config: Config) { #[cfg(stm32h5)] audioclk: None, i2s_ckin: None, - #[cfg(stm32h7)] + #[cfg(any(stm32h7, stm32h7rs))] dsi_phy: None, // TODO + #[cfg(stm32h7rs)] + spdifrx_symb: None, // TODO + #[cfg(stm32h7rs)] + clk48mohci: None, // TODO + #[cfg(stm32h7rs)] + usb: None, // TODO ); } @@ -627,7 +712,7 @@ fn init_pll(num: usize, config: Option, input: &PllInput) -> PllOutput { while RCC.cr().read().pllrdy(num) {} // "To save power when PLL1 is not used, the value of PLL1M must be set to 0."" - #[cfg(stm32h7)] + #[cfg(any(stm32h7, stm32h7rs))] RCC.pllckselr().write(|w| w.set_divm(num, PllPreDiv::from_bits(0))); #[cfg(stm32h5)] RCC.pllcfgr(num).write(|w| w.set_divm(PllPreDiv::from_bits(0))); @@ -696,7 +781,7 @@ fn init_pll(num: usize, config: Option, input: &PllInput) -> PllOutput { w.set_pllren(r.is_some()); }); - #[cfg(stm32h7)] + #[cfg(any(stm32h7, stm32h7rs))] { RCC.pllckselr().modify(|w| { w.set_divm(num, config.prediv); @@ -850,6 +935,26 @@ fn flash_setup(clk: Hertz, vos: VoltageScale) { (VoltageScale::Scale3, ..=88) => (3, 1), _ => unreachable!(), }; + #[cfg(flash_h7rs)] + let (latency, wrhighfreq) = match (vos, clk.0) { + // VOS high range VCORE 1.30V - 1.40V + (VoltageScale::HIGH, ..=40_000_000) => (0, 0), + (VoltageScale::HIGH, ..=80_000_000) => (1, 0), + (VoltageScale::HIGH, ..=120_000_000) => (2, 1), + (VoltageScale::HIGH, ..=160_000_000) => (3, 1), + (VoltageScale::HIGH, ..=200_000_000) => (4, 2), + (VoltageScale::HIGH, ..=240_000_000) => (5, 2), + (VoltageScale::HIGH, ..=280_000_000) => (6, 3), + (VoltageScale::HIGH, ..=320_000_000) => (7, 3), + // VOS low range VCORE 1.15V - 1.26V + (VoltageScale::LOW, ..=36_000_000) => (0, 0), + (VoltageScale::LOW, ..=72_000_000) => (1, 0), + (VoltageScale::LOW, ..=108_000_000) => (2, 1), + (VoltageScale::LOW, ..=144_000_000) => (3, 1), + (VoltageScale::LOW, ..=180_000_000) => (4, 2), + (VoltageScale::LOW, ..=216_000_000) => (5, 2), + _ => unreachable!(), + }; debug!("flash: latency={} wrhighfreq={}", latency, wrhighfreq); diff --git a/embassy-stm32/src/rcc/hsi48.rs b/embassy-stm32/src/rcc/hsi48.rs index 6f0d7b379..da81abc34 100644 --- a/embassy-stm32/src/rcc/hsi48.rs +++ b/embassy-stm32/src/rcc/hsi48.rs @@ -33,9 +33,9 @@ pub(crate) fn init_hsi48(config: Hsi48Config) -> Hertz { }); // Enable HSI48 - #[cfg(not(any(stm32u5, stm32g0, stm32h5, stm32h7, stm32u5, stm32wba, stm32f0)))] + #[cfg(not(any(stm32u5, stm32g0, stm32h5, stm32h7, stm32h7rs, stm32u5, stm32wba, stm32f0)))] let r = RCC.crrcr(); - #[cfg(any(stm32u5, stm32g0, stm32h5, stm32h7, stm32u5, stm32wba))] + #[cfg(any(stm32u5, stm32g0, stm32h5, stm32h7, stm32h7rs, stm32u5, stm32wba))] let r = RCC.cr(); #[cfg(any(stm32f0))] let r = RCC.cr2(); diff --git a/embassy-stm32/src/rcc/mco.rs b/embassy-stm32/src/rcc/mco.rs index 4b22a099d..40e963466 100644 --- a/embassy-stm32/src/rcc/mco.rs +++ b/embassy-stm32/src/rcc/mco.rs @@ -5,9 +5,31 @@ use embassy_hal_internal::into_ref; use crate::gpio::{AFType, Speed}; #[cfg(not(any(stm32f1, rcc_f0v1, rcc_f3v1, rcc_f37)))] pub use crate::pac::rcc::vals::Mcopre as McoPrescaler; -#[cfg(not(any(rcc_f2, rcc_f410, rcc_f4, rcc_f7, rcc_h50, rcc_h5, rcc_h7ab, rcc_h7rm0433, rcc_h7)))] +#[cfg(not(any( + rcc_f2, + rcc_f410, + rcc_f4, + rcc_f7, + rcc_h50, + rcc_h5, + rcc_h7ab, + rcc_h7rm0433, + rcc_h7, + rcc_h7rs +)))] pub use crate::pac::rcc::vals::Mcosel as McoSource; -#[cfg(any(rcc_f2, rcc_f410, rcc_f4, rcc_f7, rcc_h50, rcc_h5, rcc_h7ab, rcc_h7rm0433, rcc_h7))] +#[cfg(any( + rcc_f2, + rcc_f410, + rcc_f4, + rcc_f7, + rcc_h50, + rcc_h5, + rcc_h7ab, + rcc_h7rm0433, + rcc_h7, + rcc_h7rs +))] pub use crate::pac::rcc::vals::{Mco1sel as Mco1Source, Mco2sel as Mco2Source}; use crate::pac::RCC; use crate::{peripherals, Peripheral}; diff --git a/embassy-stm32/src/rcc/mod.rs b/embassy-stm32/src/rcc/mod.rs index a4e497fe7..a585940bc 100644 --- a/embassy-stm32/src/rcc/mod.rs +++ b/embassy-stm32/src/rcc/mod.rs @@ -24,7 +24,7 @@ pub use hsi48::*; #[cfg_attr(stm32c0, path = "c0.rs")] #[cfg_attr(stm32g0, path = "g0.rs")] #[cfg_attr(stm32g4, path = "g4.rs")] -#[cfg_attr(any(stm32h5, stm32h7), path = "h.rs")] +#[cfg_attr(any(stm32h5, stm32h7, stm32h7rs), path = "h.rs")] #[cfg_attr(any(stm32l0, stm32l1, stm32l4, stm32l5, stm32wb, stm32wl, stm32u0), path = "l.rs")] #[cfg_attr(stm32u5, path = "u5.rs")] #[cfg_attr(stm32wba, path = "wba.rs")] diff --git a/embassy-stm32/src/ucpd.rs b/embassy-stm32/src/ucpd.rs index fe614b811..63412f9b7 100644 --- a/embassy-stm32/src/ucpd.rs +++ b/embassy-stm32/src/ucpd.rs @@ -58,7 +58,7 @@ pub(crate) fn init( }) } - #[cfg(any(stm32h5, stm32u5))] + #[cfg(any(stm32h5, stm32u5, stm32h7rs))] { crate::pac::PWR.ucpdr().modify(|w| { w.set_ucpd_dbdis(!ucpd1_db_enable); diff --git a/embassy-stm32/src/usb/otg.rs b/embassy-stm32/src/usb/otg.rs index 5d0e1116e..3debd5079 100644 --- a/embassy-stm32/src/usb/otg.rs +++ b/embassy-stm32/src/usb/otg.rs @@ -371,7 +371,7 @@ foreach_interrupt!( } else if #[cfg(stm32g0x1)] { const FIFO_DEPTH_WORDS: u16 = 512; const ENDPOINT_COUNT: usize = 8; - } else if #[cfg(stm32h7)] { + } else if #[cfg(any(stm32h7, stm32h7rs))] { const FIFO_DEPTH_WORDS: u16 = 1024; const ENDPOINT_COUNT: usize = 9; } else if #[cfg(stm32u5)] { @@ -420,7 +420,7 @@ foreach_interrupt!( stm32f469, stm32f479, stm32f7, - stm32h7, + stm32h7, stm32h7rs, ))] { const FIFO_DEPTH_WORDS: u16 = 1024; const ENDPOINT_COUNT: usize = 9; diff --git a/examples/stm32h7rs/.cargo/config.toml b/examples/stm32h7rs/.cargo/config.toml new file mode 100644 index 000000000..44dbda94f --- /dev/null +++ b/examples/stm32h7rs/.cargo/config.toml @@ -0,0 +1,8 @@ +[target.thumbv7em-none-eabihf] +runner = 'probe-rs run --chip STM32H7S3L8Hx' + +[build] +target = "thumbv7em-none-eabihf" # Cortex-M4F and Cortex-M7F (with FPU) + +[env] +DEFMT_LOG = "trace" diff --git a/examples/stm32h7rs/Cargo.toml b/examples/stm32h7rs/Cargo.toml new file mode 100644 index 000000000..ad661411d --- /dev/null +++ b/examples/stm32h7rs/Cargo.toml @@ -0,0 +1,73 @@ +[package] +edition = "2021" +name = "embassy-stm32h7-examples" +version = "0.1.0" +license = "MIT OR Apache-2.0" + +[dependencies] +# Change stm32h743bi to your chip name, if necessary. +embassy-stm32 = { version = "0.1.0", path = "../../embassy-stm32", features = ["defmt", "stm32h7s3l8", "time-driver-tim2", "exti", "memory-x", "unstable-pac", "chrono"] } +embassy-sync = { version = "0.5.0", path = "../../embassy-sync", features = ["defmt"] } +embassy-executor = { version = "0.5.0", path = "../../embassy-executor", features = ["task-arena-size-32768", "arch-cortex-m", "executor-thread", "executor-interrupt", "defmt", "integrated-timers"] } +embassy-time = { version = "0.3.0", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime", "tick-hz-32_768"] } +embassy-net = { version = "0.4.0", path = "../../embassy-net", features = ["defmt", "tcp", "dhcpv4", "medium-ethernet", "proto-ipv6", "dns"] } +embassy-usb = { version = "0.2.0", path = "../../embassy-usb", features = ["defmt"] } +embassy-futures = { version = "0.1.0", path = "../../embassy-futures" } + +defmt = "0.3" +defmt-rtt = "0.4" + +cortex-m = { version = "0.7.6", features = ["inline-asm", "critical-section-single-core"] } +cortex-m-rt = "0.7.0" +embedded-hal = "0.2.6" +embedded-hal-1 = { package = "embedded-hal", version = "1.0" } +embedded-hal-async = { version = "1.0" } +embedded-nal-async = { version = "0.7.1" } +embedded-io-async = { version = "0.6.1" } +panic-probe = { version = "0.3", features = ["print-defmt"] } +heapless = { version = "0.8", default-features = false } +rand_core = "0.6.3" +critical-section = "1.1" +micromath = "2.0.0" +stm32-fmc = "0.3.0" +embedded-storage = "0.3.1" +static_cell = "2" +chrono = { version = "^0.4", default-features = false } + +# cargo build/run +[profile.dev] +codegen-units = 1 +debug = 2 +debug-assertions = true # <- +incremental = false +opt-level = 3 # <- +overflow-checks = true # <- + +# cargo test +[profile.test] +codegen-units = 1 +debug = 2 +debug-assertions = true # <- +incremental = false +opt-level = 3 # <- +overflow-checks = true # <- + +# cargo build/run --release +[profile.release] +codegen-units = 1 +debug = 2 +debug-assertions = false # <- +incremental = false +lto = 'fat' +opt-level = 3 # <- +overflow-checks = false # <- + +# cargo test --release +[profile.bench] +codegen-units = 1 +debug = 2 +debug-assertions = false # <- +incremental = false +lto = 'fat' +opt-level = 3 # <- +overflow-checks = false # <- diff --git a/examples/stm32h7rs/build.rs b/examples/stm32h7rs/build.rs new file mode 100644 index 000000000..8cd32d7ed --- /dev/null +++ b/examples/stm32h7rs/build.rs @@ -0,0 +1,5 @@ +fn main() { + println!("cargo:rustc-link-arg-bins=--nmagic"); + println!("cargo:rustc-link-arg-bins=-Tlink.x"); + println!("cargo:rustc-link-arg-bins=-Tdefmt.x"); +} diff --git a/examples/stm32h7rs/src/bin/blinky.rs b/examples/stm32h7rs/src/bin/blinky.rs new file mode 100644 index 000000000..137c585b7 --- /dev/null +++ b/examples/stm32h7rs/src/bin/blinky.rs @@ -0,0 +1,51 @@ +#![no_std] +#![no_main] + +use defmt::*; +use embassy_executor::Spawner; +use embassy_stm32::gpio::{Level, Output, Speed}; +use embassy_stm32::time::Hertz; +use embassy_stm32::Config; +use embassy_time::Timer; +use {defmt_rtt as _, panic_probe as _}; + +#[embassy_executor::main] +async fn main(_spawner: Spawner) { + let mut config = Config::default(); + { + use embassy_stm32::rcc::*; + config.rcc.hse = Some(Hse { + freq: Hertz(24_000_000), + mode: HseMode::Oscillator, + }); + config.rcc.pll1 = Some(Pll { + source: PllSource::HSE, + prediv: PllPreDiv::DIV3, + mul: PllMul::MUL150, + divp: Some(PllDiv::DIV2), + divq: None, + divr: None, + }); + config.rcc.sys = Sysclk::PLL1_P; // 600 Mhz + config.rcc.ahb_pre = AHBPrescaler::DIV2; // 300 Mhz + config.rcc.apb1_pre = APBPrescaler::DIV2; // 150 Mhz + config.rcc.apb2_pre = APBPrescaler::DIV2; // 150 Mhz + config.rcc.apb4_pre = APBPrescaler::DIV2; // 150 Mhz + config.rcc.apb5_pre = APBPrescaler::DIV2; // 150 Mhz + config.rcc.voltage_scale = VoltageScale::HIGH; + } + let p = embassy_stm32::init(config); + info!("Hello World!"); + + let mut led = Output::new(p.PD10, Level::High, Speed::Low); + + loop { + info!("high"); + led.set_high(); + Timer::after_millis(500).await; + + info!("low"); + led.set_low(); + Timer::after_millis(500).await; + } +} diff --git a/examples/stm32h7rs/src/bin/button_exti.rs b/examples/stm32h7rs/src/bin/button_exti.rs new file mode 100644 index 000000000..34a08bbc6 --- /dev/null +++ b/examples/stm32h7rs/src/bin/button_exti.rs @@ -0,0 +1,25 @@ +#![no_std] +#![no_main] + +use defmt::*; +use embassy_executor::Spawner; +use embassy_stm32::exti::ExtiInput; +use embassy_stm32::gpio::Pull; +use {defmt_rtt as _, panic_probe as _}; + +#[embassy_executor::main] +async fn main(_spawner: Spawner) { + let p = embassy_stm32::init(Default::default()); + info!("Hello World!"); + + let mut button = ExtiInput::new(p.PC13, p.EXTI13, Pull::Up); + + info!("Press the USER button..."); + + loop { + button.wait_for_falling_edge().await; + info!("Pressed!"); + button.wait_for_rising_edge().await; + info!("Released!"); + } +} diff --git a/examples/stm32h7rs/src/bin/can.rs b/examples/stm32h7rs/src/bin/can.rs new file mode 100644 index 000000000..0af11ef3e --- /dev/null +++ b/examples/stm32h7rs/src/bin/can.rs @@ -0,0 +1,98 @@ +#![no_std] +#![no_main] + +use defmt::*; +use embassy_executor::Spawner; +use embassy_stm32::peripherals::*; +use embassy_stm32::{bind_interrupts, can, rcc, Config}; +use embassy_time::Timer; +use {defmt_rtt as _, panic_probe as _}; + +bind_interrupts!(struct Irqs { + FDCAN1_IT0 => can::IT0InterruptHandler; + FDCAN1_IT1 => can::IT1InterruptHandler; +}); + +#[embassy_executor::main] +async fn main(_spawner: Spawner) { + let mut config = Config::default(); + config.rcc.hse = Some(rcc::Hse { + freq: embassy_stm32::time::Hertz(25_000_000), + mode: rcc::HseMode::Oscillator, + }); + config.rcc.mux.fdcansel = rcc::mux::Fdcansel::HSE; + + let peripherals = embassy_stm32::init(config); + + let mut can = can::CanConfigurator::new(peripherals.FDCAN1, peripherals.PA11, peripherals.PA12, Irqs); + + // 250k bps + can.set_bitrate(250_000); + + //let mut can = can.into_internal_loopback_mode(); + let mut can = can.into_normal_mode(); + + info!("CAN Configured"); + + let mut i = 0; + let mut last_read_ts = embassy_time::Instant::now(); + + loop { + let frame = can::frame::Frame::new_extended(0x123456F, &[i; 8]).unwrap(); + info!("Writing frame"); + _ = can.write(&frame).await; + + match can.read().await { + Ok(envelope) => { + let (rx_frame, ts) = envelope.parts(); + let delta = (ts - last_read_ts).as_millis(); + last_read_ts = ts; + info!( + "Rx: {:x} {:x} {:x} {:x} --- NEW {}", + rx_frame.data()[0], + rx_frame.data()[1], + rx_frame.data()[2], + rx_frame.data()[3], + delta, + ) + } + Err(_err) => error!("Error in frame"), + } + + Timer::after_millis(250).await; + + i += 1; + if i > 3 { + break; + } + } + + let (mut tx, mut rx, _props) = can.split(); + // With split + loop { + let frame = can::frame::Frame::new_extended(0x123456F, &[i; 8]).unwrap(); + info!("Writing frame"); + _ = tx.write(&frame).await; + + match rx.read().await { + Ok(envelope) => { + let (rx_frame, ts) = envelope.parts(); + let delta = (ts - last_read_ts).as_millis(); + last_read_ts = ts; + info!( + "Rx: {:x} {:x} {:x} {:x} --- NEW {}", + rx_frame.data()[0], + rx_frame.data()[1], + rx_frame.data()[2], + rx_frame.data()[3], + delta, + ) + } + Err(_err) => error!("Error in frame"), + } + + Timer::after_millis(250).await; + + i = i.wrapping_add(1); + } +} diff --git a/examples/stm32h7rs/src/bin/mco.rs b/examples/stm32h7rs/src/bin/mco.rs new file mode 100644 index 000000000..a6ee27625 --- /dev/null +++ b/examples/stm32h7rs/src/bin/mco.rs @@ -0,0 +1,29 @@ +#![no_std] +#![no_main] + +use defmt::*; +use embassy_executor::Spawner; +use embassy_stm32::gpio::{Level, Output, Speed}; +use embassy_stm32::rcc::{Mco, Mco1Source, McoPrescaler}; +use embassy_time::Timer; +use {defmt_rtt as _, panic_probe as _}; + +#[embassy_executor::main] +async fn main(_spawner: Spawner) { + let p = embassy_stm32::init(Default::default()); + info!("Hello World!"); + + let mut led = Output::new(p.PB14, Level::High, Speed::Low); + + let _mco = Mco::new(p.MCO1, p.PA8, Mco1Source::HSI, McoPrescaler::DIV8); + + loop { + info!("high"); + led.set_high(); + Timer::after_millis(500).await; + + info!("low"); + led.set_low(); + Timer::after_millis(500).await; + } +} diff --git a/examples/stm32h7rs/src/bin/multiprio.rs b/examples/stm32h7rs/src/bin/multiprio.rs new file mode 100644 index 000000000..fcbb6c653 --- /dev/null +++ b/examples/stm32h7rs/src/bin/multiprio.rs @@ -0,0 +1,150 @@ +//! This example showcases how to create multiple Executor instances to run tasks at +//! different priority levels. +//! +//! Low priority executor runs in thread mode (not interrupt), and uses `sev` for signaling +//! there's work in the queue, and `wfe` for waiting for work. +//! +//! Medium and high priority executors run in two interrupts with different priorities. +//! Signaling work is done by pending the interrupt. No "waiting" needs to be done explicitly, since +//! when there's work the interrupt will trigger and run the executor. +//! +//! Sample output below. Note that high priority ticks can interrupt everything else, and +//! medium priority computations can interrupt low priority computations, making them to appear +//! to take significantly longer time. +//! +//! ```not_rust +//! [med] Starting long computation +//! [med] done in 992 ms +//! [high] tick! +//! [low] Starting long computation +//! [med] Starting long computation +//! [high] tick! +//! [high] tick! +//! [med] done in 993 ms +//! [med] Starting long computation +//! [high] tick! +//! [high] tick! +//! [med] done in 993 ms +//! [low] done in 3972 ms +//! [med] Starting long computation +//! [high] tick! +//! [high] tick! +//! [med] done in 993 ms +//! ``` +//! +//! For comparison, try changing the code so all 3 tasks get spawned on the low priority executor. +//! You will get an output like the following. Note that no computation is ever interrupted. +//! +//! ```not_rust +//! [high] tick! +//! [med] Starting long computation +//! [med] done in 496 ms +//! [low] Starting long computation +//! [low] done in 992 ms +//! [med] Starting long computation +//! [med] done in 496 ms +//! [high] tick! +//! [low] Starting long computation +//! [low] done in 992 ms +//! [high] tick! +//! [med] Starting long computation +//! [med] done in 496 ms +//! [high] tick! +//! ``` +//! + +#![no_std] +#![no_main] + +use cortex_m_rt::entry; +use defmt::*; +use embassy_executor::{Executor, InterruptExecutor}; +use embassy_stm32::interrupt; +use embassy_stm32::interrupt::{InterruptExt, Priority}; +use embassy_time::{Instant, Timer}; +use static_cell::StaticCell; +use {defmt_rtt as _, panic_probe as _}; + +#[embassy_executor::task] +async fn run_high() { + loop { + info!(" [high] tick!"); + Timer::after_ticks(27374).await; + } +} + +#[embassy_executor::task] +async fn run_med() { + loop { + let start = Instant::now(); + info!(" [med] Starting long computation"); + + // Spin-wait to simulate a long CPU computation + cortex_m::asm::delay(128_000_000); // ~1 second + + let end = Instant::now(); + let ms = end.duration_since(start).as_ticks() / 33; + info!(" [med] done in {} ms", ms); + + Timer::after_ticks(23421).await; + } +} + +#[embassy_executor::task] +async fn run_low() { + loop { + let start = Instant::now(); + info!("[low] Starting long computation"); + + // Spin-wait to simulate a long CPU computation + cortex_m::asm::delay(256_000_000); // ~2 seconds + + let end = Instant::now(); + let ms = end.duration_since(start).as_ticks() / 33; + info!("[low] done in {} ms", ms); + + Timer::after_ticks(32983).await; + } +} + +static EXECUTOR_HIGH: InterruptExecutor = InterruptExecutor::new(); +static EXECUTOR_MED: InterruptExecutor = InterruptExecutor::new(); +static EXECUTOR_LOW: StaticCell = StaticCell::new(); + +#[interrupt] +unsafe fn UART4() { + EXECUTOR_HIGH.on_interrupt() +} + +#[interrupt] +unsafe fn UART5() { + EXECUTOR_MED.on_interrupt() +} + +#[entry] +fn main() -> ! { + info!("Hello World!"); + + let _p = embassy_stm32::init(Default::default()); + + // STM32s don’t have any interrupts exclusively for software use, but they can all be triggered by software as well as + // by the peripheral, so we can just use any free interrupt vectors which aren’t used by the rest of your application. + // In this case we’re using UART4 and UART5, but there’s nothing special about them. Any otherwise unused interrupt + // vector would work exactly the same. + + // High-priority executor: UART4, priority level 6 + interrupt::UART4.set_priority(Priority::P6); + let spawner = EXECUTOR_HIGH.start(interrupt::UART4); + unwrap!(spawner.spawn(run_high())); + + // Medium-priority executor: UART5, priority level 7 + interrupt::UART5.set_priority(Priority::P7); + let spawner = EXECUTOR_MED.start(interrupt::UART5); + unwrap!(spawner.spawn(run_med())); + + // Low priority executor: runs in thread mode, using WFE/SEV + let executor = EXECUTOR_LOW.init(Executor::new()); + executor.run(|spawner| { + unwrap!(spawner.spawn(run_low())); + }); +} diff --git a/examples/stm32h7rs/src/bin/rng.rs b/examples/stm32h7rs/src/bin/rng.rs new file mode 100644 index 000000000..a9ef7200d --- /dev/null +++ b/examples/stm32h7rs/src/bin/rng.rs @@ -0,0 +1,26 @@ +#![no_std] +#![no_main] + +use defmt::*; +use embassy_executor::Spawner; +use embassy_stm32::rng::Rng; +use embassy_stm32::{bind_interrupts, peripherals, rng, Config}; +use {defmt_rtt as _, panic_probe as _}; + +bind_interrupts!(struct Irqs { + RNG => rng::InterruptHandler; +}); + +#[embassy_executor::main] +async fn main(_spawner: Spawner) { + let mut config = Config::default(); + config.rcc.hsi48 = Some(Default::default()); // needed for RNG + let p = embassy_stm32::init(config); + info!("Hello World!"); + + let mut rng = Rng::new(p.RNG, Irqs); + + let mut buf = [0u8; 16]; + unwrap!(rng.async_fill_bytes(&mut buf).await); + info!("random bytes: {:02x}", buf); +} diff --git a/examples/stm32h7rs/src/bin/rtc.rs b/examples/stm32h7rs/src/bin/rtc.rs new file mode 100644 index 000000000..0adb48877 --- /dev/null +++ b/examples/stm32h7rs/src/bin/rtc.rs @@ -0,0 +1,36 @@ +#![no_std] +#![no_main] + +use chrono::{NaiveDate, NaiveDateTime}; +use defmt::*; +use embassy_executor::Spawner; +use embassy_stm32::rcc::LsConfig; +use embassy_stm32::rtc::{Rtc, RtcConfig}; +use embassy_stm32::Config; +use embassy_time::Timer; +use {defmt_rtt as _, panic_probe as _}; + +#[embassy_executor::main] +async fn main(_spawner: Spawner) { + let mut config = Config::default(); + config.rcc.ls = LsConfig::default_lse(); + + let p = embassy_stm32::init(config); + info!("Hello World!"); + + let now = NaiveDate::from_ymd_opt(2020, 5, 15) + .unwrap() + .and_hms_opt(10, 30, 15) + .unwrap(); + + let mut rtc = Rtc::new(p.RTC, RtcConfig::default()); + info!("Got RTC! {:?}", now.and_utc().timestamp()); + + rtc.set_datetime(now.into()).expect("datetime not set"); + + // In reality the delay would be much longer + Timer::after_millis(20000).await; + + let then: NaiveDateTime = rtc.now().unwrap().into(); + info!("Got RTC! {:?}", then.and_utc().timestamp()); +} diff --git a/examples/stm32h7rs/src/bin/signal.rs b/examples/stm32h7rs/src/bin/signal.rs new file mode 100644 index 000000000..b73360f32 --- /dev/null +++ b/examples/stm32h7rs/src/bin/signal.rs @@ -0,0 +1,36 @@ +#![no_std] +#![no_main] + +use defmt::{info, unwrap}; +use embassy_executor::Spawner; +use embassy_sync::blocking_mutex::raw::CriticalSectionRawMutex; +use embassy_sync::signal::Signal; +use embassy_time::Timer; +use {defmt_rtt as _, panic_probe as _}; + +static SIGNAL: Signal = Signal::new(); + +#[embassy_executor::task] +async fn my_sending_task() { + let mut counter: u32 = 0; + + loop { + Timer::after_secs(1).await; + + SIGNAL.signal(counter); + + counter = counter.wrapping_add(1); + } +} + +#[embassy_executor::main] +async fn main(spawner: Spawner) { + let _p = embassy_stm32::init(Default::default()); + unwrap!(spawner.spawn(my_sending_task())); + + loop { + let received_counter = SIGNAL.wait().await; + + info!("signalled, counter: {}", received_counter); + } +} diff --git a/examples/stm32h7rs/src/bin/spi.rs b/examples/stm32h7rs/src/bin/spi.rs new file mode 100644 index 000000000..a7767876d --- /dev/null +++ b/examples/stm32h7rs/src/bin/spi.rs @@ -0,0 +1,50 @@ +#![no_std] +#![no_main] + +use core::fmt::Write; +use core::str::from_utf8; + +use cortex_m_rt::entry; +use defmt::*; +use embassy_executor::Executor; +use embassy_stm32::mode::Blocking; +use embassy_stm32::peripherals::SPI3; +use embassy_stm32::spi; +use embassy_stm32::time::mhz; +use heapless::String; +use static_cell::StaticCell; +use {defmt_rtt as _, panic_probe as _}; + +#[embassy_executor::task] +async fn main_task(mut spi: spi::Spi<'static, SPI3, Blocking>) { + for n in 0u32.. { + let mut write: String<128> = String::new(); + core::write!(&mut write, "Hello DMA World {}!\r\n", n).unwrap(); + unsafe { + let result = spi.blocking_transfer_in_place(write.as_bytes_mut()); + if let Err(_) = result { + defmt::panic!("crap"); + } + } + info!("read via spi: {}", from_utf8(write.as_bytes()).unwrap()); + } +} + +static EXECUTOR: StaticCell = StaticCell::new(); + +#[entry] +fn main() -> ! { + info!("Hello World!"); + let p = embassy_stm32::init(Default::default()); + + let mut spi_config = spi::Config::default(); + spi_config.frequency = mhz(1); + + let spi = spi::Spi::new_blocking(p.SPI3, p.PB3, p.PB5, p.PB4, spi_config); + + let executor = EXECUTOR.init(Executor::new()); + + executor.run(|spawner| { + unwrap!(spawner.spawn(main_task(spi))); + }) +} diff --git a/examples/stm32h7rs/src/bin/spi_dma.rs b/examples/stm32h7rs/src/bin/spi_dma.rs new file mode 100644 index 000000000..26b5d6751 --- /dev/null +++ b/examples/stm32h7rs/src/bin/spi_dma.rs @@ -0,0 +1,46 @@ +#![no_std] +#![no_main] + +use core::fmt::Write; +use core::str::from_utf8; + +use cortex_m_rt::entry; +use defmt::*; +use embassy_executor::Executor; +use embassy_stm32::mode::Async; +use embassy_stm32::time::mhz; +use embassy_stm32::{peripherals, spi}; +use heapless::String; +use static_cell::StaticCell; +use {defmt_rtt as _, panic_probe as _}; + +#[embassy_executor::task] +async fn main_task(mut spi: spi::Spi<'static, peripherals::SPI3, Async>) { + for n in 0u32.. { + let mut write: String<128> = String::new(); + let mut read = [0; 128]; + core::write!(&mut write, "Hello DMA World {}!\r\n", n).unwrap(); + // transfer will slice the &mut read down to &write's actual length. + spi.transfer(&mut read, write.as_bytes()).await.ok(); + info!("read via spi+dma: {}", from_utf8(&read).unwrap()); + } +} + +static EXECUTOR: StaticCell = StaticCell::new(); + +#[entry] +fn main() -> ! { + info!("Hello World!"); + let p = embassy_stm32::init(Default::default()); + + let mut spi_config = spi::Config::default(); + spi_config.frequency = mhz(1); + + let spi = spi::Spi::new(p.SPI3, p.PB3, p.PB5, p.PB4, p.GPDMA1_CH0, p.GPDMA1_CH1, spi_config); + + let executor = EXECUTOR.init(Executor::new()); + + executor.run(|spawner| { + unwrap!(spawner.spawn(main_task(spi))); + }) +} diff --git a/examples/stm32h7rs/src/bin/usart.rs b/examples/stm32h7rs/src/bin/usart.rs new file mode 100644 index 000000000..cc49c2fdb --- /dev/null +++ b/examples/stm32h7rs/src/bin/usart.rs @@ -0,0 +1,39 @@ +#![no_std] +#![no_main] + +use cortex_m_rt::entry; +use defmt::*; +use embassy_executor::Executor; +use embassy_stm32::usart::{Config, Uart}; +use static_cell::StaticCell; +use {defmt_rtt as _, panic_probe as _}; + +#[embassy_executor::task] +async fn main_task() { + let p = embassy_stm32::init(Default::default()); + + let config = Config::default(); + let mut usart = Uart::new_blocking(p.UART7, p.PF6, p.PF7, config).unwrap(); + + unwrap!(usart.blocking_write(b"Hello Embassy World!\r\n")); + info!("wrote Hello, starting echo"); + + let mut buf = [0u8; 1]; + loop { + unwrap!(usart.blocking_read(&mut buf)); + unwrap!(usart.blocking_write(&buf)); + } +} + +static EXECUTOR: StaticCell = StaticCell::new(); + +#[entry] +fn main() -> ! { + info!("Hello World!"); + + let executor = EXECUTOR.init(Executor::new()); + + executor.run(|spawner| { + unwrap!(spawner.spawn(main_task())); + }) +} diff --git a/examples/stm32h7rs/src/bin/usart_dma.rs b/examples/stm32h7rs/src/bin/usart_dma.rs new file mode 100644 index 000000000..c644e84bd --- /dev/null +++ b/examples/stm32h7rs/src/bin/usart_dma.rs @@ -0,0 +1,47 @@ +#![no_std] +#![no_main] + +use core::fmt::Write; + +use cortex_m_rt::entry; +use defmt::*; +use embassy_executor::Executor; +use embassy_stm32::usart::{Config, Uart}; +use embassy_stm32::{bind_interrupts, peripherals, usart}; +use heapless::String; +use static_cell::StaticCell; +use {defmt_rtt as _, panic_probe as _}; + +bind_interrupts!(struct Irqs { + UART7 => usart::InterruptHandler; +}); + +#[embassy_executor::task] +async fn main_task() { + let p = embassy_stm32::init(Default::default()); + + let config = Config::default(); + let mut usart = Uart::new(p.UART7, p.PF6, p.PF7, Irqs, p.GPDMA1_CH0, p.GPDMA1_CH1, config).unwrap(); + + for n in 0u32.. { + let mut s: String<128> = String::new(); + core::write!(&mut s, "Hello DMA World {}!\r\n", n).unwrap(); + + usart.write(s.as_bytes()).await.ok(); + + info!("wrote DMA"); + } +} + +static EXECUTOR: StaticCell = StaticCell::new(); + +#[entry] +fn main() -> ! { + info!("Hello World!"); + + let executor = EXECUTOR.init(Executor::new()); + + executor.run(|spawner| { + unwrap!(spawner.spawn(main_task())); + }) +} diff --git a/examples/stm32h7rs/src/bin/usart_split.rs b/examples/stm32h7rs/src/bin/usart_split.rs new file mode 100644 index 000000000..77b4caa9e --- /dev/null +++ b/examples/stm32h7rs/src/bin/usart_split.rs @@ -0,0 +1,48 @@ +#![no_std] +#![no_main] + +use defmt::*; +use embassy_executor::Spawner; +use embassy_stm32::mode::Async; +use embassy_stm32::peripherals::UART7; +use embassy_stm32::usart::{Config, Uart, UartRx}; +use embassy_stm32::{bind_interrupts, peripherals, usart}; +use embassy_sync::blocking_mutex::raw::ThreadModeRawMutex; +use embassy_sync::channel::Channel; +use {defmt_rtt as _, panic_probe as _}; + +bind_interrupts!(struct Irqs { + UART7 => usart::InterruptHandler; +}); + +static CHANNEL: Channel = Channel::new(); + +#[embassy_executor::main] +async fn main(spawner: Spawner) -> ! { + let p = embassy_stm32::init(Default::default()); + info!("Hello World!"); + + let config = Config::default(); + let mut usart = Uart::new(p.UART7, p.PF6, p.PF7, Irqs, p.GPDMA1_CH0, p.GPDMA1_CH1, config).unwrap(); + unwrap!(usart.blocking_write(b"Type 8 chars to echo!\r\n")); + + let (mut tx, rx) = usart.split(); + + unwrap!(spawner.spawn(reader(rx))); + + loop { + let buf = CHANNEL.receive().await; + info!("writing..."); + unwrap!(tx.write(&buf).await); + } +} + +#[embassy_executor::task] +async fn reader(mut rx: UartRx<'static, UART7, Async>) { + let mut buf = [0; 8]; + loop { + info!("reading..."); + unwrap!(rx.read(&mut buf).await); + CHANNEL.send(buf).await; + } +} diff --git a/tests/stm32/.cargo/config.toml b/tests/stm32/.cargo/config.toml index 528bd3451..8752da59b 100644 --- a/tests/stm32/.cargo/config.toml +++ b/tests/stm32/.cargo/config.toml @@ -4,7 +4,7 @@ [target.'cfg(all(target_arch = "arm", target_os = "none"))'] runner = "teleprobe client run" -#runner = "teleprobe local run --chip STM32F103C8 --elf" +#runner = "teleprobe local run --chip STM32H7S3L8Hx --elf" rustflags = [ # Code-size optimizations. diff --git a/tests/stm32/Cargo.toml b/tests/stm32/Cargo.toml index 30669b88c..6afa2a68e 100644 --- a/tests/stm32/Cargo.toml +++ b/tests/stm32/Cargo.toml @@ -32,6 +32,7 @@ stm32wba52cg = ["embassy-stm32/stm32wba52cg", "chrono", "rng", "hash"] stm32wl55jc = ["embassy-stm32/stm32wl55jc-cm4", "not-gpdma", "rng", "chrono"] stm32f091rc = ["embassy-stm32/stm32f091rc", "cm0", "not-gpdma", "chrono"] stm32h503rb = ["embassy-stm32/stm32h503rb", "rng", "stop"] +stm32h7s3l8 = ["embassy-stm32/stm32h7s3l8", "rng", "cordic", "hash"] # TODO: fdcan crashes, cryp dma hangs. cryp = [] hash = [] diff --git a/tests/stm32/src/bin/cordic.rs b/tests/stm32/src/bin/cordic.rs index 400e10207..e09226de8 100644 --- a/tests/stm32/src/bin/cordic.rs +++ b/tests/stm32/src/bin/cordic.rs @@ -67,7 +67,12 @@ async fn main(_spawner: Spawner) { #[cfg(feature = "stm32g491re")] let (mut write_dma, mut read_dma) = (dp.DMA1_CH4, dp.DMA1_CH5); - #[cfg(any(feature = "stm32h563zi", feature = "stm32u585ai", feature = "stm32u5a5zj"))] + #[cfg(any( + feature = "stm32h563zi", + feature = "stm32u585ai", + feature = "stm32u5a5zj", + feature = "stm32h7s3l8" + ))] let (mut write_dma, mut read_dma) = (dp.GPDMA1_CH0, dp.GPDMA1_CH1); // calculate first result using blocking mode diff --git a/tests/stm32/src/bin/fdcan.rs b/tests/stm32/src/bin/fdcan.rs index b0c0cd82e..20bd3f7e3 100644 --- a/tests/stm32/src/bin/fdcan.rs +++ b/tests/stm32/src/bin/fdcan.rs @@ -74,6 +74,20 @@ fn options() -> (Config, TestOptions) { ) } +#[cfg(any(feature = "stm32h7s3l8"))] +fn options() -> (Config, TestOptions) { + use embassy_stm32::rcc; + let mut c = config(); + c.rcc.mux.fdcansel = rcc::mux::Fdcansel::HSE; + ( + c, + TestOptions { + max_latency: Duration::from_micros(1200), + max_buffered: 3, + }, + ) +} + #[cfg(any(feature = "stm32g491re", feature = "stm32g431cb"))] fn options() -> (Config, TestOptions) { info!("G4 config"); diff --git a/tests/stm32/src/bin/gpio.rs b/tests/stm32/src/bin/gpio.rs index c4e2fe161..dfa299ab5 100644 --- a/tests/stm32/src/bin/gpio.rs +++ b/tests/stm32/src/bin/gpio.rs @@ -216,7 +216,12 @@ async fn main(_spawner: Spawner) { } fn delay() { - #[cfg(any(feature = "stm32h755zi", feature = "stm32h753zi", feature = "stm32h7a3zi"))] + #[cfg(any( + feature = "stm32h755zi", + feature = "stm32h753zi", + feature = "stm32h7a3zi", + feature = "stm32h7s3l8" + ))] cortex_m::asm::delay(9000); cortex_m::asm::delay(1000); } diff --git a/tests/stm32/src/bin/hash.rs b/tests/stm32/src/bin/hash.rs index 8cc5d593f..5f54ea435 100644 --- a/tests/stm32/src/bin/hash.rs +++ b/tests/stm32/src/bin/hash.rs @@ -26,7 +26,8 @@ bind_interrupts!(struct Irqs { feature = "stm32h563zi", feature = "stm32h503rb", feature = "stm32u5a5zj", - feature = "stm32u585ai" + feature = "stm32u585ai", + feature = "stm32h7s3l8" ))] bind_interrupts!(struct Irqs { HASH => hash::InterruptHandler; diff --git a/tests/stm32/src/common.rs b/tests/stm32/src/common.rs index 24d33dc3b..07c61956f 100644 --- a/tests/stm32/src/common.rs +++ b/tests/stm32/src/common.rs @@ -60,6 +60,8 @@ teleprobe_meta::target!(b"nucleo-stm32wba52cg"); teleprobe_meta::target!(b"nucleo-stm32f091rc"); #[cfg(feature = "stm32h503rb")] teleprobe_meta::target!(b"nucleo-stm32h503rb"); +#[cfg(feature = "stm32h7s3l8")] +teleprobe_meta::target!(b"nucleo-stm32h7s3l8"); macro_rules! define_peris { ($($name:ident = $peri:ident,)* $(@irq $irq_name:ident = $irq_code:tt,)*) => { @@ -249,6 +251,13 @@ define_peris!( SPI = SPI1, SPI_SCK = PB4, SPI_MOSI = PA15, SPI_MISO = PB3, SPI_TX_DMA = GPDMA1_CH0, SPI_RX_DMA = GPDMA1_CH1, @irq UART = {LPUART1 => embassy_stm32::usart::InterruptHandler;}, ); +#[cfg(feature = "stm32h7s3l8")] +define_peris!( + CRYP_IN_DMA = GPDMA1_CH0, CRYP_OUT_DMA = GPDMA1_CH1, + UART = USART1, UART_TX = PB14, UART_RX = PA10, UART_TX_DMA = GPDMA1_CH0, UART_RX_DMA = GPDMA1_CH1, + SPI = SPI1, SPI_SCK = PA5, SPI_MOSI = PB5, SPI_MISO = PA6, SPI_TX_DMA = GPDMA1_CH0, SPI_RX_DMA = GPDMA1_CH1, + @irq UART = {USART1 => embassy_stm32::usart::InterruptHandler;}, +); pub fn config() -> Config { #[allow(unused_mut)] @@ -641,6 +650,28 @@ pub fn config() -> Config { }); config.rcc.sys = Sysclk::PLL1_R; } - + #[cfg(any(feature = "stm32h7s3l8"))] + { + config.rcc.hse = Some(Hse { + freq: Hertz(24_000_000), + mode: HseMode::Oscillator, + }); + config.rcc.pll1 = Some(Pll { + source: PllSource::HSE, + prediv: PllPreDiv::DIV3, + mul: PllMul::MUL150, + divp: Some(PllDiv::DIV2), // 600Mhz + divq: Some(PllDiv::DIV25), // 48Mhz + divr: None, + }); + config.rcc.sys = Sysclk::PLL1_P; // 600 Mhz + config.rcc.ahb_pre = AHBPrescaler::DIV2; // 300 Mhz + config.rcc.apb1_pre = APBPrescaler::DIV2; // 150 Mhz + config.rcc.apb2_pre = APBPrescaler::DIV2; // 150 Mhz + config.rcc.apb4_pre = APBPrescaler::DIV2; // 150 Mhz + config.rcc.apb5_pre = APBPrescaler::DIV2; // 150 Mhz + config.rcc.voltage_scale = VoltageScale::HIGH; + config.rcc.mux.spi1sel = mux::Spi123sel::PLL1_Q; + } config } From c24805b83dbbca091eaf11a00c171da641f7107e Mon Sep 17 00:00:00 2001 From: Turbo Fredriksson Date: Mon, 29 Apr 2024 12:45:08 +0100 Subject: [PATCH 240/581] Added PIO UART examples for rp to talk to an R503 fingerprint scanner. --- examples/rp/src/bin/uart_r503.rs | 113 +++++++++++++++++++++++++++++++ 1 file changed, 113 insertions(+) create mode 100644 examples/rp/src/bin/uart_r503.rs diff --git a/examples/rp/src/bin/uart_r503.rs b/examples/rp/src/bin/uart_r503.rs new file mode 100644 index 000000000..f8a9d8a9f --- /dev/null +++ b/examples/rp/src/bin/uart_r503.rs @@ -0,0 +1,113 @@ +#![no_std] +#![no_main] + +use defmt::{debug, info, unwrap}; +use embassy_executor::Spawner; +use embassy_rp::bind_interrupts; +use embassy_rp::peripherals::UART0; +use embassy_rp::uart::{Async, Config, DataBits, InterruptHandler as UARTInterruptHandler, StopBits, Uart, UartRx}; +use embassy_time::Timer; +use heapless::Vec; +use {defmt_rtt as _, panic_probe as _}; + +bind_interrupts!(pub struct Irqs { + UART0_IRQ => UARTInterruptHandler; // Fingerprint scanner (TX) +}); + +const ADDRESS: u32 = 0xFFFFFFFF; +const START: u16 = 0xEF01; + +// ================================================================================ + +fn write_cmd_bytes(buf: &mut Vec, bytes: &[u8]) { + let _ = buf.extend_from_slice(bytes); +} + +fn compute_checksum(buf: Vec) -> u16 { + let mut checksum = 0u16; + + let check_end = buf.len(); + let checked_bytes = &buf[6..check_end]; + for byte in checked_bytes { + checksum += (*byte) as u16; + } + return checksum; +} + +// NOTE: Doesn't work for some reason, it just hangs! +#[embassy_executor::task] +async fn reader(mut rx: UartRx<'static, UART0, Async>) { + loop { + let mut buf = [0; 32]; + debug!("Attempting read.."); + + //rx.read(&mut buf).await.unwrap(); + match rx.read(&mut buf).await { + Ok(v) => info!("Read successful: {:?}", v), + Err(e) => info!("Read error: {:?}", e), + } + info!("RX='{:?}'", buf); + } +} + +#[embassy_executor::main] +async fn main(spawner: Spawner) { + info!("Start"); + + let p = embassy_rp::init(Default::default()); + + // Initialize the fingerprint scanner. + let mut config = Config::default(); + config.baudrate = 57600; + config.stop_bits = StopBits::STOP1; + config.data_bits = DataBits::DataBits8; + + let (uart, tx_pin, tx_dma, rx_pin, rx_dma) = (p.UART0, p.PIN_16, p.DMA_CH0, p.PIN_17, p.DMA_CH1); + let uart = Uart::new(uart, tx_pin, rx_pin, Irqs, tx_dma, rx_dma, config); + let (mut tx, rx) = uart.split(); + + unwrap!(spawner.spawn(reader(rx))); + Timer::after_secs(1).await; + + let mut vec_buf: Vec = heapless::Vec::new(); + { + // Clear buffers + vec_buf.clear(); + + // START + let _ = write_cmd_bytes(&mut vec_buf, &START.to_be_bytes()[..]); + + // ADDRESS + let _ = write_cmd_bytes(&mut vec_buf, &ADDRESS.to_be_bytes()[..]); + + // PID + let _ = vec_buf.push(0x01); + + // LENGTH + let len = >::try_into(vec_buf.len()).unwrap() as u16; + let _ = write_cmd_bytes(&mut vec_buf, &len.to_be_bytes()[..]); + + // COMMAND + let _ = vec_buf.push(0x35); // AuraLedConfig + + // DATA + let _ = vec_buf.push(0x01); // ctrl=Breathing light + let _ = vec_buf.push(0x50); // speed=80 + let _ = vec_buf.push(0x02); // colour=Blue + let _ = vec_buf.push(0x00); // times=Infinite + + // SUM + let chk = compute_checksum(vec_buf.clone()); + let _ = write_cmd_bytes(&mut vec_buf, &chk.to_be_bytes()[..]); + + // ===== + + // Send command buffer. + let data: [u8; 16] = vec_buf.clone().into_array().unwrap(); + debug!("data='{:?}'", data); + match tx.write(&data).await { + Ok(..) => info!("Write successful"), + Err(e) => info!("Write error: {:?}", e), + } + } +} From 61d0c068ff793febd711971ded749bae277f5cc0 Mon Sep 17 00:00:00 2001 From: Turbo Fredriksson Date: Mon, 29 Apr 2024 14:54:26 +0100 Subject: [PATCH 241/581] Finish the read part. * Don't need separate task for this. * **Must** read one byte at a time, then merge them into one Vec. * To better demonstrate, cycle through the three colours Red, Blue, Purple. --- examples/rp/src/bin/uart_r503.rs | 79 ++++++++++++++++++++------------ 1 file changed, 49 insertions(+), 30 deletions(-) diff --git a/examples/rp/src/bin/uart_r503.rs b/examples/rp/src/bin/uart_r503.rs index f8a9d8a9f..c0676750c 100644 --- a/examples/rp/src/bin/uart_r503.rs +++ b/examples/rp/src/bin/uart_r503.rs @@ -1,17 +1,17 @@ #![no_std] #![no_main] -use defmt::{debug, info, unwrap}; +use defmt::info; use embassy_executor::Spawner; use embassy_rp::bind_interrupts; use embassy_rp::peripherals::UART0; -use embassy_rp::uart::{Async, Config, DataBits, InterruptHandler as UARTInterruptHandler, StopBits, Uart, UartRx}; +use embassy_rp::uart::{Config, DataBits, InterruptHandler as UARTInterruptHandler, Parity, StopBits, Uart}; use embassy_time::Timer; use heapless::Vec; use {defmt_rtt as _, panic_probe as _}; bind_interrupts!(pub struct Irqs { - UART0_IRQ => UARTInterruptHandler; // Fingerprint scanner (TX) + UART0_IRQ => UARTInterruptHandler; }); const ADDRESS: u32 = 0xFFFFFFFF; @@ -34,24 +34,8 @@ fn compute_checksum(buf: Vec) -> u16 { return checksum; } -// NOTE: Doesn't work for some reason, it just hangs! -#[embassy_executor::task] -async fn reader(mut rx: UartRx<'static, UART0, Async>) { - loop { - let mut buf = [0; 32]; - debug!("Attempting read.."); - - //rx.read(&mut buf).await.unwrap(); - match rx.read(&mut buf).await { - Ok(v) => info!("Read successful: {:?}", v), - Err(e) => info!("Read error: {:?}", e), - } - info!("RX='{:?}'", buf); - } -} - #[embassy_executor::main] -async fn main(spawner: Spawner) { +async fn main(_spawner: Spawner) { info!("Start"); let p = embassy_rp::init(Default::default()); @@ -61,16 +45,16 @@ async fn main(spawner: Spawner) { config.baudrate = 57600; config.stop_bits = StopBits::STOP1; config.data_bits = DataBits::DataBits8; + config.parity = Parity::ParityNone; let (uart, tx_pin, tx_dma, rx_pin, rx_dma) = (p.UART0, p.PIN_16, p.DMA_CH0, p.PIN_17, p.DMA_CH1); let uart = Uart::new(uart, tx_pin, rx_pin, Irqs, tx_dma, rx_dma, config); - let (mut tx, rx) = uart.split(); - - unwrap!(spawner.spawn(reader(rx))); - Timer::after_secs(1).await; + let (mut tx, mut rx) = uart.split(); let mut vec_buf: Vec = heapless::Vec::new(); - { + + // Cycle through the three colours Red, Blue and Purple. + for colour in 1..=3 { // Clear buffers vec_buf.clear(); @@ -93,7 +77,7 @@ async fn main(spawner: Spawner) { // DATA let _ = vec_buf.push(0x01); // ctrl=Breathing light let _ = vec_buf.push(0x50); // speed=80 - let _ = vec_buf.push(0x02); // colour=Blue + let _ = vec_buf.push(colour as u8); // colour=Red, Blue, Purple let _ = vec_buf.push(0x00); // times=Infinite // SUM @@ -103,11 +87,46 @@ async fn main(spawner: Spawner) { // ===== // Send command buffer. - let data: [u8; 16] = vec_buf.clone().into_array().unwrap(); - debug!("data='{:?}'", data); - match tx.write(&data).await { - Ok(..) => info!("Write successful"), + let data_write: [u8; 16] = vec_buf.clone().into_array().unwrap(); + info!("write ({})='{:?}'", colour, data_write); + match tx.write(&data_write).await { + Ok(..) => info!("Write successful."), Err(e) => info!("Write error: {:?}", e), } + + // ===== + + // Read command buffer. + let mut read_buf: [u8; 1] = [0; 1]; // Can only read one byte at a time! + let mut data_read: Vec = heapless::Vec::new(); // Return buffer. + let mut cnt: u8 = 0; // Keep track of how many packages we've received. + + info!("Attempting read."); + loop { + match rx.read(&mut read_buf).await { + Ok(..) => (), + Err(e) => info!(" Read error: {:?}", e), + } + + match cnt { + _ => data_read.push(read_buf[0]).unwrap(), + } + + if cnt > 10 { + info!("read ({})='{:?}'", colour, data_read[..]); + break; + } + + cnt = cnt + 1; + } + + // ===== + + if colour != 3 { + Timer::after_secs(2).await; + info!("Changing colour."); + } } + + info!("All done.."); } From 66ee0c44d31d53da00cd2726ecd0fc47681f6d52 Mon Sep 17 00:00:00 2001 From: Turbo Fredriksson Date: Wed, 1 May 2024 11:43:14 +0100 Subject: [PATCH 242/581] Example and documentation on how to Calculate correct checksum. + Include the package format documentation. + Cycle through all three colours in three different speed. - Remove the `write_cmd_bytes()`. Superfluous. --- examples/rp/src/bin/uart_r503.rs | 156 ++++++++++++++++++------------- 1 file changed, 91 insertions(+), 65 deletions(-) diff --git a/examples/rp/src/bin/uart_r503.rs b/examples/rp/src/bin/uart_r503.rs index c0676750c..085be280b 100644 --- a/examples/rp/src/bin/uart_r503.rs +++ b/examples/rp/src/bin/uart_r503.rs @@ -1,12 +1,12 @@ #![no_std] #![no_main] -use defmt::info; +use defmt::{debug, error, info}; use embassy_executor::Spawner; use embassy_rp::bind_interrupts; use embassy_rp::peripherals::UART0; use embassy_rp::uart::{Config, DataBits, InterruptHandler as UARTInterruptHandler, Parity, StopBits, Uart}; -use embassy_time::Timer; +use embassy_time::{with_timeout, Duration, Timer}; use heapless::Vec; use {defmt_rtt as _, panic_probe as _}; @@ -14,15 +14,34 @@ bind_interrupts!(pub struct Irqs { UART0_IRQ => UARTInterruptHandler; }); -const ADDRESS: u32 = 0xFFFFFFFF; const START: u16 = 0xEF01; +const ADDRESS: u32 = 0xFFFFFFFF; // ================================================================================ -fn write_cmd_bytes(buf: &mut Vec, bytes: &[u8]) { - let _ = buf.extend_from_slice(bytes); -} +// Data package format +// Name Length Description +// ========================================================================================================== +// Start 2 bytes Fixed value of 0xEF01; High byte transferred first. +// Address 4 bytes Default value is 0xFFFFFFFF, which can be modified by command. +// High byte transferred first and at wrong adder value, module +// will reject to transfer. +// PID 1 byte 01H Command packet; +// 02H Data packet; Data packet shall not appear alone in executing +// processs, must follow command packet or acknowledge packet. +// 07H Acknowledge packet; +// 08H End of Data packet. +// LENGTH 2 bytes Refers to the length of package content (command packets and data packets) +// plus the length of Checksum (2 bytes). Unit is byte. Max length is 256 bytes. +// And high byte is transferred first. +// DATA - It can be commands, data, command’s parameters, acknowledge result, etc. +// (fingerprint character value, template are all deemed as data); +// SUM 2 bytes The arithmetic sum of package identifier, package length and all package +// contens. Overflowing bits are omitted. high byte is transferred first. +// ================================================================================ + +// Checksum is calculated on 'length (2 bytes) + data (??)'. fn compute_checksum(buf: Vec) -> u16 { let mut checksum = 0u16; @@ -52,81 +71,88 @@ async fn main(_spawner: Spawner) { let (mut tx, mut rx) = uart.split(); let mut vec_buf: Vec = heapless::Vec::new(); + let mut data: Vec = heapless::Vec::new(); - // Cycle through the three colours Red, Blue and Purple. - for colour in 1..=3 { - // Clear buffers - vec_buf.clear(); + let mut speeds: Vec = heapless::Vec::new(); + let _ = speeds.push(0xC8); // Slow + let _ = speeds.push(0x20); // Medium + let _ = speeds.push(0x02); // Fast - // START - let _ = write_cmd_bytes(&mut vec_buf, &START.to_be_bytes()[..]); + // Cycle through the three colours Red, Blue and Purple forever. + loop { + for colour in 1..=3 { + for speed in &speeds { + // Set the data first, because the length is dependent on that. + // However, we write the length bits before we do the data. + data.clear(); + let _ = data.push(0x01); // ctrl=Breathing light + let _ = data.push(*speed); + let _ = data.push(colour as u8); // colour=Red, Blue, Purple + let _ = data.push(0x00); // times=Infinite - // ADDRESS - let _ = write_cmd_bytes(&mut vec_buf, &ADDRESS.to_be_bytes()[..]); + // Clear buffers + vec_buf.clear(); - // PID - let _ = vec_buf.push(0x01); + // START + let _ = vec_buf.extend_from_slice(&START.to_be_bytes()[..]); - // LENGTH - let len = >::try_into(vec_buf.len()).unwrap() as u16; - let _ = write_cmd_bytes(&mut vec_buf, &len.to_be_bytes()[..]); + // ADDRESS + let _ = vec_buf.extend_from_slice(&ADDRESS.to_be_bytes()[..]); - // COMMAND - let _ = vec_buf.push(0x35); // AuraLedConfig + // PID + let _ = vec_buf.extend_from_slice(&[0x01]); - // DATA - let _ = vec_buf.push(0x01); // ctrl=Breathing light - let _ = vec_buf.push(0x50); // speed=80 - let _ = vec_buf.push(colour as u8); // colour=Red, Blue, Purple - let _ = vec_buf.push(0x00); // times=Infinite + // LENGTH + let len: u16 = (1 + data.len() + 2).try_into().unwrap(); + let _ = vec_buf.extend_from_slice(&len.to_be_bytes()[..]); - // SUM - let chk = compute_checksum(vec_buf.clone()); - let _ = write_cmd_bytes(&mut vec_buf, &chk.to_be_bytes()[..]); + // COMMAND + let _ = vec_buf.push(0x35); // Command: AuraLedConfig - // ===== + // DATA + let _ = vec_buf.extend_from_slice(&data); - // Send command buffer. - let data_write: [u8; 16] = vec_buf.clone().into_array().unwrap(); - info!("write ({})='{:?}'", colour, data_write); - match tx.write(&data_write).await { - Ok(..) => info!("Write successful."), - Err(e) => info!("Write error: {:?}", e), - } + // SUM + let chk = compute_checksum(vec_buf.clone()); + let _ = vec_buf.extend_from_slice(&chk.to_be_bytes()[..]); - // ===== + // ===== - // Read command buffer. - let mut read_buf: [u8; 1] = [0; 1]; // Can only read one byte at a time! - let mut data_read: Vec = heapless::Vec::new(); // Return buffer. - let mut cnt: u8 = 0; // Keep track of how many packages we've received. + // Send command buffer. + let data_write: [u8; 16] = vec_buf.clone().into_array().unwrap(); + debug!(" write='{:?}'", data_write[..]); + match tx.write(&data_write).await { + Ok(..) => info!("Write successful."), + Err(e) => error!("Write error: {:?}", e), + } - info!("Attempting read."); - loop { - match rx.read(&mut read_buf).await { - Ok(..) => (), - Err(e) => info!(" Read error: {:?}", e), + // ===== + + // Read command buffer. + let mut read_buf: [u8; 1] = [0; 1]; // Can only read one byte at a time! + let mut data_read: Vec = heapless::Vec::new(); // Save buffer. + + info!("Attempting read."); + loop { + // Some commands, like `Img2Tz()` needs longer, but we hard-code this to 200ms + // for this command. + match with_timeout(Duration::from_millis(200), rx.read(&mut read_buf)).await { + Ok(..) => { + // Extract and save read byte. + debug!(" r='{=u8:#04x}H' ({:03}D)", read_buf[0], read_buf[0]); + let _ = data_read.push(read_buf[0]).unwrap(); + } + Err(..) => break, // TimeoutError -> Ignore. + } + } + info!("Read successful"); + debug!(" read='{:?}'", data_read[..]); + + Timer::after_secs(3).await; + info!("Changing speed."); } - match cnt { - _ => data_read.push(read_buf[0]).unwrap(), - } - - if cnt > 10 { - info!("read ({})='{:?}'", colour, data_read[..]); - break; - } - - cnt = cnt + 1; - } - - // ===== - - if colour != 3 { - Timer::after_secs(2).await; info!("Changing colour."); } } - - info!("All done.."); } From b3ca42f8f90668c4552deaf9a0da9c04de4fcf6c Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Wed, 1 May 2024 16:33:34 +0200 Subject: [PATCH 243/581] stm32/i2c: add h7rs support. --- embassy-stm32/src/i2c/mod.rs | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/embassy-stm32/src/i2c/mod.rs b/embassy-stm32/src/i2c/mod.rs index 6931beac7..0b2a56305 100644 --- a/embassy-stm32/src/i2c/mod.rs +++ b/embassy-stm32/src/i2c/mod.rs @@ -2,7 +2,7 @@ #![macro_use] #[cfg_attr(i2c_v1, path = "v1.rs")] -#[cfg_attr(i2c_v2, path = "v2.rs")] +#[cfg_attr(any(i2c_v2, i2c_v3), path = "v2.rs")] mod _version; use core::future::Future; From 366f6215c3b5865cc30011147b29e90383606bd5 Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Wed, 1 May 2024 17:00:02 +0200 Subject: [PATCH 244/581] stm32/i2c: actually add h7rs support. --- embassy-stm32/Cargo.toml | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/embassy-stm32/Cargo.toml b/embassy-stm32/Cargo.toml index cc126b3af..a50da1a9e 100644 --- a/embassy-stm32/Cargo.toml +++ b/embassy-stm32/Cargo.toml @@ -72,7 +72,7 @@ rand_core = "0.6.3" sdio-host = "0.5.0" critical-section = "1.1" #stm32-metapac = { version = "15" } -stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-afee4331adc717f4cc52caab16838c95334535be" } +stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-f1297385e91f061fcb6134bb25f51e12d8abff93" } vcell = "0.1.3" nb = "1.0.0" @@ -98,7 +98,7 @@ proc-macro2 = "1.0.36" quote = "1.0.15" #stm32-metapac = { version = "15", default-features = false, features = ["metadata"]} -stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-afee4331adc717f4cc52caab16838c95334535be", default-features = false, features = ["metadata"]} +stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-f1297385e91f061fcb6134bb25f51e12d8abff93", default-features = false, features = ["metadata"]} [features] default = ["rt"] From 9fe50a7639a046bafe9d2003847476cbfd61db1d Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Jo=C3=ABl=20Schulz-Ansres?= Date: Thu, 2 May 2024 13:36:44 +0200 Subject: [PATCH 245/581] Add stm32 dsihost driver --- embassy-stm32/Cargo.toml | 1 - embassy-stm32/build.rs | 29 +++ embassy-stm32/src/dsihost.rs | 363 ++++++++++++++++++++++++++++++++++ embassy-stm32/src/lib.rs | 4 + embassy-stm32/src/ltdc.rs | 134 +++++++++++++ embassy-stm32/src/rcc/f247.rs | 5 +- embassy-stm32/src/rcc/h.rs | 3 + embassy-stm32/src/rcc/l.rs | 3 + embassy-stm32/src/rcc/u5.rs | 3 + 9 files changed, 543 insertions(+), 2 deletions(-) create mode 100644 embassy-stm32/src/dsihost.rs create mode 100644 embassy-stm32/src/ltdc.rs diff --git a/embassy-stm32/Cargo.toml b/embassy-stm32/Cargo.toml index a50da1a9e..a7137d132 100644 --- a/embassy-stm32/Cargo.toml +++ b/embassy-stm32/Cargo.toml @@ -89,7 +89,6 @@ volatile-register = { version = "0.2.1" } bitflags = "2.4.2" - [dev-dependencies] critical-section = { version = "1.1", features = ["std"] } diff --git a/embassy-stm32/build.rs b/embassy-stm32/build.rs index ba118f338..dbc8f9153 100644 --- a/embassy-stm32/build.rs +++ b/embassy-stm32/build.rs @@ -836,6 +836,35 @@ fn main() { (("dcmi", "HSYNC"), quote!(crate::dcmi::HSyncPin)), (("dcmi", "VSYNC"), quote!(crate::dcmi::VSyncPin)), (("dcmi", "PIXCLK"), quote!(crate::dcmi::PixClkPin)), + (("dsihost", "TE"), quote!(crate::dsihost::TePin)), + (("ltdc", "CLK"), quote!(crate::ltdc::ClkPin)), + (("ltdc", "HSYNC"), quote!(crate::ltdc::HsyncPin)), + (("ltdc", "VSYNC"), quote!(crate::ltdc::VsyncPin)), + (("ltdc", "DE"), quote!(crate::ltdc::DePin)), + (("ltdc", "R0"), quote!(crate::ltdc::R0Pin)), + (("ltdc", "R1"), quote!(crate::ltdc::R1Pin)), + (("ltdc", "R2"), quote!(crate::ltdc::R2Pin)), + (("ltdc", "R3"), quote!(crate::ltdc::R3Pin)), + (("ltdc", "R4"), quote!(crate::ltdc::R4Pin)), + (("ltdc", "R5"), quote!(crate::ltdc::R5Pin)), + (("ltdc", "R6"), quote!(crate::ltdc::R6Pin)), + (("ltdc", "R7"), quote!(crate::ltdc::R7Pin)), + (("ltdc", "G0"), quote!(crate::ltdc::G0Pin)), + (("ltdc", "G1"), quote!(crate::ltdc::G1Pin)), + (("ltdc", "G2"), quote!(crate::ltdc::G2Pin)), + (("ltdc", "G3"), quote!(crate::ltdc::G3Pin)), + (("ltdc", "G4"), quote!(crate::ltdc::G4Pin)), + (("ltdc", "G5"), quote!(crate::ltdc::G5Pin)), + (("ltdc", "G6"), quote!(crate::ltdc::G6Pin)), + (("ltdc", "G7"), quote!(crate::ltdc::G7Pin)), + (("ltdc", "B0"), quote!(crate::ltdc::B0Pin)), + (("ltdc", "B1"), quote!(crate::ltdc::B1Pin)), + (("ltdc", "B2"), quote!(crate::ltdc::B2Pin)), + (("ltdc", "B3"), quote!(crate::ltdc::B3Pin)), + (("ltdc", "B4"), quote!(crate::ltdc::B4Pin)), + (("ltdc", "B5"), quote!(crate::ltdc::B5Pin)), + (("ltdc", "B6"), quote!(crate::ltdc::B6Pin)), + (("ltdc", "B7"), quote!(crate::ltdc::B7Pin)), (("usb", "DP"), quote!(crate::usb::DpPin)), (("usb", "DM"), quote!(crate::usb::DmPin)), (("otg", "DP"), quote!(crate::usb::DpPin)), diff --git a/embassy-stm32/src/dsihost.rs b/embassy-stm32/src/dsihost.rs new file mode 100644 index 000000000..c55fa8411 --- /dev/null +++ b/embassy-stm32/src/dsihost.rs @@ -0,0 +1,363 @@ +//! DSI HOST + +use crate::rcc::RccPeripheral; +use core::marker::PhantomData; +use embassy_hal_internal::{into_ref, PeripheralRef}; + +//use crate::gpio::{AnyPin, SealedPin}; +use crate::gpio::{AFType, AnyPin, Pull, Speed}; +use crate::{peripherals, Peripheral}; + +/// Performs a busy-wait delay for a specified number of microseconds. +pub fn blocking_delay_ms(ms: u32) { + #[cfg(time)] + embassy_time::block_for(embassy_time::Duration::from_millis(ms)); + #[cfg(not(time))] + cortex_m::asm::delay(unsafe { crate::rcc::get_freqs() }.sys.unwrap().0 / 1_000 * ms); +} + +/// PacketTypes extracted from CubeMX +#[repr(u8)] +#[allow(dead_code)] +pub enum PacketType { + /// DCS short write, no parameters + DcsShortPktWriteP0, + /// DCS short write, one parameter + DcsShortPktWriteP1, + /// Generic short write, no parameters + GenShortPktWriteP0, + /// Generic short write, one parameter + GenShortPktWriteP1, + /// Generic short write, two parameters + GenShortPktWriteP2, + /// DCS long write + DcsLongPktWrite, + /// Generic long write + GenLongPktWrite, + /// DCS short read + DcsShortPktRead(u8), + /// Generic short read, no parameters + GenShortPktReadP0, + /// Generic short read, one parameter + GenShortPktReadP1(u8), + /// Generic short read, two parameters + GenShortPktReadP2(u8, u8), + /// Used to set the maximum return packet size for reading data + MaxReturnPktSize, +} + +impl From for u8 { + fn from(packet_type: PacketType) -> u8 { + match packet_type { + PacketType::DcsShortPktWriteP0 => 0x05, + PacketType::DcsShortPktWriteP1 => 0x15, + PacketType::GenShortPktWriteP0 => 0x03, + PacketType::GenShortPktWriteP1 => 0x13, + PacketType::GenShortPktWriteP2 => 0x23, + PacketType::DcsLongPktWrite => 0x39, + PacketType::GenLongPktWrite => 0x29, + PacketType::DcsShortPktRead(_) => 0x06, + PacketType::GenShortPktReadP0 => 0x04, + PacketType::GenShortPktReadP1(_) => 0x14, + PacketType::GenShortPktReadP2(_, _) => 0x24, + PacketType::MaxReturnPktSize => 0x37, + } + } +} + +/// DSIHOST driver. +pub struct DsiHost<'d, T: Instance> { + _peri: PhantomData<&'d mut T>, + _te: PeripheralRef<'d, AnyPin>, +} + +impl<'d, T: Instance> DsiHost<'d, T> { + /// Note: Full-Duplex modes are not supported at this time + pub fn new(_peri: impl Peripheral

+ 'd, te: impl Peripheral

> + 'd) -> Self { + into_ref!(te); + + T::enable_and_reset(); + + // Set Tearing Enable pin according to CubeMx example + te.set_as_af_pull(te.af_num(), AFType::OutputPushPull, Pull::None); + te.set_speed(Speed::Low); + /* + T::regs().wcr().modify(|w| { + w.set_dsien(true); + }); + */ + Self { + _peri: PhantomData, + _te: te.map_into(), + } + } + + /// Get the DSIHOST hardware version. Found in the reference manual for comparison. + pub fn get_version(&self) -> u32 { + T::regs().vr().read().version() + } + + /// Set the enable bit in the control register and assert that it has been enabled + pub fn enable(&mut self) { + T::regs().cr().modify(|w| w.set_en(true)); + assert!(T::regs().cr().read().en()) + } + + /// Unset the enable bit in the control register and assert that it has been disabled + pub fn disable(&mut self) { + T::regs().cr().modify(|w| w.set_en(false)); + assert!(!T::regs().cr().read().en()) + } + + /// Set the DSI enable bit in the wrapper control register and assert that it has been enabled + pub fn enable_wrapper_dsi(&mut self) { + T::regs().wcr().modify(|w| w.set_dsien(true)); + assert!(T::regs().wcr().read().dsien()) + } + + /// Unset the DSI enable bit in the wrapper control register and assert that it has been disabled + pub fn disable_wrapper_dsi(&mut self) { + T::regs().wcr().modify(|w| w.set_dsien(false)); + assert!(!T::regs().wcr().read().dsien()) + } + + /// DCS or Generic short/long write command + pub fn write_cmd(&mut self, channel_id: u8, params: &[u8]) { + if params.len() <= 2 { + self.short_write(channel_id, PacketType::DcsShortPktWriteP1, params[0], params[1]) + } else { + self.long_write( + channel_id, + PacketType::DcsLongPktWrite, // FIXME: This might be a generic long packet, as well... + params, + ) + } + } + + fn short_write(&mut self, channel_id: u8, packet_type: PacketType, param1: u8, param2: u8) { + #[cfg(feature = "defmt")] + defmt::debug!("short_write: BEGIN wait for command fifo empty"); + + // Wait for Command FIFO empty + self.wait_command_fifo_empty().unwrap(); + #[cfg(feature = "defmt")] + defmt::debug!("short_write: END wait for command fifo empty"); + + // Configure the packet to send a short DCS command with 0 or 1 parameters + // Update the DSI packet header with new information + self.config_packet_header(channel_id, packet_type, param1, param2); + } + + fn config_packet_header(&mut self, channel_id: u8, packet_type: PacketType, param1: u8, param2: u8) { + T::regs().ghcr().write(|w| { + w.set_dt(packet_type.into()); + w.set_vcid(channel_id); + w.set_wclsb(param1); + w.set_wcmsb(param2); + }); + } + + /// Write long DCS or long Generic command. + /// + /// `params` is expected to contain at least 3 elements. Use [`short_write`] for 2 or less. + fn long_write(&mut self, channel_id: u8, packet_type: PacketType, params: &[u8]) { + // Must be a long packet if we do the long write, obviously. + assert!(matches!( + packet_type, + PacketType::DcsLongPktWrite | PacketType::GenLongPktWrite + )); + + // params needs to have at least 3 elements, otherwise short_write should be used + assert!(params.len() >= 3); + + #[cfg(feature = "defmt")] + defmt::debug!("long_write: BEGIN wait for command fifo empty"); + + self.wait_command_fifo_empty().unwrap(); + + #[cfg(feature = "defmt")] + defmt::debug!("long_write: DONE wait for command fifo empty"); + + let dcs_code = params[params.len() - 1]; // FIXME: DCS Code stored in the last element. Should probably be a separate argument. + let data = ¶ms[0..params.len() - 1]; // data is all elements except for the dcs_code + + // Note: CubeMX example "NbParams" is always one LESS than params.len() + // DCS code (last element of params) must be on payload byte 1 and if we have only 2 more params, + // then they must go into data2 and data3 + T::regs().gpdr().write(|w| { + // data[2] may or may not exist. + if let Some(x) = data.get(2) { + w.set_data4(*x); + } + // data[0] and [1] have to exist if long_write is called. + w.set_data3(data[1]); + w.set_data2(data[0]); + // DCS Code + w.set_data1(dcs_code); + }); + + // FIXME: This probably should return an error + self.wait_command_fifo_empty().unwrap(); + + // These steps are only necessary if more than 1x 4 bytes need to go into the FIFO + if data.len() >= 4 { + // Generate an iterator that iterates over chunks of exactly 4 bytes + let iter = data[3..data.len()].chunks_exact(4); + // Obtain remainder before consuming iter + let remainder = iter.remainder(); + + // Keep filling the buffer with remaining data + for param in iter { + T::regs().gpdr().write(|w| { + w.set_data4(param[3]); + w.set_data3(param[2]); + w.set_data2(param[1]); + w.set_data1(param[0]); + }); + + self.wait_command_fifo_empty().unwrap(); + } + + // If the remaining data was not devisible by 4 we get a remainder + if remainder.len() >= 1 { + T::regs().gpdr().write(|w| { + if let Some(x) = remainder.get(2) { + w.set_data3(*x); + } + if let Some(x) = remainder.get(1) { + w.set_data2(*x); + } + w.set_data1(remainder[0]); + }); + self.wait_command_fifo_empty().unwrap(); + } + } + // Configure the packet to send a long DCS command + T::regs().ghcr().write(|w| { + w.set_dt(packet_type.into()); + w.set_vcid(channel_id); + w.set_wclsb((params.len() & 0x00FF) as u8); + w.set_wcmsb((params.len() & 0xFF00 >> 8) as u8); + }); + } + + pub fn read( + &mut self, + channel_id: u8, + packet_type: PacketType, + read_size: u16, + data: &mut [u8], + ) -> Result<(), Error> { + if data.len() != read_size as usize { + return Err(Error::InvalidReadSize); + } + + // Set the maximum return packet size + self.short_write( + channel_id, + PacketType::MaxReturnPktSize, + (read_size & 0xFF) as u8, + ((read_size >> 8) & 0xFF) as u8, + ); + + // Set the packet header according to the packet_type + use PacketType::*; + match packet_type { + DcsShortPktRead(cmd) => self.config_packet_header(channel_id, packet_type, cmd, 0), + GenShortPktReadP0 => self.config_packet_header(channel_id, packet_type, 0, 0), + GenShortPktReadP1(param1) => self.config_packet_header(channel_id, packet_type, param1, 0), + GenShortPktReadP2(param1, param2) => self.config_packet_header(channel_id, packet_type, param1, param2), + _ => return Err(Error::InvalidPacketType), + } + + // Obtain chunks of 32-bit so the entire FIFO data register can be read + for bytes in data.chunks_exact_mut(4) { + self.wait_payload_read_fifo_not_empty().unwrap(); + + // Only perform a single read on the entire register to avoid unintended side-effects + let gpdr = T::regs().gpdr().read(); + bytes[0] = gpdr.data1(); + bytes[1] = gpdr.data2(); + bytes[2] = gpdr.data3(); + bytes[3] = gpdr.data4(); + } + + // Collect the remaining chunks and read the corresponding number of bytes from the FIFO + let remainder = data.chunks_exact_mut(4).into_remainder(); + if !remainder.is_empty() { + self.wait_payload_read_fifo_not_empty().unwrap(); + // Only perform a single read on the entire register to avoid unintended side-effects + let gpdr = T::regs().gpdr().read(); + if let Some(x) = remainder.get_mut(0) { + *x = gpdr.data1() + } + if let Some(x) = remainder.get_mut(1) { + *x = gpdr.data2() + } + if let Some(x) = remainder.get_mut(2) { + *x = gpdr.data3() + } + } + + Ok(()) + } + fn wait_command_fifo_empty(&self) -> Result<(), Error> { + for _ in 1..1000 { + // Wait for Command FIFO empty + if T::regs().gpsr().read().cmdfe() { + return Ok(()); + } + blocking_delay_ms(1); + } + Err(Error::FifoTimeout) + } + + fn wait_payload_read_fifo_not_empty(&self) -> Result<(), Error> { + for _ in 1..1000 { + // Wait for payload read FIFO empty + if !T::regs().gpsr().read().prdfe() { + return Ok(()); + } + blocking_delay_ms(1); + } + Err(Error::FifoTimeout) + } +} + +/// Possible Error Types for DSI HOST +#[non_exhaustive] +#[derive(Debug)] +pub enum Error { + /// Waiting for FIFO empty flag timed out + FifoTimeout, + /// The specified `PacketType` is invalid for the selected operation + InvalidPacketType, + /// Provided read size does not match the read buffer length + InvalidReadSize, +} + +impl<'d, T: Instance> Drop for DsiHost<'d, T> { + fn drop(&mut self) {} +} + +trait SealedInstance: crate::rcc::SealedRccPeripheral { + fn regs() -> &'static crate::pac::dsihost::Dsihost; +} + +/// DSI instance trait. +#[allow(private_bounds)] +pub trait Instance: SealedInstance + RccPeripheral + 'static {} + +pin_trait!(TePin, Instance); + +foreach_peripheral!( + (dsihost, $inst:ident) => { + impl crate::dsihost::SealedInstance for peripherals::$inst { + fn regs() -> &'static crate::pac::dsihost::Dsihost { + &crate::pac::$inst + } + } + + impl crate::dsihost::Instance for peripherals::$inst {} + }; +); diff --git a/embassy-stm32/src/lib.rs b/embassy-stm32/src/lib.rs index 1f4e9ab1e..1f92e8b2a 100644 --- a/embassy-stm32/src/lib.rs +++ b/embassy-stm32/src/lib.rs @@ -66,6 +66,10 @@ pub mod cryp; pub mod dac; #[cfg(dcmi)] pub mod dcmi; +#[cfg(dsihost)] +pub mod dsihost; +#[cfg(ltdc)] +pub mod ltdc; #[cfg(eth)] pub mod eth; #[cfg(feature = "exti")] diff --git a/embassy-stm32/src/ltdc.rs b/embassy-stm32/src/ltdc.rs new file mode 100644 index 000000000..1cdf71e7e --- /dev/null +++ b/embassy-stm32/src/ltdc.rs @@ -0,0 +1,134 @@ +//! LTDC +use crate::rcc::RccPeripheral; +use crate::{peripherals, Peripheral}; +use core::marker::PhantomData; + +/// LTDC driver. +pub struct Ltdc<'d, T: Instance> { + _peri: PhantomData<&'d mut T>, +} + +impl<'d, T: Instance> Ltdc<'d, T> { + /// Note: Full-Duplex modes are not supported at this time + pub fn new( + _peri: impl Peripheral

+ 'd, + /* + clk: impl Peripheral

> + 'd, + hsync: impl Peripheral

> + 'd, + vsync: impl Peripheral

> + 'd, + b0: impl Peripheral

> + 'd, + b1: impl Peripheral

> + 'd, + b2: impl Peripheral

> + 'd, + b3: impl Peripheral

> + 'd, + b4: impl Peripheral

> + 'd, + b5: impl Peripheral

> + 'd, + b6: impl Peripheral

> + 'd, + b7: impl Peripheral

> + 'd, + g0: impl Peripheral

> + 'd, + g1: impl Peripheral

> + 'd, + g2: impl Peripheral

> + 'd, + g3: impl Peripheral

> + 'd, + g4: impl Peripheral

> + 'd, + g5: impl Peripheral

> + 'd, + g6: impl Peripheral

> + 'd, + g7: impl Peripheral

> + 'd, + r0: impl Peripheral

> + 'd, + r1: impl Peripheral

> + 'd, + r2: impl Peripheral

> + 'd, + r3: impl Peripheral

> + 'd, + r4: impl Peripheral

> + 'd, + r5: impl Peripheral

> + 'd, + r6: impl Peripheral

> + 'd, + r7: impl Peripheral

> + 'd, + */ + ) -> Self { + //into_ref!(clk); + + critical_section::with(|_cs| { + // RM says the pllsaidivr should only be changed when pllsai is off. But this could have other unintended side effects. So let's just give it a try like this. + // According to the debugger, this bit gets set, anyway. + stm32_metapac::RCC + .dckcfgr() + .modify(|w| w.set_pllsaidivr(stm32_metapac::rcc::vals::Pllsaidivr::DIV2)); + }); + + T::enable_and_reset(); + + //new_pin!(clk, AFType::OutputPushPull, Speed::VeryHigh, Pull::None); + + // Set Tearing Enable pin according to CubeMx example + //te.set_as_af_pull(te.af_num(), AFType::OutputPushPull, Pull::None); + //te.set_speed(Speed::Low); + /* + T::regs().wcr().modify(|w| { + w.set_dsien(true); + }); + */ + Self { _peri: PhantomData } + } + + /// Set the enable bit in the control register and assert that it has been enabled + pub fn enable(&mut self) { + T::regs().gcr().modify(|w| w.set_ltdcen(true)); + assert!(T::regs().gcr().read().ltdcen()) + } + + /// Unset the enable bit in the control register and assert that it has been disabled + pub fn disable(&mut self) { + T::regs().gcr().modify(|w| w.set_ltdcen(false)); + assert!(!T::regs().gcr().read().ltdcen()) + } +} + +impl<'d, T: Instance> Drop for Ltdc<'d, T> { + fn drop(&mut self) {} +} + +trait SealedInstance: crate::rcc::SealedRccPeripheral { + fn regs() -> &'static crate::pac::ltdc::Ltdc; +} + +/// DSI instance trait. +#[allow(private_bounds)] +pub trait Instance: SealedInstance + RccPeripheral + 'static {} + +pin_trait!(ClkPin, Instance); +pin_trait!(HsyncPin, Instance); +pin_trait!(VsyncPin, Instance); +pin_trait!(DePin, Instance); +pin_trait!(R0Pin, Instance); +pin_trait!(R1Pin, Instance); +pin_trait!(R2Pin, Instance); +pin_trait!(R3Pin, Instance); +pin_trait!(R4Pin, Instance); +pin_trait!(R5Pin, Instance); +pin_trait!(R6Pin, Instance); +pin_trait!(R7Pin, Instance); +pin_trait!(G0Pin, Instance); +pin_trait!(G1Pin, Instance); +pin_trait!(G2Pin, Instance); +pin_trait!(G3Pin, Instance); +pin_trait!(G4Pin, Instance); +pin_trait!(G5Pin, Instance); +pin_trait!(G6Pin, Instance); +pin_trait!(G7Pin, Instance); +pin_trait!(B0Pin, Instance); +pin_trait!(B1Pin, Instance); +pin_trait!(B2Pin, Instance); +pin_trait!(B3Pin, Instance); +pin_trait!(B4Pin, Instance); +pin_trait!(B5Pin, Instance); +pin_trait!(B6Pin, Instance); +pin_trait!(B7Pin, Instance); + +foreach_peripheral!( + (ltdc, $inst:ident) => { + impl crate::ltdc::SealedInstance for peripherals::$inst { + fn regs() -> &'static crate::pac::ltdc::Ltdc { + &crate::pac::$inst + } + } + + impl crate::ltdc::Instance for peripherals::$inst {} + }; +); diff --git a/embassy-stm32/src/rcc/f247.rs b/embassy-stm32/src/rcc/f247.rs index e3ee9a039..640175f1f 100644 --- a/embassy-stm32/src/rcc/f247.rs +++ b/embassy-stm32/src/rcc/f247.rs @@ -277,7 +277,7 @@ pub(crate) unsafe fn init(config: Config) { pclk2_tim: Some(pclk2_tim), rtc: rtc, pll1_q: pll.q, - pll1_r: None, // TODO + pll1_r: pll.r, #[cfg(any(stm32f2, all(stm32f4, not(stm32f410)), stm32f7))] plli2s1_p: plli2s.p, @@ -297,6 +297,9 @@ pub(crate) unsafe fn init(config: Config) { #[cfg(not(any(stm32f446, stm32f427, stm32f437, stm32f4x9, stm32f7)))] pllsai1_q: None, + #[cfg(dsihost)] + dsi_phy: None, // DSI PLL clock not supported, don't call `RccPeripheral::frequency()` in the drivers + hsi_div488: hsi.map(|hsi| hsi/488u32), hsi_hse: None, afif: None, diff --git a/embassy-stm32/src/rcc/h.rs b/embassy-stm32/src/rcc/h.rs index 5d47d400c..3cc8a96c8 100644 --- a/embassy-stm32/src/rcc/h.rs +++ b/embassy-stm32/src/rcc/h.rs @@ -677,6 +677,9 @@ pub(crate) unsafe fn init(config: Config) { #[cfg(rcc_h50)] pll3_r: None, + #[cfg(dsihost)] + dsi_phy: None, // DSI PLL clock not supported, don't call `RccPeripheral::frequency()` in the drivers + #[cfg(stm32h5)] audioclk: None, i2s_ckin: None, diff --git a/embassy-stm32/src/rcc/l.rs b/embassy-stm32/src/rcc/l.rs index c625948fb..1329a03ac 100644 --- a/embassy-stm32/src/rcc/l.rs +++ b/embassy-stm32/src/rcc/l.rs @@ -413,6 +413,9 @@ pub(crate) unsafe fn init(config: Config) { #[cfg(any(stm32l47x, stm32l48x, stm32l49x, stm32l4ax, rcc_l4plus, stm32l5))] pllsai2_r: pllsai2.r, + #[cfg(dsihost)] + dsi_phy: None, // DSI PLL clock not supported, don't call `RccPeripheral::frequency()` in the drivers + rtc: rtc, // TODO diff --git a/embassy-stm32/src/rcc/u5.rs b/embassy-stm32/src/rcc/u5.rs index 4013d0a46..6ec0911bb 100644 --- a/embassy-stm32/src/rcc/u5.rs +++ b/embassy-stm32/src/rcc/u5.rs @@ -289,6 +289,9 @@ pub(crate) unsafe fn init(config: Config) { pll3_q: pll3.q, pll3_r: pll3.r, + #[cfg(dsihost)] + dsi_phy: None, // DSI PLL clock not supported, don't call `RccPeripheral::frequency()` in the drivers + // TODO audioclk: None, hsi48_div_2: None, From f468d84a5b44b1a37d5488f3226848d5cd84d0b7 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Jo=C3=ABl=20Schulz-Ansres?= Date: Thu, 2 May 2024 13:50:07 +0200 Subject: [PATCH 246/581] Cargo format --- embassy-stm32/src/dsihost.rs | 1 + embassy-stm32/src/lib.rs | 4 ++-- 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/embassy-stm32/src/dsihost.rs b/embassy-stm32/src/dsihost.rs index c55fa8411..0537d22cf 100644 --- a/embassy-stm32/src/dsihost.rs +++ b/embassy-stm32/src/dsihost.rs @@ -241,6 +241,7 @@ impl<'d, T: Instance> DsiHost<'d, T> { }); } + /// Read DSI Register pub fn read( &mut self, channel_id: u8, diff --git a/embassy-stm32/src/lib.rs b/embassy-stm32/src/lib.rs index 1f92e8b2a..029e01480 100644 --- a/embassy-stm32/src/lib.rs +++ b/embassy-stm32/src/lib.rs @@ -68,8 +68,6 @@ pub mod dac; pub mod dcmi; #[cfg(dsihost)] pub mod dsihost; -#[cfg(ltdc)] -pub mod ltdc; #[cfg(eth)] pub mod eth; #[cfg(feature = "exti")] @@ -89,6 +87,8 @@ pub mod i2s; pub mod ipcc; #[cfg(feature = "low-power")] pub mod low_power; +#[cfg(ltdc)] +pub mod ltdc; #[cfg(opamp)] pub mod opamp; #[cfg(octospi)] From d5f0bceb7ce33c4ac761daad7aed052ae646e36a Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?=D0=A0=D0=BE=D0=BC=D0=B0=D0=BD=20=D0=9A=D1=80=D0=B8=D0=B2?= =?UTF-8?q?=D0=B5=D0=BD=D0=BA=D0=BE=D0=B2?= Date: Tue, 30 Apr 2024 15:42:11 +0400 Subject: [PATCH 247/581] Clear Receiver enable flag before write in Half-Duplex mode --- embassy-stm32/src/usart/mod.rs | 50 +++++++++++++++++++++++++++++++--- 1 file changed, 46 insertions(+), 4 deletions(-) diff --git a/embassy-stm32/src/usart/mod.rs b/embassy-stm32/src/usart/mod.rs index 68899bfff..a6dfbd482 100644 --- a/embassy-stm32/src/usart/mod.rs +++ b/embassy-stm32/src/usart/mod.rs @@ -359,16 +359,32 @@ impl<'d, T: BasicInstance> UartTx<'d, T, Async> { /// Initiate an asynchronous UART write pub async fn write(&mut self, buffer: &[u8]) -> Result<(), Error> { + let r = T::regs(); + + // Disable Receiver for Half-Duplex mode + if r.cr3().read().hdsel() { + r.cr1().modify(|reg| reg.set_re(false)); + } + let ch = self.tx_dma.as_mut().unwrap(); - T::regs().cr3().modify(|reg| { + r.cr3().modify(|reg| { reg.set_dmat(true); }); // If we don't assign future to a variable, the data register pointer // is held across an await and makes the future non-Send. - let transfer = unsafe { ch.write(buffer, tdr(T::regs()), Default::default()) }; + let transfer = unsafe { ch.write(buffer, tdr(r), Default::default()) }; transfer.await; Ok(()) } + + async fn flush_inner() -> Result<(), Error> { + Self::blocking_flush_inner() + } + + /// Wait until transmission complete + pub async fn flush(&mut self) -> Result<(), Error> { + Self::flush_inner().await + } } impl<'d, T: BasicInstance> UartTx<'d, T, Blocking> { @@ -436,6 +452,12 @@ impl<'d, T: BasicInstance, M: Mode> UartTx<'d, T, M> { /// Perform a blocking UART write pub fn blocking_write(&mut self, buffer: &[u8]) -> Result<(), Error> { let r = T::regs(); + + // Disable Receiver for Half-Duplex mode + if r.cr3().read().hdsel() { + r.cr1().modify(|reg| reg.set_re(false)); + } + for &b in buffer { while !sr(r).read().txe() {} unsafe { tdr(r).write_volatile(b) }; @@ -443,12 +465,21 @@ impl<'d, T: BasicInstance, M: Mode> UartTx<'d, T, M> { Ok(()) } - /// Block until transmission complete - pub fn blocking_flush(&mut self) -> Result<(), Error> { + fn blocking_flush_inner() -> Result<(), Error> { let r = T::regs(); while !sr(r).read().tc() {} + + // Enable Receiver after transmission complete for Half-Duplex mode + if r.cr3().read().hdsel() { + r.cr1().modify(|reg| reg.set_re(true)); + } Ok(()) } + + /// Block until transmission complete + pub fn blocking_flush(&mut self) -> Result<(), Error> { + Self::blocking_flush_inner() + } } impl<'d, T: BasicInstance> UartRx<'d, T, Async> { @@ -502,6 +533,11 @@ impl<'d, T: BasicInstance> UartRx<'d, T, Async> { ) -> Result { let r = T::regs(); + // Call flush for Half-Duplex mode. It prevents reading of bytes which have just been written. + if r.cr3().read().hdsel() { + UartTx::<'d, T, Async>::flush_inner().await?; + } + // make sure USART state is restored to neutral state when this future is dropped let on_drop = OnDrop::new(move || { // defmt::trace!("Clear all USART interrupts and DMA Read Request"); @@ -825,6 +861,12 @@ impl<'d, T: BasicInstance, M: Mode> UartRx<'d, T, M> { /// Perform a blocking read into `buffer` pub fn blocking_read(&mut self, buffer: &mut [u8]) -> Result<(), Error> { let r = T::regs(); + + // Call flush for Half-Duplex mode. It prevents reading of bytes which have just been written. + if r.cr3().read().hdsel() { + UartTx::<'d, T, M>::blocking_flush_inner()?; + } + for b in buffer { while !self.check_rx_flags()? {} unsafe { *b = rdr(r).read_volatile() } From 4c55931b6afddc20ef5111c87782e9fc7638b6ce Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Jo=C3=ABl=20Schulz-Ansres?= Date: Thu, 2 May 2024 14:58:38 +0200 Subject: [PATCH 248/581] Remove redundant dsi_phy: None from rcc --- embassy-stm32/src/rcc/f247.rs | 2 -- embassy-stm32/src/rcc/h.rs | 2 -- embassy-stm32/src/rcc/l.rs | 2 -- embassy-stm32/src/rcc/u5.rs | 1 - 4 files changed, 7 deletions(-) diff --git a/embassy-stm32/src/rcc/f247.rs b/embassy-stm32/src/rcc/f247.rs index 640175f1f..555dd63a1 100644 --- a/embassy-stm32/src/rcc/f247.rs +++ b/embassy-stm32/src/rcc/f247.rs @@ -303,8 +303,6 @@ pub(crate) unsafe fn init(config: Config) { hsi_div488: hsi.map(|hsi| hsi/488u32), hsi_hse: None, afif: None, - #[cfg(any(stm32f4, stm32f7))] - dsi_phy: None, // TODO ); } diff --git a/embassy-stm32/src/rcc/h.rs b/embassy-stm32/src/rcc/h.rs index 3cc8a96c8..4d7004872 100644 --- a/embassy-stm32/src/rcc/h.rs +++ b/embassy-stm32/src/rcc/h.rs @@ -683,8 +683,6 @@ pub(crate) unsafe fn init(config: Config) { #[cfg(stm32h5)] audioclk: None, i2s_ckin: None, - #[cfg(any(stm32h7, stm32h7rs))] - dsi_phy: None, // TODO #[cfg(stm32h7rs)] spdifrx_symb: None, // TODO #[cfg(stm32h7rs)] diff --git a/embassy-stm32/src/rcc/l.rs b/embassy-stm32/src/rcc/l.rs index 1329a03ac..76c06e9f8 100644 --- a/embassy-stm32/src/rcc/l.rs +++ b/embassy-stm32/src/rcc/l.rs @@ -423,8 +423,6 @@ pub(crate) unsafe fn init(config: Config) { sai2_extclk: None, lsi: None, lse: None, - #[cfg(stm32l4)] - dsi_phy: None, ); } diff --git a/embassy-stm32/src/rcc/u5.rs b/embassy-stm32/src/rcc/u5.rs index 6ec0911bb..d6331f512 100644 --- a/embassy-stm32/src/rcc/u5.rs +++ b/embassy-stm32/src/rcc/u5.rs @@ -300,7 +300,6 @@ pub(crate) unsafe fn init(config: Config) { msik: None, shsi: None, shsi_div_2: None, - dsi_phy: None, ); } From f29deb24880947db785af175b23988c65c10a1df Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Jo=C3=ABl=20Schulz-Ansres?= Date: Thu, 2 May 2024 15:39:53 +0200 Subject: [PATCH 249/581] Add feature gate for f7 --- embassy-stm32/src/dsihost.rs | 3 ++- embassy-stm32/src/ltdc.rs | 9 ++++++++- 2 files changed, 10 insertions(+), 2 deletions(-) diff --git a/embassy-stm32/src/dsihost.rs b/embassy-stm32/src/dsihost.rs index 0537d22cf..c711672c8 100644 --- a/embassy-stm32/src/dsihost.rs +++ b/embassy-stm32/src/dsihost.rs @@ -1,11 +1,12 @@ //! DSI HOST -use crate::rcc::RccPeripheral; use core::marker::PhantomData; + use embassy_hal_internal::{into_ref, PeripheralRef}; //use crate::gpio::{AnyPin, SealedPin}; use crate::gpio::{AFType, AnyPin, Pull, Speed}; +use crate::rcc::RccPeripheral; use crate::{peripherals, Peripheral}; /// Performs a busy-wait delay for a specified number of microseconds. diff --git a/embassy-stm32/src/ltdc.rs b/embassy-stm32/src/ltdc.rs index 1cdf71e7e..f261fce38 100644 --- a/embassy-stm32/src/ltdc.rs +++ b/embassy-stm32/src/ltdc.rs @@ -1,7 +1,8 @@ //! LTDC +use core::marker::PhantomData; + use crate::rcc::RccPeripheral; use crate::{peripherals, Peripheral}; -use core::marker::PhantomData; /// LTDC driver. pub struct Ltdc<'d, T: Instance> { @@ -47,6 +48,12 @@ impl<'d, T: Instance> Ltdc<'d, T> { critical_section::with(|_cs| { // RM says the pllsaidivr should only be changed when pllsai is off. But this could have other unintended side effects. So let's just give it a try like this. // According to the debugger, this bit gets set, anyway. + #[cfg(stm32f7)] + stm32_metapac::RCC + .dckcfgr1() + .modify(|w| w.set_pllsaidivr(stm32_metapac::rcc::vals::Pllsaidivr::DIV2)); + + #[cfg(not(stm32f7))] stm32_metapac::RCC .dckcfgr() .modify(|w| w.set_pllsaidivr(stm32_metapac::rcc::vals::Pllsaidivr::DIV2)); From bcbb48631170626a9eb5d6785a34c7c52fe65b29 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Jo=C3=ABl=20Schulz-Ansres?= Date: Thu, 2 May 2024 15:57:52 +0200 Subject: [PATCH 250/581] Feature-gate u5 --- embassy-stm32/src/ltdc.rs | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/embassy-stm32/src/ltdc.rs b/embassy-stm32/src/ltdc.rs index f261fce38..b623468da 100644 --- a/embassy-stm32/src/ltdc.rs +++ b/embassy-stm32/src/ltdc.rs @@ -53,7 +53,7 @@ impl<'d, T: Instance> Ltdc<'d, T> { .dckcfgr1() .modify(|w| w.set_pllsaidivr(stm32_metapac::rcc::vals::Pllsaidivr::DIV2)); - #[cfg(not(stm32f7))] + #[cfg(not(any(stm32f7, stm32u5)))] stm32_metapac::RCC .dckcfgr() .modify(|w| w.set_pllsaidivr(stm32_metapac::rcc::vals::Pllsaidivr::DIV2)); From 0febc24de73f8cf2bd0e3a7e7409f19aeaf00b1c Mon Sep 17 00:00:00 2001 From: Karun Date: Mon, 22 Apr 2024 10:22:04 -0400 Subject: [PATCH 251/581] Initial fill out of driver without IO considerations --- embassy-stm32/build.rs | 32 +++ embassy-stm32/src/lib.rs | 2 + embassy-stm32/src/tsc/enums.rs | 100 +++++++++ embassy-stm32/src/tsc/mod.rs | 357 +++++++++++++++++++++++++++++++++ 4 files changed, 491 insertions(+) create mode 100644 embassy-stm32/src/tsc/enums.rs create mode 100644 embassy-stm32/src/tsc/mod.rs diff --git a/embassy-stm32/build.rs b/embassy-stm32/build.rs index ba118f338..a84af258e 100644 --- a/embassy-stm32/build.rs +++ b/embassy-stm32/build.rs @@ -1030,6 +1030,38 @@ fn main() { (("octospi", "NCS"), quote!(crate::ospi::NSSPin)), (("octospi", "CLK"), quote!(crate::ospi::SckPin)), (("octospi", "NCLK"), quote!(crate::ospi::NckPin)), + (("tsc", "G1_IO1"), quote!(crate::ospi::G1IO1Pin)), + (("tsc", "G1_IO2"), quote!(crate::ospi::G1IO2Pin)), + (("tsc", "G1_IO3"), quote!(crate::ospi::G1IO3Pin)), + (("tsc", "G1_IO4"), quote!(crate::ospi::G1IO4Pin)), + (("tsc", "G2_IO1"), quote!(crate::ospi::G2IO1Pin)), + (("tsc", "G2_IO2"), quote!(crate::ospi::G2IO2Pin)), + (("tsc", "G2_IO3"), quote!(crate::ospi::G2IO3Pin)), + (("tsc", "G2_IO4"), quote!(crate::ospi::G2IO4Pin)), + (("tsc", "G3_IO1"), quote!(crate::ospi::G3IO1Pin)), + (("tsc", "G3_IO2"), quote!(crate::ospi::G3IO2Pin)), + (("tsc", "G3_IO3"), quote!(crate::ospi::G3IO3Pin)), + (("tsc", "G3_IO4"), quote!(crate::ospi::G3IO4Pin)), + (("tsc", "G4_IO1"), quote!(crate::ospi::G4IO1Pin)), + (("tsc", "G4_IO2"), quote!(crate::ospi::G4IO2Pin)), + (("tsc", "G4_IO3"), quote!(crate::ospi::G4IO3Pin)), + (("tsc", "G4_IO4"), quote!(crate::ospi::G4IO4Pin)), + (("tsc", "G5_IO1"), quote!(crate::ospi::G5IO1Pin)), + (("tsc", "G5_IO2"), quote!(crate::ospi::G5IO2Pin)), + (("tsc", "G5_IO3"), quote!(crate::ospi::G5IO3Pin)), + (("tsc", "G5_IO4"), quote!(crate::ospi::G5IO4Pin)), + (("tsc", "G6_IO1"), quote!(crate::ospi::G6IO1Pin)), + (("tsc", "G6_IO2"), quote!(crate::ospi::G6IO2Pin)), + (("tsc", "G6_IO3"), quote!(crate::ospi::G6IO3Pin)), + (("tsc", "G6_IO4"), quote!(crate::ospi::G6IO4Pin)), + (("tsc", "G7_IO1"), quote!(crate::ospi::G7IO1Pin)), + (("tsc", "G7_IO2"), quote!(crate::ospi::G7IO2Pin)), + (("tsc", "G7_IO3"), quote!(crate::ospi::G7IO3Pin)), + (("tsc", "G7_IO4"), quote!(crate::ospi::G7IO4Pin)), + (("tsc", "G8_IO1"), quote!(crate::ospi::G8IO1Pin)), + (("tsc", "G8_IO2"), quote!(crate::ospi::G8IO2Pin)), + (("tsc", "G8_IO3"), quote!(crate::ospi::G8IO3Pin)), + (("tsc", "G8_IO4"), quote!(crate::ospi::G8IO4Pin)), ].into(); for p in METADATA.peripherals { diff --git a/embassy-stm32/src/lib.rs b/embassy-stm32/src/lib.rs index 1f4e9ab1e..dd89618ef 100644 --- a/embassy-stm32/src/lib.rs +++ b/embassy-stm32/src/lib.rs @@ -103,6 +103,8 @@ pub mod sdmmc; pub mod spi; #[cfg(ucpd)] pub mod ucpd; +#[cfg(tsc)] +pub mod tsc; #[cfg(uid)] pub mod uid; #[cfg(usart)] diff --git a/embassy-stm32/src/tsc/enums.rs b/embassy-stm32/src/tsc/enums.rs new file mode 100644 index 000000000..6dfc8709c --- /dev/null +++ b/embassy-stm32/src/tsc/enums.rs @@ -0,0 +1,100 @@ +/// Charge transfer pulse cycles +#[allow(missing_docs)] +#[derive(Copy, Clone)] +pub enum ChargeTransferPulseCycle { + _1, + _2, + _3, + _4, + _5, + _6, + _7, + _8, + _9, + _10, + _11, + _12, + _13, + _14, + _15, + _16, +} + +impl Into for ChargeTransferPulseCycle { + fn into(self) -> u8 { + match self { + ChargeTransferPulseCycle::_1 => 0, + ChargeTransferPulseCycle::_2 => 1, + ChargeTransferPulseCycle::_3 => 2, + ChargeTransferPulseCycle::_4 => 3, + ChargeTransferPulseCycle::_5 => 4, + ChargeTransferPulseCycle::_6 => 5, + ChargeTransferPulseCycle::_7 => 6, + ChargeTransferPulseCycle::_8 => 7, + ChargeTransferPulseCycle::_9 => 8, + ChargeTransferPulseCycle::_10 => 9, + ChargeTransferPulseCycle::_11 => 10, + ChargeTransferPulseCycle::_12 => 11, + ChargeTransferPulseCycle::_13 => 12, + ChargeTransferPulseCycle::_14 => 13, + ChargeTransferPulseCycle::_15 => 14, + ChargeTransferPulseCycle::_16 => 15, + } + } +} + +/// Prescaler divider +#[allow(missing_docs)] +#[derive(Copy, Clone)] +pub enum PGPrescalerDivider { + _1, + _2, + _4, + _8, + _16, + _32, + _64, + _128, +} + +impl Into for PGPrescalerDivider { + fn into(self) -> u8 { + match self { + PGPrescalerDivider::_1 => 0, + PGPrescalerDivider::_2 => 1, + PGPrescalerDivider::_4 => 2, + PGPrescalerDivider::_8 => 3, + PGPrescalerDivider::_16 => 4, + PGPrescalerDivider::_32 => 5, + PGPrescalerDivider::_64 => 6, + PGPrescalerDivider::_128 => 7, + } + } +} + +/// Max count +#[allow(missing_docs)] +#[derive(Copy, Clone)] +pub enum MaxCount { + _255, + _511, + _1023, + _2047, + _4095, + _8191, + _16383, +} + +impl Into for MaxCount { + fn into(self) -> u8 { + match self { + MaxCount::_255 => 0, + MaxCount::_511 => 1, + MaxCount::_1023 => 2, + MaxCount::_2047 => 3, + MaxCount::_4095 => 4, + MaxCount::_8191 => 5, + MaxCount::_16383 => 6, + } + } +} diff --git a/embassy-stm32/src/tsc/mod.rs b/embassy-stm32/src/tsc/mod.rs new file mode 100644 index 000000000..6bff642fa --- /dev/null +++ b/embassy-stm32/src/tsc/mod.rs @@ -0,0 +1,357 @@ +//! TSC Peripheral Interface + +#![macro_use] + +pub mod enums; + +use crate::gpio::AnyPin; +use crate::{pac::tsc::Tsc as Regs, rcc::RccPeripheral}; +use crate::{peripherals, Peripheral}; +use embassy_hal_internal::{into_ref, PeripheralRef}; + +pub use enums::*; + +#[derive(Debug)] +#[cfg_attr(feature = "defmt", derive(defmt::Format))] +pub enum Error { + /// Test error for TSC + Test, +} + +pub enum PinType { + Channel, + Sample, + Shield, +} + +pub struct TscGroup {} + +pub enum State { + Reset, + Ready, + Busy, + Error, +} + +pub enum GroupStatus { + Ongoing, + Complete, +} + +pub enum Group { + One, + Two, + Three, + Four, + Five, + Six, + Seven, + Eight, +} + +impl Into for Group { + fn into(self) -> usize { + match self { + Group::One => 0, + Group::Two => 1, + Group::Three => 2, + Group::Four => 3, + Group::Five => 4, + Group::Six => 5, + Group::Seven => 6, + Group::Eight => 7, + } + } +} + +pub struct Config { + pub ct_pulse_high_length: ChargeTransferPulseCycle, + pub ct_pulse_low_length: ChargeTransferPulseCycle, + pub spread_spectrum: bool, + pub spread_spectrum_deviation: u8, + pub spread_spectrum_prescaler: bool, + pub pulse_generator_prescaler: PGPrescalerDivider, + pub max_count_value: u8, + pub io_default_mode: bool, + pub synchro_pin_polarity: bool, + pub acquisition_mode: bool, + pub max_count_interrupt: bool, + pub channel_ios: u32, + pub shield_ios: u32, + pub sampling_ios: u32, +} + +pub struct TSC<'d, T: Instance> { + _peri: PeripheralRef<'d, T>, + state: State, + config: Config, +} + +impl<'d, T: Instance> TSC<'d, T> { + pub fn new(peri: impl Peripheral

+ 'd, config: Config) -> Self { + into_ref!(peri); + + // Need to check valid pin configuration input + // Need to configure pin + Self::new_inner(peri, config) + } + + fn new_inner(peri: impl Peripheral

+ 'd, config: Config) -> Self { + into_ref!(peri); + + T::enable_and_reset(); + + T::REGS.cr().modify(|w| { + w.set_tsce(true); + w.set_ctph(config.ct_pulse_high_length.into()); + w.set_ctpl(config.ct_pulse_low_length.into()); + w.set_sse(config.spread_spectrum); + w.set_ssd(config.spread_spectrum_deviation); + w.set_sspsc(config.spread_spectrum_prescaler); + w.set_pgpsc(config.pulse_generator_prescaler.into()); + w.set_mcv(config.max_count_value); + w.set_syncpol(config.synchro_pin_polarity); + w.set_am(config.acquisition_mode) + }); + + // Set IO configuration + // Disable Schmitt trigger hysteresis on all used TSC IOs + // T::REGS.iohcr().modify(|w| { + // w. + // }); + + // Set channel and shield IOs + // T::REGS.ioccr().modify(|w| {}); + + // Set sampling IOs + // T::REGS.ioscr().modify(|w| { + // w.set_g1_io1(val) + // }); + + // Set the groups to be acquired + // T::REGS.iogcsr().modify(|w| { + // w.set_g1e(val); + // }); + + // Disable interrupts + T::REGS.ier().modify(|w| { + w.set_eoaie(false); + w.set_mceie(false); + }); + + // Clear flags + T::REGS.icr().modify(|w| { + w.set_eoaic(true); + w.set_mceic(true); + }); + + Self { + _peri: peri, + state: State::Ready, + config, + } + } + + pub fn start(&mut self) { + self.state = State::Busy; + + // Disable interrupts + T::REGS.ier().modify(|w| { + w.set_eoaie(false); + w.set_mceie(false); + }); + + // Clear flags + T::REGS.icr().modify(|w| { + w.set_eoaic(true); + w.set_mceic(true); + }); + + // Set the touch sensing IOs not acquired to the default mode + T::REGS.cr().modify(|w| { + w.set_iodef(self.config.io_default_mode); + }); + + // Start the acquisition + T::REGS.cr().modify(|w| { + w.set_start(true); + }); + } + + pub fn start_it(&mut self) { + self.state = State::Busy; + + // Enable interrupts + T::REGS.ier().modify(|w| { + w.set_eoaie(true); + w.set_mceie(self.config.max_count_interrupt); + }); + + // Clear flags + T::REGS.icr().modify(|w| { + w.set_eoaic(true); + w.set_mceic(true); + }); + + // Set the touch sensing IOs not acquired to the default mode + T::REGS.cr().modify(|w| { + w.set_iodef(self.config.io_default_mode); + }); + + // Start the acquisition + T::REGS.cr().modify(|w| { + w.set_start(true); + }); + } + + pub fn stop(&mut self) { + T::REGS.cr().modify(|w| { + w.set_start(false); + }); + + // Set the touch sensing IOs in low power mode + T::REGS.cr().modify(|w| { + w.set_iodef(false); + }); + + // Clear flags + T::REGS.icr().modify(|w| { + w.set_eoaic(true); + w.set_mceic(true); + }); + + self.state = State::Ready; + } + + pub fn stop_it(&mut self) { + T::REGS.cr().modify(|w| { + w.set_start(false); + }); + + // Set the touch sensing IOs in low power mode + T::REGS.cr().modify(|w| { + w.set_iodef(false); + }); + + // Disable interrupts + T::REGS.ier().modify(|w| { + w.set_eoaie(false); + w.set_mceie(false); + }); + + // Clear flags + T::REGS.icr().modify(|w| { + w.set_eoaic(true); + w.set_mceic(true); + }); + + self.state = State::Ready; + } + + pub fn poll_for_acquisition(&mut self) { + while self.get_state() == State::Busy {} + } + + pub fn get_state(&mut self) -> State { + if self.state == State::Busy { + if T::REGS.isr().read().eoaf() { + if T::REGS.isr().read().mcef() { + self.state = State::Error + } else { + self.state = State::Ready + } + } + } + self.state + } + + pub fn group_get_status(&mut self, index: Group) -> GroupStatus { + // Status bits are set by hardware when the acquisition on the corresponding + // enabled analog IO group is complete, cleared when new acquisition is started + let status = match index { + Group::One => T::REGS.iogcsr().read().g1s(), + Group::Two => T::REGS.iogcsr().read().g2s(), + Group::Three => T::REGS.iogcsr().read().g3s(), + Group::Four => T::REGS.iogcsr().read().g4s(), + Group::Five => T::REGS.iogcsr().read().g5s(), + Group::Six => T::REGS.iogcsr().read().g6s(), + Group::Seven => T::REGS.iogcsr().read().g7s(), + Group::Eight => T::REGS.iogcsr().read().g8s(), + }; + match status { + true => GroupStatus::Complete, + false => GroupStatus::Ongoing, + } + } + + pub fn group_get_value(&mut self, index: Group) -> u16 { + T::REGS.iogcr(index.into()).read().cnt() + } + + // pub fn configure_io() + + pub fn discharge_io(&mut self, status: bool) { + // Set the touch sensing IOs in low power mode + T::REGS.cr().modify(|w| { + w.set_iodef(!status); + }); + } +} + +impl<'d, T: Instance> Drop for TSC<'d, T> { + fn drop(&mut self) { + // Need to figure out what to do with the IOs + T::disable(); + } +} + +pub(crate) trait SealedInstance { + const REGS: Regs; +} + +/// TSC instance trait +#[allow(private_bounds)] +pub trait Instance: Peripheral

+ SealedInstance + RccPeripheral {} + +foreach_peripheral!( + (tsc, $inst:ident) => { + impl SealedInstance for peripherals::$inst { + const REGS: Regs = crate::pac::$inst; + } + + impl Instance for peripherals::$inst {} + }; +); + +pin_trait!(G1IO1Pin, Instance); +pin_trait!(G1IO2Pin, Instance); +pin_trait!(G1IO3Pin, Instance); +pin_trait!(G1IO4Pin, Instance); +pin_trait!(G2IO1Pin, Instance); +pin_trait!(G2IO2Pin, Instance); +pin_trait!(G2IO3Pin, Instance); +pin_trait!(G2IO4Pin, Instance); +pin_trait!(G3IO1Pin, Instance); +pin_trait!(G3IO2Pin, Instance); +pin_trait!(G3IO3Pin, Instance); +pin_trait!(G3IO4Pin, Instance); +pin_trait!(G4IO1Pin, Instance); +pin_trait!(G4IO2Pin, Instance); +pin_trait!(G4IO3Pin, Instance); +pin_trait!(G4IO4Pin, Instance); +pin_trait!(G5IO1Pin, Instance); +pin_trait!(G5IO2Pin, Instance); +pin_trait!(G5IO3Pin, Instance); +pin_trait!(G5IO4Pin, Instance); +pin_trait!(G6IO1Pin, Instance); +pin_trait!(G6IO2Pin, Instance); +pin_trait!(G6IO3Pin, Instance); +pin_trait!(G6IO4Pin, Instance); +pin_trait!(G7IO1Pin, Instance); +pin_trait!(G7IO2Pin, Instance); +pin_trait!(G7IO3Pin, Instance); +pin_trait!(G7IO4Pin, Instance); +pin_trait!(G8IO1Pin, Instance); +pin_trait!(G8IO2Pin, Instance); +pin_trait!(G8IO3Pin, Instance); +pin_trait!(G8IO4Pin, Instance); From bef76ee05744077cf9a14df23947eb6de4a8346d Mon Sep 17 00:00:00 2001 From: Karun Date: Wed, 17 Apr 2024 12:58:45 -0400 Subject: [PATCH 252/581] initial set of io changes --- embassy-stm32/src/tsc/mod.rs | 73 +++++++++++++++++++++++++++++++++++- 1 file changed, 71 insertions(+), 2 deletions(-) diff --git a/embassy-stm32/src/tsc/mod.rs b/embassy-stm32/src/tsc/mod.rs index 6bff642fa..1a8aabbc6 100644 --- a/embassy-stm32/src/tsc/mod.rs +++ b/embassy-stm32/src/tsc/mod.rs @@ -81,14 +81,81 @@ pub struct Config { pub sampling_ios: u32, } +pub struct TscPin<'d, T> { + pin: PeripheralRef<'d, AnyPin>, + role: PinType, +} + +pub struct PinGroup<'d, A, B, C, D> { + d1: Option>, + d2: Option>, + d3: Option>, + d4: Option>, +} + pub struct TSC<'d, T: Instance> { _peri: PeripheralRef<'d, T>, + g1: Option>, + g2: Option>, + g3: Option>, + g4: Option>, + g5: Option>, + g6: Option>, + g7: Option>, + g8: Option>, state: State, config: Config, } impl<'d, T: Instance> TSC<'d, T> { - pub fn new(peri: impl Peripheral

+ 'd, config: Config) -> Self { + pub fn new( + peri: impl Peripheral

+ 'd, + g1: Option< + PinGroup< + 'd, + impl Peripheral

> + 'd, + impl Peripheral

> + 'd, + impl Peripheral

> + 'd, + impl Peripheral

> + 'd, + >, + >, + + g2_d1: Option> + 'd>, + g2_d2: Option> + 'd>, + g2_d3: Option> + 'd>, + g2_d4: Option> + 'd>, + + g3_d1: Option> + 'd>, + g3_d2: Option> + 'd>, + g3_d3: Option> + 'd>, + g3_d4: Option> + 'd>, + + g4_d1: Option> + 'd>, + g4_d2: Option> + 'd>, + g4_d3: Option> + 'd>, + g4_d4: Option> + 'd>, + + g5_d1: Option> + 'd>, + g5_d2: Option> + 'd>, + g5_d3: Option> + 'd>, + g5_d4: Option> + 'd>, + + g6_d1: Option> + 'd>, + g6_d2: Option> + 'd>, + g6_d3: Option> + 'd>, + g6_d4: Option> + 'd>, + + g7_d1: Option> + 'd>, + g7_d2: Option> + 'd>, + g7_d3: Option> + 'd>, + g7_d4: Option> + 'd>, + + g8_d1: Option> + 'd>, + g8_d2: Option> + 'd>, + g8_d3: Option> + 'd>, + g8_d4: Option> + 'd>, + config: Config, + ) -> Self { into_ref!(peri); // Need to check valid pin configuration input @@ -96,6 +163,8 @@ impl<'d, T: Instance> TSC<'d, T> { Self::new_inner(peri, config) } + fn filter_group() -> Result, ()> {} + fn new_inner(peri: impl Peripheral

+ 'd, config: Config) -> Self { into_ref!(peri); @@ -111,7 +180,7 @@ impl<'d, T: Instance> TSC<'d, T> { w.set_pgpsc(config.pulse_generator_prescaler.into()); w.set_mcv(config.max_count_value); w.set_syncpol(config.synchro_pin_polarity); - w.set_am(config.acquisition_mode) + w.set_am(config.acquisition_mode); }); // Set IO configuration From bcd923a4b003224b67ac2a2c472730f3a05e7590 Mon Sep 17 00:00:00 2001 From: Karun Date: Fri, 19 Apr 2024 11:20:04 -0400 Subject: [PATCH 253/581] fix create build pin traits --- embassy-stm32/build.rs | 64 +++++++++++++++++++++--------------------- 1 file changed, 32 insertions(+), 32 deletions(-) diff --git a/embassy-stm32/build.rs b/embassy-stm32/build.rs index a84af258e..8b6720ae8 100644 --- a/embassy-stm32/build.rs +++ b/embassy-stm32/build.rs @@ -1030,38 +1030,38 @@ fn main() { (("octospi", "NCS"), quote!(crate::ospi::NSSPin)), (("octospi", "CLK"), quote!(crate::ospi::SckPin)), (("octospi", "NCLK"), quote!(crate::ospi::NckPin)), - (("tsc", "G1_IO1"), quote!(crate::ospi::G1IO1Pin)), - (("tsc", "G1_IO2"), quote!(crate::ospi::G1IO2Pin)), - (("tsc", "G1_IO3"), quote!(crate::ospi::G1IO3Pin)), - (("tsc", "G1_IO4"), quote!(crate::ospi::G1IO4Pin)), - (("tsc", "G2_IO1"), quote!(crate::ospi::G2IO1Pin)), - (("tsc", "G2_IO2"), quote!(crate::ospi::G2IO2Pin)), - (("tsc", "G2_IO3"), quote!(crate::ospi::G2IO3Pin)), - (("tsc", "G2_IO4"), quote!(crate::ospi::G2IO4Pin)), - (("tsc", "G3_IO1"), quote!(crate::ospi::G3IO1Pin)), - (("tsc", "G3_IO2"), quote!(crate::ospi::G3IO2Pin)), - (("tsc", "G3_IO3"), quote!(crate::ospi::G3IO3Pin)), - (("tsc", "G3_IO4"), quote!(crate::ospi::G3IO4Pin)), - (("tsc", "G4_IO1"), quote!(crate::ospi::G4IO1Pin)), - (("tsc", "G4_IO2"), quote!(crate::ospi::G4IO2Pin)), - (("tsc", "G4_IO3"), quote!(crate::ospi::G4IO3Pin)), - (("tsc", "G4_IO4"), quote!(crate::ospi::G4IO4Pin)), - (("tsc", "G5_IO1"), quote!(crate::ospi::G5IO1Pin)), - (("tsc", "G5_IO2"), quote!(crate::ospi::G5IO2Pin)), - (("tsc", "G5_IO3"), quote!(crate::ospi::G5IO3Pin)), - (("tsc", "G5_IO4"), quote!(crate::ospi::G5IO4Pin)), - (("tsc", "G6_IO1"), quote!(crate::ospi::G6IO1Pin)), - (("tsc", "G6_IO2"), quote!(crate::ospi::G6IO2Pin)), - (("tsc", "G6_IO3"), quote!(crate::ospi::G6IO3Pin)), - (("tsc", "G6_IO4"), quote!(crate::ospi::G6IO4Pin)), - (("tsc", "G7_IO1"), quote!(crate::ospi::G7IO1Pin)), - (("tsc", "G7_IO2"), quote!(crate::ospi::G7IO2Pin)), - (("tsc", "G7_IO3"), quote!(crate::ospi::G7IO3Pin)), - (("tsc", "G7_IO4"), quote!(crate::ospi::G7IO4Pin)), - (("tsc", "G8_IO1"), quote!(crate::ospi::G8IO1Pin)), - (("tsc", "G8_IO2"), quote!(crate::ospi::G8IO2Pin)), - (("tsc", "G8_IO3"), quote!(crate::ospi::G8IO3Pin)), - (("tsc", "G8_IO4"), quote!(crate::ospi::G8IO4Pin)), + (("tsc", "G1_IO1"), quote!(crate::tsc::G1IO1Pin)), + (("tsc", "G1_IO2"), quote!(crate::tsc::G1IO2Pin)), + (("tsc", "G1_IO3"), quote!(crate::tsc::G1IO3Pin)), + (("tsc", "G1_IO4"), quote!(crate::tsc::G1IO4Pin)), + (("tsc", "G2_IO1"), quote!(crate::tsc::G2IO1Pin)), + (("tsc", "G2_IO2"), quote!(crate::tsc::G2IO2Pin)), + (("tsc", "G2_IO3"), quote!(crate::tsc::G2IO3Pin)), + (("tsc", "G2_IO4"), quote!(crate::tsc::G2IO4Pin)), + (("tsc", "G3_IO1"), quote!(crate::tsc::G3IO1Pin)), + (("tsc", "G3_IO2"), quote!(crate::tsc::G3IO2Pin)), + (("tsc", "G3_IO3"), quote!(crate::tsc::G3IO3Pin)), + (("tsc", "G3_IO4"), quote!(crate::tsc::G3IO4Pin)), + (("tsc", "G4_IO1"), quote!(crate::tsc::G4IO1Pin)), + (("tsc", "G4_IO2"), quote!(crate::tsc::G4IO2Pin)), + (("tsc", "G4_IO3"), quote!(crate::tsc::G4IO3Pin)), + (("tsc", "G4_IO4"), quote!(crate::tsc::G4IO4Pin)), + (("tsc", "G5_IO1"), quote!(crate::tsc::G5IO1Pin)), + (("tsc", "G5_IO2"), quote!(crate::tsc::G5IO2Pin)), + (("tsc", "G5_IO3"), quote!(crate::tsc::G5IO3Pin)), + (("tsc", "G5_IO4"), quote!(crate::tsc::G5IO4Pin)), + (("tsc", "G6_IO1"), quote!(crate::tsc::G6IO1Pin)), + (("tsc", "G6_IO2"), quote!(crate::tsc::G6IO2Pin)), + (("tsc", "G6_IO3"), quote!(crate::tsc::G6IO3Pin)), + (("tsc", "G6_IO4"), quote!(crate::tsc::G6IO4Pin)), + (("tsc", "G7_IO1"), quote!(crate::tsc::G7IO1Pin)), + (("tsc", "G7_IO2"), quote!(crate::tsc::G7IO2Pin)), + (("tsc", "G7_IO3"), quote!(crate::tsc::G7IO3Pin)), + (("tsc", "G7_IO4"), quote!(crate::tsc::G7IO4Pin)), + (("tsc", "G8_IO1"), quote!(crate::tsc::G8IO1Pin)), + (("tsc", "G8_IO2"), quote!(crate::tsc::G8IO2Pin)), + (("tsc", "G8_IO3"), quote!(crate::tsc::G8IO3Pin)), + (("tsc", "G8_IO4"), quote!(crate::tsc::G8IO4Pin)), ].into(); for p in METADATA.peripherals { From 0b606b57f101b4c8081e76de86c7224763deb9e1 Mon Sep 17 00:00:00 2001 From: Karun Date: Fri, 19 Apr 2024 11:20:24 -0400 Subject: [PATCH 254/581] Add crate documentation --- embassy-stm32/src/tsc/mod.rs | 141 +++++++++++++++++++++++++++-------- 1 file changed, 109 insertions(+), 32 deletions(-) diff --git a/embassy-stm32/src/tsc/mod.rs b/embassy-stm32/src/tsc/mod.rs index 1a8aabbc6..60dd734c4 100644 --- a/embassy-stm32/src/tsc/mod.rs +++ b/embassy-stm32/src/tsc/mod.rs @@ -2,6 +2,7 @@ #![macro_use] +/// Enums defined for peripheral parameters pub mod enums; use crate::gpio::AnyPin; @@ -11,6 +12,7 @@ use embassy_hal_internal::{into_ref, PeripheralRef}; pub use enums::*; +/// Error type defined for TSC #[derive(Debug)] #[cfg_attr(feature = "defmt", derive(defmt::Format))] pub enum Error { @@ -18,26 +20,45 @@ pub enum Error { Test, } +/// Pin type definition to control IO parameters pub enum PinType { + /// Sensing channel pin connected to an electrode Channel, + /// Sampling capacitor pin, one required for every pin group Sample, + /// Shield pin connected to capacitive sensing shield Shield, } +/// Unclear pub struct TscGroup {} +/// Peripheral state +#[derive(PartialEq, Clone, Copy)] pub enum State { + /// Peripheral is being setup or reconfigured Reset, + /// Ready to start acquisition Ready, + /// In process of sensor acquisition Busy, + /// Error occured during acquisition Error, } +/// Individual group status checked after acquisition reported as complete +/// For groups with multiple channel pins, may take longer because acquisitions +/// are done sequentially. Check this status before pulling count for each +/// sampled channel pub enum GroupStatus { + /// Acquisition for channel still in progress Ongoing, + /// Acquisition either not started or complete Complete, } +/// Group identifier used to interrogate status +#[allow(missing_docs)] pub enum Group { One, Two, @@ -64,61 +85,99 @@ impl Into for Group { } } +/// Peripheral configuration +#[derive(Clone, Copy)] pub struct Config { + /// Duration of high state of the charge transfer pulse pub ct_pulse_high_length: ChargeTransferPulseCycle, + /// Duration of the low state of the charge transfer pulse pub ct_pulse_low_length: ChargeTransferPulseCycle, + /// Enable/disable of spread spectrum feature pub spread_spectrum: bool, + /// Adds variable number of periods of the SS clk to pulse high state pub spread_spectrum_deviation: u8, + /// Selects AHB clock divider used to generate SS clk pub spread_spectrum_prescaler: bool, + /// Selects AHB clock divider used to generate pulse generator clk pub pulse_generator_prescaler: PGPrescalerDivider, - pub max_count_value: u8, + /// Maximum number of charge tranfer pulses that can be generated before error + pub max_count_value: MaxCount, + /// Defines config of all IOs when no ongoing acquisition pub io_default_mode: bool, + /// Polarity of sync input pin pub synchro_pin_polarity: bool, + /// Acquisition starts when start bit is set or with sync pin input pub acquisition_mode: bool, + /// Enable max count interrupt pub max_count_interrupt: bool, - pub channel_ios: u32, - pub shield_ios: u32, - pub sampling_ios: u32, } +impl Default for Config { + fn default() -> Self { + Self { + ct_pulse_high_length: ChargeTransferPulseCycle::_1, + ct_pulse_low_length: ChargeTransferPulseCycle::_1, + spread_spectrum: false, + spread_spectrum_deviation: 0, + spread_spectrum_prescaler: false, + pulse_generator_prescaler: PGPrescalerDivider::_1, + max_count_value: MaxCount::_255, + io_default_mode: false, + synchro_pin_polarity: false, + acquisition_mode: false, + max_count_interrupt: false, + } + } +} + +/// Pin struct that maintains usage +#[allow(missing_docs)] pub struct TscPin<'d, T> { - pin: PeripheralRef<'d, AnyPin>, + pin: PeripheralRef<'d, T>, role: PinType, } -pub struct PinGroup<'d, A, B, C, D> { - d1: Option>, - d2: Option>, - d3: Option>, - d4: Option>, +/// Input structure for constructor containing peripherals +#[allow(missing_docs)] +pub struct PeriPin { + pub pin: T, + pub role: PinType, } -pub struct TSC<'d, T: Instance> { +/// Pin group definition +/// Pins are organized into groups of four IOs, all groups with a +/// sampling channel must also have a sampling capacitor channel. +#[allow(missing_docs)] +pub struct PinGroup<'d, A> { + pub d1: Option>, + pub d2: Option>, + pub d3: Option>, + pub d4: Option>, +} + +/// TSC driver +pub struct Tsc<'d, T: Instance> { _peri: PeripheralRef<'d, T>, - g1: Option>, - g2: Option>, - g3: Option>, - g4: Option>, - g5: Option>, - g6: Option>, - g7: Option>, - g8: Option>, + g1: Option>, + g2: Option>, + g3: Option>, + g4: Option>, + g5: Option>, + g6: Option>, + g7: Option>, + g8: Option>, state: State, config: Config, } -impl<'d, T: Instance> TSC<'d, T> { +impl<'d, T: Instance> Tsc<'d, T> { + /// Create new TSC driver pub fn new( peri: impl Peripheral

+ 'd, - g1: Option< - PinGroup< - 'd, - impl Peripheral

> + 'd, - impl Peripheral

> + 'd, - impl Peripheral

> + 'd, - impl Peripheral

> + 'd, - >, - >, + // g1_d1: Option> + 'd>>, + g1_d2: Option> + 'd>>, + g1_d3: Option> + 'd>>, + g1_d4: Option> + 'd>, g2_d1: Option> + 'd>, g2_d2: Option> + 'd>, @@ -154,6 +213,7 @@ impl<'d, T: Instance> TSC<'d, T> { g8_d2: Option> + 'd>, g8_d3: Option> + 'd>, g8_d4: Option> + 'd>, + config: Config, ) -> Self { into_ref!(peri); @@ -163,7 +223,7 @@ impl<'d, T: Instance> TSC<'d, T> { Self::new_inner(peri, config) } - fn filter_group() -> Result, ()> {} + // fn filter_group() -> Option> {} fn new_inner(peri: impl Peripheral

+ 'd, config: Config) -> Self { into_ref!(peri); @@ -178,7 +238,7 @@ impl<'d, T: Instance> TSC<'d, T> { w.set_ssd(config.spread_spectrum_deviation); w.set_sspsc(config.spread_spectrum_prescaler); w.set_pgpsc(config.pulse_generator_prescaler.into()); - w.set_mcv(config.max_count_value); + w.set_mcv(config.max_count_value.into()); w.set_syncpol(config.synchro_pin_polarity); w.set_am(config.acquisition_mode); }); @@ -216,11 +276,20 @@ impl<'d, T: Instance> TSC<'d, T> { Self { _peri: peri, + g1: None, + g2: None, + g3: None, + g4: None, + g5: None, + g6: None, + g7: None, + g8: None, state: State::Ready, config, } } + /// Start charge transfer acquisition pub fn start(&mut self) { self.state = State::Busy; @@ -247,6 +316,7 @@ impl<'d, T: Instance> TSC<'d, T> { }); } + /// Start charge transfer acquisition with interrupts enabled pub fn start_it(&mut self) { self.state = State::Busy; @@ -273,6 +343,7 @@ impl<'d, T: Instance> TSC<'d, T> { }); } + /// Stop charge transfer acquisition pub fn stop(&mut self) { T::REGS.cr().modify(|w| { w.set_start(false); @@ -292,6 +363,7 @@ impl<'d, T: Instance> TSC<'d, T> { self.state = State::Ready; } + /// Stop charge transfer acquisition and clear interrupts pub fn stop_it(&mut self) { T::REGS.cr().modify(|w| { w.set_start(false); @@ -317,10 +389,12 @@ impl<'d, T: Instance> TSC<'d, T> { self.state = State::Ready; } + /// Wait for end of acquisition pub fn poll_for_acquisition(&mut self) { while self.get_state() == State::Busy {} } + /// Get current state of acquisition pub fn get_state(&mut self) -> State { if self.state == State::Busy { if T::REGS.isr().read().eoaf() { @@ -334,6 +408,7 @@ impl<'d, T: Instance> TSC<'d, T> { self.state } + /// Get the individual group status to check acquisition complete pub fn group_get_status(&mut self, index: Group) -> GroupStatus { // Status bits are set by hardware when the acquisition on the corresponding // enabled analog IO group is complete, cleared when new acquisition is started @@ -353,12 +428,14 @@ impl<'d, T: Instance> TSC<'d, T> { } } + /// Get the count for the acquisiton, valid once group status is set pub fn group_get_value(&mut self, index: Group) -> u16 { T::REGS.iogcr(index.into()).read().cnt() } // pub fn configure_io() + /// Discharge the IOs for subsequent acquisition pub fn discharge_io(&mut self, status: bool) { // Set the touch sensing IOs in low power mode T::REGS.cr().modify(|w| { @@ -367,7 +444,7 @@ impl<'d, T: Instance> TSC<'d, T> { } } -impl<'d, T: Instance> Drop for TSC<'d, T> { +impl<'d, T: Instance> Drop for Tsc<'d, T> { fn drop(&mut self) { // Need to figure out what to do with the IOs T::disable(); From 87d2c66ef4be5396663f6f1724f3a15da31d0482 Mon Sep 17 00:00:00 2001 From: Karun Date: Fri, 19 Apr 2024 13:33:10 -0400 Subject: [PATCH 255/581] Add io pin masking --- embassy-stm32/src/tsc/enums.rs | 92 +++++++++++++++++++++++++++++ embassy-stm32/src/tsc/mod.rs | 102 +++++++++++++++++++-------------- 2 files changed, 152 insertions(+), 42 deletions(-) diff --git a/embassy-stm32/src/tsc/enums.rs b/embassy-stm32/src/tsc/enums.rs index 6dfc8709c..56df4173a 100644 --- a/embassy-stm32/src/tsc/enums.rs +++ b/embassy-stm32/src/tsc/enums.rs @@ -1,3 +1,95 @@ +use core::ops::BitOr; + +/// Pin defines +#[allow(missing_docs)] +pub enum TscIOPin { + Group1Io1, + Group1Io2, + Group1Io3, + Group1Io4, + Group2Io1, + Group2Io2, + Group2Io3, + Group2Io4, + Group3Io1, + Group3Io2, + Group3Io3, + Group3Io4, + Group4Io1, + Group4Io2, + Group4Io3, + Group4Io4, + Group5Io1, + Group5Io2, + Group5Io3, + Group5Io4, + Group6Io1, + Group6Io2, + Group6Io3, + Group6Io4, + Group7Io1, + Group7Io2, + Group7Io3, + Group7Io4, + Group8Io1, + Group8Io2, + Group8Io3, + Group8Io4, +} + +impl BitOr for u32 { + type Output = u32; + fn bitor(self, rhs: TscIOPin) -> Self::Output { + self | rhs as u32 + } +} + +impl BitOr for TscIOPin { + type Output = u32; + fn bitor(self, rhs: Self) -> Self::Output { + self as u32 | rhs as u32 + } +} + +impl Into for TscIOPin { + fn into(self) -> u32 { + match self { + TscIOPin::Group1Io1 => 0x00000001, + TscIOPin::Group1Io2 => 0x00000002, + TscIOPin::Group1Io3 => 0x00000004, + TscIOPin::Group1Io4 => 0x00000008, + TscIOPin::Group2Io1 => 0x00000010, + TscIOPin::Group2Io2 => 0x00000020, + TscIOPin::Group2Io3 => 0x00000040, + TscIOPin::Group2Io4 => 0x00000080, + TscIOPin::Group3Io1 => 0x00000100, + TscIOPin::Group3Io2 => 0x00000200, + TscIOPin::Group3Io3 => 0x00000400, + TscIOPin::Group3Io4 => 0x00000800, + TscIOPin::Group4Io1 => 0x00001000, + TscIOPin::Group4Io2 => 0x00002000, + TscIOPin::Group4Io3 => 0x00004000, + TscIOPin::Group4Io4 => 0x00008000, + TscIOPin::Group5Io1 => 0x00010000, + TscIOPin::Group5Io2 => 0x00020000, + TscIOPin::Group5Io3 => 0x00040000, + TscIOPin::Group5Io4 => 0x00080000, + TscIOPin::Group6Io1 => 0x00100000, + TscIOPin::Group6Io2 => 0x00200000, + TscIOPin::Group6Io3 => 0x00400000, + TscIOPin::Group6Io4 => 0x00800000, + TscIOPin::Group7Io1 => 0x01000000, + TscIOPin::Group7Io2 => 0x02000000, + TscIOPin::Group7Io3 => 0x04000000, + TscIOPin::Group7Io4 => 0x08000000, + TscIOPin::Group8Io1 => 0x10000000, + TscIOPin::Group8Io2 => 0x20000000, + TscIOPin::Group8Io3 => 0x40000000, + TscIOPin::Group8Io4 => 0x80000000, + } + } +} + /// Charge transfer pulse cycles #[allow(missing_docs)] #[derive(Copy, Clone)] diff --git a/embassy-stm32/src/tsc/mod.rs b/embassy-stm32/src/tsc/mod.rs index 60dd734c4..91cf7187a 100644 --- a/embassy-stm32/src/tsc/mod.rs +++ b/embassy-stm32/src/tsc/mod.rs @@ -6,12 +6,15 @@ pub mod enums; use crate::gpio::AnyPin; +use crate::pac::tsc::regs; use crate::{pac::tsc::Tsc as Regs, rcc::RccPeripheral}; use crate::{peripherals, Peripheral}; use embassy_hal_internal::{into_ref, PeripheralRef}; pub use enums::*; +const TSC_NUM_GROUPS: u32 = 8; + /// Error type defined for TSC #[derive(Debug)] #[cfg_attr(feature = "defmt", derive(defmt::Format))] @@ -110,6 +113,12 @@ pub struct Config { pub acquisition_mode: bool, /// Enable max count interrupt pub max_count_interrupt: bool, + /// Channel IO mask + pub channel_ios: u32, + /// Shield IO mask + pub shield_ios: u32, + /// Sampling IO mask + pub sampling_ios: u32, } impl Default for Config { @@ -126,6 +135,9 @@ impl Default for Config { synchro_pin_polarity: false, acquisition_mode: false, max_count_interrupt: false, + channel_ios: 0, + shield_ios: 0, + sampling_ios: 0, } } } @@ -175,45 +187,44 @@ impl<'d, T: Instance> Tsc<'d, T> { pub fn new( peri: impl Peripheral

+ 'd, // g1_d1: Option> + 'd>>, - g1_d2: Option> + 'd>>, - g1_d3: Option> + 'd>>, - g1_d4: Option> + 'd>, + // g1_d2: Option> + 'd>>, + // g1_d3: Option> + 'd>>, + // g1_d4: Option> + 'd>>, - g2_d1: Option> + 'd>, - g2_d2: Option> + 'd>, - g2_d3: Option> + 'd>, - g2_d4: Option> + 'd>, + // g2_d1: Option> + 'd>, + // g2_d2: Option> + 'd>, + // g2_d3: Option> + 'd>, + // g2_d4: Option> + 'd>, - g3_d1: Option> + 'd>, - g3_d2: Option> + 'd>, - g3_d3: Option> + 'd>, - g3_d4: Option> + 'd>, + // g3_d1: Option> + 'd>, + // g3_d2: Option> + 'd>, + // g3_d3: Option> + 'd>, + // g3_d4: Option> + 'd>, - g4_d1: Option> + 'd>, - g4_d2: Option> + 'd>, - g4_d3: Option> + 'd>, - g4_d4: Option> + 'd>, + // g4_d1: Option> + 'd>, + // g4_d2: Option> + 'd>, + // g4_d3: Option> + 'd>, + // g4_d4: Option> + 'd>, - g5_d1: Option> + 'd>, - g5_d2: Option> + 'd>, - g5_d3: Option> + 'd>, - g5_d4: Option> + 'd>, + // g5_d1: Option> + 'd>, + // g5_d2: Option> + 'd>, + // g5_d3: Option> + 'd>, + // g5_d4: Option> + 'd>, - g6_d1: Option> + 'd>, - g6_d2: Option> + 'd>, - g6_d3: Option> + 'd>, - g6_d4: Option> + 'd>, + // g6_d1: Option> + 'd>, + // g6_d2: Option> + 'd>, + // g6_d3: Option> + 'd>, + // g6_d4: Option> + 'd>, - g7_d1: Option> + 'd>, - g7_d2: Option> + 'd>, - g7_d3: Option> + 'd>, - g7_d4: Option> + 'd>, - - g8_d1: Option> + 'd>, - g8_d2: Option> + 'd>, - g8_d3: Option> + 'd>, - g8_d4: Option> + 'd>, + // g7_d1: Option> + 'd>, + // g7_d2: Option> + 'd>, + // g7_d3: Option> + 'd>, + // g7_d4: Option> + 'd>, + // g8_d1: Option> + 'd>, + // g8_d2: Option> + 'd>, + // g8_d3: Option> + 'd>, + // g8_d4: Option> + 'd>, config: Config, ) -> Self { into_ref!(peri); @@ -224,6 +235,15 @@ impl<'d, T: Instance> Tsc<'d, T> { } // fn filter_group() -> Option> {} + fn extract_groups(io_mask: u32) -> u32 { + let mut groups: u32 = 0; + for idx in 0..TSC_NUM_GROUPS { + if io_mask & (0x0F << idx * 4) != 0 { + groups |= 1 << idx + } + } + groups + } fn new_inner(peri: impl Peripheral

+ 'd, config: Config) -> Self { into_ref!(peri); @@ -245,22 +265,20 @@ impl<'d, T: Instance> Tsc<'d, T> { // Set IO configuration // Disable Schmitt trigger hysteresis on all used TSC IOs - // T::REGS.iohcr().modify(|w| { - // w. - // }); + T::REGS + .iohcr() + .write(|w| w.0 = config.channel_ios | config.shield_ios | config.sampling_ios); // Set channel and shield IOs - // T::REGS.ioccr().modify(|w| {}); + T::REGS.ioccr().write(|w| w.0 = config.channel_ios | config.shield_ios); // Set sampling IOs - // T::REGS.ioscr().modify(|w| { - // w.set_g1_io1(val) - // }); + T::REGS.ioscr().write(|w| w.0 = config.sampling_ios); // Set the groups to be acquired - // T::REGS.iogcsr().modify(|w| { - // w.set_g1e(val); - // }); + T::REGS + .iogcsr() + .write(|w| w.0 = Self::extract_groups(config.channel_ios)); // Disable interrupts T::REGS.ier().modify(|w| { From af357d2ad08c82b35811bb603eae4e3fa3df87a0 Mon Sep 17 00:00:00 2001 From: Karun Date: Fri, 19 Apr 2024 14:58:24 -0400 Subject: [PATCH 256/581] Prevent invalid config sets --- embassy-stm32/src/tsc/enums.rs | 23 +++++++++++++++++++++-- embassy-stm32/src/tsc/mod.rs | 22 +++++++++++++++++----- 2 files changed, 38 insertions(+), 7 deletions(-) diff --git a/embassy-stm32/src/tsc/enums.rs b/embassy-stm32/src/tsc/enums.rs index 56df4173a..bc8e9d2f5 100644 --- a/embassy-stm32/src/tsc/enums.rs +++ b/embassy-stm32/src/tsc/enums.rs @@ -90,9 +90,28 @@ impl Into for TscIOPin { } } +/// Spread Spectrum Deviation +#[derive(Copy, Clone)] +pub struct SSDeviation(u8); +impl SSDeviation { + /// Create new deviation value, acceptable inputs are 1-128 + pub fn new(val: u8) -> Result { + if val == 0 || val > 128 { + return Err(()); + } + Ok(Self(val - 1)) + } +} + +impl Into for SSDeviation { + fn into(self) -> u8 { + self.0 + } +} + /// Charge transfer pulse cycles #[allow(missing_docs)] -#[derive(Copy, Clone)] +#[derive(Copy, Clone, PartialEq)] pub enum ChargeTransferPulseCycle { _1, _2, @@ -137,7 +156,7 @@ impl Into for ChargeTransferPulseCycle { /// Prescaler divider #[allow(missing_docs)] -#[derive(Copy, Clone)] +#[derive(Copy, Clone, PartialEq)] pub enum PGPrescalerDivider { _1, _2, diff --git a/embassy-stm32/src/tsc/mod.rs b/embassy-stm32/src/tsc/mod.rs index 91cf7187a..8da0e87ab 100644 --- a/embassy-stm32/src/tsc/mod.rs +++ b/embassy-stm32/src/tsc/mod.rs @@ -6,7 +6,6 @@ pub mod enums; use crate::gpio::AnyPin; -use crate::pac::tsc::regs; use crate::{pac::tsc::Tsc as Regs, rcc::RccPeripheral}; use crate::{peripherals, Peripheral}; use embassy_hal_internal::{into_ref, PeripheralRef}; @@ -98,7 +97,7 @@ pub struct Config { /// Enable/disable of spread spectrum feature pub spread_spectrum: bool, /// Adds variable number of periods of the SS clk to pulse high state - pub spread_spectrum_deviation: u8, + pub spread_spectrum_deviation: SSDeviation, /// Selects AHB clock divider used to generate SS clk pub spread_spectrum_prescaler: bool, /// Selects AHB clock divider used to generate pulse generator clk @@ -127,7 +126,7 @@ impl Default for Config { ct_pulse_high_length: ChargeTransferPulseCycle::_1, ct_pulse_low_length: ChargeTransferPulseCycle::_1, spread_spectrum: false, - spread_spectrum_deviation: 0, + spread_spectrum_deviation: SSDeviation::new(0).unwrap(), spread_spectrum_prescaler: false, pulse_generator_prescaler: PGPrescalerDivider::_1, max_count_value: MaxCount::_255, @@ -255,9 +254,22 @@ impl<'d, T: Instance> Tsc<'d, T> { w.set_ctph(config.ct_pulse_high_length.into()); w.set_ctpl(config.ct_pulse_low_length.into()); w.set_sse(config.spread_spectrum); - w.set_ssd(config.spread_spectrum_deviation); + // Prevent invalid configuration for pulse generator prescaler + if config.ct_pulse_low_length == ChargeTransferPulseCycle::_1 + && (config.pulse_generator_prescaler == PGPrescalerDivider::_1 + || config.pulse_generator_prescaler == PGPrescalerDivider::_2) + { + w.set_pgpsc(PGPrescalerDivider::_4.into()); + } else if config.ct_pulse_low_length == ChargeTransferPulseCycle::_2 + && config.pulse_generator_prescaler == PGPrescalerDivider::_1 + { + w.set_pgpsc(PGPrescalerDivider::_2.into()); + } else { + w.set_pgpsc(config.pulse_generator_prescaler.into()); + } + w.set_ssd(config.spread_spectrum_deviation.into()); w.set_sspsc(config.spread_spectrum_prescaler); - w.set_pgpsc(config.pulse_generator_prescaler.into()); + w.set_mcv(config.max_count_value.into()); w.set_syncpol(config.synchro_pin_polarity); w.set_am(config.acquisition_mode); From fd69247d702d01a8e3c976a48bba4e44422d2cae Mon Sep 17 00:00:00 2001 From: Karun Date: Fri, 19 Apr 2024 18:43:00 -0400 Subject: [PATCH 257/581] hyperspecific constructor --- embassy-stm32/src/tsc/mod.rs | 139 ++++++++++++++++++++++++++++++----- 1 file changed, 119 insertions(+), 20 deletions(-) diff --git a/embassy-stm32/src/tsc/mod.rs b/embassy-stm32/src/tsc/mod.rs index 8da0e87ab..301d6f900 100644 --- a/embassy-stm32/src/tsc/mod.rs +++ b/embassy-stm32/src/tsc/mod.rs @@ -5,7 +5,7 @@ /// Enums defined for peripheral parameters pub mod enums; -use crate::gpio::AnyPin; +use crate::gpio::{low_level::AFType, AnyPin, Pull}; use crate::{pac::tsc::Tsc as Regs, rcc::RccPeripheral}; use crate::{peripherals, Peripheral}; use embassy_hal_internal::{into_ref, PeripheralRef}; @@ -186,22 +186,21 @@ impl<'d, T: Instance> Tsc<'d, T> { pub fn new( peri: impl Peripheral

+ 'd, // g1_d1: Option> + 'd>>, - // g1_d2: Option> + 'd>>, - // g1_d3: Option> + 'd>>, + g1_d2: Option> + 'd>>, + g1_d3: Option> + 'd>>, // g1_d4: Option> + 'd>>, // g2_d1: Option> + 'd>, // g2_d2: Option> + 'd>, - // g2_d3: Option> + 'd>, - // g2_d4: Option> + 'd>, + g2_d3: Option> + 'd>>, + g2_d4: Option> + 'd>>, // g3_d1: Option> + 'd>, // g3_d2: Option> + 'd>, // g3_d3: Option> + 'd>, // g3_d4: Option> + 'd>, - - // g4_d1: Option> + 'd>, - // g4_d2: Option> + 'd>, + g4_d1: Option> + 'd>>, + g4_d2: Option> + 'd>>, // g4_d3: Option> + 'd>, // g4_d4: Option> + 'd>, @@ -226,13 +225,102 @@ impl<'d, T: Instance> Tsc<'d, T> { // g8_d4: Option> + 'd>, config: Config, ) -> Self { - into_ref!(peri); + let g1_d2 = g1_d2.unwrap(); + let g1_d2_pin = g1_d2.pin; + let g1_d3 = g1_d3.unwrap(); + let g1_d3_pin = g1_d3.pin; + let g2_d3 = g2_d3.unwrap(); + let g2_d3_pin = g2_d3.pin; + let g2_d4 = g2_d4.unwrap(); + let g2_d4_pin = g2_d4.pin; + let g4_d1 = g4_d1.unwrap(); + let g4_d1_pin = g4_d1.pin; + let g4_d2 = g4_d2.unwrap(); + let g4_d2_pin = g4_d2.pin; + into_ref!(peri, g1_d2_pin, g1_d3_pin, g2_d3_pin, g2_d4_pin, g4_d1_pin, g4_d2_pin); + + // Configure pins + match g1_d2.role { + PinType::Channel => g1_d2_pin.set_as_af_pull(g1_d2_pin.af_num(), AFType::OutputPushPull, Pull::None), + PinType::Sample => g1_d2_pin.set_as_af_pull(g1_d2_pin.af_num(), AFType::OutputOpenDrain, Pull::None), + PinType::Shield => g1_d2_pin.set_as_af_pull(g1_d2_pin.af_num(), AFType::OutputPushPull, Pull::None), + } + match g1_d3.role { + PinType::Channel => g1_d3_pin.set_as_af_pull(g1_d3_pin.af_num(), AFType::OutputPushPull, Pull::None), + PinType::Sample => g1_d3_pin.set_as_af_pull(g1_d3_pin.af_num(), AFType::OutputOpenDrain, Pull::None), + PinType::Shield => g1_d3_pin.set_as_af_pull(g1_d3_pin.af_num(), AFType::OutputPushPull, Pull::None), + } + let g1 = PinGroup { + d1: None, + d2: Some(TscPin { + pin: g1_d2_pin.map_into(), + role: g1_d2.role, + }), + d3: Some(TscPin { + pin: g1_d3_pin.map_into(), + role: g1_d3.role, + }), + d4: None, + }; + + match g2_d3.role { + PinType::Channel => g2_d3_pin.set_as_af_pull(g2_d3_pin.af_num(), AFType::OutputPushPull, Pull::None), + PinType::Sample => g2_d3_pin.set_as_af_pull(g2_d3_pin.af_num(), AFType::OutputOpenDrain, Pull::None), + PinType::Shield => g2_d3_pin.set_as_af_pull(g2_d3_pin.af_num(), AFType::OutputPushPull, Pull::None), + } + match g2_d4.role { + PinType::Channel => g2_d4_pin.set_as_af_pull(g2_d4_pin.af_num(), AFType::OutputPushPull, Pull::None), + PinType::Sample => g2_d4_pin.set_as_af_pull(g2_d4_pin.af_num(), AFType::OutputOpenDrain, Pull::None), + PinType::Shield => g2_d4_pin.set_as_af_pull(g2_d4_pin.af_num(), AFType::OutputPushPull, Pull::None), + } + let g2 = PinGroup { + d1: None, + d2: None, + d3: Some(TscPin { + pin: g2_d3_pin.map_into(), + role: g2_d3.role, + }), + d4: Some(TscPin { + pin: g2_d4_pin.map_into(), + role: g2_d4.role, + }), + }; + + match g4_d1.role { + PinType::Channel => g4_d1_pin.set_as_af_pull(g4_d1_pin.af_num(), AFType::OutputPushPull, Pull::None), + PinType::Sample => g4_d1_pin.set_as_af_pull(g4_d1_pin.af_num(), AFType::OutputOpenDrain, Pull::None), + PinType::Shield => g4_d1_pin.set_as_af_pull(g4_d1_pin.af_num(), AFType::OutputPushPull, Pull::None), + } + match g4_d2.role { + PinType::Channel => g4_d2_pin.set_as_af_pull(g4_d2_pin.af_num(), AFType::OutputPushPull, Pull::None), + PinType::Sample => g4_d2_pin.set_as_af_pull(g4_d2_pin.af_num(), AFType::OutputOpenDrain, Pull::None), + PinType::Shield => g4_d2_pin.set_as_af_pull(g4_d2_pin.af_num(), AFType::OutputPushPull, Pull::None), + } + let g4 = PinGroup { + d1: Some(TscPin { + pin: g4_d1_pin.map_into(), + role: g4_d1.role, + }), + d2: Some(TscPin { + pin: g4_d2_pin.map_into(), + role: g4_d2.role, + }), + d3: None, + d4: None, + }; // Need to check valid pin configuration input - // Need to configure pin - Self::new_inner(peri, config) + Self::new_inner(peri, Some(g1), Some(g2), None, Some(g4), None, None, None, None, config) } + // fn configure_pin<'b, G: Pin>(pin: PeripheralRef<'b, G>, role: PinType) { + // match role { + // PinType::Channel => pin.set_as_af_pull(pin.af_num(), AFType::OutputPushPull, Pull::None), + // PinType::Sample => {} + // PinType::Shield => {} + // } + // } + // fn filter_group() -> Option> {} fn extract_groups(io_mask: u32) -> u32 { let mut groups: u32 = 0; @@ -244,7 +332,18 @@ impl<'d, T: Instance> Tsc<'d, T> { groups } - fn new_inner(peri: impl Peripheral

+ 'd, config: Config) -> Self { + fn new_inner( + peri: impl Peripheral

+ 'd, + g1: Option>, + g2: Option>, + g3: Option>, + g4: Option>, + g5: Option>, + g6: Option>, + g7: Option>, + g8: Option>, + config: Config, + ) -> Self { into_ref!(peri); T::enable_and_reset(); @@ -306,14 +405,14 @@ impl<'d, T: Instance> Tsc<'d, T> { Self { _peri: peri, - g1: None, - g2: None, - g3: None, - g4: None, - g5: None, - g6: None, - g7: None, - g8: None, + g1, + g2, + g3, + g4, + g5, + g6, + g7, + g8, state: State::Ready, config, } From 253f6c42eeada0bc9e40582fd968214d8f8bd761 Mon Sep 17 00:00:00 2001 From: Karun Date: Mon, 22 Apr 2024 12:36:17 -0400 Subject: [PATCH 258/581] Address versioning and format issues raised by CI --- embassy-stm32/src/lib.rs | 4 ++-- embassy-stm32/src/tsc/enums.rs | 16 ++++++++++++++ embassy-stm32/src/tsc/mod.rs | 38 +++++++++++++++++++++++++++------- 3 files changed, 49 insertions(+), 9 deletions(-) diff --git a/embassy-stm32/src/lib.rs b/embassy-stm32/src/lib.rs index dd89618ef..2bda2cf79 100644 --- a/embassy-stm32/src/lib.rs +++ b/embassy-stm32/src/lib.rs @@ -101,10 +101,10 @@ pub mod sai; pub mod sdmmc; #[cfg(spi)] pub mod spi; -#[cfg(ucpd)] -pub mod ucpd; #[cfg(tsc)] pub mod tsc; +#[cfg(ucpd)] +pub mod ucpd; #[cfg(uid)] pub mod uid; #[cfg(usart)] diff --git a/embassy-stm32/src/tsc/enums.rs b/embassy-stm32/src/tsc/enums.rs index bc8e9d2f5..bdb384900 100644 --- a/embassy-stm32/src/tsc/enums.rs +++ b/embassy-stm32/src/tsc/enums.rs @@ -27,13 +27,21 @@ pub enum TscIOPin { Group6Io2, Group6Io3, Group6Io4, + #[cfg(any(tsc_v2, tsc_v3))] Group7Io1, + #[cfg(any(tsc_v2, tsc_v3))] Group7Io2, + #[cfg(any(tsc_v2, tsc_v3))] Group7Io3, + #[cfg(any(tsc_v2, tsc_v3))] Group7Io4, + #[cfg(tsc_v3)] Group8Io1, + #[cfg(tsc_v3)] Group8Io2, + #[cfg(tsc_v3)] Group8Io3, + #[cfg(tsc_v3)] Group8Io4, } @@ -78,13 +86,21 @@ impl Into for TscIOPin { TscIOPin::Group6Io2 => 0x00200000, TscIOPin::Group6Io3 => 0x00400000, TscIOPin::Group6Io4 => 0x00800000, + #[cfg(any(tsc_v2, tsc_v3))] TscIOPin::Group7Io1 => 0x01000000, + #[cfg(any(tsc_v2, tsc_v3))] TscIOPin::Group7Io2 => 0x02000000, + #[cfg(any(tsc_v2, tsc_v3))] TscIOPin::Group7Io3 => 0x04000000, + #[cfg(any(tsc_v2, tsc_v3))] TscIOPin::Group7Io4 => 0x08000000, + #[cfg(tsc_v3)] TscIOPin::Group8Io1 => 0x10000000, + #[cfg(tsc_v3)] TscIOPin::Group8Io2 => 0x20000000, + #[cfg(tsc_v3)] TscIOPin::Group8Io3 => 0x40000000, + #[cfg(tsc_v3)] TscIOPin::Group8Io4 => 0x80000000, } } diff --git a/embassy-stm32/src/tsc/mod.rs b/embassy-stm32/src/tsc/mod.rs index 301d6f900..8642da0e1 100644 --- a/embassy-stm32/src/tsc/mod.rs +++ b/embassy-stm32/src/tsc/mod.rs @@ -5,13 +5,14 @@ /// Enums defined for peripheral parameters pub mod enums; -use crate::gpio::{low_level::AFType, AnyPin, Pull}; -use crate::{pac::tsc::Tsc as Regs, rcc::RccPeripheral}; +pub use enums::*; + +use crate::gpio::{AFType, AnyPin, Pull}; +use crate::pac::tsc::Tsc as Regs; +use crate::rcc::RccPeripheral; use crate::{peripherals, Peripheral}; use embassy_hal_internal::{into_ref, PeripheralRef}; -pub use enums::*; - const TSC_NUM_GROUPS: u32 = 8; /// Error type defined for TSC @@ -68,7 +69,9 @@ pub enum Group { Four, Five, Six, + #[cfg(any(tsc_v2, tsc_v3))] Seven, + #[cfg(tsc_v3)] Eight, } @@ -81,7 +84,9 @@ impl Into for Group { Group::Four => 3, Group::Five => 4, Group::Six => 5, + #[cfg(any(tsc_v2, tsc_v3))] Group::Seven => 6, + #[cfg(tsc_v3)] Group::Eight => 7, } } @@ -175,7 +180,9 @@ pub struct Tsc<'d, T: Instance> { g4: Option>, g5: Option>, g6: Option>, + #[cfg(any(tsc_v2, tsc_v3))] g7: Option>, + #[cfg(tsc_v3)] g8: Option>, state: State, config: Config, @@ -310,7 +317,20 @@ impl<'d, T: Instance> Tsc<'d, T> { }; // Need to check valid pin configuration input - Self::new_inner(peri, Some(g1), Some(g2), None, Some(g4), None, None, None, None, config) + Self::new_inner( + peri, + Some(g1), + Some(g2), + None, + Some(g4), + None, + None, + #[cfg(any(tsc_v2, tsc_v3))] + None, + #[cfg(tsc_v3)] + None, + config, + ) } // fn configure_pin<'b, G: Pin>(pin: PeripheralRef<'b, G>, role: PinType) { @@ -340,8 +360,8 @@ impl<'d, T: Instance> Tsc<'d, T> { g4: Option>, g5: Option>, g6: Option>, - g7: Option>, - g8: Option>, + #[cfg(any(tsc_v2, tsc_v3))] g7: Option>, + #[cfg(tsc_v3)] g8: Option>, config: Config, ) -> Self { into_ref!(peri); @@ -411,7 +431,9 @@ impl<'d, T: Instance> Tsc<'d, T> { g4, g5, g6, + #[cfg(any(tsc_v2, tsc_v3))] g7, + #[cfg(tsc_v3)] g8, state: State::Ready, config, @@ -548,7 +570,9 @@ impl<'d, T: Instance> Tsc<'d, T> { Group::Four => T::REGS.iogcsr().read().g4s(), Group::Five => T::REGS.iogcsr().read().g5s(), Group::Six => T::REGS.iogcsr().read().g6s(), + #[cfg(any(tsc_v2, tsc_v3))] Group::Seven => T::REGS.iogcsr().read().g7s(), + #[cfg(tsc_v3)] Group::Eight => T::REGS.iogcsr().read().g8s(), }; match status { From 4bf2178de700e9a03aebcf161f36e2e36fb0581f Mon Sep 17 00:00:00 2001 From: Karun Date: Mon, 22 Apr 2024 12:40:08 -0400 Subject: [PATCH 259/581] remove remaining warnings --- embassy-stm32/src/tsc/mod.rs | 35 ++++++++++++++++++----------------- 1 file changed, 18 insertions(+), 17 deletions(-) diff --git a/embassy-stm32/src/tsc/mod.rs b/embassy-stm32/src/tsc/mod.rs index 8642da0e1..ad0f1cca0 100644 --- a/embassy-stm32/src/tsc/mod.rs +++ b/embassy-stm32/src/tsc/mod.rs @@ -5,13 +5,13 @@ /// Enums defined for peripheral parameters pub mod enums; +use embassy_hal_internal::{into_ref, PeripheralRef}; pub use enums::*; use crate::gpio::{AFType, AnyPin, Pull}; use crate::pac::tsc::Tsc as Regs; use crate::rcc::RccPeripheral; use crate::{peripherals, Peripheral}; -use embassy_hal_internal::{into_ref, PeripheralRef}; const TSC_NUM_GROUPS: u32 = 8; @@ -148,6 +148,7 @@ impl Default for Config { /// Pin struct that maintains usage #[allow(missing_docs)] +#[allow(dead_code)] pub struct TscPin<'d, T> { pin: PeripheralRef<'d, T>, role: PinType, @@ -174,16 +175,16 @@ pub struct PinGroup<'d, A> { /// TSC driver pub struct Tsc<'d, T: Instance> { _peri: PeripheralRef<'d, T>, - g1: Option>, - g2: Option>, - g3: Option>, - g4: Option>, - g5: Option>, - g6: Option>, + _g1: Option>, + _g2: Option>, + _g3: Option>, + _g4: Option>, + _g5: Option>, + _g6: Option>, #[cfg(any(tsc_v2, tsc_v3))] - g7: Option>, + _g7: Option>, #[cfg(tsc_v3)] - g8: Option>, + _g8: Option>, state: State, config: Config, } @@ -425,16 +426,16 @@ impl<'d, T: Instance> Tsc<'d, T> { Self { _peri: peri, - g1, - g2, - g3, - g4, - g5, - g6, + _g1: g1, + _g2: g2, + _g3: g3, + _g4: g4, + _g5: g5, + _g6: g6, #[cfg(any(tsc_v2, tsc_v3))] - g7, + _g7: g7, #[cfg(tsc_v3)] - g8, + _g8: g8, state: State::Ready, config, } From 3cd6232d434861865864edd2dee5082d1b07029c Mon Sep 17 00:00:00 2001 From: Karun Date: Mon, 22 Apr 2024 13:08:21 -0400 Subject: [PATCH 260/581] update num groups definition --- embassy-stm32/src/tsc/mod.rs | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/embassy-stm32/src/tsc/mod.rs b/embassy-stm32/src/tsc/mod.rs index ad0f1cca0..4b1987469 100644 --- a/embassy-stm32/src/tsc/mod.rs +++ b/embassy-stm32/src/tsc/mod.rs @@ -13,6 +13,11 @@ use crate::pac::tsc::Tsc as Regs; use crate::rcc::RccPeripheral; use crate::{peripherals, Peripheral}; +#[cfg(tsc_v1)] +const TSC_NUM_GROUPS: u32 = 6; +#[cfg(tsc_v2)] +const TSC_NUM_GROUPS: u32 = 7; +#[cfg(tsc_v3)] const TSC_NUM_GROUPS: u32 = 8; /// Error type defined for TSC From 0f8b3b8c65484a444d1dc9f6179ce3a60a63c06f Mon Sep 17 00:00:00 2001 From: Karun Date: Thu, 2 May 2024 13:30:30 -0400 Subject: [PATCH 261/581] Functional touch sensing --- embassy-stm32/src/tsc/enums.rs | 15 +- embassy-stm32/src/tsc/mod.rs | 356 ++++++++++++++++----------------- 2 files changed, 189 insertions(+), 182 deletions(-) diff --git a/embassy-stm32/src/tsc/enums.rs b/embassy-stm32/src/tsc/enums.rs index bdb384900..0d34a43ec 100644 --- a/embassy-stm32/src/tsc/enums.rs +++ b/embassy-stm32/src/tsc/enums.rs @@ -48,14 +48,25 @@ pub enum TscIOPin { impl BitOr for u32 { type Output = u32; fn bitor(self, rhs: TscIOPin) -> Self::Output { - self | rhs as u32 + let rhs: u32 = rhs.into(); + self | rhs + } +} + +impl BitOr for TscIOPin { + type Output = u32; + fn bitor(self, rhs: u32) -> Self::Output { + let val: u32 = self.into(); + val | rhs } } impl BitOr for TscIOPin { type Output = u32; fn bitor(self, rhs: Self) -> Self::Output { - self as u32 | rhs as u32 + let val: u32 = self.into(); + let rhs: u32 = rhs.into(); + val | rhs } } diff --git a/embassy-stm32/src/tsc/mod.rs b/embassy-stm32/src/tsc/mod.rs index 4b1987469..a37341b31 100644 --- a/embassy-stm32/src/tsc/mod.rs +++ b/embassy-stm32/src/tsc/mod.rs @@ -5,10 +5,12 @@ /// Enums defined for peripheral parameters pub mod enums; +use core::marker::PhantomData; + use embassy_hal_internal::{into_ref, PeripheralRef}; pub use enums::*; -use crate::gpio::{AFType, AnyPin, Pull}; +use crate::gpio::{AFType, AnyPin}; use crate::pac::tsc::Tsc as Regs; use crate::rcc::RccPeripheral; use crate::{peripherals, Peripheral}; @@ -38,9 +40,6 @@ pub enum PinType { Shield, } -/// Unclear -pub struct TscGroup {} - /// Peripheral state #[derive(PartialEq, Clone, Copy)] pub enum State { @@ -58,6 +57,7 @@ pub enum State { /// For groups with multiple channel pins, may take longer because acquisitions /// are done sequentially. Check this status before pulling count for each /// sampled channel +#[derive(PartialEq)] pub enum GroupStatus { /// Acquisition for channel still in progress Ongoing, @@ -136,7 +136,7 @@ impl Default for Config { ct_pulse_high_length: ChargeTransferPulseCycle::_1, ct_pulse_low_length: ChargeTransferPulseCycle::_1, spread_spectrum: false, - spread_spectrum_deviation: SSDeviation::new(0).unwrap(), + spread_spectrum_deviation: SSDeviation::new(1).unwrap(), spread_spectrum_prescaler: false, pulse_generator_prescaler: PGPrescalerDivider::_1, max_count_value: MaxCount::_255, @@ -153,43 +153,165 @@ impl Default for Config { /// Pin struct that maintains usage #[allow(missing_docs)] -#[allow(dead_code)] -pub struct TscPin<'d, T> { - pin: PeripheralRef<'d, T>, - role: PinType, -} - -/// Input structure for constructor containing peripherals -#[allow(missing_docs)] -pub struct PeriPin { - pub pin: T, - pub role: PinType, +pub struct TscPin<'d, T, C> { + _pin: PeripheralRef<'d, AnyPin>, + _role: PinType, + phantom: PhantomData<(T, C)>, } /// Pin group definition /// Pins are organized into groups of four IOs, all groups with a /// sampling channel must also have a sampling capacitor channel. #[allow(missing_docs)] -pub struct PinGroup<'d, A> { - pub d1: Option>, - pub d2: Option>, - pub d3: Option>, - pub d4: Option>, +#[derive(Default)] +pub struct PinGroup<'d, T, C> { + d1: Option>, + d2: Option>, + d3: Option>, + d4: Option>, } +impl<'d, T: Instance, C> PinGroup<'d, T, C> { + /// Create new sensing group + pub fn new() -> Self { + Self { + d1: None, + d2: None, + d3: None, + d4: None, + } + } +} + +macro_rules! group_impl { + ($group:ident, $trait1:ident, $trait2:ident, $trait3:ident, $trait4:ident) => { + impl<'d, T: Instance> PinGroup<'d, T, $group> { + #[doc = concat!("Create a new pin1 for ", stringify!($group), " TSC group instance.")] + pub fn set_io1(&mut self, pin: impl Peripheral

> + 'd, role: PinType) { + into_ref!(pin); + critical_section::with(|_| { + pin.set_low(); + pin.set_as_af( + pin.af_num(), + match role { + PinType::Channel => AFType::OutputPushPull, + PinType::Sample => AFType::OutputOpenDrain, + PinType::Shield => AFType::OutputPushPull, + }, + ); + self.d1 = Some(TscPin { + _pin: pin.map_into(), + _role: role, + phantom: PhantomData, + }) + }) + } + + #[doc = concat!("Create a new pin2 for ", stringify!($group), " TSC group instance.")] + pub fn set_io2(&mut self, pin: impl Peripheral

> + 'd, role: PinType) { + into_ref!(pin); + critical_section::with(|_| { + pin.set_low(); + pin.set_as_af( + pin.af_num(), + match role { + PinType::Channel => AFType::OutputPushPull, + PinType::Sample => AFType::OutputOpenDrain, + PinType::Shield => AFType::OutputPushPull, + }, + ); + self.d2 = Some(TscPin { + _pin: pin.map_into(), + _role: role, + phantom: PhantomData, + }) + }) + } + + #[doc = concat!("Create a new pin3 for ", stringify!($group), " TSC group instance.")] + pub fn set_io3(&mut self, pin: impl Peripheral

> + 'd, role: PinType) { + into_ref!(pin); + critical_section::with(|_| { + pin.set_low(); + pin.set_as_af( + pin.af_num(), + match role { + PinType::Channel => AFType::OutputPushPull, + PinType::Sample => AFType::OutputOpenDrain, + PinType::Shield => AFType::OutputPushPull, + }, + ); + self.d3 = Some(TscPin { + _pin: pin.map_into(), + _role: role, + phantom: PhantomData, + }) + }) + } + + #[doc = concat!("Create a new pin4 for ", stringify!($group), " TSC group instance.")] + pub fn set_io4(&mut self, pin: impl Peripheral

> + 'd, role: PinType) { + into_ref!(pin); + critical_section::with(|_| { + pin.set_low(); + pin.set_as_af( + pin.af_num(), + match role { + PinType::Channel => AFType::OutputPushPull, + PinType::Sample => AFType::OutputOpenDrain, + PinType::Shield => AFType::OutputPushPull, + }, + ); + self.d4 = Some(TscPin { + _pin: pin.map_into(), + _role: role, + phantom: PhantomData, + }) + }) + } + } + }; +} + +group_impl!(G1, G1IO1Pin, G1IO2Pin, G1IO3Pin, G1IO4Pin); +group_impl!(G2, G2IO1Pin, G2IO2Pin, G2IO3Pin, G2IO4Pin); +group_impl!(G3, G3IO1Pin, G3IO2Pin, G3IO3Pin, G3IO4Pin); +group_impl!(G4, G4IO1Pin, G4IO2Pin, G4IO3Pin, G4IO4Pin); +group_impl!(G5, G5IO1Pin, G5IO2Pin, G5IO3Pin, G5IO4Pin); +group_impl!(G6, G6IO1Pin, G6IO2Pin, G6IO3Pin, G6IO4Pin); +group_impl!(G7, G7IO1Pin, G7IO2Pin, G7IO3Pin, G7IO4Pin); +group_impl!(G8, G8IO1Pin, G8IO2Pin, G8IO3Pin, G8IO4Pin); + +/// Group 1 marker type. +pub enum G1 {} +/// Group 2 marker type. +pub enum G2 {} +/// Group 3 marker type. +pub enum G3 {} +/// Group 4 marker type. +pub enum G4 {} +/// Group 5 marker type. +pub enum G5 {} +/// Group 6 marker type. +pub enum G6 {} +/// Group 7 marker type. +pub enum G7 {} +/// Group 8 marker type. +pub enum G8 {} + /// TSC driver pub struct Tsc<'d, T: Instance> { _peri: PeripheralRef<'d, T>, - _g1: Option>, - _g2: Option>, - _g3: Option>, - _g4: Option>, - _g5: Option>, - _g6: Option>, + _g1: Option>, + _g2: Option>, + _g3: Option>, + _g4: Option>, + _g5: Option>, + _g6: Option>, #[cfg(any(tsc_v2, tsc_v3))] - _g7: Option>, + _g7: Option>, #[cfg(tsc_v3)] - _g8: Option>, + _g8: Option>, state: State, config: Config, } @@ -198,156 +320,33 @@ impl<'d, T: Instance> Tsc<'d, T> { /// Create new TSC driver pub fn new( peri: impl Peripheral

+ 'd, - // g1_d1: Option> + 'd>>, - g1_d2: Option> + 'd>>, - g1_d3: Option> + 'd>>, - // g1_d4: Option> + 'd>>, - - // g2_d1: Option> + 'd>, - // g2_d2: Option> + 'd>, - g2_d3: Option> + 'd>>, - g2_d4: Option> + 'd>>, - - // g3_d1: Option> + 'd>, - // g3_d2: Option> + 'd>, - // g3_d3: Option> + 'd>, - // g3_d4: Option> + 'd>, - g4_d1: Option> + 'd>>, - g4_d2: Option> + 'd>>, - // g4_d3: Option> + 'd>, - // g4_d4: Option> + 'd>, - - // g5_d1: Option> + 'd>, - // g5_d2: Option> + 'd>, - // g5_d3: Option> + 'd>, - // g5_d4: Option> + 'd>, - - // g6_d1: Option> + 'd>, - // g6_d2: Option> + 'd>, - // g6_d3: Option> + 'd>, - // g6_d4: Option> + 'd>, - - // g7_d1: Option> + 'd>, - // g7_d2: Option> + 'd>, - // g7_d3: Option> + 'd>, - // g7_d4: Option> + 'd>, - - // g8_d1: Option> + 'd>, - // g8_d2: Option> + 'd>, - // g8_d3: Option> + 'd>, - // g8_d4: Option> + 'd>, + g1: Option>, + g2: Option>, + g3: Option>, + g4: Option>, + g5: Option>, + g6: Option>, + #[cfg(any(tsc_v2, tsc_v3))] g7: Option>, + #[cfg(tsc_v3)] g8: Option>, config: Config, ) -> Self { - let g1_d2 = g1_d2.unwrap(); - let g1_d2_pin = g1_d2.pin; - let g1_d3 = g1_d3.unwrap(); - let g1_d3_pin = g1_d3.pin; - let g2_d3 = g2_d3.unwrap(); - let g2_d3_pin = g2_d3.pin; - let g2_d4 = g2_d4.unwrap(); - let g2_d4_pin = g2_d4.pin; - let g4_d1 = g4_d1.unwrap(); - let g4_d1_pin = g4_d1.pin; - let g4_d2 = g4_d2.unwrap(); - let g4_d2_pin = g4_d2.pin; - into_ref!(peri, g1_d2_pin, g1_d3_pin, g2_d3_pin, g2_d4_pin, g4_d1_pin, g4_d2_pin); - - // Configure pins - match g1_d2.role { - PinType::Channel => g1_d2_pin.set_as_af_pull(g1_d2_pin.af_num(), AFType::OutputPushPull, Pull::None), - PinType::Sample => g1_d2_pin.set_as_af_pull(g1_d2_pin.af_num(), AFType::OutputOpenDrain, Pull::None), - PinType::Shield => g1_d2_pin.set_as_af_pull(g1_d2_pin.af_num(), AFType::OutputPushPull, Pull::None), - } - match g1_d3.role { - PinType::Channel => g1_d3_pin.set_as_af_pull(g1_d3_pin.af_num(), AFType::OutputPushPull, Pull::None), - PinType::Sample => g1_d3_pin.set_as_af_pull(g1_d3_pin.af_num(), AFType::OutputOpenDrain, Pull::None), - PinType::Shield => g1_d3_pin.set_as_af_pull(g1_d3_pin.af_num(), AFType::OutputPushPull, Pull::None), - } - let g1 = PinGroup { - d1: None, - d2: Some(TscPin { - pin: g1_d2_pin.map_into(), - role: g1_d2.role, - }), - d3: Some(TscPin { - pin: g1_d3_pin.map_into(), - role: g1_d3.role, - }), - d4: None, - }; - - match g2_d3.role { - PinType::Channel => g2_d3_pin.set_as_af_pull(g2_d3_pin.af_num(), AFType::OutputPushPull, Pull::None), - PinType::Sample => g2_d3_pin.set_as_af_pull(g2_d3_pin.af_num(), AFType::OutputOpenDrain, Pull::None), - PinType::Shield => g2_d3_pin.set_as_af_pull(g2_d3_pin.af_num(), AFType::OutputPushPull, Pull::None), - } - match g2_d4.role { - PinType::Channel => g2_d4_pin.set_as_af_pull(g2_d4_pin.af_num(), AFType::OutputPushPull, Pull::None), - PinType::Sample => g2_d4_pin.set_as_af_pull(g2_d4_pin.af_num(), AFType::OutputOpenDrain, Pull::None), - PinType::Shield => g2_d4_pin.set_as_af_pull(g2_d4_pin.af_num(), AFType::OutputPushPull, Pull::None), - } - let g2 = PinGroup { - d1: None, - d2: None, - d3: Some(TscPin { - pin: g2_d3_pin.map_into(), - role: g2_d3.role, - }), - d4: Some(TscPin { - pin: g2_d4_pin.map_into(), - role: g2_d4.role, - }), - }; - - match g4_d1.role { - PinType::Channel => g4_d1_pin.set_as_af_pull(g4_d1_pin.af_num(), AFType::OutputPushPull, Pull::None), - PinType::Sample => g4_d1_pin.set_as_af_pull(g4_d1_pin.af_num(), AFType::OutputOpenDrain, Pull::None), - PinType::Shield => g4_d1_pin.set_as_af_pull(g4_d1_pin.af_num(), AFType::OutputPushPull, Pull::None), - } - match g4_d2.role { - PinType::Channel => g4_d2_pin.set_as_af_pull(g4_d2_pin.af_num(), AFType::OutputPushPull, Pull::None), - PinType::Sample => g4_d2_pin.set_as_af_pull(g4_d2_pin.af_num(), AFType::OutputOpenDrain, Pull::None), - PinType::Shield => g4_d2_pin.set_as_af_pull(g4_d2_pin.af_num(), AFType::OutputPushPull, Pull::None), - } - let g4 = PinGroup { - d1: Some(TscPin { - pin: g4_d1_pin.map_into(), - role: g4_d1.role, - }), - d2: Some(TscPin { - pin: g4_d2_pin.map_into(), - role: g4_d2.role, - }), - d3: None, - d4: None, - }; - // Need to check valid pin configuration input Self::new_inner( peri, - Some(g1), - Some(g2), - None, - Some(g4), - None, - None, + g1, + g2, + g3, + g4, + g5, + g6, #[cfg(any(tsc_v2, tsc_v3))] - None, + g7, #[cfg(tsc_v3)] - None, + g8, config, ) } - // fn configure_pin<'b, G: Pin>(pin: PeripheralRef<'b, G>, role: PinType) { - // match role { - // PinType::Channel => pin.set_as_af_pull(pin.af_num(), AFType::OutputPushPull, Pull::None), - // PinType::Sample => {} - // PinType::Shield => {} - // } - // } - - // fn filter_group() -> Option> {} fn extract_groups(io_mask: u32) -> u32 { let mut groups: u32 = 0; for idx in 0..TSC_NUM_GROUPS { @@ -360,14 +359,14 @@ impl<'d, T: Instance> Tsc<'d, T> { fn new_inner( peri: impl Peripheral

+ 'd, - g1: Option>, - g2: Option>, - g3: Option>, - g4: Option>, - g5: Option>, - g6: Option>, - #[cfg(any(tsc_v2, tsc_v3))] g7: Option>, - #[cfg(tsc_v3)] g8: Option>, + g1: Option>, + g2: Option>, + g3: Option>, + g4: Option>, + g5: Option>, + g6: Option>, + #[cfg(any(tsc_v2, tsc_v3))] g7: Option>, + #[cfg(tsc_v3)] g8: Option>, config: Config, ) -> Self { into_ref!(peri); @@ -404,7 +403,7 @@ impl<'d, T: Instance> Tsc<'d, T> { // Disable Schmitt trigger hysteresis on all used TSC IOs T::REGS .iohcr() - .write(|w| w.0 = config.channel_ios | config.shield_ios | config.sampling_ios); + .write(|w| w.0 = !(config.channel_ios | config.shield_ios | config.sampling_ios)); // Set channel and shield IOs T::REGS.ioccr().write(|w| w.0 = config.channel_ios | config.shield_ios); @@ -592,8 +591,6 @@ impl<'d, T: Instance> Tsc<'d, T> { T::REGS.iogcr(index.into()).read().cnt() } - // pub fn configure_io() - /// Discharge the IOs for subsequent acquisition pub fn discharge_io(&mut self, status: bool) { // Set the touch sensing IOs in low power mode @@ -605,7 +602,6 @@ impl<'d, T: Instance> Tsc<'d, T> { impl<'d, T: Instance> Drop for Tsc<'d, T> { fn drop(&mut self) { - // Need to figure out what to do with the IOs T::disable(); } } From 3e87dae578969874d354c538d8c59e7be491933d Mon Sep 17 00:00:00 2001 From: Pegasis Date: Fri, 3 May 2024 08:12:30 -0400 Subject: [PATCH 262/581] add example for bdma --- docs/modules/ROOT/pages/faq.adoc | 12 ++++- examples/stm32h7/build.rs | 30 +++++++++++ examples/stm32h7/memory.x | 14 +++++ examples/stm32h7/src/bin/spi_bdma.rs | 78 ++++++++++++++++++++++++++++ 4 files changed, 132 insertions(+), 2 deletions(-) create mode 100644 examples/stm32h7/memory.x create mode 100644 examples/stm32h7/src/bin/spi_bdma.rs diff --git a/docs/modules/ROOT/pages/faq.adoc b/docs/modules/ROOT/pages/faq.adoc index 6cb7233c1..a074594cc 100644 --- a/docs/modules/ROOT/pages/faq.adoc +++ b/docs/modules/ROOT/pages/faq.adoc @@ -279,6 +279,14 @@ If you see errors that look like this: DMA: error on BDMA@1234ABCD channel 4 ---- -You likely need to set up your linker script to define a special region for this area, and copy data to that region before using with BDMA. +You need to set up your linker script to define a special region for this area, and copy data to that region before using with BDMA. -TODO: show how to do that +General steps: + +1. Find out which memory region BDMA has access to. You can get this information from the bus matrix and the memory mapping table in the STM32 datasheet. +2. Add the memory region to `memory.x`, you can modify the generated one from https://github.com/embassy-rs/stm32-data-generated/tree/main/data/chips. +3. You might need to modify `build.rs` to make cargo pick up the modified `memory.x`. +4. In your code, access the defined memory region using `#[link_section = ".xxx"]` +5. Copy data to that region before using BDMA. + +See link:/examples/stm32h7/src/bin/spi_bdma.rs[this example] for more details. diff --git a/examples/stm32h7/build.rs b/examples/stm32h7/build.rs index 8cd32d7ed..b9bb661f0 100644 --- a/examples/stm32h7/build.rs +++ b/examples/stm32h7/build.rs @@ -1,4 +1,34 @@ +//! This build script copies the `memory.x` file from the crate root into +//! a directory where the linker can always find it at build time. +//! For many projects this is optional, as the linker always searches the +//! project root directory -- wherever `Cargo.toml` is. However, if you +//! are using a workspace or have a more complicated build setup, this +//! build script becomes required. Additionally, by requesting that +//! Cargo re-run the build script whenever `memory.x` is changed, +//! updating `memory.x` ensures a rebuild of the application with the +//! new memory settings. + +use std::env; +use std::fs::File; +use std::io::Write; +use std::path::PathBuf; + fn main() { + // Put `memory.x` in our output directory and ensure it's + // on the linker search path. + let out = &PathBuf::from(env::var_os("OUT_DIR").unwrap()); + File::create(out.join("memory.x")) + .unwrap() + .write_all(include_bytes!("memory.x")) + .unwrap(); + println!("cargo:rustc-link-search={}", out.display()); + + // By default, Cargo will re-run a build script whenever + // any file in the project changes. By specifying `memory.x` + // here, we ensure the build script is only re-run when + // `memory.x` is changed. + println!("cargo:rerun-if-changed=memory.x"); + println!("cargo:rustc-link-arg-bins=--nmagic"); println!("cargo:rustc-link-arg-bins=-Tlink.x"); println!("cargo:rustc-link-arg-bins=-Tdefmt.x"); diff --git a/examples/stm32h7/memory.x b/examples/stm32h7/memory.x new file mode 100644 index 000000000..e5ab1f62c --- /dev/null +++ b/examples/stm32h7/memory.x @@ -0,0 +1,14 @@ +MEMORY +{ + FLASH : ORIGIN = 0x08000000, LENGTH = 2048K /* BANK_1 + BANK_2 */ + RAM : ORIGIN = 0x24000000, LENGTH = 512K /* SRAM */ + RAM_D3 : ORIGIN = 0x38000000, LENGTH = 64K /* SRAM4 */ +} + +SECTIONS +{ + .ram_d3 : + { + *(.ram_d3) + } > RAM_D3 +} \ No newline at end of file diff --git a/examples/stm32h7/src/bin/spi_bdma.rs b/examples/stm32h7/src/bin/spi_bdma.rs new file mode 100644 index 000000000..2fc37fc22 --- /dev/null +++ b/examples/stm32h7/src/bin/spi_bdma.rs @@ -0,0 +1,78 @@ +#![no_std] +#![no_main] + +use core::fmt::Write; +use core::str::from_utf8; + +use cortex_m_rt::entry; +use defmt::*; +use embassy_executor::Executor; +use embassy_stm32::mode::Async; +use embassy_stm32::time::mhz; +use embassy_stm32::{peripherals, spi, Config}; +use heapless::String; +use static_cell::StaticCell; +use {defmt_rtt as _, panic_probe as _}; + +// Defined in memory.x +#[link_section = ".ram_d3"] +static mut RAM_D3: [u8; 64 * 1024] = [0u8; 64 * 1024]; + +#[embassy_executor::task] +async fn main_task(mut spi: spi::Spi<'static, peripherals::SPI6, Async>) { + let read_buffer = unsafe { &mut RAM_D3[0..128] }; + let write_buffer = unsafe { &mut RAM_D3[128..256] }; + + for n in 0u32.. { + let mut write: String<128> = String::new(); + core::write!(&mut write, "Hello DMA World {}!\r\n", n).unwrap(); + let read_buffer = &mut read_buffer[..write.len()]; + let write_buffer = &mut write_buffer[..write.len()]; + // copy data to write_buffer which is located in D3 domain, accessable by BDMA + write_buffer.clone_from_slice(write.as_bytes()); + + spi.transfer(read_buffer, write_buffer).await.ok(); + info!("read via spi+dma: {}", from_utf8(read_buffer).unwrap()); + } +} + +static EXECUTOR: StaticCell = StaticCell::new(); + +#[entry] +fn main() -> ! { + info!("Hello World!"); + + let mut config = Config::default(); + { + use embassy_stm32::rcc::*; + config.rcc.hsi = Some(HSIPrescaler::DIV1); + config.rcc.csi = true; + config.rcc.pll1 = Some(Pll { + source: PllSource::HSI, + prediv: PllPreDiv::DIV4, + mul: PllMul::MUL50, + divp: Some(PllDiv::DIV2), + divq: Some(PllDiv::DIV8), // used by SPI3. 100Mhz. + divr: None, + }); + config.rcc.sys = Sysclk::PLL1_P; // 400 Mhz + config.rcc.ahb_pre = AHBPrescaler::DIV2; // 200 Mhz + config.rcc.apb1_pre = APBPrescaler::DIV2; // 100 Mhz + config.rcc.apb2_pre = APBPrescaler::DIV2; // 100 Mhz + config.rcc.apb3_pre = APBPrescaler::DIV2; // 100 Mhz + config.rcc.apb4_pre = APBPrescaler::DIV2; // 100 Mhz + config.rcc.voltage_scale = VoltageScale::Scale1; + } + let p = embassy_stm32::init(config); + + let mut spi_config = spi::Config::default(); + spi_config.frequency = mhz(1); + + let spi = spi::Spi::new(p.SPI6, p.PA5, p.PA7, p.PA6, p.BDMA_CH1, p.BDMA_CH0, spi_config); + + let executor = EXECUTOR.init(Executor::new()); + + executor.run(|spawner| { + unwrap!(spawner.spawn(main_task(spi))); + }) +} From 1c10339f4791b5ec6e2d41da79315fcb853b5529 Mon Sep 17 00:00:00 2001 From: Pegasis Date: Fri, 3 May 2024 08:17:29 -0400 Subject: [PATCH 263/581] format --- examples/stm32h7/build.rs | 2 +- examples/stm32h7/src/bin/spi_bdma.rs | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/examples/stm32h7/build.rs b/examples/stm32h7/build.rs index b9bb661f0..30691aa97 100644 --- a/examples/stm32h7/build.rs +++ b/examples/stm32h7/build.rs @@ -28,7 +28,7 @@ fn main() { // here, we ensure the build script is only re-run when // `memory.x` is changed. println!("cargo:rerun-if-changed=memory.x"); - + println!("cargo:rustc-link-arg-bins=--nmagic"); println!("cargo:rustc-link-arg-bins=-Tlink.x"); println!("cargo:rustc-link-arg-bins=-Tdefmt.x"); diff --git a/examples/stm32h7/src/bin/spi_bdma.rs b/examples/stm32h7/src/bin/spi_bdma.rs index 2fc37fc22..f968df4a7 100644 --- a/examples/stm32h7/src/bin/spi_bdma.rs +++ b/examples/stm32h7/src/bin/spi_bdma.rs @@ -22,7 +22,7 @@ static mut RAM_D3: [u8; 64 * 1024] = [0u8; 64 * 1024]; async fn main_task(mut spi: spi::Spi<'static, peripherals::SPI6, Async>) { let read_buffer = unsafe { &mut RAM_D3[0..128] }; let write_buffer = unsafe { &mut RAM_D3[128..256] }; - + for n in 0u32.. { let mut write: String<128> = String::new(); core::write!(&mut write, "Hello DMA World {}!\r\n", n).unwrap(); From 8e92e8718d513298fa87a51e4039ae11a4f6d502 Mon Sep 17 00:00:00 2001 From: Karun Date: Fri, 3 May 2024 12:40:26 -0400 Subject: [PATCH 264/581] Add example documentation --- embassy-stm32/src/tsc/mod.rs | 60 ++++++++++++++++++++++++++++++++++++ 1 file changed, 60 insertions(+) diff --git a/embassy-stm32/src/tsc/mod.rs b/embassy-stm32/src/tsc/mod.rs index a37341b31..6b9d8fcf5 100644 --- a/embassy-stm32/src/tsc/mod.rs +++ b/embassy-stm32/src/tsc/mod.rs @@ -1,4 +1,64 @@ //! TSC Peripheral Interface +//! +//! +//! # Example (stm32) +//! ``` rust, ignore +//! +//! let mut device_config = embassy_stm32::Config::default(); +//! { +//! device_config.rcc.mux = ClockSrc::MSI(Msirange::RANGE_4MHZ); +//! } +//! +//! let context = embassy_stm32::init(device_config); +//! +//! let config = tsc::Config { +//! ct_pulse_high_length: ChargeTransferPulseCycle::_2, +//! ct_pulse_low_length: ChargeTransferPulseCycle::_2, +//! spread_spectrum: false, +//! spread_spectrum_deviation: SSDeviation::new(2).unwrap(), +//! spread_spectrum_prescaler: false, +//! pulse_generator_prescaler: PGPrescalerDivider::_4, +//! max_count_value: MaxCount::_8191, +//! io_default_mode: false, +//! synchro_pin_polarity: false, +//! acquisition_mode: false, +//! max_count_interrupt: false, +//! channel_ios: TscIOPin::Group2Io2 | TscIOPin::Group7Io3, +//! shield_ios: TscIOPin::Group1Io3.into(), +//! sampling_ios: TscIOPin::Group1Io2 | TscIOPin::Group2Io1 | TscIOPin::Group7Io2, +//! }; +//! +//! let mut g1: PinGroup = PinGroup::new(); +//! g1.set_io2(context.PB13, PinType::Sample); +//! g1.set_io3(context.PB14, PinType::Shield); +//! +//! let mut g2: PinGroup = PinGroup::new(); +//! g2.set_io1(context.PB4, PinType::Sample); +//! g2.set_io2(context.PB5, PinType::Channel); +//! +//! let mut g7: PinGroup = PinGroup::new(); +//! g7.set_io2(context.PE3, PinType::Sample); +//! g7.set_io3(context.PE4, PinType::Channel); +//! +//! let mut touch_controller = tsc::Tsc::new( +//! context.TSC, +//! Some(g1), +//! Some(g2), +//! None, +//! None, +//! None, +//! None, +//! Some(g7), +//! None, +//! config, +//! ); +//! +//! touch_controller.discharge_io(true); +//! Timer::after_millis(1).await; +//! +//! touch_controller.start(); +//! +//! ``` #![macro_use] From a91f68654473e8ca6030b97ccda98e7fd868716e Mon Sep 17 00:00:00 2001 From: Karun Date: Fri, 3 May 2024 17:29:21 -0400 Subject: [PATCH 265/581] Check group configuration validity --- embassy-stm32/src/tsc/mod.rs | 250 ++++++++++++++++++++++++++++++++--- 1 file changed, 233 insertions(+), 17 deletions(-) diff --git a/embassy-stm32/src/tsc/mod.rs b/embassy-stm32/src/tsc/mod.rs index 6b9d8fcf5..17a455558 100644 --- a/embassy-stm32/src/tsc/mod.rs +++ b/embassy-stm32/src/tsc/mod.rs @@ -215,10 +215,15 @@ impl Default for Config { #[allow(missing_docs)] pub struct TscPin<'d, T, C> { _pin: PeripheralRef<'d, AnyPin>, - _role: PinType, + role: PinType, phantom: PhantomData<(T, C)>, } +enum GroupError { + NoSample, + ChannelShield, +} + /// Pin group definition /// Pins are organized into groups of four IOs, all groups with a /// sampling channel must also have a sampling capacitor channel. @@ -241,6 +246,119 @@ impl<'d, T: Instance, C> PinGroup<'d, T, C> { d4: None, } } + + fn contains_shield(&self) -> bool { + let mut shield_count = 0; + + if let Some(pin) = &self.d1 { + if let PinType::Shield = pin.role { + shield_count += 1; + } + } + + if let Some(pin) = &self.d2 { + if let PinType::Shield = pin.role { + shield_count += 1; + } + } + + if let Some(pin) = &self.d3 { + if let PinType::Shield = pin.role { + shield_count += 1; + } + } + + if let Some(pin) = &self.d4 { + if let PinType::Shield = pin.role { + shield_count += 1; + } + } + + shield_count == 1 + } + + fn check_group(&self) -> Result<(), GroupError> { + let mut channel_count = 0; + let mut shield_count = 0; + let mut sample_count = 0; + if let Some(pin) = &self.d1 { + match pin.role { + PinType::Channel => { + channel_count += 1; + } + PinType::Shield => { + shield_count += 1; + } + PinType::Sample => { + sample_count += 1; + } + } + } + + if let Some(pin) = &self.d2 { + match pin.role { + PinType::Channel => { + channel_count += 1; + } + PinType::Shield => { + shield_count += 1; + } + PinType::Sample => { + sample_count += 1; + } + } + } + + if let Some(pin) = &self.d3 { + match pin.role { + PinType::Channel => { + channel_count += 1; + } + PinType::Shield => { + shield_count += 1; + } + PinType::Sample => { + sample_count += 1; + } + } + } + + if let Some(pin) = &self.d4 { + match pin.role { + PinType::Channel => { + channel_count += 1; + } + PinType::Shield => { + shield_count += 1; + } + PinType::Sample => { + sample_count += 1; + } + } + } + + // Every group requires one sampling capacitor + if sample_count != 1 { + return Err(GroupError::NoSample); + } + + // Each group must have at least one shield or channel IO + if shield_count == 0 && channel_count == 0 { + return Err(GroupError::ChannelShield); + } + + // Any group can either contain channel ios or a shield IO + if shield_count != 0 && channel_count != 0 { + return Err(GroupError::ChannelShield); + } + + // No more than one shield IO is allow per group and amongst all groups + if shield_count > 1 { + return Err(GroupError::ChannelShield); + } + + Ok(()) + } } macro_rules! group_impl { @@ -261,7 +379,7 @@ macro_rules! group_impl { ); self.d1 = Some(TscPin { _pin: pin.map_into(), - _role: role, + role: role, phantom: PhantomData, }) }) @@ -282,7 +400,7 @@ macro_rules! group_impl { ); self.d2 = Some(TscPin { _pin: pin.map_into(), - _role: role, + role: role, phantom: PhantomData, }) }) @@ -303,7 +421,7 @@ macro_rules! group_impl { ); self.d3 = Some(TscPin { _pin: pin.map_into(), - _role: role, + role: role, phantom: PhantomData, }) }) @@ -324,7 +442,7 @@ macro_rules! group_impl { ); self.d4 = Some(TscPin { _pin: pin.map_into(), - _role: role, + role: role, phantom: PhantomData, }) }) @@ -391,20 +509,118 @@ impl<'d, T: Instance> Tsc<'d, T> { config: Config, ) -> Self { // Need to check valid pin configuration input - Self::new_inner( - peri, - g1, - g2, - g3, - g4, - g5, - g6, + let g1 = g1.filter(|b| b.check_group().is_ok()); + let g2 = g2.filter(|b| b.check_group().is_ok()); + let g3 = g3.filter(|b| b.check_group().is_ok()); + let g4 = g4.filter(|b| b.check_group().is_ok()); + let g5 = g5.filter(|b| b.check_group().is_ok()); + let g6 = g6.filter(|b| b.check_group().is_ok()); + let g7 = g7.filter(|b| b.check_group().is_ok()); + let g8 = g8.filter(|b| b.check_group().is_ok()); + + match Self::check_shields( + &g1, + &g2, + &g3, + &g4, + &g5, + &g6, #[cfg(any(tsc_v2, tsc_v3))] - g7, + &g7, #[cfg(tsc_v3)] - g8, - config, - ) + &g8, + ) { + Ok(()) => Self::new_inner( + peri, + g1, + g2, + g3, + g4, + g5, + g6, + #[cfg(any(tsc_v2, tsc_v3))] + g7, + #[cfg(tsc_v3)] + g8, + config, + ), + Err(_) => Self::new_inner( + peri, + None, + None, + None, + None, + None, + None, + #[cfg(any(tsc_v2, tsc_v3))] + None, + #[cfg(tsc_v3)] + None, + config, + ), + } + } + + fn check_shields( + g1: &Option>, + g2: &Option>, + g3: &Option>, + g4: &Option>, + g5: &Option>, + g6: &Option>, + #[cfg(any(tsc_v2, tsc_v3))] g7: &Option>, + #[cfg(tsc_v3)] g8: &Option>, + ) -> Result<(), GroupError> { + let mut shield_count = 0; + + if let Some(pin_group) = g1 { + if pin_group.contains_shield() { + shield_count += 1; + } + }; + if let Some(pin_group) = g2 { + if pin_group.contains_shield() { + shield_count += 1; + } + }; + if let Some(pin_group) = g3 { + if pin_group.contains_shield() { + shield_count += 1; + } + }; + if let Some(pin_group) = g4 { + if pin_group.contains_shield() { + shield_count += 1; + } + }; + if let Some(pin_group) = g5 { + if pin_group.contains_shield() { + shield_count += 1; + } + }; + if let Some(pin_group) = g6 { + if pin_group.contains_shield() { + shield_count += 1; + } + }; + #[cfg(any(tsc_v2, tsc_v3))] + if let Some(pin_group) = g7 { + if pin_group.contains_shield() { + shield_count += 1; + } + }; + #[cfg(tsc_v3)] + if let Some(pin_group) = g8 { + if pin_group.contains_shield() { + shield_count += 1; + } + }; + + if shield_count > 1 { + return Err(GroupError::ChannelShield); + } + + Ok(()) } fn extract_groups(io_mask: u32) -> u32 { From 07c2f169f50bb6cf52cfd3b2a815cfb7c2d34aa8 Mon Sep 17 00:00:00 2001 From: Karun Date: Fri, 3 May 2024 19:47:42 -0400 Subject: [PATCH 266/581] Add versioning for group checks --- embassy-stm32/src/tsc/mod.rs | 2 ++ 1 file changed, 2 insertions(+) diff --git a/embassy-stm32/src/tsc/mod.rs b/embassy-stm32/src/tsc/mod.rs index 17a455558..bf583f04c 100644 --- a/embassy-stm32/src/tsc/mod.rs +++ b/embassy-stm32/src/tsc/mod.rs @@ -515,7 +515,9 @@ impl<'d, T: Instance> Tsc<'d, T> { let g4 = g4.filter(|b| b.check_group().is_ok()); let g5 = g5.filter(|b| b.check_group().is_ok()); let g6 = g6.filter(|b| b.check_group().is_ok()); + #[cfg(any(tsc_v2, tsc_v3))] let g7 = g7.filter(|b| b.check_group().is_ok()); + #[cfg(tsc_v3)] let g8 = g8.filter(|b| b.check_group().is_ok()); match Self::check_shields( From 7b3939ca80f11f348bed4fcd2297a1e4ac07a7e8 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Jan=20=C5=A0pa=C4=8Dek?= Date: Sat, 4 May 2024 19:42:32 +0200 Subject: [PATCH 267/581] stm32/timer: add `low_level::Timer::get_clock_frequency()` --- embassy-stm32/src/timer/low_level.rs | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/embassy-stm32/src/timer/low_level.rs b/embassy-stm32/src/timer/low_level.rs index 294dff7ea..aa73986ea 100644 --- a/embassy-stm32/src/timer/low_level.rs +++ b/embassy-stm32/src/timer/low_level.rs @@ -321,6 +321,11 @@ impl<'d, T: CoreInstance> Timer<'d, T> { } } } + + /// Get the clock frequency of the timer (before prescaler is applied). + pub fn get_clock_frequency(&self) -> Hertz { + T::frequency() + } } impl<'d, T: BasicNoCr2Instance> Timer<'d, T> { From 1da9e326bb2d6dae164f4ed3205ce40ad07375c0 Mon Sep 17 00:00:00 2001 From: onestacked Date: Sun, 5 May 2024 19:43:35 +0200 Subject: [PATCH 268/581] Removes some unused dependencies in embedded-net. --- embassy-net/Cargo.toml | 4 ---- 1 file changed, 4 deletions(-) diff --git a/embassy-net/Cargo.toml b/embassy-net/Cargo.toml index 7d71e902f..b7146c430 100644 --- a/embassy-net/Cargo.toml +++ b/embassy-net/Cargo.toml @@ -78,9 +78,5 @@ embedded-io-async = { version = "0.6.1" } managed = { version = "0.8.0", default-features = false, features = [ "map" ] } heapless = { version = "0.8", default-features = false } -as-slice = "0.2.1" -generic-array = { version = "0.14.4", default-features = false } -stable_deref_trait = { version = "1.2.0", default-features = false } -atomic-pool = "1.0" embedded-nal-async = { version = "0.7.1" } document-features = "0.2.7" From ad66dc3aabe6ac11dd0f3aa4d9f403e3aac7e8f4 Mon Sep 17 00:00:00 2001 From: Bruno Bousquet <21108660+brunob45@users.noreply.github.com> Date: Sun, 5 May 2024 21:58:54 -0400 Subject: [PATCH 269/581] create input_capture --- embassy-stm32/src/timer/input_capture.rs | 141 ++++++++++++++++++++++ embassy-stm32/src/timer/mod.rs | 1 + examples/stm32f4/.cargo/config.toml | 12 +- examples/stm32f4/.vscode/README.md | 109 +++++++++++++++++ examples/stm32f4/.vscode/extensions.json | 17 +++ examples/stm32f4/.vscode/launch.json | 33 +++++ examples/stm32f4/.vscode/tasks.json | 43 +++++++ examples/stm32f4/openocd.cfg | 5 + examples/stm32f4/openocd.gdb | 40 ++++++ examples/stm32f4/src/bin/input_capture.rs | 39 ++++++ 10 files changed, 438 insertions(+), 2 deletions(-) create mode 100644 embassy-stm32/src/timer/input_capture.rs create mode 100644 examples/stm32f4/.vscode/README.md create mode 100644 examples/stm32f4/.vscode/extensions.json create mode 100644 examples/stm32f4/.vscode/launch.json create mode 100644 examples/stm32f4/.vscode/tasks.json create mode 100644 examples/stm32f4/openocd.cfg create mode 100644 examples/stm32f4/openocd.gdb create mode 100644 examples/stm32f4/src/bin/input_capture.rs diff --git a/embassy-stm32/src/timer/input_capture.rs b/embassy-stm32/src/timer/input_capture.rs new file mode 100644 index 000000000..6401656c8 --- /dev/null +++ b/embassy-stm32/src/timer/input_capture.rs @@ -0,0 +1,141 @@ +//! Input capture driver. + +use core::marker::PhantomData; + +use embassy_hal_internal::{into_ref, PeripheralRef}; +use embassy_sync::channel; + +use super::low_level::{CountingMode, InputCaptureMode, InputTISelection, Timer}; +use super::{Channel, Channel1Pin, Channel2Pin, Channel3Pin, Channel4Pin, GeneralInstance4Channel}; +use crate::gpio::{AFType, AnyPin, Pull}; +use crate::time::Hertz; +use crate::Peripheral; + +/// Channel 1 marker type. +pub enum Ch1 {} +/// Channel 2 marker type. +pub enum Ch2 {} +/// Channel 3 marker type. +pub enum Ch3 {} +/// Channel 4 marker type. +pub enum Ch4 {} + +/// Capture pin wrapper. +/// +/// This wraps a pin to make it usable with capture. +pub struct CapturePin<'d, T, C> { + _pin: PeripheralRef<'d, AnyPin>, + phantom: PhantomData<(T, C)>, +} + +macro_rules! channel_impl { + ($new_chx:ident, $channel:ident, $pin_trait:ident) => { + impl<'d, T: GeneralInstance4Channel> CapturePin<'d, T, $channel> { + #[doc = concat!("Create a new ", stringify!($channel), " capture pin instance.")] + pub fn $new_chx(pin: impl Peripheral

> + 'd, pull_type: Pull) -> Self { + into_ref!(pin); + critical_section::with(|_| { + pin.set_as_af_pull(pin.af_num(), AFType::Input, pull_type); + #[cfg(gpio_v2)] + pin.set_speed(crate::gpio::Speed::VeryHigh); + }); + CapturePin { + _pin: pin.map_into(), + phantom: PhantomData, + } + } + } + }; +} + +channel_impl!(new_ch1, Ch1, Channel1Pin); +channel_impl!(new_ch2, Ch2, Channel2Pin); +channel_impl!(new_ch3, Ch3, Channel3Pin); +channel_impl!(new_ch4, Ch4, Channel4Pin); + +/// Input capture driver. +pub struct InputCapture<'d, T: GeneralInstance4Channel> { + inner: Timer<'d, T>, +} + +impl<'d, T: GeneralInstance4Channel> InputCapture<'d, T> { + /// Create a new input capture driver. + pub fn new( + tim: impl Peripheral

+ 'd, + _ch1: Option>, + _ch2: Option>, + _ch3: Option>, + _ch4: Option>, + freq: Hertz, + counting_mode: CountingMode, + ) -> Self { + Self::new_inner(tim, freq, counting_mode) + } + + fn new_inner(tim: impl Peripheral

+ 'd, freq: Hertz, counting_mode: CountingMode) -> Self { + let mut this = Self { inner: Timer::new(tim) }; + + this.inner.set_counting_mode(counting_mode); + this.set_tick_freq(freq); + this.inner.enable_outputs(); // Required for advanced timers, see GeneralInstance4Channel for details + this.inner.start(); + + [Channel::Ch1, Channel::Ch2, Channel::Ch3, Channel::Ch4] + .iter() + .for_each(|&channel| { + this.inner.set_input_capture_mode(channel, InputCaptureMode::Rising); + + this.inner.set_input_ti_selection(channel, InputTISelection::Normal); + }); + + this + } + + /// Enable the given channel. + pub fn enable(&mut self, channel: Channel) { + self.inner.enable_channel(channel, true); + } + + /// Disable the given channel. + pub fn disable(&mut self, channel: Channel) { + self.inner.enable_channel(channel, false); + } + + /// Check whether given channel is enabled + pub fn is_enabled(&self, channel: Channel) -> bool { + self.inner.get_channel_enable_state(channel) + } + + /// Set tick frequency. + /// + /// Note: when you call this, the max period value changes + pub fn set_tick_freq(&mut self, freq: Hertz) { + let f = freq; + assert!(f.0 > 0); + let timer_f = self.inner.get_clock_frequency(); + + let pclk_ticks_per_timer_period = timer_f / f; + let psc: u16 = unwrap!((pclk_ticks_per_timer_period - 1).try_into()); + + let regs = self.inner.regs_core(); + regs.psc().write_value(psc); + + // Generate an Update Request + regs.egr().write(|r| r.set_ug(true)); + } + + /// Set the input capture mode for a given channel. + pub fn set_input_capture_mode(&mut self, channel: Channel, mode: InputCaptureMode) { + self.inner.set_input_capture_mode(channel, mode); + } + + /// Set input TI selection. + pub fn set_input_ti_selection(&mut self, channel: Channel, tisel: InputTISelection) { + self.inner.set_input_ti_selection(channel, tisel) + } + + /// Get capture value for a channel. + pub fn get_capture_value(&self, channel: Channel) -> u32 { + self.inner.get_capture_value(channel) + } +} diff --git a/embassy-stm32/src/timer/mod.rs b/embassy-stm32/src/timer/mod.rs index 346127005..532d41650 100644 --- a/embassy-stm32/src/timer/mod.rs +++ b/embassy-stm32/src/timer/mod.rs @@ -5,6 +5,7 @@ pub mod complementary_pwm; pub mod low_level; pub mod qei; pub mod simple_pwm; +pub mod input_capture; use crate::interrupt; use crate::rcc::RccPeripheral; diff --git a/examples/stm32f4/.cargo/config.toml b/examples/stm32f4/.cargo/config.toml index 16efa8e6f..fdb246a7f 100644 --- a/examples/stm32f4/.cargo/config.toml +++ b/examples/stm32f4/.cargo/config.toml @@ -1,9 +1,17 @@ [target.'cfg(all(target_arch = "arm", target_os = "none"))'] # replace STM32F429ZITx with your chip as listed in `probe-rs chip list` -runner = "probe-rs run --chip STM32F429ZITx" +# runner = "probe-rs run --chip STM32F429ZITx" +runner = "arm-none-eabi-gdb -q -x openocd.gdb" [build] -target = "thumbv7em-none-eabi" +# Pick ONE of these default compilation targets +# target = "thumbv6m-none-eabi" # Cortex-M0 and Cortex-M0+ +# target = "thumbv7m-none-eabi" # Cortex-M3 +# target = "thumbv7em-none-eabi" # Cortex-M4 and Cortex-M7 (no FPU) +target = "thumbv7em-none-eabihf" # Cortex-M4F and Cortex-M7F (with FPU) +# target = "thumbv8m.base-none-eabi" # Cortex-M23 +# target = "thumbv8m.main-none-eabi" # Cortex-M33 (no FPU) +# target = "thumbv8m.main-none-eabihf" # Cortex-M33 (with FPU) [env] DEFMT_LOG = "trace" diff --git a/examples/stm32f4/.vscode/README.md b/examples/stm32f4/.vscode/README.md new file mode 100644 index 000000000..4d20f43a8 --- /dev/null +++ b/examples/stm32f4/.vscode/README.md @@ -0,0 +1,109 @@ +# VS Code Configuration + +Example configurations for debugging programs in-editor with VS Code. +This directory contains configurations for two platforms: + + - `LM3S6965EVB` on QEMU + - `STM32F303x` via OpenOCD + +## Required Extensions + +If you have the `code` command in your path, you can run the following commands to install the necessary extensions. + +```sh +code --install-extension rust-lang.rust-analyzer +code --install-extension marus25.cortex-debug +``` + +Otherwise, you can use the Extensions view to search for and install them, or go directly to their marketplace pages and click the "Install" button. + +- [Rust Language Server (rust-analyzer)](https://marketplace.visualstudio.com/items?itemName=rust-lang.rust-analyzer) +- [Cortex-Debug](https://marketplace.visualstudio.com/items?itemName=marus25.cortex-debug) + +## Use + +The quickstart comes with two debug configurations. +Both are configured to build the project, using the default settings from `.cargo/config`, prior to starting a debug session. + +1. QEMU: Starts a debug session using an emulation of the `LM3S6965EVB` mcu. + - This works on a fresh `cargo generate` without modification of any of the settings described above. + - Semihosting output will be written to the Output view `Adapter Output`. + - `ITM` logging does not work with QEMU emulation. + +2. OpenOCD: Starts a debug session for a `STM32F3DISCOVERY` board (or any `STM32F303x` running at 8MHz). + - Follow the instructions above for configuring the build with `.cargo/config` and the `memory.x` linker script. + - `ITM` output will be written to the Output view `SWO: ITM [port: 0, type: console]` output. + +### Git + +Files in the `.vscode/` directory are `.gitignore`d by default because many files that may end up in the `.vscode/` directory should not be committed and shared. +If you would like to save this debug configuration to your repository and share it with your team, you'll need to explicitly `git add` the files to your repository. + +```sh +git add -f .vscode/launch.json +git add -f .vscode/tasks.json +git add -f .vscode/*.svd +``` + +## Customizing for other targets + +For full documentation, see the [Cortex-Debug][cortex-debug] repository. + +### Device + +Some configurations use this to automatically find the SVD file. +Replace this with the part number for your device. + +```json +"device": "STM32F303VCT6", +``` + +### OpenOCD Config Files + +The `configFiles` property specifies a list of files to pass to OpenOCD. + +```json +"configFiles": [ + "interface/stlink-v2-1.cfg", + "target/stm32f3x.cfg" +], +``` + +See the [OpenOCD config docs][openocd-config] for more information and the [OpenOCD repository for available configuration files][openocd-repo]. + +### SVD + +The SVD file is a standard way of describing all registers and peripherals of an ARM Cortex-M mCU. +Cortex-Debug needs this file to display the current register values for the peripherals on the device. + +You can probably find the SVD for your device on the vendor's website. + + +For example, the STM32F3DISCOVERY board uses an mcu from the `STM32F303x` line of processors. +All the SVD files for the STM32F3 series are available on [ST's Website][stm32f3]. +Download the [stm32f3 SVD pack][stm32f3-svd], and copy the `STM32F303.svd` file into `.vscode/`. +This line of the config tells the Cortex-Debug plug in where to find the file. + +```json +"svdFile": "${workspaceRoot}/.vscode/STM32F303.svd", +``` + +For other processors, simply copy the correct `*.svd` file into the project and update the config accordingly. + +### CPU Frequency + +If your device is running at a frequency other than 8MHz, you'll need to modify this line of `launch.json` for the `ITM` output to work correctly. + +```json +"cpuFrequency": 8000000, +``` + +### Other GDB Servers + +For information on setting up GDB servers other than OpenOCD, see the [Cortex-Debug repository][cortex-debug]. + +[cortex-debug]: https://github.com/Marus/cortex-debug +[stm32f3]: https://www.st.com/content/st_com/en/products/microcontrollers-microprocessors/stm32-32-bit-arm-cortex-mcus/stm32-mainstream-mcus/stm32f3-series.html#resource +[stm32f3-svd]: https://www.st.com/resource/en/svd/stm32f3_svd.zip +[openocd-config]: http://openocd.org/doc/html/Config-File-Guidelines.html +[openocd-repo]: https://sourceforge.net/p/openocd/code/ci/master/tree/tcl/ diff --git a/examples/stm32f4/.vscode/extensions.json b/examples/stm32f4/.vscode/extensions.json new file mode 100644 index 000000000..b7304974e --- /dev/null +++ b/examples/stm32f4/.vscode/extensions.json @@ -0,0 +1,17 @@ +{ + // See https://go.microsoft.com/fwlink/?LinkId=827846 to learn about workspace recommendations. + // Extension identifier format: ${publisher}.${name}. Example: vscode.csharp + + // List of extensions which should be recommended for users of this workspace. + "recommendations": [ + "rust-lang.rust-analyzer", + "marus25.cortex-debug", + "usernamehw.errorlens", + "tamasfe.even-better-toml", + "serayuzgur.crates" + ], + // List of extensions recommended by VS Code that should not be recommended for users of this workspace. + "unwantedRecommendations": [ + + ] +} diff --git a/examples/stm32f4/.vscode/launch.json b/examples/stm32f4/.vscode/launch.json new file mode 100644 index 000000000..20cd4d2e8 --- /dev/null +++ b/examples/stm32f4/.vscode/launch.json @@ -0,0 +1,33 @@ +{ + /* + * Requires the Rust Language Server (rust-analyzer) and Cortex-Debug extensions + * https://marketplace.visualstudio.com/items?itemName=rust-lang.rust-analyzer + * https://marketplace.visualstudio.com/items?itemName=marus25.cortex-debug + */ + "version": "0.2.0", + "configurations": [ + { + /* Configuration for the STM32F446 Discovery board */ + "type": "cortex-debug", + "request": "launch", + "name": "Debug (OpenOCD)", + "servertype": "openocd", + "cwd": "${workspaceRoot}", + "preLaunchTask": "Cargo Build (debug)", + "runToEntryPoint": "main", + "executable": "./target/thumbv7em-none-eabihf/debug/input_capture", + /* Run `cargo build --example itm` and uncomment this line to run itm example */ + // "executable": "./target/thumbv7em-none-eabihf/debug/examples/itm", + "device": "STM32F446RET6", + "configFiles": [ + "interface/stlink.cfg", + "target/stm32f4x.cfg" + ], + "postLaunchCommands": [ + "monitor arm semihosting enable" + ], + "postRestartCommands": [], + "postResetCommands": [], + } + ] +} \ No newline at end of file diff --git a/examples/stm32f4/.vscode/tasks.json b/examples/stm32f4/.vscode/tasks.json new file mode 100644 index 000000000..9109a6157 --- /dev/null +++ b/examples/stm32f4/.vscode/tasks.json @@ -0,0 +1,43 @@ +{ + // See https://go.microsoft.com/fwlink/?LinkId=733558 + // for the documentation about the tasks.json format + "version": "2.0.0", + "tasks": [ + { + /* + * This is the default cargo build task, + * but we need to provide a label for it, + * so we can invoke it from the debug launcher. + */ + "label": "Cargo Build (debug)", + "type": "process", + "command": "cargo", + "args": ["build", "--bin", "input_capture"], + "problemMatcher": [ + "$rustc" + ], + "group": { + "kind": "build", + "isDefault": true + } + }, + { + "label": "Cargo Build (release)", + "type": "process", + "command": "cargo", + "args": ["build", "--release"], + "problemMatcher": [ + "$rustc" + ], + "group": "build" + }, + { + "label": "Cargo Clean", + "type": "process", + "command": "cargo", + "args": ["clean"], + "problemMatcher": [], + "group": "build" + }, + ] +} diff --git a/examples/stm32f4/openocd.cfg b/examples/stm32f4/openocd.cfg new file mode 100644 index 000000000..e41d52b1a --- /dev/null +++ b/examples/stm32f4/openocd.cfg @@ -0,0 +1,5 @@ +# Sample OpenOCD configuration for the STM32F3DISCOVERY development board + +source [find interface/stlink.cfg] + +source [find target/stm32f4x.cfg] diff --git a/examples/stm32f4/openocd.gdb b/examples/stm32f4/openocd.gdb new file mode 100644 index 000000000..7795319fb --- /dev/null +++ b/examples/stm32f4/openocd.gdb @@ -0,0 +1,40 @@ +target extended-remote :3333 + +# print demangled symbols +set print asm-demangle on + +# set backtrace limit to not have infinite backtrace loops +set backtrace limit 32 + +# detect unhandled exceptions, hard faults and panics +break DefaultHandler +break HardFault +break rust_begin_unwind +# # run the next few lines so the panic message is printed immediately +# # the number needs to be adjusted for your panic handler +# commands $bpnum +# next 4 +# end + +# *try* to stop at the user entry point (it might be gone due to inlining) +break main + +monitor arm semihosting enable + +# # send captured ITM to the file itm.fifo +# # (the microcontroller SWO pin must be connected to the programmer SWO pin) +# # 8000000 must match the core clock frequency +# monitor tpiu config internal itm.txt uart off 8000000 + +# # OR: make the microcontroller SWO pin output compatible with UART (8N1) +# # 8000000 must match the core clock frequency +# # 2000000 is the frequency of the SWO pin +# monitor tpiu config external uart off 8000000 2000000 + +# # enable ITM port 0 +# monitor itm port 0 on + +load + +# start the process but immediately halt the processor +stepi diff --git a/examples/stm32f4/src/bin/input_capture.rs b/examples/stm32f4/src/bin/input_capture.rs new file mode 100644 index 000000000..202f363fc --- /dev/null +++ b/examples/stm32f4/src/bin/input_capture.rs @@ -0,0 +1,39 @@ +#![no_std] +#![no_main] + +use defmt::*; +use embassy_executor::Spawner; +use embassy_stm32::{ + gpio::{self, Level, Output, Speed}, + time::Hertz, +}; +use embassy_time::Timer; +use {defmt_rtt as _, panic_probe as _}; + +use embassy_stm32::timer::{ + input_capture::{CapturePin, InputCapture}, + Channel, +}; + +#[embassy_executor::main] +async fn main(_spawner: Spawner) { + let p = embassy_stm32::init(Default::default()); + info!("Hello World!"); + + let mut led = Output::new(p.PB2, Level::High, Speed::Low); + + let ic = CapturePin::new_ch3(p.PB10, gpio::Pull::None); + let drv = InputCapture::new(p.TIM2, None, None, Some(ic), None, Hertz::mhz(1), Default::default()); + let mut _last: u32; + + loop { + info!("high"); + led.set_high(); + Timer::after_millis(300).await; + + info!("low"); + led.set_low(); + Timer::after_millis(300).await; + _last = drv.get_capture_value(Channel::Ch1); + } +} From 431a60ca6384a77243d33f5b1bbef878267bea49 Mon Sep 17 00:00:00 2001 From: Bruno Bousquet <21108660+brunob45@users.noreply.github.com> Date: Sun, 5 May 2024 22:30:16 -0400 Subject: [PATCH 270/581] formatting --- embassy-stm32/src/timer/input_capture.rs | 1 - examples/stm32f4/Cargo.toml | 2 +- examples/stm32f4/src/bin/input_capture.rs | 29 +++++++++++++---------- 3 files changed, 18 insertions(+), 14 deletions(-) diff --git a/embassy-stm32/src/timer/input_capture.rs b/embassy-stm32/src/timer/input_capture.rs index 6401656c8..bf26cabc6 100644 --- a/embassy-stm32/src/timer/input_capture.rs +++ b/embassy-stm32/src/timer/input_capture.rs @@ -3,7 +3,6 @@ use core::marker::PhantomData; use embassy_hal_internal::{into_ref, PeripheralRef}; -use embassy_sync::channel; use super::low_level::{CountingMode, InputCaptureMode, InputTISelection, Timer}; use super::{Channel, Channel1Pin, Channel2Pin, Channel3Pin, Channel4Pin, GeneralInstance4Channel}; diff --git a/examples/stm32f4/Cargo.toml b/examples/stm32f4/Cargo.toml index 64ac50818..5469f0cc6 100644 --- a/examples/stm32f4/Cargo.toml +++ b/examples/stm32f4/Cargo.toml @@ -6,7 +6,7 @@ license = "MIT OR Apache-2.0" [dependencies] # Change stm32f429zi to your chip name, if necessary. -embassy-stm32 = { version = "0.1.0", path = "../../embassy-stm32", features = ["defmt", "stm32f429zi", "unstable-pac", "memory-x", "time-driver-any", "exti", "chrono"] } +embassy-stm32 = { version = "0.1.0", path = "../../embassy-stm32", features = ["defmt", "stm32f446re", "unstable-pac", "memory-x", "time-driver-any", "exti", "chrono"] } embassy-sync = { version = "0.5.0", path = "../../embassy-sync", features = ["defmt"] } embassy-executor = { version = "0.5.0", path = "../../embassy-executor", features = ["task-arena-size-32768", "arch-cortex-m", "executor-thread", "executor-interrupt", "defmt", "integrated-timers"] } embassy-time = { version = "0.3.0", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime", "tick-hz-32_768"] } diff --git a/examples/stm32f4/src/bin/input_capture.rs b/examples/stm32f4/src/bin/input_capture.rs index 202f363fc..714f043b6 100644 --- a/examples/stm32f4/src/bin/input_capture.rs +++ b/examples/stm32f4/src/bin/input_capture.rs @@ -3,17 +3,14 @@ use defmt::*; use embassy_executor::Spawner; -use embassy_stm32::{ - gpio::{self, Level, Output, Speed}, - time::Hertz, -}; +use embassy_stm32::gpio::{Level, Output, Pull, Speed}; +use embassy_stm32::time::khz; +use embassy_stm32::timer::input_capture::{CapturePin, InputCapture}; +use embassy_stm32::timer::Channel; use embassy_time::Timer; use {defmt_rtt as _, panic_probe as _}; -use embassy_stm32::timer::{ - input_capture::{CapturePin, InputCapture}, - Channel, -}; +/// Connect PB2 and PB10 with a 1k Ohm resistor #[embassy_executor::main] async fn main(_spawner: Spawner) { @@ -22,9 +19,11 @@ async fn main(_spawner: Spawner) { let mut led = Output::new(p.PB2, Level::High, Speed::Low); - let ic = CapturePin::new_ch3(p.PB10, gpio::Pull::None); - let drv = InputCapture::new(p.TIM2, None, None, Some(ic), None, Hertz::mhz(1), Default::default()); - let mut _last: u32; + let ch3 = CapturePin::new_ch3(p.PB10, Pull::None); + let mut ic = InputCapture::new(p.TIM2, None, None, Some(ch3), None, khz(1000), Default::default()); + ic.enable(Channel::Ch3); + + let mut last = 0; loop { info!("high"); @@ -34,6 +33,12 @@ async fn main(_spawner: Spawner) { info!("low"); led.set_low(); Timer::after_millis(300).await; - _last = drv.get_capture_value(Channel::Ch1); + + // Check for input capture + let cap = ic.get_capture_value(Channel::Ch3); + if cap != last { + info!("New capture!"); + last = cap; + } } } From 29d6fa0a4aa3203e95cf81ada366cb0ccf593af4 Mon Sep 17 00:00:00 2001 From: Bruno Bousquet <21108660+brunob45@users.noreply.github.com> Date: Sun, 5 May 2024 23:00:48 -0400 Subject: [PATCH 271/581] add get_input_interrupt --- embassy-stm32/src/timer/input_capture.rs | 5 +++ embassy-stm32/src/timer/low_level.rs | 5 +++ examples/stm32f4/src/bin/input_capture.rs | 45 +++++++++++++---------- 3 files changed, 36 insertions(+), 19 deletions(-) diff --git a/embassy-stm32/src/timer/input_capture.rs b/embassy-stm32/src/timer/input_capture.rs index bf26cabc6..bc7614cda 100644 --- a/embassy-stm32/src/timer/input_capture.rs +++ b/embassy-stm32/src/timer/input_capture.rs @@ -137,4 +137,9 @@ impl<'d, T: GeneralInstance4Channel> InputCapture<'d, T> { pub fn get_capture_value(&self, channel: Channel) -> u32 { self.inner.get_capture_value(channel) } + + /// Get input interrupt. + pub fn get_input_interrupt(&self, channel: Channel) -> bool { + self.inner.get_input_interrupt(channel) + } } diff --git a/embassy-stm32/src/timer/low_level.rs b/embassy-stm32/src/timer/low_level.rs index aa73986ea..7f533b75c 100644 --- a/embassy-stm32/src/timer/low_level.rs +++ b/embassy-stm32/src/timer/low_level.rs @@ -448,6 +448,11 @@ impl<'d, T: GeneralInstance4Channel> Timer<'d, T> { self.regs_gp16().sr().modify(|r| r.set_ccif(channel.index(), false)); } + /// Get input interrupt. + pub fn get_input_interrupt(&self, channel: Channel) -> bool { + self.regs_gp16().sr().read().ccif(channel.index()) + } + /// Enable input interrupt. pub fn enable_input_interrupt(&self, channel: Channel, enable: bool) { self.regs_gp16().dier().modify(|r| r.set_ccie(channel.index(), enable)); diff --git a/examples/stm32f4/src/bin/input_capture.rs b/examples/stm32f4/src/bin/input_capture.rs index 714f043b6..17f65c6b9 100644 --- a/examples/stm32f4/src/bin/input_capture.rs +++ b/examples/stm32f4/src/bin/input_capture.rs @@ -4,6 +4,7 @@ use defmt::*; use embassy_executor::Spawner; use embassy_stm32::gpio::{Level, Output, Pull, Speed}; +use embassy_stm32::peripherals::PB2; use embassy_stm32::time::khz; use embassy_stm32::timer::input_capture::{CapturePin, InputCapture}; use embassy_stm32::timer::Channel; @@ -12,18 +13,9 @@ use {defmt_rtt as _, panic_probe as _}; /// Connect PB2 and PB10 with a 1k Ohm resistor -#[embassy_executor::main] -async fn main(_spawner: Spawner) { - let p = embassy_stm32::init(Default::default()); - info!("Hello World!"); - - let mut led = Output::new(p.PB2, Level::High, Speed::Low); - - let ch3 = CapturePin::new_ch3(p.PB10, Pull::None); - let mut ic = InputCapture::new(p.TIM2, None, None, Some(ch3), None, khz(1000), Default::default()); - ic.enable(Channel::Ch3); - - let mut last = 0; +#[embassy_executor::task] +async fn blinky(led: PB2) { + let mut led = Output::new(led, Level::High, Speed::Low); loop { info!("high"); @@ -33,12 +25,27 @@ async fn main(_spawner: Spawner) { info!("low"); led.set_low(); Timer::after_millis(300).await; - - // Check for input capture - let cap = ic.get_capture_value(Channel::Ch3); - if cap != last { - info!("New capture!"); - last = cap; - } + } +} + +#[embassy_executor::main] +async fn main(spawner: Spawner) { + let p = embassy_stm32::init(Default::default()); + info!("Hello World!"); + + unwrap!(spawner.spawn(blinky(p.PB2))); + + let ch3 = CapturePin::new_ch3(p.PB10, Pull::None); + let mut ic = InputCapture::new(p.TIM2, None, None, Some(ch3), None, khz(1000), Default::default()); + ic.enable(Channel::Ch3); + + loop { + // Check for input capture + if ic.get_input_interrupt(Channel::Ch3) { + let capture_value = ic.get_capture_value(Channel::Ch3); + info!("New capture! {}", capture_value); + } + // Wait a little bit + Timer::after_millis(1).await; } } From 7b04b0166b59558322c77eac6683bbf58268b3f1 Mon Sep 17 00:00:00 2001 From: Bruno Bousquet <21108660+brunob45@users.noreply.github.com> Date: Sun, 5 May 2024 23:05:06 -0400 Subject: [PATCH 272/581] cleanup for PR --- examples/stm32f4/.cargo/config.toml | 12 +-- examples/stm32f4/.vscode/README.md | 109 ----------------------- examples/stm32f4/.vscode/extensions.json | 17 ---- examples/stm32f4/.vscode/launch.json | 33 ------- examples/stm32f4/.vscode/tasks.json | 43 --------- examples/stm32f4/Cargo.toml | 2 +- examples/stm32f4/openocd.cfg | 5 -- examples/stm32f4/openocd.gdb | 40 --------- 8 files changed, 3 insertions(+), 258 deletions(-) delete mode 100644 examples/stm32f4/.vscode/README.md delete mode 100644 examples/stm32f4/.vscode/extensions.json delete mode 100644 examples/stm32f4/.vscode/launch.json delete mode 100644 examples/stm32f4/.vscode/tasks.json delete mode 100644 examples/stm32f4/openocd.cfg delete mode 100644 examples/stm32f4/openocd.gdb diff --git a/examples/stm32f4/.cargo/config.toml b/examples/stm32f4/.cargo/config.toml index fdb246a7f..16efa8e6f 100644 --- a/examples/stm32f4/.cargo/config.toml +++ b/examples/stm32f4/.cargo/config.toml @@ -1,17 +1,9 @@ [target.'cfg(all(target_arch = "arm", target_os = "none"))'] # replace STM32F429ZITx with your chip as listed in `probe-rs chip list` -# runner = "probe-rs run --chip STM32F429ZITx" -runner = "arm-none-eabi-gdb -q -x openocd.gdb" +runner = "probe-rs run --chip STM32F429ZITx" [build] -# Pick ONE of these default compilation targets -# target = "thumbv6m-none-eabi" # Cortex-M0 and Cortex-M0+ -# target = "thumbv7m-none-eabi" # Cortex-M3 -# target = "thumbv7em-none-eabi" # Cortex-M4 and Cortex-M7 (no FPU) -target = "thumbv7em-none-eabihf" # Cortex-M4F and Cortex-M7F (with FPU) -# target = "thumbv8m.base-none-eabi" # Cortex-M23 -# target = "thumbv8m.main-none-eabi" # Cortex-M33 (no FPU) -# target = "thumbv8m.main-none-eabihf" # Cortex-M33 (with FPU) +target = "thumbv7em-none-eabi" [env] DEFMT_LOG = "trace" diff --git a/examples/stm32f4/.vscode/README.md b/examples/stm32f4/.vscode/README.md deleted file mode 100644 index 4d20f43a8..000000000 --- a/examples/stm32f4/.vscode/README.md +++ /dev/null @@ -1,109 +0,0 @@ -# VS Code Configuration - -Example configurations for debugging programs in-editor with VS Code. -This directory contains configurations for two platforms: - - - `LM3S6965EVB` on QEMU - - `STM32F303x` via OpenOCD - -## Required Extensions - -If you have the `code` command in your path, you can run the following commands to install the necessary extensions. - -```sh -code --install-extension rust-lang.rust-analyzer -code --install-extension marus25.cortex-debug -``` - -Otherwise, you can use the Extensions view to search for and install them, or go directly to their marketplace pages and click the "Install" button. - -- [Rust Language Server (rust-analyzer)](https://marketplace.visualstudio.com/items?itemName=rust-lang.rust-analyzer) -- [Cortex-Debug](https://marketplace.visualstudio.com/items?itemName=marus25.cortex-debug) - -## Use - -The quickstart comes with two debug configurations. -Both are configured to build the project, using the default settings from `.cargo/config`, prior to starting a debug session. - -1. QEMU: Starts a debug session using an emulation of the `LM3S6965EVB` mcu. - - This works on a fresh `cargo generate` without modification of any of the settings described above. - - Semihosting output will be written to the Output view `Adapter Output`. - - `ITM` logging does not work with QEMU emulation. - -2. OpenOCD: Starts a debug session for a `STM32F3DISCOVERY` board (or any `STM32F303x` running at 8MHz). - - Follow the instructions above for configuring the build with `.cargo/config` and the `memory.x` linker script. - - `ITM` output will be written to the Output view `SWO: ITM [port: 0, type: console]` output. - -### Git - -Files in the `.vscode/` directory are `.gitignore`d by default because many files that may end up in the `.vscode/` directory should not be committed and shared. -If you would like to save this debug configuration to your repository and share it with your team, you'll need to explicitly `git add` the files to your repository. - -```sh -git add -f .vscode/launch.json -git add -f .vscode/tasks.json -git add -f .vscode/*.svd -``` - -## Customizing for other targets - -For full documentation, see the [Cortex-Debug][cortex-debug] repository. - -### Device - -Some configurations use this to automatically find the SVD file. -Replace this with the part number for your device. - -```json -"device": "STM32F303VCT6", -``` - -### OpenOCD Config Files - -The `configFiles` property specifies a list of files to pass to OpenOCD. - -```json -"configFiles": [ - "interface/stlink-v2-1.cfg", - "target/stm32f3x.cfg" -], -``` - -See the [OpenOCD config docs][openocd-config] for more information and the [OpenOCD repository for available configuration files][openocd-repo]. - -### SVD - -The SVD file is a standard way of describing all registers and peripherals of an ARM Cortex-M mCU. -Cortex-Debug needs this file to display the current register values for the peripherals on the device. - -You can probably find the SVD for your device on the vendor's website. - - -For example, the STM32F3DISCOVERY board uses an mcu from the `STM32F303x` line of processors. -All the SVD files for the STM32F3 series are available on [ST's Website][stm32f3]. -Download the [stm32f3 SVD pack][stm32f3-svd], and copy the `STM32F303.svd` file into `.vscode/`. -This line of the config tells the Cortex-Debug plug in where to find the file. - -```json -"svdFile": "${workspaceRoot}/.vscode/STM32F303.svd", -``` - -For other processors, simply copy the correct `*.svd` file into the project and update the config accordingly. - -### CPU Frequency - -If your device is running at a frequency other than 8MHz, you'll need to modify this line of `launch.json` for the `ITM` output to work correctly. - -```json -"cpuFrequency": 8000000, -``` - -### Other GDB Servers - -For information on setting up GDB servers other than OpenOCD, see the [Cortex-Debug repository][cortex-debug]. - -[cortex-debug]: https://github.com/Marus/cortex-debug -[stm32f3]: https://www.st.com/content/st_com/en/products/microcontrollers-microprocessors/stm32-32-bit-arm-cortex-mcus/stm32-mainstream-mcus/stm32f3-series.html#resource -[stm32f3-svd]: https://www.st.com/resource/en/svd/stm32f3_svd.zip -[openocd-config]: http://openocd.org/doc/html/Config-File-Guidelines.html -[openocd-repo]: https://sourceforge.net/p/openocd/code/ci/master/tree/tcl/ diff --git a/examples/stm32f4/.vscode/extensions.json b/examples/stm32f4/.vscode/extensions.json deleted file mode 100644 index b7304974e..000000000 --- a/examples/stm32f4/.vscode/extensions.json +++ /dev/null @@ -1,17 +0,0 @@ -{ - // See https://go.microsoft.com/fwlink/?LinkId=827846 to learn about workspace recommendations. - // Extension identifier format: ${publisher}.${name}. Example: vscode.csharp - - // List of extensions which should be recommended for users of this workspace. - "recommendations": [ - "rust-lang.rust-analyzer", - "marus25.cortex-debug", - "usernamehw.errorlens", - "tamasfe.even-better-toml", - "serayuzgur.crates" - ], - // List of extensions recommended by VS Code that should not be recommended for users of this workspace. - "unwantedRecommendations": [ - - ] -} diff --git a/examples/stm32f4/.vscode/launch.json b/examples/stm32f4/.vscode/launch.json deleted file mode 100644 index 20cd4d2e8..000000000 --- a/examples/stm32f4/.vscode/launch.json +++ /dev/null @@ -1,33 +0,0 @@ -{ - /* - * Requires the Rust Language Server (rust-analyzer) and Cortex-Debug extensions - * https://marketplace.visualstudio.com/items?itemName=rust-lang.rust-analyzer - * https://marketplace.visualstudio.com/items?itemName=marus25.cortex-debug - */ - "version": "0.2.0", - "configurations": [ - { - /* Configuration for the STM32F446 Discovery board */ - "type": "cortex-debug", - "request": "launch", - "name": "Debug (OpenOCD)", - "servertype": "openocd", - "cwd": "${workspaceRoot}", - "preLaunchTask": "Cargo Build (debug)", - "runToEntryPoint": "main", - "executable": "./target/thumbv7em-none-eabihf/debug/input_capture", - /* Run `cargo build --example itm` and uncomment this line to run itm example */ - // "executable": "./target/thumbv7em-none-eabihf/debug/examples/itm", - "device": "STM32F446RET6", - "configFiles": [ - "interface/stlink.cfg", - "target/stm32f4x.cfg" - ], - "postLaunchCommands": [ - "monitor arm semihosting enable" - ], - "postRestartCommands": [], - "postResetCommands": [], - } - ] -} \ No newline at end of file diff --git a/examples/stm32f4/.vscode/tasks.json b/examples/stm32f4/.vscode/tasks.json deleted file mode 100644 index 9109a6157..000000000 --- a/examples/stm32f4/.vscode/tasks.json +++ /dev/null @@ -1,43 +0,0 @@ -{ - // See https://go.microsoft.com/fwlink/?LinkId=733558 - // for the documentation about the tasks.json format - "version": "2.0.0", - "tasks": [ - { - /* - * This is the default cargo build task, - * but we need to provide a label for it, - * so we can invoke it from the debug launcher. - */ - "label": "Cargo Build (debug)", - "type": "process", - "command": "cargo", - "args": ["build", "--bin", "input_capture"], - "problemMatcher": [ - "$rustc" - ], - "group": { - "kind": "build", - "isDefault": true - } - }, - { - "label": "Cargo Build (release)", - "type": "process", - "command": "cargo", - "args": ["build", "--release"], - "problemMatcher": [ - "$rustc" - ], - "group": "build" - }, - { - "label": "Cargo Clean", - "type": "process", - "command": "cargo", - "args": ["clean"], - "problemMatcher": [], - "group": "build" - }, - ] -} diff --git a/examples/stm32f4/Cargo.toml b/examples/stm32f4/Cargo.toml index 5469f0cc6..64ac50818 100644 --- a/examples/stm32f4/Cargo.toml +++ b/examples/stm32f4/Cargo.toml @@ -6,7 +6,7 @@ license = "MIT OR Apache-2.0" [dependencies] # Change stm32f429zi to your chip name, if necessary. -embassy-stm32 = { version = "0.1.0", path = "../../embassy-stm32", features = ["defmt", "stm32f446re", "unstable-pac", "memory-x", "time-driver-any", "exti", "chrono"] } +embassy-stm32 = { version = "0.1.0", path = "../../embassy-stm32", features = ["defmt", "stm32f429zi", "unstable-pac", "memory-x", "time-driver-any", "exti", "chrono"] } embassy-sync = { version = "0.5.0", path = "../../embassy-sync", features = ["defmt"] } embassy-executor = { version = "0.5.0", path = "../../embassy-executor", features = ["task-arena-size-32768", "arch-cortex-m", "executor-thread", "executor-interrupt", "defmt", "integrated-timers"] } embassy-time = { version = "0.3.0", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime", "tick-hz-32_768"] } diff --git a/examples/stm32f4/openocd.cfg b/examples/stm32f4/openocd.cfg deleted file mode 100644 index e41d52b1a..000000000 --- a/examples/stm32f4/openocd.cfg +++ /dev/null @@ -1,5 +0,0 @@ -# Sample OpenOCD configuration for the STM32F3DISCOVERY development board - -source [find interface/stlink.cfg] - -source [find target/stm32f4x.cfg] diff --git a/examples/stm32f4/openocd.gdb b/examples/stm32f4/openocd.gdb deleted file mode 100644 index 7795319fb..000000000 --- a/examples/stm32f4/openocd.gdb +++ /dev/null @@ -1,40 +0,0 @@ -target extended-remote :3333 - -# print demangled symbols -set print asm-demangle on - -# set backtrace limit to not have infinite backtrace loops -set backtrace limit 32 - -# detect unhandled exceptions, hard faults and panics -break DefaultHandler -break HardFault -break rust_begin_unwind -# # run the next few lines so the panic message is printed immediately -# # the number needs to be adjusted for your panic handler -# commands $bpnum -# next 4 -# end - -# *try* to stop at the user entry point (it might be gone due to inlining) -break main - -monitor arm semihosting enable - -# # send captured ITM to the file itm.fifo -# # (the microcontroller SWO pin must be connected to the programmer SWO pin) -# # 8000000 must match the core clock frequency -# monitor tpiu config internal itm.txt uart off 8000000 - -# # OR: make the microcontroller SWO pin output compatible with UART (8N1) -# # 8000000 must match the core clock frequency -# # 2000000 is the frequency of the SWO pin -# monitor tpiu config external uart off 8000000 2000000 - -# # enable ITM port 0 -# monitor itm port 0 on - -load - -# start the process but immediately halt the processor -stepi From b662dfb1838a72d243e939da9349c68c8fef5bdc Mon Sep 17 00:00:00 2001 From: Bruno Bousquet <21108660+brunob45@users.noreply.github.com> Date: Sun, 5 May 2024 23:15:00 -0400 Subject: [PATCH 273/581] format timer/mod.rs --- embassy-stm32/src/timer/mod.rs | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/embassy-stm32/src/timer/mod.rs b/embassy-stm32/src/timer/mod.rs index 532d41650..9a1fbcd61 100644 --- a/embassy-stm32/src/timer/mod.rs +++ b/embassy-stm32/src/timer/mod.rs @@ -2,10 +2,10 @@ #[cfg(not(stm32l0))] pub mod complementary_pwm; +pub mod input_capture; pub mod low_level; pub mod qei; pub mod simple_pwm; -pub mod input_capture; use crate::interrupt; use crate::rcc::RccPeripheral; From cc4ff9ef2d7b0a6a68e98cd3aa08855677ed8b90 Mon Sep 17 00:00:00 2001 From: W Etheredge Date: Sun, 5 May 2024 23:10:00 -0500 Subject: [PATCH 274/581] embassy_sync::Mutex: Implement traits to match std --- embassy-sync/src/mutex.rs | 78 ++++++++++++++++++++++++++++++++++++++- 1 file changed, 77 insertions(+), 1 deletion(-) diff --git a/embassy-sync/src/mutex.rs b/embassy-sync/src/mutex.rs index b48a408c4..8c3a3af9f 100644 --- a/embassy-sync/src/mutex.rs +++ b/embassy-sync/src/mutex.rs @@ -3,9 +3,9 @@ //! This module provides a mutex that can be used to synchronize data between asynchronous tasks. use core::cell::{RefCell, UnsafeCell}; use core::future::poll_fn; -use core::mem; use core::ops::{Deref, DerefMut}; use core::task::Poll; +use core::{fmt, mem}; use crate::blocking_mutex::raw::RawMutex; use crate::blocking_mutex::Mutex as BlockingMutex; @@ -129,6 +129,42 @@ where } } +impl From for Mutex { + fn from(from: T) -> Self { + Self::new(from) + } +} + +impl Default for Mutex +where + M: RawMutex, + T: ?Sized + Default, +{ + fn default() -> Self { + Self::new(Default::default()) + } +} + +impl fmt::Debug for Mutex +where + M: RawMutex, + T: ?Sized + fmt::Debug, +{ + fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result { + let mut d = f.debug_struct("Mutex"); + match self.try_lock() { + Ok(value) => { + d.field("inner", &&*value); + } + Err(TryLockError) => { + d.field("inner", &format_args!("")); + } + } + + d.finish_non_exhaustive() + } +} + /// Async mutex guard. /// /// Owning an instance of this type indicates having @@ -202,6 +238,26 @@ where } } +impl<'a, M, T> fmt::Debug for MutexGuard<'a, M, T> +where + M: RawMutex, + T: ?Sized + fmt::Debug, +{ + fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result { + fmt::Debug::fmt(&**self, f) + } +} + +impl<'a, M, T> fmt::Display for MutexGuard<'a, M, T> +where + M: RawMutex, + T: ?Sized + fmt::Display, +{ + fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result { + fmt::Display::fmt(&**self, f) + } +} + /// A handle to a held `Mutex` that has had a function applied to it via [`MutexGuard::map`] or /// [`MappedMutexGuard::map`]. /// @@ -285,6 +341,26 @@ where { } +impl<'a, M, T> fmt::Debug for MappedMutexGuard<'a, M, T> +where + M: RawMutex, + T: ?Sized + fmt::Debug, +{ + fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result { + fmt::Debug::fmt(&**self, f) + } +} + +impl<'a, M, T> fmt::Display for MappedMutexGuard<'a, M, T> +where + M: RawMutex, + T: ?Sized + fmt::Display, +{ + fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result { + fmt::Display::fmt(&**self, f) + } +} + #[cfg(test)] mod tests { use crate::blocking_mutex::raw::NoopRawMutex; From 55c8d3f4743bc653c1659dc3e961df86afe7d3db Mon Sep 17 00:00:00 2001 From: Bruno Bousquet <21108660+brunob45@users.noreply.github.com> Date: Mon, 6 May 2024 02:47:42 -0400 Subject: [PATCH 275/581] add async capture --- embassy-stm32/src/timer/input_capture.rs | 100 ++++++++++++++++++++-- embassy-stm32/src/timer/mod.rs | 93 +++++++++++++++++++- examples/stm32f4/src/bin/input_capture.rs | 26 +++--- 3 files changed, 199 insertions(+), 20 deletions(-) diff --git a/embassy-stm32/src/timer/input_capture.rs b/embassy-stm32/src/timer/input_capture.rs index bc7614cda..e5ec2505a 100644 --- a/embassy-stm32/src/timer/input_capture.rs +++ b/embassy-stm32/src/timer/input_capture.rs @@ -1,12 +1,17 @@ //! Input capture driver. +use core::future::Future; use core::marker::PhantomData; +use core::pin::Pin; +use core::task::{Context, Poll}; use embassy_hal_internal::{into_ref, PeripheralRef}; use super::low_level::{CountingMode, InputCaptureMode, InputTISelection, Timer}; +use super::CaptureCompareInterruptHandler; use super::{Channel, Channel1Pin, Channel2Pin, Channel3Pin, Channel4Pin, GeneralInstance4Channel}; use crate::gpio::{AFType, AnyPin, Pull}; +use crate::interrupt::typelevel::{Binding, Interrupt}; use crate::time::Hertz; use crate::Peripheral; @@ -65,6 +70,7 @@ impl<'d, T: GeneralInstance4Channel> InputCapture<'d, T> { _ch2: Option>, _ch3: Option>, _ch4: Option>, + _irq: impl Binding> + 'd, freq: Hertz, counting_mode: CountingMode, ) -> Self { @@ -79,13 +85,9 @@ impl<'d, T: GeneralInstance4Channel> InputCapture<'d, T> { this.inner.enable_outputs(); // Required for advanced timers, see GeneralInstance4Channel for details this.inner.start(); - [Channel::Ch1, Channel::Ch2, Channel::Ch3, Channel::Ch4] - .iter() - .for_each(|&channel| { - this.inner.set_input_capture_mode(channel, InputCaptureMode::Rising); - - this.inner.set_input_ti_selection(channel, InputTISelection::Normal); - }); + // enable NVIC interrupt + T::CaptureCompareInterrupt::unpend(); + unsafe { T::CaptureCompareInterrupt::enable() }; this } @@ -142,4 +144,88 @@ impl<'d, T: GeneralInstance4Channel> InputCapture<'d, T> { pub fn get_input_interrupt(&self, channel: Channel) -> bool { self.inner.get_input_interrupt(channel) } + + fn new_future(&self, channel: Channel, mode: InputCaptureMode, tisel: InputTISelection) -> InputCaptureFuture { + self.inner.enable_channel(channel, true); + self.inner.set_input_capture_mode(channel, mode); + self.inner.set_input_ti_selection(channel, tisel); + self.inner.clear_input_interrupt(channel); + self.inner.enable_input_interrupt(channel, true); + + InputCaptureFuture { + channel, + phantom: PhantomData, + } + } + + /// Asynchronously wait until the pin sees a rising edge. + pub async fn wait_for_rising_edge(&mut self, channel: Channel) -> u32 { + self.new_future(channel, InputCaptureMode::Rising, InputTISelection::Normal) + .await + } + + /// Asynchronously wait until the pin sees a falling edge. + pub async fn wait_for_falling_edge(&mut self, channel: Channel) -> u32 { + self.new_future(channel, InputCaptureMode::Falling, InputTISelection::Normal) + .await + } + + /// Asynchronously wait until the pin sees any edge. + pub async fn wait_for_any_edge(&mut self, channel: Channel) -> u32 { + self.new_future(channel, InputCaptureMode::BothEdges, InputTISelection::Normal) + .await + } + + /// Asynchronously wait until the (alternate) pin sees a rising edge. + pub async fn wait_for_rising_edge_alternate(&mut self, channel: Channel) -> u32 { + self.new_future(channel, InputCaptureMode::Rising, InputTISelection::Alternate) + .await + } + + /// Asynchronously wait until the (alternate) pin sees a falling edge. + pub async fn wait_for_falling_edge_alternate(&mut self, channel: Channel) -> u32 { + self.new_future(channel, InputCaptureMode::Falling, InputTISelection::Alternate) + .await + } + + /// Asynchronously wait until the (alternate) pin sees any edge. + pub async fn wait_for_any_edge_alternate(&mut self, channel: Channel) -> u32 { + self.new_future(channel, InputCaptureMode::BothEdges, InputTISelection::Alternate) + .await + } +} + +#[must_use = "futures do nothing unless you `.await` or poll them"] +struct InputCaptureFuture { + channel: Channel, + phantom: PhantomData, +} + +impl Drop for InputCaptureFuture { + fn drop(&mut self) { + critical_section::with(|_| { + let regs = unsafe { crate::pac::timer::TimGp16::from_ptr(T::regs()) }; + + // disable interrupt enable + regs.dier().modify(|w| w.set_ccie(self.channel.index(), false)); + }); + } +} + +impl Future for InputCaptureFuture { + type Output = u32; + + fn poll(self: Pin<&mut Self>, cx: &mut Context<'_>) -> Poll { + T::state().cc_waker[self.channel.index()].register(cx.waker()); + + let regs = unsafe { crate::pac::timer::TimGp16::from_ptr(T::regs()) }; + + let dier = regs.dier().read(); + if !dier.ccie(self.channel.index()) { + let val = regs.ccr(self.channel.index()).read().0; + Poll::Ready(val) + } else { + Poll::Pending + } + } } diff --git a/embassy-stm32/src/timer/mod.rs b/embassy-stm32/src/timer/mod.rs index 9a1fbcd61..4b4929aeb 100644 --- a/embassy-stm32/src/timer/mod.rs +++ b/embassy-stm32/src/timer/mod.rs @@ -1,5 +1,8 @@ //! Timers, PWM, quadrature decoder. +use core::marker::PhantomData; +use embassy_sync::waitqueue::AtomicWaker; + #[cfg(not(stm32l0))] pub mod complementary_pwm; pub mod input_capture; @@ -46,8 +49,29 @@ pub enum TimerBits { Bits32, } +struct State { + up_waker: AtomicWaker, + cc_waker: [AtomicWaker; 4], +} + +impl State { + const fn new() -> Self { + const NEW_AW: AtomicWaker = AtomicWaker::new(); + Self { + up_waker: NEW_AW, + cc_waker: [NEW_AW; 4], + } + } +} + +trait SealedInstance: RccPeripheral { + /// Async state for this timer + fn state() -> &'static State; +} + /// Core timer instance. -pub trait CoreInstance: RccPeripheral + 'static { +#[allow(private_bounds)] +pub trait CoreInstance: SealedInstance + 'static { /// Update Interrupt for this timer. type UpdateInterrupt: interrupt::typelevel::Interrupt; @@ -144,6 +168,13 @@ dma_trait!(Ch4Dma, GeneralInstance4Channel); #[allow(unused)] macro_rules! impl_core_timer { ($inst:ident, $bits:expr) => { + impl SealedInstance for crate::peripherals::$inst { + fn state() -> &'static State { + static STATE: State = State::new(); + &STATE + } + } + impl CoreInstance for crate::peripherals::$inst { type UpdateInterrupt = crate::_generated::peripheral_interrupts::$inst::UP; @@ -286,3 +317,63 @@ foreach_interrupt! { impl AdvancedInstance4Channel for crate::peripherals::$inst {} }; } + +/// Update interrupt handler. +pub struct UpdateInterruptHandler { + _phantom: PhantomData, +} + +impl interrupt::typelevel::Handler for UpdateInterruptHandler { + unsafe fn on_interrupt() { + #[cfg(feature = "low-power")] + crate::low_power::on_wakeup_irq(); + + let regs = crate::pac::timer::TimCore::from_ptr(T::regs()); + + // Read TIM interrupt flags. + let sr = regs.sr().read(); + + // Mask relevant interrupts (UIE). + let bits = sr.0 & 0x00000001; + + // Mask all the channels that fired. + regs.dier().modify(|w| w.0 &= !bits); + + // Wake the tasks + if sr.uif() { + T::state().up_waker.wake(); + } + } +} + +/// Capture/Compare interrupt handler. +pub struct CaptureCompareInterruptHandler { + _phantom: PhantomData, +} + +impl interrupt::typelevel::Handler + for CaptureCompareInterruptHandler +{ + unsafe fn on_interrupt() { + #[cfg(feature = "low-power")] + crate::low_power::on_wakeup_irq(); + + let regs = crate::pac::timer::TimGp16::from_ptr(T::regs()); + + // Read TIM interrupt flags. + let sr = regs.sr().read(); + + // Mask relevant interrupts (CCIE). + let bits = sr.0 & 0x0000001E; + + // Mask all the channels that fired. + regs.dier().modify(|w| w.0 &= !bits); + + // Wake the tasks + for ch in 0..4 { + if sr.ccif(ch) { + T::state().cc_waker[ch].wake(); + } + } + } +} diff --git a/examples/stm32f4/src/bin/input_capture.rs b/examples/stm32f4/src/bin/input_capture.rs index 17f65c6b9..862a3103b 100644 --- a/examples/stm32f4/src/bin/input_capture.rs +++ b/examples/stm32f4/src/bin/input_capture.rs @@ -3,18 +3,19 @@ use defmt::*; use embassy_executor::Spawner; +use embassy_stm32::bind_interrupts; use embassy_stm32::gpio::{Level, Output, Pull, Speed}; -use embassy_stm32::peripherals::PB2; +use embassy_stm32::peripherals; use embassy_stm32::time::khz; use embassy_stm32::timer::input_capture::{CapturePin, InputCapture}; -use embassy_stm32::timer::Channel; +use embassy_stm32::timer::{self, Channel}; use embassy_time::Timer; use {defmt_rtt as _, panic_probe as _}; /// Connect PB2 and PB10 with a 1k Ohm resistor #[embassy_executor::task] -async fn blinky(led: PB2) { +async fn blinky(led: peripherals::PB2) { let mut led = Output::new(led, Level::High, Speed::Low); loop { @@ -28,6 +29,10 @@ async fn blinky(led: PB2) { } } +bind_interrupts!(struct Irqs { + TIM2 => timer::CaptureCompareInterruptHandler; +}); + #[embassy_executor::main] async fn main(spawner: Spawner) { let p = embassy_stm32::init(Default::default()); @@ -36,16 +41,13 @@ async fn main(spawner: Spawner) { unwrap!(spawner.spawn(blinky(p.PB2))); let ch3 = CapturePin::new_ch3(p.PB10, Pull::None); - let mut ic = InputCapture::new(p.TIM2, None, None, Some(ch3), None, khz(1000), Default::default()); - ic.enable(Channel::Ch3); + let mut ic = InputCapture::new(p.TIM2, None, None, Some(ch3), None, Irqs, khz(1000), Default::default()); loop { - // Check for input capture - if ic.get_input_interrupt(Channel::Ch3) { - let capture_value = ic.get_capture_value(Channel::Ch3); - info!("New capture! {}", capture_value); - } - // Wait a little bit - Timer::after_millis(1).await; + info!("wait for risign edge"); + ic.wait_for_rising_edge(Channel::Ch3).await; + + let capture_value = ic.get_capture_value(Channel::Ch3); + info!("new capture! {}", capture_value); } } From 969933cb7bd8b8e41aed824afeaf12fd094a5056 Mon Sep 17 00:00:00 2001 From: Bruno Bousquet <21108660+brunob45@users.noreply.github.com> Date: Mon, 6 May 2024 02:52:22 -0400 Subject: [PATCH 276/581] fix fmt for ci --- embassy-stm32/src/timer/input_capture.rs | 6 ++++-- embassy-stm32/src/timer/mod.rs | 1 + examples/stm32f4/src/bin/input_capture.rs | 3 +-- 3 files changed, 6 insertions(+), 4 deletions(-) diff --git a/embassy-stm32/src/timer/input_capture.rs b/embassy-stm32/src/timer/input_capture.rs index e5ec2505a..a1c1486f9 100644 --- a/embassy-stm32/src/timer/input_capture.rs +++ b/embassy-stm32/src/timer/input_capture.rs @@ -8,8 +8,10 @@ use core::task::{Context, Poll}; use embassy_hal_internal::{into_ref, PeripheralRef}; use super::low_level::{CountingMode, InputCaptureMode, InputTISelection, Timer}; -use super::CaptureCompareInterruptHandler; -use super::{Channel, Channel1Pin, Channel2Pin, Channel3Pin, Channel4Pin, GeneralInstance4Channel}; +use super::{ + CaptureCompareInterruptHandler, Channel, Channel1Pin, Channel2Pin, Channel3Pin, Channel4Pin, + GeneralInstance4Channel, +}; use crate::gpio::{AFType, AnyPin, Pull}; use crate::interrupt::typelevel::{Binding, Interrupt}; use crate::time::Hertz; diff --git a/embassy-stm32/src/timer/mod.rs b/embassy-stm32/src/timer/mod.rs index 4b4929aeb..314b6006b 100644 --- a/embassy-stm32/src/timer/mod.rs +++ b/embassy-stm32/src/timer/mod.rs @@ -1,6 +1,7 @@ //! Timers, PWM, quadrature decoder. use core::marker::PhantomData; + use embassy_sync::waitqueue::AtomicWaker; #[cfg(not(stm32l0))] diff --git a/examples/stm32f4/src/bin/input_capture.rs b/examples/stm32f4/src/bin/input_capture.rs index 862a3103b..49de33d2b 100644 --- a/examples/stm32f4/src/bin/input_capture.rs +++ b/examples/stm32f4/src/bin/input_capture.rs @@ -3,12 +3,11 @@ use defmt::*; use embassy_executor::Spawner; -use embassy_stm32::bind_interrupts; use embassy_stm32::gpio::{Level, Output, Pull, Speed}; -use embassy_stm32::peripherals; use embassy_stm32::time::khz; use embassy_stm32::timer::input_capture::{CapturePin, InputCapture}; use embassy_stm32::timer::{self, Channel}; +use embassy_stm32::{bind_interrupts, peripherals}; use embassy_time::Timer; use {defmt_rtt as _, panic_probe as _}; From 87aca974b10c810c69d12ddb90669a2b7ec60c0b Mon Sep 17 00:00:00 2001 From: davidskula Date: Tue, 7 May 2024 16:07:00 +0200 Subject: [PATCH 277/581] impl ReadReady for tcp call can_recv() insted of may_recv() --- embassy-net/src/tcp.rs | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/embassy-net/src/tcp.rs b/embassy-net/src/tcp.rs index 57c9b7a04..9dfbba32b 100644 --- a/embassy-net/src/tcp.rs +++ b/embassy-net/src/tcp.rs @@ -555,7 +555,7 @@ mod embedded_io_impls { impl<'d> embedded_io_async::ReadReady for TcpSocket<'d> { fn read_ready(&mut self) -> Result { - Ok(self.io.with(|s, _| s.may_recv())) + Ok(self.io.with(|s, _| s.can_recv())) } } @@ -587,7 +587,7 @@ mod embedded_io_impls { impl<'d> embedded_io_async::ReadReady for TcpReader<'d> { fn read_ready(&mut self) -> Result { - Ok(self.io.with(|s, _| s.may_recv())) + Ok(self.io.with(|s, _| s.can_recv())) } } From b13ad7e80bed802468aac2d876d372c1bcde565c Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Tue, 7 May 2024 23:21:55 +0200 Subject: [PATCH 278/581] Fix PeripheralRef soundness issue allowing &T. Fix soundness issue introduced in a previous soundness fix https://github.com/embassy-rs/embassy/pull/2602 . PeripheralRef must not implement DerefMut itself, but the blanket impl must still require DerefMut. Otherwise you can create two instances of a driver on the same uart by using `&my_uart`. --- embassy-hal-internal/src/peripheral.rs | 15 ++++++++++++--- embassy-stm32/src/ucpd.rs | 22 +++++++++++----------- 2 files changed, 23 insertions(+), 14 deletions(-) diff --git a/embassy-hal-internal/src/peripheral.rs b/embassy-hal-internal/src/peripheral.rs index f03f41507..0b0f13338 100644 --- a/embassy-hal-internal/src/peripheral.rs +++ b/embassy-hal-internal/src/peripheral.rs @@ -1,5 +1,5 @@ use core::marker::PhantomData; -use core::ops::Deref; +use core::ops::{Deref, DerefMut}; /// An exclusive reference to a peripheral. /// @@ -155,7 +155,7 @@ pub trait Peripheral: Sized { } } -impl<'b, T: Deref> Peripheral for T +impl<'b, T: DerefMut> Peripheral for T where T::Target: Peripheral, { @@ -163,6 +163,15 @@ where #[inline] unsafe fn clone_unchecked(&self) -> Self::P { - self.deref().clone_unchecked() + T::Target::clone_unchecked(self) + } +} + +impl<'b, T: Peripheral> Peripheral for PeripheralRef<'_, T> { + type P = T::P; + + #[inline] + unsafe fn clone_unchecked(&self) -> Self::P { + T::clone_unchecked(self) } } diff --git a/embassy-stm32/src/ucpd.rs b/embassy-stm32/src/ucpd.rs index 63412f9b7..ff8c7aaad 100644 --- a/embassy-stm32/src/ucpd.rs +++ b/embassy-stm32/src/ucpd.rs @@ -338,7 +338,7 @@ impl<'d, T: Instance> PdPhy<'d, T> { let dma = unsafe { Transfer::new_read( - &self.rx_dma_ch, + &mut self.rx_dma_ch, self.rx_dma_req, r.rxdr().as_ptr() as *mut u8, buf, @@ -356,7 +356,7 @@ impl<'d, T: Instance> PdPhy<'d, T> { r.cr().modify(|w| w.set_phyrxen(true)); let _on_drop = OnDrop::new(|| { r.cr().modify(|w| w.set_phyrxen(false)); - self.enable_rx_interrupt(false); + Self::enable_rx_interrupt(false); }); poll_fn(|cx| { @@ -377,7 +377,7 @@ impl<'d, T: Instance> PdPhy<'d, T> { Poll::Ready(ret) } else { T::state().waker.register(cx.waker()); - self.enable_rx_interrupt(true); + Self::enable_rx_interrupt(true); Poll::Pending } }) @@ -393,7 +393,7 @@ impl<'d, T: Instance> PdPhy<'d, T> { Ok(r.rx_payszr().read().rxpaysz().into()) } - fn enable_rx_interrupt(&self, enable: bool) { + fn enable_rx_interrupt(enable: bool) { T::REGS.imr().modify(|w| w.set_rxmsgendie(enable)); } @@ -405,7 +405,7 @@ impl<'d, T: Instance> PdPhy<'d, T> { // might still be running because there is no way to abort an ongoing // message transmission. Wait for it to finish but ignore errors. if r.cr().read().txsend() { - if let Err(TxError::HardReset) = self.wait_tx_done().await { + if let Err(TxError::HardReset) = Self::wait_tx_done().await { return Err(TxError::HardReset); } } @@ -419,7 +419,7 @@ impl<'d, T: Instance> PdPhy<'d, T> { // Start the DMA and let it do its thing in the background. let _dma = unsafe { Transfer::new_write( - &self.tx_dma_ch, + &mut self.tx_dma_ch, self.tx_dma_req, buf, r.txdr().as_ptr() as *mut u8, @@ -434,11 +434,11 @@ impl<'d, T: Instance> PdPhy<'d, T> { w.set_txsend(true); }); - self.wait_tx_done().await + Self::wait_tx_done().await } - async fn wait_tx_done(&self) -> Result<(), TxError> { - let _on_drop = OnDrop::new(|| self.enable_tx_interrupts(false)); + async fn wait_tx_done() -> Result<(), TxError> { + let _on_drop = OnDrop::new(|| Self::enable_tx_interrupts(false)); poll_fn(|cx| { let r = T::REGS; let sr = r.sr().read(); @@ -453,14 +453,14 @@ impl<'d, T: Instance> PdPhy<'d, T> { Poll::Ready(Ok(())) } else { T::state().waker.register(cx.waker()); - self.enable_tx_interrupts(true); + Self::enable_tx_interrupts(true); Poll::Pending } }) .await } - fn enable_tx_interrupts(&self, enable: bool) { + fn enable_tx_interrupts(enable: bool) { T::REGS.imr().modify(|w| { w.set_txmsgdiscie(enable); w.set_txmsgsentie(enable); From e94d4e6416e373bedb901d353989996a3375b615 Mon Sep 17 00:00:00 2001 From: Priit Laes Date: Wed, 8 May 2024 10:13:51 +0300 Subject: [PATCH 279/581] examples: Use unique crate name for stm32h7rs examples Current name clashes with "regular" stm32h7 thus generating cargo warning. --- examples/stm32h7rs/Cargo.toml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/examples/stm32h7rs/Cargo.toml b/examples/stm32h7rs/Cargo.toml index ad661411d..192a6ca61 100644 --- a/examples/stm32h7rs/Cargo.toml +++ b/examples/stm32h7rs/Cargo.toml @@ -1,6 +1,6 @@ [package] edition = "2021" -name = "embassy-stm32h7-examples" +name = "embassy-stm32h7rs-examples" version = "0.1.0" license = "MIT OR Apache-2.0" From dc108ca31d2509f1297b4613f452e86830e19b12 Mon Sep 17 00:00:00 2001 From: kalkyl Date: Thu, 9 May 2024 11:04:31 +0200 Subject: [PATCH 280/581] rp: Add raw interrupt handler example --- examples/rp/Cargo.toml | 1 + examples/rp/src/bin/interrupt.rs | 95 ++++++++++++++++++++++++++++++++ 2 files changed, 96 insertions(+) create mode 100644 examples/rp/src/bin/interrupt.rs diff --git a/examples/rp/Cargo.toml b/examples/rp/Cargo.toml index ae6746dce..8162e4dcb 100644 --- a/examples/rp/Cargo.toml +++ b/examples/rp/Cargo.toml @@ -27,6 +27,7 @@ fixed-macro = "1.2" #cortex-m = { version = "0.7.6", features = ["critical-section-single-core"] } cortex-m = { version = "0.7.6", features = ["inline-asm"] } cortex-m-rt = "0.7.0" +critical-section = "1.1" panic-probe = { version = "0.3", features = ["print-defmt"] } display-interface-spi = "0.4.1" embedded-graphics = "0.7.1" diff --git a/examples/rp/src/bin/interrupt.rs b/examples/rp/src/bin/interrupt.rs new file mode 100644 index 000000000..51dacca10 --- /dev/null +++ b/examples/rp/src/bin/interrupt.rs @@ -0,0 +1,95 @@ +//! This example shows how you can use raw interrupt handlers alongside embassy. +//! The example also showcases some of the options available for sharing resources/data. +//! +//! In the example, an ADC reading is triggered every time the PWM wraps around. +//! The sample data is sent down a channel, to be processed inside a low priority task. +//! The processed data is then used to adjust the PWM duty cycle, once every second. + +#![no_std] +#![no_main] + +use core::cell::{Cell, RefCell}; + +use defmt::*; +use embassy_executor::Spawner; +use embassy_rp::adc::{self, Adc, Blocking}; +use embassy_rp::interrupt; +use embassy_rp::pwm::{Config, Pwm}; +use embassy_rp::{gpio::Pull, peripherals::PWM_SLICE4}; +use embassy_sync::{ + blocking_mutex::{raw::CriticalSectionRawMutex, Mutex}, + channel::Channel, +}; +use embassy_time::{Duration, Ticker}; +use portable_atomic::{AtomicU32, Ordering}; +use static_cell::StaticCell; +use {defmt_rtt as _, panic_probe as _}; + +static COUNTER: AtomicU32 = AtomicU32::new(0); +static PWM: Mutex>>> = Mutex::new(RefCell::new(None)); +static ADC: Mutex, adc::Channel)>>> = + Mutex::new(RefCell::new(None)); +static ADC_VALUES: Channel = Channel::new(); + +#[embassy_executor::main] +async fn main(spawner: Spawner) { + embassy_rp::pac::SIO.spinlock(31).write_value(1); + let p = embassy_rp::init(Default::default()); + + let adc = Adc::new_blocking(p.ADC, Default::default()); + let p26 = adc::Channel::new_pin(p.PIN_26, Pull::None); + ADC.lock(|a| a.borrow_mut().replace((adc, p26))); + + let pwm = Pwm::new_output_b(p.PWM_SLICE4, p.PIN_25, Default::default()); + PWM.lock(|p| p.borrow_mut().replace(pwm)); + + // Enable the interrupt for pwm slice 4 + embassy_rp::pac::PWM.inte().modify(|w| w.set_ch4(true)); + unsafe { + cortex_m::peripheral::NVIC::unmask(interrupt::PWM_IRQ_WRAP); + } + + // Tasks require their resources to have 'static lifetime + // No Mutex needed when sharing within the same executor/prio level + static AVG: StaticCell> = StaticCell::new(); + let avg = AVG.init(Default::default()); + spawner.must_spawn(processing(avg)); + + let mut ticker = Ticker::every(Duration::from_secs(1)); + loop { + ticker.next().await; + let freq = COUNTER.swap(0, Ordering::Relaxed); + info!("pwm freq: {:?} Hz", freq); + info!("adc average: {:?}", avg.get()); + + // Update the pwm duty cycle, based on the averaged adc reading + let mut config = Config::default(); + config.compare_b = ((avg.get() as f32 / 4095.0) * config.top as f32) as _; + PWM.lock(|p| p.borrow_mut().as_mut().unwrap().set_config(&config)); + } +} + +#[embassy_executor::task] +async fn processing(avg: &'static Cell) { + let mut buffer: heapless::HistoryBuffer = Default::default(); + loop { + let val = ADC_VALUES.receive().await; + buffer.write(val); + let sum: u32 = buffer.iter().map(|x| *x as u32).sum(); + avg.set(sum / buffer.len() as u32); + } +} + +#[interrupt] +fn PWM_IRQ_WRAP() { + critical_section::with(|cs| { + let mut adc = ADC.borrow(cs).borrow_mut(); + let (adc, p26) = adc.as_mut().unwrap(); + let val = adc.blocking_read(p26).unwrap(); + ADC_VALUES.try_send(val).ok(); + + // Clear the interrupt, so we don't immediately re-enter this irq handler + PWM.borrow(cs).borrow_mut().as_mut().unwrap().clear_wrapped(); + }); + COUNTER.fetch_add(1, Ordering::Relaxed); +} From 108bfae30d1857ebeb3764a6a110979efc6cf47e Mon Sep 17 00:00:00 2001 From: kalkyl Date: Thu, 9 May 2024 11:14:09 +0200 Subject: [PATCH 281/581] rustfmt --- examples/rp/src/bin/interrupt.rs | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/examples/rp/src/bin/interrupt.rs b/examples/rp/src/bin/interrupt.rs index 51dacca10..d334d35d7 100644 --- a/examples/rp/src/bin/interrupt.rs +++ b/examples/rp/src/bin/interrupt.rs @@ -13,13 +13,13 @@ use core::cell::{Cell, RefCell}; use defmt::*; use embassy_executor::Spawner; use embassy_rp::adc::{self, Adc, Blocking}; +use embassy_rp::gpio::Pull; use embassy_rp::interrupt; +use embassy_rp::peripherals::PWM_SLICE4; use embassy_rp::pwm::{Config, Pwm}; -use embassy_rp::{gpio::Pull, peripherals::PWM_SLICE4}; -use embassy_sync::{ - blocking_mutex::{raw::CriticalSectionRawMutex, Mutex}, - channel::Channel, -}; +use embassy_sync::blocking_mutex::raw::CriticalSectionRawMutex; +use embassy_sync::blocking_mutex::Mutex; +use embassy_sync::channel::Channel; use embassy_time::{Duration, Ticker}; use portable_atomic::{AtomicU32, Ordering}; use static_cell::StaticCell; From ee22e98fe1229ff9f4a85670dbb092717431ddde Mon Sep 17 00:00:00 2001 From: Mateusz Butkiewicz Date: Thu, 9 May 2024 08:05:34 +0200 Subject: [PATCH 282/581] feat(qspi): add example usage of QSPI --- examples/stm32f7/src/bin/qspi.rs | 300 +++++++++++++++++++++++++++++++ 1 file changed, 300 insertions(+) create mode 100644 examples/stm32f7/src/bin/qspi.rs diff --git a/examples/stm32f7/src/bin/qspi.rs b/examples/stm32f7/src/bin/qspi.rs new file mode 100644 index 000000000..005694db3 --- /dev/null +++ b/examples/stm32f7/src/bin/qspi.rs @@ -0,0 +1,300 @@ +#![no_std] +#![no_main] +#![allow(dead_code)] // Allow dead code as not all commands are used in the example + +use defmt::info; +use embassy_executor::Spawner; +use embassy_stm32::qspi::enums::{AddressSize, ChipSelectHighTime, FIFOThresholdLevel, MemorySize, *}; +use embassy_stm32::qspi::{Config as QspiCfg, Instance, Qspi, QuadDma, TransferConfig}; +use embassy_stm32::time::mhz; +use embassy_stm32::Config as StmCfg; +use {defmt_rtt as _, panic_probe as _}; + +const MEMORY_PAGE_SIZE: usize = 256; + +const CMD_READ: u8 = 0x03; +const CMD_HS_READ: u8 = 0x0B; +const CMD_QUAD_READ: u8 = 0x6B; + +const CMD_WRITE_PG: u8 = 0xF2; +const CMD_QUAD_WRITE_PG: u8 = 0x32; + +const CMD_READ_ID: u8 = 0x9F; +const CMD_READ_UUID: u8 = 0x4B; + +const CMD_ENABLE_RESET: u8 = 0x66; +const CMD_RESET: u8 = 0x99; + +const CMD_WRITE_ENABLE: u8 = 0x06; +const CMD_WRITE_DISABLE: u8 = 0x04; + +const CMD_CHIP_ERASE: u8 = 0xC7; +const CMD_SECTOR_ERASE: u8 = 0x20; +const CMD_BLOCK_ERASE_32K: u8 = 0x52; +const CMD_BLOCK_ERASE_64K: u8 = 0xD8; + +const CMD_READ_SR: u8 = 0x05; +const CMD_READ_CR: u8 = 0x35; + +const CMD_WRITE_SR: u8 = 0x01; +const CMD_WRITE_CR: u8 = 0x31; +const MEMORY_ADDR: u32 = 0x00000000u32; + +/// Implementation of access to flash chip. +/// Chip commands are hardcoded as it depends on used chip. +/// This implementation is using chip GD25Q64C from Giga Device +pub struct FlashMemory> { + qspi: Qspi<'static, I, D>, +} + +impl> FlashMemory { + pub fn new(qspi: Qspi<'static, I, D>) -> Self { + let mut memory = Self { qspi }; + + memory.reset_memory(); + memory.enable_quad(); + + memory + } + + fn enable_quad(&mut self) { + let cr = self.read_cr(); + self.write_cr(cr | 0x02); + } + + fn exec_command(&mut self, cmd: u8) { + let transaction = TransferConfig { + iwidth: QspiWidth::SING, + awidth: QspiWidth::NONE, + dwidth: QspiWidth::NONE, + instruction: cmd, + address: None, + dummy: DummyCycles::_0, + }; + self.qspi.command(transaction); + } + + pub fn reset_memory(&mut self) { + self.exec_command(CMD_ENABLE_RESET); + self.exec_command(CMD_RESET); + self.wait_write_finish(); + } + + pub fn enable_write(&mut self) { + self.exec_command(CMD_WRITE_ENABLE); + } + + pub fn read_id(&mut self) -> [u8; 3] { + let mut buffer = [0; 3]; + let transaction: TransferConfig = TransferConfig { + iwidth: QspiWidth::SING, + awidth: QspiWidth::NONE, + dwidth: QspiWidth::SING, + instruction: CMD_READ_ID, + address: None, + dummy: DummyCycles::_0, + }; + self.qspi.blocking_read(&mut buffer, transaction); + buffer + } + + pub fn read_uuid(&mut self) -> [u8; 16] { + let mut buffer = [0; 16]; + let transaction: TransferConfig = TransferConfig { + iwidth: QspiWidth::SING, + awidth: QspiWidth::SING, + dwidth: QspiWidth::SING, + instruction: CMD_READ_UUID, + address: Some(0), + dummy: DummyCycles::_8, + }; + self.qspi.blocking_read(&mut buffer, transaction); + buffer + } + + pub fn read_memory(&mut self, addr: u32, buffer: &mut [u8], use_dma: bool) { + let transaction = TransferConfig { + iwidth: QspiWidth::SING, + awidth: QspiWidth::SING, + dwidth: QspiWidth::QUAD, + instruction: CMD_QUAD_READ, + address: Some(addr), + dummy: DummyCycles::_8, + }; + if use_dma { + self.qspi.blocking_read_dma(buffer, transaction); + } else { + self.qspi.blocking_read(buffer, transaction); + } + } + + fn wait_write_finish(&mut self) { + while (self.read_sr() & 0x01) != 0 {} + } + + fn perform_erase(&mut self, addr: u32, cmd: u8) { + let transaction = TransferConfig { + iwidth: QspiWidth::SING, + awidth: QspiWidth::SING, + dwidth: QspiWidth::NONE, + instruction: cmd, + address: Some(addr), + dummy: DummyCycles::_0, + }; + self.enable_write(); + self.qspi.command(transaction); + self.wait_write_finish(); + } + + pub fn erase_sector(&mut self, addr: u32) { + self.perform_erase(addr, CMD_SECTOR_ERASE); + } + + pub fn erase_block_32k(&mut self, addr: u32) { + self.perform_erase(addr, CMD_BLOCK_ERASE_32K); + } + + pub fn erase_block_64k(&mut self, addr: u32) { + self.perform_erase(addr, CMD_BLOCK_ERASE_64K); + } + + pub fn erase_chip(&mut self) { + self.exec_command(CMD_CHIP_ERASE); + } + + fn write_page(&mut self, addr: u32, buffer: &[u8], len: usize, use_dma: bool) { + assert!( + (len as u32 + (addr & 0x000000ff)) <= MEMORY_PAGE_SIZE as u32, + "write_page(): page write length exceeds page boundary (len = {}, addr = {:X}", + len, + addr + ); + + let transaction = TransferConfig { + iwidth: QspiWidth::SING, + awidth: QspiWidth::SING, + dwidth: QspiWidth::QUAD, + instruction: CMD_QUAD_WRITE_PG, + address: Some(addr), + dummy: DummyCycles::_0, + }; + self.enable_write(); + if use_dma { + self.qspi.blocking_write_dma(buffer, transaction); + } else { + self.qspi.blocking_write(buffer, transaction); + } + self.wait_write_finish(); + } + + pub fn write_memory(&mut self, addr: u32, buffer: &[u8], use_dma: bool) { + let mut left = buffer.len(); + let mut place = addr; + let mut chunk_start = 0; + + while left > 0 { + let max_chunk_size = MEMORY_PAGE_SIZE - (place & 0x000000ff) as usize; + let chunk_size = if left >= max_chunk_size { max_chunk_size } else { left }; + let chunk = &buffer[chunk_start..(chunk_start + chunk_size)]; + self.write_page(place, chunk, chunk_size, use_dma); + place += chunk_size as u32; + left -= chunk_size; + chunk_start += chunk_size; + } + } + + fn read_register(&mut self, cmd: u8) -> u8 { + let mut buffer = [0; 1]; + let transaction: TransferConfig = TransferConfig { + iwidth: QspiWidth::SING, + awidth: QspiWidth::NONE, + dwidth: QspiWidth::SING, + instruction: cmd, + address: None, + dummy: DummyCycles::_0, + }; + self.qspi.blocking_read(&mut buffer, transaction); + buffer[0] + } + + fn write_register(&mut self, cmd: u8, value: u8) { + let buffer = [value; 1]; + let transaction: TransferConfig = TransferConfig { + iwidth: QspiWidth::SING, + awidth: QspiWidth::NONE, + dwidth: QspiWidth::SING, + instruction: cmd, + address: None, + dummy: DummyCycles::_0, + }; + self.qspi.blocking_write(&buffer, transaction); + } + + pub fn read_sr(&mut self) -> u8 { + self.read_register(CMD_READ_SR) + } + + pub fn read_cr(&mut self) -> u8 { + self.read_register(CMD_READ_CR) + } + + pub fn write_sr(&mut self, value: u8) { + self.write_register(CMD_WRITE_SR, value); + } + + pub fn write_cr(&mut self, value: u8) { + self.write_register(CMD_WRITE_CR, value); + } +} + +#[embassy_executor::main] +async fn main(_spawner: Spawner) -> ! { + let mut config = StmCfg::default(); + { + use embassy_stm32::rcc::*; + config.rcc.hse = Some(Hse { + freq: mhz(8), + mode: HseMode::Oscillator, + }); + config.rcc.pll_src = PllSource::HSE; + config.rcc.pll = Some(Pll { + prediv: PllPreDiv::DIV4, + mul: PllMul::MUL216, + divp: Some(PllPDiv::DIV2), // 8mhz / 4 * 216 / 2 = 216Mhz + divq: None, + divr: None, + }); + config.rcc.ahb_pre = AHBPrescaler::DIV1; + config.rcc.apb1_pre = APBPrescaler::DIV4; + config.rcc.apb2_pre = APBPrescaler::DIV2; + config.rcc.sys = Sysclk::PLL1_P; + } + let p = embassy_stm32::init(config); + info!("Embassy initialized"); + + let config = QspiCfg { + memory_size: MemorySize::_8MiB, + address_size: AddressSize::_24bit, + prescaler: 16, + cs_high_time: ChipSelectHighTime::_1Cycle, + fifo_threshold: FIFOThresholdLevel::_16Bytes, + }; + let driver = Qspi::new_bk1( + p.QUADSPI, p.PF8, p.PF9, p.PE2, p.PF6, p.PF10, p.PB10, p.DMA2_CH7, config, + ); + let mut flash = FlashMemory::new(driver); + let flash_id = flash.read_id(); + info!("FLASH ID: {:?}", flash_id); + let mut wr_buf = [0u8; 256]; + for i in 0..256 { + wr_buf[i] = i as u8; + } + let mut rd_buf = [0u8; 256]; + flash.erase_sector(MEMORY_ADDR); + flash.write_memory(MEMORY_ADDR, &wr_buf, true); + flash.read_memory(MEMORY_ADDR, &mut rd_buf, true); + info!("WRITE BUF: {:?}", wr_buf); + info!("READ BUF: {:?}", rd_buf); + info!("End of Program, proceed to empty endless loop"); + loop {} +} From 5c93e9daddcbb33733a67174b726d02dc21ab913 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Timo=20Kro=CC=88ger?= Date: Fri, 10 May 2024 10:37:56 +0200 Subject: [PATCH 283/581] [UCPD] Use `ChannelAndRequest` helper --- embassy-stm32/src/ucpd.rs | 40 ++++++++++++++++----------------------- 1 file changed, 16 insertions(+), 24 deletions(-) diff --git a/embassy-stm32/src/ucpd.rs b/embassy-stm32/src/ucpd.rs index ff8c7aaad..d6d0682b9 100644 --- a/embassy-stm32/src/ucpd.rs +++ b/embassy-stm32/src/ucpd.rs @@ -20,10 +20,10 @@ use core::sync::atomic::{AtomicBool, Ordering}; use core::task::Poll; use embassy_hal_internal::drop::OnDrop; -use embassy_hal_internal::{into_ref, Peripheral, PeripheralRef}; +use embassy_hal_internal::{into_ref, Peripheral}; use embassy_sync::waitqueue::AtomicWaker; -use crate::dma::{AnyChannel, Request, Transfer, TransferOptions}; +use crate::dma::{ChannelAndRequest, TransferOptions}; use crate::interrupt; use crate::interrupt::typelevel::Interrupt; use crate::pac::ucpd::vals::{Anamode, Ccenable, PscUsbpdclk, Txmode}; @@ -179,10 +179,14 @@ impl<'d, T: Instance> Ucpd<'d, T> { self.cc_phy, PdPhy { _lifetime: PhantomData, - rx_dma_ch: rx_dma.map_into(), - rx_dma_req, - tx_dma_ch: tx_dma.map_into(), - tx_dma_req, + rx_dma: ChannelAndRequest { + channel: rx_dma.map_into(), + request: rx_dma_req, + }, + tx_dma: ChannelAndRequest { + channel: tx_dma.map_into(), + request: tx_dma_req, + }, }, ) } @@ -309,10 +313,8 @@ pub enum TxError { /// Power Delivery (PD) PHY. pub struct PdPhy<'d, T: Instance> { _lifetime: PhantomData<&'d mut T>, - rx_dma_ch: PeripheralRef<'d, AnyChannel>, - rx_dma_req: Request, - tx_dma_ch: PeripheralRef<'d, AnyChannel>, - tx_dma_req: Request, + rx_dma: ChannelAndRequest<'d>, + tx_dma: ChannelAndRequest<'d>, } impl<'d, T: Instance> Drop for PdPhy<'d, T> { @@ -337,13 +339,8 @@ impl<'d, T: Instance> PdPhy<'d, T> { let r = T::REGS; let dma = unsafe { - Transfer::new_read( - &mut self.rx_dma_ch, - self.rx_dma_req, - r.rxdr().as_ptr() as *mut u8, - buf, - TransferOptions::default(), - ) + self.rx_dma + .read(r.rxdr().as_ptr() as *mut u8, buf, TransferOptions::default()) }; // Clear interrupt flags (possibly set from last receive). @@ -418,13 +415,8 @@ impl<'d, T: Instance> PdPhy<'d, T> { // Start the DMA and let it do its thing in the background. let _dma = unsafe { - Transfer::new_write( - &mut self.tx_dma_ch, - self.tx_dma_req, - buf, - r.txdr().as_ptr() as *mut u8, - TransferOptions::default(), - ) + self.tx_dma + .write(buf, r.txdr().as_ptr() as *mut u8, TransferOptions::default()) }; // Configure and start the transmission. From fe68308958cbf39a12c8c4be560b0e449e70907a Mon Sep 17 00:00:00 2001 From: QWS Date: Fri, 10 May 2024 22:22:24 +0800 Subject: [PATCH 284/581] Fix: typo --- embassy-sync/src/once_lock.rs | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/embassy-sync/src/once_lock.rs b/embassy-sync/src/once_lock.rs index 31cc99711..9332ecfaf 100644 --- a/embassy-sync/src/once_lock.rs +++ b/embassy-sync/src/once_lock.rs @@ -13,7 +13,7 @@ use core::task::Poll; /// /// **Note**: this implementation uses a busy loop to poll the value, /// which is not as efficient as registering a dedicated `Waker`. -/// However, the if the usecase for is to initialize a static variable +/// However, if the usecase for it is to initialize a static variable /// relatively early in the program life cycle, it should be fine. /// /// # Example From 94b38449bd1e6d04a009700689d34ce1adf72c07 Mon Sep 17 00:00:00 2001 From: Rob Pilling Date: Mon, 22 Apr 2024 22:16:25 +0100 Subject: [PATCH 285/581] rp usb: add stall implementation --- embassy-rp/src/usb.rs | 34 ++++++++++++++++++++++++++++++---- 1 file changed, 30 insertions(+), 4 deletions(-) diff --git a/embassy-rp/src/usb.rs b/embassy-rp/src/usb.rs index 37d37d6d9..99cba2d82 100644 --- a/embassy-rp/src/usb.rs +++ b/embassy-rp/src/usb.rs @@ -412,12 +412,38 @@ impl<'d, T: Instance> driver::Bus for Bus<'d, T> { .await } - fn endpoint_set_stalled(&mut self, _ep_addr: EndpointAddress, _stalled: bool) { - todo!(); + fn endpoint_set_stalled(&mut self, ep_addr: EndpointAddress, stalled: bool) { + let n = ep_addr.index(); + + if n == 0 { + T::regs().ep_stall_arm().modify(|w| { + if ep_addr.is_in() { + w.set_ep0_in(stalled); + } else { + w.set_ep0_out(stalled); + } + }); + } + + let ctrl = if ep_addr.is_in() { + T::dpram().ep_in_buffer_control(n) + } else { + T::dpram().ep_out_buffer_control(n) + }; + + ctrl.modify(|w| w.set_stall(stalled)); } - fn endpoint_is_stalled(&mut self, _ep_addr: EndpointAddress) -> bool { - todo!(); + fn endpoint_is_stalled(&mut self, ep_addr: EndpointAddress) -> bool { + let n = ep_addr.index(); + + let ctrl = if ep_addr.is_in() { + T::dpram().ep_in_buffer_control(n) + } else { + T::dpram().ep_out_buffer_control(n) + }; + + ctrl.read().stall() } fn endpoint_set_enabled(&mut self, ep_addr: EndpointAddress, enabled: bool) { From 84cd0c672b2dd3754a36ae632bbe25845dbeeabc Mon Sep 17 00:00:00 2001 From: Rob Pilling Date: Mon, 29 Apr 2024 16:23:42 +0100 Subject: [PATCH 286/581] rp usb: wake ep-wakers after stalling --- embassy-rp/src/usb.rs | 3 +++ 1 file changed, 3 insertions(+) diff --git a/embassy-rp/src/usb.rs b/embassy-rp/src/usb.rs index 99cba2d82..512271ae4 100644 --- a/embassy-rp/src/usb.rs +++ b/embassy-rp/src/usb.rs @@ -432,6 +432,9 @@ impl<'d, T: Instance> driver::Bus for Bus<'d, T> { }; ctrl.modify(|w| w.set_stall(stalled)); + + let wakers = if ep_addr.is_in() { &EP_IN_WAKERS } else { &EP_OUT_WAKERS }; + wakers[n].wake(); } fn endpoint_is_stalled(&mut self, ep_addr: EndpointAddress) -> bool { From fd5412ffc50384c5e5e32c1a2bc499b558a99e8b Mon Sep 17 00:00:00 2001 From: kalkyl Date: Sat, 11 May 2024 15:16:20 +0200 Subject: [PATCH 287/581] rp: Add embedded-sdmmc example --- examples/rp/Cargo.toml | 1 + examples/rp/src/bin/spi_sdmmc.rs | 80 ++++++++++++++++++++++++++++++++ 2 files changed, 81 insertions(+) create mode 100644 examples/rp/src/bin/spi_sdmmc.rs diff --git a/examples/rp/Cargo.toml b/examples/rp/Cargo.toml index 8162e4dcb..73d19c28b 100644 --- a/examples/rp/Cargo.toml +++ b/examples/rp/Cargo.toml @@ -49,6 +49,7 @@ log = "0.4" pio-proc = "0.2" pio = "0.2.1" rand = { version = "0.8.5", default-features = false } +embedded-sdmmc = "0.7.0" [profile.release] debug = 2 diff --git a/examples/rp/src/bin/spi_sdmmc.rs b/examples/rp/src/bin/spi_sdmmc.rs new file mode 100644 index 000000000..0912490d8 --- /dev/null +++ b/examples/rp/src/bin/spi_sdmmc.rs @@ -0,0 +1,80 @@ +//! This example shows how to use `embedded-sdmmc` with the RP2040 chip, over SPI. +//! +//! The example will attempt to read a file `MY_FILE.TXT` from the root directory +//! of the SD card and print its contents. + +#![no_std] +#![no_main] + +use defmt::*; +use embassy_embedded_hal::SetConfig; +use embassy_executor::Spawner; +use embassy_rp::spi::Spi; +use embassy_rp::{gpio, spi}; +use embedded_hal_bus::spi::ExclusiveDevice; +use embedded_sdmmc::sdcard::{DummyCsPin, SdCard}; +use gpio::{Level, Output}; +use {defmt_rtt as _, panic_probe as _}; + +struct DummyTimesource(); + +impl embedded_sdmmc::TimeSource for DummyTimesource { + fn get_timestamp(&self) -> embedded_sdmmc::Timestamp { + embedded_sdmmc::Timestamp { + year_since_1970: 0, + zero_indexed_month: 0, + zero_indexed_day: 0, + hours: 0, + minutes: 0, + seconds: 0, + } + } +} + +#[embassy_executor::main] +async fn main(_spawner: Spawner) { + let p = embassy_rp::init(Default::default()); + + // SPI clock needs to be running at <= 400kHz during initialization + let mut config = spi::Config::default(); + config.frequency = 400_000; + let spi = Spi::new_blocking(p.SPI1, p.PIN_10, p.PIN_11, p.PIN_12, config); + // Use a dummy cs pin here, for embedded-hal SpiDevice compatibility reasons + let spi_dev = ExclusiveDevice::new_no_delay(spi, DummyCsPin); + // Real cs pin + let cs = Output::new(p.PIN_16, Level::High); + + let sdcard = SdCard::new(spi_dev, cs, embassy_time::Delay); + info!("Card size is {} bytes", sdcard.num_bytes().unwrap()); + + // Now that the card is initialized, the SPI clock can go faster + let mut config = spi::Config::default(); + config.frequency = 16_000_000; + sdcard.spi(|dev| dev.bus_mut().set_config(&config)).ok(); + + // Now let's look for volumes (also known as partitions) on our block device. + // To do this we need a Volume Manager. It will take ownership of the block device. + let mut volume_mgr = embedded_sdmmc::VolumeManager::new(sdcard, DummyTimesource()); + + // Try and access Volume 0 (i.e. the first partition). + // The volume object holds information about the filesystem on that volume. + let mut volume0 = volume_mgr.open_volume(embedded_sdmmc::VolumeIdx(0)).unwrap(); + info!("Volume 0: {:?}", defmt::Debug2Format(&volume0)); + + // Open the root directory (mutably borrows from the volume). + let mut root_dir = volume0.open_root_dir().unwrap(); + + // Open a file called "MY_FILE.TXT" in the root directory + // This mutably borrows the directory. + let mut my_file = root_dir + .open_file_in_dir("MY_FILE.TXT", embedded_sdmmc::Mode::ReadOnly) + .unwrap(); + + // Print the contents of the file + while !my_file.is_eof() { + let mut buf = [0u8; 32]; + if let Ok(n) = my_file.read(&mut buf) { + info!("{:a}", buf[..n]); + } + } +} From 17d4f0173cc7a3078112a0dca6a4c0de39373b13 Mon Sep 17 00:00:00 2001 From: kalkyl Date: Sat, 11 May 2024 16:09:20 +0200 Subject: [PATCH 288/581] spinlock + loop at end to allow defmt to flush properly --- examples/rp/src/bin/spi_sdmmc.rs | 3 +++ 1 file changed, 3 insertions(+) diff --git a/examples/rp/src/bin/spi_sdmmc.rs b/examples/rp/src/bin/spi_sdmmc.rs index 0912490d8..4cbc82f7b 100644 --- a/examples/rp/src/bin/spi_sdmmc.rs +++ b/examples/rp/src/bin/spi_sdmmc.rs @@ -33,6 +33,7 @@ impl embedded_sdmmc::TimeSource for DummyTimesource { #[embassy_executor::main] async fn main(_spawner: Spawner) { + embassy_rp::pac::SIO.spinlock(31).write_value(1); let p = embassy_rp::init(Default::default()); // SPI clock needs to be running at <= 400kHz during initialization @@ -77,4 +78,6 @@ async fn main(_spawner: Spawner) { info!("{:a}", buf[..n]); } } + + loop {} } From 9d783d3b3521e1c1ff228160ee3ebca653bf06f8 Mon Sep 17 00:00:00 2001 From: Tim Docker Date: Sun, 12 May 2024 21:42:17 +1000 Subject: [PATCH 289/581] refactor rp usb_serial example to use a task to run the usb --- examples/rp/src/bin/usb_serial.rs | 110 ++++++++++++++++-------------- 1 file changed, 60 insertions(+), 50 deletions(-) diff --git a/examples/rp/src/bin/usb_serial.rs b/examples/rp/src/bin/usb_serial.rs index 3c9bc96dd..4a802994a 100644 --- a/examples/rp/src/bin/usb_serial.rs +++ b/examples/rp/src/bin/usb_serial.rs @@ -5,15 +5,15 @@ #![no_std] #![no_main] -use defmt::{info, panic}; +use defmt::{info, panic, unwrap}; use embassy_executor::Spawner; -use embassy_futures::join::join; use embassy_rp::bind_interrupts; use embassy_rp::peripherals::USB; use embassy_rp::usb::{Driver, Instance, InterruptHandler}; use embassy_usb::class::cdc_acm::{CdcAcmClass, State}; use embassy_usb::driver::EndpointError; -use embassy_usb::{Builder, Config}; +use embassy_usb::UsbDevice; +use static_cell::StaticCell; use {defmt_rtt as _, panic_probe as _}; bind_interrupts!(struct Irqs { @@ -21,7 +21,7 @@ bind_interrupts!(struct Irqs { }); #[embassy_executor::main] -async fn main(_spawner: Spawner) { +async fn main(spawner: Spawner) { info!("Hello there!"); let p = embassy_rp::init(Default::default()); @@ -30,59 +30,69 @@ async fn main(_spawner: Spawner) { let driver = Driver::new(p.USB, Irqs); // Create embassy-usb Config - let mut config = Config::new(0xc0de, 0xcafe); - config.manufacturer = Some("Embassy"); - config.product = Some("USB-serial example"); - config.serial_number = Some("12345678"); - config.max_power = 100; - config.max_packet_size_0 = 64; + let config = { + let mut config = embassy_usb::Config::new(0xc0de, 0xcafe); + config.manufacturer = Some("Embassy"); + config.product = Some("USB-serial example"); + config.serial_number = Some("12345678"); + config.max_power = 100; + config.max_packet_size_0 = 64; - // Required for windows compatibility. - // https://developer.nordicsemi.com/nRF_Connect_SDK/doc/1.9.1/kconfig/CONFIG_CDC_ACM_IAD.html#help - config.device_class = 0xEF; - config.device_sub_class = 0x02; - config.device_protocol = 0x01; - config.composite_with_iads = true; + // Required for windows compatibility. + // https://developer.nordicsemi.com/nRF_Connect_SDK/doc/1.9.1/kconfig/CONFIG_CDC_ACM_IAD.html#help + config.device_class = 0xEF; + config.device_sub_class = 0x02; + config.device_protocol = 0x01; + config.composite_with_iads = true; + config + }; // Create embassy-usb DeviceBuilder using the driver and config. // It needs some buffers for building the descriptors. - let mut config_descriptor = [0; 256]; - let mut bos_descriptor = [0; 256]; - let mut control_buf = [0; 64]; + let mut builder = { + static CONFIG_DESCRIPTOR: StaticCell<[u8; 256]> = StaticCell::new(); + static BOS_DESCRIPTOR: StaticCell<[u8; 256]> = StaticCell::new(); + static CONTROL_BUF: StaticCell<[u8; 64]> = StaticCell::new(); - let mut state = State::new(); - - let mut builder = Builder::new( - driver, - config, - &mut config_descriptor, - &mut bos_descriptor, - &mut [], // no msos descriptors - &mut control_buf, - ); - - // Create classes on the builder. - let mut class = CdcAcmClass::new(&mut builder, &mut state, 64); - - // Build the builder. - let mut usb = builder.build(); - - // Run the USB device. - let usb_fut = usb.run(); - - // Do stuff with the class! - let echo_fut = async { - loop { - class.wait_connection().await; - info!("Connected"); - let _ = echo(&mut class).await; - info!("Disconnected"); - } + let builder = embassy_usb::Builder::new( + driver, + config, + CONFIG_DESCRIPTOR.init([0; 256]), + BOS_DESCRIPTOR.init([0; 256]), + &mut [], // no msos descriptors + CONTROL_BUF.init([0; 64]), + ); + builder }; - // Run everything concurrently. - // If we had made everything `'static` above instead, we could do this using separate tasks instead. - join(usb_fut, echo_fut).await; + // Create classes on the builder. + let mut class = { + static STATE: StaticCell = StaticCell::new(); + let state = STATE.init(State::new()); + CdcAcmClass::new(&mut builder, state, 64) + }; + + // Build the builder. + let usb = builder.build(); + + // Run the USB device. + unwrap!(spawner.spawn(usb_task(usb))); + + // Do stuff with the class! + loop { + class.wait_connection().await; + info!("Connected"); + let _ = echo(&mut class).await; + info!("Disconnected"); + } +} + +type MyUsbDriver = Driver<'static, USB>; +type MyUsbDevice = UsbDevice<'static, MyUsbDriver>; + +#[embassy_executor::task] +async fn usb_task(mut usb: MyUsbDevice) -> ! { + usb.run().await } struct Disconnected {} From 3294ca36ce586d051d67875ca45b1bd2d1f4bc65 Mon Sep 17 00:00:00 2001 From: James Munns Date: Sun, 12 May 2024 21:07:37 +0200 Subject: [PATCH 290/581] FAQ: add `patch.crates-io` example --- docs/modules/ROOT/pages/faq.adoc | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) diff --git a/docs/modules/ROOT/pages/faq.adoc b/docs/modules/ROOT/pages/faq.adoc index a074594cc..fe30b68d6 100644 --- a/docs/modules/ROOT/pages/faq.adoc +++ b/docs/modules/ROOT/pages/faq.adoc @@ -290,3 +290,25 @@ General steps: 5. Copy data to that region before using BDMA. See link:/examples/stm32h7/src/bin/spi_bdma.rs[this example] for more details. + +=== How do I switch to the `main` branch? + +Sometimes to test new changes or fixes, you'll want to switch your project to using a version from GitHub. + +You can add a section to your `Cargo.toml` file like this, you'll need to patch ALL embassy crates to the same revision: + +Using `patch` will replace all direct AND indirect dependencies. + +[source,toml] +---- +[patch.crates-io] +# make sure to get the latest git rev from github, you can see the latest one here: +# https://github.com/embassy-rs/embassy/commits/main/ +embassy-embedded-hal = { git = "https://github.com/embassy-rs/embassy", rev = "4cade64ebd34bf93458f17cfe85c5f710d0ff13c" } +embassy-executor = { git = "https://github.com/embassy-rs/embassy", rev = "4cade64ebd34bf93458f17cfe85c5f710d0ff13c" } +embassy-rp = { git = "https://github.com/embassy-rs/embassy", rev = "4cade64ebd34bf93458f17cfe85c5f710d0ff13c" } +embassy-sync = { git = "https://github.com/embassy-rs/embassy", rev = "4cade64ebd34bf93458f17cfe85c5f710d0ff13c" } +embassy-time = { git = "https://github.com/embassy-rs/embassy", rev = "4cade64ebd34bf93458f17cfe85c5f710d0ff13c" } +embassy-usb = { git = "https://github.com/embassy-rs/embassy", rev = "4cade64ebd34bf93458f17cfe85c5f710d0ff13c" } +embassy-usb-driver = { git = "https://github.com/embassy-rs/embassy", rev = "4cade64ebd34bf93458f17cfe85c5f710d0ff13c" } +---- From 61fa95f3539d4e0f645464068b609ce9f2146d91 Mon Sep 17 00:00:00 2001 From: James Munns Date: Sun, 12 May 2024 21:09:51 +0200 Subject: [PATCH 291/581] Update docs/modules/ROOT/pages/faq.adoc --- docs/modules/ROOT/pages/faq.adoc | 2 ++ 1 file changed, 2 insertions(+) diff --git a/docs/modules/ROOT/pages/faq.adoc b/docs/modules/ROOT/pages/faq.adoc index fe30b68d6..6c7126cd6 100644 --- a/docs/modules/ROOT/pages/faq.adoc +++ b/docs/modules/ROOT/pages/faq.adoc @@ -299,6 +299,8 @@ You can add a section to your `Cargo.toml` file like this, you'll need to patch Using `patch` will replace all direct AND indirect dependencies. +See the link:https://embassy.dev/book/dev/new_project.html#_cargo_toml[new project docs] for more details on this approach. + [source,toml] ---- [patch.crates-io] From f30b298b0e412c5f14859b419cf01d47a5ea1e01 Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Sun, 12 May 2024 23:31:42 +0200 Subject: [PATCH 292/581] Update stable Rust. --- rust-toolchain.toml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/rust-toolchain.toml b/rust-toolchain.toml index 2f5d17069..57185e217 100644 --- a/rust-toolchain.toml +++ b/rust-toolchain.toml @@ -1,5 +1,5 @@ [toolchain] -channel = "1.77" +channel = "1.78" components = [ "rust-src", "rustfmt", "llvm-tools" ] targets = [ "thumbv7em-none-eabi", From 43d51884e24f937864e292400fc272855aa1c481 Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Sun, 12 May 2024 23:40:32 +0200 Subject: [PATCH 293/581] hal-internal: fix failing test due to not initializing ringbuf. --- embassy-hal-internal/src/atomic_ring_buffer.rs | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/embassy-hal-internal/src/atomic_ring_buffer.rs b/embassy-hal-internal/src/atomic_ring_buffer.rs index 34ceac852..40ad9dc7a 100644 --- a/embassy-hal-internal/src/atomic_ring_buffer.rs +++ b/embassy-hal-internal/src/atomic_ring_buffer.rs @@ -478,8 +478,12 @@ mod tests { #[test] fn zero_len() { + let mut b = [0; 0]; + let rb = RingBuffer::new(); unsafe { + rb.init(b.as_mut_ptr(), b.len()); + assert_eq!(rb.is_empty(), true); assert_eq!(rb.is_full(), true); From 623d3ec3069c20e9e1f19232094068fbf398ee97 Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Sun, 12 May 2024 23:41:46 +0200 Subject: [PATCH 294/581] stm32/ospi: remove unused trait. --- embassy-stm32/src/ospi/mod.rs | 11 ----------- 1 file changed, 11 deletions(-) diff --git a/embassy-stm32/src/ospi/mod.rs b/embassy-stm32/src/ospi/mod.rs index 398c3298f..c25ac4d24 100644 --- a/embassy-stm32/src/ospi/mod.rs +++ b/embassy-stm32/src/ospi/mod.rs @@ -969,17 +969,6 @@ fn finish_dma(regs: Regs) { }); } -trait RegsExt { - fn dr_ptr(&self) -> *mut W; -} - -impl RegsExt for Regs { - fn dr_ptr(&self) -> *mut W { - let dr = self.dr(); - dr.as_ptr() as *mut W - } -} - pub(crate) trait SealedInstance { const REGS: Regs; } From a14319f51e0a99d725c9c96f01fc09282cf35bb6 Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Mon, 13 May 2024 00:00:36 +0200 Subject: [PATCH 295/581] stm32: allow some unused. --- embassy-stm32/src/adc/mod.rs | 1 + embassy-stm32/src/cordic/mod.rs | 1 + 2 files changed, 2 insertions(+) diff --git a/embassy-stm32/src/adc/mod.rs b/embassy-stm32/src/adc/mod.rs index 8ef68490b..c753d046c 100644 --- a/embassy-stm32/src/adc/mod.rs +++ b/embassy-stm32/src/adc/mod.rs @@ -52,6 +52,7 @@ trait SealedInstance { #[allow(unused)] fn regs() -> crate::pac::adc::Adc; #[cfg(not(any(adc_f1, adc_v1, adc_l0, adc_f3_v2, adc_f3_v1_1, adc_g0)))] + #[allow(unused)] fn common_regs() -> crate::pac::adccommon::AdcCommon; #[cfg(any(adc_f1, adc_f3, adc_v1, adc_l0, adc_f3_v1_1))] fn state() -> &'static State; diff --git a/embassy-stm32/src/cordic/mod.rs b/embassy-stm32/src/cordic/mod.rs index 9ac10e714..29b11735e 100644 --- a/embassy-stm32/src/cordic/mod.rs +++ b/embassy-stm32/src/cordic/mod.rs @@ -47,6 +47,7 @@ trait SealedInstance { } /// Enable global interrupt + #[allow(unused)] fn enable_irq(&self) { Self::regs().csr().modify(|v| v.set_ien(true)) } From a8f578751ff3050edbd49cbeb7bbdddf0f3af6a5 Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Mon, 13 May 2024 00:16:24 +0200 Subject: [PATCH 296/581] tests/riscv32: workaround linking bug, update deps. https://github.com/rust-embedded/riscv/issues/196 --- tests/riscv32/Cargo.toml | 4 +- tests/riscv32/link.x | 214 +++++++++++++++++++++++++++++++++++++++ 2 files changed, 216 insertions(+), 2 deletions(-) create mode 100644 tests/riscv32/link.x diff --git a/tests/riscv32/Cargo.toml b/tests/riscv32/Cargo.toml index 38fb2deec..94eda3c09 100644 --- a/tests/riscv32/Cargo.toml +++ b/tests/riscv32/Cargo.toml @@ -11,8 +11,8 @@ embassy-executor = { version = "0.5.0", path = "../../embassy-executor", feature embassy-time = { version = "0.3.0", path = "../../embassy-time" } embassy-futures = { version = "0.1.0", path = "../../embassy-futures" } -riscv-rt = "0.11" -riscv = { version = "0.10", features = ["critical-section-single-hart"] } +riscv-rt = "0.12.2" +riscv = { version = "0.11.1", features = ["critical-section-single-hart"] } [profile.dev] diff --git a/tests/riscv32/link.x b/tests/riscv32/link.x new file mode 100644 index 000000000..4076b0c68 --- /dev/null +++ b/tests/riscv32/link.x @@ -0,0 +1,214 @@ +/* # EMBASSY notes + This file is a workaround for https://github.com/rust-embedded/riscv/issues/196 + Remove when fixed upstream. +*/ +/* # Developer notes + +- Symbols that start with a double underscore (__) are considered "private" + +- Symbols that start with a single underscore (_) are considered "semi-public"; they can be + overridden in a user linker script, but should not be referred from user code (e.g. `extern "C" { + static mut _heap_size }`). + +- `EXTERN` forces the linker to keep a symbol in the final binary. We use this to make sure a + symbol if not dropped if it appears in or near the front of the linker arguments and "it's not + needed" by any of the preceding objects (linker arguments) + +- `PROVIDE` is used to provide default values that can be overridden by a user linker script + +- In this linker script, you may find symbols that look like `${...}` (e.g., `4`). + These are wildcards used by the `build.rs` script to adapt to different target particularities. + Check `build.rs` for more details about these symbols. + +- On alignment: it's important for correctness that the VMA boundaries of both .bss and .data *and* + the LMA of .data are all `4`-byte aligned. These alignments are assumed by the RAM + initialization routine. There's also a second benefit: `4`-byte aligned boundaries + means that you won't see "Address (..) is out of bounds" in the disassembly produced by `objdump`. +*/ + +PROVIDE(_stext = ORIGIN(REGION_TEXT)); +PROVIDE(_stack_start = ORIGIN(REGION_STACK) + LENGTH(REGION_STACK)); +PROVIDE(_max_hart_id = 0); +PROVIDE(_hart_stack_size = 2K); +PROVIDE(_heap_size = 0); + +PROVIDE(InstructionMisaligned = ExceptionHandler); +PROVIDE(InstructionFault = ExceptionHandler); +PROVIDE(IllegalInstruction = ExceptionHandler); +PROVIDE(Breakpoint = ExceptionHandler); +PROVIDE(LoadMisaligned = ExceptionHandler); +PROVIDE(LoadFault = ExceptionHandler); +PROVIDE(StoreMisaligned = ExceptionHandler); +PROVIDE(StoreFault = ExceptionHandler);; +PROVIDE(UserEnvCall = ExceptionHandler); +PROVIDE(SupervisorEnvCall = ExceptionHandler); +PROVIDE(MachineEnvCall = ExceptionHandler); +PROVIDE(InstructionPageFault = ExceptionHandler); +PROVIDE(LoadPageFault = ExceptionHandler); +PROVIDE(StorePageFault = ExceptionHandler); + +PROVIDE(SupervisorSoft = DefaultHandler); +PROVIDE(MachineSoft = DefaultHandler); +PROVIDE(SupervisorTimer = DefaultHandler); +PROVIDE(MachineTimer = DefaultHandler); +PROVIDE(SupervisorExternal = DefaultHandler); +PROVIDE(MachineExternal = DefaultHandler); + +PROVIDE(DefaultHandler = DefaultInterruptHandler); +PROVIDE(ExceptionHandler = DefaultExceptionHandler); + +/* # Pre-initialization function */ +/* If the user overrides this using the `#[pre_init]` attribute or by creating a `__pre_init` function, + then the function this points to will be called before the RAM is initialized. */ +PROVIDE(__pre_init = default_pre_init); + +/* A PAC/HAL defined routine that should initialize custom interrupt controller if needed. */ +PROVIDE(_setup_interrupts = default_setup_interrupts); + +/* # Multi-processing hook function + fn _mp_hook() -> bool; + + This function is called from all the harts and must return true only for one hart, + which will perform memory initialization. For other harts it must return false + and implement wake-up in platform-dependent way (e.g. after waiting for a user interrupt). +*/ +PROVIDE(_mp_hook = default_mp_hook); + +/* # Start trap function override + By default uses the riscv crates default trap handler + but by providing the `_start_trap` symbol external crates can override. +*/ +PROVIDE(_start_trap = default_start_trap); + +SECTIONS +{ + .text.dummy (NOLOAD) : + { + /* This section is intended to make _stext address work */ + . = ABSOLUTE(_stext); + } > REGION_TEXT + + .text _stext : + { + /* Put reset handler first in .text section so it ends up as the entry */ + /* point of the program. */ + KEEP(*(.init)); + KEEP(*(.init.rust)); + . = ALIGN(4); + *(.trap); + *(.trap.rust); + *(.text.abort); + *(.text .text.*); + } > REGION_TEXT + + .eh_frame : { KEEP(*(.eh_frame)) } > REGION_TEXT + .eh_frame_hdr : { *(.eh_frame_hdr) } > REGION_TEXT + + .rodata : ALIGN(4) + { + *(.srodata .srodata.*); + *(.rodata .rodata.*); + + /* 4-byte align the end (VMA) of this section. + This is required by LLD to ensure the LMA of the following .data + section will have the correct alignment. */ + . = ALIGN(4); + } > REGION_RODATA + + .data : ALIGN(4) + { + _sidata = LOADADDR(.data); + _sdata = .; + /* Must be called __global_pointer$ for linker relaxations to work. */ + PROVIDE(__global_pointer$ = . + 0x800); + *(.sdata .sdata.* .sdata2 .sdata2.*); + *(.data .data.*); + . = ALIGN(4); + _edata = .; + } > REGION_DATA AT > REGION_RODATA + + .bss (NOLOAD) : ALIGN(4) + { + _sbss = .; + *(.sbss .sbss.* .bss .bss.*); + . = ALIGN(4); + _ebss = .; + } > REGION_BSS + + /* fictitious region that represents the memory available for the heap */ + .heap (NOLOAD) : + { + _sheap = .; + . += _heap_size; + . = ALIGN(4); + _eheap = .; + } > REGION_HEAP + + /* fictitious region that represents the memory available for the stack */ + .stack (NOLOAD) : + { + _estack = .; + . = ABSOLUTE(_stack_start); + _sstack = .; + } > REGION_STACK + + /* fake output .got section */ + /* Dynamic relocations are unsupported. This section is only used to detect + relocatable code in the input files and raise an error if relocatable code + is found */ + .got (INFO) : + { + KEEP(*(.got .got.*)); + } +} + +/* Do not exceed this mark in the error messages above | */ +ASSERT(ORIGIN(REGION_TEXT) % 4 == 0, " +ERROR(riscv-rt): the start of the REGION_TEXT must be 4-byte aligned"); + +ASSERT(ORIGIN(REGION_RODATA) % 4 == 0, " +ERROR(riscv-rt): the start of the REGION_RODATA must be 4-byte aligned"); + +ASSERT(ORIGIN(REGION_DATA) % 4 == 0, " +ERROR(riscv-rt): the start of the REGION_DATA must be 4-byte aligned"); + +ASSERT(ORIGIN(REGION_HEAP) % 4 == 0, " +ERROR(riscv-rt): the start of the REGION_HEAP must be 4-byte aligned"); + +ASSERT(ORIGIN(REGION_TEXT) % 4 == 0, " +ERROR(riscv-rt): the start of the REGION_TEXT must be 4-byte aligned"); + +ASSERT(ORIGIN(REGION_STACK) % 4 == 0, " +ERROR(riscv-rt): the start of the REGION_STACK must be 4-byte aligned"); + +ASSERT(_stext % 4 == 0, " +ERROR(riscv-rt): `_stext` must be 4-byte aligned"); + +ASSERT(_sdata % 4 == 0 && _edata % 4 == 0, " +BUG(riscv-rt): .data is not 4-byte aligned"); + +ASSERT(_sidata % 4 == 0, " +BUG(riscv-rt): the LMA of .data is not 4-byte aligned"); + +ASSERT(_sbss % 4 == 0 && _ebss % 4 == 0, " +BUG(riscv-rt): .bss is not 4-byte aligned"); + +ASSERT(_sheap % 4 == 0, " +BUG(riscv-rt): start of .heap is not 4-byte aligned"); + +ASSERT(_stext + SIZEOF(.text) < ORIGIN(REGION_TEXT) + LENGTH(REGION_TEXT), " +ERROR(riscv-rt): The .text section must be placed inside the REGION_TEXT region. +Set _stext to an address smaller than 'ORIGIN(REGION_TEXT) + LENGTH(REGION_TEXT)'"); + +ASSERT(SIZEOF(.stack) > (_max_hart_id + 1) * _hart_stack_size, " +ERROR(riscv-rt): .stack section is too small for allocating stacks for all the harts. +Consider changing `_max_hart_id` or `_hart_stack_size`."); + +ASSERT(SIZEOF(.got) == 0, " +.got section detected in the input files. Dynamic relocations are not +supported. If you are linking to C code compiled using the `gcc` crate +then modify your build script to compile the C code _without_ the +-fPIC flag. See the documentation of the `gcc::Config.fpic` method for +details."); + +/* Do not exceed this mark in the error messages above | */ From 1c9bb7c2e1ff7d68bfa709745f935040c8b415e1 Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Mon, 13 May 2024 00:35:46 +0200 Subject: [PATCH 297/581] time/generic-queue: fix ub in tests. --- embassy-time/src/queue_generic.rs | 120 +++++++++++++----------------- 1 file changed, 53 insertions(+), 67 deletions(-) diff --git a/embassy-time/src/queue_generic.rs b/embassy-time/src/queue_generic.rs index cf7a986d5..4882afd3e 100644 --- a/embassy-time/src/queue_generic.rs +++ b/embassy-time/src/queue_generic.rs @@ -177,9 +177,10 @@ embassy_time_queue_driver::timer_queue_impl!(static QUEUE: Queue = Queue::new()) #[cfg(test)] #[cfg(feature = "mock-driver")] mod tests { - use core::cell::Cell; - use core::task::{RawWaker, RawWakerVTable, Waker}; - use std::rc::Rc; + use core::sync::atomic::{AtomicBool, Ordering}; + use core::task::Waker; + use std::sync::Arc; + use std::task::Wake; use serial_test::serial; @@ -188,42 +189,26 @@ mod tests { use crate::{Duration, Instant}; struct TestWaker { - pub awoken: Rc>, - pub waker: Waker, + pub awoken: AtomicBool, } - impl TestWaker { - fn new() -> Self { - let flag = Rc::new(Cell::new(false)); - - const VTABLE: RawWakerVTable = RawWakerVTable::new( - |data: *const ()| { - unsafe { - Rc::increment_strong_count(data as *const Cell); - } - - RawWaker::new(data as _, &VTABLE) - }, - |data: *const ()| unsafe { - let data = data as *const Cell; - data.as_ref().unwrap().set(true); - Rc::decrement_strong_count(data); - }, - |data: *const ()| unsafe { - (data as *const Cell).as_ref().unwrap().set(true); - }, - |data: *const ()| unsafe { - Rc::decrement_strong_count(data); - }, - ); - - let raw = RawWaker::new(Rc::into_raw(flag.clone()) as _, &VTABLE); - - Self { - awoken: flag.clone(), - waker: unsafe { Waker::from_raw(raw) }, - } + impl Wake for TestWaker { + fn wake(self: Arc) { + self.awoken.store(true, Ordering::Relaxed); } + + fn wake_by_ref(self: &Arc) { + self.awoken.store(true, Ordering::Relaxed); + } + } + + fn test_waker() -> (Arc, Waker) { + let arc = Arc::new(TestWaker { + awoken: AtomicBool::new(false), + }); + let waker = Waker::from(arc.clone()); + + (arc, waker) } fn setup() { @@ -249,11 +234,11 @@ mod tests { assert_eq!(queue_len(), 0); - let waker = TestWaker::new(); + let (flag, waker) = test_waker(); - QUEUE.schedule_wake(Instant::from_secs(1), &waker.waker); + QUEUE.schedule_wake(Instant::from_secs(1), &waker); - assert!(!waker.awoken.get()); + assert!(!flag.awoken.load(Ordering::Relaxed)); assert_eq!(queue_len(), 1); } @@ -262,23 +247,23 @@ mod tests { fn test_schedule_same() { setup(); - let waker = TestWaker::new(); + let (_flag, waker) = test_waker(); - QUEUE.schedule_wake(Instant::from_secs(1), &waker.waker); + QUEUE.schedule_wake(Instant::from_secs(1), &waker); assert_eq!(queue_len(), 1); - QUEUE.schedule_wake(Instant::from_secs(1), &waker.waker); + QUEUE.schedule_wake(Instant::from_secs(1), &waker); assert_eq!(queue_len(), 1); - QUEUE.schedule_wake(Instant::from_secs(100), &waker.waker); + QUEUE.schedule_wake(Instant::from_secs(100), &waker); assert_eq!(queue_len(), 1); - let waker2 = TestWaker::new(); + let (_flag2, waker2) = test_waker(); - QUEUE.schedule_wake(Instant::from_secs(100), &waker2.waker); + QUEUE.schedule_wake(Instant::from_secs(100), &waker2); assert_eq!(queue_len(), 2); } @@ -288,21 +273,21 @@ mod tests { fn test_trigger() { setup(); - let waker = TestWaker::new(); + let (flag, waker) = test_waker(); - QUEUE.schedule_wake(Instant::from_secs(100), &waker.waker); + QUEUE.schedule_wake(Instant::from_secs(100), &waker); - assert!(!waker.awoken.get()); + assert!(!flag.awoken.load(Ordering::Relaxed)); MockDriver::get().advance(Duration::from_secs(99)); - assert!(!waker.awoken.get()); + assert!(!flag.awoken.load(Ordering::Relaxed)); assert_eq!(queue_len(), 1); MockDriver::get().advance(Duration::from_secs(1)); - assert!(waker.awoken.get()); + assert!(flag.awoken.load(Ordering::Relaxed)); assert_eq!(queue_len(), 0); } @@ -312,18 +297,18 @@ mod tests { fn test_immediate_trigger() { setup(); - let waker = TestWaker::new(); + let (flag, waker) = test_waker(); - QUEUE.schedule_wake(Instant::from_secs(100), &waker.waker); + QUEUE.schedule_wake(Instant::from_secs(100), &waker); MockDriver::get().advance(Duration::from_secs(50)); - let waker2 = TestWaker::new(); + let (flag2, waker2) = test_waker(); - QUEUE.schedule_wake(Instant::from_secs(40), &waker2.waker); + QUEUE.schedule_wake(Instant::from_secs(40), &waker2); - assert!(!waker.awoken.get()); - assert!(waker2.awoken.get()); + assert!(!flag.awoken.load(Ordering::Relaxed)); + assert!(flag2.awoken.load(Ordering::Relaxed)); assert_eq!(queue_len(), 1); } @@ -333,30 +318,31 @@ mod tests { setup(); for i in 1..super::QUEUE_SIZE { - let waker = TestWaker::new(); + let (flag, waker) = test_waker(); - QUEUE.schedule_wake(Instant::from_secs(310), &waker.waker); + QUEUE.schedule_wake(Instant::from_secs(310), &waker); assert_eq!(queue_len(), i); - assert!(!waker.awoken.get()); + assert!(!flag.awoken.load(Ordering::Relaxed)); } - let first_waker = TestWaker::new(); + let (flag, waker) = test_waker(); - QUEUE.schedule_wake(Instant::from_secs(300), &first_waker.waker); + QUEUE.schedule_wake(Instant::from_secs(300), &waker); assert_eq!(queue_len(), super::QUEUE_SIZE); - assert!(!first_waker.awoken.get()); + assert!(!flag.awoken.load(Ordering::Relaxed)); - let second_waker = TestWaker::new(); + let (flag2, waker2) = test_waker(); - QUEUE.schedule_wake(Instant::from_secs(305), &second_waker.waker); + QUEUE.schedule_wake(Instant::from_secs(305), &waker2); assert_eq!(queue_len(), super::QUEUE_SIZE); - assert!(first_waker.awoken.get()); + assert!(flag.awoken.load(Ordering::Relaxed)); - QUEUE.schedule_wake(Instant::from_secs(320), &TestWaker::new().waker); + let (_flag3, waker3) = test_waker(); + QUEUE.schedule_wake(Instant::from_secs(320), &waker3); assert_eq!(queue_len(), super::QUEUE_SIZE); - assert!(second_waker.awoken.get()); + assert!(flag2.awoken.load(Ordering::Relaxed)); } } From e2dfdcb5091388cfbd467e9d8ac9b7d2025cc833 Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Sun, 12 May 2024 23:30:53 +0200 Subject: [PATCH 298/581] examples/stm32: reduce packet queue count to avoid OOM on smaller chips. --- examples/stm32f4/src/bin/eth.rs | 4 ++-- examples/stm32f7/src/bin/eth.rs | 4 ++-- examples/stm32h7/src/bin/eth_client.rs | 4 ++-- examples/stm32h7/src/bin/eth_client_mii.rs | 4 ++-- 4 files changed, 8 insertions(+), 8 deletions(-) diff --git a/examples/stm32f4/src/bin/eth.rs b/examples/stm32f4/src/bin/eth.rs index 7f5c8fdb1..648c45bbd 100644 --- a/examples/stm32f4/src/bin/eth.rs +++ b/examples/stm32f4/src/bin/eth.rs @@ -62,9 +62,9 @@ async fn main(spawner: Spawner) -> ! { let mac_addr = [0x00, 0x00, 0xDE, 0xAD, 0xBE, 0xEF]; - static PACKETS: StaticCell> = StaticCell::new(); + static PACKETS: StaticCell> = StaticCell::new(); let device = Ethernet::new( - PACKETS.init(PacketQueue::<16, 16>::new()), + PACKETS.init(PacketQueue::<4, 4>::new()), p.ETH, Irqs, p.PA1, diff --git a/examples/stm32f7/src/bin/eth.rs b/examples/stm32f7/src/bin/eth.rs index 9a608e909..41e2a6061 100644 --- a/examples/stm32f7/src/bin/eth.rs +++ b/examples/stm32f7/src/bin/eth.rs @@ -63,9 +63,9 @@ async fn main(spawner: Spawner) -> ! { let mac_addr = [0x00, 0x00, 0xDE, 0xAD, 0xBE, 0xEF]; - static PACKETS: StaticCell> = StaticCell::new(); + static PACKETS: StaticCell> = StaticCell::new(); let device = Ethernet::new( - PACKETS.init(PacketQueue::<16, 16>::new()), + PACKETS.init(PacketQueue::<4, 4>::new()), p.ETH, Irqs, p.PA1, diff --git a/examples/stm32h7/src/bin/eth_client.rs b/examples/stm32h7/src/bin/eth_client.rs index aeb169e19..0639fb99f 100644 --- a/examples/stm32h7/src/bin/eth_client.rs +++ b/examples/stm32h7/src/bin/eth_client.rs @@ -64,10 +64,10 @@ async fn main(spawner: Spawner) -> ! { let mac_addr = [0x00, 0x00, 0xDE, 0xAD, 0xBE, 0xEF]; - static PACKETS: StaticCell> = StaticCell::new(); + static PACKETS: StaticCell> = StaticCell::new(); let device = Ethernet::new( - PACKETS.init(PacketQueue::<16, 16>::new()), + PACKETS.init(PacketQueue::<4, 4>::new()), p.ETH, Irqs, p.PA1, diff --git a/examples/stm32h7/src/bin/eth_client_mii.rs b/examples/stm32h7/src/bin/eth_client_mii.rs index de6ea522a..9a52e8d3b 100644 --- a/examples/stm32h7/src/bin/eth_client_mii.rs +++ b/examples/stm32h7/src/bin/eth_client_mii.rs @@ -64,10 +64,10 @@ async fn main(spawner: Spawner) -> ! { let mac_addr = [0x00, 0x00, 0xDE, 0xAD, 0xBE, 0xEF]; - static PACKETS: StaticCell> = StaticCell::new(); + static PACKETS: StaticCell> = StaticCell::new(); let device = Ethernet::new_mii( - PACKETS.init(PacketQueue::<16, 16>::new()), + PACKETS.init(PacketQueue::<4, 4>::new()), p.ETH, Irqs, p.PA1, From 09781db85d401d23bec424482062758ac63079d3 Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Mon, 13 May 2024 01:00:52 +0200 Subject: [PATCH 299/581] embassy-usb-synopsys-otg: default vbus_detect to false. --- embassy-usb-synopsys-otg/src/lib.rs | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/embassy-usb-synopsys-otg/src/lib.rs b/embassy-usb-synopsys-otg/src/lib.rs index a84f50e5a..42cdfb6e1 100644 --- a/embassy-usb-synopsys-otg/src/lib.rs +++ b/embassy-usb-synopsys-otg/src/lib.rs @@ -291,7 +291,7 @@ pub struct Config { impl Default for Config { fn default() -> Self { - Self { vbus_detection: true } + Self { vbus_detection: false } } } From 66e3d4da8d6eda003666b633bb57e67f2a10e31b Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Mon, 13 May 2024 01:01:44 +0200 Subject: [PATCH 300/581] examples/stm32: do not enable vbus detect by default, it doesn't work on all boards. --- examples/stm32f4/src/bin/usb_ethernet.rs | 12 +++++------- examples/stm32f4/src/bin/usb_hid_keyboard.rs | 12 +++++------- examples/stm32f4/src/bin/usb_hid_mouse.rs | 12 +++++------- examples/stm32f4/src/bin/usb_raw.rs | 12 +++++------- examples/stm32f4/src/bin/usb_serial.rs | 12 +++++------- examples/stm32f7/src/bin/usb_serial.rs | 12 +++++------- examples/stm32h7/src/bin/usb_serial.rs | 12 +++++------- examples/stm32l4/src/bin/usb_serial.rs | 12 +++++------- examples/stm32u5/src/bin/usb_serial.rs | 4 ++++ 9 files changed, 44 insertions(+), 56 deletions(-) diff --git a/examples/stm32f4/src/bin/usb_ethernet.rs b/examples/stm32f4/src/bin/usb_ethernet.rs index 34e58f282..19ae16e8b 100644 --- a/examples/stm32f4/src/bin/usb_ethernet.rs +++ b/examples/stm32f4/src/bin/usb_ethernet.rs @@ -77,13 +77,11 @@ async fn main(spawner: Spawner) { let ep_out_buffer = &mut OUTPUT_BUFFER.init([0; 256])[..]; let mut config = embassy_stm32::usb::Config::default(); - // Enable vbus_detection - // Note: some boards don't have this wired up and might not require it, - // as they are powered through usb! - // If you hang on boot, try setting this to "false"! - // See https://embassy.dev/book/dev/faq.html#_the_usb_examples_are_not_working_on_my_board_is_there_anything_else_i_need_to_configure - // for more information - config.vbus_detection = true; + // Do not enable vbus_detection. This is a safe default that works in all boards. + // However, if your USB device is self-powered (can stay powered on if USB is unplugged), you need + // to enable vbus_detection to comply with the USB spec. If you enable it, the board + // has to support it or USB won't work at all. See docs on `vbus_detection` for details. + config.vbus_detection = false; let driver = Driver::new_fs(p.USB_OTG_FS, Irqs, p.PA12, p.PA11, ep_out_buffer, config); diff --git a/examples/stm32f4/src/bin/usb_hid_keyboard.rs b/examples/stm32f4/src/bin/usb_hid_keyboard.rs index de9b692b1..537ff63ea 100644 --- a/examples/stm32f4/src/bin/usb_hid_keyboard.rs +++ b/examples/stm32f4/src/bin/usb_hid_keyboard.rs @@ -55,13 +55,11 @@ async fn main(_spawner: Spawner) { let mut ep_out_buffer = [0u8; 256]; let mut config = embassy_stm32::usb::Config::default(); - // Enable vbus_detection - // Note: some boards don't have this wired up and might not require it, - // as they are powered through usb! - // If you hang on boot, try setting this to "false"! - // See https://embassy.dev/book/dev/faq.html#_the_usb_examples_are_not_working_on_my_board_is_there_anything_else_i_need_to_configure - // for more information - config.vbus_detection = true; + // Do not enable vbus_detection. This is a safe default that works in all boards. + // However, if your USB device is self-powered (can stay powered on if USB is unplugged), you need + // to enable vbus_detection to comply with the USB spec. If you enable it, the board + // has to support it or USB won't work at all. See docs on `vbus_detection` for details. + config.vbus_detection = false; let driver = Driver::new_fs(p.USB_OTG_FS, Irqs, p.PA12, p.PA11, &mut ep_out_buffer, config); diff --git a/examples/stm32f4/src/bin/usb_hid_mouse.rs b/examples/stm32f4/src/bin/usb_hid_mouse.rs index d15ad52dc..df4b7426c 100644 --- a/examples/stm32f4/src/bin/usb_hid_mouse.rs +++ b/examples/stm32f4/src/bin/usb_hid_mouse.rs @@ -52,13 +52,11 @@ async fn main(_spawner: Spawner) { let mut ep_out_buffer = [0u8; 256]; let mut config = embassy_stm32::usb::Config::default(); - // Enable vbus_detection - // Note: some boards don't have this wired up and might not require it, - // as they are powered through usb! - // If you hang on boot, try setting this to "false"! - // See https://embassy.dev/book/dev/faq.html#_the_usb_examples_are_not_working_on_my_board_is_there_anything_else_i_need_to_configure - // for more information - config.vbus_detection = true; + // Do not enable vbus_detection. This is a safe default that works in all boards. + // However, if your USB device is self-powered (can stay powered on if USB is unplugged), you need + // to enable vbus_detection to comply with the USB spec. If you enable it, the board + // has to support it or USB won't work at all. See docs on `vbus_detection` for details. + config.vbus_detection = false; let driver = Driver::new_fs(p.USB_OTG_FS, Irqs, p.PA12, p.PA11, &mut ep_out_buffer, config); diff --git a/examples/stm32f4/src/bin/usb_raw.rs b/examples/stm32f4/src/bin/usb_raw.rs index d058abdd0..1452e7c5f 100644 --- a/examples/stm32f4/src/bin/usb_raw.rs +++ b/examples/stm32f4/src/bin/usb_raw.rs @@ -105,13 +105,11 @@ async fn main(_spawner: Spawner) { let mut ep_out_buffer = [0u8; 256]; let mut config = embassy_stm32::usb::Config::default(); - // Enable vbus_detection - // Note: some boards don't have this wired up and might not require it, - // as they are powered through usb! - // If you hang on boot, try setting this to "false"! - // See https://embassy.dev/book/dev/faq.html#_the_usb_examples_are_not_working_on_my_board_is_there_anything_else_i_need_to_configure - // for more information - config.vbus_detection = true; + // Do not enable vbus_detection. This is a safe default that works in all boards. + // However, if your USB device is self-powered (can stay powered on if USB is unplugged), you need + // to enable vbus_detection to comply with the USB spec. If you enable it, the board + // has to support it or USB won't work at all. See docs on `vbus_detection` for details. + config.vbus_detection = false; let driver = Driver::new_fs(p.USB_OTG_FS, Irqs, p.PA12, p.PA11, &mut ep_out_buffer, config); diff --git a/examples/stm32f4/src/bin/usb_serial.rs b/examples/stm32f4/src/bin/usb_serial.rs index 91cfae87b..b2bd390b6 100644 --- a/examples/stm32f4/src/bin/usb_serial.rs +++ b/examples/stm32f4/src/bin/usb_serial.rs @@ -52,13 +52,11 @@ async fn main(_spawner: Spawner) { let mut ep_out_buffer = [0u8; 256]; let mut config = embassy_stm32::usb::Config::default(); - // Enable vbus_detection - // Note: some boards don't have this wired up and might not require it, - // as they are powered through usb! - // If you hang on boot, try setting this to "false"! - // See https://embassy.dev/book/dev/faq.html#_the_usb_examples_are_not_working_on_my_board_is_there_anything_else_i_need_to_configure - // for more information - config.vbus_detection = true; + // Do not enable vbus_detection. This is a safe default that works in all boards. + // However, if your USB device is self-powered (can stay powered on if USB is unplugged), you need + // to enable vbus_detection to comply with the USB spec. If you enable it, the board + // has to support it or USB won't work at all. See docs on `vbus_detection` for details. + config.vbus_detection = false; let driver = Driver::new_fs(p.USB_OTG_FS, Irqs, p.PA12, p.PA11, &mut ep_out_buffer, config); diff --git a/examples/stm32f7/src/bin/usb_serial.rs b/examples/stm32f7/src/bin/usb_serial.rs index 02ab4d1f2..0e5cc7c5c 100644 --- a/examples/stm32f7/src/bin/usb_serial.rs +++ b/examples/stm32f7/src/bin/usb_serial.rs @@ -52,13 +52,11 @@ async fn main(_spawner: Spawner) { let mut ep_out_buffer = [0u8; 256]; let mut config = embassy_stm32::usb::Config::default(); - // Enable vbus_detection - // Note: some boards don't have this wired up and might not require it, - // as they are powered through usb! - // If you hang on boot, try setting this to "false"! - // See https://embassy.dev/book/dev/faq.html#_the_usb_examples_are_not_working_on_my_board_is_there_anything_else_i_need_to_configure - // for more information - config.vbus_detection = true; + // Do not enable vbus_detection. This is a safe default that works in all boards. + // However, if your USB device is self-powered (can stay powered on if USB is unplugged), you need + // to enable vbus_detection to comply with the USB spec. If you enable it, the board + // has to support it or USB won't work at all. See docs on `vbus_detection` for details. + config.vbus_detection = false; let driver = Driver::new_fs(p.USB_OTG_FS, Irqs, p.PA12, p.PA11, &mut ep_out_buffer, config); diff --git a/examples/stm32h7/src/bin/usb_serial.rs b/examples/stm32h7/src/bin/usb_serial.rs index 71d0c0a25..1c50fc1c8 100644 --- a/examples/stm32h7/src/bin/usb_serial.rs +++ b/examples/stm32h7/src/bin/usb_serial.rs @@ -53,13 +53,11 @@ async fn main(_spawner: Spawner) { let mut ep_out_buffer = [0u8; 256]; let mut config = embassy_stm32::usb::Config::default(); - // Enable vbus_detection - // Note: some boards don't have this wired up and might not require it, - // as they are powered through usb! - // If you hang on boot, try setting this to "false"! - // See https://embassy.dev/book/dev/faq.html#_the_usb_examples_are_not_working_on_my_board_is_there_anything_else_i_need_to_configure - // for more information - config.vbus_detection = true; + // Do not enable vbus_detection. This is a safe default that works in all boards. + // However, if your USB device is self-powered (can stay powered on if USB is unplugged), you need + // to enable vbus_detection to comply with the USB spec. If you enable it, the board + // has to support it or USB won't work at all. See docs on `vbus_detection` for details. + config.vbus_detection = false; let driver = Driver::new_fs(p.USB_OTG_FS, Irqs, p.PA12, p.PA11, &mut ep_out_buffer, config); diff --git a/examples/stm32l4/src/bin/usb_serial.rs b/examples/stm32l4/src/bin/usb_serial.rs index a378cdc6b..ed9671d0f 100644 --- a/examples/stm32l4/src/bin/usb_serial.rs +++ b/examples/stm32l4/src/bin/usb_serial.rs @@ -47,13 +47,11 @@ async fn main(_spawner: Spawner) { let mut ep_out_buffer = [0u8; 256]; let mut config = embassy_stm32::usb::Config::default(); - // Enable vbus_detection - // Note: some boards don't have this wired up and might not require it, - // as they are powered through usb! - // If you hang on boot, try setting this to "false"! - // See https://embassy.dev/book/dev/faq.html#_the_usb_examples_are_not_working_on_my_board_is_there_anything_else_i_need_to_configure - // for more information - config.vbus_detection = true; + // Do not enable vbus_detection. This is a safe default that works in all boards. + // However, if your USB device is self-powered (can stay powered on if USB is unplugged), you need + // to enable vbus_detection to comply with the USB spec. If you enable it, the board + // has to support it or USB won't work at all. See docs on `vbus_detection` for details. + config.vbus_detection = false; let driver = Driver::new_fs(p.USB_OTG_FS, Irqs, p.PA12, p.PA11, &mut ep_out_buffer, config); diff --git a/examples/stm32u5/src/bin/usb_serial.rs b/examples/stm32u5/src/bin/usb_serial.rs index f107928a9..4d56395da 100644 --- a/examples/stm32u5/src/bin/usb_serial.rs +++ b/examples/stm32u5/src/bin/usb_serial.rs @@ -43,6 +43,10 @@ async fn main(_spawner: Spawner) { // Create the driver, from the HAL. let mut ep_out_buffer = [0u8; 256]; let mut config = embassy_stm32::usb::Config::default(); + // Do not enable vbus_detection. This is a safe default that works in all boards. + // However, if your USB device is self-powered (can stay powered on if USB is unplugged), you need + // to enable vbus_detection to comply with the USB spec. If you enable it, the board + // has to support it or USB won't work at all. See docs on `vbus_detection` for details. config.vbus_detection = false; let driver = Driver::new_fs(p.USB_OTG_FS, Irqs, p.PA12, p.PA11, &mut ep_out_buffer, config); From b13110839624bc63904510e7bb815eca63b8c617 Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Mon, 13 May 2024 01:02:00 +0200 Subject: [PATCH 301/581] examples/stm32h7rs: add i2c example. --- examples/stm32h7rs/src/bin/i2c.rs | 42 +++++++++++++++++++++++++++++++ 1 file changed, 42 insertions(+) create mode 100644 examples/stm32h7rs/src/bin/i2c.rs diff --git a/examples/stm32h7rs/src/bin/i2c.rs b/examples/stm32h7rs/src/bin/i2c.rs new file mode 100644 index 000000000..31e83cbb5 --- /dev/null +++ b/examples/stm32h7rs/src/bin/i2c.rs @@ -0,0 +1,42 @@ +#![no_std] +#![no_main] + +use defmt::*; +use embassy_executor::Spawner; +use embassy_stm32::i2c::{Error, I2c}; +use embassy_stm32::time::Hertz; +use embassy_stm32::{bind_interrupts, i2c, peripherals}; +use {defmt_rtt as _, panic_probe as _}; + +const ADDRESS: u8 = 0x5F; +const WHOAMI: u8 = 0x0F; + +bind_interrupts!(struct Irqs { + I2C2_EV => i2c::EventInterruptHandler; + I2C2_ER => i2c::ErrorInterruptHandler; +}); + +#[embassy_executor::main] +async fn main(_spawner: Spawner) { + info!("Hello world!"); + let p = embassy_stm32::init(Default::default()); + + let mut i2c = I2c::new( + p.I2C2, + p.PB10, + p.PB11, + Irqs, + p.GPDMA1_CH4, + p.GPDMA1_CH5, + Hertz(100_000), + Default::default(), + ); + + let mut data = [0u8; 1]; + + match i2c.blocking_write_read(ADDRESS, &[WHOAMI], &mut data) { + Ok(()) => info!("Whoami: {}", data[0]), + Err(Error::Timeout) => error!("Operation timed out"), + Err(e) => error!("I2c Error: {:?}", e), + } +} From 75cf17994fdc5357ac7a721c928b6ae98b2eebda Mon Sep 17 00:00:00 2001 From: QWS Date: Mon, 13 May 2024 19:48:23 +0800 Subject: [PATCH 302/581] In the start_xosc function, the frequency range is set twice. Remove the redundant one. --- embassy-rp/src/clocks.rs | 4 ---- 1 file changed, 4 deletions(-) diff --git a/embassy-rp/src/clocks.rs b/embassy-rp/src/clocks.rs index bedb79464..fac2532ea 100644 --- a/embassy-rp/src/clocks.rs +++ b/embassy-rp/src/clocks.rs @@ -714,10 +714,6 @@ pub fn clk_rtc_freq() -> u16 { } fn start_xosc(crystal_hz: u32, delay_multiplier: u32) { - pac::XOSC - .ctrl() - .write(|w| w.set_freq_range(pac::xosc::vals::CtrlFreqRange::_1_15MHZ)); - let startup_delay = (((crystal_hz / 1000) * delay_multiplier) + 128) / 256; pac::XOSC.startup().write(|w| w.set_delay(startup_delay as u16)); pac::XOSC.ctrl().write(|w| { From 7089e5b586b1f35256ce285d14403676437fc4c2 Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Mon, 13 May 2024 16:20:52 +0200 Subject: [PATCH 303/581] stm32/tests: add stm32u0 hil. --- ci.sh | 1 + tests/stm32/Cargo.toml | 1 + tests/stm32/src/bin/rng.rs | 7 ++++++- tests/stm32/src/common.rs | 24 ++++++++++++++++++++++++ 4 files changed, 32 insertions(+), 1 deletion(-) diff --git a/ci.sh b/ci.sh index 1ba00f404..6fff1e68c 100755 --- a/ci.sh +++ b/ci.sh @@ -248,6 +248,7 @@ cargo batch \ --- build --release --manifest-path tests/stm32/Cargo.toml --target thumbv7em-none-eabi --features stm32h7s3l8 --out-dir out/tests/stm32h7s3l8 \ --- build --release --manifest-path tests/stm32/Cargo.toml --target thumbv6m-none-eabi --features stm32f091rc --out-dir out/tests/stm32f091rc \ --- build --release --manifest-path tests/stm32/Cargo.toml --target thumbv8m.main-none-eabihf --features stm32h503rb --out-dir out/tests/stm32h503rb \ + --- build --release --manifest-path tests/stm32/Cargo.toml --target thumbv6m-none-eabi --features stm32u083rc --out-dir out/tests/stm32u083rc \ --- build --release --manifest-path tests/rp/Cargo.toml --target thumbv6m-none-eabi --out-dir out/tests/rpi-pico \ --- build --release --manifest-path tests/nrf52840/Cargo.toml --target thumbv7em-none-eabi --out-dir out/tests/nrf52840-dk \ --- build --release --manifest-path tests/nrf51422/Cargo.toml --target thumbv6m-none-eabi --out-dir out/tests/nrf51-dk \ diff --git a/tests/stm32/Cargo.toml b/tests/stm32/Cargo.toml index 6afa2a68e..23dfd1565 100644 --- a/tests/stm32/Cargo.toml +++ b/tests/stm32/Cargo.toml @@ -33,6 +33,7 @@ stm32wl55jc = ["embassy-stm32/stm32wl55jc-cm4", "not-gpdma", "rng", "chrono"] stm32f091rc = ["embassy-stm32/stm32f091rc", "cm0", "not-gpdma", "chrono"] stm32h503rb = ["embassy-stm32/stm32h503rb", "rng", "stop"] stm32h7s3l8 = ["embassy-stm32/stm32h7s3l8", "rng", "cordic", "hash"] # TODO: fdcan crashes, cryp dma hangs. +stm32u083rc = ["embassy-stm32/stm32u083rc", "cm0", "rng", "chrono"] cryp = [] hash = [] diff --git a/tests/stm32/src/bin/rng.rs b/tests/stm32/src/bin/rng.rs index 7f2023d4d..15ef4fb60 100644 --- a/tests/stm32/src/bin/rng.rs +++ b/tests/stm32/src/bin/rng.rs @@ -23,12 +23,17 @@ bind_interrupts!(struct Irqs { bind_interrupts!(struct Irqs { RNG_LPUART1 => rng::InterruptHandler; }); +#[cfg(any(feature = "stm32u083rc"))] +bind_interrupts!(struct Irqs { + RNG_CRYP => rng::InterruptHandler; +}); #[cfg(not(any( feature = "stm32l4a6zg", feature = "stm32l073rz", feature = "stm32h755zi", feature = "stm32h753zi", - feature = "stm32f429zi" + feature = "stm32f429zi", + feature = "stm32u083rc" )))] bind_interrupts!(struct Irqs { RNG => rng::InterruptHandler; diff --git a/tests/stm32/src/common.rs b/tests/stm32/src/common.rs index 07c61956f..4e0231858 100644 --- a/tests/stm32/src/common.rs +++ b/tests/stm32/src/common.rs @@ -62,6 +62,8 @@ teleprobe_meta::target!(b"nucleo-stm32f091rc"); teleprobe_meta::target!(b"nucleo-stm32h503rb"); #[cfg(feature = "stm32h7s3l8")] teleprobe_meta::target!(b"nucleo-stm32h7s3l8"); +#[cfg(feature = "stm32u083rc")] +teleprobe_meta::target!(b"nucleo-stm32u083rc"); macro_rules! define_peris { ($($name:ident = $peri:ident,)* $(@irq $irq_name:ident = $irq_code:tt,)*) => { @@ -258,6 +260,12 @@ define_peris!( SPI = SPI1, SPI_SCK = PA5, SPI_MOSI = PB5, SPI_MISO = PA6, SPI_TX_DMA = GPDMA1_CH0, SPI_RX_DMA = GPDMA1_CH1, @irq UART = {USART1 => embassy_stm32::usart::InterruptHandler;}, ); +#[cfg(feature = "stm32u083rc")] +define_peris!( + UART = USART1, UART_TX = PA9, UART_RX = PA10, UART_TX_DMA = DMA1_CH1, UART_RX_DMA = DMA1_CH2, + SPI = SPI1, SPI_SCK = PA5, SPI_MOSI = PA7, SPI_MISO = PA6, SPI_TX_DMA = DMA1_CH1, SPI_RX_DMA = DMA1_CH2, + @irq UART = {USART1 => embassy_stm32::usart::InterruptHandler;}, +); pub fn config() -> Config { #[allow(unused_mut)] @@ -673,5 +681,21 @@ pub fn config() -> Config { config.rcc.voltage_scale = VoltageScale::HIGH; config.rcc.mux.spi1sel = mux::Spi123sel::PLL1_Q; } + #[cfg(any(feature = "stm32u083rc"))] + { + config.rcc.hsi = true; + config.rcc.pll = Some(Pll { + source: PllSource::HSI, // 16 MHz + prediv: PllPreDiv::DIV1, + mul: PllMul::MUL7, + divp: None, + divq: None, + divr: Some(PllRDiv::DIV2), // 56 MHz + }); + config.rcc.sys = Sysclk::PLL1_R; + config.rcc.hsi48 = Some(Hsi48Config { sync_from_usb: true }); // needed for USB + config.rcc.mux.clk48sel = mux::Clk48sel::HSI48; // USB uses ICLK + } + config } From c3db435011a99825d355f19ca97086b16ad262c1 Mon Sep 17 00:00:00 2001 From: QWS Date: Tue, 14 May 2024 15:48:00 +0800 Subject: [PATCH 304/581] Fix: typo --- embassy-rp/src/clocks.rs | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/embassy-rp/src/clocks.rs b/embassy-rp/src/clocks.rs index fac2532ea..d0c6c19bd 100644 --- a/embassy-rp/src/clocks.rs +++ b/embassy-rp/src/clocks.rs @@ -1023,7 +1023,7 @@ pub fn dormant_sleep() { let _stop_adc = set(pac::CLOCKS.clk_adc_ctrl(), |w| w.set_enable(false)); let _stop_usb = set(pac::CLOCKS.clk_usb_ctrl(), |w| w.set_enable(false)); let _stop_peri = set(pac::CLOCKS.clk_peri_ctrl(), |w| w.set_enable(false)); - // set up rosc. we could ask the use to tell us which clock source to wake from like + // set up rosc. we could ask the user to tell us which clock source to wake from like // the C SDK does, but that seems rather unfriendly. we *may* disturb rtc by changing // rosc configuration if it's currently the rtc clock source, so we'll configure rosc // to the slowest frequency to minimize that impact. From 9005d26fca57cce65b48f6ec823238aea7e36082 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Jo=C3=ABl=20Schulz-Ansres?= Date: Tue, 14 May 2024 12:14:34 +0200 Subject: [PATCH 305/581] Remove comments, add some comments, minor fixes to dsihost.rs --- embassy-stm32/src/dsihost.rs | 10 + embassy-stm32/src/ltdc.rs | 1 + examples/stm32f4/src/bin/dsi_bsp.rs | 1607 +++++++++++++++++++++++++++ 3 files changed, 1618 insertions(+) create mode 100644 examples/stm32f4/src/bin/dsi_bsp.rs diff --git a/embassy-stm32/src/dsihost.rs b/embassy-stm32/src/dsihost.rs index c711672c8..110c28b92 100644 --- a/embassy-stm32/src/dsihost.rs +++ b/embassy-stm32/src/dsihost.rs @@ -193,6 +193,7 @@ impl<'d, T: Instance> DsiHost<'d, T> { // data[0] and [1] have to exist if long_write is called. w.set_data3(data[1]); w.set_data2(data[0]); + // DCS Code w.set_data1(dcs_code); }); @@ -301,6 +302,15 @@ impl<'d, T: Instance> DsiHost<'d, T> { } } + /* + // Used this to check whether there are read errors. Does not seem like it. + if !self.read_busy() { + defmt::debug!("Read not busy!"); + if self.packet_size_error() { + return Err(Error::ReadError); + } + } + */ Ok(()) } fn wait_command_fifo_empty(&self) -> Result<(), Error> { diff --git a/embassy-stm32/src/ltdc.rs b/embassy-stm32/src/ltdc.rs index b623468da..0cc8a0557 100644 --- a/embassy-stm32/src/ltdc.rs +++ b/embassy-stm32/src/ltdc.rs @@ -53,6 +53,7 @@ impl<'d, T: Instance> Ltdc<'d, T> { .dckcfgr1() .modify(|w| w.set_pllsaidivr(stm32_metapac::rcc::vals::Pllsaidivr::DIV2)); + // It is set to RCC_PLLSAIDIVR_2 in ST's BSP example for the STM32469I-DISCO. #[cfg(not(any(stm32f7, stm32u5)))] stm32_metapac::RCC .dckcfgr() diff --git a/examples/stm32f4/src/bin/dsi_bsp.rs b/examples/stm32f4/src/bin/dsi_bsp.rs new file mode 100644 index 000000000..0c54361d9 --- /dev/null +++ b/examples/stm32f4/src/bin/dsi_bsp.rs @@ -0,0 +1,1607 @@ +#![no_std] +#![no_main] + +use core::mem::size_of; +use defmt::*; +use embassy_executor::Spawner; +use embassy_stm32::{ + dsihost::{blocking_delay_ms, DsiHost, PacketType}, + gpio::{Level, Output, Speed}, + ltdc::Ltdc, + pac::{ + dsihost::regs::{Ier0, Ier1}, + ltdc::{ + regs::Dccr, + vals::{Bf1, Bf2, Depol, Hspol, Imr, Pcpol, Pf, Vspol}, + }, + DSIHOST, LTDC, + }, + rcc::{ + AHBPrescaler, APBPrescaler, Hse, HseMode, Pll, PllMul, PllPDiv, PllPreDiv, PllQDiv, PllRDiv, PllSource, Sysclk, + }, + time::mhz, +}; +use embassy_time::Timer; +use {defmt_rtt as _, panic_probe as _}; + +enum Orientation { + Landscape, + Portrait, +} + +const LCD_Orientation: Orientation = Orientation::Landscape; +const LCD_X_Size: u16 = 800; +const LCD_Y_Size: u16 = 480; + +#[embassy_executor::main] +async fn main(_spawner: Spawner) { + /* + SystemClock_Config() + */ + + let mut config = embassy_stm32::Config::default(); + config.rcc.sys = Sysclk::PLL1_P; + config.rcc.ahb_pre = AHBPrescaler::DIV1; + config.rcc.apb1_pre = APBPrescaler::DIV4; + config.rcc.apb2_pre = APBPrescaler::DIV2; + + // HSE is on and ready + config.rcc.hse = Some(Hse { + freq: mhz(8), + mode: HseMode::Oscillator, + }); + config.rcc.pll_src = PllSource::HSE; + + config.rcc.pll = Some(Pll { + prediv: PllPreDiv::DIV8, // PLLM + mul: PllMul::MUL360, // PLLN + divp: Some(PllPDiv::DIV2), + divq: Some(PllQDiv::DIV7), // was DIV4, but STM BSP example uses 7 + divr: Some(PllRDiv::DIV6), + }); + + // This seems to be working, the values in the RCC.PLLSAICFGR are correct according to the debugger. Also on and ready according to CR + config.rcc.pllsai = Some(Pll { + prediv: PllPreDiv::DIV8, // Actually ignored + mul: PllMul::MUL384, // PLLN + divp: None, // PLLP + divq: None, // PLLQ + divr: Some(PllRDiv::DIV7), // PLLR (Sai actually has special clockdiv register) + }); + + let p = embassy_stm32::init(config); + info!("Starting..."); + + let mut led = Output::new(p.PG6, Level::High, Speed::Low); + + /* + BSP_LCD_Reset() + */ + + // According to UM for the discovery kit, PH7 is an active-low reset for the LCD and touchsensor + let mut reset = Output::new(p.PH7, Level::Low, Speed::High); + + // CubeMX example waits 20 ms before de-asserting reset + embassy_time::block_for(embassy_time::Duration::from_millis(20)); + + // Disable the reset signal and wait 140ms as in the Linux driver (CubeMX waits only 20) + reset.set_high(); + embassy_time::block_for(embassy_time::Duration::from_millis(140)); + + /* + BSP_LCD_MspInit() // This will set IP blocks LTDC, DSI and DMA2D => We should be fine with what Embassy does. + */ + + let mut ltdc = Ltdc::new(p.LTDC); + let mut dsi = DsiHost::new(p.DSIHOST, p.PJ2); + let version = dsi.get_version(); + defmt::warn!("en: {:x}", version); + + /* + HAL_DSI_DeInit() + */ + + // Disable the DSI wrapper + dsi.disable_wrapper_dsi(); + + // Disable the DSI host + dsi.disable(); + + // D-PHY clock and digital disable + DSIHOST.pctlr().modify(|w| { + w.set_cke(false); + w.set_den(false) + }); + + // Turn off the DSI PLL + DSIHOST.wrpcr().modify(|w| w.set_pllen(false)); + + // Disable the regulator + DSIHOST.wrpcr().write(|w| w.set_regen(false)); + + /* + ###################################### + BEGIN HAL_DSI_Init() + ###################################### + */ + + // Enable regulator (__HAL_DSI_REG_ENABLE) + info!("DSIHOST: enabling regulator"); + DSIHOST.wrpcr().write(|w| w.set_regen(true)); + + for _ in 1..1000 { + // The regulator status (ready or not) can be monitored with the RRS flag in the DSI_WISR register. + // Once it is set, we stop waiting. + if DSIHOST.wisr().read().rrs() { + info!("DSIHOST Regulator ready"); + break; + } + embassy_time::block_for(embassy_time::Duration::from_millis(1)); + } + + if !DSIHOST.wisr().read().rrs() { + defmt::panic!("DSIHOST: enabling regulator FAILED"); + } + + // Set up PLL and enable it + DSIHOST.wrpcr().modify(|w| { + w.set_pllen(true); + w.set_ndiv(125); // PLL loop division factor set to 125 + w.set_idf(2); // PLL input divided by 2 + w.set_odf(0); // PLL output divided by 1 + }); + + /* 500 MHz / 8 = 62.5 MHz = 62500 kHz */ + const LaneByteClk_kHz: u16 = 62500; // https://github.com/STMicroelectronics/32f469idiscovery-bsp/blob/ec051de2bff3e1b73a9ccd49c9b85abf7320add9/stm32469i_discovery_lcd.c#L224C21-L224C26 + + const LcdClock: u16 = 27429; // https://github.com/STMicroelectronics/32f469idiscovery-bsp/blob/ec051de2bff3e1b73a9ccd49c9b85abf7320add9/stm32469i_discovery_lcd.c#L183 + + /* TXEscapeCkdiv = f(LaneByteClk)/15.62 = 4 */ + const TXEscapeCkdiv: u8 = (LaneByteClk_kHz / 15620) as u8; // https://github.com/STMicroelectronics/32f469idiscovery-bsp/blob/ec051de2bff3e1b73a9ccd49c9b85abf7320add9/stm32469i_discovery_lcd.c#L230 + + for _ in 1..1000 { + embassy_time::block_for(embassy_time::Duration::from_millis(1)); + // The PLL status (lock or unlock) can be monitored with the PLLLS flag in the DSI_WISR register. + // Once it is set, we stop waiting. + if DSIHOST.wisr().read().pllls() { + info!("DSIHOST PLL locked"); + break; + } + } + + if !DSIHOST.wisr().read().pllls() { + defmt::panic!("DSIHOST: enabling PLL FAILED"); + } + + // ### Set the PHY parameters ### + + // D-PHY clock and digital enable + DSIHOST.pctlr().write(|w| { + w.set_cke(true); + w.set_den(true); + }); + + // Set Clock lane to high-speed mode and disable automatic clock lane control + DSIHOST.clcr().modify(|w| { + w.set_dpcc(true); + w.set_acr(false); // TODO: Verify that false is correct here. Seems unset in BSP, i.e., zero/false. + }); + + // Set number of active data lanes to two (lanes 0 and 1) + DSIHOST.pconfr().modify(|w| w.set_nl(1)); + + // ### Set the DSI clock parameters ### + + // Set the TX escape clock division factor to 4 + DSIHOST.ccr().modify(|w| w.set_txeckdiv(TXEscapeCkdiv)); + + // Calculate the bit period in high-speed mode in unit of 0.25 ns (UIX4) + // The equation is : UIX4 = IntegerPart( (1000/F_PHY_Mhz) * 4 ) + // Where : F_PHY_Mhz = (NDIV * HSE_Mhz) / (IDF * ODF) + // Set the bit period in high-speed mode + DSIHOST.wpcr0().modify(|w| w.set_uix4(8)); // 8 is set in the BSP example (confirmed with Debugger) + + // Disable all error interrupts and reset the Error Mask + DSIHOST.ier0().write_value(Ier0(0)); + DSIHOST.ier1().write_value(Ier1(0)); + + + // Enable this to fix read timeout + DSIHOST.pcr().modify(|w| w.set_btae(true)); + + /* + ###################################### + END HAL_DSI_Init() + ###################################### + */ + + const DSI_PIXELFORMAT_RGB888: u8 = 0x05; + const DSI_PIXELFORMAT_ARGB888: u8 = 0x00; + + const HACT: u16 = LCD_X_Size; + const VACT: u16 = LCD_Y_Size; + + const VSA: u16 = 120; + const VBP: u16 = 150; + const VFP: u16 = 150; + const HSA: u16 = 2; + const HBP: u16 = 34; + const HFP: u16 = 34; + + const VirtualChannelID: u8 = 0; + + const ColorCoding: u8 = DSI_PIXELFORMAT_RGB888; + const VSPolarity: bool = false; // DSI_VSYNC_ACTIVE_HIGH == 0 + const HSPolarity: bool = false; // DSI_HSYNC_ACTIVE_HIGH == 0 + const DEPolarity: bool = false; // DSI_DATA_ENABLE_ACTIVE_HIGH == 0 + const Mode: u8 = 2; // DSI_VID_MODE_BURST; /* Mode Video burst ie : one LgP per line */ + const NullPacketSize: u16 = 0xFFF; + const NumberOfChunks: u16 = 0; + const PacketSize: u16 = HACT; /* Value depending on display orientation choice portrait/landscape */ + const HorizontalSyncActive: u16 = 4;// ((HSA as u32 * LaneByteClk_kHz as u32 ) / LcdClock as u32 ) as u16; + const HorizontalBackPorch: u16 = 77; //((HBP as u32 * LaneByteClk_kHz as u32 ) / LcdClock as u32) as u16; + const HorizontalLine: u16 = 1982; //(((HACT + HSA + HBP + HFP) as u32 * LaneByteClk_kHz as u32 ) / LcdClock as u32 ) as u16; /* Value depending on display orientation choice portrait/landscape */ + // FIXME: Make depend on orientation + const VerticalSyncActive: u16 = VSA; + const VerticalBackPorch: u16 = VBP; + const VerticalFrontPorch: u16 = VFP; + const VerticalActive: u16 = VACT; + const LPCommandEnable: bool = true; /* Enable sending commands in mode LP (Low Power) */ + + /* Largest packet size possible to transmit in LP mode in VSA, VBP, VFP regions */ + /* Only useful when sending LP packets is allowed while streaming is active in video mode */ + const LPLargestPacketSize: u8 = 16; + + /* Largest packet size possible to transmit in LP mode in HFP region during VACT period */ + /* Only useful when sending LP packets is allowed while streaming is active in video mode */ + const LPVACTLargestPacketSize: u8 = 0; + + const LPHorizontalFrontPorchEnable: bool = true; /* Allow sending LP commands during HFP period */ + const LPHorizontalBackPorchEnable: bool = true; /* Allow sending LP commands during HBP period */ + const LPVerticalActiveEnable: bool = true; /* Allow sending LP commands during VACT period */ + const LPVerticalFrontPorchEnable: bool = true; /* Allow sending LP commands during VFP period */ + const LPVerticalBackPorchEnable: bool = true; /* Allow sending LP commands during VBP period */ + const LPVerticalSyncActiveEnable: bool = true; /* Allow sending LP commands during VSync = VSA period */ + const FrameBTAAcknowledgeEnable: bool = false; /* Frame bus-turn-around acknowledge enable => false according to debugger */ + + /* + ###################################### + BEGIN HAL_DSI_ConfigVideoMode() + ###################################### + */ + + /* + if (VidCfg->ColorCoding == DSI_RGB666) + { + assert_param(IS_DSI_LOOSELY_PACKED(VidCfg->LooselyPacked)); + } + */ + + /* Select video mode by resetting CMDM and DSIM bits */ + DSIHOST.mcr().modify(|w| w.set_cmdm(false)); + DSIHOST.wcfgr().modify(|w| w.set_dsim(false)); + + /* Configure the video mode transmission type */ + DSIHOST.vmcr().modify(|w| w.set_vmt(Mode)); + + /* Configure the video packet size */ + DSIHOST.vpcr().modify(|w| w.set_vpsize(PacketSize)); + + /* Set the chunks number to be transmitted through the DSI link */ + DSIHOST.vccr().modify(|w| w.set_numc(NumberOfChunks)); + + /* Set the size of the null packet */ + DSIHOST.vnpcr().modify(|w| w.set_npsize(NullPacketSize)); + + /* Select the virtual channel for the LTDC interface traffic */ + DSIHOST.lvcidr().modify(|w| w.set_vcid(VirtualChannelID)); + + /* Configure the polarity of control signals */ + DSIHOST.lpcr().modify(|w| { + w.set_dep(DEPolarity); + w.set_hsp(HSPolarity); + w.set_vsp(VSPolarity); + }); + + /* Select the color coding for the host */ + DSIHOST.lcolcr().modify(|w| w.set_colc(ColorCoding)); + + /* Select the color coding for the wrapper */ + DSIHOST.wcfgr().modify(|w| w.set_colmux(ColorCoding)); + + /* // FIXME + /* Enable/disable the loosely packed variant to 18-bit configuration */ + if (VidCfg->ColorCoding == DSI_RGB666) + { + hdsi->Instance->LCOLCR &= ~DSI_LCOLCR_LPE; + hdsi->Instance->LCOLCR |= VidCfg->LooselyPacked; + } + */ + + /* Set the Horizontal Synchronization Active (HSA) in lane byte clock cycles */ + DSIHOST.vhsacr().modify(|w| w.set_hsa(HorizontalSyncActive)); + + /* Set the Horizontal Back Porch (HBP) in lane byte clock cycles */ + DSIHOST.vhbpcr().modify(|w| w.set_hbp(HorizontalBackPorch)); + + /* Set the total line time (HLINE=HSA+HBP+HACT+HFP) in lane byte clock cycles */ + DSIHOST.vlcr().modify(|w| w.set_hline(HorizontalLine)); + + /* Set the Vertical Synchronization Active (VSA) */ + DSIHOST.vvsacr().modify(|w| w.set_vsa(VerticalSyncActive)); + + /* Set the Vertical Back Porch (VBP)*/ + DSIHOST.vvbpcr().modify(|w| w.set_vbp(VerticalBackPorch)); + + /* Set the Vertical Front Porch (VFP)*/ + DSIHOST.vvfpcr().modify(|w| w.set_vfp(VerticalFrontPorch)); + + /* Set the Vertical Active period*/ + DSIHOST.vvacr().modify(|w| w.set_va(VerticalActive)); + + /* Configure the command transmission mode */ + DSIHOST.vmcr().modify(|w| w.set_lpce(LPCommandEnable)); + + /* Low power largest packet size */ + DSIHOST.lpmcr().modify(|w| w.set_lpsize(LPLargestPacketSize)); + + /* Low power VACT largest packet size */ + DSIHOST.lpmcr().modify(|w| w.set_lpsize(LPLargestPacketSize)); + DSIHOST.lpmcr().modify(|w| w.set_vlpsize(LPVACTLargestPacketSize)); + + /* Enable LP transition in HFP period */ + DSIHOST.vmcr().modify(|w| w.set_lphfpe(LPHorizontalFrontPorchEnable)); + + /* Enable LP transition in HBP period */ + DSIHOST.vmcr().modify(|w| w.set_lphbpe(LPHorizontalBackPorchEnable)); + + /* Enable LP transition in VACT period */ + DSIHOST.vmcr().modify(|w| w.set_lpvae(LPVerticalActiveEnable)); + + /* Enable LP transition in VFP period */ + DSIHOST.vmcr().modify(|w| w.set_lpvfpe(LPVerticalFrontPorchEnable)); + + /* Enable LP transition in VBP period */ + DSIHOST.vmcr().modify(|w| w.set_lpvbpe(LPVerticalBackPorchEnable)); + + /* Enable LP transition in vertical sync period */ + DSIHOST.vmcr().modify(|w| w.set_lpvsae(LPVerticalSyncActiveEnable)); + + /* Enable the request for an acknowledge response at the end of a frame */ + DSIHOST.vmcr().modify(|w| w.set_fbtaae(FrameBTAAcknowledgeEnable)); + + /* + ###################################### + END HAL_DSI_ConfigVideoMode() + ###################################### + */ + + /* Configure DSI PHY HS2LP and LP2HS timings */ + const ClockLaneHS2LPTime: u16 = 35; + const ClockLaneLP2HSTime: u16 = 35; + const DataLaneHS2LPTime: u8 = 35; + const DataLaneLP2HSTime: u8 = 35; + const DataLaneMaxReadTime: u16 = 0; + const StopWaitTime: u8 = 10; + + const MAX_TIME: u16 = if ClockLaneHS2LPTime > ClockLaneLP2HSTime { + ClockLaneHS2LPTime + } else { + ClockLaneLP2HSTime + }; + + /* + ###################################### + BEGIN HAL_DSI_ConfigPhyTimer() + ###################################### + */ + + /* Clock lane timer configuration */ + + /* In Automatic Clock Lane control mode, the DSI Host can turn off the clock lane between two + High-Speed transmission. + To do so, the DSI Host calculates the time required for the clock lane to change from HighSpeed + to Low-Power and from Low-Power to High-Speed. + This timings are configured by the HS2LP_TIME and LP2HS_TIME in the DSI Host Clock Lane Timer Configuration + Register (DSI_CLTCR). + But the DSI Host is not calculating LP2HS_TIME + HS2LP_TIME but 2 x HS2LP_TIME. + + Workaround : Configure HS2LP_TIME and LP2HS_TIME with the same value being the max of HS2LP_TIME or LP2HS_TIME. + */ + + DSIHOST.cltcr().modify(|w| { + w.set_hs2lp_time(MAX_TIME); + w.set_lp2hs_time(MAX_TIME) + }); + + // Data lane timer configuration + DSIHOST.dltcr().modify(|w| { + w.set_hs2lp_time(DataLaneHS2LPTime); + w.set_lp2hs_time(DataLaneLP2HSTime); + w.set_mrd_time(DataLaneMaxReadTime); + }); + + // Configure the wait period to request HS transmission after a stop state + DSIHOST.pconfr().modify(|w| w.set_sw_time(StopWaitTime)); + + /* + ###################################### + END HAL_DSI_ConfigPhyTimer() + ###################################### + */ + + // Here comes HAL_DSI_ConfigPhyTimer() in the BSP example. We have already configured it at the beginning. + + const PCPolarity: bool = false; // LTDC_PCPOLARITY_IPC == 0 + + const LTDC_DEPolarity: Depol = if DEPolarity == false { + Depol::ACTIVELOW + } else { + Depol::ACTIVEHIGH + }; + const LTDC_VSPolarity: Vspol = if VSPolarity == false { + Vspol::ACTIVEHIGH + } else { + Vspol::ACTIVELOW + }; + + const LTDC_HSPolarity: Hspol = if HSPolarity == false { + Hspol::ACTIVEHIGH + } else { + Hspol::ACTIVELOW + }; + + /* Timing Configuration */ + const HorizontalSync: u16 = HSA - 1; + const VerticalSync: u16 = VerticalSyncActive - 1; + const AccumulatedHBP: u16 = HSA + HBP - 1; + const AccumulatedVBP: u16 = VerticalSyncActive + VerticalBackPorch - 1; + const AccumulatedActiveW: u16 = LCD_X_Size + HSA + HBP - 1; + const AccumulatedActiveH: u16 = VerticalSyncActive + VerticalBackPorch + VerticalActive - 1; + const TotalWidth: u16 = LCD_X_Size + HSA + HBP + HFP - 1; + const TotalHeight: u16 = VerticalSyncActive + VerticalBackPorch + VerticalActive + VerticalFrontPorch - 1; + + /* + ###################################### + BEGIN HAL_LTDC_Init() + ###################################### + */ + + // DISABLE LTDC before making changes + ltdc.disable(); + + // Configure the HS, VS, DE and PC polarity + LTDC.gcr().modify(|w| { + w.set_hspol(LTDC_HSPolarity); + w.set_vspol(LTDC_VSPolarity); + w.set_depol(LTDC_DEPolarity); + w.set_pcpol(Pcpol::RISINGEDGE); // #define LTDC_PCPOLARITY_IPC 0x00000000U + }); + + // Set Synchronization size + LTDC.sscr().modify(|w| { + w.set_hsw(HorizontalSync); + w.set_vsh(VerticalSync) + }); + + // Set Accumulated Back porch + LTDC.bpcr().modify(|w| { + w.set_ahbp(AccumulatedHBP); + w.set_avbp(AccumulatedVBP); + }); + + // Set Accumulated Active Width + LTDC.awcr().modify(|w| { + w.set_aah(AccumulatedActiveH); + w.set_aaw(AccumulatedActiveW); + }); + + // Set Total Width + LTDC.twcr().modify(|w| { + w.set_totalh(TotalHeight); + w.set_totalw(TotalWidth); + }); + + // Set the background color value + LTDC.bccr().modify(|w| { + w.set_bcred(0); + w.set_bcgreen(0); + w.set_bcblue(0) + }); + + // Enable the Transfer Error and FIFO underrun interrupts + LTDC.ier().modify(|w| { + w.set_terrie(true); + w.set_fuie(true); + }); + + // ENABLE LTDC after making changes + ltdc.enable(); + + /* + ###################################### + END HAL_LTDC_Init() + ###################################### + */ + + /* + ###################################### + BEGIN HAL_DSI_Start() + ###################################### + */ + + dsi.enable(); + dsi.enable_wrapper_dsi(); + + /* + ###################################### + END HAL_DSI_Start() + ###################################### + */ + + /* + ###################################### + BEGIN NT35510_Init(() + ###################################### + */ + + // First, delay 120 ms (reason unknown, STM32 Cube Example does it) + blocking_delay_ms(120); + + // 1 to 26 + dsi.write_cmd(0, NT35510_WRITES_0); + dsi.write_cmd(0, NT35510_WRITES_1); + dsi.write_cmd(0, NT35510_WRITES_2); + dsi.write_cmd(0, NT35510_WRITES_3); + dsi.write_cmd(0, NT35510_WRITES_4); + dsi.write_cmd(0, NT35510_WRITES_5); + dsi.write_cmd(0, NT35510_WRITES_6); + dsi.write_cmd(0, NT35510_WRITES_7); + dsi.write_cmd(0, NT35510_WRITES_8); + dsi.write_cmd(0, NT35510_WRITES_9); + dsi.write_cmd(0, NT35510_WRITES_10); + // 11 missing + dsi.write_cmd(0, NT35510_WRITES_12); + dsi.write_cmd(0, NT35510_WRITES_13); + dsi.write_cmd(0, NT35510_WRITES_14); + dsi.write_cmd(0, NT35510_WRITES_15); + dsi.write_cmd(0, NT35510_WRITES_16); + dsi.write_cmd(0, NT35510_WRITES_17); + dsi.write_cmd(0, NT35510_WRITES_18); + dsi.write_cmd(0, NT35510_WRITES_19); + dsi.write_cmd(0, NT35510_WRITES_20); + dsi.write_cmd(0, NT35510_WRITES_21); + dsi.write_cmd(0, NT35510_WRITES_22); + dsi.write_cmd(0, NT35510_WRITES_23); + dsi.write_cmd(0, NT35510_WRITES_24); + + // Tear on + dsi.write_cmd(0, NT35510_WRITES_26); + + // Set Pixel color format to RGB888 + dsi.write_cmd(0, NT35510_WRITES_37); + + // Add a delay, otherwise MADCTL not taken + blocking_delay_ms(200); + + // Configure orientation as landscape + dsi.write_cmd(0, NT35510_MADCTL_LANDSCAPE); + dsi.write_cmd(0, NT35510_CASET_LANDSCAPE); + dsi.write_cmd(0, NT35510_RASET_LANDSCAPE); + + // Sleep out + dsi.write_cmd(0, NT35510_WRITES_27); + + // Wait for sleep out exit + blocking_delay_ms(120); + + // Configure ColorCoding + dsi.write_cmd(0, NT35510_WRITES_37); + + /* CABC : Content Adaptive Backlight Control section start >> */ + /* Note : defaut is 0 (lowest Brightness), 0xFF is highest Brightness, try 0x7F : intermediate value */ + dsi.write_cmd(0, NT35510_WRITES_31); + /* defaut is 0, try 0x2C - Brightness Control Block, Display Dimming & BackLight on */ + dsi.write_cmd(0, NT35510_WRITES_32); + /* defaut is 0, try 0x02 - image Content based Adaptive Brightness [Still Picture] */ + dsi.write_cmd(0, NT35510_WRITES_33); + /* defaut is 0 (lowest Brightness), 0xFF is highest Brightness */ + dsi.write_cmd(0, NT35510_WRITES_34); + /* CABC : Content Adaptive Backlight Control section end << */ + /* Display on */ + dsi.write_cmd(0, NT35510_WRITES_30); + + /* Send Command GRAM memory write (no parameters) : this initiates frame write via other DSI commands sent by */ + /* DSI host from LTDC incoming pixels in video mode */ + dsi.write_cmd(0, NT35510_WRITES_35); + + /* + ###################################### + END NT35510_Init(() + ###################################### + */ + + + + /* Initialize the LCD pixel width and pixel height */ + const WindowX0: u16 = 0; + const WindowX1: u16 = LCD_X_Size; // 60 for camera + const WindowY0: u16 = 0; + const WindowY1: u16 = LCD_Y_Size; // 60 for camera + const PixelFormat: Pf = Pf::ARGB8888; + //const FBStartAdress: u16 = FB_Address; + const Alpha: u8 = 255; + const Alpha0: u8 = 0; + const BackcolorBlue: u8 = 0; + const BackcolorGreen: u8 = 0; + const BackcolorRed: u8 = 0; + const ImageWidth: u16 = LCD_X_Size; // 60 for camera + const ImageHeight: u16 = LCD_Y_Size; // 60 for camera + + /*: + ###################################### + BEGIN HAL_LTDC_ConfigLayer() and LTDC_SetConfig() for Layer 0 + ###################################### + */ + + const PIXEL_SIZE: u8 = match PixelFormat { + Pf::ARGB8888 => 4, + Pf::RGB888 => 3, + Pf::ARGB4444 | Pf::RGB565 | Pf::ARGB1555 | Pf::AL88 => 2, + _ => 1, + }; + + // Configure the horizontal start and stop position + LTDC.layer(0).whpcr().write(|w| { + w.set_whstpos(LTDC.bpcr().read().ahbp() + 1 + WindowX0); + w.set_whsppos(LTDC.bpcr().read().ahbp() + WindowX1); + }); + + // Configures the vertical start and stop position + LTDC.layer(0).wvpcr().write(|w| { + w.set_wvstpos(LTDC.bpcr().read().avbp() + 1 + WindowY0); + w.set_wvsppos(LTDC.bpcr().read().avbp() + WindowY1); + }); + + // Specify the pixel format + LTDC.layer(0).pfcr().write(|w| w.set_pf(PixelFormat)); + + // Configures the default color values as zero + LTDC.layer(0).dccr().modify(|w| { + w.set_dcblue(BackcolorBlue); + w.set_dcgreen(BackcolorGreen); + w.set_dcred(BackcolorRed); + w.set_dcalpha(Alpha0); + }); + + // Specifies the constant alpha value + LTDC.layer(0).cacr().write(|w| w.set_consta(Alpha)); + + // Specifies the blending factors + LTDC.layer(0).bfcr().write(|w| { + w.set_bf1(Bf1::CONSTANT); + w.set_bf2(Bf2::CONSTANT); + }); + + // Configure the color frame buffer start address + let fb_start_address: u32 = &FRAMEBUFFER[0] as *const _ as u32; // TODO: REPLACE WITH REAL ADDRESS + info!("Setting Framebuffer Start Address: {:010x}", fb_start_address); + LTDC.layer(0).cfbar().write(|w| w.set_cfbadd(fb_start_address)); + + // Configures the color frame buffer pitch in byte + LTDC.layer(0).cfblr().write(|w| { + w.set_cfbp(ImageWidth * PIXEL_SIZE as u16); + w.set_cfbll(((WindowX1 - WindowX0) * PIXEL_SIZE as u16) + 3); + }); + + // Configures the frame buffer line number + LTDC.layer(0).cfblnr().write(|w| w.set_cfblnbr(ImageHeight)); + + // Enable LTDC_Layer by setting LEN bit + LTDC.layer(0).cr().modify(|w| w.set_len(true)); + + + // Comes after LTDC_SetConfig() in HAL_LTDC_ConfigLayer() + //LTDC->SRCR = LTDC_SRCR_IMR; + LTDC.srcr().modify(|w| w.set_imr(Imr::RELOAD)); + + /* + ###################################### + END HAL_LTDC_ConfigLayer() and LTDC_SetConfig() for Layer 0 + ###################################### + */ + + + blocking_delay_ms(5000); + + + const READ_SIZE: u16 = 1; + let mut data = [1u8; READ_SIZE as usize]; + dsi.read(0, PacketType::DcsShortPktRead(0xDA), READ_SIZE, &mut data) + .unwrap(); + info!("Display ID1: {:#04x}", data); + + dsi.read(0, PacketType::DcsShortPktRead(0xDB), READ_SIZE, &mut data) + .unwrap(); + info!("Display ID2: {:#04x}", data); + + dsi.read(0, PacketType::DcsShortPktRead(0xDC), READ_SIZE, &mut data) + .unwrap(); + info!("Display ID3: {:#04x}", data); + + blocking_delay_ms(500); + + + info!("Config done, start blinking LED"); + loop { + led.set_high(); + Timer::after_millis(1000).await; + + // Increase screen brightness + dsi.write_cmd(0, &[NT35510_CMD_WRDISBV, 0xFF]); + + //dsi.write_cmd(0, &[NT35510_CMD_ALLPIXELS_ON, 0xFF]); + + led.set_low(); + Timer::after_millis(1000).await; + + // Reduce screen brightness + dsi.write_cmd(0, &[NT35510_CMD_WRDISBV, 0x50]); + + //dsi.write_cmd(0, &[NT35510_CMD_ALLPIXELS_OFF, 0xFF]); + } +} +const NT35510_WRITES_0: &[u8] = &[0x55, 0xAA, 0x52, 0x08, 0x01, 0xF0]; // LV2: Page 1 enable +const NT35510_WRITES_1: &[u8] = &[0x03, 0x03, 0x03, 0xB0]; // AVDD: 5.2V +const NT35510_WRITES_2: &[u8] = &[0x46, 0x46, 0x46, 0xB6]; // AVDD: Ratio +const NT35510_WRITES_3: &[u8] = &[0x03, 0x03, 0x03, 0xB1]; // AVEE: -5.2V +const NT35510_WRITES_4: &[u8] = &[0x36, 0x36, 0x36, 0xB7]; // AVEE: Ratio +const NT35510_WRITES_5: &[u8] = &[0x00, 0x00, 0x02, 0xB2]; // VCL: -2.5V +const NT35510_WRITES_6: &[u8] = &[0x26, 0x26, 0x26, 0xB8]; // VCL: Ratio +const NT35510_WRITES_7: &[u8] = &[0xBF, 0x01]; // VGH: 15V (Free Pump) +const NT35510_WRITES_8: &[u8] = &[0x09, 0x09, 0x09, 0xB3]; +const NT35510_WRITES_9: &[u8] = &[0x36, 0x36, 0x36, 0xB9]; // VGH: Ratio +const NT35510_WRITES_10: &[u8] = &[0x08, 0x08, 0x08, 0xB5]; // VGL_REG: -10V +const NT35510_WRITES_12: &[u8] = &[0x26, 0x26, 0x26, 0xBA]; // VGLX: Ratio + // nt35510_reg10 is missing in HAL +const NT35510_WRITES_13: &[u8] = &[0x00, 0x80, 0x00, 0xBC]; // VGMP/VGSP: 4.5V/0V +const NT35510_WRITES_14: &[u8] = &[0x00, 0x80, 0x00, 0xBD]; // VGMN/VGSN:-4.5V/0V +const NT35510_WRITES_15: &[u8] = &[0x00, 0x50, 0xBE]; // VCOM: -1.325V +const NT35510_WRITES_16: &[u8] = &[0x55, 0xAA, 0x52, 0x08, 0x00, 0xF0]; // LV2: Page 0 enable +const NT35510_WRITES_17: &[u8] = &[0xFC, 0x00, 0xB1]; // Display control +const NT35510_WRITES_18: &[u8] = &[0xB6, 0x03]; // Src hold time +const NT35510_WRITES_19: &[u8] = &[0xB5, 0x51]; +const NT35510_WRITES_20: &[u8] = &[0x00, 0x00, 0xB7]; // Gate EQ control +const NT35510_WRITES_21: &[u8] = &[0x01, 0x02, 0x02, 0x02, 0xB8]; // Src EQ control(Mode2) +const NT35510_WRITES_22: &[u8] = &[0x00, 0x00, 0x00, 0xBC]; // Inv. mode(2-dot) +const NT35510_WRITES_23: &[u8] = &[0x03, 0x00, 0x00, 0xCC]; +const NT35510_WRITES_24: &[u8] = &[0xBA, 0x01]; + +const NT35510_MADCTL_PORTRAIT: &[u8] = &[NT35510_CMD_MADCTL, 0x00]; +const NT35510_CASET_PORTRAIT: &[u8] = &[0x00, 0x00, 0x01, 0xDF, NT35510_CMD_CASET]; +const NT35510_RASET_PORTRAIT: &[u8] = &[0x00, 0x00, 0x03, 0x1F, NT35510_CMD_RASET]; +const NT35510_MADCTL_LANDSCAPE: &[u8] = &[NT35510_CMD_MADCTL, 0x60]; +const NT35510_CASET_LANDSCAPE: &[u8] = &[0x00, 0x00, 0x03, 0x1F, NT35510_CMD_CASET]; +const NT35510_RASET_LANDSCAPE: &[u8] = &[0x00, 0x00, 0x01, 0xDF, NT35510_CMD_RASET]; + +const NT35510_WRITES_26: &[u8] = &[NT35510_CMD_TEEON, 0x00]; // Tear on +const NT35510_WRITES_27: &[u8] = &[NT35510_CMD_SLPOUT, 0x00]; // Sleep out + // 28,29 missing +const NT35510_WRITES_30: &[u8] = &[NT35510_CMD_DISPON, 0x00]; // Display on + +const NT35510_WRITES_31: &[u8] = &[NT35510_CMD_WRDISBV, 0x7F]; +const NT35510_WRITES_32: &[u8] = &[NT35510_CMD_WRCTRLD, 0x2C]; +const NT35510_WRITES_33: &[u8] = &[NT35510_CMD_WRCABC, 0x02]; +const NT35510_WRITES_34: &[u8] = &[NT35510_CMD_WRCABCMB, 0xFF]; +const NT35510_WRITES_35: &[u8] = &[NT35510_CMD_RAMWR, 0x00]; + +//const NT35510_WRITES_36: &[u8] = &[NT35510_CMD_COLMOD, NT35510_COLMOD_RGB565]; // FIXME: Example sets it to 888 but rest of the code seems to configure DSI for 565 +const NT35510_WRITES_37: &[u8] = &[NT35510_CMD_COLMOD, NT35510_COLMOD_RGB888]; + + +// More of these: https://elixir.bootlin.com/linux/latest/source/include/video/mipi_display.h#L83 +const NT35510_CMD_TEEON_GET_DISPLAY_ID: u8 = 0x04; + +const NT35510_CMD_TEEON: u8 = 0x35; +const NT35510_CMD_MADCTL: u8 = 0x36; + +const NT35510_CMD_SLPOUT: u8 = 0x11; +const NT35510_CMD_DISPON: u8 = 0x29; +const NT35510_CMD_CASET: u8 = 0x2A; +const NT35510_CMD_RASET: u8 = 0x2B; +const NT35510_CMD_RAMWR: u8 = 0x2C; /* Memory write */ +const NT35510_CMD_COLMOD: u8 = 0x3A; + +const NT35510_CMD_WRDISBV: u8 = 0x51; /* Write display brightness */ +const NT35510_CMD_RDDISBV: u8 = 0x52; /* Read display brightness */ +const NT35510_CMD_WRCTRLD: u8 = 0x53; /* Write CTRL display */ +const NT35510_CMD_RDCTRLD: u8 = 0x54; /* Read CTRL display value */ +const NT35510_CMD_WRCABC: u8 = 0x55; /* Write content adaptative brightness control */ +const NT35510_CMD_WRCABCMB: u8 = 0x5E; /* Write CABC minimum brightness */ + +const NT35510_COLMOD_RGB565: u8 = 0x55; +const NT35510_COLMOD_RGB888: u8 = 0x77; + +// Orange: 0xE1C4 +// 800x480 Display => 384000 pixels +//#[link_section = ".device_info"] +// 60x60 image taken from ST's BSP example +static FRAMEBUFFER: [u32;384000] = [ + 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, + 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 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0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 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0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xff4f4f4f, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xffadadad, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffcdcdcd, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xffbbbbbb, 0xff1b1b1b, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff7f7f7f, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xfffafafa, 0xff0a0a0a, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff050505, 0xfff3f3f3, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffe9e9e9, 0xffc6c6c6, 0xffb0b0b0, 0xffa4a4a4, 0xffbdbdbd, 0xffd5d5d5, 0xfffdfdfd, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffefefef, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff9b9b9b, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xfffafafa, 0xffd5d5d5, 0xffbebebe, 0xffa4a4a4, 0xffa7a7a7, 0xffb5b5b5, 0xffdedede, 0xfffefefe, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xfffdfdfd, 0xffd6d6d6, 0xffc0c0c0, 0xffa9a9a9, 0xffa6a6a6, 0xffc0c0c0, 0xffd7d7d7, 0xfffdfdfd, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xfff9f9f9, 0xffc8c8c8, 0xffa9a9a9, 0xffa4a4a4, 0xffc0c0c0, 0xffd9d9d9, 0xfffdfdfd, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 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0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, + 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xff929292, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff707070, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xff8c8c8c, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff0a0a0a, 0xfff7f7f7, 0xff606060, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff3d3d3d, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffc7c7c7, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff3b3b3b, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xfff4f4f4, 0xff8b8b8b, 0xff363636, 0xff010101, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff171717, 0xff646464, 0xffd6d6d6, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffefefef, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff9b9b9b, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffc0c0c0, 0xff5f5f5f, 0xff121212, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff1b1b1b, 0xff6c6c6c, 0xffdadada, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 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0xff000000, 0xff000000, 0xff060606, 0xff464646, 0xffa7a7a7, 0xfffefefe, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 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0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffd4d4d4, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff323232, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xff4b4b4b, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff484848, 0xffffffff, 0xffa5a5a5, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff060606, 0xfff4f4f4, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xff8a8a8a, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff7e7e7e, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffb0b0b0, 0xff1d1d1d, 0xff000000, 0xff000000, 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0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, + 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xfffefefe, 0xff191919, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff030303, 0xfff1f1f1, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xfffbfbfb, 0xff0e0e0e, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff8d8d8d, 0xffffffff, 0xffe9e9e9, 0xff010101, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xffb8b8b8, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xff4d4d4d, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xffc0c0c0, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xff939393, 0xff010101, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff565656, 0xfffafafa, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffefefef, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff9b9b9b, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffe7e7e7, 0xff272727, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff464646, 0xfff6f6f6, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffdedede, 0xff232323, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff313131, 0xffe9e9e9, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xff272727, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff5e5e5e, 0xff0a0a0a, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff171717, 0xffdadada, 0xff545454, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff0c0c0c, 0xffdcdcdc, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffd9d9d9, 0xff1b1b1b, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff1b1b1b, 0xffd7d7d7, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, + 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xff5b5b5b, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xffb7b7b7, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffc8c8c8, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xffd3d3d3, 0xffffffff, 0xffffffff, 0xff313131, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff767676, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xfffdfdfd, 0xff121212, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff0a0a0a, 0xfff8f8f8, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffa1a1a1, 0xff010101, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff7f7f7f, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffefefef, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff9b9b9b, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xfff7f7f7, 0xff2d2d2d, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff5d5d5d, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xfff1f1f1, 0xff202020, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff313131, 0xfff9f9f9, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xff272727, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff080808, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff4a4a4a, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffe8e8e8, 0xff1a1a1a, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff282828, 0xfff7f7f7, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, + 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xff9e9e9e, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff7a7a7a, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xff878787, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff1a1a1a, 0xfffefefe, 0xffffffff, 0xffffffff, 0xff767676, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff343434, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffd3d3d3, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff464646, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffe3e3e3, 0xff0f0f0f, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff040404, 0xff282828, 0xff282828, 0xff060606, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff050505, 0xffd8d8d8, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffefefef, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff9b9b9b, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xff7e7e7e, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xffb8b8b8, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xff656565, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff7e7e7e, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xff272727, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff020202, 0xffdddddd, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xff535353, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff191919, 0xff303030, 0xff101010, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff7f7f7f, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, + 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffe0e0e0, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff3d3d3d, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xff464646, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff606060, 0xffffffff, 0xffffffff, 0xffffffff, 0xffbbbbbb, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff030303, 0xffeeeeee, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xff969696, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff888888, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xff5c5c5c, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff010101, 0xff767676, 0xffededed, 0xffffffff, 0xffffffff, 0xfffafafa, 0xffa1a1a1, 0xff101010, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff6d6d6d, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffefefef, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff9b9b9b, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffe8e8e8, 0xff070707, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff070707, 0xff5a5a5a, 0xff969696, 0xffa5a5a5, 0xff858585, 0xff303030, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff303030, 0xffd7d7d7, 0xffffffff, 0xffffffff, 0xffffffff, 0xffd7d7d7, 0xff010101, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff101010, 0xff616161, 0xff888888, 0xff838383, 0xff545454, 0xff070707, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff070707, 0xffe9e9e9, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xff272727, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff2f2f2f, 0xff606060, 0xff707070, 0xff555555, 0xff141414, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff070707, 0xff434343, 0xff666666, 0xff6c6c6c, 0xff4a4a4a, 0xff121212, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff9a9a9a, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffbbbbbb, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff383838, 0xffcdcdcd, 0xffffffff, 0xffffffff, 0xffffffff, 0xffd0d0d0, 0xff3a3a3a, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff151515, 0xfff8f8f8, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 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0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, + 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xff242424, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff070707, 0xfff7f7f7, 0xffffffff, 0xffffffff, 0xffffffff, 0xfff9f9f9, 0xff0b0b0b, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xffa6a6a6, 0xffffffff, 0xffffffff, 0xffffffff, 0xfff7f7f7, 0xff0a0a0a, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xffafafaf, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xff595959, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xffcbcbcb, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffe9e9e9, 0xff070707, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff828282, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffbebebe, 0xff010101, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff121212, 0xfffdfdfd, 0xffffffff, 0xffffffff, 0xffffffff, 0xffefefef, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff9b9b9b, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xff8d8d8d, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff1a1a1a, 0xffd3d3d3, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xff949494, 0xff030303, 0xff000000, 0xff010101, 0xff737373, 0xfff8f8f8, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xff727272, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff3b3b3b, 0xffe9e9e9, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffd8d8d8, 0xff212121, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff878787, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xff272727, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff464646, 0xffd1d1d1, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xfff8f8f8, 0xff848484, 0xff030303, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff070707, 0xff818181, 0xfff1f1f1, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xfff3f3f3, 0xff4b4b4b, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff686868, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xff515151, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff2c2c2c, 0xfff5f5f5, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xfff5f5f5, 0xff292929, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xffb1b1b1, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, + 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xff676767, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xffc1c1c1, 0xffffffff, 0xffffffff, 0xffffffff, 0xffc3c3c3, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff020202, 0xffeaeaea, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xff474747, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff6d6d6d, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xff1d1d1d, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff111111, 0xfffcfcfc, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xff909090, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff191919, 0xfff9f9f9, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xff3d3d3d, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xffd5d5d5, 0xffffffff, 0xffffffff, 0xffffffff, 0xffefefef, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff9b9b9b, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xff343434, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xffc3c3c3, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xff8f8f8f, 0xff1a1a1a, 0xffbababa, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xff1a1a1a, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff0e0e0e, 0xffe9e9e9, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffcecece, 0xff020202, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff2f2f2f, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xff272727, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff505050, 0xfffefefe, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xff888888, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xffa3a3a3, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffe9e9e9, 0xff040404, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff525252, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffebebeb, 0xff040404, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xffb3b3b3, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xff9c9c9c, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff767676, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, + 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffaaaaaa, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff848484, 0xffffffff, 0xffffffff, 0xffffffff, 0xff818181, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff323232, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xff8c8c8c, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff2b2b2b, 0xffffffff, 0xffffffff, 0xffffffff, 0xffdfdfdf, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff505050, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xff535353, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff585858, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xff6f6f6f, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xffa9a9a9, 0xffffffff, 0xffffffff, 0xffffffff, 0xffefefef, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff9b9b9b, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xfff7f7f7, 0xff050505, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff424242, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xfffefefe, 0xffeeeeee, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffe2e2e2, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff6d6d6d, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xff474747, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff030303, 0xfff2f2f2, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xff272727, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff656565, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffd4d4d4, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xffb6b6b6, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xff242424, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff434343, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffb1b1b1, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff030303, 0xfff5f5f5, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffcfcfcf, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff4a4a4a, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, + 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffebebeb, 0xff020202, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff474747, 0xffffffff, 0xffffffff, 0xffffffff, 0xff404040, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff787878, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffd1d1d1, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff010101, 0xffe7e7e7, 0xffffffff, 0xffffffff, 0xffa2a2a2, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff939393, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xff1a1a1a, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff686868, 0xffcccccc, 0xffcccccc, 0xffcccccc, 0xffcccccc, 0xffcccccc, 0xffcccccc, 0xffcccccc, 0xffcccccc, 0xff585858, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff969696, 0xffffffff, 0xffffffff, 0xffffffff, 0xffefefef, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff9b9b9b, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffc9c9c9, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff8f8f8f, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffaeaeae, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xffb4b4b4, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xff8f8f8f, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xffc0c0c0, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xff272727, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff656565, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffd4d4d4, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xffb6b6b6, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xff3d3d3d, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff3f3f3f, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xff797979, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff1b1b1b, 0xffcccccc, 0xffcccccc, 0xffcccccc, 0xffcccccc, 0xffcccccc, 0xffcccccc, 0xffcccccc, 0xffcccccc, 0xffa5a5a5, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff373737, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 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0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, + 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xff303030, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff0d0d0d, 0xfffbfbfb, 0xffffffff, 0xfff7f7f7, 0xff080808, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xffbebebe, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xfffefefe, 0xff191919, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xffa6a6a6, 0xffffffff, 0xffffffff, 0xff656565, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xffd5d5d5, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xfffafafa, 0xff010101, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff8e8e8e, 0xffffffff, 0xffffffff, 0xffffffff, 0xffefefef, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff9b9b9b, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffaeaeae, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xffbcbcbc, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xff959595, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xffdddddd, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffb9b9b9, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xffa8a8a8, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xff272727, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff656565, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffd4d4d4, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xffb6b6b6, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xff3f3f3f, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff3f3f3f, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xff5b5b5b, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff303030, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, + 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xff737373, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xffcccccc, 0xffffffff, 0xffbdbdbd, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff0b0b0b, 0xfff8f8f8, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xff5d5d5d, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff646464, 0xffffffff, 0xffffffff, 0xff282828, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff191919, 0xfffefefe, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffe8e8e8, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff9c9c9c, 0xffffffff, 0xffffffff, 0xffffffff, 0xffefefef, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff9b9b9b, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xff9f9f9f, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xffd2d2d2, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xff858585, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xffefefef, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffcccccc, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff969696, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xff272727, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff656565, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffd4d4d4, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xffb6b6b6, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xff3f3f3f, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff3f3f3f, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xff484848, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 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0xffffffff, 0xffffffff, 0xfff3f3f3, 0xff060606, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff515151, 0xffffffff, 0xff3b3b3b, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff909090, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffe7e7e7, 0xff010101, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xffdedede, 0xffaeaeae, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff9d9d9d, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffeeeeee, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xffd3d3d3, 0xffffffff, 0xffffffff, 0xffffffff, 0xffefefef, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff9b9b9b, 0xffffffff, 0xffffffff, 0xffffffff, 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0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, + 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xff3c3c3c, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff151515, 0xfff3f3f3, 0xff050505, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xffd6d6d6, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xff2e2e2e, 0xff000000, 0xff000000, 0xff000000, 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0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 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0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 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0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xff494949, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff020202, 0xffececec, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xff444444, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff010101, 0xffe9e9e9, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xfff0f0f0, 0xff0b0b0b, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff0c0c0c, 0xffa7a7a7, 0xfffefefe, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffb8b8b8, 0xff3a3a3a, 0xff000000, 0xff525252, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xfffafafa, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff111111, 0xff959595, 0xffbbbbbb, 0xffd3d3d3, 0xffffffff, 0xffffffff, 0xffffffff, 0xffafafaf, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff020202, 0xff808080, 0xfff6f6f6, 0xffffffff, 0xffffffff, 0xffffffff, 0xffd5d5d5, 0xff414141, 0xff000000, 0xff000000, 0xff000000, 0xff252525, 0xffcccccc, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xff9e9e9e, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff0d0d0d, 0xff9f9f9f, 0xfff9f9f9, 0xffffffff, 0xffffffff, 0xfff4f4f4, 0xff878787, 0xff040404, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xffadadad, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xff272727, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff656565, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffd4d4d4, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xffb6b6b6, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xff3f3f3f, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff3f3f3f, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xff5a5a5a, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff616161, 0xfff1f1f1, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffe0e0e0, 0xff6c6c6c, 0xff040404, 0xff101010, 0xffe0e0e0, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, + 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xff8b8b8b, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff353535, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xff898989, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff2e2e2e, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xff696969, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff292929, 0xff6c6c6c, 0xff888888, 0xff808080, 0xff5f5f5f, 0xff1c1c1c, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff989898, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xff171717, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff5b5b5b, 0xffffffff, 0xffffffff, 0xffffffff, 0xfffafafa, 0xff222222, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff0d0d0d, 0xff414141, 0xff505050, 0xff2e2e2e, 0xff020202, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff060606, 0xffafafaf, 0xffffffff, 0xffffffff, 0xffffffff, 0xfff5f5f5, 0xff171717, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff0e0e0e, 0xff333333, 0xff2e2e2e, 0xff0a0a0a, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff1f1f1f, 0xfffafafa, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xff272727, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff656565, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffd4d4d4, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xffb6b6b6, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xff3f3f3f, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff3f3f3f, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 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0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 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0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 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0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffefefef, 0xff1c1c1c, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff0a0a0a, 0xffd5d5d5, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xff4b4b4b, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff5b5b5b, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffb6b6b6, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff090909, 0xffe0e0e0, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffacacac, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 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0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 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0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xfffdfdfd, 0xff141414, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xffc0c0c0, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xfffefefe, 0xff161616, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xffb2b2b2, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffbfbfbf, 0xff0a0a0a, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff5d5d5d, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffa4a4a4, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff5b5b5b, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xff6d6d6d, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xffa0a0a0, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xff676767, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff727272, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xff272727, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff656565, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffd4d4d4, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xffb6b6b6, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xff3f3f3f, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff3f3f3f, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xfff4f4f4, 0xff333333, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff0f0f0f, 0xffeeeeee, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 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0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 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0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, + 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xff555555, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff0d0d0d, 0xfff9f9f9, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xff5a5a5a, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff040404, 0xfff1f1f1, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffc4c4c4, 0xff111111, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff5d5d5d, 0xfff6f6f6, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xfffdfdfd, 0xff383838, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff5b5b5b, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xfffefefe, 0xff696969, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff030303, 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0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xff979797, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff4d4d4d, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xff9f9f9f, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff000000, 0xff383838, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 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0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffe6e6e6, 0xff888888, 0xff888888, 0xff888888, 0xff888888, 0xff888888, 0xff888888, 0xff888888, 0xff888888, 0xffc4c4c4, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffeaeaea, 0xff888888, 0xff888888, 0xff888888, 0xff888888, 0xff888888, 0xff888888, 0xff888888, 0xff888888, 0xffb9b9b9, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffe2e2e2, 0xff979797, 0xff4f4f4f, 0xff262626, 0xff0e0e0e, 0xff000000, 0xff000000, 0xff0f0f0f, 0xff383838, 0xff808080, 0xffcfcfcf, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffc1c1c1, 0xff787878, 0xff575757, 0xff444444, 0xff444444, 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0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffa5a5a5, 0xff888888, 0xff888888, 0xff888888, 0xff888888, 0xff888888, 0xffa5a5a5, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xfff6f6f6, 0xffb2b2b2, 0xff6a6a6a, 0xff2e2e2e, 0xff181818, 0xff030303, 0xff000000, 0xff050505, 0xff272727, 0xff636363, 0xffb2b2b2, 0xfff6f6f6, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 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0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xfff9d8d4, 0xffe54834, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe8604f, 0xfffdf0ef, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xfff8cfca, 0xffe4432f, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffea6a5a, 0xfffef6f5, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, + 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 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0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 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0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xfff9d3ce, 0xffe54632, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe8604f, 0xfffdf0ef, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xfff8cfca, 0xffe4432f, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffea6a5a, 0xfffef6f5, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 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0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xfff9d3ce, 0xffe54632, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe8604f, 0xfffdf0ef, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 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0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xfff8d1cc, 0xffe44531, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe8604f, 0xfffdf0ef, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xfffadad6, 0xffe54a36, 0xffed7f71, 0xfffffdfc, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xfff7cac4, 0xffe4422e, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffea6a5a, 0xfffef6f5, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, + 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xfff8d1cc, 0xffe44430, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe8604f, 0xfffdf0ef, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xfffadad6, 0xffe54a36, 0xffe33b26, 0xffe33b26, 0xffed7f71, 0xfffffdfc, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xfff7cac4, 0xffe4422e, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffea6a5a, 0xfffef6f5, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, + 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xfff8d1cc, 0xffe44430, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe8604f, 0xfffdf0ef, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xfffadad6, 0xffe54a36, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffed7f71, 0xfffffdfc, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xfff7cac4, 0xffe4422e, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffea6a5a, 0xfffef6f5, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, + 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xfff8d1cc, 0xffe44430, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe8604f, 0xfffdf0ef, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xfffadad6, 0xffe54a36, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffed7f71, 0xfffffdfc, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xfff7cac4, 0xffe4422e, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffea6a5a, 0xfffef6f5, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, + 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xfff8d0cb, 0xffe44430, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe8604f, 0xfffdf0ef, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xfffadad6, 0xffe54a36, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffed7f71, 0xfffffdfc, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xfff7cac4, 0xffe4422e, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffea6a5a, 0xfffef6f5, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, + 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 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0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xfff8d0cb, 0xffe44430, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe8604f, 0xfffdf0ef, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xfffadad6, 0xffe54a36, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffed7f71, 0xfffffdfc, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xfff7cac4, 0xffe4422e, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffea6a5a, 0xfffef6f5, 0xffffffff, 0xffffffff, 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0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xfff8d0cb, 0xffe44430, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe8604f, 0xfffdf0ef, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xfffadad6, 0xffe54a36, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffed7f71, 0xfffffdfc, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xfff7cac4, 0xffe4422e, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffea6a5a, 0xfffef6f5, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, + 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 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0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xfff8cdc8, 0xffe4432f, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe8604f, 0xfffdf0ef, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xfffad9d5, 0xffe54935, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffed8477, 0xfffffdfd, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xfff9d5d1, 0xffed7f72, 0xfffefaf9, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xfff7cac4, 0xffe4422e, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffea6e5e, 0xfffef7f6, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, + 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 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0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 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0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xfff8d0cb, 0xffe44430, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe8604f, 0xfffdf0ef, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xfffadad6, 0xffe54a36, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffed7f71, 0xfffffdfc, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xfff9d8d4, 0xffe54935, 0xffe33b26, 0xffeb7262, 0xfffef9f8, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xfff7cac4, 0xffe4422e, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffea6a5a, 0xfffef6f5, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, + 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xfff8d0cb, 0xffe44430, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe8604f, 0xfffdf0ef, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xfffadad6, 0xffe54a36, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffed7f71, 0xfffffdfc, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xfff9d8d4, 0xffe54834, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffeb7262, 0xfffef9f8, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xfff7cac4, 0xffe4422e, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffea6a5a, 0xfffef6f5, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, + 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 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0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xfff8cfca, 0xffe44430, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe8604f, 0xfffdf0ef, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xfffadad6, 0xffe54a36, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffed7f71, 0xfffffdfc, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xfff9d3ce, 0xffe54632, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffeb7262, 0xfffef9f8, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xfff7cac4, 0xffe4422e, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffea6a5a, 0xfffef6f5, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, + 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 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0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xfff8ccc7, 0xffe4432f, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe8604f, 0xfffdf0ef, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xfffad9d5, 0xffe54a36, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffed8477, 0xfffffdfd, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xfff9d2cd, 0xffe44531, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffeb7263, 0xfffef9f8, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xfff7cac4, 0xffe4422e, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffea6e5e, 0xfffef7f6, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, + 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xfffad9d5, 0xffe54935, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe8604f, 0xfffdf0ef, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xfffad9d5, 0xffe54a36, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffed8477, 0xfffffdfd, 0xffffffff, 0xffffffff, 0xfff8d1cc, 0xffe44531, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffeb7263, 0xfffef9f8, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xfff7cac4, 0xffe4422e, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe86151, 0xfffdf2f1, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, + 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xfffadad6, 0xffe54a36, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe8604f, 0xfffdf0ef, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xfffadad6, 0xffe54a36, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffed7f71, 0xfffffdfc, 0xfff9d2cd, 0xffe44531, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffeb7162, 0xfffef8f7, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xfff7cac4, 0xffe4422e, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe8604f, 0xfffdf0ef, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, + 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 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0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 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0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffeb7566, 0xffe44430, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffeb7262, 0xfffef9f8, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xfff7cac4, 0xffe4422e, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe86151, 0xfffdf1f0, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, + 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 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0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xfffadad6, 0xffe54a36, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe8604f, 0xfffdf0ef, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xfffadad6, 0xffe54a36, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffeb7162, 0xfffef8f7, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xfff7cac4, 0xffe4422e, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe8604f, 0xfffdf0ef, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, + 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 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0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xfffadad6, 0xffe54a36, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe8604f, 0xfffdf0ef, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xfffadad6, 0xffe54a36, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffeb7162, 0xfffef8f7, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xfff7cac4, 0xffe4422e, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe8604f, 0xfffdf0ef, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, + 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xfffadad6, 0xffe54a36, 0xffe33b26, 0xffe33b26, 0xffe8604f, 0xfffdf0ef, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xfffadad6, 0xffe54a36, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffeb7162, 0xfffef8f7, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xfff7cac4, 0xffe4422e, 0xffe33b26, 0xffe33b26, 0xffe8604f, 0xfffdf0ef, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, + 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xfffadad6, 0xffe54a36, 0xffe8604f, 0xfffdf0ef, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xfffadad6, 0xffe54a36, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffeb7061, 0xfffef8f7, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xfff7cac4, 0xffe4422e, 0xffe8604f, 0xfffdf0ef, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, + 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xfffadbd7, 0xfffdf0ef, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xfffad9d5, 0xffe54a36, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffeb7162, 0xfffef8f7, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xfff8d0cb, 0xfffdf1f0, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, + 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 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0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 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0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xfffadad6, 0xffe54a36, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffeb7061, 0xfffef8f7, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, + 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 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0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xfffadad6, 0xffe54a36, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffeb7061, 0xfffef8f7, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, + 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 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0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, + 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 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0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe8604f, 0xfffdf0ef, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, + 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 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0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xfffad9d4, 0xffe54935, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe8604f, 0xfffdf0ef, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 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0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff + ]; +static FRAMEBUFFER2: [u32; 3600] = [ + 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, + 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, + 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, + 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, + 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, + 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, + 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, + 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, + 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, + 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, + 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, + 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, + 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, + 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, + 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, + 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, + 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, + 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, + 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, + 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x2100, + 0x7596263, 0xB5D6667, 0xC5C6565, 0xC5D6666, 0xC5D6666, 0xC5D6665, 0xB5E646A, 0x74A4C4E, 0x6424141, 0x7515858, + 0x7636B6B, 0x76C8383, 0x786A0A0, 0x46C7D7D, 0x616F6F, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, + 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, + 0x0, 0x0, 0x11C2422, 0xD697072, 0x2393999A, 0x3CB0B3B5, 0x5CB8BCBD, 0x83BFC2C3, 0xA7CBCCCE, 0xC6D7D8DA, 0xDFE1E2E3, + 0xE8E4E5E5, 0xE9E5E5E6, 0xE9E5E5E6, 0xE9E5E4E5, 0xE9E4E5E6, 0xE7E5E6E6, 0xDEE4E5E4, 0xDCE5E6E7, 0xDDEAEBEB, + 0xDDEDEEEE, 0xDDF0F1F1, 0xDDF4F4F4, 0xD9F5F5F5, 0xACE1E3E3, 0x50B2B8BA, 0x6797D85, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, + 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, + 0x35B6564, 0x13788082, 0x2B9AA1A3, 0x48B0B4B5, 0x69BCBEBF, 0x90C5C7C9, 0xB4D0D2D4, 0xD0DBDDDE, 0xE7E3E4E5, + 0xF8E7E8E9, 0xFEEFEFEF, 0xFFF4F4F4, 0xFFF5F5F5, 0xFFF4F4F4, 0xFFF3F3F3, 0xFFF2F2F2, 0xFFF2F2F2, 0xFFF3F3F3, + 0xFFF5F5F5, 0xFFF7F7F7, 0xFFF9F9F9, 0xFFFBFBFB, 0xFFFDFDFD, 0xFFFEFEFE, 0xFFFCFCFC, 0xFFF9F9F9, 0xFFF4F5F4, + 0xFFEDEEEF, 0xFFE7E8E8, 0xFFE4E5E6, 0xFFDCDDDE, 0xC0C0C4C5, 0x1EA0A6A7, 0x81888B, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, + 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x8555E5F, 0x1A93979B, 0x32AAAEB0, 0x53B3B7B8, + 0x77BABFC0, 0x9DC9CCCD, 0xBED5D6D8, 0xD9DFE1E1, 0xF0E5E6E6, 0xFDEAEAEB, 0xFFF1F1F1, 0xFFF5F5F5, 0xFFF5F5F5, + 0xFFF4F4F4, 0xFFF3F3F3, 0xFFF2F2F2, 0xFFF1F1F1, 0xFFF1F1F1, 0xFFF2F2F2, 0xFFF3F3F3, 0xFFF4F4F4, 0xFFF6F6F6, + 0xFFF8F8F8, 0xFFFAFAFA, 0xFFFBFBFC, 0xFFFDFDFD, 0xFFFEFEFE, 0xFFFBFBFC, 0xFFF8F8F8, 0xFFF3F4F4, 0xFFECEDEE, + 0xFFE7E8E9, 0xFFE1E2E3, 0xFFDEDFDF, 0xFFDADCDD, 0xFFD8D9DA, 0xFFD6D8D9, 0xFFD4D6D7, 0xFFD5D6D8, 0xC8BABFC1, + 0xB9FA5A6, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x31D2424, 0xF6C7979, 0x249FA3A3, 0x3FAFB3B6, + 0x5FBABEBF, 0x85C1C3C5, 0xACCBCDCD, 0xC8D8DADA, 0xE2E1E3E3, 0xF8E5E7E6, 0xFFEEEFEF, 0xFFF5F5F5, 0xFFF6F6F6, + 0xFFF5F5F5, 0xFFF4F4F4, 0xFFF2F2F2, 0xFFF2F2F2, 0xFFF1F1F1, 0xFFF2F2F2, 0xFFF1F1F1, 0xFFF2F2F2, 0xFFF3F3F3, + 0xFFF2F2F2, 0xFFF3F3F3, 0xFFF5F5F5, 0xFFF7F7F7, 0xFFF9F9F9, 0xFFFBFBFB, 0xFFFCFCFC, 0xFFFDFDFD, 0xFFFDFDFD, + 0xFFFBFBFB, 0xFFF7F7F8, 0xFFF2F3F2, 0xFFEDEDEE, 0xFFE7E8E9, 0xFFE2E3E4, 0xFFDDDFE0, 0xFFDBDCDD, 0xFFD9DADB, + 0xFFD7D8D9, 0xFFD5D6D7, 0xFFD3D4D5, 0xFFD1D2D3, 0xFFCFD0D2, 0xFFCCCED0, 0xFFC9CCCD, 0xFFC6C9CA, 0x3EA1A6A8, + 0x193999B, 0x0, 0x0, 0xE1E1D9, 0x6DDDDD6, 0x18AEB8B6, 0x2EBBBEBF, 0x49C0C3C4, 0x6DC0C5C5, 0x93CACBCD, 0xB7D3D5D6, + 0xD1DEDFE0, 0xEAE4E5E5, 0xF9E8E9E9, 0xFFF0F1F1, 0xFFF4F4F4, 0xFFF5F5F5, 0xFFF4F4F4, 0xFFF3F3F3, 0xFFF2F2F2, + 0xFFF1F1F1, 0xFFF2F2F2, 0xFFF2F2F2, 0xFFF2F2F2, 0xFFF2F2F2, 0xFFF1F1F1, 0xFFF2F2F2, 0xFFF3F3F3, 0xFFF3F3F3, + 0xFFF4F4F4, 0xFFF5F5F5, 0xFFF6F6F6, 0xFFF8F8F8, 0xFFFAFAFA, 0xFFFBFBFB, 0xFFFCFCFD, 0xFFFDFDFD, 0xFFFDFDFD, + 0xFFFAFBFC, 0xFFF7F7F8, 0xFFF2F3F3, 0xFFEDEEEE, 0xFFE8E9EA, 0xFFE3E4E5, 0xFFDFE0E1, 0xFFDBDCDE, 0xFFD9DADB, + 0xFFD7D8D9, 0xFFD5D6D7, 0xFFD3D4D5, 0xFFD0D2D3, 0xFFCED0D1, 0xFFCCCECF, 0xFFCACCCD, 0xFFC7CACB, 0xFFC5C8CA, + 0xFFC3C5C7, 0xFFC0C3C5, 0xFFC1C4C6, 0x57A5A8AA, 0x19EA2A4, 0x0, 0x0, 0x56969BA2, 0xE05F6371, 0xF45E626F, + 0xFD727680, 0xFF8B8E97, 0xFF9EA0A8, 0xFFADB0B5, 0xFFBABCC0, 0xFFC6C8CB, 0xFFD3D4D6, 0xFFDCDDDE, 0xFFE4E5E6, + 0xFFEDEDED, 0xFFEFF0F0, 0xFFF2F2F2, 0xFFF4F4F4, 0xFFF5F5F4, 0xFFF5F5F4, 0xFFF4F4F4, 0xFFF3F3F3, 0xFFF2F2F2, + 0xFFF3F3F3, 0xFFF4F4F4, 0xFFF6F6F6, 0xFFF7F7F7, 0xFFF9F9F9, 0xFFFBFBFB, 0xFFFCFCFC, 0xFFFCFCFC, 0xFFFDFDFD, + 0xFFFCFCFC, 0xFFFBFBFB, 0xFFF7F8F8, 0xFFF3F4F4, 0xFFEFEFF0, 0xFFEAEAEA, 0xFFE4E5E6, 0xFFE0E1E2, 0xFFDCDDDE, + 0xFFDADBDC, 0xFFD7D8DA, 0xFFD5D6D7, 0xFFD3D5D6, 0xFFD0D2D4, 0xFFCED0D2, 0xFFCDCED0, 0xFFCBCCCE, 0xFFC8CBCC, + 0xFFC6C8CA, 0xFFC3C6C7, 0xFFC1C4C5, 0xFFBEC2C3, 0xFFBCBFC2, 0xFFBBBDBF, 0xFFB8BBBD, 0xFFB9BCBE, 0x63A0A7A9, + 0x29BA2A4, 0x0, 0x0, 0xDC656976, 0xFF363A4C, 0xFF373B4E, 0xFF363A4D, 0xFF363A4C, 0xFF35394C, 0xFF35394B, + 0xFF363A4C, 0xFF373B4D, 0xFF383C4E, 0xFF424555, 0xFF4B4F5C, 0xFF565962, 0xFF63666E, 0xFF727479, 0xFF7F8285, + 0xFF8F9294, 0xFFA0A1A4, 0xFFAFB1B3, 0xFFCACCCE, 0xFFF3F3F4, 0xFFFCFCFB, 0xFFFBFBFB, 0xFFFCFCFC, 0xFFFCFCFC, + 0xFFFCFCFC, 0xFFFCFCFC, 0xFFFBFBFB, 0xFFF8F8F9, 0xFFF5F5F5, 0xFFF0F0F0, 0xFFEAEBEB, 0xFFE5E6E7, 0xFFE1E2E3, + 0xFFDDDEDF, 0xFFDADBDC, 0xFFD8D9DA, 0xFFD5D7D8, 0xFFD3D5D6, 0xFFD1D3D4, 0xFFCFD0D2, 0xFFCDCED0, 0xFFCBCDCE, + 0xFFC8CACC, 0xFFC6C8CA, 0xFFC3C6C8, 0xFFC1C4C5, 0xFFBFC2C4, 0xFFBCBFC1, 0xFFBABDBF, 0xFFB8BBBD, 0xFFB6B9BB, + 0xFFB4B7B9, 0xFFB2B5B7, 0xFFAFB3B5, 0xFFB1B4B7, 0x729EA1A5, 0x29B9EA2, 0x0, 0x0, 0xFE5B5F6D, 0xFF383C4E, + 0xFF393D4F, 0xFF393D4F, 0xFF393D4F, 0xFF393D4F, 0xFF383C4E, 0xFF393D4F, 0xFF3B3F50, 0xFF454957, 0xFF52545C, + 0xFF53565D, 0xFF55585E, 0xFF585B61, 0xFF5C5D62, 0xFF626367, 0xFF686A6E, 0xFF707276, 0xFF76787C, 0xFF7F8285, + 0xFFACAFB1, 0xFFF3F4F4, 0xFFFCFCFB, 0xFFFAFAFA, 0xFFF8F8F9, 0xFFF5F5F5, 0xFFF0F0F1, 0xFFEBECED, 0xFFE7E8E8, + 0xFFE2E3E3, 0xFFDDDEDF, 0xFFDADBDC, 0xFFD8D9DA, 0xFFD6D7D8, 0xFFD4D5D6, 0xFFD2D3D4, 0xFFD0D1D2, 0xFFCECFD0, + 0xFFCBCDCE, 0xFFC9CBCD, 0xFFC6C8CA, 0xFFC4C7C8, 0xFFC2C4C6, 0xFFBFC2C4, 0xFFBDC0C1, 0xFFBBBEC0, 0xFFB9BCBE, + 0xFFB7BABC, 0xFFB4B7B9, 0xFFB2B5B8, 0xFFB0B3B6, 0xFFAEB2B4, 0xFFACB0B2, 0xFFAAAEB0, 0xFFA8ABAE, 0xFFA9ADAF, + 0x739A9FA1, 0x2979C9E, 0x0, 0x0, 0xD4676B78, 0xFF373B4D, 0xFF393D4F, 0xFF393D4F, 0xFF393D4F, 0xFF383C4E, + 0xFF393D4F, 0xFF3D4051, 0xFF454A56, 0xFF54585A, 0xFF535556, 0xFF545759, 0xFF575A5B, 0xFF595C5E, 0xFF5C5F61, + 0xFF5E6163, 0xFF636668, 0xFF686B6E, 0xFF6E7173, 0xFF75797B, 0xFF7F8386, 0xFFB3B5B7, 0xFFF6F7F8, 0xFFEDEDEE, + 0xFFE7E8E9, 0xFFE3E4E5, 0xFFDFE0E1, 0xFFDBDCDD, 0xFFD8DBDC, 0xFFD7D8D9, 0xFFD4D5D7, 0xFFD3D3D6, 0xFFD0D1D3, + 0xFFCECFD1, 0xFFCCCDCF, 0xFFC9CBCD, 0xFFC7C9CB, 0xFFC5C7C9, 0xFFC2C5C7, 0xFFC0C2C4, 0xFFBDC0C2, 0xFFBBBEC0, + 0xFFB9BCBE, 0xFFB7BABC, 0xFFB4B8BA, 0xFFB3B6B8, 0xFFB1B4B6, 0xFFAEB2B4, 0xFFACAFB2, 0xFFAAAEB0, 0xFFA8ACAE, + 0xFFA6AAAC, 0xFFA3A8AA, 0xFFA2A6A9, 0xFFA0A4A6, 0xEB9A9FA1, 0x45969A9E, 0x195999D, 0x0, 0x0, 0x7A868993, + 0xFF3B3F51, 0xFF383C4E, 0xFF383C4E, 0xFF393D4F, 0xFF3A3E50, 0xFF3E4252, 0xFF444754, 0xFF53565D, 0xFF555858, + 0xFF56595B, 0xFF585B5D, 0xFF5A5D5F, 0xFF5C6061, 0xFF5E6264, 0xFF616466, 0xFF636668, 0xFF66696B, 0xFF686B6D, + 0xFF6C6F71, 0xFF6D7073, 0xFF848789, 0xFFC5C8C9, 0xFFE0E1E2, 0xFFDADBDC, 0xFFD8D9DA, 0xFFD5D7D8, 0xFFD3D5D6, + 0xFFD1D3D4, 0xFFCFD1D2, 0xFFCDCECF, 0xFFCACDCD, 0xFFC7CACB, 0xFFC5C7C9, 0xFFC3C5C7, 0xFFC0C3C4, 0xFFBEC1C2, + 0xFFBCBFC0, 0xFFBABDBF, 0xFFB8BBBD, 0xFFB5B8BA, 0xFFB3B6B9, 0xFFB1B4B7, 0xFFAFB2B4, 0xFFADB0B2, 0xFFAAAEB1, + 0xFFA8ACAF, 0xFFA6AAAD, 0xFFA4A8AA, 0xFFA2A6A9, 0xFFA0A4A7, 0xFF9FA3A6, 0xFF989C9F, 0xFF838789, 0xFF6D7072, + 0xAA6A6D70, 0x56B6E71, 0x0, 0x1000000, 0x0, 0x17C0C5C9, 0xEC5A5E6C, 0xFF373B4D, 0xFF393D4F, 0xFF3B3F50, 0xFF3F4353, + 0xFF454855, 0xFF4A4D57, 0xFF56595F, 0xFF575A5C, 0xFF595C5E, 0xFF5B5F61, 0xFF5D6062, 0xFF606365, 0xFF646769, + 0xFF666A6C, 0xFF686C6E, 0xFF6B6E71, 0xFF6F7274, 0xFF737678, 0xFF777A7D, 0xFF7B7E81, 0xFF9FA1A4, 0xFFD4D5D6, + 0xFFD1D3D4, 0xFFCFD1D2, 0xFFCCCED0, 0xFFCACCCE, 0xFFC9CBCC, 0xFFC6C8CA, 0xFFC2C5C7, 0xFFC1C4C6, 0xFFBEC1C3, + 0xFFBCBFC1, 0xFFBABDBF, 0xFFB7BABC, 0xFFB5B8BA, 0xFFB3B6B8, 0xFFB1B4B7, 0xFFAFB3B5, 0xFFADB0B2, 0xFFAAAEB1, + 0xFFA8ACAF, 0xFFA6AAAC, 0xFFA4A8AA, 0xFFA2A6A9, 0xFFA0A4A7, 0xFF9EA2A5, 0xFF9CA1A3, 0xFF9A9EA1, 0xFF8C9094, + 0xFF75787A, 0xFF686A6D, 0xFF6E6F72, 0xFF787B7E, 0xAE7C7E81, 0x75D5E60, 0x3000000, 0x3000000, 0x2000000, 0x90949C, + 0x718C9098, 0xFF3F4455, 0xFF3C3F50, 0xFF414453, 0xFF464956, 0xFF4B4E59, 0xFF50525A, 0xFF5B5D62, 0xFF5B5E60, + 0xFF5D6062, 0xFF505355, 0xFF1F1F20, 0xFF262727, 0xFF303131, 0xFF3A3C3D, 0xFF47494A, 0xFF545658, 0xFF616364, + 0xFF6E7171, 0xFF797C7E, 0xFF818487, 0xFF919496, 0xFFB8BABC, 0xFFCBCECF, 0xFFC6C8CA, 0xFFC3C6C8, 0xFFC1C4C6, + 0xFFC0C2C4, 0xFFBDC0C2, 0xFFBABDBF, 0xFFB8BBBD, 0xFFB6B9BB, 0xFFB4B7B9, 0xFFB2B5B7, 0xFFAFB3B5, 0xFFADB1B3, + 0xFFABAFB1, 0xFFA9ADAF, 0xFFA7ABAD, 0xFFA5A8AB, 0xFFA2A6A9, 0xFFA0A5A7, 0xFF9EA2A5, 0xFF9CA0A3, 0xFF9A9FA1, + 0xFF989DA0, 0xFF93979A, 0xFF7F8386, 0xFF6B6F71, 0xFF6A6C6F, 0xFF75777A, 0xFF7B7D80, 0xFF7A7C7F, 0xFF76787C, + 0x9776797D, 0x8404345, 0x5000000, 0x4000000, 0x3000000, 0xFFFFFF, 0xACFD0D3, 0xC970737F, 0xFF404452, 0xFF474A57, + 0xFF4C4F59, 0xFF51545C, 0xFF56595E, 0xFF5F6365, 0xFF5F6264, 0xFF616466, 0xFF505153, 0xFF151414, 0xFF1A1A1A, + 0xFF191919, 0xFF1A1A1A, 0xFF242424, 0xFF3A3B3F, 0xFF404248, 0xFF36373D, 0xFF34373F, 0xFF3D424C, 0xFF4C525E, + 0xFF81878E, 0xFFC3C5C6, 0xFFBEC0C2, 0xFFBBBEC0, 0xFFB9BCBE, 0xFFB6BABC, 0xFFB5B8BA, 0xFFB2B5B7, 0xFFAFB3B5, + 0xFFAEB1B3, 0xFFACAFB2, 0xFFA9ADB0, 0xFFA7ABAD, 0xFFA5A9AB, 0xFFA3A7A9, 0xFFA0A5A8, 0xFF9EA3A6, 0xFF9CA1A3, + 0xFF9A9FA2, 0xFF989DA0, 0xFF979C9F, 0xFF959A9D, 0xFF888C8F, 0xFF737578, 0xFF696B6E, 0xFF707376, 0xFF7A7C7F, + 0xFF7D7F82, 0xFF797B7E, 0xFF75777A, 0xFF717376, 0xFF707275, 0x5B777B7D, 0x7292A2B, 0x5000000, 0x4000000, 0x3000000, + 0x0, 0xBBBFC5, 0x34A8ACB2, 0xF95E616B, 0xFF4C4F58, 0xFF52555C, 0xFF585A5F, 0xFF5E6164, 0xFF66696C, 0xFF636769, + 0xFF65686B, 0xFF525556, 0xFF151515, 0xFF1A1A1A, 0xFF202020, 0xFF4E5057, 0xFF878D9F, 0xFF878DA2, 0xFF81879C, + 0xFF7D8298, 0xFF676C7E, 0xFF4A5060, 0xFF404A5F, 0xFF5D6576, 0xFFA2A6AB, 0xFFB8BBBD, 0xFFB2B5B8, 0xFFB0B4B6, + 0xFFADB3B4, 0xFFABB0B2, 0xFFAAADAF, 0xFFA8ABAD, 0xFFA5A9AB, 0xFFA3A7AA, 0xFFA0A5A8, 0xFF9EA3A5, 0xFF9CA1A4, + 0xFF9A9FA2, 0xFF989DA0, 0xFF979B9E, 0xFF959A9D, 0xFF959A9D, 0xFF8F9497, 0xFF7D8183, 0xFF6C6E71, 0xFF6C6E71, + 0xFF787A7D, 0xFF7E8083, 0xFF7C7E82, 0xFF777A7D, 0xFF747679, 0xFF707275, 0xFF6D6F72, 0xFF6F7174, 0xD3787B7E, + 0x146F7076, 0x5000000, 0x5000000, 0x4000000, 0x3000000, 0x0, 0x0, 0x29A9DA3, 0x7C91949A, 0xFF595C62, 0xFF595B60, + 0xFF606266, 0xFF686B6E, 0xFF6C7072, 0xFF686B6D, 0xFF696D6F, 0xFF56585A, 0xFF161515, 0xFF20201F, 0xFF4E5058, + 0xFF858AA1, 0xFF474F63, 0xFF343F51, 0xFF364153, 0xFF40495E, 0xFF616880, 0xFF696D84, 0xFF555C6C, 0xFF647082, + 0xFF8C949F, 0xFFAFB3B4, 0xFFABAFB1, 0xFFA9ADAF, 0xFFA7ABAD, 0xFFA5A9AB, 0xFFA2A6A8, 0xFFA1A4A6, 0xFF9EA2A4, + 0xFF9BA0A3, 0xFF999EA1, 0xFF979C9E, 0xFF959A9D, 0xFF94999C, 0xFF959A9D, 0xFF93989B, 0xFF868B8E, 0xFF737679, + 0xFF6A6C6F, 0xFF737678, 0xFF7E8083, 0xFF808285, 0xFF7C7E81, 0xFF777A7D, 0xFF747679, 0xFF6F7174, 0xFF6C6E71, + 0xFF6F7174, 0xFF797B7E, 0xE3808385, 0x2C797C7E, 0x70E0F0F, 0x6000000, 0x4000000, 0x4000000, 0x2000000, 0x0, 0x0, + 0x0, 0xBBCBEC0, 0xBF878B8E, 0xFF616468, 0xFF6A6C70, 0xFF727478, 0xFF737779, 0xFF6B6F71, 0xFF6D7173, 0xFF5A5C5E, + 0xFF181817, 0xFF39393D, 0xFF8D93AA, 0xFF49546A, 0xFF475568, 0xFF4A576B, 0xFF445365, 0xFF425063, 0xFF3A455B, + 0xFF4C536D, 0xFF5E637A, 0xFF656C7F, 0xFF858D9E, 0xFFA1A5A8, 0xFFA3A7A9, 0xFFA0A5A7, 0xFF9EA3A5, 0xFF9BA0A3, + 0xFF999DA0, 0xFF979C9E, 0xFF959A9D, 0xFF94999C, 0xFF93989B, 0xFF94999C, 0xFF959A9D, 0xFF8E9395, 0xFF7B7F82, + 0xFF6C6E71, 0xFF6F7174, 0xFF7B7D80, 0xFF818386, 0xFF808285, 0xFF7C7E81, 0xFF78797C, 0xFF737578, 0xFF6F7174, + 0xFF6C6E71, 0xFF6F7174, 0xFF7A7C7F, 0xF7828387, 0x997E8185, 0x226C7072, 0x9090A0A, 0x8000000, 0x6000000, 0x5000000, + 0x4000000, 0x2000000, 0x0, 0x0, 0x0, 0xB4B7BC, 0x249B9EA2, 0xEB84878A, 0xFF727578, 0xFF7C7E81, 0xFF7A7D80, + 0xFF75797B, 0xFF858A8D, 0xFF737779, 0xFF222122, 0xFF54565F, 0xFF7C86A0, 0xFF39485A, 0xFF435164, 0xFF314152, + 0xFF2A394B, 0xFF495667, 0xFF7A8490, 0xFF3D485E, 0xFF444963, 0xFF464761, 0xFF6E6B80, 0xFFA1A4A8, 0xFF9A9EA1, + 0xFF989D9F, 0xFF959B9D, 0xFF949A9D, 0xFF94999C, 0xFF93989B, 0xFF93989B, 0xFF94999C, 0xFF93989B, 0xFF858A8D, + 0xFF727477, 0xFF6B6D70, 0xFF76787B, 0xFF818487, 0xFF828588, 0xFF808285, 0xFF7B7D81, 0xFF77797D, 0xFF737578, + 0xFF6E7073, 0xFF6C6E71, 0xFF707275, 0xFF7B7D80, 0xFA838588, 0xAA7E8184, 0x326A6D71, 0xC111112, 0xC000000, + 0xB000000, 0x9000000, 0x7000000, 0x6000000, 0x4000000, 0x2000000, 0x0, 0x0, 0x0, 0x0, 0x72C2E2E, 0x587D8182, + 0xFA8C8F92, 0xFF86888C, 0xFF8C9093, 0xFF94999C, 0xFF969B9E, 0xFF777B7C, 0xFF242425, 0xFF5D616D, 0xFF5C677F, + 0xFF475668, 0xFF3A475B, 0xFF2B3B4C, 0xFF1F2D41, 0xFF4C5268, 0xFF8F96A4, 0xFF485669, 0xFF2B354E, 0xFF3A3A56, + 0xFF6B6375, 0xFFA6A8AD, 0xFF949A9D, 0xFF93989B, 0xFF94999C, 0xFF93989B, 0xFF94999C, 0xFF94999C, 0xFF8C9194, + 0xFF797D80, 0xFF6C6E71, 0xFF717376, 0xFF7F8083, 0xFF85868A, 0xFF838689, 0xFF7F8184, 0xFF7A7C80, 0xFF76787C, + 0xFF727578, 0xFF6E7073, 0xFF6C6E71, 0xFF717376, 0xFF7B7D80, 0xFF838587, 0xB77E8184, 0x45606465, 0x14101111, + 0x13000000, 0x11000000, 0xF000000, 0xD000000, 0xA000000, 0x8000000, 0x7000000, 0x4000000, 0x2000000, 0x0, 0x0, 0x0, + 0x0, 0x3000000, 0x19191919, 0x6D7F8283, 0xC295999B, 0xE6979C9E, 0xFF979C9F, 0xFF989C9F, 0xFF797C7E, 0xFF232425, + 0xFF595D6B, 0xFF687288, 0xFF7C8996, 0xFF606D7C, 0xFF2C3B4D, 0xFF182C3A, 0xFF37465A, 0xFF323E56, 0xFF455568, + 0xFF2F3B54, 0xFF3E405D, 0xFF6D687A, 0xFFAEB0B5, 0xFF9CA0A3, 0xFF92989B, 0xFF949A9D, 0xFF929699, 0xFF83878A, + 0xFF707376, 0xFF6D6E71, 0xFF787A7D, 0xFF848689, 0xFF86888C, 0xFF828488, 0xFF7E8083, 0xFF7A7D80, 0xFF76797C, + 0xFF727477, 0xFF6D6F72, 0xFF6C6E71, 0xFF727477, 0xFF7C7E80, 0xFF85868A, 0xBC7C7E81, 0xD0818385, 0x5C6C6D6F, + 0x20121212, 0x1A000000, 0x16000000, 0x14000000, 0x11000000, 0xF000000, 0xC000000, 0xA000000, 0x7000000, 0x5000000, + 0x3000000, 0x0, 0x0, 0x0, 0x0, 0x0, 0xA000000, 0x1E000000, 0x2E1C1D1E, 0x9F828588, 0xFF9DA1A4, 0xFF9A9EA1, + 0xFF7B7E80, 0xFF242424, 0xFF63656D, 0xFF8E95AA, 0xFF9CA9B5, 0xFF95A2AC, 0xFF687583, 0xFF14283A, 0xFF061D2C, + 0xFF2C3F53, 0xFF4D5E73, 0xFF323F5A, 0xFF444868, 0xFF6E6C7F, 0xFFB7B8BC, 0xFFA7ABAD, 0xFF8A8F92, 0xFF787B7E, + 0xFF6B6E70, 0xFF737578, 0xFF828487, 0xFF898B8E, 0xFF87898C, 0xFF828487, 0xFF7E8082, 0xFF797B7F, 0xFF75777B, + 0xFF717477, 0xFF6D7073, 0xFF6D6E71, 0xFF737577, 0xFF7D7F82, 0xFF858689, 0xD17E8083, 0x675C6062, 0x23000000, + 0x78666769, 0x7A6B6C6E, 0x28242525, 0x1C000000, 0x1A000000, 0x18000000, 0x15000000, 0x12000000, 0x10000000, + 0xC000000, 0x9000000, 0x5000000, 0x2000000, 0x0, 0x0, 0x0, 0x0, 0x0, 0x2000000, 0x10000000, 0x29212223, 0x9F868A8C, + 0xFF9EA3A6, 0xFF9CA0A3, 0xFF7E8083, 0xFF272726, 0xFF4E4E53, 0xFF7A819A, 0xFF808D9F, 0xFF9AACB8, 0xFF7C8A98, + 0xFF48576A, 0xFF1B2D44, 0xFF43556B, 0xFF5C6E85, 0xFF303C5A, 0xFF4A5071, 0xFF6E7084, 0xFFBCBEC2, 0xFFC1C3C5, + 0xFF9A9C9F, 0xFF787A7D, 0xFF87898C, 0xFF898B8F, 0xFF86888B, 0xFF818386, 0xFF7D7F82, 0xFF797B7F, 0xFF75777B, + 0xFF717376, 0xFF6D6F72, 0xFF6D6F71, 0xFF747578, 0xFF7E7F82, 0xFF858689, 0xD97F8284, 0x765E6163, 0x35141515, + 0x2C000000, 0x23000000, 0xBD727275, 0x52525354, 0x23040404, 0x20000000, 0x1E000000, 0x1C000000, 0x1A000000, + 0x17000000, 0x13000000, 0xD000000, 0x6000000, 0x2000000, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x3000000, 0x1A353637, + 0x9B8A8E90, 0xFFA0A4A7, 0xFF9EA2A5, 0xFF7F8183, 0xFF1D1D1D, 0xFF2D2E30, 0xFF4F5466, 0xFF5E6A86, 0xFF95A7B7, + 0xFF8A9DAB, 0xFF637386, 0xFF495C75, 0xFF60758B, 0xFF3C4D67, 0xFF474F72, 0xFF525C79, 0xFF798593, 0xFFC0C3C6, + 0xFFC7C8CB, 0xFFAAADAF, 0xFF86898C, 0xFF85888B, 0xFF808386, 0xFF7C7E81, 0xFF787A7D, 0xFF74767A, 0xFF707276, + 0xFF6D6E71, 0xFF6E6F72, 0xFF757679, 0xFF7F8082, 0xFF848588, 0xE37F8285, 0x8365686A, 0x3C1C1C1D, 0x30000000, + 0x31000000, 0x23000000, 0x8F666767, 0x93666869, 0x33242425, 0x24000000, 0x26000000, 0x24000000, 0x23000000, + 0x1F000000, 0x18000000, 0xD000000, 0x5000000, 0x1000000, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0xC6B6F71, + 0x94919598, 0xFFA3A6A9, 0xFFA1A4A7, 0xFF818285, 0xFF1D1D1D, 0xFF252524, 0xFF2E2E33, 0xFF404664, 0xFF455171, + 0xFF798AA1, 0xFF879BAE, 0xFF5F758C, 0xFF374864, 0xFF434C71, 0xFF5C6686, 0xFF627485, 0xFF899AA3, 0xFFC0C2C5, + 0xFFCACCCE, 0xFFA9AAAD, 0xFF7E8083, 0xFF7C7E81, 0xFF787A7D, 0xFF747679, 0xFF707275, 0xFF6C6F72, 0xFF6E6F72, + 0xFF76777A, 0xFF808183, 0xFF848588, 0xFF828587, 0xEA878A8B, 0x5C5A5B5B, 0x2D000000, 0x33000000, 0x33000000, + 0x27000000, 0x7C5E5F60, 0xB36C6D70, 0x41333334, 0x2B000000, 0x2C000000, 0x2C000000, 0x29000000, 0x24000000, + 0x17000000, 0x9000000, 0x2000000, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x992969A, 0x8E979B9F, + 0xFFA5A8AB, 0xFFA3A6A9, 0xFF85888A, 0xFF1C1C1C, 0xFF222222, 0xFF242424, 0xFF2D2E33, 0xFF3D435E, 0xFF414A71, + 0xFF424C71, 0xFF444E73, 0xFF535D84, 0xFF575F7F, 0xFF434955, 0xFF282B2C, 0xFF575758, 0xFFC5C6C8, 0xFFCED0D2, + 0xFFA7A9AC, 0xFF76787B, 0xFF747679, 0xFF6F7174, 0xFF6C6E71, 0xFF6F7174, 0xFF77787B, 0xFF808184, 0xFF848689, + 0xFF818386, 0xFF737576, 0xFF696969, 0xD2707171, 0x51454545, 0x2E000000, 0x33000000, 0x29000000, 0x7E5E6062, + 0xBC6D6F71, 0x4A38393A, 0x30000000, 0x32000000, 0x31000000, 0x2C000000, 0x20000000, 0xE000000, 0x4000000, 0x0, 0x0, + 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x593979B, 0x6A9B9FA3, 0xFFA7ABAE, 0xFFA6A9AC, 0xFFA5A8AA, + 0xFF838587, 0xFF646567, 0xFF4A4B4C, 0xFF363636, 0xFF2C2C2D, 0xFF32353E, 0xFF3F4458, 0xFF464C62, 0xFF404452, + 0xFF2F2F31, 0xFF232322, 0xFF1E1E1E, 0xFF5A5A5B, 0xFFC7C8CA, 0xFFD1D3D5, 0xFFA6A8AA, 0xFF6D6F73, 0xFF6C6E71, + 0xFF6F7174, 0xFF78797C, 0xFF808284, 0xFF848688, 0xFF828487, 0xFF777A7A, 0xFF6A6B6B, 0xFF646464, 0xFF676767, + 0xAE696969, 0x44313131, 0x30000000, 0x28000000, 0x8C696A6C, 0xB26F7272, 0x49363737, 0x33000000, 0x36000000, + 0x31000000, 0x24000000, 0x12000000, 0x6000000, 0x1000000, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, + 0x0, 0x0, 0x0, 0x0, 0x1F9B9FA1, 0xE2A3A6A9, 0xFFAAADB0, 0xFFAAADB0, 0xFFADB0B3, 0xFFB1B4B7, 0xFFB4B6B9, 0xFFB1B3B6, + 0xFFA8A9AC, 0xFF969899, 0xFF7C7D7E, 0xFF5E5E5E, 0xFF444343, 0xFF2F2F2F, 0xFF242424, 0xFF1A1A1A, 0xFF5A5B5B, + 0xFFCBCDCE, 0xFFD5D6D7, 0xFFA6A8AA, 0xFF6E7073, 0xFF797A7D, 0xFF828386, 0xFF848588, 0xFF838487, 0xFF7B7C7E, + 0xFF6F7070, 0xFF696969, 0xFF696969, 0xFF686868, 0xFF6E6E6E, 0x86646464, 0x34121212, 0x27000000, 0x8B6C6D6F, + 0xAC737476, 0x47363637, 0x31000000, 0x32000000, 0x26000000, 0x14000000, 0x6000000, 0x1000000, 0x0, 0x0, 0x0, 0x0, + 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x1868E93, 0x319BA0A4, 0xC7A5A9AC, 0xF8AAADB0, + 0xFFAFB2B5, 0xFFB4B6B9, 0xFFB5B7BA, 0xFFB6B8BA, 0xFFB8BABC, 0xFFBBBDBF, 0xFFBFC1C3, 0xFFC3C4C8, 0xFFC3C5C8, + 0xFFBFC1C3, 0xFFB0B1B3, 0xFF999A9C, 0xFFABACAE, 0xFFD3D5D6, 0xFFD5D6D8, 0xFFADAFB1, 0xFF7F8083, 0xFF848487, + 0xFF838588, 0xFF7D8082, 0xFF747576, 0xFF6D6D6D, 0xFF747475, 0xFF868788, 0xFF787879, 0xFF696969, 0xEE757575, + 0x61535353, 0x22000000, 0x78666869, 0xAD77797A, 0x47363637, 0x605E6164, 0x70797D80, 0x48878C8E, 0x22989A9D, + 0xC9B9BA4, 0x2778D7C, 0x3F7B38, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, + 0x0, 0x0, 0x0, 0x26F6D70, 0x1E747678, 0x507E8384, 0x818F9395, 0xB3A3A5A9, 0xD6B0B3B6, 0xF4B6B8BB, 0xFFBDBFC2, + 0xFFC4C5C7, 0xFFC5C6C9, 0xFFC6C8CB, 0xFFC8CACC, 0xFFCBCDCE, 0xFFCED0D1, 0xFFD1D2D4, 0xFFD3D4D6, 0xFFD6D7D8, + 0xFFAEB0B2, 0xFF808185, 0xFF7C7D7F, 0xFF828384, 0xFF888788, 0xFF7F7E7E, 0xFF747474, 0xFF888889, 0xFF9C9E9E, + 0xFF818383, 0xFF727272, 0xAD707070, 0x3E2A2A2A, 0x4E48484A, 0xB7808183, 0x574D4D4F, 0x3C333536, 0xDAB6B9BC, + 0xFFC5C7C9, 0xFFC1C3C5, 0xFBBABDBF, 0xEDB6B9BB, 0xD5B4B8BA, 0xBAAFB3B6, 0x9CAAAEAF, 0x78A5A8AA, 0x569FA2A4, + 0x3C999CA1, 0x1994959A, 0x13F3F41, 0x1000000, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, + 0x3000000, 0xF000000, 0x19000000, 0x16000000, 0x11000000, 0x190F0F10, 0x2E525457, 0x517F8385, 0x8294989B, + 0xB4A7AAAD, 0xD8B8BBBD, 0xF5C3C5C7, 0xFFCCCED0, 0xFFD4D5D7, 0xFFD6D7D8, 0xFFDADBDD, 0xFCCBCDCF, 0xCD969A9C, + 0xCA747677, 0xFF727373, 0xFF767575, 0xFF959595, 0xFF9E9E9E, 0xFF939393, 0xFF8C8D8D, 0xFF7F8082, 0xFF79797A, + 0xFF808181, 0x7A626263, 0x2A000000, 0xB386878A, 0x7168696C, 0x2D000000, 0x3D575A5B, 0xDBC2C4C7, 0xFF949597, + 0xFFB5B6B8, 0xFFD3D4D5, 0xFFDADBDC, 0xFFDCDDDF, 0xFFD5D6D8, 0xFFCDCFD0, 0xFFC7C9CB, 0xFFC1C4C5, 0xFFB2B5B8, + 0xEBA0A3A6, 0x25646369, 0x9030303, 0x3000000, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x3000000, + 0x10000000, 0x1D000000, 0x1C000000, 0x1B000000, 0x1B000000, 0x1C000000, 0x1D000000, 0x1C000000, 0x1A000000, + 0x220C0C0D, 0x36444547, 0x5A747778, 0x8A919396, 0xB9AAACAF, 0xC3B0B3B4, 0x7E848889, 0x33020405, 0x402E2E2E, + 0x97727272, 0xE5797979, 0xFA868787, 0xFFA6A7A8, 0xFFB1B1B2, 0xFFA9A9AA, 0xFFA2A2A3, 0xFF939394, 0xFF828484, + 0x70575A59, 0x75717274, 0x937E7F80, 0x4739393A, 0x23000000, 0x326C7072, 0xD9BDC0C3, 0xFF757577, 0xFF8D8F90, + 0xFFC9CACC, 0xFFB9BABB, 0xFF88898B, 0xFF919293, 0xFFD4D5D6, 0xFFC9CACC, 0xFF919394, 0xFFC2C4C6, 0xFEABAEB1, + 0x583E3F41, 0x1F020202, 0x5000000, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x1000000, 0x9000000, + 0x19000000, 0x1E000000, 0x20000000, 0x1F000000, 0x20000000, 0x21000000, 0x23000000, 0x24000000, 0x26000000, + 0x28000000, 0x2A000000, 0x2A000000, 0x2A000000, 0x2E000000, 0x32000000, 0x36000000, 0x38000000, 0x37000000, + 0x37040505, 0xA5737577, 0xFF969899, 0xFFABABAC, 0xFFA8A8A9, 0xFF818182, 0xFF69696A, 0xFF7F8081, 0x74606263, + 0xAC8C8D8F, 0x6A696A6C, 0x2D000000, 0x17000000, 0x2A7F8388, 0xD8B5B7BA, 0xFFB5B7BA, 0xFFB8BABC, 0xFF868789, + 0xFF838486, 0xFFB5B6B8, 0xFFD2D4D5, 0xFFDDDEE0, 0xFFB8B9BA, 0xFF636465, 0xFFB1B2B4, 0xFFAFB1B4, 0x66343537, + 0x31010101, 0x7000000, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x1000000, 0x7000000, 0xE000000, + 0x12000000, 0x15000000, 0x1A000000, 0x1E000000, 0x22000000, 0x26000000, 0x29000000, 0x2C000000, 0x2F000000, + 0x31000000, 0x33000000, 0x35000000, 0x37000000, 0x38000000, 0x3B000000, 0x3B000000, 0x37000000, 0xA37F8184, + 0xFFAAACAE, 0xFFBFBFC1, 0xFFADAEB1, 0xFF78797A, 0xFF6E6E6F, 0xFF8F9192, 0x9C838587, 0x98858788, 0x52535454, + 0x21000000, 0x9000000, 0x29858A8A, 0xD9B3B5B8, 0xFFB1B3B6, 0xFF818284, 0xFFA0A1A4, 0xFFBCBFC1, 0xFFC3C5C7, + 0xFFC9CACC, 0xFFD2D3D5, 0xFFDBDCDD, 0xFFC0C1C3, 0xFFD2D4D5, 0xFFB1B4B6, 0x69333434, 0x37010101, 0xA000000, 0x0, + 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x1000000, 0x2000000, 0x3000000, 0x5000000, + 0x7000000, 0xB000000, 0xF000000, 0x15000000, 0x1B000000, 0x21000000, 0x27000000, 0x2D000000, 0x32000000, + 0x36000000, 0x3A000000, 0x39000000, 0x30000000, 0x24000000, 0x9A94969A, 0xFFBCBEC1, 0xFFD4D5D7, 0xFFC1C2C4, + 0xFF858687, 0xFF7A797B, 0xFD9D9FA1, 0xBE9A9C9D, 0x857C7E80, 0x40363839, 0x15000000, 0x7000000, 0x35686C6E, + 0xDCBBBEC0, 0xFF8F9294, 0xFF97999B, 0xFFB1B4B7, 0xFFCACBCD, 0xFFCFD0D2, 0xFFCED0D2, 0xFFAFB2B4, 0xFF939698, + 0xFFD6D8D9, 0xFFDBDCDC, 0xFFB3B6B8, 0x69323333, 0x34010101, 0x9000000, 0x1000000, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, + 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x1000000, 0x1000000, 0x2000000, 0x5000000, + 0x8000000, 0xB000000, 0x11000000, 0x17000000, 0x1B000000, 0x17000000, 0xC000000, 0x1000000, 0x8BA6A9AC, 0xFFBEC0C3, + 0xFFD6D7D9, 0xFFC2C3C6, 0xFF868688, 0xFF7B7A7C, 0xFD9EA0A2, 0xC19B9E9F, 0x877E7F80, 0x3D3A3B3A, 0x14000000, + 0x10000000, 0x38797C7E, 0xDBA3A6A9, 0xFF959799, 0xFFABADB0, 0xFFBEBFC2, 0xFFCED0D2, 0xFFBBBEC0, 0xFF828487, + 0xFF616266, 0xFF6F7274, 0xFFB8B9BB, 0xFFDDDEDF, 0xFFB6B8BA, 0x69303233, 0x2F010101, 0x6000000, 0x0, 0x0, 0x0, 0x0, + 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, + 0x1000000, 0x1000000, 0x1000000, 0x0, 0x0, 0x89A9ACAF, 0xFFBEBFC3, 0xFFD6D7D9, 0xFFC2C3C6, 0xFF868688, 0xFF7B7A7B, + 0xFFA0A1A3, 0x9A898B8C, 0xA8919394, 0x4C6E7070, 0x1C000000, 0x6C8D9193, 0xD4AFB2B5, 0xFC959799, 0xFFA7A9AC, + 0xFFB2B4B7, 0xFFAAACAF, 0xFF808486, 0xFF636568, 0xFF67696C, 0xFF717174, 0xFF7E8083, 0xFFA2A5A7, 0xFFC9C9CB, + 0xFFB4B7B9, 0x68313334, 0x2A010101, 0x5000000, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, + 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x89A9ACAF, + 0xFFBEBFC3, 0xFFD6D7D9, 0xFFC2C3C6, 0xFF868688, 0xFF7B7A7B, 0xFFA1A2A4, 0x77737476, 0x93828486, 0xB6999C9D, + 0xDBB8BBBD, 0xFBC5C7C9, 0xFFA4A6A9, 0xFFA9ABAD, 0xFFA3A5A7, 0xFF7D7F82, 0xFF65676A, 0xFF6A6C6E, 0xFF737577, + 0xFF7B7D80, 0xFF838588, 0xFF888B8D, 0xFFA2A4A5, 0xFFADAFB0, 0xFFACAEB1, 0x65333434, 0x26010101, 0x3000000, 0x0, + 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, + 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x89A9ACAF, 0xFFBEBFC3, 0xFFD6D7D9, 0xFFC2C3C6, 0xFF868688, 0xFF7B7A7C, + 0xFF9EA0A2, 0xBE949799, 0xD6B8B9BB, 0xFCCBCDCE, 0xFFBBBCBD, 0xFFAFB1B3, 0xFFA4A6A9, 0xFF808286, 0xFF6A6C6E, + 0xFF6E7073, 0xFF787A7D, 0xFF828487, 0xFF898B8E, 0xFF8C8E91, 0xFF87898C, 0xFF8D8F92, 0xFFA1A3A4, 0xFFA8AAAC, + 0xFFA5A8AB, 0x63323435, 0x20010101, 0x2000000, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, + 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0xD6F7C7C, 0x9BA6AAAC, + 0xFFBEC0C2, 0xFFD6D7D9, 0xFFC2C3C6, 0xFF868688, 0xFF7A7A7C, 0xFF9B9D9E, 0xFFB7B9BA, 0xFFD0D1D3, 0xFFDCDDDE, + 0xFFBEC1C2, 0xFF898C8E, 0xFF6F7173, 0xFF747578, 0xFF7E8083, 0xFF888A8D, 0xFF8D9092, 0xFF8D8F92, 0xFF888A8D, + 0xFF878A8C, 0xFF8E9193, 0xFF979A9C, 0xFF9FA1A3, 0xFFA6A8AA, 0xFFA2A4A7, 0x60343537, 0x1A020202, 0x1000000, 0x0, + 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, + 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x3DB6BABB, 0xCBCDCFD0, 0xFFBDC0C2, 0xFFBBBDC0, 0xFFD8D9DA, 0xFFC4C5C7, 0xFF868687, + 0xFF7A7A7B, 0xFF9D9EA0, 0xFF7D7F81, 0xFF808385, 0xFF86898B, 0xFF757779, 0xFF76797B, 0xFF808284, 0xFF86898B, + 0xFF8A8C8F, 0xFF878A8D, 0xFF86898B, 0xFFA3A6A8, 0xFFA4A5A8, 0xFF929496, 0xFF939597, 0xFF97999B, 0xFF9D9FA1, + 0xFFA4A6A8, 0xFFA0A3A5, 0x5C36383A, 0x16020202, 0x1000000, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, + 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x6FAEB0B5, + 0xFCC7C8CA, 0xFFD5D6D7, 0xFFC4C6C8, 0xFFB5B7B9, 0xFFA7A9AB, 0xFF8D8F91, 0xFF848689, 0xFF808284, 0xFF707275, + 0xFF7A7C80, 0xFF7D8082, 0xFF7C7F81, 0xFF818386, 0xFF838689, 0xFF808386, 0xFF838689, 0xFFA1A5A6, 0xFFCECFD0, + 0xFFDBDCDD, 0xFFD4D6D7, 0xFFBBBDBF, 0xFF9B9D9F, 0xFF999B9D, 0xFF9C9EA0, 0xFFA2A4A6, 0xFF9CA0A2, 0x57393C3C, + 0x12030303, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, + 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x79A8AAAD, 0xFFB2B4B7, 0xFFBEC0C2, 0xFFC4C6C7, 0xFFC0C2C4, + 0xFFB2B4B7, 0xFF9FA2A4, 0xFF888B8D, 0xFF7F8182, 0xFF898B8D, 0xFFA9ABAC, 0xFF919497, 0xFF7D8083, 0xFF7C7F82, + 0xF8787B7E, 0xFDA0A3A5, 0xFF7B7D7E, 0xFFA9AAAB, 0xFFD4D5D6, 0xFFDBDCDE, 0xFFDADBDC, 0xFFD5D6D8, 0xFFC8CACB, + 0xFFA9ABAD, 0xFF9FA1A3, 0xFFA3A5A6, 0xFF9B9EA1, 0x513D4041, 0xD040404, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, + 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, + 0x85A7A9AC, 0xFFB5B7BA, 0xFFC8CACB, 0xFFD6D7D8, 0xFFD5D6D8, 0xFFBEC0C3, 0xFF989A9C, 0xFF727373, 0xFF757575, + 0xFF8C8D8E, 0xFFADAFB1, 0xC78B8E91, 0xBF6B6E71, 0xA45E6164, 0x7254595B, 0xE1CDCED0, 0xFF949495, 0xFF979898, + 0xFFCECFD1, 0xFFD8D9DB, 0xFFDADBDC, 0xFFDBDCDD, 0xFFD4D5D7, 0xFFCFD0D1, 0xFFB9BBBD, 0xFFA8AAAC, 0xFF9C9FA1, + 0x4C424546, 0xA050606, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, + 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x5465C57, 0x91A5A8AB, 0xFFB5B7B9, 0xFFC9CACB, + 0xFFD6D7D8, 0xFFD5D6D8, 0xFFBFC1C3, 0xFF999A9D, 0xFF737474, 0xFF757577, 0xFF8C8C8E, 0xFFAEB0B1, 0xA6919394, + 0x3C2A2A2C, 0x22000000, 0x1E000000, 0x7FA5A7A9, 0xCEBEC0C2, 0xF8C9CBCD, 0xFFD4D5D7, 0xFFD6D7D9, 0xFFD7D8DA, + 0xFFDADBDC, 0xFFDCDDDF, 0xFFC5C6C8, 0xFF626363, 0xFFADAFB1, 0xFFA0A4A6, 0x47464A4B, 0x8070707, 0x0, 0x0, 0x0, 0x0, + 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, + 0x0, 0x0, 0x0, 0x0, 0x6E9DA0A3, 0xF5B4B6B9, 0xFFCBCDCE, 0xFFD7D8D9, 0xFFD5D6D8, 0xFFBFC1C3, 0xFF999A9D, 0xFF737374, + 0xFF757576, 0xFF8F9092, 0xFFA5A7AA, 0x867A7C7F, 0x25101011, 0x8000000, 0x2000000, 0x0, 0x3303835, 0x238E979B, + 0x60A3A6A8, 0xA6B6BABB, 0xE3C6C8C9, 0xFDD4D5D6, 0xFFDEDFE0, 0xFFD4D5D6, 0xFF818182, 0xFFB2B3B5, 0xFFABAEB1, + 0x3E505456, 0x6080909, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, + 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x4000000, 0x40707475, 0x99989C9D, 0xCEB9BCBD, + 0xE6C4C6C8, 0xF1B5B8BB, 0xF196999B, 0xE87A7B7D, 0xD17A7C7D, 0xA2797B7D, 0x55525456, 0x230D0E0E, 0xB000000, + 0x1000000, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x75B6E6C, 0x33999B9F, 0x76ACAFB2, 0xBAC6C9CB, 0xEDD0D2D3, 0xFED9DADC, + 0xF7B4B7B9, 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0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, + 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, + 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, +]; From 94cf606892fe01e377a5b38965d02f5cb9ba8d55 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Jo=C3=ABl=20Schulz-Ansres?= Date: Tue, 14 May 2024 12:16:43 +0200 Subject: [PATCH 306/581] Improve write_cmd parameters --- embassy-stm32/src/dsihost.rs | 49 +++++++++++++++++++++++++----------- 1 file changed, 34 insertions(+), 15 deletions(-) diff --git a/embassy-stm32/src/dsihost.rs b/embassy-stm32/src/dsihost.rs index 110c28b92..787677082 100644 --- a/embassy-stm32/src/dsihost.rs +++ b/embassy-stm32/src/dsihost.rs @@ -123,7 +123,7 @@ impl<'d, T: Instance> DsiHost<'d, T> { } /// DCS or Generic short/long write command - pub fn write_cmd(&mut self, channel_id: u8, params: &[u8]) { + pub fn write_cmd(&mut self, channel_id: u8, params: &[u8]) -> Result<(), Error> { if params.len() <= 2 { self.short_write(channel_id, PacketType::DcsShortPktWriteP1, params[0], params[1]) } else { @@ -135,18 +135,26 @@ impl<'d, T: Instance> DsiHost<'d, T> { } } - fn short_write(&mut self, channel_id: u8, packet_type: PacketType, param1: u8, param2: u8) { + fn short_write(&mut self, channel_id: u8, packet_type: PacketType, param1: u8, param2: u8) -> Result<(), Error> { #[cfg(feature = "defmt")] defmt::debug!("short_write: BEGIN wait for command fifo empty"); // Wait for Command FIFO empty - self.wait_command_fifo_empty().unwrap(); + self.wait_command_fifo_empty()?; #[cfg(feature = "defmt")] defmt::debug!("short_write: END wait for command fifo empty"); // Configure the packet to send a short DCS command with 0 or 1 parameters // Update the DSI packet header with new information self.config_packet_header(channel_id, packet_type, param1, param2); + + self.wait_command_fifo_empty()?; + + let status = T::regs().isr1().read().0; + if status != 0 { + error!("ISR1 after short_write(): {:b}", status); + } + Ok(()) } fn config_packet_header(&mut self, channel_id: u8, packet_type: PacketType, param1: u8, param2: u8) { @@ -161,7 +169,7 @@ impl<'d, T: Instance> DsiHost<'d, T> { /// Write long DCS or long Generic command. /// /// `params` is expected to contain at least 3 elements. Use [`short_write`] for 2 or less. - fn long_write(&mut self, channel_id: u8, packet_type: PacketType, params: &[u8]) { + fn long_write(&mut self, channel_id: u8, packet_type: PacketType, params: &[u8]) -> Result<(), Error> { // Must be a long packet if we do the long write, obviously. assert!(matches!( packet_type, @@ -174,7 +182,7 @@ impl<'d, T: Instance> DsiHost<'d, T> { #[cfg(feature = "defmt")] defmt::debug!("long_write: BEGIN wait for command fifo empty"); - self.wait_command_fifo_empty().unwrap(); + self.wait_command_fifo_empty()?; #[cfg(feature = "defmt")] defmt::debug!("long_write: DONE wait for command fifo empty"); @@ -198,8 +206,7 @@ impl<'d, T: Instance> DsiHost<'d, T> { w.set_data1(dcs_code); }); - // FIXME: This probably should return an error - self.wait_command_fifo_empty().unwrap(); + self.wait_command_fifo_empty()?; // These steps are only necessary if more than 1x 4 bytes need to go into the FIFO if data.len() >= 4 { @@ -210,6 +217,7 @@ impl<'d, T: Instance> DsiHost<'d, T> { // Keep filling the buffer with remaining data for param in iter { + self.wait_command_fifo_not_full()?; T::regs().gpdr().write(|w| { w.set_data4(param[3]); w.set_data3(param[2]); @@ -222,6 +230,7 @@ impl<'d, T: Instance> DsiHost<'d, T> { // If the remaining data was not devisible by 4 we get a remainder if remainder.len() >= 1 { + self.wait_command_fifo_not_full()?; T::regs().gpdr().write(|w| { if let Some(x) = remainder.get(2) { w.set_data3(*x); @@ -235,12 +244,20 @@ impl<'d, T: Instance> DsiHost<'d, T> { } } // Configure the packet to send a long DCS command - T::regs().ghcr().write(|w| { - w.set_dt(packet_type.into()); - w.set_vcid(channel_id); - w.set_wclsb((params.len() & 0x00FF) as u8); - w.set_wcmsb((params.len() & 0xFF00 >> 8) as u8); - }); + self.config_packet_header( + channel_id, + packet_type, + (params.len() & 0x00FF) as u8, + ((params.len() & 0xFF00) >> 8) as u8, + ); + + self.wait_command_fifo_empty()?; + + let status = T::regs().isr1().read().0; + if status != 0 { + error!("ISR1 after long_write(): {:b}", status); + } + Ok(()) } /// Read DSI Register @@ -273,9 +290,11 @@ impl<'d, T: Instance> DsiHost<'d, T> { _ => return Err(Error::InvalidPacketType), } + self.wait_read_not_busy()?; + // Obtain chunks of 32-bit so the entire FIFO data register can be read for bytes in data.chunks_exact_mut(4) { - self.wait_payload_read_fifo_not_empty().unwrap(); + self.wait_payload_read_fifo_not_empty()?; // Only perform a single read on the entire register to avoid unintended side-effects let gpdr = T::regs().gpdr().read(); @@ -288,7 +307,7 @@ impl<'d, T: Instance> DsiHost<'d, T> { // Collect the remaining chunks and read the corresponding number of bytes from the FIFO let remainder = data.chunks_exact_mut(4).into_remainder(); if !remainder.is_empty() { - self.wait_payload_read_fifo_not_empty().unwrap(); + self.wait_payload_read_fifo_not_empty()?; // Only perform a single read on the entire register to avoid unintended side-effects let gpdr = T::regs().gpdr().read(); if let Some(x) = remainder.get_mut(0) { From 48719d742c02ae7f53432cb9cb3fdfb32200b685 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Jo=C3=ABl=20Schulz-Ansres?= Date: Tue, 14 May 2024 12:22:27 +0200 Subject: [PATCH 307/581] Add unwrap to write --- embassy-stm32/src/dsihost.rs | 30 +- examples/stm32f4/src/bin/dsi_bsp.rs | 1607 --------------------------- 2 files changed, 15 insertions(+), 1622 deletions(-) delete mode 100644 examples/stm32f4/src/bin/dsi_bsp.rs diff --git a/embassy-stm32/src/dsihost.rs b/embassy-stm32/src/dsihost.rs index 787677082..9bcdc34cc 100644 --- a/embassy-stm32/src/dsihost.rs +++ b/embassy-stm32/src/dsihost.rs @@ -123,14 +123,17 @@ impl<'d, T: Instance> DsiHost<'d, T> { } /// DCS or Generic short/long write command - pub fn write_cmd(&mut self, channel_id: u8, params: &[u8]) -> Result<(), Error> { - if params.len() <= 2 { - self.short_write(channel_id, PacketType::DcsShortPktWriteP1, params[0], params[1]) + pub fn write_cmd(&mut self, channel_id: u8, address: u8, data: &[u8]) -> Result<(), Error> { + assert!(data.len() > 0); + + if data.len() == 1 { + self.short_write(channel_id, PacketType::DcsShortPktWriteP1, address, data[0]) } else { self.long_write( channel_id, PacketType::DcsLongPktWrite, // FIXME: This might be a generic long packet, as well... - params, + address, + data, ) } } @@ -169,15 +172,15 @@ impl<'d, T: Instance> DsiHost<'d, T> { /// Write long DCS or long Generic command. /// /// `params` is expected to contain at least 3 elements. Use [`short_write`] for 2 or less. - fn long_write(&mut self, channel_id: u8, packet_type: PacketType, params: &[u8]) -> Result<(), Error> { + fn long_write(&mut self, channel_id: u8, packet_type: PacketType, address: u8, data: &[u8]) -> Result<(), Error> { // Must be a long packet if we do the long write, obviously. assert!(matches!( packet_type, PacketType::DcsLongPktWrite | PacketType::GenLongPktWrite )); - // params needs to have at least 3 elements, otherwise short_write should be used - assert!(params.len() >= 3); + // params needs to have at least 2 elements, otherwise short_write should be used + assert!(data.len() >= 2); #[cfg(feature = "defmt")] defmt::debug!("long_write: BEGIN wait for command fifo empty"); @@ -187,9 +190,6 @@ impl<'d, T: Instance> DsiHost<'d, T> { #[cfg(feature = "defmt")] defmt::debug!("long_write: DONE wait for command fifo empty"); - let dcs_code = params[params.len() - 1]; // FIXME: DCS Code stored in the last element. Should probably be a separate argument. - let data = ¶ms[0..params.len() - 1]; // data is all elements except for the dcs_code - // Note: CubeMX example "NbParams" is always one LESS than params.len() // DCS code (last element of params) must be on payload byte 1 and if we have only 2 more params, // then they must go into data2 and data3 @@ -203,7 +203,7 @@ impl<'d, T: Instance> DsiHost<'d, T> { w.set_data2(data[0]); // DCS Code - w.set_data1(dcs_code); + w.set_data1(address); }); self.wait_command_fifo_empty()?; @@ -247,8 +247,8 @@ impl<'d, T: Instance> DsiHost<'d, T> { self.config_packet_header( channel_id, packet_type, - (params.len() & 0x00FF) as u8, - ((params.len() & 0xFF00) >> 8) as u8, + ((data.len() + 1) & 0x00FF) as u8, // +1 to account for address byte + (((data.len() + 1) & 0xFF00) >> 8) as u8, // +1 to account for address byte ); self.wait_command_fifo_empty()?; @@ -277,8 +277,8 @@ impl<'d, T: Instance> DsiHost<'d, T> { channel_id, PacketType::MaxReturnPktSize, (read_size & 0xFF) as u8, - ((read_size >> 8) & 0xFF) as u8, - ); + ((read_size & 0xFF00) >> 8) as u8, + )?; // Set the packet header according to the packet_type use PacketType::*; diff --git a/examples/stm32f4/src/bin/dsi_bsp.rs b/examples/stm32f4/src/bin/dsi_bsp.rs deleted file mode 100644 index 0c54361d9..000000000 --- a/examples/stm32f4/src/bin/dsi_bsp.rs +++ /dev/null @@ -1,1607 +0,0 @@ -#![no_std] -#![no_main] - -use core::mem::size_of; -use defmt::*; -use embassy_executor::Spawner; -use embassy_stm32::{ - dsihost::{blocking_delay_ms, DsiHost, PacketType}, - gpio::{Level, Output, Speed}, - ltdc::Ltdc, - pac::{ - dsihost::regs::{Ier0, Ier1}, - ltdc::{ - regs::Dccr, - vals::{Bf1, Bf2, Depol, Hspol, Imr, Pcpol, Pf, Vspol}, - }, - DSIHOST, LTDC, - }, - rcc::{ - AHBPrescaler, APBPrescaler, Hse, HseMode, Pll, PllMul, PllPDiv, PllPreDiv, PllQDiv, PllRDiv, PllSource, Sysclk, - }, - time::mhz, -}; -use embassy_time::Timer; -use {defmt_rtt as _, panic_probe as _}; - -enum Orientation { - Landscape, - Portrait, -} - -const LCD_Orientation: Orientation = Orientation::Landscape; -const LCD_X_Size: u16 = 800; -const LCD_Y_Size: u16 = 480; - -#[embassy_executor::main] -async fn main(_spawner: Spawner) { - /* - SystemClock_Config() - */ - - let mut config = embassy_stm32::Config::default(); - config.rcc.sys = Sysclk::PLL1_P; - config.rcc.ahb_pre = AHBPrescaler::DIV1; - config.rcc.apb1_pre = APBPrescaler::DIV4; - config.rcc.apb2_pre = APBPrescaler::DIV2; - - // HSE is on and ready - config.rcc.hse = Some(Hse { - freq: mhz(8), - mode: HseMode::Oscillator, - }); - config.rcc.pll_src = PllSource::HSE; - - config.rcc.pll = Some(Pll { - prediv: PllPreDiv::DIV8, // PLLM - mul: PllMul::MUL360, // PLLN - divp: Some(PllPDiv::DIV2), - divq: Some(PllQDiv::DIV7), // was DIV4, but STM BSP example uses 7 - divr: Some(PllRDiv::DIV6), - }); - - // This seems to be working, the values in the RCC.PLLSAICFGR are correct according to the debugger. Also on and ready according to CR - config.rcc.pllsai = Some(Pll { - prediv: PllPreDiv::DIV8, // Actually ignored - mul: PllMul::MUL384, // PLLN - divp: None, // PLLP - divq: None, // PLLQ - divr: Some(PllRDiv::DIV7), // PLLR (Sai actually has special clockdiv register) - }); - - let p = embassy_stm32::init(config); - info!("Starting..."); - - let mut led = Output::new(p.PG6, Level::High, Speed::Low); - - /* - BSP_LCD_Reset() - */ - - // According to UM for the discovery kit, PH7 is an active-low reset for the LCD and touchsensor - let mut reset = Output::new(p.PH7, Level::Low, Speed::High); - - // CubeMX example waits 20 ms before de-asserting reset - embassy_time::block_for(embassy_time::Duration::from_millis(20)); - - // Disable the reset signal and wait 140ms as in the Linux driver (CubeMX waits only 20) - reset.set_high(); - embassy_time::block_for(embassy_time::Duration::from_millis(140)); - - /* - BSP_LCD_MspInit() // This will set IP blocks LTDC, DSI and DMA2D => We should be fine with what Embassy does. - */ - - let mut ltdc = Ltdc::new(p.LTDC); - let mut dsi = DsiHost::new(p.DSIHOST, p.PJ2); - let version = dsi.get_version(); - defmt::warn!("en: {:x}", version); - - /* - HAL_DSI_DeInit() - */ - - // Disable the DSI wrapper - dsi.disable_wrapper_dsi(); - - // Disable the DSI host - dsi.disable(); - - // D-PHY clock and digital disable - DSIHOST.pctlr().modify(|w| { - w.set_cke(false); - w.set_den(false) - }); - - // Turn off the DSI PLL - DSIHOST.wrpcr().modify(|w| w.set_pllen(false)); - - // Disable the regulator - DSIHOST.wrpcr().write(|w| w.set_regen(false)); - - /* - ###################################### - BEGIN HAL_DSI_Init() - ###################################### - */ - - // Enable regulator (__HAL_DSI_REG_ENABLE) - info!("DSIHOST: enabling regulator"); - DSIHOST.wrpcr().write(|w| w.set_regen(true)); - - for _ in 1..1000 { - // The regulator status (ready or not) can be monitored with the RRS flag in the DSI_WISR register. - // Once it is set, we stop waiting. - if DSIHOST.wisr().read().rrs() { - info!("DSIHOST Regulator ready"); - break; - } - embassy_time::block_for(embassy_time::Duration::from_millis(1)); - } - - if !DSIHOST.wisr().read().rrs() { - defmt::panic!("DSIHOST: enabling regulator FAILED"); - } - - // Set up PLL and enable it - DSIHOST.wrpcr().modify(|w| { - w.set_pllen(true); - w.set_ndiv(125); // PLL loop division factor set to 125 - w.set_idf(2); // PLL input divided by 2 - w.set_odf(0); // PLL output divided by 1 - }); - - /* 500 MHz / 8 = 62.5 MHz = 62500 kHz */ - const LaneByteClk_kHz: u16 = 62500; // https://github.com/STMicroelectronics/32f469idiscovery-bsp/blob/ec051de2bff3e1b73a9ccd49c9b85abf7320add9/stm32469i_discovery_lcd.c#L224C21-L224C26 - - const LcdClock: u16 = 27429; // https://github.com/STMicroelectronics/32f469idiscovery-bsp/blob/ec051de2bff3e1b73a9ccd49c9b85abf7320add9/stm32469i_discovery_lcd.c#L183 - - /* TXEscapeCkdiv = f(LaneByteClk)/15.62 = 4 */ - const TXEscapeCkdiv: u8 = (LaneByteClk_kHz / 15620) as u8; // https://github.com/STMicroelectronics/32f469idiscovery-bsp/blob/ec051de2bff3e1b73a9ccd49c9b85abf7320add9/stm32469i_discovery_lcd.c#L230 - - for _ in 1..1000 { - embassy_time::block_for(embassy_time::Duration::from_millis(1)); - // The PLL status (lock or unlock) can be monitored with the PLLLS flag in the DSI_WISR register. - // Once it is set, we stop waiting. - if DSIHOST.wisr().read().pllls() { - info!("DSIHOST PLL locked"); - break; - } - } - - if !DSIHOST.wisr().read().pllls() { - defmt::panic!("DSIHOST: enabling PLL FAILED"); - } - - // ### Set the PHY parameters ### - - // D-PHY clock and digital enable - DSIHOST.pctlr().write(|w| { - w.set_cke(true); - w.set_den(true); - }); - - // Set Clock lane to high-speed mode and disable automatic clock lane control - DSIHOST.clcr().modify(|w| { - w.set_dpcc(true); - w.set_acr(false); // TODO: Verify that false is correct here. Seems unset in BSP, i.e., zero/false. - }); - - // Set number of active data lanes to two (lanes 0 and 1) - DSIHOST.pconfr().modify(|w| w.set_nl(1)); - - // ### Set the DSI clock parameters ### - - // Set the TX escape clock division factor to 4 - DSIHOST.ccr().modify(|w| w.set_txeckdiv(TXEscapeCkdiv)); - - // Calculate the bit period in high-speed mode in unit of 0.25 ns (UIX4) - // The equation is : UIX4 = IntegerPart( (1000/F_PHY_Mhz) * 4 ) - // Where : F_PHY_Mhz = (NDIV * HSE_Mhz) / (IDF * ODF) - // Set the bit period in high-speed mode - DSIHOST.wpcr0().modify(|w| w.set_uix4(8)); // 8 is set in the BSP example (confirmed with Debugger) - - // Disable all error interrupts and reset the Error Mask - DSIHOST.ier0().write_value(Ier0(0)); - DSIHOST.ier1().write_value(Ier1(0)); - - - // Enable this to fix read timeout - DSIHOST.pcr().modify(|w| w.set_btae(true)); - - /* - ###################################### - END HAL_DSI_Init() - ###################################### - */ - - const DSI_PIXELFORMAT_RGB888: u8 = 0x05; - const DSI_PIXELFORMAT_ARGB888: u8 = 0x00; - - const HACT: u16 = LCD_X_Size; - const VACT: u16 = LCD_Y_Size; - - const VSA: u16 = 120; - const VBP: u16 = 150; - const VFP: u16 = 150; - const HSA: u16 = 2; - const HBP: u16 = 34; - const HFP: u16 = 34; - - const VirtualChannelID: u8 = 0; - - const ColorCoding: u8 = DSI_PIXELFORMAT_RGB888; - const VSPolarity: bool = false; // DSI_VSYNC_ACTIVE_HIGH == 0 - const HSPolarity: bool = false; // DSI_HSYNC_ACTIVE_HIGH == 0 - const DEPolarity: bool = false; // DSI_DATA_ENABLE_ACTIVE_HIGH == 0 - const Mode: u8 = 2; // DSI_VID_MODE_BURST; /* Mode Video burst ie : one LgP per line */ - const NullPacketSize: u16 = 0xFFF; - const NumberOfChunks: u16 = 0; - const PacketSize: u16 = HACT; /* Value depending on display orientation choice portrait/landscape */ - const HorizontalSyncActive: u16 = 4;// ((HSA as u32 * LaneByteClk_kHz as u32 ) / LcdClock as u32 ) as u16; - const HorizontalBackPorch: u16 = 77; //((HBP as u32 * LaneByteClk_kHz as u32 ) / LcdClock as u32) as u16; - const HorizontalLine: u16 = 1982; //(((HACT + HSA + HBP + HFP) as u32 * LaneByteClk_kHz as u32 ) / LcdClock as u32 ) as u16; /* Value depending on display orientation choice portrait/landscape */ - // FIXME: Make depend on orientation - const VerticalSyncActive: u16 = VSA; - const VerticalBackPorch: u16 = VBP; - const VerticalFrontPorch: u16 = VFP; - const VerticalActive: u16 = VACT; - const LPCommandEnable: bool = true; /* Enable sending commands in mode LP (Low Power) */ - - /* Largest packet size possible to transmit in LP mode in VSA, VBP, VFP regions */ - /* Only useful when sending LP packets is allowed while streaming is active in video mode */ - const LPLargestPacketSize: u8 = 16; - - /* Largest packet size possible to transmit in LP mode in HFP region during VACT period */ - /* Only useful when sending LP packets is allowed while streaming is active in video mode */ - const LPVACTLargestPacketSize: u8 = 0; - - const LPHorizontalFrontPorchEnable: bool = true; /* Allow sending LP commands during HFP period */ - const LPHorizontalBackPorchEnable: bool = true; /* Allow sending LP commands during HBP period */ - const LPVerticalActiveEnable: bool = true; /* Allow sending LP commands during VACT period */ - const LPVerticalFrontPorchEnable: bool = true; /* Allow sending LP commands during VFP period */ - const LPVerticalBackPorchEnable: bool = true; /* Allow sending LP commands during VBP period */ - const LPVerticalSyncActiveEnable: bool = true; /* Allow sending LP commands during VSync = VSA period */ - const FrameBTAAcknowledgeEnable: bool = false; /* Frame bus-turn-around acknowledge enable => false according to debugger */ - - /* - ###################################### - BEGIN HAL_DSI_ConfigVideoMode() - ###################################### - */ - - /* - if (VidCfg->ColorCoding == DSI_RGB666) - { - assert_param(IS_DSI_LOOSELY_PACKED(VidCfg->LooselyPacked)); - } - */ - - /* Select video mode by resetting CMDM and DSIM bits */ - DSIHOST.mcr().modify(|w| w.set_cmdm(false)); - DSIHOST.wcfgr().modify(|w| w.set_dsim(false)); - - /* Configure the video mode transmission type */ - DSIHOST.vmcr().modify(|w| w.set_vmt(Mode)); - - /* Configure the video packet size */ - DSIHOST.vpcr().modify(|w| w.set_vpsize(PacketSize)); - - /* Set the chunks number to be transmitted through the DSI link */ - DSIHOST.vccr().modify(|w| w.set_numc(NumberOfChunks)); - - /* Set the size of the null packet */ - DSIHOST.vnpcr().modify(|w| w.set_npsize(NullPacketSize)); - - /* Select the virtual channel for the LTDC interface traffic */ - DSIHOST.lvcidr().modify(|w| w.set_vcid(VirtualChannelID)); - - /* Configure the polarity of control signals */ - DSIHOST.lpcr().modify(|w| { - w.set_dep(DEPolarity); - w.set_hsp(HSPolarity); - w.set_vsp(VSPolarity); - }); - - /* Select the color coding for the host */ - DSIHOST.lcolcr().modify(|w| w.set_colc(ColorCoding)); - - /* Select the color coding for the wrapper */ - DSIHOST.wcfgr().modify(|w| w.set_colmux(ColorCoding)); - - /* // FIXME - /* Enable/disable the loosely packed variant to 18-bit configuration */ - if (VidCfg->ColorCoding == DSI_RGB666) - { - hdsi->Instance->LCOLCR &= ~DSI_LCOLCR_LPE; - hdsi->Instance->LCOLCR |= VidCfg->LooselyPacked; - } - */ - - /* Set the Horizontal Synchronization Active (HSA) in lane byte clock cycles */ - DSIHOST.vhsacr().modify(|w| w.set_hsa(HorizontalSyncActive)); - - /* Set the Horizontal Back Porch (HBP) in lane byte clock cycles */ - DSIHOST.vhbpcr().modify(|w| w.set_hbp(HorizontalBackPorch)); - - /* Set the total line time (HLINE=HSA+HBP+HACT+HFP) in lane byte clock cycles */ - DSIHOST.vlcr().modify(|w| w.set_hline(HorizontalLine)); - - /* Set the Vertical Synchronization Active (VSA) */ - DSIHOST.vvsacr().modify(|w| w.set_vsa(VerticalSyncActive)); - - /* Set the Vertical Back Porch (VBP)*/ - DSIHOST.vvbpcr().modify(|w| w.set_vbp(VerticalBackPorch)); - - /* Set the Vertical Front Porch (VFP)*/ - DSIHOST.vvfpcr().modify(|w| w.set_vfp(VerticalFrontPorch)); - - /* Set the Vertical Active period*/ - DSIHOST.vvacr().modify(|w| w.set_va(VerticalActive)); - - /* Configure the command transmission mode */ - DSIHOST.vmcr().modify(|w| w.set_lpce(LPCommandEnable)); - - /* Low power largest packet size */ - DSIHOST.lpmcr().modify(|w| w.set_lpsize(LPLargestPacketSize)); - - /* Low power VACT largest packet size */ - DSIHOST.lpmcr().modify(|w| w.set_lpsize(LPLargestPacketSize)); - DSIHOST.lpmcr().modify(|w| w.set_vlpsize(LPVACTLargestPacketSize)); - - /* Enable LP transition in HFP period */ - DSIHOST.vmcr().modify(|w| w.set_lphfpe(LPHorizontalFrontPorchEnable)); - - /* Enable LP transition in HBP period */ - DSIHOST.vmcr().modify(|w| w.set_lphbpe(LPHorizontalBackPorchEnable)); - - /* Enable LP transition in VACT period */ - DSIHOST.vmcr().modify(|w| w.set_lpvae(LPVerticalActiveEnable)); - - /* Enable LP transition in VFP period */ - DSIHOST.vmcr().modify(|w| w.set_lpvfpe(LPVerticalFrontPorchEnable)); - - /* Enable LP transition in VBP period */ - DSIHOST.vmcr().modify(|w| w.set_lpvbpe(LPVerticalBackPorchEnable)); - - /* Enable LP transition in vertical sync period */ - DSIHOST.vmcr().modify(|w| w.set_lpvsae(LPVerticalSyncActiveEnable)); - - /* Enable the request for an acknowledge response at the end of a frame */ - DSIHOST.vmcr().modify(|w| w.set_fbtaae(FrameBTAAcknowledgeEnable)); - - /* - ###################################### - END HAL_DSI_ConfigVideoMode() - ###################################### - */ - - /* Configure DSI PHY HS2LP and LP2HS timings */ - const ClockLaneHS2LPTime: u16 = 35; - const ClockLaneLP2HSTime: u16 = 35; - const DataLaneHS2LPTime: u8 = 35; - const DataLaneLP2HSTime: u8 = 35; - const DataLaneMaxReadTime: u16 = 0; - const StopWaitTime: u8 = 10; - - const MAX_TIME: u16 = if ClockLaneHS2LPTime > ClockLaneLP2HSTime { - ClockLaneHS2LPTime - } else { - ClockLaneLP2HSTime - }; - - /* - ###################################### - BEGIN HAL_DSI_ConfigPhyTimer() - ###################################### - */ - - /* Clock lane timer configuration */ - - /* In Automatic Clock Lane control mode, the DSI Host can turn off the clock lane between two - High-Speed transmission. - To do so, the DSI Host calculates the time required for the clock lane to change from HighSpeed - to Low-Power and from Low-Power to High-Speed. - This timings are configured by the HS2LP_TIME and LP2HS_TIME in the DSI Host Clock Lane Timer Configuration - Register (DSI_CLTCR). - But the DSI Host is not calculating LP2HS_TIME + HS2LP_TIME but 2 x HS2LP_TIME. - - Workaround : Configure HS2LP_TIME and LP2HS_TIME with the same value being the max of HS2LP_TIME or LP2HS_TIME. - */ - - DSIHOST.cltcr().modify(|w| { - w.set_hs2lp_time(MAX_TIME); - w.set_lp2hs_time(MAX_TIME) - }); - - // Data lane timer configuration - DSIHOST.dltcr().modify(|w| { - w.set_hs2lp_time(DataLaneHS2LPTime); - w.set_lp2hs_time(DataLaneLP2HSTime); - w.set_mrd_time(DataLaneMaxReadTime); - }); - - // Configure the wait period to request HS transmission after a stop state - DSIHOST.pconfr().modify(|w| w.set_sw_time(StopWaitTime)); - - /* - ###################################### - END HAL_DSI_ConfigPhyTimer() - ###################################### - */ - - // Here comes HAL_DSI_ConfigPhyTimer() in the BSP example. We have already configured it at the beginning. - - const PCPolarity: bool = false; // LTDC_PCPOLARITY_IPC == 0 - - const LTDC_DEPolarity: Depol = if DEPolarity == false { - Depol::ACTIVELOW - } else { - Depol::ACTIVEHIGH - }; - const LTDC_VSPolarity: Vspol = if VSPolarity == false { - Vspol::ACTIVEHIGH - } else { - Vspol::ACTIVELOW - }; - - const LTDC_HSPolarity: Hspol = if HSPolarity == false { - Hspol::ACTIVEHIGH - } else { - Hspol::ACTIVELOW - }; - - /* Timing Configuration */ - const HorizontalSync: u16 = HSA - 1; - const VerticalSync: u16 = VerticalSyncActive - 1; - const AccumulatedHBP: u16 = HSA + HBP - 1; - const AccumulatedVBP: u16 = VerticalSyncActive + VerticalBackPorch - 1; - const AccumulatedActiveW: u16 = LCD_X_Size + HSA + HBP - 1; - const AccumulatedActiveH: u16 = VerticalSyncActive + VerticalBackPorch + VerticalActive - 1; - const TotalWidth: u16 = LCD_X_Size + HSA + HBP + HFP - 1; - const TotalHeight: u16 = VerticalSyncActive + VerticalBackPorch + VerticalActive + VerticalFrontPorch - 1; - - /* - ###################################### - BEGIN HAL_LTDC_Init() - ###################################### - */ - - // DISABLE LTDC before making changes - ltdc.disable(); - - // Configure the HS, VS, DE and PC polarity - LTDC.gcr().modify(|w| { - w.set_hspol(LTDC_HSPolarity); - w.set_vspol(LTDC_VSPolarity); - w.set_depol(LTDC_DEPolarity); - w.set_pcpol(Pcpol::RISINGEDGE); // #define LTDC_PCPOLARITY_IPC 0x00000000U - }); - - // Set Synchronization size - LTDC.sscr().modify(|w| { - w.set_hsw(HorizontalSync); - w.set_vsh(VerticalSync) - }); - - // Set Accumulated Back porch - LTDC.bpcr().modify(|w| { - w.set_ahbp(AccumulatedHBP); - w.set_avbp(AccumulatedVBP); - }); - - // Set Accumulated Active Width - LTDC.awcr().modify(|w| { - w.set_aah(AccumulatedActiveH); - w.set_aaw(AccumulatedActiveW); - }); - - // Set Total Width - LTDC.twcr().modify(|w| { - w.set_totalh(TotalHeight); - w.set_totalw(TotalWidth); - }); - - // Set the background color value - LTDC.bccr().modify(|w| { - w.set_bcred(0); - w.set_bcgreen(0); - w.set_bcblue(0) - }); - - // Enable the Transfer Error and FIFO underrun interrupts - LTDC.ier().modify(|w| { - w.set_terrie(true); - w.set_fuie(true); - }); - - // ENABLE LTDC after making changes - ltdc.enable(); - - /* - ###################################### - END HAL_LTDC_Init() - ###################################### - */ - - /* - ###################################### - BEGIN HAL_DSI_Start() - ###################################### - */ - - dsi.enable(); - dsi.enable_wrapper_dsi(); - - /* - ###################################### - END HAL_DSI_Start() - ###################################### - */ - - /* - ###################################### - BEGIN NT35510_Init(() - ###################################### - */ - - // First, delay 120 ms (reason unknown, STM32 Cube Example does it) - blocking_delay_ms(120); - - // 1 to 26 - dsi.write_cmd(0, NT35510_WRITES_0); - dsi.write_cmd(0, NT35510_WRITES_1); - dsi.write_cmd(0, NT35510_WRITES_2); - dsi.write_cmd(0, NT35510_WRITES_3); - dsi.write_cmd(0, NT35510_WRITES_4); - dsi.write_cmd(0, NT35510_WRITES_5); - dsi.write_cmd(0, NT35510_WRITES_6); - dsi.write_cmd(0, NT35510_WRITES_7); - dsi.write_cmd(0, NT35510_WRITES_8); - dsi.write_cmd(0, NT35510_WRITES_9); - dsi.write_cmd(0, NT35510_WRITES_10); - // 11 missing - dsi.write_cmd(0, NT35510_WRITES_12); - dsi.write_cmd(0, NT35510_WRITES_13); - dsi.write_cmd(0, NT35510_WRITES_14); - dsi.write_cmd(0, NT35510_WRITES_15); - dsi.write_cmd(0, NT35510_WRITES_16); - dsi.write_cmd(0, NT35510_WRITES_17); - dsi.write_cmd(0, NT35510_WRITES_18); - dsi.write_cmd(0, NT35510_WRITES_19); - dsi.write_cmd(0, NT35510_WRITES_20); - dsi.write_cmd(0, NT35510_WRITES_21); - dsi.write_cmd(0, NT35510_WRITES_22); - dsi.write_cmd(0, NT35510_WRITES_23); - dsi.write_cmd(0, NT35510_WRITES_24); - - // Tear on - dsi.write_cmd(0, NT35510_WRITES_26); - - // Set Pixel color format to RGB888 - dsi.write_cmd(0, NT35510_WRITES_37); - - // Add a delay, otherwise MADCTL not taken - blocking_delay_ms(200); - - // Configure orientation as landscape - dsi.write_cmd(0, NT35510_MADCTL_LANDSCAPE); - dsi.write_cmd(0, NT35510_CASET_LANDSCAPE); - dsi.write_cmd(0, NT35510_RASET_LANDSCAPE); - - // Sleep out - dsi.write_cmd(0, NT35510_WRITES_27); - - // Wait for sleep out exit - blocking_delay_ms(120); - - // Configure ColorCoding - dsi.write_cmd(0, NT35510_WRITES_37); - - /* CABC : Content Adaptive Backlight Control section start >> */ - /* Note : defaut is 0 (lowest Brightness), 0xFF is highest Brightness, try 0x7F : intermediate value */ - dsi.write_cmd(0, NT35510_WRITES_31); - /* defaut is 0, try 0x2C - Brightness Control Block, Display Dimming & BackLight on */ - dsi.write_cmd(0, NT35510_WRITES_32); - /* defaut is 0, try 0x02 - image Content based Adaptive Brightness [Still Picture] */ - dsi.write_cmd(0, NT35510_WRITES_33); - /* defaut is 0 (lowest Brightness), 0xFF is highest Brightness */ - dsi.write_cmd(0, NT35510_WRITES_34); - /* CABC : Content Adaptive Backlight Control section end << */ - /* Display on */ - dsi.write_cmd(0, NT35510_WRITES_30); - - /* Send Command GRAM memory write (no parameters) : this initiates frame write via other DSI commands sent by */ - /* DSI host from LTDC incoming pixels in video mode */ - dsi.write_cmd(0, NT35510_WRITES_35); - - /* - ###################################### - END NT35510_Init(() - ###################################### - */ - - - - /* Initialize the LCD pixel width and pixel height */ - const WindowX0: u16 = 0; - const WindowX1: u16 = LCD_X_Size; // 60 for camera - const WindowY0: u16 = 0; - const WindowY1: u16 = LCD_Y_Size; // 60 for camera - const PixelFormat: Pf = Pf::ARGB8888; - //const FBStartAdress: u16 = FB_Address; - const Alpha: u8 = 255; - const Alpha0: u8 = 0; - const BackcolorBlue: u8 = 0; - const BackcolorGreen: u8 = 0; - const BackcolorRed: u8 = 0; - const ImageWidth: u16 = LCD_X_Size; // 60 for camera - const ImageHeight: u16 = LCD_Y_Size; // 60 for camera - - /*: - ###################################### - BEGIN HAL_LTDC_ConfigLayer() and LTDC_SetConfig() for Layer 0 - ###################################### - */ - - const PIXEL_SIZE: u8 = match PixelFormat { - Pf::ARGB8888 => 4, - Pf::RGB888 => 3, - Pf::ARGB4444 | Pf::RGB565 | Pf::ARGB1555 | Pf::AL88 => 2, - _ => 1, - }; - - // Configure the horizontal start and stop position - LTDC.layer(0).whpcr().write(|w| { - w.set_whstpos(LTDC.bpcr().read().ahbp() + 1 + WindowX0); - w.set_whsppos(LTDC.bpcr().read().ahbp() + WindowX1); - }); - - // Configures the vertical start and stop position - LTDC.layer(0).wvpcr().write(|w| { - w.set_wvstpos(LTDC.bpcr().read().avbp() + 1 + WindowY0); - w.set_wvsppos(LTDC.bpcr().read().avbp() + WindowY1); - }); - - // Specify the pixel format - LTDC.layer(0).pfcr().write(|w| w.set_pf(PixelFormat)); - - // Configures the default color values as zero - LTDC.layer(0).dccr().modify(|w| { - w.set_dcblue(BackcolorBlue); - w.set_dcgreen(BackcolorGreen); - w.set_dcred(BackcolorRed); - w.set_dcalpha(Alpha0); - }); - - // Specifies the constant alpha value - LTDC.layer(0).cacr().write(|w| w.set_consta(Alpha)); - - // Specifies the blending factors - LTDC.layer(0).bfcr().write(|w| { - w.set_bf1(Bf1::CONSTANT); - w.set_bf2(Bf2::CONSTANT); - }); - - // Configure the color frame buffer start address - let fb_start_address: u32 = &FRAMEBUFFER[0] as *const _ as u32; // TODO: REPLACE WITH REAL ADDRESS - info!("Setting Framebuffer Start Address: {:010x}", fb_start_address); - LTDC.layer(0).cfbar().write(|w| w.set_cfbadd(fb_start_address)); - - // Configures the color frame buffer pitch in byte - LTDC.layer(0).cfblr().write(|w| { - w.set_cfbp(ImageWidth * PIXEL_SIZE as u16); - w.set_cfbll(((WindowX1 - WindowX0) * PIXEL_SIZE as u16) + 3); - }); - - // Configures the frame buffer line number - LTDC.layer(0).cfblnr().write(|w| w.set_cfblnbr(ImageHeight)); - - // Enable LTDC_Layer by setting LEN bit - LTDC.layer(0).cr().modify(|w| w.set_len(true)); - - - // Comes after LTDC_SetConfig() in HAL_LTDC_ConfigLayer() - //LTDC->SRCR = LTDC_SRCR_IMR; - LTDC.srcr().modify(|w| w.set_imr(Imr::RELOAD)); - - /* - ###################################### - END HAL_LTDC_ConfigLayer() and LTDC_SetConfig() for Layer 0 - ###################################### - */ - - - blocking_delay_ms(5000); - - - const READ_SIZE: u16 = 1; - let mut data = [1u8; READ_SIZE as usize]; - dsi.read(0, PacketType::DcsShortPktRead(0xDA), READ_SIZE, &mut data) - .unwrap(); - info!("Display ID1: {:#04x}", data); - - dsi.read(0, PacketType::DcsShortPktRead(0xDB), READ_SIZE, &mut data) - .unwrap(); - info!("Display ID2: {:#04x}", data); - - dsi.read(0, PacketType::DcsShortPktRead(0xDC), READ_SIZE, &mut data) - .unwrap(); - info!("Display ID3: {:#04x}", data); - - blocking_delay_ms(500); - - - info!("Config done, start blinking LED"); - loop { - led.set_high(); - Timer::after_millis(1000).await; - - // Increase screen brightness - dsi.write_cmd(0, &[NT35510_CMD_WRDISBV, 0xFF]); - - //dsi.write_cmd(0, &[NT35510_CMD_ALLPIXELS_ON, 0xFF]); - - led.set_low(); - Timer::after_millis(1000).await; - - // Reduce screen brightness - dsi.write_cmd(0, &[NT35510_CMD_WRDISBV, 0x50]); - - //dsi.write_cmd(0, &[NT35510_CMD_ALLPIXELS_OFF, 0xFF]); - } -} -const NT35510_WRITES_0: &[u8] = &[0x55, 0xAA, 0x52, 0x08, 0x01, 0xF0]; // LV2: Page 1 enable -const NT35510_WRITES_1: &[u8] = &[0x03, 0x03, 0x03, 0xB0]; // AVDD: 5.2V -const NT35510_WRITES_2: &[u8] = &[0x46, 0x46, 0x46, 0xB6]; // AVDD: Ratio -const NT35510_WRITES_3: &[u8] = &[0x03, 0x03, 0x03, 0xB1]; // AVEE: -5.2V -const NT35510_WRITES_4: &[u8] = &[0x36, 0x36, 0x36, 0xB7]; // AVEE: Ratio -const NT35510_WRITES_5: &[u8] = &[0x00, 0x00, 0x02, 0xB2]; // VCL: -2.5V -const NT35510_WRITES_6: &[u8] = &[0x26, 0x26, 0x26, 0xB8]; // VCL: Ratio -const NT35510_WRITES_7: &[u8] = &[0xBF, 0x01]; // VGH: 15V (Free Pump) -const NT35510_WRITES_8: &[u8] = &[0x09, 0x09, 0x09, 0xB3]; -const NT35510_WRITES_9: &[u8] = &[0x36, 0x36, 0x36, 0xB9]; // VGH: Ratio -const NT35510_WRITES_10: &[u8] = &[0x08, 0x08, 0x08, 0xB5]; // VGL_REG: -10V -const NT35510_WRITES_12: &[u8] = &[0x26, 0x26, 0x26, 0xBA]; // VGLX: Ratio - // nt35510_reg10 is missing in HAL -const NT35510_WRITES_13: &[u8] = &[0x00, 0x80, 0x00, 0xBC]; // VGMP/VGSP: 4.5V/0V -const NT35510_WRITES_14: &[u8] = &[0x00, 0x80, 0x00, 0xBD]; // VGMN/VGSN:-4.5V/0V -const NT35510_WRITES_15: &[u8] = &[0x00, 0x50, 0xBE]; // VCOM: -1.325V -const NT35510_WRITES_16: &[u8] = &[0x55, 0xAA, 0x52, 0x08, 0x00, 0xF0]; // LV2: Page 0 enable -const NT35510_WRITES_17: &[u8] = &[0xFC, 0x00, 0xB1]; // Display control -const NT35510_WRITES_18: &[u8] = &[0xB6, 0x03]; // Src hold time -const NT35510_WRITES_19: &[u8] = &[0xB5, 0x51]; -const NT35510_WRITES_20: &[u8] = &[0x00, 0x00, 0xB7]; // Gate EQ control -const NT35510_WRITES_21: &[u8] = &[0x01, 0x02, 0x02, 0x02, 0xB8]; // Src EQ control(Mode2) -const NT35510_WRITES_22: &[u8] = &[0x00, 0x00, 0x00, 0xBC]; // Inv. mode(2-dot) -const NT35510_WRITES_23: &[u8] = &[0x03, 0x00, 0x00, 0xCC]; -const NT35510_WRITES_24: &[u8] = &[0xBA, 0x01]; - -const NT35510_MADCTL_PORTRAIT: &[u8] = &[NT35510_CMD_MADCTL, 0x00]; -const NT35510_CASET_PORTRAIT: &[u8] = &[0x00, 0x00, 0x01, 0xDF, NT35510_CMD_CASET]; -const NT35510_RASET_PORTRAIT: &[u8] = &[0x00, 0x00, 0x03, 0x1F, NT35510_CMD_RASET]; -const NT35510_MADCTL_LANDSCAPE: &[u8] = &[NT35510_CMD_MADCTL, 0x60]; -const NT35510_CASET_LANDSCAPE: &[u8] = &[0x00, 0x00, 0x03, 0x1F, NT35510_CMD_CASET]; -const NT35510_RASET_LANDSCAPE: &[u8] = &[0x00, 0x00, 0x01, 0xDF, NT35510_CMD_RASET]; - -const NT35510_WRITES_26: &[u8] = &[NT35510_CMD_TEEON, 0x00]; // Tear on -const NT35510_WRITES_27: &[u8] = &[NT35510_CMD_SLPOUT, 0x00]; // Sleep out - // 28,29 missing -const NT35510_WRITES_30: &[u8] = &[NT35510_CMD_DISPON, 0x00]; // Display on - -const NT35510_WRITES_31: &[u8] = &[NT35510_CMD_WRDISBV, 0x7F]; -const NT35510_WRITES_32: &[u8] = &[NT35510_CMD_WRCTRLD, 0x2C]; -const NT35510_WRITES_33: &[u8] = &[NT35510_CMD_WRCABC, 0x02]; -const NT35510_WRITES_34: &[u8] = &[NT35510_CMD_WRCABCMB, 0xFF]; -const NT35510_WRITES_35: &[u8] = &[NT35510_CMD_RAMWR, 0x00]; - -//const NT35510_WRITES_36: &[u8] = &[NT35510_CMD_COLMOD, NT35510_COLMOD_RGB565]; // FIXME: Example sets it to 888 but rest of the code seems to configure DSI for 565 -const NT35510_WRITES_37: &[u8] = &[NT35510_CMD_COLMOD, NT35510_COLMOD_RGB888]; - - -// More of these: https://elixir.bootlin.com/linux/latest/source/include/video/mipi_display.h#L83 -const NT35510_CMD_TEEON_GET_DISPLAY_ID: u8 = 0x04; - -const NT35510_CMD_TEEON: u8 = 0x35; -const NT35510_CMD_MADCTL: u8 = 0x36; - -const NT35510_CMD_SLPOUT: u8 = 0x11; -const NT35510_CMD_DISPON: u8 = 0x29; -const NT35510_CMD_CASET: u8 = 0x2A; -const NT35510_CMD_RASET: u8 = 0x2B; -const NT35510_CMD_RAMWR: u8 = 0x2C; /* Memory write */ -const NT35510_CMD_COLMOD: u8 = 0x3A; - -const NT35510_CMD_WRDISBV: u8 = 0x51; /* Write display brightness */ -const NT35510_CMD_RDDISBV: u8 = 0x52; /* Read display brightness */ -const NT35510_CMD_WRCTRLD: u8 = 0x53; /* Write CTRL display */ -const NT35510_CMD_RDCTRLD: u8 = 0x54; /* Read CTRL display value */ -const NT35510_CMD_WRCABC: u8 = 0x55; /* Write content adaptative brightness control */ -const NT35510_CMD_WRCABCMB: u8 = 0x5E; /* Write CABC minimum brightness */ - -const NT35510_COLMOD_RGB565: u8 = 0x55; -const NT35510_COLMOD_RGB888: u8 = 0x77; - -// Orange: 0xE1C4 -// 800x480 Display => 384000 pixels -//#[link_section = ".device_info"] -// 60x60 image taken from ST's BSP example -static FRAMEBUFFER: [u32;384000] = [ - 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 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0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, - 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 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0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 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0xffe33b26, 0xffed7f71, 0xfffffdfc, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xfff9d8d4, 0xffe54834, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffeb7262, 0xfffef9f8, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xfff7cac4, 0xffe4422e, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffea6a5a, 0xfffef6f5, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, - 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 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0xffffffff, 0xffffffff, 0xffffffff, 0xfff8cfca, 0xffe44430, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe8604f, 0xfffdf0ef, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xfffadad6, 0xffe54a36, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffed7f71, 0xfffffdfc, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xfff9d3ce, 0xffe54632, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffeb7262, 0xfffef9f8, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xfff7cac4, 0xffe4422e, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffea6a5a, 0xfffef6f5, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, - 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 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0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xfff8ccc7, 0xffe4432f, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe8604f, 0xfffdf0ef, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xfffad9d5, 0xffe54a36, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffed8477, 0xfffffdfd, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xfff9d2cd, 0xffe44531, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffeb7263, 0xfffef9f8, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xfff7cac4, 0xffe4422e, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffea6e5e, 0xfffef7f6, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, - 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xfffad9d5, 0xffe54935, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe8604f, 0xfffdf0ef, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xfffad9d5, 0xffe54a36, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffed8477, 0xfffffdfd, 0xffffffff, 0xffffffff, 0xfff8d1cc, 0xffe44531, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffeb7263, 0xfffef9f8, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xfff7cac4, 0xffe4422e, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe86151, 0xfffdf2f1, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, - 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xfffadad6, 0xffe54a36, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe8604f, 0xfffdf0ef, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xfffadad6, 0xffe54a36, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffed7f71, 0xfffffdfc, 0xfff9d2cd, 0xffe44531, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffeb7162, 0xfffef8f7, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xfff7cac4, 0xffe4422e, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe8604f, 0xfffdf0ef, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, - 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xfffad9d4, 0xffe54935, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe8604f, 0xfffdf0ef, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xfffad9d5, 0xffe54a36, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 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0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, - 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 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0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xfffadad6, 0xffe54a36, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe8604f, 0xfffdf0ef, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xfffadad6, 0xffe54a36, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 0xffe33b26, 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0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff - ]; -static FRAMEBUFFER2: [u32; 3600] = [ - 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, - 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, - 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, - 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, - 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, - 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, - 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, - 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, - 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, - 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, - 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, - 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, - 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, - 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, - 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, - 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, - 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, - 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, - 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, - 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x2100, - 0x7596263, 0xB5D6667, 0xC5C6565, 0xC5D6666, 0xC5D6666, 0xC5D6665, 0xB5E646A, 0x74A4C4E, 0x6424141, 0x7515858, - 0x7636B6B, 0x76C8383, 0x786A0A0, 0x46C7D7D, 0x616F6F, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, - 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, - 0x0, 0x0, 0x11C2422, 0xD697072, 0x2393999A, 0x3CB0B3B5, 0x5CB8BCBD, 0x83BFC2C3, 0xA7CBCCCE, 0xC6D7D8DA, 0xDFE1E2E3, - 0xE8E4E5E5, 0xE9E5E5E6, 0xE9E5E5E6, 0xE9E5E4E5, 0xE9E4E5E6, 0xE7E5E6E6, 0xDEE4E5E4, 0xDCE5E6E7, 0xDDEAEBEB, - 0xDDEDEEEE, 0xDDF0F1F1, 0xDDF4F4F4, 0xD9F5F5F5, 0xACE1E3E3, 0x50B2B8BA, 0x6797D85, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, - 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, - 0x35B6564, 0x13788082, 0x2B9AA1A3, 0x48B0B4B5, 0x69BCBEBF, 0x90C5C7C9, 0xB4D0D2D4, 0xD0DBDDDE, 0xE7E3E4E5, - 0xF8E7E8E9, 0xFEEFEFEF, 0xFFF4F4F4, 0xFFF5F5F5, 0xFFF4F4F4, 0xFFF3F3F3, 0xFFF2F2F2, 0xFFF2F2F2, 0xFFF3F3F3, - 0xFFF5F5F5, 0xFFF7F7F7, 0xFFF9F9F9, 0xFFFBFBFB, 0xFFFDFDFD, 0xFFFEFEFE, 0xFFFCFCFC, 0xFFF9F9F9, 0xFFF4F5F4, - 0xFFEDEEEF, 0xFFE7E8E8, 0xFFE4E5E6, 0xFFDCDDDE, 0xC0C0C4C5, 0x1EA0A6A7, 0x81888B, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, - 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x8555E5F, 0x1A93979B, 0x32AAAEB0, 0x53B3B7B8, - 0x77BABFC0, 0x9DC9CCCD, 0xBED5D6D8, 0xD9DFE1E1, 0xF0E5E6E6, 0xFDEAEAEB, 0xFFF1F1F1, 0xFFF5F5F5, 0xFFF5F5F5, - 0xFFF4F4F4, 0xFFF3F3F3, 0xFFF2F2F2, 0xFFF1F1F1, 0xFFF1F1F1, 0xFFF2F2F2, 0xFFF3F3F3, 0xFFF4F4F4, 0xFFF6F6F6, - 0xFFF8F8F8, 0xFFFAFAFA, 0xFFFBFBFC, 0xFFFDFDFD, 0xFFFEFEFE, 0xFFFBFBFC, 0xFFF8F8F8, 0xFFF3F4F4, 0xFFECEDEE, - 0xFFE7E8E9, 0xFFE1E2E3, 0xFFDEDFDF, 0xFFDADCDD, 0xFFD8D9DA, 0xFFD6D8D9, 0xFFD4D6D7, 0xFFD5D6D8, 0xC8BABFC1, - 0xB9FA5A6, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x31D2424, 0xF6C7979, 0x249FA3A3, 0x3FAFB3B6, - 0x5FBABEBF, 0x85C1C3C5, 0xACCBCDCD, 0xC8D8DADA, 0xE2E1E3E3, 0xF8E5E7E6, 0xFFEEEFEF, 0xFFF5F5F5, 0xFFF6F6F6, - 0xFFF5F5F5, 0xFFF4F4F4, 0xFFF2F2F2, 0xFFF2F2F2, 0xFFF1F1F1, 0xFFF2F2F2, 0xFFF1F1F1, 0xFFF2F2F2, 0xFFF3F3F3, - 0xFFF2F2F2, 0xFFF3F3F3, 0xFFF5F5F5, 0xFFF7F7F7, 0xFFF9F9F9, 0xFFFBFBFB, 0xFFFCFCFC, 0xFFFDFDFD, 0xFFFDFDFD, - 0xFFFBFBFB, 0xFFF7F7F8, 0xFFF2F3F2, 0xFFEDEDEE, 0xFFE7E8E9, 0xFFE2E3E4, 0xFFDDDFE0, 0xFFDBDCDD, 0xFFD9DADB, - 0xFFD7D8D9, 0xFFD5D6D7, 0xFFD3D4D5, 0xFFD1D2D3, 0xFFCFD0D2, 0xFFCCCED0, 0xFFC9CCCD, 0xFFC6C9CA, 0x3EA1A6A8, - 0x193999B, 0x0, 0x0, 0xE1E1D9, 0x6DDDDD6, 0x18AEB8B6, 0x2EBBBEBF, 0x49C0C3C4, 0x6DC0C5C5, 0x93CACBCD, 0xB7D3D5D6, - 0xD1DEDFE0, 0xEAE4E5E5, 0xF9E8E9E9, 0xFFF0F1F1, 0xFFF4F4F4, 0xFFF5F5F5, 0xFFF4F4F4, 0xFFF3F3F3, 0xFFF2F2F2, - 0xFFF1F1F1, 0xFFF2F2F2, 0xFFF2F2F2, 0xFFF2F2F2, 0xFFF2F2F2, 0xFFF1F1F1, 0xFFF2F2F2, 0xFFF3F3F3, 0xFFF3F3F3, - 0xFFF4F4F4, 0xFFF5F5F5, 0xFFF6F6F6, 0xFFF8F8F8, 0xFFFAFAFA, 0xFFFBFBFB, 0xFFFCFCFD, 0xFFFDFDFD, 0xFFFDFDFD, - 0xFFFAFBFC, 0xFFF7F7F8, 0xFFF2F3F3, 0xFFEDEEEE, 0xFFE8E9EA, 0xFFE3E4E5, 0xFFDFE0E1, 0xFFDBDCDE, 0xFFD9DADB, - 0xFFD7D8D9, 0xFFD5D6D7, 0xFFD3D4D5, 0xFFD0D2D3, 0xFFCED0D1, 0xFFCCCECF, 0xFFCACCCD, 0xFFC7CACB, 0xFFC5C8CA, - 0xFFC3C5C7, 0xFFC0C3C5, 0xFFC1C4C6, 0x57A5A8AA, 0x19EA2A4, 0x0, 0x0, 0x56969BA2, 0xE05F6371, 0xF45E626F, - 0xFD727680, 0xFF8B8E97, 0xFF9EA0A8, 0xFFADB0B5, 0xFFBABCC0, 0xFFC6C8CB, 0xFFD3D4D6, 0xFFDCDDDE, 0xFFE4E5E6, - 0xFFEDEDED, 0xFFEFF0F0, 0xFFF2F2F2, 0xFFF4F4F4, 0xFFF5F5F4, 0xFFF5F5F4, 0xFFF4F4F4, 0xFFF3F3F3, 0xFFF2F2F2, - 0xFFF3F3F3, 0xFFF4F4F4, 0xFFF6F6F6, 0xFFF7F7F7, 0xFFF9F9F9, 0xFFFBFBFB, 0xFFFCFCFC, 0xFFFCFCFC, 0xFFFDFDFD, - 0xFFFCFCFC, 0xFFFBFBFB, 0xFFF7F8F8, 0xFFF3F4F4, 0xFFEFEFF0, 0xFFEAEAEA, 0xFFE4E5E6, 0xFFE0E1E2, 0xFFDCDDDE, - 0xFFDADBDC, 0xFFD7D8DA, 0xFFD5D6D7, 0xFFD3D5D6, 0xFFD0D2D4, 0xFFCED0D2, 0xFFCDCED0, 0xFFCBCCCE, 0xFFC8CBCC, - 0xFFC6C8CA, 0xFFC3C6C7, 0xFFC1C4C5, 0xFFBEC2C3, 0xFFBCBFC2, 0xFFBBBDBF, 0xFFB8BBBD, 0xFFB9BCBE, 0x63A0A7A9, - 0x29BA2A4, 0x0, 0x0, 0xDC656976, 0xFF363A4C, 0xFF373B4E, 0xFF363A4D, 0xFF363A4C, 0xFF35394C, 0xFF35394B, - 0xFF363A4C, 0xFF373B4D, 0xFF383C4E, 0xFF424555, 0xFF4B4F5C, 0xFF565962, 0xFF63666E, 0xFF727479, 0xFF7F8285, - 0xFF8F9294, 0xFFA0A1A4, 0xFFAFB1B3, 0xFFCACCCE, 0xFFF3F3F4, 0xFFFCFCFB, 0xFFFBFBFB, 0xFFFCFCFC, 0xFFFCFCFC, - 0xFFFCFCFC, 0xFFFCFCFC, 0xFFFBFBFB, 0xFFF8F8F9, 0xFFF5F5F5, 0xFFF0F0F0, 0xFFEAEBEB, 0xFFE5E6E7, 0xFFE1E2E3, - 0xFFDDDEDF, 0xFFDADBDC, 0xFFD8D9DA, 0xFFD5D7D8, 0xFFD3D5D6, 0xFFD1D3D4, 0xFFCFD0D2, 0xFFCDCED0, 0xFFCBCDCE, - 0xFFC8CACC, 0xFFC6C8CA, 0xFFC3C6C8, 0xFFC1C4C5, 0xFFBFC2C4, 0xFFBCBFC1, 0xFFBABDBF, 0xFFB8BBBD, 0xFFB6B9BB, - 0xFFB4B7B9, 0xFFB2B5B7, 0xFFAFB3B5, 0xFFB1B4B7, 0x729EA1A5, 0x29B9EA2, 0x0, 0x0, 0xFE5B5F6D, 0xFF383C4E, - 0xFF393D4F, 0xFF393D4F, 0xFF393D4F, 0xFF393D4F, 0xFF383C4E, 0xFF393D4F, 0xFF3B3F50, 0xFF454957, 0xFF52545C, - 0xFF53565D, 0xFF55585E, 0xFF585B61, 0xFF5C5D62, 0xFF626367, 0xFF686A6E, 0xFF707276, 0xFF76787C, 0xFF7F8285, - 0xFFACAFB1, 0xFFF3F4F4, 0xFFFCFCFB, 0xFFFAFAFA, 0xFFF8F8F9, 0xFFF5F5F5, 0xFFF0F0F1, 0xFFEBECED, 0xFFE7E8E8, - 0xFFE2E3E3, 0xFFDDDEDF, 0xFFDADBDC, 0xFFD8D9DA, 0xFFD6D7D8, 0xFFD4D5D6, 0xFFD2D3D4, 0xFFD0D1D2, 0xFFCECFD0, - 0xFFCBCDCE, 0xFFC9CBCD, 0xFFC6C8CA, 0xFFC4C7C8, 0xFFC2C4C6, 0xFFBFC2C4, 0xFFBDC0C1, 0xFFBBBEC0, 0xFFB9BCBE, - 0xFFB7BABC, 0xFFB4B7B9, 0xFFB2B5B8, 0xFFB0B3B6, 0xFFAEB2B4, 0xFFACB0B2, 0xFFAAAEB0, 0xFFA8ABAE, 0xFFA9ADAF, - 0x739A9FA1, 0x2979C9E, 0x0, 0x0, 0xD4676B78, 0xFF373B4D, 0xFF393D4F, 0xFF393D4F, 0xFF393D4F, 0xFF383C4E, - 0xFF393D4F, 0xFF3D4051, 0xFF454A56, 0xFF54585A, 0xFF535556, 0xFF545759, 0xFF575A5B, 0xFF595C5E, 0xFF5C5F61, - 0xFF5E6163, 0xFF636668, 0xFF686B6E, 0xFF6E7173, 0xFF75797B, 0xFF7F8386, 0xFFB3B5B7, 0xFFF6F7F8, 0xFFEDEDEE, - 0xFFE7E8E9, 0xFFE3E4E5, 0xFFDFE0E1, 0xFFDBDCDD, 0xFFD8DBDC, 0xFFD7D8D9, 0xFFD4D5D7, 0xFFD3D3D6, 0xFFD0D1D3, - 0xFFCECFD1, 0xFFCCCDCF, 0xFFC9CBCD, 0xFFC7C9CB, 0xFFC5C7C9, 0xFFC2C5C7, 0xFFC0C2C4, 0xFFBDC0C2, 0xFFBBBEC0, - 0xFFB9BCBE, 0xFFB7BABC, 0xFFB4B8BA, 0xFFB3B6B8, 0xFFB1B4B6, 0xFFAEB2B4, 0xFFACAFB2, 0xFFAAAEB0, 0xFFA8ACAE, - 0xFFA6AAAC, 0xFFA3A8AA, 0xFFA2A6A9, 0xFFA0A4A6, 0xEB9A9FA1, 0x45969A9E, 0x195999D, 0x0, 0x0, 0x7A868993, - 0xFF3B3F51, 0xFF383C4E, 0xFF383C4E, 0xFF393D4F, 0xFF3A3E50, 0xFF3E4252, 0xFF444754, 0xFF53565D, 0xFF555858, - 0xFF56595B, 0xFF585B5D, 0xFF5A5D5F, 0xFF5C6061, 0xFF5E6264, 0xFF616466, 0xFF636668, 0xFF66696B, 0xFF686B6D, - 0xFF6C6F71, 0xFF6D7073, 0xFF848789, 0xFFC5C8C9, 0xFFE0E1E2, 0xFFDADBDC, 0xFFD8D9DA, 0xFFD5D7D8, 0xFFD3D5D6, - 0xFFD1D3D4, 0xFFCFD1D2, 0xFFCDCECF, 0xFFCACDCD, 0xFFC7CACB, 0xFFC5C7C9, 0xFFC3C5C7, 0xFFC0C3C4, 0xFFBEC1C2, - 0xFFBCBFC0, 0xFFBABDBF, 0xFFB8BBBD, 0xFFB5B8BA, 0xFFB3B6B9, 0xFFB1B4B7, 0xFFAFB2B4, 0xFFADB0B2, 0xFFAAAEB1, - 0xFFA8ACAF, 0xFFA6AAAD, 0xFFA4A8AA, 0xFFA2A6A9, 0xFFA0A4A7, 0xFF9FA3A6, 0xFF989C9F, 0xFF838789, 0xFF6D7072, - 0xAA6A6D70, 0x56B6E71, 0x0, 0x1000000, 0x0, 0x17C0C5C9, 0xEC5A5E6C, 0xFF373B4D, 0xFF393D4F, 0xFF3B3F50, 0xFF3F4353, - 0xFF454855, 0xFF4A4D57, 0xFF56595F, 0xFF575A5C, 0xFF595C5E, 0xFF5B5F61, 0xFF5D6062, 0xFF606365, 0xFF646769, - 0xFF666A6C, 0xFF686C6E, 0xFF6B6E71, 0xFF6F7274, 0xFF737678, 0xFF777A7D, 0xFF7B7E81, 0xFF9FA1A4, 0xFFD4D5D6, - 0xFFD1D3D4, 0xFFCFD1D2, 0xFFCCCED0, 0xFFCACCCE, 0xFFC9CBCC, 0xFFC6C8CA, 0xFFC2C5C7, 0xFFC1C4C6, 0xFFBEC1C3, - 0xFFBCBFC1, 0xFFBABDBF, 0xFFB7BABC, 0xFFB5B8BA, 0xFFB3B6B8, 0xFFB1B4B7, 0xFFAFB3B5, 0xFFADB0B2, 0xFFAAAEB1, - 0xFFA8ACAF, 0xFFA6AAAC, 0xFFA4A8AA, 0xFFA2A6A9, 0xFFA0A4A7, 0xFF9EA2A5, 0xFF9CA1A3, 0xFF9A9EA1, 0xFF8C9094, - 0xFF75787A, 0xFF686A6D, 0xFF6E6F72, 0xFF787B7E, 0xAE7C7E81, 0x75D5E60, 0x3000000, 0x3000000, 0x2000000, 0x90949C, - 0x718C9098, 0xFF3F4455, 0xFF3C3F50, 0xFF414453, 0xFF464956, 0xFF4B4E59, 0xFF50525A, 0xFF5B5D62, 0xFF5B5E60, - 0xFF5D6062, 0xFF505355, 0xFF1F1F20, 0xFF262727, 0xFF303131, 0xFF3A3C3D, 0xFF47494A, 0xFF545658, 0xFF616364, - 0xFF6E7171, 0xFF797C7E, 0xFF818487, 0xFF919496, 0xFFB8BABC, 0xFFCBCECF, 0xFFC6C8CA, 0xFFC3C6C8, 0xFFC1C4C6, - 0xFFC0C2C4, 0xFFBDC0C2, 0xFFBABDBF, 0xFFB8BBBD, 0xFFB6B9BB, 0xFFB4B7B9, 0xFFB2B5B7, 0xFFAFB3B5, 0xFFADB1B3, - 0xFFABAFB1, 0xFFA9ADAF, 0xFFA7ABAD, 0xFFA5A8AB, 0xFFA2A6A9, 0xFFA0A5A7, 0xFF9EA2A5, 0xFF9CA0A3, 0xFF9A9FA1, - 0xFF989DA0, 0xFF93979A, 0xFF7F8386, 0xFF6B6F71, 0xFF6A6C6F, 0xFF75777A, 0xFF7B7D80, 0xFF7A7C7F, 0xFF76787C, - 0x9776797D, 0x8404345, 0x5000000, 0x4000000, 0x3000000, 0xFFFFFF, 0xACFD0D3, 0xC970737F, 0xFF404452, 0xFF474A57, - 0xFF4C4F59, 0xFF51545C, 0xFF56595E, 0xFF5F6365, 0xFF5F6264, 0xFF616466, 0xFF505153, 0xFF151414, 0xFF1A1A1A, - 0xFF191919, 0xFF1A1A1A, 0xFF242424, 0xFF3A3B3F, 0xFF404248, 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0xFF8F9497, 0xFF7D8183, 0xFF6C6E71, 0xFF6C6E71, - 0xFF787A7D, 0xFF7E8083, 0xFF7C7E82, 0xFF777A7D, 0xFF747679, 0xFF707275, 0xFF6D6F72, 0xFF6F7174, 0xD3787B7E, - 0x146F7076, 0x5000000, 0x5000000, 0x4000000, 0x3000000, 0x0, 0x0, 0x29A9DA3, 0x7C91949A, 0xFF595C62, 0xFF595B60, - 0xFF606266, 0xFF686B6E, 0xFF6C7072, 0xFF686B6D, 0xFF696D6F, 0xFF56585A, 0xFF161515, 0xFF20201F, 0xFF4E5058, - 0xFF858AA1, 0xFF474F63, 0xFF343F51, 0xFF364153, 0xFF40495E, 0xFF616880, 0xFF696D84, 0xFF555C6C, 0xFF647082, - 0xFF8C949F, 0xFFAFB3B4, 0xFFABAFB1, 0xFFA9ADAF, 0xFFA7ABAD, 0xFFA5A9AB, 0xFFA2A6A8, 0xFFA1A4A6, 0xFF9EA2A4, - 0xFF9BA0A3, 0xFF999EA1, 0xFF979C9E, 0xFF959A9D, 0xFF94999C, 0xFF959A9D, 0xFF93989B, 0xFF868B8E, 0xFF737679, - 0xFF6A6C6F, 0xFF737678, 0xFF7E8083, 0xFF808285, 0xFF7C7E81, 0xFF777A7D, 0xFF747679, 0xFF6F7174, 0xFF6C6E71, - 0xFF6F7174, 0xFF797B7E, 0xE3808385, 0x2C797C7E, 0x70E0F0F, 0x6000000, 0x4000000, 0x4000000, 0x2000000, 0x0, 0x0, - 0x0, 0xBBCBEC0, 0xBF878B8E, 0xFF616468, 0xFF6A6C70, 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0xFF6E6C7F, 0xFFB7B8BC, 0xFFA7ABAD, 0xFF8A8F92, 0xFF787B7E, - 0xFF6B6E70, 0xFF737578, 0xFF828487, 0xFF898B8E, 0xFF87898C, 0xFF828487, 0xFF7E8082, 0xFF797B7F, 0xFF75777B, - 0xFF717477, 0xFF6D7073, 0xFF6D6E71, 0xFF737577, 0xFF7D7F82, 0xFF858689, 0xD17E8083, 0x675C6062, 0x23000000, - 0x78666769, 0x7A6B6C6E, 0x28242525, 0x1C000000, 0x1A000000, 0x18000000, 0x15000000, 0x12000000, 0x10000000, - 0xC000000, 0x9000000, 0x5000000, 0x2000000, 0x0, 0x0, 0x0, 0x0, 0x0, 0x2000000, 0x10000000, 0x29212223, 0x9F868A8C, - 0xFF9EA3A6, 0xFF9CA0A3, 0xFF7E8083, 0xFF272726, 0xFF4E4E53, 0xFF7A819A, 0xFF808D9F, 0xFF9AACB8, 0xFF7C8A98, - 0xFF48576A, 0xFF1B2D44, 0xFF43556B, 0xFF5C6E85, 0xFF303C5A, 0xFF4A5071, 0xFF6E7084, 0xFFBCBEC2, 0xFFC1C3C5, - 0xFF9A9C9F, 0xFF787A7D, 0xFF87898C, 0xFF898B8F, 0xFF86888B, 0xFF818386, 0xFF7D7F82, 0xFF797B7F, 0xFF75777B, - 0xFF717376, 0xFF6D6F72, 0xFF6D6F71, 0xFF747578, 0xFF7E7F82, 0xFF858689, 0xD97F8284, 0x765E6163, 0x35141515, - 0x2C000000, 0x23000000, 0xBD727275, 0x52525354, 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0x0, 0x0, 0x0, 0x0, 0x0, 0x0, - 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, - 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, - 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, - 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, - 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, - 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, - 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, - 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, - 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, - 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, - 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, -]; From 663b5b094dbf63333ca31821b51771e5670535d7 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Jo=C3=ABl=20Schulz-Ansres?= Date: Tue, 14 May 2024 13:45:37 +0200 Subject: [PATCH 308/581] Add helper functions --- embassy-stm32/src/dsihost.rs | 38 ++++++++++++++++++++++++++++++++++-- 1 file changed, 36 insertions(+), 2 deletions(-) diff --git a/embassy-stm32/src/dsihost.rs b/embassy-stm32/src/dsihost.rs index 9bcdc34cc..af020f0ff 100644 --- a/embassy-stm32/src/dsihost.rs +++ b/embassy-stm32/src/dsihost.rs @@ -171,7 +171,7 @@ impl<'d, T: Instance> DsiHost<'d, T> { /// Write long DCS or long Generic command. /// - /// `params` is expected to contain at least 3 elements. Use [`short_write`] for 2 or less. + /// `params` is expected to contain at least 2 elements. Use [`short_write`] for a single element. fn long_write(&mut self, channel_id: u8, packet_type: PacketType, address: u8, data: &[u8]) -> Result<(), Error> { // Must be a long packet if we do the long write, obviously. assert!(matches!( @@ -343,9 +343,31 @@ impl<'d, T: Instance> DsiHost<'d, T> { Err(Error::FifoTimeout) } + fn wait_command_fifo_not_full(&self) -> Result<(), Error> { + for _ in 1..1000 { + // Wait for Command FIFO not empty + if !T::regs().gpsr().read().cmdff() { + return Ok(()); + } + blocking_delay_ms(1); + } + Err(Error::FifoTimeout) + } + + fn wait_read_not_busy(&self) -> Result<(), Error> { + for _ in 1..1000 { + // Wait for read not busy + if !T::regs().gpsr().read().rcb() { + return Ok(()); + } + blocking_delay_ms(1); + } + Err(Error::ReadTimeout) + } + fn wait_payload_read_fifo_not_empty(&self) -> Result<(), Error> { for _ in 1..1000 { - // Wait for payload read FIFO empty + // Wait for payload read FIFO not empty if !T::regs().gpsr().read().prdfe() { return Ok(()); } @@ -353,6 +375,14 @@ impl<'d, T: Instance> DsiHost<'d, T> { } Err(Error::FifoTimeout) } + + fn packet_size_error(&self) -> bool { + T::regs().isr1().read().pse() + } + + fn read_busy(&self) -> bool { + T::regs().gpsr().read().rcb() + } } /// Possible Error Types for DSI HOST @@ -365,6 +395,10 @@ pub enum Error { InvalidPacketType, /// Provided read size does not match the read buffer length InvalidReadSize, + /// Error during read + ReadError, + /// Read operation timed out + ReadTimeout, } impl<'d, T: Instance> Drop for DsiHost<'d, T> { From 620d182c5a10f1e753468d9166d9d7592c992ae7 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Jo=C3=ABl=20Schulz-Ansres?= Date: Tue, 14 May 2024 13:53:02 +0200 Subject: [PATCH 309/581] Use read_busy function --- embassy-stm32/src/dsihost.rs | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/embassy-stm32/src/dsihost.rs b/embassy-stm32/src/dsihost.rs index af020f0ff..f1c737fdc 100644 --- a/embassy-stm32/src/dsihost.rs +++ b/embassy-stm32/src/dsihost.rs @@ -332,6 +332,7 @@ impl<'d, T: Instance> DsiHost<'d, T> { */ Ok(()) } + fn wait_command_fifo_empty(&self) -> Result<(), Error> { for _ in 1..1000 { // Wait for Command FIFO empty @@ -357,7 +358,7 @@ impl<'d, T: Instance> DsiHost<'d, T> { fn wait_read_not_busy(&self) -> Result<(), Error> { for _ in 1..1000 { // Wait for read not busy - if !T::regs().gpsr().read().rcb() { + if !self.read_busy() { return Ok(()); } blocking_delay_ms(1); @@ -376,7 +377,7 @@ impl<'d, T: Instance> DsiHost<'d, T> { Err(Error::FifoTimeout) } - fn packet_size_error(&self) -> bool { + fn _packet_size_error(&self) -> bool { T::regs().isr1().read().pse() } From 3e399a9690b1623ce43ea94bf626bda573fac38b Mon Sep 17 00:00:00 2001 From: Karun Date: Tue, 14 May 2024 12:45:07 -0400 Subject: [PATCH 310/581] update to remove dma generics --- embassy-stm32/src/ospi/mod.rs | 899 ++++++++++++++++++---------------- 1 file changed, 478 insertions(+), 421 deletions(-) diff --git a/embassy-stm32/src/ospi/mod.rs b/embassy-stm32/src/ospi/mod.rs index c25ac4d24..536da4ca0 100644 --- a/embassy-stm32/src/ospi/mod.rs +++ b/embassy-stm32/src/ospi/mod.rs @@ -5,13 +5,16 @@ pub mod enums; +use core::marker::PhantomData; + use embassy_embedded_hal::{GetConfig, SetConfig}; use embassy_hal_internal::{into_ref, PeripheralRef}; pub use enums::*; use stm32_metapac::octospi::vals::{PhaseMode, SizeInBits}; -use crate::dma::{word, Transfer}; -use crate::gpio::{AFType, AnyPin, Pull, SealedPin as _}; +use crate::dma::{word, ChannelAndRequest}; +use crate::gpio::{AFType, AnyPin, Pull, SealedPin as _, Speed}; +use crate::mode::{Async, Blocking, Mode as PeriMode}; use crate::pac::octospi::{vals, Octospi as Regs}; use crate::rcc::RccPeripheral; use crate::{peripherals, Peripheral}; @@ -154,7 +157,7 @@ pub enum OspiError { } /// OSPI driver. -pub struct Ospi<'d, T: Instance, Dma> { +pub struct Ospi<'d, T: Instance, M: PeriMode> { _peri: PeripheralRef<'d, T>, sck: Option>, d0: Option>, @@ -167,259 +170,13 @@ pub struct Ospi<'d, T: Instance, Dma> { d7: Option>, nss: Option>, dqs: Option>, - dma: PeripheralRef<'d, Dma>, + dma: Option>, + _phantom: PhantomData, config: Config, width: OspiWidth, } -impl<'d, T: Instance, Dma> Ospi<'d, T, Dma> { - /// Create new OSPI driver for a single spi external chip - pub fn new_singlespi( - peri: impl Peripheral

+ 'd, - sck: impl Peripheral

> + 'd, - d0: impl Peripheral

> + 'd, - d1: impl Peripheral

> + 'd, - nss: impl Peripheral

> + 'd, - dma: impl Peripheral

+ 'd, - config: Config, - ) -> Self { - into_ref!(peri, sck, d0, d1, nss); - - sck.set_as_af_pull(sck.af_num(), AFType::OutputPushPull, Pull::None); - sck.set_speed(crate::gpio::Speed::VeryHigh); - nss.set_as_af_pull(nss.af_num(), AFType::OutputPushPull, Pull::Up); - nss.set_speed(crate::gpio::Speed::VeryHigh); - d0.set_as_af_pull(d0.af_num(), AFType::OutputPushPull, Pull::None); - d0.set_speed(crate::gpio::Speed::VeryHigh); - d1.set_as_af_pull(d1.af_num(), AFType::Input, Pull::None); - d1.set_speed(crate::gpio::Speed::VeryHigh); - - Self::new_inner( - peri, - Some(d0.map_into()), - Some(d1.map_into()), - None, - None, - None, - None, - None, - None, - Some(sck.map_into()), - Some(nss.map_into()), - None, - dma, - config, - OspiWidth::SING, - false, - ) - } - - /// Create new OSPI driver for a dualspi external chip - pub fn new_dualspi( - peri: impl Peripheral

+ 'd, - sck: impl Peripheral

> + 'd, - d0: impl Peripheral

> + 'd, - d1: impl Peripheral

> + 'd, - nss: impl Peripheral

> + 'd, - dma: impl Peripheral

+ 'd, - config: Config, - ) -> Self { - into_ref!(peri, sck, d0, d1, nss); - - sck.set_as_af_pull(sck.af_num(), AFType::OutputPushPull, Pull::None); - sck.set_speed(crate::gpio::Speed::VeryHigh); - nss.set_as_af_pull(nss.af_num(), AFType::OutputPushPull, Pull::Up); - nss.set_speed(crate::gpio::Speed::VeryHigh); - d0.set_as_af_pull(d0.af_num(), AFType::OutputPushPull, Pull::None); - d0.set_speed(crate::gpio::Speed::VeryHigh); - d1.set_as_af_pull(d1.af_num(), AFType::OutputPushPull, Pull::None); - d1.set_speed(crate::gpio::Speed::VeryHigh); - - Self::new_inner( - peri, - Some(d0.map_into()), - Some(d1.map_into()), - None, - None, - None, - None, - None, - None, - Some(sck.map_into()), - Some(nss.map_into()), - None, - dma, - config, - OspiWidth::DUAL, - false, - ) - } - - /// Create new OSPI driver for a quadspi external chip - pub fn new_quadspi( - peri: impl Peripheral

+ 'd, - sck: impl Peripheral

> + 'd, - d0: impl Peripheral

> + 'd, - d1: impl Peripheral

> + 'd, - d2: impl Peripheral

> + 'd, - d3: impl Peripheral

> + 'd, - nss: impl Peripheral

> + 'd, - dma: impl Peripheral

+ 'd, - config: Config, - ) -> Self { - into_ref!(peri, sck, d0, d1, d2, d3, nss); - - sck.set_as_af_pull(sck.af_num(), AFType::OutputPushPull, Pull::None); - sck.set_speed(crate::gpio::Speed::VeryHigh); - nss.set_as_af_pull(nss.af_num(), AFType::OutputPushPull, Pull::Up); - nss.set_speed(crate::gpio::Speed::VeryHigh); - d0.set_as_af_pull(d0.af_num(), AFType::OutputPushPull, Pull::None); - d0.set_speed(crate::gpio::Speed::VeryHigh); - d1.set_as_af_pull(d1.af_num(), AFType::OutputPushPull, Pull::None); - d1.set_speed(crate::gpio::Speed::VeryHigh); - d2.set_as_af_pull(d2.af_num(), AFType::OutputPushPull, Pull::None); - d2.set_speed(crate::gpio::Speed::VeryHigh); - d3.set_as_af_pull(d3.af_num(), AFType::OutputPushPull, Pull::None); - d3.set_speed(crate::gpio::Speed::VeryHigh); - - Self::new_inner( - peri, - Some(d0.map_into()), - Some(d1.map_into()), - Some(d2.map_into()), - Some(d3.map_into()), - None, - None, - None, - None, - Some(sck.map_into()), - Some(nss.map_into()), - None, - dma, - config, - OspiWidth::QUAD, - false, - ) - } - - /// Create new OSPI driver for two quadspi external chips - pub fn new_dualquadspi( - peri: impl Peripheral

+ 'd, - sck: impl Peripheral

> + 'd, - d0: impl Peripheral

> + 'd, - d1: impl Peripheral

> + 'd, - d2: impl Peripheral

> + 'd, - d3: impl Peripheral

> + 'd, - d4: impl Peripheral

> + 'd, - d5: impl Peripheral

> + 'd, - d6: impl Peripheral

> + 'd, - d7: impl Peripheral

> + 'd, - nss: impl Peripheral

> + 'd, - dma: impl Peripheral

+ 'd, - config: Config, - ) -> Self { - into_ref!(peri, sck, d0, d1, d2, d3, d4, d5, d6, d7, nss); - - sck.set_as_af_pull(sck.af_num(), AFType::OutputPushPull, Pull::None); - sck.set_speed(crate::gpio::Speed::VeryHigh); - nss.set_as_af_pull(nss.af_num(), AFType::OutputPushPull, Pull::Up); - nss.set_speed(crate::gpio::Speed::VeryHigh); - d0.set_as_af_pull(d0.af_num(), AFType::OutputPushPull, Pull::None); - d0.set_speed(crate::gpio::Speed::VeryHigh); - d1.set_as_af_pull(d1.af_num(), AFType::OutputPushPull, Pull::None); - d1.set_speed(crate::gpio::Speed::VeryHigh); - d2.set_as_af_pull(d2.af_num(), AFType::OutputPushPull, Pull::None); - d2.set_speed(crate::gpio::Speed::VeryHigh); - d3.set_as_af_pull(d3.af_num(), AFType::OutputPushPull, Pull::None); - d3.set_speed(crate::gpio::Speed::VeryHigh); - d4.set_as_af_pull(d4.af_num(), AFType::OutputPushPull, Pull::None); - d4.set_speed(crate::gpio::Speed::VeryHigh); - d5.set_as_af_pull(d5.af_num(), AFType::OutputPushPull, Pull::None); - d5.set_speed(crate::gpio::Speed::VeryHigh); - d6.set_as_af_pull(d6.af_num(), AFType::OutputPushPull, Pull::None); - d6.set_speed(crate::gpio::Speed::VeryHigh); - d7.set_as_af_pull(d7.af_num(), AFType::OutputPushPull, Pull::None); - d7.set_speed(crate::gpio::Speed::VeryHigh); - - Self::new_inner( - peri, - Some(d0.map_into()), - Some(d1.map_into()), - Some(d2.map_into()), - Some(d3.map_into()), - Some(d4.map_into()), - Some(d5.map_into()), - Some(d6.map_into()), - Some(d7.map_into()), - Some(sck.map_into()), - Some(nss.map_into()), - None, - dma, - config, - OspiWidth::QUAD, - true, - ) - } - - /// Create new OSPI driver for octospi external chips - pub fn new_octospi( - peri: impl Peripheral

+ 'd, - sck: impl Peripheral

> + 'd, - d0: impl Peripheral

> + 'd, - d1: impl Peripheral

> + 'd, - d2: impl Peripheral

> + 'd, - d3: impl Peripheral

> + 'd, - d4: impl Peripheral

> + 'd, - d5: impl Peripheral

> + 'd, - d6: impl Peripheral

> + 'd, - d7: impl Peripheral

> + 'd, - nss: impl Peripheral

> + 'd, - dma: impl Peripheral

+ 'd, - config: Config, - ) -> Self { - into_ref!(peri, sck, d0, d1, d2, d3, d4, d5, d6, d7, nss); - - sck.set_as_af_pull(sck.af_num(), AFType::OutputPushPull, Pull::None); - sck.set_speed(crate::gpio::Speed::VeryHigh); - nss.set_as_af_pull(nss.af_num(), AFType::OutputPushPull, Pull::Up); - nss.set_speed(crate::gpio::Speed::VeryHigh); - d0.set_as_af_pull(d0.af_num(), AFType::OutputPushPull, Pull::None); - d0.set_speed(crate::gpio::Speed::VeryHigh); - d1.set_as_af_pull(d1.af_num(), AFType::OutputPushPull, Pull::None); - d1.set_speed(crate::gpio::Speed::VeryHigh); - d2.set_as_af_pull(d2.af_num(), AFType::OutputPushPull, Pull::None); - d2.set_speed(crate::gpio::Speed::VeryHigh); - d3.set_as_af_pull(d3.af_num(), AFType::OutputPushPull, Pull::None); - d3.set_speed(crate::gpio::Speed::VeryHigh); - d4.set_as_af_pull(d4.af_num(), AFType::OutputPushPull, Pull::None); - d4.set_speed(crate::gpio::Speed::VeryHigh); - d5.set_as_af_pull(d5.af_num(), AFType::OutputPushPull, Pull::None); - d5.set_speed(crate::gpio::Speed::VeryHigh); - d6.set_as_af_pull(d6.af_num(), AFType::OutputPushPull, Pull::None); - d6.set_speed(crate::gpio::Speed::VeryHigh); - d7.set_as_af_pull(d7.af_num(), AFType::OutputPushPull, Pull::None); - d7.set_speed(crate::gpio::Speed::VeryHigh); - - Self::new_inner( - peri, - Some(d0.map_into()), - Some(d1.map_into()), - Some(d2.map_into()), - Some(d3.map_into()), - Some(d4.map_into()), - Some(d5.map_into()), - Some(d6.map_into()), - Some(d7.map_into()), - Some(sck.map_into()), - Some(nss.map_into()), - None, - dma, - config, - OspiWidth::OCTO, - false, - ) - } - +impl<'d, T: Instance, M: PeriMode> Ospi<'d, T, M> { fn new_inner( peri: impl Peripheral

+ 'd, d0: Option>, @@ -433,12 +190,12 @@ impl<'d, T: Instance, Dma> Ospi<'d, T, Dma> { sck: Option>, nss: Option>, dqs: Option>, - dma: impl Peripheral

+ 'd, + dma: Option>, config: Config, width: OspiWidth, dual_quad: bool, ) -> Self { - into_ref!(peri, dma); + into_ref!(peri); // System configuration T::enable_and_reset(); @@ -519,6 +276,7 @@ impl<'d, T: Instance, Dma> Ospi<'d, T, Dma> { nss, dqs, dma, + _phantom: PhantomData, config, width, } @@ -702,170 +460,6 @@ impl<'d, T: Instance, Dma> Ospi<'d, T, Dma> { Ok(()) } - /// Blocking read with DMA transfer - pub fn blocking_read_dma(&mut self, buf: &mut [W], transaction: TransferConfig) -> Result<(), OspiError> - where - Dma: OctoDma, - { - if buf.is_empty() { - return Err(OspiError::EmptyBuffer); - } - - // Wait for peripheral to be free - while T::REGS.sr().read().busy() {} - - self.configure_command(&transaction, Some(buf.len()))?; - - let current_address = T::REGS.ar().read().address(); - let current_instruction = T::REGS.ir().read().instruction(); - - // For a indirect read transaction, the transaction begins when the instruction/address is set - T::REGS.cr().modify(|v| v.set_fmode(vals::FunctionalMode::INDIRECTREAD)); - if T::REGS.ccr().read().admode() == vals::PhaseMode::NONE { - T::REGS.ir().write(|v| v.set_instruction(current_instruction)); - } else { - T::REGS.ar().write(|v| v.set_address(current_address)); - } - - let request = self.dma.request(); - let transfer = unsafe { - Transfer::new_read( - &mut self.dma, - request, - T::REGS.dr().as_ptr() as *mut W, - buf, - Default::default(), - ) - }; - - T::REGS.cr().modify(|w| w.set_dmaen(true)); - - transfer.blocking_wait(); - - finish_dma(T::REGS); - - Ok(()) - } - - /// Blocking write with DMA transfer - pub fn blocking_write_dma(&mut self, buf: &[W], transaction: TransferConfig) -> Result<(), OspiError> - where - Dma: OctoDma, - { - if buf.is_empty() { - return Err(OspiError::EmptyBuffer); - } - - // Wait for peripheral to be free - while T::REGS.sr().read().busy() {} - - self.configure_command(&transaction, Some(buf.len()))?; - T::REGS - .cr() - .modify(|v| v.set_fmode(vals::FunctionalMode::INDIRECTWRITE)); - - let request = self.dma.request(); - let transfer = unsafe { - Transfer::new_write( - &mut self.dma, - request, - buf, - T::REGS.dr().as_ptr() as *mut W, - Default::default(), - ) - }; - - T::REGS.cr().modify(|w| w.set_dmaen(true)); - - transfer.blocking_wait(); - - finish_dma(T::REGS); - - Ok(()) - } - - /// Asynchronous read from external device - pub async fn read(&mut self, buf: &mut [W], transaction: TransferConfig) -> Result<(), OspiError> - where - Dma: OctoDma, - { - if buf.is_empty() { - return Err(OspiError::EmptyBuffer); - } - - // Wait for peripheral to be free - while T::REGS.sr().read().busy() {} - - self.configure_command(&transaction, Some(buf.len()))?; - - let current_address = T::REGS.ar().read().address(); - let current_instruction = T::REGS.ir().read().instruction(); - - // For a indirect read transaction, the transaction begins when the instruction/address is set - T::REGS.cr().modify(|v| v.set_fmode(vals::FunctionalMode::INDIRECTREAD)); - if T::REGS.ccr().read().admode() == vals::PhaseMode::NONE { - T::REGS.ir().write(|v| v.set_instruction(current_instruction)); - } else { - T::REGS.ar().write(|v| v.set_address(current_address)); - } - - let request = self.dma.request(); - let transfer = unsafe { - Transfer::new_read( - &mut self.dma, - request, - T::REGS.dr().as_ptr() as *mut W, - buf, - Default::default(), - ) - }; - - T::REGS.cr().modify(|w| w.set_dmaen(true)); - - transfer.await; - - finish_dma(T::REGS); - - Ok(()) - } - - /// Asynchronous write to external device - pub async fn write(&mut self, buf: &[W], transaction: TransferConfig) -> Result<(), OspiError> - where - Dma: OctoDma, - { - if buf.is_empty() { - return Err(OspiError::EmptyBuffer); - } - - // Wait for peripheral to be free - while T::REGS.sr().read().busy() {} - - self.configure_command(&transaction, Some(buf.len()))?; - T::REGS - .cr() - .modify(|v| v.set_fmode(vals::FunctionalMode::INDIRECTWRITE)); - - let request = self.dma.request(); - let transfer = unsafe { - Transfer::new_write( - &mut self.dma, - request, - buf, - T::REGS.dr().as_ptr() as *mut W, - Default::default(), - ) - }; - - T::REGS.cr().modify(|w| w.set_dmaen(true)); - - transfer.await; - - finish_dma(T::REGS); - - Ok(()) - } - /// Set new bus configuration pub fn set_config(&mut self, config: &Config) { // Wait for busy flag to clear @@ -942,7 +536,470 @@ impl<'d, T: Instance, Dma> Ospi<'d, T, Dma> { } } -impl<'d, T: Instance, Dma> Drop for Ospi<'d, T, Dma> { +impl<'d, T: Instance> Ospi<'d, T, Blocking> { + /// Create new blocking OSPI driver for a single spi external chip + pub fn new_blocking_singlespi( + peri: impl Peripheral

+ 'd, + sck: impl Peripheral

> + 'd, + d0: impl Peripheral

> + 'd, + d1: impl Peripheral

> + 'd, + nss: impl Peripheral

> + 'd, + config: Config, + ) -> Self { + Self::new_inner( + peri, + new_pin!(d0, AFType::OutputPushPull, Speed::VeryHigh), + new_pin!(d1, AFType::Input, Speed::VeryHigh), + None, + None, + None, + None, + None, + None, + new_pin!(sck, AFType::OutputPushPull, Speed::VeryHigh), + new_pin!(nss, AFType::OutputPushPull, Speed::VeryHigh, Pull::Up), + None, + None, + config, + OspiWidth::SING, + false, + ) + } + + /// Create new blocking OSPI driver for a dualspi external chip + pub fn new_blocking_dualspi( + peri: impl Peripheral

+ 'd, + sck: impl Peripheral

> + 'd, + d0: impl Peripheral

> + 'd, + d1: impl Peripheral

> + 'd, + nss: impl Peripheral

> + 'd, + config: Config, + ) -> Self { + Self::new_inner( + peri, + new_pin!(d0, AFType::OutputPushPull, Speed::VeryHigh), + new_pin!(d1, AFType::OutputPushPull, Speed::VeryHigh), + None, + None, + None, + None, + None, + None, + new_pin!(sck, AFType::OutputPushPull, Speed::VeryHigh), + new_pin!(nss, AFType::OutputPushPull, Speed::VeryHigh, Pull::Up), + None, + None, + config, + OspiWidth::DUAL, + false, + ) + } + + /// Create new blocking OSPI driver for a quadspi external chip + pub fn new_blocking_quadspi( + peri: impl Peripheral

+ 'd, + sck: impl Peripheral

> + 'd, + d0: impl Peripheral

> + 'd, + d1: impl Peripheral

> + 'd, + d2: impl Peripheral

> + 'd, + d3: impl Peripheral

> + 'd, + nss: impl Peripheral

> + 'd, + config: Config, + ) -> Self { + Self::new_inner( + peri, + new_pin!(d0, AFType::OutputPushPull, Speed::VeryHigh), + new_pin!(d1, AFType::OutputPushPull, Speed::VeryHigh), + new_pin!(d2, AFType::OutputPushPull, Speed::VeryHigh), + new_pin!(d3, AFType::OutputPushPull, Speed::VeryHigh), + None, + None, + None, + None, + new_pin!(sck, AFType::OutputPushPull, Speed::VeryHigh), + new_pin!(nss, AFType::OutputPushPull, Speed::VeryHigh, Pull::Up), + None, + None, + config, + OspiWidth::QUAD, + false, + ) + } + + /// Create new blocking OSPI driver for two quadspi external chips + pub fn new_blocking_dualquadspi( + peri: impl Peripheral

+ 'd, + sck: impl Peripheral

> + 'd, + d0: impl Peripheral

> + 'd, + d1: impl Peripheral

> + 'd, + d2: impl Peripheral

> + 'd, + d3: impl Peripheral

> + 'd, + d4: impl Peripheral

> + 'd, + d5: impl Peripheral

> + 'd, + d6: impl Peripheral

> + 'd, + d7: impl Peripheral

> + 'd, + nss: impl Peripheral

> + 'd, + config: Config, + ) -> Self { + Self::new_inner( + peri, + new_pin!(d0, AFType::OutputPushPull, Speed::VeryHigh), + new_pin!(d1, AFType::OutputPushPull, Speed::VeryHigh), + new_pin!(d2, AFType::OutputPushPull, Speed::VeryHigh), + new_pin!(d3, AFType::OutputPushPull, Speed::VeryHigh), + new_pin!(d4, AFType::OutputPushPull, Speed::VeryHigh), + new_pin!(d5, AFType::OutputPushPull, Speed::VeryHigh), + new_pin!(d6, AFType::OutputPushPull, Speed::VeryHigh), + new_pin!(d7, AFType::OutputPushPull, Speed::VeryHigh), + new_pin!(sck, AFType::OutputPushPull, Speed::VeryHigh), + new_pin!(nss, AFType::OutputPushPull, Speed::VeryHigh, Pull::Up), + None, + None, + config, + OspiWidth::QUAD, + true, + ) + } + + /// Create new blocking OSPI driver for octospi external chips + pub fn new_blocking_octospi( + peri: impl Peripheral

+ 'd, + sck: impl Peripheral

> + 'd, + d0: impl Peripheral

> + 'd, + d1: impl Peripheral

> + 'd, + d2: impl Peripheral

> + 'd, + d3: impl Peripheral

> + 'd, + d4: impl Peripheral

> + 'd, + d5: impl Peripheral

> + 'd, + d6: impl Peripheral

> + 'd, + d7: impl Peripheral

> + 'd, + nss: impl Peripheral

> + 'd, + config: Config, + ) -> Self { + Self::new_inner( + peri, + new_pin!(d0, AFType::OutputPushPull, Speed::VeryHigh), + new_pin!(d1, AFType::OutputPushPull, Speed::VeryHigh), + new_pin!(d2, AFType::OutputPushPull, Speed::VeryHigh), + new_pin!(d3, AFType::OutputPushPull, Speed::VeryHigh), + new_pin!(d4, AFType::OutputPushPull, Speed::VeryHigh), + new_pin!(d5, AFType::OutputPushPull, Speed::VeryHigh), + new_pin!(d6, AFType::OutputPushPull, Speed::VeryHigh), + new_pin!(d7, AFType::OutputPushPull, Speed::VeryHigh), + new_pin!(sck, AFType::OutputPushPull, Speed::VeryHigh), + new_pin!(nss, AFType::OutputPushPull, Speed::VeryHigh, Pull::Up), + None, + None, + config, + OspiWidth::OCTO, + false, + ) + } +} + +impl<'d, T: Instance> Ospi<'d, T, Async> { + /// Create new blocking OSPI driver for a single spi external chip + pub fn new_singlespi( + peri: impl Peripheral

+ 'd, + sck: impl Peripheral

> + 'd, + d0: impl Peripheral

> + 'd, + d1: impl Peripheral

> + 'd, + nss: impl Peripheral

> + 'd, + dma: impl Peripheral

> + 'd, + config: Config, + ) -> Self { + Self::new_inner( + peri, + new_pin!(d0, AFType::OutputPushPull, Speed::VeryHigh), + new_pin!(d1, AFType::Input, Speed::VeryHigh), + None, + None, + None, + None, + None, + None, + new_pin!(sck, AFType::OutputPushPull, Speed::VeryHigh), + new_pin!(nss, AFType::OutputPushPull, Speed::VeryHigh, Pull::Up), + None, + new_dma!(dma), + config, + OspiWidth::SING, + false, + ) + } + + /// Create new blocking OSPI driver for a dualspi external chip + pub fn new_dualspi( + peri: impl Peripheral

+ 'd, + sck: impl Peripheral

> + 'd, + d0: impl Peripheral

> + 'd, + d1: impl Peripheral

> + 'd, + nss: impl Peripheral

> + 'd, + dma: impl Peripheral

> + 'd, + config: Config, + ) -> Self { + Self::new_inner( + peri, + new_pin!(d0, AFType::OutputPushPull, Speed::VeryHigh), + new_pin!(d1, AFType::OutputPushPull, Speed::VeryHigh), + None, + None, + None, + None, + None, + None, + new_pin!(sck, AFType::OutputPushPull, Speed::VeryHigh), + new_pin!(nss, AFType::OutputPushPull, Speed::VeryHigh, Pull::Up), + None, + new_dma!(dma), + config, + OspiWidth::DUAL, + false, + ) + } + + /// Create new blocking OSPI driver for a quadspi external chip + pub fn new_quadspi( + peri: impl Peripheral

+ 'd, + sck: impl Peripheral

> + 'd, + d0: impl Peripheral

> + 'd, + d1: impl Peripheral

> + 'd, + d2: impl Peripheral

> + 'd, + d3: impl Peripheral

> + 'd, + nss: impl Peripheral

> + 'd, + dma: impl Peripheral

> + 'd, + config: Config, + ) -> Self { + Self::new_inner( + peri, + new_pin!(d0, AFType::OutputPushPull, Speed::VeryHigh), + new_pin!(d1, AFType::OutputPushPull, Speed::VeryHigh), + new_pin!(d2, AFType::OutputPushPull, Speed::VeryHigh), + new_pin!(d3, AFType::OutputPushPull, Speed::VeryHigh), + None, + None, + None, + None, + new_pin!(sck, AFType::OutputPushPull, Speed::VeryHigh), + new_pin!(nss, AFType::OutputPushPull, Speed::VeryHigh, Pull::Up), + None, + new_dma!(dma), + config, + OspiWidth::QUAD, + false, + ) + } + + /// Create new blocking OSPI driver for two quadspi external chips + pub fn new_dualquadspi( + peri: impl Peripheral

+ 'd, + sck: impl Peripheral

> + 'd, + d0: impl Peripheral

> + 'd, + d1: impl Peripheral

> + 'd, + d2: impl Peripheral

> + 'd, + d3: impl Peripheral

> + 'd, + d4: impl Peripheral

> + 'd, + d5: impl Peripheral

> + 'd, + d6: impl Peripheral

> + 'd, + d7: impl Peripheral

> + 'd, + nss: impl Peripheral

> + 'd, + dma: impl Peripheral

> + 'd, + config: Config, + ) -> Self { + Self::new_inner( + peri, + new_pin!(d0, AFType::OutputPushPull, Speed::VeryHigh), + new_pin!(d1, AFType::OutputPushPull, Speed::VeryHigh), + new_pin!(d2, AFType::OutputPushPull, Speed::VeryHigh), + new_pin!(d3, AFType::OutputPushPull, Speed::VeryHigh), + new_pin!(d4, AFType::OutputPushPull, Speed::VeryHigh), + new_pin!(d5, AFType::OutputPushPull, Speed::VeryHigh), + new_pin!(d6, AFType::OutputPushPull, Speed::VeryHigh), + new_pin!(d7, AFType::OutputPushPull, Speed::VeryHigh), + new_pin!(sck, AFType::OutputPushPull, Speed::VeryHigh), + new_pin!(nss, AFType::OutputPushPull, Speed::VeryHigh, Pull::Up), + None, + new_dma!(dma), + config, + OspiWidth::QUAD, + true, + ) + } + + /// Create new blocking OSPI driver for octospi external chips + pub fn new_octospi( + peri: impl Peripheral

+ 'd, + sck: impl Peripheral

> + 'd, + d0: impl Peripheral

> + 'd, + d1: impl Peripheral

> + 'd, + d2: impl Peripheral

> + 'd, + d3: impl Peripheral

> + 'd, + d4: impl Peripheral

> + 'd, + d5: impl Peripheral

> + 'd, + d6: impl Peripheral

> + 'd, + d7: impl Peripheral

> + 'd, + nss: impl Peripheral

> + 'd, + dma: impl Peripheral

> + 'd, + config: Config, + ) -> Self { + Self::new_inner( + peri, + new_pin!(d0, AFType::OutputPushPull, Speed::VeryHigh), + new_pin!(d1, AFType::OutputPushPull, Speed::VeryHigh), + new_pin!(d2, AFType::OutputPushPull, Speed::VeryHigh), + new_pin!(d3, AFType::OutputPushPull, Speed::VeryHigh), + new_pin!(d4, AFType::OutputPushPull, Speed::VeryHigh), + new_pin!(d5, AFType::OutputPushPull, Speed::VeryHigh), + new_pin!(d6, AFType::OutputPushPull, Speed::VeryHigh), + new_pin!(d7, AFType::OutputPushPull, Speed::VeryHigh), + new_pin!(sck, AFType::OutputPushPull, Speed::VeryHigh), + new_pin!(nss, AFType::OutputPushPull, Speed::VeryHigh, Pull::Up), + None, + new_dma!(dma), + config, + OspiWidth::OCTO, + false, + ) + } + + /// Blocking read with DMA transfer + pub fn blocking_read_dma(&mut self, buf: &mut [W], transaction: TransferConfig) -> Result<(), OspiError> { + if buf.is_empty() { + return Err(OspiError::EmptyBuffer); + } + + // Wait for peripheral to be free + while T::REGS.sr().read().busy() {} + + self.configure_command(&transaction, Some(buf.len()))?; + + let current_address = T::REGS.ar().read().address(); + let current_instruction = T::REGS.ir().read().instruction(); + + // For a indirect read transaction, the transaction begins when the instruction/address is set + T::REGS.cr().modify(|v| v.set_fmode(vals::FunctionalMode::INDIRECTREAD)); + if T::REGS.ccr().read().admode() == vals::PhaseMode::NONE { + T::REGS.ir().write(|v| v.set_instruction(current_instruction)); + } else { + T::REGS.ar().write(|v| v.set_address(current_address)); + } + + let transfer = unsafe { + self.dma + .as_mut() + .unwrap() + .read(T::REGS.dr().as_ptr() as *mut W, buf, Default::default()) + }; + + T::REGS.cr().modify(|w| w.set_dmaen(true)); + + transfer.blocking_wait(); + + finish_dma(T::REGS); + + Ok(()) + } + + /// Blocking write with DMA transfer + pub fn blocking_write_dma(&mut self, buf: &[W], transaction: TransferConfig) -> Result<(), OspiError> { + if buf.is_empty() { + return Err(OspiError::EmptyBuffer); + } + + // Wait for peripheral to be free + while T::REGS.sr().read().busy() {} + + self.configure_command(&transaction, Some(buf.len()))?; + T::REGS + .cr() + .modify(|v| v.set_fmode(vals::FunctionalMode::INDIRECTWRITE)); + + let transfer = unsafe { + self.dma + .as_mut() + .unwrap() + .write(buf, T::REGS.dr().as_ptr() as *mut W, Default::default()) + }; + + T::REGS.cr().modify(|w| w.set_dmaen(true)); + + transfer.blocking_wait(); + + finish_dma(T::REGS); + + Ok(()) + } + + /// Asynchronous read from external device + pub async fn read(&mut self, buf: &mut [W], transaction: TransferConfig) -> Result<(), OspiError> { + if buf.is_empty() { + return Err(OspiError::EmptyBuffer); + } + + // Wait for peripheral to be free + while T::REGS.sr().read().busy() {} + + self.configure_command(&transaction, Some(buf.len()))?; + + let current_address = T::REGS.ar().read().address(); + let current_instruction = T::REGS.ir().read().instruction(); + + // For a indirect read transaction, the transaction begins when the instruction/address is set + T::REGS.cr().modify(|v| v.set_fmode(vals::FunctionalMode::INDIRECTREAD)); + if T::REGS.ccr().read().admode() == vals::PhaseMode::NONE { + T::REGS.ir().write(|v| v.set_instruction(current_instruction)); + } else { + T::REGS.ar().write(|v| v.set_address(current_address)); + } + + let transfer = unsafe { + self.dma + .as_mut() + .unwrap() + .read(T::REGS.dr().as_ptr() as *mut W, buf, Default::default()) + }; + + T::REGS.cr().modify(|w| w.set_dmaen(true)); + + transfer.await; + + finish_dma(T::REGS); + + Ok(()) + } + + /// Asynchronous write to external device + pub async fn write(&mut self, buf: &[W], transaction: TransferConfig) -> Result<(), OspiError> { + if buf.is_empty() { + return Err(OspiError::EmptyBuffer); + } + + // Wait for peripheral to be free + while T::REGS.sr().read().busy() {} + + self.configure_command(&transaction, Some(buf.len()))?; + T::REGS + .cr() + .modify(|v| v.set_fmode(vals::FunctionalMode::INDIRECTWRITE)); + + let transfer = unsafe { + self.dma + .as_mut() + .unwrap() + .write(buf, T::REGS.dr().as_ptr() as *mut W, Default::default()) + }; + + T::REGS.cr().modify(|w| w.set_dmaen(true)); + + transfer.await; + + finish_dma(T::REGS); + + Ok(()) + } +} + +impl<'d, T: Instance, M: PeriMode> Drop for Ospi<'d, T, M> { fn drop(&mut self) { self.sck.as_ref().map(|x| x.set_as_disconnected()); self.d0.as_ref().map(|x| x.set_as_disconnected()); @@ -1005,7 +1062,7 @@ foreach_peripheral!( }; ); -impl<'d, T: Instance, Dma> SetConfig for Ospi<'d, T, Dma> { +impl<'d, T: Instance, M: PeriMode> SetConfig for Ospi<'d, T, M> { type Config = Config; type ConfigError = (); fn set_config(&mut self, config: &Self::Config) -> Result<(), ()> { @@ -1014,7 +1071,7 @@ impl<'d, T: Instance, Dma> SetConfig for Ospi<'d, T, Dma> { } } -impl<'d, T: Instance, Dma> GetConfig for Ospi<'d, T, Dma> { +impl<'d, T: Instance, M: PeriMode> GetConfig for Ospi<'d, T, M> { type Config = Config; fn get_config(&self) -> Self::Config { self.get_config() From db56c4fe6fb919e89edda37fc5acb2fb05f45745 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Jo=C3=ABl=20Schulz-Ansres?= Date: Wed, 15 May 2024 12:54:30 +0200 Subject: [PATCH 311/581] Add miso pullup to spi configuration, add input as field for speed --- embassy-stm32/src/gpio.rs | 36 ++++++++++++++++++++++++++++++++++++ embassy-stm32/src/spi/mod.rs | 29 +++++++++++++++++++++++++++-- 2 files changed, 63 insertions(+), 2 deletions(-) diff --git a/embassy-stm32/src/gpio.rs b/embassy-stm32/src/gpio.rs index 214813a42..d2db0a257 100644 --- a/embassy-stm32/src/gpio.rs +++ b/embassy-stm32/src/gpio.rs @@ -265,6 +265,7 @@ impl From for vals::Pupdr { #[derive(Debug, Copy, Clone)] #[cfg_attr(feature = "defmt", derive(defmt::Format))] pub enum Speed { + Input, Low, Medium, #[cfg(not(any(syscfg_f0, gpio_v1)))] @@ -278,6 +279,7 @@ impl From for vals::Mode { use Speed::*; match speed { + Input => vals::Mode::INPUT, Low => vals::Mode::OUTPUT2MHZ, Medium => vals::Mode::OUTPUT10MHZ, VeryHigh => vals::Mode::OUTPUT50MHZ, @@ -291,6 +293,7 @@ impl From for vals::Ospeedr { use Speed::*; match speed { + Input => vals::Ospeedr::LOWSPEED, Low => vals::Ospeedr::LOWSPEED, Medium => vals::Ospeedr::MEDIUMSPEED, #[cfg(not(syscfg_f0))] @@ -676,6 +679,39 @@ pub(crate) trait SealedPin { #[cfg(gpio_v2)] self.block().ospeedr().modify(|w| w.set_ospeedr(pin, speed.into())); } + + + /// Get the pull-up configuration. + #[inline] + fn pull(&self) -> Pull { + critical_section::with(|_| { + let r = self.block(); + let n = self._pin() as usize; + #[cfg(gpio_v1)] + { + let crlh = if n < 8 { 0 } else { 1 }; + match r.cr(crlh).cnf(n % 8) { + vals::CnfIn::FLOATING => Pull::None, + _ => if r.bsrr().read().bs(n % 8) { + Pull::Up + } else if r.bsrr().read().br(n % 8) { + Pull::Down + } else { + Pull::None + } + } + } + #[cfg(gpio_v2)] + { + match r.pupdr().read().pupdr(n % 8) { + vals::Pupdr::FLOATING => Pull::None, + vals::Pupdr::PULLDOWN => Pull::Down, + vals::Pupdr::PULLUP => Pull::Up, + vals::Pupdr::_RESERVED_3 => Pull::None, + } + } + }) + } } /// GPIO pin trait. diff --git a/embassy-stm32/src/spi/mod.rs b/embassy-stm32/src/spi/mod.rs index c39ef1913..bcd6b0bf4 100644 --- a/embassy-stm32/src/spi/mod.rs +++ b/embassy-stm32/src/spi/mod.rs @@ -50,6 +50,11 @@ pub struct Config { pub bit_order: BitOrder, /// Clock frequency. pub frequency: Hertz, + /// Enable internal pullup on MISO. + /// + /// There are some ICs that require a pull-up on the MISO pin for some applications. + /// If you are unsure, you probably don't need this. + pub miso_pullup: bool, } impl Default for Config { @@ -58,6 +63,7 @@ impl Default for Config { mode: MODE_0, bit_order: BitOrder::MsbFirst, frequency: Hertz(1_000_000), + miso_pullup: false, } } } @@ -275,6 +281,16 @@ impl<'d, T: Instance, M: PeriMode> Spi<'d, T, M> { BitOrder::MsbFirst }; + let miso_pullup = match &self.miso { + None => false, + Some(pin) => + if pin.pull() == Pull::Up { + true + } else { + false + } + }; + #[cfg(any(spi_v1, spi_f1, spi_v2))] let br = cfg.br(); #[cfg(any(spi_v3, spi_v4, spi_v5))] @@ -287,6 +303,7 @@ impl<'d, T: Instance, M: PeriMode> Spi<'d, T, M> { mode: Mode { polarity, phase }, bit_order, frequency, + miso_pullup, } } @@ -409,7 +426,11 @@ impl<'d, T: Instance> Spi<'d, T, Blocking> { peri, new_pin!(sck, AFType::OutputPushPull, Speed::VeryHigh, config.sck_pull_mode()), new_pin!(mosi, AFType::OutputPushPull, Speed::VeryHigh), - new_pin!(miso, AFType::Input, Speed::VeryHigh), + new_pin!(miso, AFType::Input, Speed::Input, + match config.miso_pullup { + true => Pull::Up, + false => Pull::None, + }), None, None, config, @@ -427,7 +448,11 @@ impl<'d, T: Instance> Spi<'d, T, Blocking> { peri, new_pin!(sck, AFType::OutputPushPull, Speed::VeryHigh, config.sck_pull_mode()), None, - new_pin!(miso, AFType::Input, Speed::VeryHigh), + new_pin!(miso, AFType::Input, Speed::Input, + match config.miso_pullup { + true => Pull::Up, + false => Pull::None, + }), None, None, config, From cc6998be30856d05a4a6a975f35fd0e5df2ea807 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Jo=C3=ABl=20Schulz-Ansres?= Date: Wed, 15 May 2024 14:12:44 +0200 Subject: [PATCH 312/581] Cargo format --- embassy-stm32/src/gpio.rs | 15 ++++++++------- embassy-stm32/src/spi/mod.rs | 27 ++++++++++++++++++--------- 2 files changed, 26 insertions(+), 16 deletions(-) diff --git a/embassy-stm32/src/gpio.rs b/embassy-stm32/src/gpio.rs index d2db0a257..7de223455 100644 --- a/embassy-stm32/src/gpio.rs +++ b/embassy-stm32/src/gpio.rs @@ -680,7 +680,6 @@ pub(crate) trait SealedPin { self.block().ospeedr().modify(|w| w.set_ospeedr(pin, speed.into())); } - /// Get the pull-up configuration. #[inline] fn pull(&self) -> Pull { @@ -692,12 +691,14 @@ pub(crate) trait SealedPin { let crlh = if n < 8 { 0 } else { 1 }; match r.cr(crlh).cnf(n % 8) { vals::CnfIn::FLOATING => Pull::None, - _ => if r.bsrr().read().bs(n % 8) { - Pull::Up - } else if r.bsrr().read().br(n % 8) { - Pull::Down - } else { - Pull::None + _ => { + if r.bsrr().read().bs(n % 8) { + Pull::Up + } else if r.bsrr().read().br(n % 8) { + Pull::Down + } else { + Pull::None + } } } } diff --git a/embassy-stm32/src/spi/mod.rs b/embassy-stm32/src/spi/mod.rs index bcd6b0bf4..76d58def6 100644 --- a/embassy-stm32/src/spi/mod.rs +++ b/embassy-stm32/src/spi/mod.rs @@ -283,11 +283,12 @@ impl<'d, T: Instance, M: PeriMode> Spi<'d, T, M> { let miso_pullup = match &self.miso { None => false, - Some(pin) => - if pin.pull() == Pull::Up { - true - } else { - false + Some(pin) => { + if pin.pull() == Pull::Up { + true + } else { + false + } } }; @@ -426,11 +427,15 @@ impl<'d, T: Instance> Spi<'d, T, Blocking> { peri, new_pin!(sck, AFType::OutputPushPull, Speed::VeryHigh, config.sck_pull_mode()), new_pin!(mosi, AFType::OutputPushPull, Speed::VeryHigh), - new_pin!(miso, AFType::Input, Speed::Input, + new_pin!( + miso, + AFType::Input, + Speed::Input, match config.miso_pullup { true => Pull::Up, false => Pull::None, - }), + } + ), None, None, config, @@ -448,11 +453,15 @@ impl<'d, T: Instance> Spi<'d, T, Blocking> { peri, new_pin!(sck, AFType::OutputPushPull, Speed::VeryHigh, config.sck_pull_mode()), None, - new_pin!(miso, AFType::Input, Speed::Input, + new_pin!( + miso, + AFType::Input, + Speed::Input, match config.miso_pullup { true => Pull::Up, false => Pull::None, - }), + } + ), None, None, config, From 17dde65ac2cbac36b4cd70ea01a2a51acac00026 Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Wed, 15 May 2024 22:28:51 +0200 Subject: [PATCH 313/581] net-esp-hosted: fix missing enabling defmt feature in heapless. --- embassy-net-esp-hosted/Cargo.toml | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/embassy-net-esp-hosted/Cargo.toml b/embassy-net-esp-hosted/Cargo.toml index dda65dbf9..96f6c8b00 100644 --- a/embassy-net-esp-hosted/Cargo.toml +++ b/embassy-net-esp-hosted/Cargo.toml @@ -9,6 +9,10 @@ license = "MIT OR Apache-2.0" repository = "https://github.com/embassy-rs/embassy" documentation = "https://docs.embassy.dev/embassy-net-esp-hosted" +[features] +defmt = [ "dep:defmt", "heapless/defmt-03" ] +log = [ "dep:log" ] + [dependencies] defmt = { version = "0.3", optional = true } log = { version = "0.4.14", optional = true } From 3ef62eef5370b34792a737dd5a4b296fe3fd8c7d Mon Sep 17 00:00:00 2001 From: Felipe Balbi Date: Thu, 16 May 2024 08:12:18 -0700 Subject: [PATCH 314/581] stm32h7: add shared bus example --- examples/stm32h7/Cargo.toml | 1 + examples/stm32h7/src/bin/i2c_shared.rs | 112 +++++++++++++++++++++++++ 2 files changed, 113 insertions(+) create mode 100644 examples/stm32h7/src/bin/i2c_shared.rs diff --git a/examples/stm32h7/Cargo.toml b/examples/stm32h7/Cargo.toml index a09af4b97..c6c2d1354 100644 --- a/examples/stm32h7/Cargo.toml +++ b/examples/stm32h7/Cargo.toml @@ -8,6 +8,7 @@ license = "MIT OR Apache-2.0" # Change stm32h743bi to your chip name, if necessary. embassy-stm32 = { version = "0.1.0", path = "../../embassy-stm32", features = ["defmt", "stm32h743bi", "time-driver-tim2", "exti", "memory-x", "unstable-pac", "chrono"] } embassy-sync = { version = "0.5.0", path = "../../embassy-sync", features = ["defmt"] } +embassy-embedded-hal = { version = "0.1.0", path = "../../embassy-embedded-hal" } embassy-executor = { version = "0.5.0", path = "../../embassy-executor", features = ["task-arena-size-32768", "arch-cortex-m", "executor-thread", "executor-interrupt", "defmt", "integrated-timers"] } embassy-time = { version = "0.3.0", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime", "tick-hz-32_768"] } embassy-net = { version = "0.4.0", path = "../../embassy-net", features = ["defmt", "tcp", "dhcpv4", "medium-ethernet", "proto-ipv6", "dns"] } diff --git a/examples/stm32h7/src/bin/i2c_shared.rs b/examples/stm32h7/src/bin/i2c_shared.rs new file mode 100644 index 000000000..79d213ae4 --- /dev/null +++ b/examples/stm32h7/src/bin/i2c_shared.rs @@ -0,0 +1,112 @@ +#![no_std] +#![no_main] + +use core::cell::RefCell; + +use defmt::*; +use embassy_embedded_hal::shared_bus::blocking::i2c::I2cDevice; +use embassy_executor::Spawner; +use embassy_stm32::bind_interrupts; +use embassy_stm32::i2c::{self, I2c}; +use embassy_stm32::mode::Async; +use embassy_stm32::peripherals::{self, I2C1}; +use embassy_stm32::time::Hertz; +use embassy_sync::blocking_mutex::NoopMutex; +use embassy_time::{Duration, Timer}; +use static_cell::StaticCell; +use {defmt_rtt as _, panic_probe as _}; + +const TMP117_ADDR: u8 = 0x48; +const TMP117_TEMP_RESULT: u8 = 0x00; + +const SHTC3_ADDR: u8 = 0x70; +const SHTC3_WAKEUP: [u8; 2] = [0x35, 0x17]; +const SHTC3_MEASURE_RH_FIRST: [u8; 2] = [0x5c, 0x24]; +const SHTC3_SLEEP: [u8; 2] = [0xb0, 0x98]; + +static I2C_BUS: StaticCell>>> = StaticCell::new(); + +bind_interrupts!(struct Irqs { + I2C1_EV => i2c::EventInterruptHandler; + I2C1_ER => i2c::ErrorInterruptHandler; +}); + +#[embassy_executor::task] +async fn temperature(mut i2c: impl embedded_hal_1::i2c::I2c + 'static) { + let mut data = [0u8; 2]; + + loop { + match i2c.write_read(TMP117_ADDR, &[TMP117_TEMP_RESULT], &mut data) { + Ok(()) => { + let temp = f32::from(i16::from_be_bytes(data)) * 7.8125 / 1000.0; + info!("Temperature {}", temp); + } + Err(_) => error!("I2C Error"), + } + + Timer::after(Duration::from_millis(1000)).await; + } +} + +#[embassy_executor::task] +async fn humidity(mut i2c: impl embedded_hal_1::i2c::I2c + 'static) { + let mut data = [0u8; 6]; + + loop { + // Wakeup + match i2c.write(SHTC3_ADDR, &SHTC3_WAKEUP) { + Ok(()) => Timer::after(Duration::from_millis(20)).await, + Err(_) => error!("I2C Error"), + } + + // Measurement + match i2c.write(SHTC3_ADDR, &SHTC3_MEASURE_RH_FIRST) { + Ok(()) => Timer::after(Duration::from_millis(5)).await, + Err(_) => error!("I2C Error"), + } + + // Result + match i2c.read(SHTC3_ADDR, &mut data) { + Ok(()) => Timer::after(Duration::from_millis(5)).await, + Err(_) => error!("I2C Error"), + } + + // Sleep + match i2c.write(SHTC3_ADDR, &SHTC3_SLEEP) { + Ok(()) => { + let (bytes, _) = data.split_at(core::mem::size_of::()); + let rh = f32::from(u16::from_be_bytes(bytes.try_into().unwrap())) * 100.0 / 65536.0; + info!("Humidity: {}", rh); + } + Err(_) => error!("I2C Error"), + } + + Timer::after(Duration::from_millis(1000)).await; + } +} + +#[embassy_executor::main] +async fn main(spawner: Spawner) { + let p = embassy_stm32::init(Default::default()); + + let i2c = I2c::new( + p.I2C1, + p.PB8, + p.PB9, + Irqs, + p.DMA1_CH4, + p.DMA1_CH5, + Hertz(100_000), + Default::default(), + ); + let i2c_bus = NoopMutex::new(RefCell::new(i2c)); + let i2c_bus = I2C_BUS.init(i2c_bus); + + // Device 1, using embedded-hal-async compatible driver for TMP117 + let i2c_dev1 = I2cDevice::new(i2c_bus); + spawner.spawn(temperature(i2c_dev1)).unwrap(); + + // Device 2, using embedded-hal-async compatible driver for SHTC3 + let i2c_dev2 = I2cDevice::new(i2c_bus); + spawner.spawn(humidity(i2c_dev2)).unwrap(); +} From 57d9bfd343c51c9823b3e17e8a48260f0b67939f Mon Sep 17 00:00:00 2001 From: Felipe Balbi Date: Thu, 16 May 2024 12:14:05 -0700 Subject: [PATCH 315/581] stm32g0: add i2c_async example This example will help those having difficulties understanding how to bind interrupts on stm32g0 devices. --- examples/stm32g0/src/bin/i2c_async.rs | 48 +++++++++++++++++++++++++++ 1 file changed, 48 insertions(+) create mode 100644 examples/stm32g0/src/bin/i2c_async.rs diff --git a/examples/stm32g0/src/bin/i2c_async.rs b/examples/stm32g0/src/bin/i2c_async.rs new file mode 100644 index 000000000..7e3189b05 --- /dev/null +++ b/examples/stm32g0/src/bin/i2c_async.rs @@ -0,0 +1,48 @@ +#![no_std] +#![no_main] + +use defmt::*; +use embassy_executor::Spawner; +use embassy_stm32::i2c::{self, I2c}; +use embassy_stm32::time::Hertz; +use embassy_stm32::{bind_interrupts, peripherals}; +use embassy_time::{Duration, Timer}; +use {defmt_rtt as _, panic_probe as _}; + +bind_interrupts!(struct Irqs { + I2C1 => i2c::EventInterruptHandler, i2c::ErrorInterruptHandler; +}); + +const TMP117_ADDR: u8 = 0x48; +const TMP117_TEMP_RESULT: u8 = 0x00; + +#[embassy_executor::main] +async fn main(_spawner: Spawner) { + info!("Hello world"); + + let p = embassy_stm32::init(Default::default()); + + let mut data = [0u8; 2]; + let mut i2c = I2c::new( + p.I2C1, + p.PB8, + p.PB9, + Irqs, + p.DMA1_CH1, + p.DMA1_CH2, + Hertz(100_000), + Default::default(), + ); + + loop { + match i2c.write_read(TMP117_ADDR, &[TMP117_TEMP_RESULT], &mut data).await { + Ok(()) => { + let temp = f32::from(i16::from_be_bytes(data)) * 7.8125 / 1000.0; + info!("Temperature {}", temp); + } + Err(_) => error!("I2C Error"), + } + + Timer::after(Duration::from_millis(1000)).await; + } +} From 4722bac07c2f04890fb4cfef8602dee5daaa9d79 Mon Sep 17 00:00:00 2001 From: James Munns Date: Fri, 17 May 2024 11:07:47 +0200 Subject: [PATCH 316/581] FAQ: "How to add support for a new chip" This adds an opinionated process for supporting a brand new (family of) chip(s) in Embassy. --- docs/modules/ROOT/pages/faq.adoc | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/docs/modules/ROOT/pages/faq.adoc b/docs/modules/ROOT/pages/faq.adoc index 6c7126cd6..a7b8be4d5 100644 --- a/docs/modules/ROOT/pages/faq.adoc +++ b/docs/modules/ROOT/pages/faq.adoc @@ -314,3 +314,22 @@ embassy-time = { git = "https://github.com/embassy-rs/embassy", rev embassy-usb = { git = "https://github.com/embassy-rs/embassy", rev = "4cade64ebd34bf93458f17cfe85c5f710d0ff13c" } embassy-usb-driver = { git = "https://github.com/embassy-rs/embassy", rev = "4cade64ebd34bf93458f17cfe85c5f710d0ff13c" } ---- + +=== How do I add support for a new microcontroller to embassy? + +This is particularly for cortex-m, and potentially risc-v, where there is already support for basics like interrupt handling, or even already embassy-executor support for your architecture. + +This is a *much harder path* than just using Embassy on an already supported chip. If you are a beginner, consider using embassy on an existing, well supported chip for a while, before you decide to write drivers from scratch. It's also worth reading the existing source of supported Embassy HALs, to get a feel for how drivers are implemented for various chips. You should already be comfortable reading and writing unsafe code, and understanding the responsibilities of writing safe abstractions for users of your HAL. + +This is not the only possible approach, but if you are looking for where to start, this is a reasonable way to tackle the task: + +1. First, drop by the Matrix room or search around to see if someone has already started writing drivers, either in Embassy or otherwise in Rust. You might not have to start from scratch! +2. Make sure the target is supported in probe-rs, it likely is, and if not, there is likely a cmsis-pack you can use to add support so that flashing and debugging is possible. You will definitely appreciate being able to debug with SWD or JTAG when writing drivers! +3. See if there is an SVD (or SVDs, if it's a family) available, if it is, run it through chiptool to create a PAC for low level register access. If not, there are other ways (like scraping the PDF datasheets or existing C header files), but these are more work than starting from the SVD file to define peripheral memory locations necessary for writing drivers. +4. Either make a fork of embassy repo, and add your target there, or make a repo that just contains the PAC and an empty HAL. It doesn't necessarily have to live in the embassy repo at first. +5. Get a hello world binary working on your chip, either with minimal HAL or just PAC access, use delays and blink a light or send some raw data on some interface, make sure it works and you can flash, debug with defmt + RTT, write a proper linker script, etc. +6. Get basic timer operations and timer interrupts working, upgrade your blinking application to use hardware timers and interrupts, and ensure they are accurate (with a logic analyzer or oscilloscope, if possible). +7. Implement the embassy-time driver API with your timer and timer interrupt code, so that you can use embassy-time operations in your drivers and applications. +8. Then start implementing whatever peripherals you need, like GPIOs, UART, SPI, I2C, etc. This is the largest part of the work, and will likely continue for a while! Don't feel like you need 100% coverage of all peripherals at first, this is likely to be an ongoing process over time. +9. Start implementing the embedded-hal, embedded-io, and embedded-hal-async traits on top of your HAL drivers, once you start having more features completed. This will allow users to use standard external device drivers (e.g. sensors, actuators, displays, etc.) with your HAL. +10. Discuss upstreaming the PAC/HAL for embassy support, or make sure your drivers are added to the awesome-embedded-rust list so that people can find it. From c590e91c0ba6f9180069b69cbcdc199cb157498e Mon Sep 17 00:00:00 2001 From: James Munns Date: Fri, 17 May 2024 14:11:42 +0200 Subject: [PATCH 317/581] FAQ: Fix section nesting --- docs/modules/ROOT/pages/faq.adoc | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/docs/modules/ROOT/pages/faq.adoc b/docs/modules/ROOT/pages/faq.adoc index a7b8be4d5..8b1f22f6e 100644 --- a/docs/modules/ROOT/pages/faq.adoc +++ b/docs/modules/ROOT/pages/faq.adoc @@ -291,7 +291,7 @@ General steps: See link:/examples/stm32h7/src/bin/spi_bdma.rs[this example] for more details. -=== How do I switch to the `main` branch? +== How do I switch to the `main` branch? Sometimes to test new changes or fixes, you'll want to switch your project to using a version from GitHub. @@ -315,7 +315,7 @@ embassy-usb = { git = "https://github.com/embassy-rs/embassy", rev embassy-usb-driver = { git = "https://github.com/embassy-rs/embassy", rev = "4cade64ebd34bf93458f17cfe85c5f710d0ff13c" } ---- -=== How do I add support for a new microcontroller to embassy? +== How do I add support for a new microcontroller to embassy? This is particularly for cortex-m, and potentially risc-v, where there is already support for basics like interrupt handling, or even already embassy-executor support for your architecture. From 5b2535c8a2e27e6f6f9707d05dc69aa3a603c480 Mon Sep 17 00:00:00 2001 From: tact1m4n3 Date: Fri, 17 May 2024 21:07:32 +0300 Subject: [PATCH 318/581] fix(embassy-rp): fix drop implementation of BufferedUartRx and BufferedUartTx --- .../src/atomic_ring_buffer.rs | 5 + embassy-rp/src/uart/buffered.rs | 146 ++++++++++-------- embassy-rp/src/uart/mod.rs | 8 +- 3 files changed, 87 insertions(+), 72 deletions(-) diff --git a/embassy-hal-internal/src/atomic_ring_buffer.rs b/embassy-hal-internal/src/atomic_ring_buffer.rs index 40ad9dc7a..00b7a1249 100644 --- a/embassy-hal-internal/src/atomic_ring_buffer.rs +++ b/embassy-hal-internal/src/atomic_ring_buffer.rs @@ -123,6 +123,11 @@ impl RingBuffer { Some(Writer(self)) } + /// Return if buffer is available. + pub fn is_available(&self) -> bool { + !self.buf.load(Ordering::Relaxed).is_null() && self.len.load(Ordering::Relaxed) != 0 + } + /// Return length of buffer. pub fn len(&self) -> usize { self.len.load(Ordering::Relaxed) diff --git a/embassy-rp/src/uart/buffered.rs b/embassy-rp/src/uart/buffered.rs index da1157984..c94164040 100644 --- a/embassy-rp/src/uart/buffered.rs +++ b/embassy-rp/src/uart/buffered.rs @@ -51,14 +51,20 @@ pub struct BufferedUartTx<'d, T: Instance> { pub(crate) fn init_buffers<'d, T: Instance + 'd>( _irq: impl Binding>, - tx_buffer: &'d mut [u8], - rx_buffer: &'d mut [u8], + tx_buffer: Option<&'d mut [u8]>, + rx_buffer: Option<&'d mut [u8]>, ) { let state = T::buffered_state(); - let len = tx_buffer.len(); - unsafe { state.tx_buf.init(tx_buffer.as_mut_ptr(), len) }; - let len = rx_buffer.len(); - unsafe { state.rx_buf.init(rx_buffer.as_mut_ptr(), len) }; + + if let Some(tx_buffer) = tx_buffer { + let len = tx_buffer.len(); + unsafe { state.tx_buf.init(tx_buffer.as_mut_ptr(), len) }; + } + + if let Some(rx_buffer) = rx_buffer { + let len = rx_buffer.len(); + unsafe { state.rx_buf.init(rx_buffer.as_mut_ptr(), len) }; + } // From the datasheet: // "The transmit interrupt is based on a transition through a level, rather @@ -95,7 +101,7 @@ impl<'d, T: Instance> BufferedUart<'d, T> { into_ref!(tx, rx); super::Uart::<'d, T, Async>::init(Some(tx.map_into()), Some(rx.map_into()), None, None, config); - init_buffers::(irq, tx_buffer, rx_buffer); + init_buffers::(irq, Some(tx_buffer), Some(rx_buffer)); Self { rx: BufferedUartRx { phantom: PhantomData }, @@ -124,7 +130,7 @@ impl<'d, T: Instance> BufferedUart<'d, T> { Some(cts.map_into()), config, ); - init_buffers::(irq, tx_buffer, rx_buffer); + init_buffers::(irq, Some(tx_buffer), Some(rx_buffer)); Self { rx: BufferedUartRx { phantom: PhantomData }, @@ -175,7 +181,7 @@ impl<'d, T: Instance> BufferedUartRx<'d, T> { into_ref!(rx); super::Uart::<'d, T, Async>::init(None, Some(rx.map_into()), None, None, config); - init_buffers::(irq, &mut [], rx_buffer); + init_buffers::(irq, None, Some(rx_buffer)); Self { phantom: PhantomData } } @@ -192,7 +198,7 @@ impl<'d, T: Instance> BufferedUartRx<'d, T> { into_ref!(rx, rts); super::Uart::<'d, T, Async>::init(None, Some(rx.map_into()), Some(rts.map_into()), None, config); - init_buffers::(irq, &mut [], rx_buffer); + init_buffers::(irq, None, Some(rx_buffer)); Self { phantom: PhantomData } } @@ -323,7 +329,7 @@ impl<'d, T: Instance> BufferedUartTx<'d, T> { into_ref!(tx); super::Uart::<'d, T, Async>::init(Some(tx.map_into()), None, None, None, config); - init_buffers::(irq, tx_buffer, &mut []); + init_buffers::(irq, Some(tx_buffer), None); Self { phantom: PhantomData } } @@ -340,12 +346,12 @@ impl<'d, T: Instance> BufferedUartTx<'d, T> { into_ref!(tx, cts); super::Uart::<'d, T, Async>::init(Some(tx.map_into()), None, None, Some(cts.map_into()), config); - init_buffers::(irq, tx_buffer, &mut []); + init_buffers::(irq, Some(tx_buffer), None); Self { phantom: PhantomData } } - fn write<'a>(buf: &'a [u8]) -> impl Future> + 'a { + fn write(buf: &[u8]) -> impl Future> + '_ { poll_fn(move |cx| { if buf.is_empty() { return Poll::Ready(Ok(0)); @@ -459,9 +465,9 @@ impl<'d, T: Instance> Drop for BufferedUartRx<'d, T> { let state = T::buffered_state(); unsafe { state.rx_buf.deinit() } - // TX is inactive if the the buffer is not available. + // TX is inactive if the buffer is not available. // We can now unregister the interrupt handler - if state.tx_buf.is_empty() { + if !state.tx_buf.is_available() { T::Interrupt::disable(); } } @@ -472,9 +478,9 @@ impl<'d, T: Instance> Drop for BufferedUartTx<'d, T> { let state = T::buffered_state(); unsafe { state.tx_buf.deinit() } - // RX is inactive if the the buffer is not available. + // RX is inactive if the buffer is not available. // We can now unregister the interrupt handler - if state.rx_buf.is_empty() { + if !state.rx_buf.is_available() { T::Interrupt::disable(); } } @@ -520,64 +526,68 @@ impl interrupt::typelevel::Handler for BufferedInterr } // RX - let mut rx_writer = unsafe { s.rx_buf.writer() }; - let rx_buf = rx_writer.push_slice(); - let mut n_read = 0; - let mut error = false; - for rx_byte in rx_buf { - if r.uartfr().read().rxfe() { - break; + if s.rx_buf.is_available() { + let mut rx_writer = unsafe { s.rx_buf.writer() }; + let rx_buf = rx_writer.push_slice(); + let mut n_read = 0; + let mut error = false; + for rx_byte in rx_buf { + if r.uartfr().read().rxfe() { + break; + } + let dr = r.uartdr().read(); + if (dr.0 >> 8) != 0 { + s.rx_error.fetch_or((dr.0 >> 8) as u8, Ordering::Relaxed); + error = true; + // only fill the buffer with valid characters. the current character is fine + // if the error is an overrun, but if we add it to the buffer we'll report + // the overrun one character too late. drop it instead and pretend we were + // a bit slower at draining the rx fifo than we actually were. + // this is consistent with blocking uart error reporting. + break; + } + *rx_byte = dr.data(); + n_read += 1; } - let dr = r.uartdr().read(); - if (dr.0 >> 8) != 0 { - s.rx_error.fetch_or((dr.0 >> 8) as u8, Ordering::Relaxed); - error = true; - // only fill the buffer with valid characters. the current character is fine - // if the error is an overrun, but if we add it to the buffer we'll report - // the overrun one character too late. drop it instead and pretend we were - // a bit slower at draining the rx fifo than we actually were. - // this is consistent with blocking uart error reporting. - break; + if n_read > 0 { + rx_writer.push_done(n_read); + s.rx_waker.wake(); + } else if error { + s.rx_waker.wake(); + } + // Disable any further RX interrupts when the buffer becomes full or + // errors have occurred. This lets us buffer additional errors in the + // fifo without needing more error storage locations, and most applications + // will want to do a full reset of their uart state anyway once an error + // has happened. + if s.rx_buf.is_full() || error { + r.uartimsc().write_clear(|w| { + w.set_rxim(true); + w.set_rtim(true); + }); } - *rx_byte = dr.data(); - n_read += 1; - } - if n_read > 0 { - rx_writer.push_done(n_read); - s.rx_waker.wake(); - } else if error { - s.rx_waker.wake(); - } - // Disable any further RX interrupts when the buffer becomes full or - // errors have occurred. This lets us buffer additional errors in the - // fifo without needing more error storage locations, and most applications - // will want to do a full reset of their uart state anyway once an error - // has happened. - if s.rx_buf.is_full() || error { - r.uartimsc().write_clear(|w| { - w.set_rxim(true); - w.set_rtim(true); - }); } // TX - let mut tx_reader = unsafe { s.tx_buf.reader() }; - let tx_buf = tx_reader.pop_slice(); - let mut n_written = 0; - for tx_byte in tx_buf.iter_mut() { - if r.uartfr().read().txff() { - break; + if s.tx_buf.is_available() { + let mut tx_reader = unsafe { s.tx_buf.reader() }; + let tx_buf = tx_reader.pop_slice(); + let mut n_written = 0; + for tx_byte in tx_buf.iter_mut() { + if r.uartfr().read().txff() { + break; + } + r.uartdr().write(|w| w.set_data(*tx_byte)); + n_written += 1; } - r.uartdr().write(|w| w.set_data(*tx_byte)); - n_written += 1; + if n_written > 0 { + tx_reader.pop_done(n_written); + s.tx_waker.wake(); + } + // The TX interrupt only triggers once when the FIFO threshold is + // crossed. No need to disable it when the buffer becomes empty + // as it does re-trigger anymore once we have cleared it. } - if n_written > 0 { - tx_reader.pop_done(n_written); - s.tx_waker.wake(); - } - // The TX interrupt only triggers once when the FIFO threshold is - // crossed. No need to disable it when the buffer becomes empty - // as it does re-trigger anymore once we have cleared it. } } diff --git a/embassy-rp/src/uart/mod.rs b/embassy-rp/src/uart/mod.rs index ee2dcb27d..30ece15bd 100644 --- a/embassy-rp/src/uart/mod.rs +++ b/embassy-rp/src/uart/mod.rs @@ -231,7 +231,7 @@ impl<'d, T: Instance> UartTx<'d, T, Blocking> { irq: impl Binding>, tx_buffer: &'d mut [u8], ) -> BufferedUartTx<'d, T> { - buffered::init_buffers::(irq, tx_buffer, &mut []); + buffered::init_buffers::(irq, Some(tx_buffer), None); BufferedUartTx { phantom: PhantomData } } @@ -352,7 +352,7 @@ impl<'d, T: Instance> UartRx<'d, T, Blocking> { irq: impl Binding>, rx_buffer: &'d mut [u8], ) -> BufferedUartRx<'d, T> { - buffered::init_buffers::(irq, &mut [], rx_buffer); + buffered::init_buffers::(irq, None, Some(rx_buffer)); BufferedUartRx { phantom: PhantomData } } @@ -690,7 +690,7 @@ impl<'d, T: Instance> Uart<'d, T, Blocking> { tx_buffer: &'d mut [u8], rx_buffer: &'d mut [u8], ) -> BufferedUart<'d, T> { - buffered::init_buffers::(irq, tx_buffer, rx_buffer); + buffered::init_buffers::(irq, Some(tx_buffer), Some(rx_buffer)); BufferedUart { rx: BufferedUartRx { phantom: PhantomData }, @@ -860,7 +860,7 @@ impl<'d, T: Instance + 'd, M: Mode> Uart<'d, T, M> { }); } - /// sets baudrate on runtime + /// sets baudrate on runtime pub fn set_baudrate(&mut self, baudrate: u32) { Self::set_baudrate_inner(baudrate); } From 3d9b502c7af1f1dab92ee4a3aa07dc667a3bf103 Mon Sep 17 00:00:00 2001 From: Oliver Rockstedt Date: Sat, 18 May 2024 13:37:51 +0200 Subject: [PATCH 319/581] embassy-sync: Add capacity and free_capacity functions to Channel --- embassy-sync/CHANGELOG.md | 2 +- embassy-sync/src/channel.rs | 12 ++++++++++++ 2 files changed, 13 insertions(+), 1 deletion(-) diff --git a/embassy-sync/CHANGELOG.md b/embassy-sync/CHANGELOG.md index 3f6b39d8b..46466d610 100644 --- a/embassy-sync/CHANGELOG.md +++ b/embassy-sync/CHANGELOG.md @@ -7,7 +7,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0 ## Unreleased -- Add `len`, `is_empty` and `is_full` functions to `Channel`. +- Add `capacity`, `free_capacity`, `len`, `is_empty` and `is_full` functions to `Channel`. ## 0.5.0 - 2023-12-04 diff --git a/embassy-sync/src/channel.rs b/embassy-sync/src/channel.rs index c4267064c..f9f71d026 100644 --- a/embassy-sync/src/channel.rs +++ b/embassy-sync/src/channel.rs @@ -620,6 +620,18 @@ where self.lock(|c| c.try_receive()) } + /// Returns the maximum number of elements the channel can hold. + pub const fn capacity(&self) -> usize { + N + } + + /// Returns the free capacity of the channel. + /// + /// This is equivalent to `capacity() - len()` + pub fn free_capacity(&self) -> usize { + N - self.len() + } + /// Returns the number of elements currently in the channel. pub fn len(&self) -> usize { self.lock(|c| c.len()) From f361c2e81cc2d595adc3896f8a8a198973392046 Mon Sep 17 00:00:00 2001 From: Oliver Rockstedt Date: Sat, 18 May 2024 13:48:40 +0200 Subject: [PATCH 320/581] embassy-sync: Add capacity, free_capacity, len, is_empty and is_full functions to PriorityChannel --- embassy-sync/CHANGELOG.md | 1 + embassy-sync/src/priority_channel.rs | 39 ++++++++++++++++++++++++++++ 2 files changed, 40 insertions(+) diff --git a/embassy-sync/CHANGELOG.md b/embassy-sync/CHANGELOG.md index 46466d610..28d97e68d 100644 --- a/embassy-sync/CHANGELOG.md +++ b/embassy-sync/CHANGELOG.md @@ -8,6 +8,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0 ## Unreleased - Add `capacity`, `free_capacity`, `len`, `is_empty` and `is_full` functions to `Channel`. +- Add `capacity`, `free_capacity`, `len`, `is_empty` and `is_full` functions to `PriorityChannel`. ## 0.5.0 - 2023-12-04 diff --git a/embassy-sync/src/priority_channel.rs b/embassy-sync/src/priority_channel.rs index e77678c24..4b9bd0515 100644 --- a/embassy-sync/src/priority_channel.rs +++ b/embassy-sync/src/priority_channel.rs @@ -314,6 +314,18 @@ where Poll::Pending } } + + fn len(&self) -> usize { + self.queue.len() + } + + fn is_empty(&self) -> bool { + self.queue.is_empty() + } + + fn is_full(&self) -> bool { + self.queue.len() == self.queue.capacity() + } } /// A bounded channel for communicating between asynchronous tasks @@ -433,6 +445,33 @@ where pub fn try_receive(&self) -> Result { self.lock(|c| c.try_receive()) } + + /// Returns the maximum number of elements the channel can hold. + pub const fn capacity(&self) -> usize { + N + } + + /// Returns the free capacity of the channel. + /// + /// This is equivalent to `capacity() - len()` + pub fn free_capacity(&self) -> usize { + N - self.len() + } + + /// Returns the number of elements currently in the channel. + pub fn len(&self) -> usize { + self.lock(|c| c.len()) + } + + /// Returns whether the channel is empty. + pub fn is_empty(&self) -> bool { + self.lock(|c| c.is_empty()) + } + + /// Returns whether the channel is full. + pub fn is_full(&self) -> bool { + self.lock(|c| c.is_full()) + } } /// Implements the DynamicChannel to allow creating types that are unaware of the queue size with the From ab899934513d7b7b1eda1727bc145713856e4a9a Mon Sep 17 00:00:00 2001 From: Oliver Rockstedt Date: Sat, 18 May 2024 14:01:23 +0200 Subject: [PATCH 321/581] embassy-sync: Add capacity, free_capacity, len, is_empty and is_full functions to PubSubChannel --- embassy-sync/CHANGELOG.md | 1 + embassy-sync/src/pubsub/mod.rs | 39 ++++++++++++++++++++++++++++++++++ 2 files changed, 40 insertions(+) diff --git a/embassy-sync/CHANGELOG.md b/embassy-sync/CHANGELOG.md index 28d97e68d..7a830a853 100644 --- a/embassy-sync/CHANGELOG.md +++ b/embassy-sync/CHANGELOG.md @@ -9,6 +9,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0 - Add `capacity`, `free_capacity`, `len`, `is_empty` and `is_full` functions to `Channel`. - Add `capacity`, `free_capacity`, `len`, `is_empty` and `is_full` functions to `PriorityChannel`. +- Add `capacity`, `free_capacity`, `len`, `is_empty` and `is_full` functions to `PubSubChannel`. ## 0.5.0 - 2023-12-04 diff --git a/embassy-sync/src/pubsub/mod.rs b/embassy-sync/src/pubsub/mod.rs index 6afd54af5..754747ab8 100644 --- a/embassy-sync/src/pubsub/mod.rs +++ b/embassy-sync/src/pubsub/mod.rs @@ -160,6 +160,33 @@ impl DynImmediatePublisher { DynImmediatePublisher(ImmediatePub::new(self)) } + + /// Returns the maximum number of elements the channel can hold. + pub const fn capacity(&self) -> usize { + CAP + } + + /// Returns the free capacity of the channel. + /// + /// This is equivalent to `capacity() - len()` + pub fn free_capacity(&self) -> usize { + CAP - self.len() + } + + /// Returns the number of elements currently in the channel. + pub fn len(&self) -> usize { + self.inner.lock(|inner| inner.borrow().len()) + } + + /// Returns whether the channel is empty. + pub fn is_empty(&self) -> bool { + self.inner.lock(|inner| inner.borrow().is_empty()) + } + + /// Returns whether the channel is full. + pub fn is_full(&self) -> bool { + self.inner.lock(|inner| inner.borrow().is_full()) + } } impl PubSubBehavior @@ -366,6 +393,18 @@ impl PubSubSta fn unregister_publisher(&mut self) { self.publisher_count -= 1; } + + fn len(&self) -> usize { + self.queue.len() + } + + fn is_empty(&self) -> bool { + self.queue.is_empty() + } + + fn is_full(&self) -> bool { + self.queue.is_full() + } } /// Error type for the [PubSubChannel] From e3e3728daeab7115df58def6af7405100c82c011 Mon Sep 17 00:00:00 2001 From: Alexander van Saase Date: Sat, 18 May 2024 23:28:37 +0200 Subject: [PATCH 322/581] rp/flash: implement `embedded_storage_async::nor_flash::MultiwriteNorFlash` --- embassy-rp/src/flash.rs | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/embassy-rp/src/flash.rs b/embassy-rp/src/flash.rs index 45b385cb4..6e2a823d8 100644 --- a/embassy-rp/src/flash.rs +++ b/embassy-rp/src/flash.rs @@ -374,6 +374,11 @@ impl<'d, T: Instance, M: Mode, const FLASH_SIZE: usize> ReadNorFlash for Flash<' impl<'d, T: Instance, M: Mode, const FLASH_SIZE: usize> MultiwriteNorFlash for Flash<'d, T, M, FLASH_SIZE> {} +impl<'d, T: Instance, const FLASH_SIZE: usize> embedded_storage_async::nor_flash::MultiwriteNorFlash + for Flash<'d, T, Async, FLASH_SIZE> +{ +} + impl<'d, T: Instance, M: Mode, const FLASH_SIZE: usize> NorFlash for Flash<'d, T, M, FLASH_SIZE> { const WRITE_SIZE: usize = WRITE_SIZE; From c5a183fa82614f1fdd8d7783d101bf2c45cd32e1 Mon Sep 17 00:00:00 2001 From: Ragarnoy Date: Tue, 30 Apr 2024 02:10:54 +0200 Subject: [PATCH 323/581] Improve flexibility by introducing SPI word size as a generic parameter --- .../src/shared_bus/blocking/spi.rs | 79 +++++++++++++++---- 1 file changed, 63 insertions(+), 16 deletions(-) diff --git a/embassy-embedded-hal/src/shared_bus/blocking/spi.rs b/embassy-embedded-hal/src/shared_bus/blocking/spi.rs index 801899f9f..b01012695 100644 --- a/embassy-embedded-hal/src/shared_bus/blocking/spi.rs +++ b/embassy-embedded-hal/src/shared_bus/blocking/spi.rs @@ -28,19 +28,21 @@ use crate::shared_bus::SpiDeviceError; use crate::SetConfig; /// SPI device on a shared bus. -pub struct SpiDevice<'a, M: RawMutex, BUS, CS> { +pub struct SpiDevice<'a, M: RawMutex, BUS, CS, Word> { bus: &'a Mutex>, cs: CS, + _word: core::marker::PhantomData, } -impl<'a, M: RawMutex, BUS, CS> SpiDevice<'a, M, BUS, CS> { +impl<'a, M: RawMutex, BUS, CS, Word> SpiDevice<'a, M, BUS, CS, Word> { /// Create a new `SpiDevice`. pub fn new(bus: &'a Mutex>, cs: CS) -> Self { - Self { bus, cs } + Self { bus, cs + , _word: core::marker::PhantomData} } } -impl<'a, M: RawMutex, BUS, CS> spi::ErrorType for SpiDevice<'a, M, BUS, CS> +impl<'a, M: RawMutex, BUS, CS, Word> spi::ErrorType for SpiDevice<'a, M, BUS, CS, Word> where BUS: spi::ErrorType, CS: OutputPin, @@ -48,13 +50,14 @@ where type Error = SpiDeviceError; } -impl embedded_hal_1::spi::SpiDevice for SpiDevice<'_, M, BUS, CS> +impl embedded_hal_1::spi::SpiDevice for SpiDevice<'_, M, BUS, CS, Word> where M: RawMutex, - BUS: SpiBus, + BUS: SpiBus, CS: OutputPin, + Word: Copy + 'static, { - fn transaction(&mut self, operations: &mut [Operation<'_, u8>]) -> Result<(), Self::Error> { + fn transaction(&mut self, operations: &mut [embedded_hal_1::spi::Operation<'_, Word>]) -> Result<(), Self::Error> { if cfg!(not(feature = "time")) && operations.iter().any(|op| matches!(op, Operation::DelayNs(_))) { return Err(SpiDeviceError::DelayNotSupported); } @@ -90,7 +93,7 @@ where } } -impl<'d, M, BUS, CS, BusErr, CsErr> embedded_hal_02::blocking::spi::Transfer for SpiDevice<'_, M, BUS, CS> +impl<'d, M, BUS, CS, BusErr, CsErr, Word> embedded_hal_02::blocking::spi::Transfer for SpiDevice<'_, M, BUS, CS, Word> where M: RawMutex, BUS: embedded_hal_02::blocking::spi::Transfer, @@ -110,7 +113,7 @@ where } } -impl<'d, M, BUS, CS, BusErr, CsErr> embedded_hal_02::blocking::spi::Write for SpiDevice<'_, M, BUS, CS> +impl<'d, M, BUS, CS, BusErr, CsErr, Word> embedded_hal_02::blocking::spi::Write for SpiDevice<'_, M, BUS, CS, Word> where M: RawMutex, BUS: embedded_hal_02::blocking::spi::Write, @@ -131,21 +134,63 @@ where } } +impl<'d, M, BUS, CS, BusErr, CsErr, Word> embedded_hal_02::blocking::spi::Transfer for SpiDevice<'_, M, BUS, CS, Word> + where + M: RawMutex, + BUS: embedded_hal_02::blocking::spi::Transfer, + CS: OutputPin, +{ + type Error = SpiDeviceError; + fn transfer<'w>(&mut self, words: &'w mut [u16]) -> Result<&'w [u16], Self::Error> { + self.bus.lock(|bus| { + let mut bus = bus.borrow_mut(); + self.cs.set_low().map_err(SpiDeviceError::Cs)?; + let op_res = bus.transfer(words); + let cs_res = self.cs.set_high(); + let op_res = op_res.map_err(SpiDeviceError::Spi)?; + cs_res.map_err(SpiDeviceError::Cs)?; + Ok(op_res) + }) + } +} + +impl<'d, M, BUS, CS, BusErr, CsErr, Word> embedded_hal_02::blocking::spi::Write for SpiDevice<'_, M, BUS, CS, Word> + where + M: RawMutex, + BUS: embedded_hal_02::blocking::spi::Write, + CS: OutputPin, +{ + type Error = SpiDeviceError; + + fn write(&mut self, words: &[u16]) -> Result<(), Self::Error> { + self.bus.lock(|bus| { + let mut bus = bus.borrow_mut(); + self.cs.set_low().map_err(SpiDeviceError::Cs)?; + let op_res = bus.write(words); + let cs_res = self.cs.set_high(); + let op_res = op_res.map_err(SpiDeviceError::Spi)?; + cs_res.map_err(SpiDeviceError::Cs)?; + Ok(op_res) + }) + } +} + /// SPI device on a shared bus, with its own configuration. /// /// This is like [`SpiDevice`], with an additional bus configuration that's applied /// to the bus before each use using [`SetConfig`]. This allows different /// devices on the same bus to use different communication settings. -pub struct SpiDeviceWithConfig<'a, M: RawMutex, BUS: SetConfig, CS> { +pub struct SpiDeviceWithConfig<'a, M: RawMutex, BUS: SetConfig, CS, Word> { bus: &'a Mutex>, cs: CS, config: BUS::Config, + _word: core::marker::PhantomData, } -impl<'a, M: RawMutex, BUS: SetConfig, CS> SpiDeviceWithConfig<'a, M, BUS, CS> { +impl<'a, M: RawMutex, BUS: SetConfig, CS, Word> SpiDeviceWithConfig<'a, M, BUS, CS, Word> { /// Create a new `SpiDeviceWithConfig`. pub fn new(bus: &'a Mutex>, cs: CS, config: BUS::Config) -> Self { - Self { bus, cs, config } + Self { bus, cs, config, _word: core::marker::PhantomData } } /// Change the device's config at runtime @@ -154,22 +199,24 @@ impl<'a, M: RawMutex, BUS: SetConfig, CS> SpiDeviceWithConfig<'a, M, BUS, CS> { } } -impl<'a, M, BUS, CS> spi::ErrorType for SpiDeviceWithConfig<'a, M, BUS, CS> +impl<'a, M, BUS, CS, Word> spi::ErrorType for SpiDeviceWithConfig<'a, M, BUS, CS, Word> where M: RawMutex, BUS: spi::ErrorType + SetConfig, CS: OutputPin, + Word: Copy + 'static, { type Error = SpiDeviceError; } -impl embedded_hal_1::spi::SpiDevice for SpiDeviceWithConfig<'_, M, BUS, CS> +impl embedded_hal_1::spi::SpiDevice for SpiDeviceWithConfig<'_, M, BUS, CS, Word> where M: RawMutex, - BUS: SpiBus + SetConfig, + BUS: SpiBus + SetConfig, CS: OutputPin, + Word: Copy + 'static, { - fn transaction(&mut self, operations: &mut [Operation<'_, u8>]) -> Result<(), Self::Error> { + fn transaction(&mut self, operations: &mut [embedded_hal_1::spi::Operation<'_, Word>]) -> Result<(), Self::Error> { if cfg!(not(feature = "time")) && operations.iter().any(|op| matches!(op, Operation::DelayNs(_))) { return Err(SpiDeviceError::DelayNotSupported); } From 6df737a48c35c582ed31387ddf7ebedb86a814b5 Mon Sep 17 00:00:00 2001 From: Ragarnoy Date: Tue, 30 Apr 2024 02:11:38 +0200 Subject: [PATCH 324/581] rustfmt --- .../src/shared_bus/blocking/spi.rs | 36 ++++++++++++------- 1 file changed, 23 insertions(+), 13 deletions(-) diff --git a/embassy-embedded-hal/src/shared_bus/blocking/spi.rs b/embassy-embedded-hal/src/shared_bus/blocking/spi.rs index b01012695..e7e112b0a 100644 --- a/embassy-embedded-hal/src/shared_bus/blocking/spi.rs +++ b/embassy-embedded-hal/src/shared_bus/blocking/spi.rs @@ -37,8 +37,11 @@ pub struct SpiDevice<'a, M: RawMutex, BUS, CS, Word> { impl<'a, M: RawMutex, BUS, CS, Word> SpiDevice<'a, M, BUS, CS, Word> { /// Create a new `SpiDevice`. pub fn new(bus: &'a Mutex>, cs: CS) -> Self { - Self { bus, cs - , _word: core::marker::PhantomData} + Self { + bus, + cs, + _word: core::marker::PhantomData, + } } } @@ -93,7 +96,8 @@ where } } -impl<'d, M, BUS, CS, BusErr, CsErr, Word> embedded_hal_02::blocking::spi::Transfer for SpiDevice<'_, M, BUS, CS, Word> +impl<'d, M, BUS, CS, BusErr, CsErr, Word> embedded_hal_02::blocking::spi::Transfer + for SpiDevice<'_, M, BUS, CS, Word> where M: RawMutex, BUS: embedded_hal_02::blocking::spi::Transfer, @@ -134,11 +138,12 @@ where } } -impl<'d, M, BUS, CS, BusErr, CsErr, Word> embedded_hal_02::blocking::spi::Transfer for SpiDevice<'_, M, BUS, CS, Word> - where - M: RawMutex, - BUS: embedded_hal_02::blocking::spi::Transfer, - CS: OutputPin, +impl<'d, M, BUS, CS, BusErr, CsErr, Word> embedded_hal_02::blocking::spi::Transfer + for SpiDevice<'_, M, BUS, CS, Word> +where + M: RawMutex, + BUS: embedded_hal_02::blocking::spi::Transfer, + CS: OutputPin, { type Error = SpiDeviceError; fn transfer<'w>(&mut self, words: &'w mut [u16]) -> Result<&'w [u16], Self::Error> { @@ -155,10 +160,10 @@ impl<'d, M, BUS, CS, BusErr, CsErr, Word> embedded_hal_02::blocking::spi::Transf } impl<'d, M, BUS, CS, BusErr, CsErr, Word> embedded_hal_02::blocking::spi::Write for SpiDevice<'_, M, BUS, CS, Word> - where - M: RawMutex, - BUS: embedded_hal_02::blocking::spi::Write, - CS: OutputPin, +where + M: RawMutex, + BUS: embedded_hal_02::blocking::spi::Write, + CS: OutputPin, { type Error = SpiDeviceError; @@ -190,7 +195,12 @@ pub struct SpiDeviceWithConfig<'a, M: RawMutex, BUS: SetConfig, CS, Word> { impl<'a, M: RawMutex, BUS: SetConfig, CS, Word> SpiDeviceWithConfig<'a, M, BUS, CS, Word> { /// Create a new `SpiDeviceWithConfig`. pub fn new(bus: &'a Mutex>, cs: CS, config: BUS::Config) -> Self { - Self { bus, cs, config, _word: core::marker::PhantomData } + Self { + bus, + cs, + config, + _word: core::marker::PhantomData, + } } /// Change the device's config at runtime From 02ee59fa1e720e9fd6a1a15b4f46af4eac2b890f Mon Sep 17 00:00:00 2001 From: Ragarnoy Date: Tue, 30 Apr 2024 02:19:28 +0200 Subject: [PATCH 325/581] Add Copy and 'static constraint to Word type in SPI structs --- embassy-embedded-hal/src/shared_bus/blocking/spi.rs | 13 +++++++++---- 1 file changed, 9 insertions(+), 4 deletions(-) diff --git a/embassy-embedded-hal/src/shared_bus/blocking/spi.rs b/embassy-embedded-hal/src/shared_bus/blocking/spi.rs index e7e112b0a..7d383980d 100644 --- a/embassy-embedded-hal/src/shared_bus/blocking/spi.rs +++ b/embassy-embedded-hal/src/shared_bus/blocking/spi.rs @@ -28,13 +28,13 @@ use crate::shared_bus::SpiDeviceError; use crate::SetConfig; /// SPI device on a shared bus. -pub struct SpiDevice<'a, M: RawMutex, BUS, CS, Word> { +pub struct SpiDevice<'a, M: RawMutex, BUS, CS, Word: Copy + 'static = u8> { bus: &'a Mutex>, cs: CS, _word: core::marker::PhantomData, } -impl<'a, M: RawMutex, BUS, CS, Word> SpiDevice<'a, M, BUS, CS, Word> { +impl<'a, M: RawMutex, BUS, CS, Word: Copy + 'static> SpiDevice<'a, M, BUS, CS, Word> { /// Create a new `SpiDevice`. pub fn new(bus: &'a Mutex>, cs: CS) -> Self { Self { @@ -49,6 +49,7 @@ impl<'a, M: RawMutex, BUS, CS, Word> spi::ErrorType for SpiDevice<'a, M, BUS, CS where BUS: spi::ErrorType, CS: OutputPin, + Word: Copy + 'static, { type Error = SpiDeviceError; } @@ -102,6 +103,7 @@ where M: RawMutex, BUS: embedded_hal_02::blocking::spi::Transfer, CS: OutputPin, + Word: Copy + 'static, { type Error = SpiDeviceError; fn transfer<'w>(&mut self, words: &'w mut [u8]) -> Result<&'w [u8], Self::Error> { @@ -122,6 +124,7 @@ where M: RawMutex, BUS: embedded_hal_02::blocking::spi::Write, CS: OutputPin, + Word: Copy + 'static, { type Error = SpiDeviceError; @@ -144,6 +147,7 @@ where M: RawMutex, BUS: embedded_hal_02::blocking::spi::Transfer, CS: OutputPin, + Word: Copy + 'static, { type Error = SpiDeviceError; fn transfer<'w>(&mut self, words: &'w mut [u16]) -> Result<&'w [u16], Self::Error> { @@ -164,6 +168,7 @@ where M: RawMutex, BUS: embedded_hal_02::blocking::spi::Write, CS: OutputPin, + Word: Copy + 'static, { type Error = SpiDeviceError; @@ -185,14 +190,14 @@ where /// This is like [`SpiDevice`], with an additional bus configuration that's applied /// to the bus before each use using [`SetConfig`]. This allows different /// devices on the same bus to use different communication settings. -pub struct SpiDeviceWithConfig<'a, M: RawMutex, BUS: SetConfig, CS, Word> { +pub struct SpiDeviceWithConfig<'a, M: RawMutex, BUS: SetConfig, CS, Word: Copy + 'static = u8> { bus: &'a Mutex>, cs: CS, config: BUS::Config, _word: core::marker::PhantomData, } -impl<'a, M: RawMutex, BUS: SetConfig, CS, Word> SpiDeviceWithConfig<'a, M, BUS, CS, Word> { +impl<'a, M: RawMutex, BUS: SetConfig, CS, Word: Copy + 'static> SpiDeviceWithConfig<'a, M, BUS, CS, Word> { /// Create a new `SpiDeviceWithConfig`. pub fn new(bus: &'a Mutex>, cs: CS, config: BUS::Config) -> Self { Self { From 4dbec3402e1158975b462aa290b780f8a54b2eb8 Mon Sep 17 00:00:00 2001 From: ragarnoy Date: Tue, 30 Apr 2024 16:44:27 +0200 Subject: [PATCH 326/581] Remove old embedded-hal trait implementations --- .../src/shared_bus/blocking/spi.rs | 98 +------------------ 1 file changed, 4 insertions(+), 94 deletions(-) diff --git a/embassy-embedded-hal/src/shared_bus/blocking/spi.rs b/embassy-embedded-hal/src/shared_bus/blocking/spi.rs index 7d383980d..8f1cce4ad 100644 --- a/embassy-embedded-hal/src/shared_bus/blocking/spi.rs +++ b/embassy-embedded-hal/src/shared_bus/blocking/spi.rs @@ -28,33 +28,30 @@ use crate::shared_bus::SpiDeviceError; use crate::SetConfig; /// SPI device on a shared bus. -pub struct SpiDevice<'a, M: RawMutex, BUS, CS, Word: Copy + 'static = u8> { +pub struct SpiDevice<'a, M: RawMutex, BUS, CS> { bus: &'a Mutex>, cs: CS, - _word: core::marker::PhantomData, } -impl<'a, M: RawMutex, BUS, CS, Word: Copy + 'static> SpiDevice<'a, M, BUS, CS, Word> { +impl<'a, M: RawMutex, BUS, CS> SpiDevice<'a, M, BUS, CS, > { /// Create a new `SpiDevice`. pub fn new(bus: &'a Mutex>, cs: CS) -> Self { Self { bus, cs, - _word: core::marker::PhantomData, } } } -impl<'a, M: RawMutex, BUS, CS, Word> spi::ErrorType for SpiDevice<'a, M, BUS, CS, Word> +impl<'a, M: RawMutex, BUS, CS> spi::ErrorType for SpiDevice<'a, M, BUS, CS, > where BUS: spi::ErrorType, CS: OutputPin, - Word: Copy + 'static, { type Error = SpiDeviceError; } -impl embedded_hal_1::spi::SpiDevice for SpiDevice<'_, M, BUS, CS, Word> +impl embedded_hal_1::spi::SpiDevice for SpiDevice<'_, M, BUS, CS, > where M: RawMutex, BUS: SpiBus, @@ -97,93 +94,6 @@ where } } -impl<'d, M, BUS, CS, BusErr, CsErr, Word> embedded_hal_02::blocking::spi::Transfer - for SpiDevice<'_, M, BUS, CS, Word> -where - M: RawMutex, - BUS: embedded_hal_02::blocking::spi::Transfer, - CS: OutputPin, - Word: Copy + 'static, -{ - type Error = SpiDeviceError; - fn transfer<'w>(&mut self, words: &'w mut [u8]) -> Result<&'w [u8], Self::Error> { - self.bus.lock(|bus| { - let mut bus = bus.borrow_mut(); - self.cs.set_low().map_err(SpiDeviceError::Cs)?; - let op_res = bus.transfer(words); - let cs_res = self.cs.set_high(); - let op_res = op_res.map_err(SpiDeviceError::Spi)?; - cs_res.map_err(SpiDeviceError::Cs)?; - Ok(op_res) - }) - } -} - -impl<'d, M, BUS, CS, BusErr, CsErr, Word> embedded_hal_02::blocking::spi::Write for SpiDevice<'_, M, BUS, CS, Word> -where - M: RawMutex, - BUS: embedded_hal_02::blocking::spi::Write, - CS: OutputPin, - Word: Copy + 'static, -{ - type Error = SpiDeviceError; - - fn write(&mut self, words: &[u8]) -> Result<(), Self::Error> { - self.bus.lock(|bus| { - let mut bus = bus.borrow_mut(); - self.cs.set_low().map_err(SpiDeviceError::Cs)?; - let op_res = bus.write(words); - let cs_res = self.cs.set_high(); - let op_res = op_res.map_err(SpiDeviceError::Spi)?; - cs_res.map_err(SpiDeviceError::Cs)?; - Ok(op_res) - }) - } -} - -impl<'d, M, BUS, CS, BusErr, CsErr, Word> embedded_hal_02::blocking::spi::Transfer - for SpiDevice<'_, M, BUS, CS, Word> -where - M: RawMutex, - BUS: embedded_hal_02::blocking::spi::Transfer, - CS: OutputPin, - Word: Copy + 'static, -{ - type Error = SpiDeviceError; - fn transfer<'w>(&mut self, words: &'w mut [u16]) -> Result<&'w [u16], Self::Error> { - self.bus.lock(|bus| { - let mut bus = bus.borrow_mut(); - self.cs.set_low().map_err(SpiDeviceError::Cs)?; - let op_res = bus.transfer(words); - let cs_res = self.cs.set_high(); - let op_res = op_res.map_err(SpiDeviceError::Spi)?; - cs_res.map_err(SpiDeviceError::Cs)?; - Ok(op_res) - }) - } -} - -impl<'d, M, BUS, CS, BusErr, CsErr, Word> embedded_hal_02::blocking::spi::Write for SpiDevice<'_, M, BUS, CS, Word> -where - M: RawMutex, - BUS: embedded_hal_02::blocking::spi::Write, - CS: OutputPin, - Word: Copy + 'static, -{ - type Error = SpiDeviceError; - - fn write(&mut self, words: &[u16]) -> Result<(), Self::Error> { - self.bus.lock(|bus| { - let mut bus = bus.borrow_mut(); - self.cs.set_low().map_err(SpiDeviceError::Cs)?; - let op_res = bus.write(words); - let cs_res = self.cs.set_high(); - let op_res = op_res.map_err(SpiDeviceError::Spi)?; - cs_res.map_err(SpiDeviceError::Cs)?; - Ok(op_res) - }) - } -} /// SPI device on a shared bus, with its own configuration. /// From 44cb4159a67bcb0eeb9b0fa1e2e5fac2c2c2c2e3 Mon Sep 17 00:00:00 2001 From: Ragarnoy Date: Wed, 1 May 2024 00:05:22 +0200 Subject: [PATCH 327/581] rustmft --- embassy-embedded-hal/src/shared_bus/blocking/spi.rs | 12 ++++-------- 1 file changed, 4 insertions(+), 8 deletions(-) diff --git a/embassy-embedded-hal/src/shared_bus/blocking/spi.rs b/embassy-embedded-hal/src/shared_bus/blocking/spi.rs index 8f1cce4ad..2979d4ace 100644 --- a/embassy-embedded-hal/src/shared_bus/blocking/spi.rs +++ b/embassy-embedded-hal/src/shared_bus/blocking/spi.rs @@ -33,17 +33,14 @@ pub struct SpiDevice<'a, M: RawMutex, BUS, CS> { cs: CS, } -impl<'a, M: RawMutex, BUS, CS> SpiDevice<'a, M, BUS, CS, > { +impl<'a, M: RawMutex, BUS, CS> SpiDevice<'a, M, BUS, CS> { /// Create a new `SpiDevice`. pub fn new(bus: &'a Mutex>, cs: CS) -> Self { - Self { - bus, - cs, - } + Self { bus, cs } } } -impl<'a, M: RawMutex, BUS, CS> spi::ErrorType for SpiDevice<'a, M, BUS, CS, > +impl<'a, M: RawMutex, BUS, CS> spi::ErrorType for SpiDevice<'a, M, BUS, CS> where BUS: spi::ErrorType, CS: OutputPin, @@ -51,7 +48,7 @@ where type Error = SpiDeviceError; } -impl embedded_hal_1::spi::SpiDevice for SpiDevice<'_, M, BUS, CS, > +impl embedded_hal_1::spi::SpiDevice for SpiDevice<'_, M, BUS, CS> where M: RawMutex, BUS: SpiBus, @@ -94,7 +91,6 @@ where } } - /// SPI device on a shared bus, with its own configuration. /// /// This is like [`SpiDevice`], with an additional bus configuration that's applied From d64f46ff9e81149bf386ca9ffb85950ac293edf1 Mon Sep 17 00:00:00 2001 From: Ragarnoy Date: Wed, 1 May 2024 01:47:05 +0200 Subject: [PATCH 328/581] PR remarks --- embassy-embedded-hal/src/shared_bus/blocking/spi.rs | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/embassy-embedded-hal/src/shared_bus/blocking/spi.rs b/embassy-embedded-hal/src/shared_bus/blocking/spi.rs index 2979d4ace..3be1276e5 100644 --- a/embassy-embedded-hal/src/shared_bus/blocking/spi.rs +++ b/embassy-embedded-hal/src/shared_bus/blocking/spi.rs @@ -103,7 +103,7 @@ pub struct SpiDeviceWithConfig<'a, M: RawMutex, BUS: SetConfig, CS, Word: Copy + _word: core::marker::PhantomData, } -impl<'a, M: RawMutex, BUS: SetConfig, CS, Word: Copy + 'static> SpiDeviceWithConfig<'a, M, BUS, CS, Word> { +impl<'a, M: RawMutex, BUS: SetConfig, CS> SpiDeviceWithConfig<'a, M, BUS, CS> { /// Create a new `SpiDeviceWithConfig`. pub fn new(bus: &'a Mutex>, cs: CS, config: BUS::Config) -> Self { Self { From 31887b47bc7c7f72b707c3195c119dec58a38dce Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Mon, 20 May 2024 10:55:55 +0200 Subject: [PATCH 329/581] embassy-embedded-hal: remove Word generic for blocking SpiDeviceWithConfig. --- .../src/shared_bus/blocking/spi.rs | 15 ++++----------- 1 file changed, 4 insertions(+), 11 deletions(-) diff --git a/embassy-embedded-hal/src/shared_bus/blocking/spi.rs b/embassy-embedded-hal/src/shared_bus/blocking/spi.rs index 3be1276e5..eb9c0c4f4 100644 --- a/embassy-embedded-hal/src/shared_bus/blocking/spi.rs +++ b/embassy-embedded-hal/src/shared_bus/blocking/spi.rs @@ -96,22 +96,16 @@ where /// This is like [`SpiDevice`], with an additional bus configuration that's applied /// to the bus before each use using [`SetConfig`]. This allows different /// devices on the same bus to use different communication settings. -pub struct SpiDeviceWithConfig<'a, M: RawMutex, BUS: SetConfig, CS, Word: Copy + 'static = u8> { +pub struct SpiDeviceWithConfig<'a, M: RawMutex, BUS: SetConfig, CS> { bus: &'a Mutex>, cs: CS, config: BUS::Config, - _word: core::marker::PhantomData, } impl<'a, M: RawMutex, BUS: SetConfig, CS> SpiDeviceWithConfig<'a, M, BUS, CS> { /// Create a new `SpiDeviceWithConfig`. pub fn new(bus: &'a Mutex>, cs: CS, config: BUS::Config) -> Self { - Self { - bus, - cs, - config, - _word: core::marker::PhantomData, - } + Self { bus, cs, config } } /// Change the device's config at runtime @@ -120,17 +114,16 @@ impl<'a, M: RawMutex, BUS: SetConfig, CS> SpiDeviceWithConfig<'a, M, BUS, CS> { } } -impl<'a, M, BUS, CS, Word> spi::ErrorType for SpiDeviceWithConfig<'a, M, BUS, CS, Word> +impl<'a, M, BUS, CS> spi::ErrorType for SpiDeviceWithConfig<'a, M, BUS, CS> where M: RawMutex, BUS: spi::ErrorType + SetConfig, CS: OutputPin, - Word: Copy + 'static, { type Error = SpiDeviceError; } -impl embedded_hal_1::spi::SpiDevice for SpiDeviceWithConfig<'_, M, BUS, CS, Word> +impl embedded_hal_1::spi::SpiDevice for SpiDeviceWithConfig<'_, M, BUS, CS> where M: RawMutex, BUS: SpiBus + SetConfig, From 78cdebbc9523a0db3654f56e1a5acf8015d69248 Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Mon, 20 May 2024 10:56:15 +0200 Subject: [PATCH 330/581] embassy-embedded-hal: add support for all word sizes to async shared spi. --- embassy-embedded-hal/src/shared_bus/asynch/spi.rs | 14 ++++++++------ 1 file changed, 8 insertions(+), 6 deletions(-) diff --git a/embassy-embedded-hal/src/shared_bus/asynch/spi.rs b/embassy-embedded-hal/src/shared_bus/asynch/spi.rs index 9890f218d..30d4ecc36 100644 --- a/embassy-embedded-hal/src/shared_bus/asynch/spi.rs +++ b/embassy-embedded-hal/src/shared_bus/asynch/spi.rs @@ -55,13 +55,14 @@ where type Error = SpiDeviceError; } -impl spi::SpiDevice for SpiDevice<'_, M, BUS, CS> +impl spi::SpiDevice for SpiDevice<'_, M, BUS, CS> where M: RawMutex, - BUS: spi::SpiBus, + BUS: spi::SpiBus, CS: OutputPin, + Word: Copy + 'static, { - async fn transaction(&mut self, operations: &mut [spi::Operation<'_, u8>]) -> Result<(), Self::Error> { + async fn transaction(&mut self, operations: &mut [spi::Operation<'_, Word>]) -> Result<(), Self::Error> { if cfg!(not(feature = "time")) && operations.iter().any(|op| matches!(op, Operation::DelayNs(_))) { return Err(SpiDeviceError::DelayNotSupported); } @@ -138,13 +139,14 @@ where type Error = SpiDeviceError; } -impl spi::SpiDevice for SpiDeviceWithConfig<'_, M, BUS, CS> +impl spi::SpiDevice for SpiDeviceWithConfig<'_, M, BUS, CS> where M: RawMutex, - BUS: spi::SpiBus + SetConfig, + BUS: spi::SpiBus + SetConfig, CS: OutputPin, + Word: Copy + 'static, { - async fn transaction(&mut self, operations: &mut [spi::Operation<'_, u8>]) -> Result<(), Self::Error> { + async fn transaction(&mut self, operations: &mut [spi::Operation<'_, Word>]) -> Result<(), Self::Error> { if cfg!(not(feature = "time")) && operations.iter().any(|op| matches!(op, Operation::DelayNs(_))) { return Err(SpiDeviceError::DelayNotSupported); } From aa7fcec009031b58365a1e48772033f5d4e15e2d Mon Sep 17 00:00:00 2001 From: James Munns Date: Mon, 20 May 2024 13:27:54 +0200 Subject: [PATCH 331/581] embassy-usb - update 0.2 changelog --- embassy-usb/CHANGELOG.md | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/embassy-usb/CHANGELOG.md b/embassy-usb/CHANGELOG.md index 00f3be06c..5f665ed25 100644 --- a/embassy-usb/CHANGELOG.md +++ b/embassy-usb/CHANGELOG.md @@ -7,8 +7,9 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0 ## Unreleased -## 0.2.0 - 2024-04-23 +## 0.2.0 - 2024-05-20 +- [#2862](https://github.com/embassy-rs/embassy/pull/2862) WebUSB implementation by @chmanie - Removed dynamically sized `device_descriptor` fields ## 0.1.0 - 2024-01-11 From 2a4a714060d4cdb976eab62a70f9c1242425714f Mon Sep 17 00:00:00 2001 From: Dion Dokter Date: Mon, 20 May 2024 15:18:10 +0200 Subject: [PATCH 332/581] Make behaviour trait sealed --- embassy-sync/src/pubsub/mod.rs | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-) diff --git a/embassy-sync/src/pubsub/mod.rs b/embassy-sync/src/pubsub/mod.rs index 754747ab8..adbf8cf02 100644 --- a/embassy-sync/src/pubsub/mod.rs +++ b/embassy-sync/src/pubsub/mod.rs @@ -189,7 +189,7 @@ impl PubSubBehavior +impl SealedPubSubBehavior for PubSubChannel { fn get_message_with_context(&self, next_message_id: &mut u64, cx: Option<&mut Context<'_>>) -> Poll> { @@ -421,7 +421,7 @@ pub enum Error { /// 'Middle level' behaviour of the pubsub channel. /// This trait is used so that Sub and Pub can be generic over the channel. -pub trait PubSubBehavior { +trait SealedPubSubBehavior { /// Try to get a message from the queue with the given message id. /// /// If the message is not yet present and a context is given, then its waker is registered in the subsriber wakers. @@ -449,6 +449,13 @@ pub trait PubSubBehavior { fn unregister_publisher(&self); } +/// 'Middle level' behaviour of the pubsub channel. +/// This trait is used so that Sub and Pub can be generic over the channel. +#[allow(private_bounds)] +pub trait PubSubBehavior: SealedPubSubBehavior {} + +impl> PubSubBehavior for C {} + /// The result of the subscriber wait procedure #[derive(Debug, Clone, PartialEq, Eq)] #[cfg_attr(feature = "defmt", derive(defmt::Format))] From b843f2546f0cb1a8595d390587f38012b8a013a4 Mon Sep 17 00:00:00 2001 From: Dan Groshev Date: Mon, 20 May 2024 14:23:03 +0100 Subject: [PATCH 333/581] Add a CHANGELOG to embassy-usb-logger and bump its version --- embassy-usb-logger/CHANGELOG.md | 28 ++++++++++++++++++++++++++++ embassy-usb-logger/Cargo.toml | 2 +- examples/rp/Cargo.toml | 2 +- 3 files changed, 30 insertions(+), 2 deletions(-) create mode 100644 embassy-usb-logger/CHANGELOG.md diff --git a/embassy-usb-logger/CHANGELOG.md b/embassy-usb-logger/CHANGELOG.md new file mode 100644 index 000000000..4cd84b8be --- /dev/null +++ b/embassy-usb-logger/CHANGELOG.md @@ -0,0 +1,28 @@ +# Changelog + +All notable changes to this project will be documented in this file. + +The format is based on [Keep a Changelog](https://keepachangelog.com/en/1.0.0/), +and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0.html). + +## Unreleased + +## 0.2.0 - 2024-05-20 + +### Added + +- [#2414](https://github.com/embassy-rs/embassy/pull/2414) USB logger can now use an existing USB device (@JomerDev) + +### Changed + +- Update `embassy-usb` to 0.2.0 + +### Fixed + +- No more data loss at `Pipe` wraparound +- [#2414](https://github.com/embassy-rs/embassy/pull/2414) Messages that are exactly `MAX_PACKET_SIZE` long are no +longer delayed (@JomerDev) + +## 0.1.0 - 2024-01-14 + +- Initial Release diff --git a/embassy-usb-logger/Cargo.toml b/embassy-usb-logger/Cargo.toml index 81bcfc0da..d58fd7a34 100644 --- a/embassy-usb-logger/Cargo.toml +++ b/embassy-usb-logger/Cargo.toml @@ -1,6 +1,6 @@ [package] name = "embassy-usb-logger" -version = "0.1.0" +version = "0.2.0" edition = "2021" license = "MIT OR Apache-2.0" description = "`log` implementation for USB serial using `embassy-usb`." diff --git a/examples/rp/Cargo.toml b/examples/rp/Cargo.toml index 73d19c28b..5178a690f 100644 --- a/examples/rp/Cargo.toml +++ b/examples/rp/Cargo.toml @@ -15,7 +15,7 @@ embassy-usb = { version = "0.2.0", path = "../../embassy-usb", features = ["defm embassy-net = { version = "0.4.0", path = "../../embassy-net", features = ["defmt", "tcp", "udp", "raw", "dhcpv4", "medium-ethernet"] } embassy-net-wiznet = { version = "0.1.0", path = "../../embassy-net-wiznet", features = ["defmt"] } embassy-futures = { version = "0.1.0", path = "../../embassy-futures" } -embassy-usb-logger = { version = "0.1.0", path = "../../embassy-usb-logger" } +embassy-usb-logger = { version = "0.2.0", path = "../../embassy-usb-logger" } cyw43 = { version = "0.1.0", path = "../../cyw43", features = ["defmt", "firmware-logs"] } cyw43-pio = { version = "0.1.0", path = "../../cyw43-pio", features = ["defmt", "overclock"] } From a76082b104edd4cbb7f10a4a589ef6773d8d6e4f Mon Sep 17 00:00:00 2001 From: Dion Dokter Date: Mon, 20 May 2024 15:34:03 +0200 Subject: [PATCH 334/581] Expose new length functions in the subs and pubs --- embassy-sync/src/pubsub/mod.rs | 82 ++++++++++++++++++++------- embassy-sync/src/pubsub/publisher.rs | 58 +++++++++++++++---- embassy-sync/src/pubsub/subscriber.rs | 31 +++++++++- 3 files changed, 138 insertions(+), 33 deletions(-) diff --git a/embassy-sync/src/pubsub/mod.rs b/embassy-sync/src/pubsub/mod.rs index adbf8cf02..af3d6db2a 100644 --- a/embassy-sync/src/pubsub/mod.rs +++ b/embassy-sync/src/pubsub/mod.rs @@ -248,13 +248,6 @@ impl usize { - self.inner.lock(|s| { - let s = s.borrow(); - s.queue.capacity() - s.queue.len() - }) - } - fn unregister_subscriber(&self, subscriber_next_message_id: u64) { self.inner.lock(|s| { let mut s = s.borrow_mut(); @@ -268,6 +261,26 @@ impl usize { + self.capacity() + } + + fn free_capacity(&self) -> usize { + self.free_capacity() + } + + fn len(&self) -> usize { + self.len() + } + + fn is_empty(&self) -> bool { + self.is_empty() + } + + fn is_full(&self) -> bool { + self.is_full() + } } /// Internal state for the PubSub channel @@ -439,8 +452,22 @@ trait SealedPubSubBehavior { /// Publish a message immediately fn publish_immediate(&self, message: T); - /// The amount of messages that can still be published without having to wait or without having to lag the subscribers - fn space(&self) -> usize; + /// Returns the maximum number of elements the channel can hold. + fn capacity(&self) -> usize; + + /// Returns the free capacity of the channel. + /// + /// This is equivalent to `capacity() - len()` + fn free_capacity(&self) -> usize; + + /// Returns the number of elements currently in the channel. + fn len(&self) -> usize; + + /// Returns whether the channel is empty. + fn is_empty(&self) -> bool; + + /// Returns whether the channel is full. + fn is_full(&self) -> bool; /// Let the channel know that a subscriber has dropped fn unregister_subscriber(&self, subscriber_next_message_id: u64); @@ -588,6 +615,7 @@ mod tests { assert_eq!(pub0.try_publish(0), Ok(())); assert_eq!(pub0.try_publish(0), Ok(())); assert_eq!(pub0.try_publish(0), Ok(())); + assert!(pub0.is_full()); assert_eq!(pub0.try_publish(0), Err(0)); drop(sub0); @@ -620,32 +648,42 @@ mod tests { } #[futures_test::test] - async fn correct_space() { + async fn correct_len() { let channel = PubSubChannel::::new(); let mut sub0 = channel.subscriber().unwrap(); let mut sub1 = channel.subscriber().unwrap(); let pub0 = channel.publisher().unwrap(); - assert_eq!(pub0.space(), 4); + assert!(sub0.is_empty()); + assert!(sub1.is_empty()); + assert!(pub0.is_empty()); + assert_eq!(pub0.free_capacity(), 4); + assert_eq!(pub0.len(), 0); pub0.publish(42).await; - assert_eq!(pub0.space(), 3); + assert_eq!(pub0.free_capacity(), 3); + assert_eq!(pub0.len(), 1); pub0.publish(42).await; - assert_eq!(pub0.space(), 2); + assert_eq!(pub0.free_capacity(), 2); + assert_eq!(pub0.len(), 2); sub0.next_message().await; sub0.next_message().await; - assert_eq!(pub0.space(), 2); + assert_eq!(pub0.free_capacity(), 2); + assert_eq!(pub0.len(), 2); sub1.next_message().await; - assert_eq!(pub0.space(), 3); + assert_eq!(pub0.free_capacity(), 3); + assert_eq!(pub0.len(), 1); + sub1.next_message().await; - assert_eq!(pub0.space(), 4); + assert_eq!(pub0.free_capacity(), 4); + assert_eq!(pub0.len(), 0); } #[futures_test::test] @@ -656,29 +694,29 @@ mod tests { let mut sub0 = channel.subscriber().unwrap(); let mut sub1 = channel.subscriber().unwrap(); - assert_eq!(4, pub0.space()); + assert_eq!(4, pub0.free_capacity()); pub0.publish(1).await; pub0.publish(2).await; - assert_eq!(2, channel.space()); + assert_eq!(2, channel.free_capacity()); assert_eq!(1, sub0.try_next_message_pure().unwrap()); assert_eq!(2, sub0.try_next_message_pure().unwrap()); - assert_eq!(2, channel.space()); + assert_eq!(2, channel.free_capacity()); drop(sub0); - assert_eq!(2, channel.space()); + assert_eq!(2, channel.free_capacity()); assert_eq!(1, sub1.try_next_message_pure().unwrap()); - assert_eq!(3, channel.space()); + assert_eq!(3, channel.free_capacity()); drop(sub1); - assert_eq!(4, channel.space()); + assert_eq!(4, channel.free_capacity()); } struct CloneCallCounter(usize); diff --git a/embassy-sync/src/pubsub/publisher.rs b/embassy-sync/src/pubsub/publisher.rs index e1edc9eb9..26e2c63b7 100644 --- a/embassy-sync/src/pubsub/publisher.rs +++ b/embassy-sync/src/pubsub/publisher.rs @@ -43,12 +43,31 @@ impl<'a, PSB: PubSubBehavior + ?Sized, T: Clone> Pub<'a, PSB, T> { self.channel.publish_with_context(message, None) } - /// The amount of messages that can still be published without having to wait or without having to lag the subscribers + /// Returns the maximum number of elements the ***channel*** can hold. + pub fn capacity(&self) -> usize { + self.channel.capacity() + } + + /// Returns the free capacity of the ***channel***. /// - /// *Note: In the time between checking this and a publish action, other publishers may have had time to publish something. - /// So checking doesn't give any guarantees.* - pub fn space(&self) -> usize { - self.channel.space() + /// This is equivalent to `capacity() - len()` + pub fn free_capacity(&self) -> usize { + self.channel.free_capacity() + } + + /// Returns the number of elements currently in the ***channel***. + pub fn len(&self) -> usize { + self.channel.len() + } + + /// Returns whether the ***channel*** is empty. + pub fn is_empty(&self) -> bool { + self.channel.is_empty() + } + + /// Returns whether the ***channel*** is full. + pub fn is_full(&self) -> bool { + self.channel.is_full() } } @@ -124,12 +143,31 @@ impl<'a, PSB: PubSubBehavior + ?Sized, T: Clone> ImmediatePub<'a, PSB, T> { self.channel.publish_with_context(message, None) } - /// The amount of messages that can still be published without having to wait or without having to lag the subscribers + /// Returns the maximum number of elements the ***channel*** can hold. + pub fn capacity(&self) -> usize { + self.channel.capacity() + } + + /// Returns the free capacity of the ***channel***. /// - /// *Note: In the time between checking this and a publish action, other publishers may have had time to publish something. - /// So checking doesn't give any guarantees.* - pub fn space(&self) -> usize { - self.channel.space() + /// This is equivalent to `capacity() - len()` + pub fn free_capacity(&self) -> usize { + self.channel.free_capacity() + } + + /// Returns the number of elements currently in the ***channel***. + pub fn len(&self) -> usize { + self.channel.len() + } + + /// Returns whether the ***channel*** is empty. + pub fn is_empty(&self) -> bool { + self.channel.is_empty() + } + + /// Returns whether the ***channel*** is full. + pub fn is_full(&self) -> bool { + self.channel.is_full() } } diff --git a/embassy-sync/src/pubsub/subscriber.rs b/embassy-sync/src/pubsub/subscriber.rs index f420a75f0..2e2bd26a9 100644 --- a/embassy-sync/src/pubsub/subscriber.rs +++ b/embassy-sync/src/pubsub/subscriber.rs @@ -65,10 +65,39 @@ impl<'a, PSB: PubSubBehavior + ?Sized, T: Clone> Sub<'a, PSB, T> { } } - /// The amount of messages this subscriber hasn't received yet + /// The amount of messages this subscriber hasn't received yet. This is like [Self::len] but specifically + /// for this subscriber. pub fn available(&self) -> u64 { self.channel.available(self.next_message_id) } + + /// Returns the maximum number of elements the ***channel*** can hold. + pub fn capacity(&self) -> usize { + self.channel.capacity() + } + + /// Returns the free capacity of the ***channel***. + /// + /// This is equivalent to `capacity() - len()` + pub fn free_capacity(&self) -> usize { + self.channel.free_capacity() + } + + /// Returns the number of elements currently in the ***channel***. + /// See [Self::available] for how many messages are available for this subscriber. + pub fn len(&self) -> usize { + self.channel.len() + } + + /// Returns whether the ***channel*** is empty. + pub fn is_empty(&self) -> bool { + self.channel.is_empty() + } + + /// Returns whether the ***channel*** is full. + pub fn is_full(&self) -> bool { + self.channel.is_full() + } } impl<'a, PSB: PubSubBehavior + ?Sized, T: Clone> Drop for Sub<'a, PSB, T> { From 07f2240a197a4a3a66f424e7f0c522d2ec947d38 Mon Sep 17 00:00:00 2001 From: Dion Dokter Date: Mon, 20 May 2024 15:38:28 +0200 Subject: [PATCH 335/581] Add to changelog --- embassy-sync/CHANGELOG.md | 1 + 1 file changed, 1 insertion(+) diff --git a/embassy-sync/CHANGELOG.md b/embassy-sync/CHANGELOG.md index 7a830a853..1e85e24c3 100644 --- a/embassy-sync/CHANGELOG.md +++ b/embassy-sync/CHANGELOG.md @@ -10,6 +10,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0 - Add `capacity`, `free_capacity`, `len`, `is_empty` and `is_full` functions to `Channel`. - Add `capacity`, `free_capacity`, `len`, `is_empty` and `is_full` functions to `PriorityChannel`. - Add `capacity`, `free_capacity`, `len`, `is_empty` and `is_full` functions to `PubSubChannel`. +- Made `PubSubBehavior` sealed ## 0.5.0 - 2023-12-04 From f3008597aa7abab6226a5fd47e0ffa233bbd0226 Mon Sep 17 00:00:00 2001 From: Dion Dokter Date: Mon, 20 May 2024 15:49:11 +0200 Subject: [PATCH 336/581] Fix cyw43 --- cyw43/src/runner.rs | 18 ++++++++++-------- 1 file changed, 10 insertions(+), 8 deletions(-) diff --git a/cyw43/src/runner.rs b/cyw43/src/runner.rs index c72cf0def..e90316302 100644 --- a/cyw43/src/runner.rs +++ b/cyw43/src/runner.rs @@ -1,6 +1,5 @@ use embassy_futures::select::{select3, Either3}; use embassy_net_driver_channel as ch; -use embassy_sync::pubsub::PubSubBehavior; use embassy_time::{block_for, Duration, Timer}; use embedded_hal_1::digital::OutputPin; @@ -438,13 +437,16 @@ where // publish() is a deadlock risk in the current design as awaiting here prevents ioctls // The `Runner` always yields when accessing the device, so consumers always have a chance to receive the event // (if they are actively awaiting the queue) - self.events.queue.publish_immediate(events::Message::new( - Status { - event_type: evt_type, - status, - }, - event_payload, - )); + self.events + .queue + .immediate_publisher() + .publish_immediate(events::Message::new( + Status { + event_type: evt_type, + status, + }, + event_payload, + )); } } CHANNEL_TYPE_DATA => { From 5cffaf323b382e90d64e39ee5574ab8a9fa5640d Mon Sep 17 00:00:00 2001 From: Dion Dokter Date: Mon, 20 May 2024 15:52:32 +0200 Subject: [PATCH 337/581] Add little migration sentence to changelog --- embassy-sync/CHANGELOG.md | 1 + 1 file changed, 1 insertion(+) diff --git a/embassy-sync/CHANGELOG.md b/embassy-sync/CHANGELOG.md index 1e85e24c3..bb919b28a 100644 --- a/embassy-sync/CHANGELOG.md +++ b/embassy-sync/CHANGELOG.md @@ -11,6 +11,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0 - Add `capacity`, `free_capacity`, `len`, `is_empty` and `is_full` functions to `PriorityChannel`. - Add `capacity`, `free_capacity`, `len`, `is_empty` and `is_full` functions to `PubSubChannel`. - Made `PubSubBehavior` sealed + - If you called `.publish_immediate(...)` on the queue directly before, then now call `.immediate_publisher().publish_immediate(...)` ## 0.5.0 - 2023-12-04 From a4350e039805e3471949893fc121f0b7e2542494 Mon Sep 17 00:00:00 2001 From: Matt Ickstadt Date: Mon, 20 May 2024 11:33:13 -0500 Subject: [PATCH 338/581] vscode: improve docs in settings.json --- .vscode/settings.json | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/.vscode/settings.json b/.vscode/settings.json index 220d25914..48d0957e6 100644 --- a/.vscode/settings.json +++ b/.vscode/settings.json @@ -9,12 +9,14 @@ "rust-analyzer.check.noDefaultFeatures": true, "rust-analyzer.cargo.noDefaultFeatures": true, "rust-analyzer.showUnlinkedFileNotification": false, - // uncomment the target of your chip. + // Uncomment the target of your chip. //"rust-analyzer.cargo.target": "thumbv6m-none-eabi", //"rust-analyzer.cargo.target": "thumbv7m-none-eabi", "rust-analyzer.cargo.target": "thumbv7em-none-eabi", + //"rust-analyzer.cargo.target": "thumbv7em-none-eabihf", //"rust-analyzer.cargo.target": "thumbv8m.main-none-eabihf", "rust-analyzer.cargo.features": [ + // Comment out these features when working on the examples. Most example crates do not have any cargo features. "stm32f446re", "time-driver-any", "unstable-pac", @@ -22,9 +24,10 @@ "rt", ], "rust-analyzer.linkedProjects": [ - // Uncomment ONE line for the chip you want to work on. - // This makes rust-analyzer work on the example crate and all its dependencies. "embassy-stm32/Cargo.toml", + // To work on the examples, comment the line above and all of the cargo.features lines, + // then uncomment ONE line below to select the chip you want to work on. + // This makes rust-analyzer work on the example crate and all its dependencies. // "examples/nrf52840-rtic/Cargo.toml", // "examples/nrf5340/Cargo.toml", // "examples/nrf-rtos-trace/Cargo.toml", From 5a8ac21f6bc67740d1df956aef6edcfb80376f51 Mon Sep 17 00:00:00 2001 From: Matt Ickstadt Date: Mon, 20 May 2024 11:55:04 -0500 Subject: [PATCH 339/581] embassy-usb-synopsys-otg: impl Sync for EpState This restores the Send/Sync impls for EpState, which were incidentally removed in #2881. This allows the Endpoints to be send to tasks, e.g. as part of a custom class implementation. --- embassy-usb-synopsys-otg/src/lib.rs | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/embassy-usb-synopsys-otg/src/lib.rs b/embassy-usb-synopsys-otg/src/lib.rs index 42cdfb6e1..34dcd1497 100644 --- a/embassy-usb-synopsys-otg/src/lib.rs +++ b/embassy-usb-synopsys-otg/src/lib.rs @@ -221,6 +221,12 @@ struct EpState { out_size: AtomicU16, } +// SAFETY: The EndpointAllocator ensures that the buffer points to valid memory exclusive for each endpoint and is +// large enough to hold the maximum packet size. Access to the buffer is synchronized between the USB interrupt and the +// EndpointOut impl using the out_size atomic variable. +unsafe impl Send for EpState {} +unsafe impl Sync for EpState {} + struct ControlPipeSetupState { /// Holds received SETUP packets. Available if [Ep0State::setup_ready] is true. setup_data: UnsafeCell<[u8; 8]>, @@ -1034,7 +1040,7 @@ impl<'d> embassy_usb_driver::EndpointOut for Endpoint<'d, Out> { return Poll::Ready(Err(EndpointError::BufferOverflow)); } - // SAFETY: exclusive access ensured by `ep_out_size` atomic variable + // SAFETY: exclusive access ensured by `out_size` atomic variable let data = unsafe { core::slice::from_raw_parts(*self.state.out_buffer.get(), len as usize) }; buf[..len as usize].copy_from_slice(data); From 98b06d764629540f7a391f047153d4a5618e8f23 Mon Sep 17 00:00:00 2001 From: Charles Cabergs Date: Mon, 20 May 2024 20:28:13 +0200 Subject: [PATCH 340/581] Fix typo in sharing_peripherals.adoc --- docs/modules/ROOT/pages/sharing_peripherals.adoc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/docs/modules/ROOT/pages/sharing_peripherals.adoc b/docs/modules/ROOT/pages/sharing_peripherals.adoc index 784239fb1..6bcd56b01 100644 --- a/docs/modules/ROOT/pages/sharing_peripherals.adoc +++ b/docs/modules/ROOT/pages/sharing_peripherals.adoc @@ -125,4 +125,4 @@ async fn toggle_led(control: Sender<'static, ThreadModeRawMutex, LedState, 64>, ---- This example replaces the Mutex with a Channel, and uses another task (the main loop) to drive the LED. The advantage of this approach is that only a single task references the peripheral, separating concerns. However, using a Mutex has a lower overhead and might be necessary if you need to ensure -that the operation is ecompleted before continuing to do other work in your task. +that the operation is completed before continuing to do other work in your task. From eeb6ffce4cfa0e0055da8d6738f6d28c3fa43f15 Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Mon, 20 May 2024 23:36:21 +0200 Subject: [PATCH 341/581] stm32/rcc: add ClockEnableBit struct. --- embassy-stm32/build.rs | 32 +++++++++++++++++++++++ embassy-stm32/src/rcc/mod.rs | 50 +++++++++++++++++++++++++++++++++++- 2 files changed, 81 insertions(+), 1 deletion(-) diff --git a/embassy-stm32/build.rs b/embassy-stm32/build.rs index dbc8f9153..f17c6bef6 100644 --- a/embassy-stm32/build.rs +++ b/embassy-stm32/build.rs @@ -7,6 +7,7 @@ use std::{env, fs}; use proc_macro2::{Ident, TokenStream}; use quote::{format_ident, quote}; +use stm32_metapac::metadata::ir::BitOffset; use stm32_metapac::metadata::{ MemoryRegionKind, PeripheralRccKernelClock, PeripheralRccRegister, PeripheralRegisters, StopMode, METADATA, }; @@ -359,12 +360,17 @@ fn main() { // ======== // Extract the rcc registers + let rcc_registers = METADATA .peripherals .iter() .filter_map(|p| p.registers.as_ref()) .find(|r| r.kind == "rcc") .unwrap(); + for b in rcc_registers.ir.blocks { + eprintln!("{}", b.name); + } + let rcc_block = rcc_registers.ir.blocks.iter().find(|b| b.name == "Rcc").unwrap(); // ======== // Generate RccPeripheral impls @@ -540,6 +546,29 @@ fn main() { let pname = format_ident!("{}", p.name); let en_reg = format_ident!("{}", en.register.to_ascii_lowercase()); let set_en_field = format_ident!("set_{}", en.field.to_ascii_lowercase()); + let en_reg_offs = rcc_block + .items + .iter() + .find(|i| i.name.eq_ignore_ascii_case(en.register)) + .unwrap() + .byte_offset; + let en_reg_offs: u8 = (en_reg_offs / 4).try_into().unwrap(); + + let en_bit_offs = &rcc_registers + .ir + .fieldsets + .iter() + .find(|i| i.name.eq_ignore_ascii_case(en.register)) + .unwrap() + .fields + .iter() + .find(|i| i.name.eq_ignore_ascii_case(en.field)) + .unwrap() + .bit_offset; + let BitOffset::Regular(en_bit_offs) = en_bit_offs else { + panic!("cursed bit offset") + }; + let en_bit_offs: u8 = en_bit_offs.offset.try_into().unwrap(); let refcount = clock_gen.force_refcount.contains(ptype) || *rcc_field_count.get(&(en.register, en.field)).unwrap() > 1; @@ -624,6 +653,9 @@ fn main() { crate::pac::RCC.#en_reg().modify(|w| w.#set_en_field(false)); #decr_stop_refcount } + fn enable_bit() -> crate::rcc::ClockEnableBit { + unsafe { crate::rcc::ClockEnableBit::new(#en_reg_offs, #en_bit_offs) } + } } impl crate::rcc::RccPeripheral for peripherals::#pname {} diff --git a/embassy-stm32/src/rcc/mod.rs b/embassy-stm32/src/rcc/mod.rs index a585940bc..c413b62ef 100644 --- a/embassy-stm32/src/rcc/mod.rs +++ b/embassy-stm32/src/rcc/mod.rs @@ -31,6 +31,7 @@ pub use hsi48::*; mod _version; pub use _version::*; +use stm32_metapac::RCC; pub use crate::_generated::{mux, Clocks}; use crate::time::Hertz; @@ -66,9 +67,10 @@ pub(crate) unsafe fn get_freqs() -> &'static Clocks { } pub(crate) trait SealedRccPeripheral { - fn frequency() -> crate::time::Hertz; + fn frequency() -> Hertz; fn enable_and_reset_with_cs(cs: CriticalSection); fn disable_with_cs(cs: CriticalSection); + fn enable_bit() -> ClockEnableBit; fn enable_and_reset() { critical_section::with(|cs| Self::enable_and_reset_with_cs(cs)) @@ -137,3 +139,49 @@ pub unsafe fn enable_and_reset() { pub unsafe fn disable() { T::disable(); } + +/// Struct representing some clock enable bit (xxxENR.xxEN), only known at runtime. +#[derive(Clone, Copy)] +pub(crate) struct ClockEnableBit { + /// offset in 32bit words of the xxxENR register into the RCC register block. + offset: u8, + /// bit within the register (0..=31) + bit: u8, +} + +impl ClockEnableBit { + /// Safety: offset+bit must correspond to a valid xxxEN bit. + pub(crate) unsafe fn new(offset: u8, bit: u8) -> Self { + Self { offset, bit } + } + + fn ptr(self) -> *mut u32 { + unsafe { (RCC.as_ptr() as *mut u32).add(self.offset as _) } + } + + #[allow(unused)] + pub(crate) fn enable_with_cs(self, _cs: CriticalSection) { + let p = self.ptr(); + unsafe { + let val = p.read_volatile(); + p.write_volatile(val | 1u32 << self.bit); + } + } + + pub(crate) fn disable_with_cs(self, _cs: CriticalSection) { + let p = self.ptr(); + unsafe { + let val = p.read_volatile(); + p.write_volatile(val & !(1u32 << self.bit)); + } + } + + #[allow(unused)] + pub(crate) fn enable(self) { + critical_section::with(|cs| self.enable_with_cs(cs)) + } + + pub(crate) fn disable(self) { + critical_section::with(|cs| self.disable_with_cs(cs)) + } +} From ca2eef5387b521a0ea95f26bae530d9bdfbba4d7 Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Thu, 18 Apr 2024 19:08:24 +0200 Subject: [PATCH 342/581] stm32/spi: remove peripheral generic param. --- embassy-stm32/src/i2s.rs | 14 +- embassy-stm32/src/macros.rs | 25 ++ embassy-stm32/src/spi/mod.rs | 237 +++++++++--------- examples/stm32h7/src/bin/spi.rs | 3 +- examples/stm32h7/src/bin/spi_bdma.rs | 4 +- examples/stm32h7/src/bin/spi_dma.rs | 4 +- examples/stm32h7rs/src/bin/spi.rs | 3 +- examples/stm32h7rs/src/bin/spi_dma.rs | 4 +- .../src/bin/spe_adin1110_http_server.rs | 2 +- 9 files changed, 161 insertions(+), 135 deletions(-) diff --git a/embassy-stm32/src/i2s.rs b/embassy-stm32/src/i2s.rs index 9b80dc1d0..c102c0035 100644 --- a/embassy-stm32/src/i2s.rs +++ b/embassy-stm32/src/i2s.rs @@ -153,17 +153,17 @@ impl Default for Config { } /// I2S driver. -pub struct I2S<'d, T: Instance> { - _peri: Spi<'d, T, Async>, +pub struct I2S<'d> { + _peri: Spi<'d, Async>, sd: Option>, ws: Option>, ck: Option>, mck: Option>, } -impl<'d, T: Instance> I2S<'d, T> { +impl<'d> I2S<'d> { /// Note: Full-Duplex modes are not supported at this time - pub fn new( + pub fn new( peri: impl Peripheral

+ 'd, sd: impl Peripheral

> + 'd, ws: impl Peripheral

> + 'd, @@ -208,7 +208,7 @@ impl<'d, T: Instance> I2S<'d, T> { // rate to reach the proper audio sample frequency. The ODD bit in the SPI_I2SPR // register also has to be defined. - T::REGS.i2spr().modify(|w| { + spi.regs.i2spr().modify(|w| { w.set_i2sdiv(div); w.set_odd(match odd { true => Odd::ODD, @@ -235,7 +235,7 @@ impl<'d, T: Instance> I2S<'d, T> { // 5. The I2SE bit in SPI_I2SCFGR register must be set. - T::REGS.i2scfgr().modify(|w| { + spi.regs.i2scfgr().modify(|w| { w.set_ckpol(config.clock_polarity.ckpol()); w.set_i2smod(true); @@ -276,7 +276,7 @@ impl<'d, T: Instance> I2S<'d, T> { } } -impl<'d, T: Instance> Drop for I2S<'d, T> { +impl<'d> Drop for I2S<'d> { fn drop(&mut self) { self.sd.as_ref().map(|x| x.set_as_disconnected()); self.ws.as_ref().map(|x| x.set_as_disconnected()); diff --git a/embassy-stm32/src/macros.rs b/embassy-stm32/src/macros.rs index 02dce1266..9c459a932 100644 --- a/embassy-stm32/src/macros.rs +++ b/embassy-stm32/src/macros.rs @@ -1,5 +1,30 @@ #![macro_use] +macro_rules! peri_trait { + () => { + #[allow(private_interfaces)] + pub(crate) trait SealedInstance { + const INFO: Info; + const STATE: &'static State; + } + + /// SPI instance trait. + #[allow(private_bounds)] + pub trait Instance: Peripheral

+ SealedInstance + RccPeripheral {} + }; +} + +macro_rules! peri_trait_impl { + ($instance:ident, $info:expr) => { + #[allow(private_interfaces)] + impl SealedInstance for crate::peripherals::$instance { + const INFO: Info = $info; + const STATE: &'static State = &State::new(); + } + impl Instance for crate::peripherals::$instance {} + }; +} + macro_rules! pin_trait { ($signal:ident, $instance:path $(, $mode:path)?) => { #[doc = concat!(stringify!($signal), " pin trait")] diff --git a/embassy-stm32/src/spi/mod.rs b/embassy-stm32/src/spi/mod.rs index c39ef1913..5a2ee105d 100644 --- a/embassy-stm32/src/spi/mod.rs +++ b/embassy-stm32/src/spi/mod.rs @@ -6,16 +6,16 @@ use core::ptr; use embassy_embedded_hal::SetConfig; use embassy_futures::join::join; -use embassy_hal_internal::{into_ref, PeripheralRef}; +use embassy_hal_internal::PeripheralRef; pub use embedded_hal_02::spi::{Mode, Phase, Polarity, MODE_0, MODE_1, MODE_2, MODE_3}; use crate::dma::{slice_ptr_parts, word, ChannelAndRequest}; use crate::gpio::{AFType, AnyPin, Pull, SealedPin as _, Speed}; use crate::mode::{Async, Blocking, Mode as PeriMode}; use crate::pac::spi::{regs, vals, Spi as Regs}; -use crate::rcc::RccPeripheral; +use crate::rcc::{ClockEnableBit, RccPeripheral}; use crate::time::Hertz; -use crate::{peripherals, Peripheral}; +use crate::Peripheral; /// SPI error. #[derive(Debug, PartialEq, Eq)] @@ -92,8 +92,10 @@ impl Config { } } /// SPI driver. -pub struct Spi<'d, T: Instance, M: PeriMode> { - _peri: PeripheralRef<'d, T>, +pub struct Spi<'d, M: PeriMode> { + pub(crate) regs: Regs, + enable_bit: ClockEnableBit, + kernel_clock: Hertz, sck: Option>, mosi: Option>, miso: Option>, @@ -103,9 +105,9 @@ pub struct Spi<'d, T: Instance, M: PeriMode> { current_word_size: word_impl::Config, } -impl<'d, T: Instance, M: PeriMode> Spi<'d, T, M> { - fn new_inner( - peri: impl Peripheral

+ 'd, +impl<'d, M: PeriMode> Spi<'d, M> { + fn new_inner( + _peri: impl Peripheral

+ 'd, sck: Option>, mosi: Option>, miso: Option>, @@ -113,11 +115,9 @@ impl<'d, T: Instance, M: PeriMode> Spi<'d, T, M> { rx_dma: Option>, config: Config, ) -> Self { - into_ref!(peri); - - let pclk = T::frequency(); - let freq = config.frequency; - let br = compute_baud_rate(pclk, freq); + let regs = T::INFO.regs; + let kernel_clock = T::frequency(); + let br = compute_baud_rate(kernel_clock, config.frequency); let cpha = config.raw_phase(); let cpol = config.raw_polarity(); @@ -128,10 +128,10 @@ impl<'d, T: Instance, M: PeriMode> Spi<'d, T, M> { #[cfg(any(spi_v1, spi_f1))] { - T::REGS.cr2().modify(|w| { + regs.cr2().modify(|w| { w.set_ssoe(false); }); - T::REGS.cr1().modify(|w| { + regs.cr1().modify(|w| { w.set_cpha(cpha); w.set_cpol(cpol); @@ -151,13 +151,13 @@ impl<'d, T: Instance, M: PeriMode> Spi<'d, T, M> { } #[cfg(spi_v2)] { - T::REGS.cr2().modify(|w| { + regs.cr2().modify(|w| { let (ds, frxth) = ::CONFIG; w.set_frxth(frxth); w.set_ds(ds); w.set_ssoe(false); }); - T::REGS.cr1().modify(|w| { + regs.cr1().modify(|w| { w.set_cpha(cpha); w.set_cpol(cpol); @@ -173,8 +173,8 @@ impl<'d, T: Instance, M: PeriMode> Spi<'d, T, M> { } #[cfg(any(spi_v3, spi_v4, spi_v5))] { - T::REGS.ifcr().write(|w| w.0 = 0xffff_ffff); - T::REGS.cfg2().modify(|w| { + regs.ifcr().write(|w| w.0 = 0xffff_ffff); + regs.cfg2().modify(|w| { //w.set_ssoe(true); w.set_ssoe(false); w.set_cpha(cpha); @@ -189,23 +189,25 @@ impl<'d, T: Instance, M: PeriMode> Spi<'d, T, M> { w.set_afcntr(true); w.set_ssiop(vals::Ssiop::ACTIVEHIGH); }); - T::REGS.cfg1().modify(|w| { + regs.cfg1().modify(|w| { w.set_crcen(false); w.set_mbr(br); w.set_dsize(::CONFIG); w.set_fthlv(vals::Fthlv::ONEFRAME); }); - T::REGS.cr2().modify(|w| { + regs.cr2().modify(|w| { w.set_tsize(0); }); - T::REGS.cr1().modify(|w| { + regs.cr1().modify(|w| { w.set_ssi(false); w.set_spe(true); }); } Self { - _peri: peri, + regs, + enable_bit: T::enable_bit(), + kernel_clock, sck, mosi, miso, @@ -223,12 +225,10 @@ impl<'d, T: Instance, M: PeriMode> Spi<'d, T, M> { let lsbfirst = config.raw_byte_order(); - let pclk = T::frequency(); - let freq = config.frequency; - let br = compute_baud_rate(pclk, freq); + let br = compute_baud_rate(self.kernel_clock, config.frequency); #[cfg(any(spi_v1, spi_f1, spi_v2))] - T::REGS.cr1().modify(|w| { + self.regs.cr1().modify(|w| { w.set_cpha(cpha); w.set_cpol(cpol); w.set_br(br); @@ -237,12 +237,12 @@ impl<'d, T: Instance, M: PeriMode> Spi<'d, T, M> { #[cfg(any(spi_v3, spi_v4, spi_v5))] { - T::REGS.cfg2().modify(|w| { + self.regs.cfg2().modify(|w| { w.set_cpha(cpha); w.set_cpol(cpol); w.set_lsbfirst(lsbfirst); }); - T::REGS.cfg1().modify(|w| { + self.regs.cfg1().modify(|w| { w.set_mbr(br); }); } @@ -252,11 +252,11 @@ impl<'d, T: Instance, M: PeriMode> Spi<'d, T, M> { /// Get current SPI configuration. pub fn get_current_config(&self) -> Config { #[cfg(any(spi_v1, spi_f1, spi_v2))] - let cfg = T::REGS.cr1().read(); + let cfg = self.regs.cr1().read(); #[cfg(any(spi_v3, spi_v4, spi_v5))] - let cfg = T::REGS.cfg2().read(); + let cfg = self.regs.cfg2().read(); #[cfg(any(spi_v3, spi_v4, spi_v5))] - let cfg1 = T::REGS.cfg1().read(); + let cfg1 = self.regs.cfg1().read(); let polarity = if cfg.cpol() == vals::Cpol::IDLELOW { Polarity::IdleLow @@ -280,8 +280,7 @@ impl<'d, T: Instance, M: PeriMode> Spi<'d, T, M> { #[cfg(any(spi_v3, spi_v4, spi_v5))] let br = cfg1.mbr(); - let pclk = T::frequency(); - let frequency = compute_frequency(pclk, br); + let frequency = compute_frequency(self.kernel_clock, br); Config { mode: Mode { polarity, phase }, @@ -297,40 +296,40 @@ impl<'d, T: Instance, M: PeriMode> Spi<'d, T, M> { #[cfg(any(spi_v1, spi_f1))] { - T::REGS.cr1().modify(|reg| { + self.regs.cr1().modify(|reg| { reg.set_spe(false); reg.set_dff(word_size) }); - T::REGS.cr1().modify(|reg| { + self.regs.cr1().modify(|reg| { reg.set_spe(true); }); } #[cfg(spi_v2)] { - T::REGS.cr1().modify(|w| { + self.regs.cr1().modify(|w| { w.set_spe(false); }); - T::REGS.cr2().modify(|w| { + self.regs.cr2().modify(|w| { w.set_frxth(word_size.1); w.set_ds(word_size.0); }); - T::REGS.cr1().modify(|w| { + self.regs.cr1().modify(|w| { w.set_spe(true); }); } #[cfg(any(spi_v3, spi_v4, spi_v5))] { - T::REGS.cr1().modify(|w| { + self.regs.cr1().modify(|w| { w.set_csusp(true); }); - while T::REGS.sr().read().eot() {} - T::REGS.cr1().modify(|w| { + while self.regs.sr().read().eot() {} + self.regs.cr1().modify(|w| { w.set_spe(false); }); - T::REGS.cfg1().modify(|w| { + self.regs.cfg1().modify(|w| { w.set_dsize(word_size); }); - T::REGS.cr1().modify(|w| { + self.regs.cr1().modify(|w| { w.set_csusp(false); w.set_spe(true); }); @@ -341,22 +340,22 @@ impl<'d, T: Instance, M: PeriMode> Spi<'d, T, M> { /// Blocking write. pub fn blocking_write(&mut self, words: &[W]) -> Result<(), Error> { - T::REGS.cr1().modify(|w| w.set_spe(true)); - flush_rx_fifo(T::REGS); + self.regs.cr1().modify(|w| w.set_spe(true)); + flush_rx_fifo(self.regs); self.set_word_size(W::CONFIG); for word in words.iter() { - let _ = transfer_word(T::REGS, *word)?; + let _ = transfer_word(self.regs, *word)?; } Ok(()) } /// Blocking read. pub fn blocking_read(&mut self, words: &mut [W]) -> Result<(), Error> { - T::REGS.cr1().modify(|w| w.set_spe(true)); - flush_rx_fifo(T::REGS); + self.regs.cr1().modify(|w| w.set_spe(true)); + flush_rx_fifo(self.regs); self.set_word_size(W::CONFIG); for word in words.iter_mut() { - *word = transfer_word(T::REGS, W::default())?; + *word = transfer_word(self.regs, W::default())?; } Ok(()) } @@ -365,11 +364,11 @@ impl<'d, T: Instance, M: PeriMode> Spi<'d, T, M> { /// /// This writes the contents of `data` on MOSI, and puts the received data on MISO in `data`, at the same time. pub fn blocking_transfer_in_place(&mut self, words: &mut [W]) -> Result<(), Error> { - T::REGS.cr1().modify(|w| w.set_spe(true)); - flush_rx_fifo(T::REGS); + self.regs.cr1().modify(|w| w.set_spe(true)); + flush_rx_fifo(self.regs); self.set_word_size(W::CONFIG); for word in words.iter_mut() { - *word = transfer_word(T::REGS, *word)?; + *word = transfer_word(self.regs, *word)?; } Ok(()) } @@ -381,13 +380,13 @@ impl<'d, T: Instance, M: PeriMode> Spi<'d, T, M> { /// The transfer runs for `max(read.len(), write.len())` bytes. If `read` is shorter extra bytes are ignored. /// If `write` is shorter it is padded with zero bytes. pub fn blocking_transfer(&mut self, read: &mut [W], write: &[W]) -> Result<(), Error> { - T::REGS.cr1().modify(|w| w.set_spe(true)); - flush_rx_fifo(T::REGS); + self.regs.cr1().modify(|w| w.set_spe(true)); + flush_rx_fifo(self.regs); self.set_word_size(W::CONFIG); let len = read.len().max(write.len()); for i in 0..len { let wb = write.get(i).copied().unwrap_or_default(); - let rb = transfer_word(T::REGS, wb)?; + let rb = transfer_word(self.regs, wb)?; if let Some(r) = read.get_mut(i) { *r = rb; } @@ -396,9 +395,9 @@ impl<'d, T: Instance, M: PeriMode> Spi<'d, T, M> { } } -impl<'d, T: Instance> Spi<'d, T, Blocking> { +impl<'d> Spi<'d, Blocking> { /// Create a new blocking SPI driver. - pub fn new_blocking( + pub fn new_blocking( peri: impl Peripheral

+ 'd, sck: impl Peripheral

> + 'd, mosi: impl Peripheral

> + 'd, @@ -417,7 +416,7 @@ impl<'d, T: Instance> Spi<'d, T, Blocking> { } /// Create a new blocking SPI driver, in RX-only mode (only MISO pin, no MOSI). - pub fn new_blocking_rxonly( + pub fn new_blocking_rxonly( peri: impl Peripheral

+ 'd, sck: impl Peripheral

> + 'd, miso: impl Peripheral

> + 'd, @@ -435,7 +434,7 @@ impl<'d, T: Instance> Spi<'d, T, Blocking> { } /// Create a new blocking SPI driver, in TX-only mode (only MOSI pin, no MISO). - pub fn new_blocking_txonly( + pub fn new_blocking_txonly( peri: impl Peripheral

+ 'd, sck: impl Peripheral

> + 'd, mosi: impl Peripheral

> + 'd, @@ -455,7 +454,7 @@ impl<'d, T: Instance> Spi<'d, T, Blocking> { /// Create a new SPI driver, in TX-only mode, without SCK pin. /// /// This can be useful for bit-banging non-SPI protocols. - pub fn new_blocking_txonly_nosck( + pub fn new_blocking_txonly_nosck( peri: impl Peripheral

+ 'd, mosi: impl Peripheral

> + 'd, config: Config, @@ -472,9 +471,9 @@ impl<'d, T: Instance> Spi<'d, T, Blocking> { } } -impl<'d, T: Instance> Spi<'d, T, Async> { +impl<'d> Spi<'d, Async> { /// Create a new SPI driver. - pub fn new( + pub fn new( peri: impl Peripheral

+ 'd, sck: impl Peripheral

> + 'd, mosi: impl Peripheral

> + 'd, @@ -495,7 +494,7 @@ impl<'d, T: Instance> Spi<'d, T, Async> { } /// Create a new SPI driver, in RX-only mode (only MISO pin, no MOSI). - pub fn new_rxonly( + pub fn new_rxonly( peri: impl Peripheral

+ 'd, sck: impl Peripheral

> + 'd, miso: impl Peripheral

> + 'd, @@ -514,7 +513,7 @@ impl<'d, T: Instance> Spi<'d, T, Async> { } /// Create a new SPI driver, in TX-only mode (only MOSI pin, no MISO). - pub fn new_txonly( + pub fn new_txonly( peri: impl Peripheral

+ 'd, sck: impl Peripheral

> + 'd, mosi: impl Peripheral

> + 'd, @@ -535,7 +534,7 @@ impl<'d, T: Instance> Spi<'d, T, Async> { /// Create a new SPI driver, in TX-only mode, without SCK pin. /// /// This can be useful for bit-banging non-SPI protocols. - pub fn new_txonly_nosck( + pub fn new_txonly_nosck( peri: impl Peripheral

+ 'd, mosi: impl Peripheral

> + 'd, tx_dma: impl Peripheral

> + 'd, @@ -554,7 +553,7 @@ impl<'d, T: Instance> Spi<'d, T, Async> { #[cfg(stm32wl)] /// Useful for on chip peripherals like SUBGHZ which are hardwired. - pub fn new_subghz( + pub fn new_subghz( peri: impl Peripheral

+ 'd, tx_dma: impl Peripheral

> + 'd, rx_dma: impl Peripheral

> + 'd, @@ -562,7 +561,7 @@ impl<'d, T: Instance> Spi<'d, T, Async> { // see RM0453 rev 1 section 7.2.13 page 291 // The SUBGHZSPI_SCK frequency is obtained by PCLK3 divided by two. // The SUBGHZSPI_SCK clock maximum speed must not exceed 16 MHz. - let pclk3_freq = ::frequency().0; + let pclk3_freq = ::frequency().0; let freq = Hertz(core::cmp::min(pclk3_freq / 2, 16_000_000)); let mut config = Config::default(); config.mode = MODE_0; @@ -573,7 +572,7 @@ impl<'d, T: Instance> Spi<'d, T, Async> { } #[allow(dead_code)] - pub(crate) fn new_internal( + pub(crate) fn new_internal( peri: impl Peripheral

+ 'd, tx_dma: impl Peripheral

> + 'd, rx_dma: impl Peripheral

> + 'd, @@ -589,25 +588,25 @@ impl<'d, T: Instance> Spi<'d, T, Async> { } self.set_word_size(W::CONFIG); - T::REGS.cr1().modify(|w| { + self.regs.cr1().modify(|w| { w.set_spe(false); }); - let tx_dst = T::REGS.tx_ptr(); + let tx_dst = self.regs.tx_ptr(); let tx_f = unsafe { self.tx_dma.as_mut().unwrap().write(data, tx_dst, Default::default()) }; - set_txdmaen(T::REGS, true); - T::REGS.cr1().modify(|w| { + set_txdmaen(self.regs, true); + self.regs.cr1().modify(|w| { w.set_spe(true); }); #[cfg(any(spi_v3, spi_v4, spi_v5))] - T::REGS.cr1().modify(|w| { + self.regs.cr1().modify(|w| { w.set_cstart(true); }); tx_f.await; - finish_dma(T::REGS); + finish_dma(self.regs); Ok(()) } @@ -619,22 +618,22 @@ impl<'d, T: Instance> Spi<'d, T, Async> { } self.set_word_size(W::CONFIG); - T::REGS.cr1().modify(|w| { + self.regs.cr1().modify(|w| { w.set_spe(false); }); // SPIv3 clears rxfifo on SPE=0 #[cfg(not(any(spi_v3, spi_v4, spi_v5)))] - flush_rx_fifo(T::REGS); + flush_rx_fifo(self.regs); - set_rxdmaen(T::REGS, true); + set_rxdmaen(self.regs, true); let clock_byte_count = data.len(); - let rx_src = T::REGS.rx_ptr(); + let rx_src = self.regs.rx_ptr(); let rx_f = unsafe { self.rx_dma.as_mut().unwrap().read(rx_src, data, Default::default()) }; - let tx_dst = T::REGS.tx_ptr(); + let tx_dst = self.regs.tx_ptr(); let clock_byte = 0x00u8; let tx_f = unsafe { self.tx_dma @@ -643,18 +642,18 @@ impl<'d, T: Instance> Spi<'d, T, Async> { .write_repeated(&clock_byte, clock_byte_count, tx_dst, Default::default()) }; - set_txdmaen(T::REGS, true); - T::REGS.cr1().modify(|w| { + set_txdmaen(self.regs, true); + self.regs.cr1().modify(|w| { w.set_spe(true); }); #[cfg(any(spi_v3, spi_v4, spi_v5))] - T::REGS.cr1().modify(|w| { + self.regs.cr1().modify(|w| { w.set_cstart(true); }); join(tx_f, rx_f).await; - finish_dma(T::REGS); + finish_dma(self.regs); Ok(()) } @@ -668,20 +667,20 @@ impl<'d, T: Instance> Spi<'d, T, Async> { } self.set_word_size(W::CONFIG); - T::REGS.cr1().modify(|w| { + self.regs.cr1().modify(|w| { w.set_spe(false); }); // SPIv3 clears rxfifo on SPE=0 #[cfg(not(any(spi_v3, spi_v4, spi_v5)))] - flush_rx_fifo(T::REGS); + flush_rx_fifo(self.regs); - set_rxdmaen(T::REGS, true); + set_rxdmaen(self.regs, true); - let rx_src = T::REGS.rx_ptr(); + let rx_src = self.regs.rx_ptr(); let rx_f = unsafe { self.rx_dma.as_mut().unwrap().read_raw(rx_src, read, Default::default()) }; - let tx_dst = T::REGS.tx_ptr(); + let tx_dst = self.regs.tx_ptr(); let tx_f = unsafe { self.tx_dma .as_mut() @@ -689,18 +688,18 @@ impl<'d, T: Instance> Spi<'d, T, Async> { .write_raw(write, tx_dst, Default::default()) }; - set_txdmaen(T::REGS, true); - T::REGS.cr1().modify(|w| { + set_txdmaen(self.regs, true); + self.regs.cr1().modify(|w| { w.set_spe(true); }); #[cfg(any(spi_v3, spi_v4, spi_v5))] - T::REGS.cr1().modify(|w| { + self.regs.cr1().modify(|w| { w.set_cstart(true); }); join(tx_f, rx_f).await; - finish_dma(T::REGS); + finish_dma(self.regs); Ok(()) } @@ -723,13 +722,13 @@ impl<'d, T: Instance> Spi<'d, T, Async> { } } -impl<'d, T: Instance, M: PeriMode> Drop for Spi<'d, T, M> { +impl<'d, M: PeriMode> Drop for Spi<'d, M> { fn drop(&mut self) { self.sck.as_ref().map(|x| x.set_as_disconnected()); self.mosi.as_ref().map(|x| x.set_as_disconnected()); self.miso.as_ref().map(|x| x.set_as_disconnected()); - T::disable(); + self.enable_bit.disable(); } } @@ -738,8 +737,8 @@ use vals::Br; #[cfg(any(spi_v3, spi_v4, spi_v5))] use vals::Mbr as Br; -fn compute_baud_rate(clocks: Hertz, freq: Hertz) -> Br { - let val = match clocks.0 / freq.0 { +fn compute_baud_rate(kernel_clock: Hertz, freq: Hertz) -> Br { + let val = match kernel_clock.0 / freq.0 { 0 => panic!("You are trying to reach a frequency higher than the clock"), 1..=2 => 0b000, 3..=5 => 0b001, @@ -754,7 +753,7 @@ fn compute_baud_rate(clocks: Hertz, freq: Hertz) -> Br { Br::from_bits(val) } -fn compute_frequency(clocks: Hertz, br: Br) -> Hertz { +fn compute_frequency(kernel_clock: Hertz, br: Br) -> Hertz { let div: u16 = match br { Br::DIV2 => 2, Br::DIV4 => 4, @@ -766,7 +765,7 @@ fn compute_frequency(clocks: Hertz, br: Br) -> Hertz { Br::DIV256 => 256, }; - clocks / div + kernel_clock / div } trait RegsExt { @@ -941,7 +940,7 @@ fn transfer_word(regs: Regs, tx_word: W) -> Result { // some marker traits. For details, see https://github.com/rust-embedded/embedded-hal/pull/289 macro_rules! impl_blocking { ($w:ident) => { - impl<'d, T: Instance, M: PeriMode> embedded_hal_02::blocking::spi::Write<$w> for Spi<'d, T, M> { + impl<'d, M: PeriMode> embedded_hal_02::blocking::spi::Write<$w> for Spi<'d, M> { type Error = Error; fn write(&mut self, words: &[$w]) -> Result<(), Self::Error> { @@ -949,7 +948,7 @@ macro_rules! impl_blocking { } } - impl<'d, T: Instance, M: PeriMode> embedded_hal_02::blocking::spi::Transfer<$w> for Spi<'d, T, M> { + impl<'d, M: PeriMode> embedded_hal_02::blocking::spi::Transfer<$w> for Spi<'d, M> { type Error = Error; fn transfer<'w>(&mut self, words: &'w mut [$w]) -> Result<&'w [$w], Self::Error> { @@ -963,11 +962,11 @@ macro_rules! impl_blocking { impl_blocking!(u8); impl_blocking!(u16); -impl<'d, T: Instance, M: PeriMode> embedded_hal_1::spi::ErrorType for Spi<'d, T, M> { +impl<'d, M: PeriMode> embedded_hal_1::spi::ErrorType for Spi<'d, M> { type Error = Error; } -impl<'d, T: Instance, W: Word, M: PeriMode> embedded_hal_1::spi::SpiBus for Spi<'d, T, M> { +impl<'d, W: Word, M: PeriMode> embedded_hal_1::spi::SpiBus for Spi<'d, M> { fn flush(&mut self) -> Result<(), Self::Error> { Ok(()) } @@ -1000,7 +999,7 @@ impl embedded_hal_1::spi::Error for Error { } } -impl<'d, T: Instance, W: Word> embedded_hal_async::spi::SpiBus for Spi<'d, T, Async> { +impl<'d, W: Word> embedded_hal_async::spi::SpiBus for Spi<'d, Async> { async fn flush(&mut self) -> Result<(), Self::Error> { Ok(()) } @@ -1022,10 +1021,6 @@ impl<'d, T: Instance, W: Word> embedded_hal_async::spi::SpiBus for Spi<'d, T, } } -pub(crate) trait SealedInstance { - const REGS: Regs; -} - trait SealedWord { const CONFIG: word_impl::Config; } @@ -1111,9 +1106,19 @@ mod word_impl { impl_word!(u32, 32 - 1); } -/// SPI instance trait. -#[allow(private_bounds)] -pub trait Instance: Peripheral

+ SealedInstance + RccPeripheral {} +struct Info { + regs: Regs, +} + +struct State {} + +impl State { + const fn new() -> Self { + Self {} + } +} + +peri_trait!(); pin_trait!(SckPin, Instance); pin_trait!(MosiPin, Instance); @@ -1127,15 +1132,13 @@ dma_trait!(TxDma, Instance); foreach_peripheral!( (spi, $inst:ident) => { - impl SealedInstance for peripherals::$inst { - const REGS: Regs = crate::pac::$inst; - } - - impl Instance for peripherals::$inst {} + peri_trait_impl!($inst, Info { + regs: crate::pac::$inst, + }); }; ); -impl<'d, T: Instance, M: PeriMode> SetConfig for Spi<'d, T, M> { +impl<'d, M: PeriMode> SetConfig for Spi<'d, M> { type Config = Config; type ConfigError = (); fn set_config(&mut self, config: &Self::Config) -> Result<(), ()> { diff --git a/examples/stm32h7/src/bin/spi.rs b/examples/stm32h7/src/bin/spi.rs index aaebdc346..ad4a8aaf7 100644 --- a/examples/stm32h7/src/bin/spi.rs +++ b/examples/stm32h7/src/bin/spi.rs @@ -8,7 +8,6 @@ use cortex_m_rt::entry; use defmt::*; use embassy_executor::Executor; use embassy_stm32::mode::Blocking; -use embassy_stm32::peripherals::SPI3; use embassy_stm32::time::mhz; use embassy_stm32::{spi, Config}; use heapless::String; @@ -16,7 +15,7 @@ use static_cell::StaticCell; use {defmt_rtt as _, panic_probe as _}; #[embassy_executor::task] -async fn main_task(mut spi: spi::Spi<'static, SPI3, Blocking>) { +async fn main_task(mut spi: spi::Spi<'static, Blocking>) { for n in 0u32.. { let mut write: String<128> = String::new(); core::write!(&mut write, "Hello DMA World {}!\r\n", n).unwrap(); diff --git a/examples/stm32h7/src/bin/spi_bdma.rs b/examples/stm32h7/src/bin/spi_bdma.rs index f968df4a7..b2e941078 100644 --- a/examples/stm32h7/src/bin/spi_bdma.rs +++ b/examples/stm32h7/src/bin/spi_bdma.rs @@ -9,7 +9,7 @@ use defmt::*; use embassy_executor::Executor; use embassy_stm32::mode::Async; use embassy_stm32::time::mhz; -use embassy_stm32::{peripherals, spi, Config}; +use embassy_stm32::{spi, Config}; use heapless::String; use static_cell::StaticCell; use {defmt_rtt as _, panic_probe as _}; @@ -19,7 +19,7 @@ use {defmt_rtt as _, panic_probe as _}; static mut RAM_D3: [u8; 64 * 1024] = [0u8; 64 * 1024]; #[embassy_executor::task] -async fn main_task(mut spi: spi::Spi<'static, peripherals::SPI6, Async>) { +async fn main_task(mut spi: spi::Spi<'static, Async>) { let read_buffer = unsafe { &mut RAM_D3[0..128] }; let write_buffer = unsafe { &mut RAM_D3[128..256] }; diff --git a/examples/stm32h7/src/bin/spi_dma.rs b/examples/stm32h7/src/bin/spi_dma.rs index 3d3c724eb..731c7fef5 100644 --- a/examples/stm32h7/src/bin/spi_dma.rs +++ b/examples/stm32h7/src/bin/spi_dma.rs @@ -9,13 +9,13 @@ use defmt::*; use embassy_executor::Executor; use embassy_stm32::mode::Async; use embassy_stm32::time::mhz; -use embassy_stm32::{peripherals, spi, Config}; +use embassy_stm32::{spi, Config}; use heapless::String; use static_cell::StaticCell; use {defmt_rtt as _, panic_probe as _}; #[embassy_executor::task] -async fn main_task(mut spi: spi::Spi<'static, peripherals::SPI3, Async>) { +async fn main_task(mut spi: spi::Spi<'static, Async>) { for n in 0u32.. { let mut write: String<128> = String::new(); let mut read = [0; 128]; diff --git a/examples/stm32h7rs/src/bin/spi.rs b/examples/stm32h7rs/src/bin/spi.rs index a7767876d..8d6ccc58b 100644 --- a/examples/stm32h7rs/src/bin/spi.rs +++ b/examples/stm32h7rs/src/bin/spi.rs @@ -8,7 +8,6 @@ use cortex_m_rt::entry; use defmt::*; use embassy_executor::Executor; use embassy_stm32::mode::Blocking; -use embassy_stm32::peripherals::SPI3; use embassy_stm32::spi; use embassy_stm32::time::mhz; use heapless::String; @@ -16,7 +15,7 @@ use static_cell::StaticCell; use {defmt_rtt as _, panic_probe as _}; #[embassy_executor::task] -async fn main_task(mut spi: spi::Spi<'static, SPI3, Blocking>) { +async fn main_task(mut spi: spi::Spi<'static, Blocking>) { for n in 0u32.. { let mut write: String<128> = String::new(); core::write!(&mut write, "Hello DMA World {}!\r\n", n).unwrap(); diff --git a/examples/stm32h7rs/src/bin/spi_dma.rs b/examples/stm32h7rs/src/bin/spi_dma.rs index 26b5d6751..cb305351b 100644 --- a/examples/stm32h7rs/src/bin/spi_dma.rs +++ b/examples/stm32h7rs/src/bin/spi_dma.rs @@ -8,14 +8,14 @@ use cortex_m_rt::entry; use defmt::*; use embassy_executor::Executor; use embassy_stm32::mode::Async; +use embassy_stm32::spi; use embassy_stm32::time::mhz; -use embassy_stm32::{peripherals, spi}; use heapless::String; use static_cell::StaticCell; use {defmt_rtt as _, panic_probe as _}; #[embassy_executor::task] -async fn main_task(mut spi: spi::Spi<'static, peripherals::SPI3, Async>) { +async fn main_task(mut spi: spi::Spi<'static, Async>) { for n in 0u32.. { let mut write: String<128> = String::new(); let mut read = [0; 128]; diff --git a/examples/stm32l4/src/bin/spe_adin1110_http_server.rs b/examples/stm32l4/src/bin/spe_adin1110_http_server.rs index 694629ede..985ac8171 100644 --- a/examples/stm32l4/src/bin/spe_adin1110_http_server.rs +++ b/examples/stm32l4/src/bin/spe_adin1110_http_server.rs @@ -55,7 +55,7 @@ const IP_ADDRESS: Ipv4Cidr = Ipv4Cidr::new(Ipv4Address([192, 168, 1, 5]), 24); // Listen port for the webserver const HTTP_LISTEN_PORT: u16 = 80; -pub type SpeSpi = Spi<'static, peripherals::SPI2, Async>; +pub type SpeSpi = Spi<'static, Async>; pub type SpeSpiCs = ExclusiveDevice, Delay>; pub type SpeInt = exti::ExtiInput<'static>; pub type SpeRst = Output<'static>; From 2b09f9efd7e621708cd00bc512ce981735907103 Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Mon, 20 May 2024 23:41:02 +0200 Subject: [PATCH 343/581] stm32/spi: check that the RCC enable bit is disabled on drop. --- tests/stm32/src/bin/spi.rs | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/tests/stm32/src/bin/spi.rs b/tests/stm32/src/bin/spi.rs index 59cb0cfd3..c1576bfeb 100644 --- a/tests/stm32/src/bin/spi.rs +++ b/tests/stm32/src/bin/spi.rs @@ -58,6 +58,14 @@ async fn main(_spawner: Spawner) { spi.blocking_read::(&mut []).unwrap(); spi.blocking_write::(&[]).unwrap(); + // Assert the RCC bit gets disabled on drop. + #[cfg(feature = "stm32f429zi")] + { + defmt::assert!(embassy_stm32::pac::RCC.apb2enr().read().spi1en()); + drop(spi); + defmt::assert!(!embassy_stm32::pac::RCC.apb2enr().read().spi1en()); + } + info!("Test OK"); cortex_m::asm::bkpt(); } From 6a508b32101b0af1a77624ef0a22c72c972b1b74 Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Tue, 21 May 2024 01:24:10 +0200 Subject: [PATCH 344/581] stm32: use funcs for info/state, const for ENABLE_BIT. --- embassy-stm32/build.rs | 6 +- embassy-stm32/src/i2s.rs | 4 +- embassy-stm32/src/macros.rs | 16 +++-- embassy-stm32/src/rcc/mod.rs | 5 +- embassy-stm32/src/spi/mod.rs | 122 +++++++++++++++++------------------ 5 files changed, 81 insertions(+), 72 deletions(-) diff --git a/embassy-stm32/build.rs b/embassy-stm32/build.rs index f17c6bef6..e615c6307 100644 --- a/embassy-stm32/build.rs +++ b/embassy-stm32/build.rs @@ -653,9 +653,9 @@ fn main() { crate::pac::RCC.#en_reg().modify(|w| w.#set_en_field(false)); #decr_stop_refcount } - fn enable_bit() -> crate::rcc::ClockEnableBit { - unsafe { crate::rcc::ClockEnableBit::new(#en_reg_offs, #en_bit_offs) } - } + + const ENABLE_BIT: crate::rcc::ClockEnableBit = + unsafe { crate::rcc::ClockEnableBit::new(#en_reg_offs, #en_bit_offs) }; } impl crate::rcc::RccPeripheral for peripherals::#pname {} diff --git a/embassy-stm32/src/i2s.rs b/embassy-stm32/src/i2s.rs index c102c0035..c78810a38 100644 --- a/embassy-stm32/src/i2s.rs +++ b/embassy-stm32/src/i2s.rs @@ -208,7 +208,7 @@ impl<'d> I2S<'d> { // rate to reach the proper audio sample frequency. The ODD bit in the SPI_I2SPR // register also has to be defined. - spi.regs.i2spr().modify(|w| { + spi.info.regs.i2spr().modify(|w| { w.set_i2sdiv(div); w.set_odd(match odd { true => Odd::ODD, @@ -235,7 +235,7 @@ impl<'d> I2S<'d> { // 5. The I2SE bit in SPI_I2SCFGR register must be set. - spi.regs.i2scfgr().modify(|w| { + spi.info.regs.i2scfgr().modify(|w| { w.set_ckpol(config.clock_polarity.ckpol()); w.set_i2smod(true); diff --git a/embassy-stm32/src/macros.rs b/embassy-stm32/src/macros.rs index 9c459a932..6a5691181 100644 --- a/embassy-stm32/src/macros.rs +++ b/embassy-stm32/src/macros.rs @@ -4,8 +4,10 @@ macro_rules! peri_trait { () => { #[allow(private_interfaces)] pub(crate) trait SealedInstance { - const INFO: Info; - const STATE: &'static State; + #[allow(unused)] + fn info() -> &'static Info; + #[allow(unused)] + fn state() -> &'static State; } /// SPI instance trait. @@ -18,8 +20,14 @@ macro_rules! peri_trait_impl { ($instance:ident, $info:expr) => { #[allow(private_interfaces)] impl SealedInstance for crate::peripherals::$instance { - const INFO: Info = $info; - const STATE: &'static State = &State::new(); + fn info() -> &'static Info { + static INFO: Info = $info; + &INFO + } + fn state() -> &'static State { + static STATE: State = State::new(); + &STATE + } } impl Instance for crate::peripherals::$instance {} }; diff --git a/embassy-stm32/src/rcc/mod.rs b/embassy-stm32/src/rcc/mod.rs index c413b62ef..28816256c 100644 --- a/embassy-stm32/src/rcc/mod.rs +++ b/embassy-stm32/src/rcc/mod.rs @@ -67,10 +67,11 @@ pub(crate) unsafe fn get_freqs() -> &'static Clocks { } pub(crate) trait SealedRccPeripheral { + const ENABLE_BIT: ClockEnableBit; + fn frequency() -> Hertz; fn enable_and_reset_with_cs(cs: CriticalSection); fn disable_with_cs(cs: CriticalSection); - fn enable_bit() -> ClockEnableBit; fn enable_and_reset() { critical_section::with(|cs| Self::enable_and_reset_with_cs(cs)) @@ -151,7 +152,7 @@ pub(crate) struct ClockEnableBit { impl ClockEnableBit { /// Safety: offset+bit must correspond to a valid xxxEN bit. - pub(crate) unsafe fn new(offset: u8, bit: u8) -> Self { + pub(crate) const unsafe fn new(offset: u8, bit: u8) -> Self { Self { offset, bit } } diff --git a/embassy-stm32/src/spi/mod.rs b/embassy-stm32/src/spi/mod.rs index 5a2ee105d..0875cfe41 100644 --- a/embassy-stm32/src/spi/mod.rs +++ b/embassy-stm32/src/spi/mod.rs @@ -13,7 +13,7 @@ use crate::dma::{slice_ptr_parts, word, ChannelAndRequest}; use crate::gpio::{AFType, AnyPin, Pull, SealedPin as _, Speed}; use crate::mode::{Async, Blocking, Mode as PeriMode}; use crate::pac::spi::{regs, vals, Spi as Regs}; -use crate::rcc::{ClockEnableBit, RccPeripheral}; +use crate::rcc::{ClockEnableBit, SealedRccPeripheral}; use crate::time::Hertz; use crate::Peripheral; @@ -93,8 +93,7 @@ impl Config { } /// SPI driver. pub struct Spi<'d, M: PeriMode> { - pub(crate) regs: Regs, - enable_bit: ClockEnableBit, + pub(crate) info: &'static Info, kernel_clock: Hertz, sck: Option>, mosi: Option>, @@ -115,7 +114,7 @@ impl<'d, M: PeriMode> Spi<'d, M> { rx_dma: Option>, config: Config, ) -> Self { - let regs = T::INFO.regs; + let regs = T::info().regs; let kernel_clock = T::frequency(); let br = compute_baud_rate(kernel_clock, config.frequency); @@ -205,8 +204,7 @@ impl<'d, M: PeriMode> Spi<'d, M> { } Self { - regs, - enable_bit: T::enable_bit(), + info: T::info(), kernel_clock, sck, mosi, @@ -228,7 +226,7 @@ impl<'d, M: PeriMode> Spi<'d, M> { let br = compute_baud_rate(self.kernel_clock, config.frequency); #[cfg(any(spi_v1, spi_f1, spi_v2))] - self.regs.cr1().modify(|w| { + self.info.regs.cr1().modify(|w| { w.set_cpha(cpha); w.set_cpol(cpol); w.set_br(br); @@ -237,12 +235,12 @@ impl<'d, M: PeriMode> Spi<'d, M> { #[cfg(any(spi_v3, spi_v4, spi_v5))] { - self.regs.cfg2().modify(|w| { + self.info.regs.cfg2().modify(|w| { w.set_cpha(cpha); w.set_cpol(cpol); w.set_lsbfirst(lsbfirst); }); - self.regs.cfg1().modify(|w| { + self.info.regs.cfg1().modify(|w| { w.set_mbr(br); }); } @@ -252,11 +250,11 @@ impl<'d, M: PeriMode> Spi<'d, M> { /// Get current SPI configuration. pub fn get_current_config(&self) -> Config { #[cfg(any(spi_v1, spi_f1, spi_v2))] - let cfg = self.regs.cr1().read(); + let cfg = self.info.regs.cr1().read(); #[cfg(any(spi_v3, spi_v4, spi_v5))] - let cfg = self.regs.cfg2().read(); + let cfg = self.info.regs.cfg2().read(); #[cfg(any(spi_v3, spi_v4, spi_v5))] - let cfg1 = self.regs.cfg1().read(); + let cfg1 = self.info.regs.cfg1().read(); let polarity = if cfg.cpol() == vals::Cpol::IDLELOW { Polarity::IdleLow @@ -296,40 +294,40 @@ impl<'d, M: PeriMode> Spi<'d, M> { #[cfg(any(spi_v1, spi_f1))] { - self.regs.cr1().modify(|reg| { + self.info.regs.cr1().modify(|reg| { reg.set_spe(false); reg.set_dff(word_size) }); - self.regs.cr1().modify(|reg| { + self.info.regs.cr1().modify(|reg| { reg.set_spe(true); }); } #[cfg(spi_v2)] { - self.regs.cr1().modify(|w| { + self.info.regs.cr1().modify(|w| { w.set_spe(false); }); - self.regs.cr2().modify(|w| { + self.info.regs.cr2().modify(|w| { w.set_frxth(word_size.1); w.set_ds(word_size.0); }); - self.regs.cr1().modify(|w| { + self.info.regs.cr1().modify(|w| { w.set_spe(true); }); } #[cfg(any(spi_v3, spi_v4, spi_v5))] { - self.regs.cr1().modify(|w| { + self.info.regs.cr1().modify(|w| { w.set_csusp(true); }); - while self.regs.sr().read().eot() {} - self.regs.cr1().modify(|w| { + while self.info.regs.sr().read().eot() {} + self.info.regs.cr1().modify(|w| { w.set_spe(false); }); - self.regs.cfg1().modify(|w| { + self.info.regs.cfg1().modify(|w| { w.set_dsize(word_size); }); - self.regs.cr1().modify(|w| { + self.info.regs.cr1().modify(|w| { w.set_csusp(false); w.set_spe(true); }); @@ -340,22 +338,22 @@ impl<'d, M: PeriMode> Spi<'d, M> { /// Blocking write. pub fn blocking_write(&mut self, words: &[W]) -> Result<(), Error> { - self.regs.cr1().modify(|w| w.set_spe(true)); - flush_rx_fifo(self.regs); + self.info.regs.cr1().modify(|w| w.set_spe(true)); + flush_rx_fifo(self.info.regs); self.set_word_size(W::CONFIG); for word in words.iter() { - let _ = transfer_word(self.regs, *word)?; + let _ = transfer_word(self.info.regs, *word)?; } Ok(()) } /// Blocking read. pub fn blocking_read(&mut self, words: &mut [W]) -> Result<(), Error> { - self.regs.cr1().modify(|w| w.set_spe(true)); - flush_rx_fifo(self.regs); + self.info.regs.cr1().modify(|w| w.set_spe(true)); + flush_rx_fifo(self.info.regs); self.set_word_size(W::CONFIG); for word in words.iter_mut() { - *word = transfer_word(self.regs, W::default())?; + *word = transfer_word(self.info.regs, W::default())?; } Ok(()) } @@ -364,11 +362,11 @@ impl<'d, M: PeriMode> Spi<'d, M> { /// /// This writes the contents of `data` on MOSI, and puts the received data on MISO in `data`, at the same time. pub fn blocking_transfer_in_place(&mut self, words: &mut [W]) -> Result<(), Error> { - self.regs.cr1().modify(|w| w.set_spe(true)); - flush_rx_fifo(self.regs); + self.info.regs.cr1().modify(|w| w.set_spe(true)); + flush_rx_fifo(self.info.regs); self.set_word_size(W::CONFIG); for word in words.iter_mut() { - *word = transfer_word(self.regs, *word)?; + *word = transfer_word(self.info.regs, *word)?; } Ok(()) } @@ -380,13 +378,13 @@ impl<'d, M: PeriMode> Spi<'d, M> { /// The transfer runs for `max(read.len(), write.len())` bytes. If `read` is shorter extra bytes are ignored. /// If `write` is shorter it is padded with zero bytes. pub fn blocking_transfer(&mut self, read: &mut [W], write: &[W]) -> Result<(), Error> { - self.regs.cr1().modify(|w| w.set_spe(true)); - flush_rx_fifo(self.regs); + self.info.regs.cr1().modify(|w| w.set_spe(true)); + flush_rx_fifo(self.info.regs); self.set_word_size(W::CONFIG); let len = read.len().max(write.len()); for i in 0..len { let wb = write.get(i).copied().unwrap_or_default(); - let rb = transfer_word(self.regs, wb)?; + let rb = transfer_word(self.info.regs, wb)?; if let Some(r) = read.get_mut(i) { *r = rb; } @@ -588,25 +586,25 @@ impl<'d> Spi<'d, Async> { } self.set_word_size(W::CONFIG); - self.regs.cr1().modify(|w| { + self.info.regs.cr1().modify(|w| { w.set_spe(false); }); - let tx_dst = self.regs.tx_ptr(); + let tx_dst = self.info.regs.tx_ptr(); let tx_f = unsafe { self.tx_dma.as_mut().unwrap().write(data, tx_dst, Default::default()) }; - set_txdmaen(self.regs, true); - self.regs.cr1().modify(|w| { + set_txdmaen(self.info.regs, true); + self.info.regs.cr1().modify(|w| { w.set_spe(true); }); #[cfg(any(spi_v3, spi_v4, spi_v5))] - self.regs.cr1().modify(|w| { + self.info.regs.cr1().modify(|w| { w.set_cstart(true); }); tx_f.await; - finish_dma(self.regs); + finish_dma(self.info.regs); Ok(()) } @@ -618,22 +616,22 @@ impl<'d> Spi<'d, Async> { } self.set_word_size(W::CONFIG); - self.regs.cr1().modify(|w| { + self.info.regs.cr1().modify(|w| { w.set_spe(false); }); // SPIv3 clears rxfifo on SPE=0 #[cfg(not(any(spi_v3, spi_v4, spi_v5)))] - flush_rx_fifo(self.regs); + flush_rx_fifo(self.info.regs); - set_rxdmaen(self.regs, true); + set_rxdmaen(self.info.regs, true); let clock_byte_count = data.len(); - let rx_src = self.regs.rx_ptr(); + let rx_src = self.info.regs.rx_ptr(); let rx_f = unsafe { self.rx_dma.as_mut().unwrap().read(rx_src, data, Default::default()) }; - let tx_dst = self.regs.tx_ptr(); + let tx_dst = self.info.regs.tx_ptr(); let clock_byte = 0x00u8; let tx_f = unsafe { self.tx_dma @@ -642,18 +640,18 @@ impl<'d> Spi<'d, Async> { .write_repeated(&clock_byte, clock_byte_count, tx_dst, Default::default()) }; - set_txdmaen(self.regs, true); - self.regs.cr1().modify(|w| { + set_txdmaen(self.info.regs, true); + self.info.regs.cr1().modify(|w| { w.set_spe(true); }); #[cfg(any(spi_v3, spi_v4, spi_v5))] - self.regs.cr1().modify(|w| { + self.info.regs.cr1().modify(|w| { w.set_cstart(true); }); join(tx_f, rx_f).await; - finish_dma(self.regs); + finish_dma(self.info.regs); Ok(()) } @@ -667,20 +665,20 @@ impl<'d> Spi<'d, Async> { } self.set_word_size(W::CONFIG); - self.regs.cr1().modify(|w| { + self.info.regs.cr1().modify(|w| { w.set_spe(false); }); // SPIv3 clears rxfifo on SPE=0 #[cfg(not(any(spi_v3, spi_v4, spi_v5)))] - flush_rx_fifo(self.regs); + flush_rx_fifo(self.info.regs); - set_rxdmaen(self.regs, true); + set_rxdmaen(self.info.regs, true); - let rx_src = self.regs.rx_ptr(); + let rx_src = self.info.regs.rx_ptr(); let rx_f = unsafe { self.rx_dma.as_mut().unwrap().read_raw(rx_src, read, Default::default()) }; - let tx_dst = self.regs.tx_ptr(); + let tx_dst = self.info.regs.tx_ptr(); let tx_f = unsafe { self.tx_dma .as_mut() @@ -688,18 +686,18 @@ impl<'d> Spi<'d, Async> { .write_raw(write, tx_dst, Default::default()) }; - set_txdmaen(self.regs, true); - self.regs.cr1().modify(|w| { + set_txdmaen(self.info.regs, true); + self.info.regs.cr1().modify(|w| { w.set_spe(true); }); #[cfg(any(spi_v3, spi_v4, spi_v5))] - self.regs.cr1().modify(|w| { + self.info.regs.cr1().modify(|w| { w.set_cstart(true); }); join(tx_f, rx_f).await; - finish_dma(self.regs); + finish_dma(self.info.regs); Ok(()) } @@ -728,7 +726,7 @@ impl<'d, M: PeriMode> Drop for Spi<'d, M> { self.mosi.as_ref().map(|x| x.set_as_disconnected()); self.miso.as_ref().map(|x| x.set_as_disconnected()); - self.enable_bit.disable(); + self.info.enable_bit.disable(); } } @@ -1106,8 +1104,9 @@ mod word_impl { impl_word!(u32, 32 - 1); } -struct Info { - regs: Regs, +pub(crate) struct Info { + pub(crate) regs: Regs, + pub(crate) enable_bit: ClockEnableBit, } struct State {} @@ -1134,6 +1133,7 @@ foreach_peripheral!( (spi, $inst:ident) => { peri_trait_impl!($inst, Info { regs: crate::pac::$inst, + enable_bit: crate::peripherals::$inst::ENABLE_BIT, }); }; ); From 45a12fd41f1f6230a4aabbfe87552adc610fdc99 Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Tue, 21 May 2024 01:25:49 +0200 Subject: [PATCH 345/581] stm32/i2c: remove peripheral generic param. --- embassy-stm32/src/i2c/mod.rs | 68 ++++--- embassy-stm32/src/i2c/v1.rs | 184 +++++++++--------- embassy-stm32/src/i2c/v2.rs | 129 ++++++------ embassy-stm32/src/macros.rs | 13 +- examples/stm32h7/src/bin/i2c_shared.rs | 5 +- .../src/bin/spe_adin1110_http_server.rs | 2 +- 6 files changed, 210 insertions(+), 191 deletions(-) diff --git a/embassy-stm32/src/i2c/mod.rs b/embassy-stm32/src/i2c/mod.rs index 0b2a56305..ef5fd0972 100644 --- a/embassy-stm32/src/i2c/mod.rs +++ b/embassy-stm32/src/i2c/mod.rs @@ -9,7 +9,7 @@ use core::future::Future; use core::iter; use core::marker::PhantomData; -use embassy_hal_internal::{into_ref, Peripheral, PeripheralRef}; +use embassy_hal_internal::{into_ref, Peripheral}; use embassy_sync::waitqueue::AtomicWaker; #[cfg(feature = "time")] use embassy_time::{Duration, Instant}; @@ -18,6 +18,7 @@ use crate::dma::ChannelAndRequest; use crate::gpio::{AFType, Pull}; use crate::interrupt::typelevel::Interrupt; use crate::mode::{Async, Blocking, Mode}; +use crate::rcc::{ClockEnableBit, SealedRccPeripheral}; use crate::time::Hertz; use crate::{interrupt, peripherals}; @@ -72,8 +73,10 @@ impl Default for Config { } /// I2C driver. -pub struct I2c<'d, T: Instance, M: Mode> { - _peri: PeripheralRef<'d, T>, +pub struct I2c<'d, M: Mode> { + info: &'static Info, + state: &'static State, + kernel_clock: Hertz, tx_dma: Option>, rx_dma: Option>, #[cfg(feature = "time")] @@ -81,9 +84,9 @@ pub struct I2c<'d, T: Instance, M: Mode> { _phantom: PhantomData, } -impl<'d, T: Instance> I2c<'d, T, Async> { +impl<'d> I2c<'d, Async> { /// Create a new I2C driver. - pub fn new( + pub fn new( peri: impl Peripheral

+ 'd, scl: impl Peripheral

> + 'd, sda: impl Peripheral

> + 'd, @@ -99,9 +102,9 @@ impl<'d, T: Instance> I2c<'d, T, Async> { } } -impl<'d, T: Instance> I2c<'d, T, Blocking> { +impl<'d> I2c<'d, Blocking> { /// Create a new blocking I2C driver. - pub fn new_blocking( + pub fn new_blocking( peri: impl Peripheral

+ 'd, scl: impl Peripheral

> + 'd, sda: impl Peripheral

> + 'd, @@ -112,10 +115,10 @@ impl<'d, T: Instance> I2c<'d, T, Blocking> { } } -impl<'d, T: Instance, M: Mode> I2c<'d, T, M> { +impl<'d, M: Mode> I2c<'d, M> { /// Create a new I2C driver. - fn new_inner( - peri: impl Peripheral

+ 'd, + fn new_inner( + _peri: impl Peripheral

+ 'd, scl: impl Peripheral

> + 'd, sda: impl Peripheral

> + 'd, tx_dma: Option>, @@ -123,7 +126,7 @@ impl<'d, T: Instance, M: Mode> I2c<'d, T, M> { freq: Hertz, config: Config, ) -> Self { - into_ref!(peri, scl, sda); + into_ref!(scl, sda); T::enable_and_reset(); @@ -148,7 +151,9 @@ impl<'d, T: Instance, M: Mode> I2c<'d, T, M> { unsafe { T::ErrorInterrupt::enable() }; let mut this = Self { - _peri: peri, + info: T::info(), + state: T::state(), + kernel_clock: T::frequency(), tx_dma, rx_dma, #[cfg(feature = "time")] @@ -217,19 +222,14 @@ impl State { } } -trait SealedInstance: crate::rcc::RccPeripheral { - fn regs() -> crate::pac::i2c::I2c; - fn state() -> &'static State; +struct Info { + regs: crate::pac::i2c::I2c, + pub(crate) enable_bit: ClockEnableBit, } -/// I2C peripheral instance -#[allow(private_bounds)] -pub trait Instance: SealedInstance + 'static { - /// Event interrupt for this instance - type EventInterrupt: interrupt::typelevel::Interrupt; - /// Error interrupt for this instance - type ErrorInterrupt: interrupt::typelevel::Interrupt; -} +peri_trait!( + irqs: [EventInterrupt, ErrorInterrupt], +); pin_trait!(SclPin, Instance); pin_trait!(SdaPin, Instance); @@ -260,11 +260,15 @@ impl interrupt::typelevel::Handler for ErrorInte foreach_peripheral!( (i2c, $inst:ident) => { + #[allow(private_interfaces)] impl SealedInstance for peripherals::$inst { - fn regs() -> crate::pac::i2c::I2c { - crate::pac::$inst + fn info() -> &'static Info { + static INFO: Info = Info{ + regs: crate::pac::$inst, + enable_bit: crate::peripherals::$inst::ENABLE_BIT, + }; + &INFO } - fn state() -> &'static State { static STATE: State = State::new(); &STATE @@ -278,7 +282,7 @@ foreach_peripheral!( }; ); -impl<'d, T: Instance, M: Mode> embedded_hal_02::blocking::i2c::Read for I2c<'d, T, M> { +impl<'d, M: Mode> embedded_hal_02::blocking::i2c::Read for I2c<'d, M> { type Error = Error; fn read(&mut self, address: u8, buffer: &mut [u8]) -> Result<(), Self::Error> { @@ -286,7 +290,7 @@ impl<'d, T: Instance, M: Mode> embedded_hal_02::blocking::i2c::Read for I2c<'d, } } -impl<'d, T: Instance, M: Mode> embedded_hal_02::blocking::i2c::Write for I2c<'d, T, M> { +impl<'d, M: Mode> embedded_hal_02::blocking::i2c::Write for I2c<'d, M> { type Error = Error; fn write(&mut self, address: u8, write: &[u8]) -> Result<(), Self::Error> { @@ -294,7 +298,7 @@ impl<'d, T: Instance, M: Mode> embedded_hal_02::blocking::i2c::Write for I2c<'d, } } -impl<'d, T: Instance, M: Mode> embedded_hal_02::blocking::i2c::WriteRead for I2c<'d, T, M> { +impl<'d, M: Mode> embedded_hal_02::blocking::i2c::WriteRead for I2c<'d, M> { type Error = Error; fn write_read(&mut self, address: u8, write: &[u8], read: &mut [u8]) -> Result<(), Self::Error> { @@ -318,11 +322,11 @@ impl embedded_hal_1::i2c::Error for Error { } } -impl<'d, T: Instance, M: Mode> embedded_hal_1::i2c::ErrorType for I2c<'d, T, M> { +impl<'d, M: Mode> embedded_hal_1::i2c::ErrorType for I2c<'d, M> { type Error = Error; } -impl<'d, T: Instance, M: Mode> embedded_hal_1::i2c::I2c for I2c<'d, T, M> { +impl<'d, M: Mode> embedded_hal_1::i2c::I2c for I2c<'d, M> { fn read(&mut self, address: u8, read: &mut [u8]) -> Result<(), Self::Error> { self.blocking_read(address, read) } @@ -344,7 +348,7 @@ impl<'d, T: Instance, M: Mode> embedded_hal_1::i2c::I2c for I2c<'d, T, M> { } } -impl<'d, T: Instance> embedded_hal_async::i2c::I2c for I2c<'d, T, Async> { +impl<'d> embedded_hal_async::i2c::I2c for I2c<'d, Async> { async fn read(&mut self, address: u8, read: &mut [u8]) -> Result<(), Self::Error> { self.read(address, read).await } diff --git a/embassy-stm32/src/i2c/v1.rs b/embassy-stm32/src/i2c/v1.rs index ac4fa1b9e..0269e53aa 100644 --- a/embassy-stm32/src/i2c/v1.rs +++ b/embassy-stm32/src/i2c/v1.rs @@ -28,7 +28,7 @@ use crate::pac::i2c; // There's some more details there, and we might have a fix for you. But please let us know if you // hit a case like this! pub unsafe fn on_interrupt() { - let regs = T::regs(); + let regs = T::info().regs; // i2c v2 only woke the task on transfer complete interrupts. v1 uses interrupts for a bunch of // other stuff, so we wake the task on every interrupt. T::state().waker.wake(); @@ -41,9 +41,9 @@ pub unsafe fn on_interrupt() { }); } -impl<'d, T: Instance, M: PeriMode> I2c<'d, T, M> { +impl<'d, M: PeriMode> I2c<'d, M> { pub(crate) fn init(&mut self, freq: Hertz, _config: Config) { - T::regs().cr1().modify(|reg| { + self.info.regs.cr1().modify(|reg| { reg.set_pe(false); //reg.set_anfoff(false); }); @@ -67,39 +67,39 @@ impl<'d, T: Instance, M: PeriMode> I2c<'d, T, M> { // // This presents as an ~infinite hang on read or write, as the START condition // is never generated, meaning the start event is never generated. - T::regs().cr1().modify(|reg| { + self.info.regs.cr1().modify(|reg| { reg.set_swrst(true); }); - T::regs().cr1().modify(|reg| { + self.info.regs.cr1().modify(|reg| { reg.set_swrst(false); }); - let timings = Timings::new(T::frequency(), freq); + let timings = Timings::new(self.kernel_clock, freq); - T::regs().cr2().modify(|reg| { + self.info.regs.cr2().modify(|reg| { reg.set_freq(timings.freq); }); - T::regs().ccr().modify(|reg| { + self.info.regs.ccr().modify(|reg| { reg.set_f_s(timings.mode.f_s()); reg.set_duty(timings.duty.duty()); reg.set_ccr(timings.ccr); }); - T::regs().trise().modify(|reg| { + self.info.regs.trise().modify(|reg| { reg.set_trise(timings.trise); }); - T::regs().cr1().modify(|reg| { + self.info.regs.cr1().modify(|reg| { reg.set_pe(true); }); } - fn check_and_clear_error_flags() -> Result { + fn check_and_clear_error_flags(info: &'static Info) -> Result { // Note that flags should only be cleared once they have been registered. If flags are // cleared otherwise, there may be an inherent race condition and flags may be missed. - let sr1 = T::regs().sr1().read(); + let sr1 = info.regs.sr1().read(); if sr1.timeout() { - T::regs().sr1().write(|reg| { + info.regs.sr1().write(|reg| { reg.0 = !0; reg.set_timeout(false); }); @@ -107,7 +107,7 @@ impl<'d, T: Instance, M: PeriMode> I2c<'d, T, M> { } if sr1.pecerr() { - T::regs().sr1().write(|reg| { + info.regs.sr1().write(|reg| { reg.0 = !0; reg.set_pecerr(false); }); @@ -115,7 +115,7 @@ impl<'d, T: Instance, M: PeriMode> I2c<'d, T, M> { } if sr1.ovr() { - T::regs().sr1().write(|reg| { + info.regs.sr1().write(|reg| { reg.0 = !0; reg.set_ovr(false); }); @@ -123,7 +123,7 @@ impl<'d, T: Instance, M: PeriMode> I2c<'d, T, M> { } if sr1.af() { - T::regs().sr1().write(|reg| { + info.regs.sr1().write(|reg| { reg.0 = !0; reg.set_af(false); }); @@ -131,7 +131,7 @@ impl<'d, T: Instance, M: PeriMode> I2c<'d, T, M> { } if sr1.arlo() { - T::regs().sr1().write(|reg| { + info.regs.sr1().write(|reg| { reg.0 = !0; reg.set_arlo(false); }); @@ -141,7 +141,7 @@ impl<'d, T: Instance, M: PeriMode> I2c<'d, T, M> { // The errata indicates that BERR may be incorrectly detected. It recommends ignoring and // clearing the BERR bit instead. if sr1.berr() { - T::regs().sr1().write(|reg| { + info.regs.sr1().write(|reg| { reg.0 = !0; reg.set_berr(false); }); @@ -154,32 +154,32 @@ impl<'d, T: Instance, M: PeriMode> I2c<'d, T, M> { if frame.send_start() { // Send a START condition - T::regs().cr1().modify(|reg| { + self.info.regs.cr1().modify(|reg| { reg.set_start(true); }); // Wait until START condition was generated - while !Self::check_and_clear_error_flags()?.start() { + while !Self::check_and_clear_error_flags(self.info)?.start() { timeout.check()?; } // Check if we were the ones to generate START - if T::regs().cr1().read().start() || !T::regs().sr2().read().msl() { + if self.info.regs.cr1().read().start() || !self.info.regs.sr2().read().msl() { return Err(Error::Arbitration); } // Set up current address we're trying to talk to - T::regs().dr().write(|reg| reg.set_dr(addr << 1)); + self.info.regs.dr().write(|reg| reg.set_dr(addr << 1)); // Wait until address was sent // Wait for the address to be acknowledged // Check for any I2C errors. If a NACK occurs, the ADDR bit will never be set. - while !Self::check_and_clear_error_flags()?.addr() { + while !Self::check_and_clear_error_flags(self.info)?.addr() { timeout.check()?; } // Clear condition by reading SR2 - let _ = T::regs().sr2().read(); + let _ = self.info.regs.sr2().read(); } // Send bytes @@ -189,7 +189,7 @@ impl<'d, T: Instance, M: PeriMode> I2c<'d, T, M> { if frame.send_stop() { // Send a STOP condition - T::regs().cr1().modify(|reg| reg.set_stop(true)); + self.info.regs.cr1().modify(|reg| reg.set_stop(true)); } // Fallthrough is success @@ -200,18 +200,18 @@ impl<'d, T: Instance, M: PeriMode> I2c<'d, T, M> { // Wait until we're ready for sending while { // Check for any I2C errors. If a NACK occurs, the ADDR bit will never be set. - !Self::check_and_clear_error_flags()?.txe() + !Self::check_and_clear_error_flags(self.info)?.txe() } { timeout.check()?; } // Push out a byte of data - T::regs().dr().write(|reg| reg.set_dr(byte)); + self.info.regs.dr().write(|reg| reg.set_dr(byte)); // Wait until byte is transferred while { // Check for any potential error conditions. - !Self::check_and_clear_error_flags()?.btf() + !Self::check_and_clear_error_flags(self.info)?.btf() } { timeout.check()?; } @@ -222,14 +222,14 @@ impl<'d, T: Instance, M: PeriMode> I2c<'d, T, M> { fn recv_byte(&self, timeout: Timeout) -> Result { while { // Check for any potential error conditions. - Self::check_and_clear_error_flags()?; + Self::check_and_clear_error_flags(self.info)?; - !T::regs().sr1().read().rxne() + !self.info.regs.sr1().read().rxne() } { timeout.check()?; } - let value = T::regs().dr().read().dr(); + let value = self.info.regs.dr().read().dr(); Ok(value) } @@ -246,32 +246,32 @@ impl<'d, T: Instance, M: PeriMode> I2c<'d, T, M> { if frame.send_start() { // Send a START condition and set ACK bit - T::regs().cr1().modify(|reg| { + self.info.regs.cr1().modify(|reg| { reg.set_start(true); reg.set_ack(true); }); // Wait until START condition was generated - while !Self::check_and_clear_error_flags()?.start() { + while !Self::check_and_clear_error_flags(self.info)?.start() { timeout.check()?; } // Check if we were the ones to generate START - if T::regs().cr1().read().start() || !T::regs().sr2().read().msl() { + if self.info.regs.cr1().read().start() || !self.info.regs.sr2().read().msl() { return Err(Error::Arbitration); } // Set up current address we're trying to talk to - T::regs().dr().write(|reg| reg.set_dr((addr << 1) + 1)); + self.info.regs.dr().write(|reg| reg.set_dr((addr << 1) + 1)); // Wait until address was sent // Wait for the address to be acknowledged - while !Self::check_and_clear_error_flags()?.addr() { + while !Self::check_and_clear_error_flags(self.info)?.addr() { timeout.check()?; } // Clear condition by reading SR2 - let _ = T::regs().sr2().read(); + let _ = self.info.regs.sr2().read(); } // Receive bytes into buffer @@ -280,7 +280,7 @@ impl<'d, T: Instance, M: PeriMode> I2c<'d, T, M> { } // Prepare to send NACK then STOP after next byte - T::regs().cr1().modify(|reg| { + self.info.regs.cr1().modify(|reg| { if frame.send_nack() { reg.set_ack(false); } @@ -346,17 +346,17 @@ impl<'d, T: Instance, M: PeriMode> I2c<'d, T, M> { // Async #[inline] // pretty sure this should always be inlined - fn enable_interrupts() -> () { - T::regs().cr2().modify(|w| { + fn enable_interrupts(info: &'static Info) -> () { + info.regs.cr2().modify(|w| { w.set_iterren(true); w.set_itevten(true); }); } } -impl<'d, T: Instance> I2c<'d, T, Async> { +impl<'d> I2c<'d, Async> { async fn write_frame(&mut self, address: u8, write: &[u8], frame: FrameOptions) -> Result<(), Error> { - T::regs().cr2().modify(|w| { + self.info.regs.cr2().modify(|w| { // Note: Do not enable the ITBUFEN bit in the I2C_CR2 register if DMA is used for // reception. w.set_itbufen(false); @@ -370,33 +370,31 @@ impl<'d, T: Instance> I2c<'d, T, Async> { // Sentinel to disable transfer when an error occurs or future is canceled. // TODO: Generate STOP condition on cancel? let on_drop = OnDrop::new(|| { - T::regs().cr2().modify(|w| { + self.info.regs.cr2().modify(|w| { w.set_dmaen(false); w.set_iterren(false); w.set_itevten(false); }) }); - let state = T::state(); - if frame.send_start() { // Send a START condition - T::regs().cr1().modify(|reg| { + self.info.regs.cr1().modify(|reg| { reg.set_start(true); }); // Wait until START condition was generated poll_fn(|cx| { - state.waker.register(cx.waker()); + self.state.waker.register(cx.waker()); - match Self::check_and_clear_error_flags() { + match Self::check_and_clear_error_flags(self.info) { Err(e) => Poll::Ready(Err(e)), Ok(sr1) => { if sr1.start() { Poll::Ready(Ok(())) } else { // When pending, (re-)enable interrupts to wake us up. - Self::enable_interrupts(); + Self::enable_interrupts(self.info); Poll::Pending } } @@ -405,25 +403,25 @@ impl<'d, T: Instance> I2c<'d, T, Async> { .await?; // Check if we were the ones to generate START - if T::regs().cr1().read().start() || !T::regs().sr2().read().msl() { + if self.info.regs.cr1().read().start() || !self.info.regs.sr2().read().msl() { return Err(Error::Arbitration); } // Set up current address we're trying to talk to - T::regs().dr().write(|reg| reg.set_dr(address << 1)); + self.info.regs.dr().write(|reg| reg.set_dr(address << 1)); // Wait for the address to be acknowledged poll_fn(|cx| { - state.waker.register(cx.waker()); + self.state.waker.register(cx.waker()); - match Self::check_and_clear_error_flags() { + match Self::check_and_clear_error_flags(self.info) { Err(e) => Poll::Ready(Err(e)), Ok(sr1) => { if sr1.addr() { Poll::Ready(Ok(())) } else { // When pending, (re-)enable interrupts to wake us up. - Self::enable_interrupts(); + Self::enable_interrupts(self.info); Poll::Pending } } @@ -432,26 +430,26 @@ impl<'d, T: Instance> I2c<'d, T, Async> { .await?; // Clear condition by reading SR2 - T::regs().sr2().read(); + self.info.regs.sr2().read(); } let dma_transfer = unsafe { // Set the I2C_DR register address in the DMA_SxPAR register. The data will be moved to // this address from the memory after each TxE event. - let dst = T::regs().dr().as_ptr() as *mut u8; + let dst = self.info.regs.dr().as_ptr() as *mut u8; self.tx_dma.as_mut().unwrap().write(write, dst, Default::default()) }; // Wait for bytes to be sent, or an error to occur. let poll_error = poll_fn(|cx| { - state.waker.register(cx.waker()); + self.state.waker.register(cx.waker()); - match Self::check_and_clear_error_flags() { + match Self::check_and_clear_error_flags(self.info) { Err(e) => Poll::Ready(Err::<(), Error>(e)), Ok(_) => { // When pending, (re-)enable interrupts to wake us up. - Self::enable_interrupts(); + Self::enable_interrupts(self.info); Poll::Pending } } @@ -463,7 +461,7 @@ impl<'d, T: Instance> I2c<'d, T, Async> { _ => Ok(()), }?; - T::regs().cr2().modify(|w| { + self.info.regs.cr2().modify(|w| { w.set_dmaen(false); }); @@ -473,16 +471,16 @@ impl<'d, T: Instance> I2c<'d, T, Async> { // 18.3.8 “Master transmitter: In the interrupt routine after the EOT interrupt, disable DMA // requests then wait for a BTF event before programming the Stop condition.†poll_fn(|cx| { - state.waker.register(cx.waker()); + self.state.waker.register(cx.waker()); - match Self::check_and_clear_error_flags() { + match Self::check_and_clear_error_flags(self.info) { Err(e) => Poll::Ready(Err(e)), Ok(sr1) => { if sr1.btf() { Poll::Ready(Ok(())) } else { // When pending, (re-)enable interrupts to wake us up. - Self::enable_interrupts(); + Self::enable_interrupts(self.info); Poll::Pending } } @@ -490,7 +488,7 @@ impl<'d, T: Instance> I2c<'d, T, Async> { }) .await?; - T::regs().cr1().modify(|w| { + self.info.regs.cr1().modify(|w| { w.set_stop(true); }); } @@ -525,7 +523,7 @@ impl<'d, T: Instance> I2c<'d, T, Async> { // Some branches below depend on whether the buffer contains only a single byte. let single_byte = buffer.len() == 1; - T::regs().cr2().modify(|w| { + self.info.regs.cr2().modify(|w| { // Note: Do not enable the ITBUFEN bit in the I2C_CR2 register if DMA is used for // reception. w.set_itbufen(false); @@ -541,34 +539,32 @@ impl<'d, T: Instance> I2c<'d, T, Async> { // Sentinel to disable transfer when an error occurs or future is canceled. // TODO: Generate STOP condition on cancel? let on_drop = OnDrop::new(|| { - T::regs().cr2().modify(|w| { + self.info.regs.cr2().modify(|w| { w.set_dmaen(false); w.set_iterren(false); w.set_itevten(false); }) }); - let state = T::state(); - if frame.send_start() { // Send a START condition and set ACK bit - T::regs().cr1().modify(|reg| { + self.info.regs.cr1().modify(|reg| { reg.set_start(true); reg.set_ack(true); }); // Wait until START condition was generated poll_fn(|cx| { - state.waker.register(cx.waker()); + self.state.waker.register(cx.waker()); - match Self::check_and_clear_error_flags() { + match Self::check_and_clear_error_flags(self.info) { Err(e) => Poll::Ready(Err(e)), Ok(sr1) => { if sr1.start() { Poll::Ready(Ok(())) } else { // When pending, (re-)enable interrupts to wake us up. - Self::enable_interrupts(); + Self::enable_interrupts(self.info); Poll::Pending } } @@ -577,25 +573,25 @@ impl<'d, T: Instance> I2c<'d, T, Async> { .await?; // Check if we were the ones to generate START - if T::regs().cr1().read().start() || !T::regs().sr2().read().msl() { + if self.info.regs.cr1().read().start() || !self.info.regs.sr2().read().msl() { return Err(Error::Arbitration); } // Set up current address we're trying to talk to - T::regs().dr().write(|reg| reg.set_dr((address << 1) + 1)); + self.info.regs.dr().write(|reg| reg.set_dr((address << 1) + 1)); // Wait for the address to be acknowledged poll_fn(|cx| { - state.waker.register(cx.waker()); + self.state.waker.register(cx.waker()); - match Self::check_and_clear_error_flags() { + match Self::check_and_clear_error_flags(self.info) { Err(e) => Poll::Ready(Err(e)), Ok(sr1) => { if sr1.addr() { Poll::Ready(Ok(())) } else { // When pending, (re-)enable interrupts to wake us up. - Self::enable_interrupts(); + Self::enable_interrupts(self.info); Poll::Pending } } @@ -606,18 +602,18 @@ impl<'d, T: Instance> I2c<'d, T, Async> { // 18.3.8: When a single byte must be received: the NACK must be programmed during EV6 // event, i.e. program ACK=0 when ADDR=1, before clearing ADDR flag. if frame.send_nack() && single_byte { - T::regs().cr1().modify(|w| { + self.info.regs.cr1().modify(|w| { w.set_ack(false); }); } // Clear condition by reading SR2 - T::regs().sr2().read(); + self.info.regs.sr2().read(); } else { // Before starting reception of single byte (but without START condition, i.e. in case // of continued frame), program NACK to emit at end of this byte. if frame.send_nack() && single_byte { - T::regs().cr1().modify(|w| { + self.info.regs.cr1().modify(|w| { w.set_ack(false); }); } @@ -627,7 +623,7 @@ impl<'d, T: Instance> I2c<'d, T, Async> { // condition either after clearing ADDR flag, or in the DMA Transfer Complete interrupt // routine. if frame.send_stop() && single_byte { - T::regs().cr1().modify(|w| { + self.info.regs.cr1().modify(|w| { w.set_stop(true); }); } @@ -635,20 +631,20 @@ impl<'d, T: Instance> I2c<'d, T, Async> { let dma_transfer = unsafe { // Set the I2C_DR register address in the DMA_SxPAR register. The data will be moved // from this address from the memory after each RxE event. - let src = T::regs().dr().as_ptr() as *mut u8; + let src = self.info.regs.dr().as_ptr() as *mut u8; self.rx_dma.as_mut().unwrap().read(src, buffer, Default::default()) }; // Wait for bytes to be received, or an error to occur. let poll_error = poll_fn(|cx| { - state.waker.register(cx.waker()); + self.state.waker.register(cx.waker()); - match Self::check_and_clear_error_flags() { + match Self::check_and_clear_error_flags(self.info) { Err(e) => Poll::Ready(Err::<(), Error>(e)), _ => { // When pending, (re-)enable interrupts to wake us up. - Self::enable_interrupts(); + Self::enable_interrupts(self.info); Poll::Pending } } @@ -659,12 +655,12 @@ impl<'d, T: Instance> I2c<'d, T, Async> { _ => Ok(()), }?; - T::regs().cr2().modify(|w| { + self.info.regs.cr2().modify(|w| { w.set_dmaen(false); }); if frame.send_stop() && !single_byte { - T::regs().cr1().modify(|w| { + self.info.regs.cr1().modify(|w| { w.set_stop(true); }); } @@ -704,9 +700,9 @@ impl<'d, T: Instance> I2c<'d, T, Async> { } } -impl<'d, T: Instance, M: PeriMode> Drop for I2c<'d, T, M> { +impl<'d, M: PeriMode> Drop for I2c<'d, M> { fn drop(&mut self) { - T::disable(); + self.info.enable_bit.disable() } } @@ -810,20 +806,20 @@ impl Timings { } } -impl<'d, T: Instance, M: PeriMode> SetConfig for I2c<'d, T, M> { +impl<'d, M: PeriMode> SetConfig for I2c<'d, M> { type Config = Hertz; type ConfigError = (); fn set_config(&mut self, config: &Self::Config) -> Result<(), ()> { - let timings = Timings::new(T::frequency(), *config); - T::regs().cr2().modify(|reg| { + let timings = Timings::new(self.kernel_clock, *config); + self.info.regs.cr2().modify(|reg| { reg.set_freq(timings.freq); }); - T::regs().ccr().modify(|reg| { + self.info.regs.ccr().modify(|reg| { reg.set_f_s(timings.mode.f_s()); reg.set_duty(timings.duty.duty()); reg.set_ccr(timings.ccr); }); - T::regs().trise().modify(|reg| { + self.info.regs.trise().modify(|reg| { reg.set_trise(timings.trise); }); diff --git a/embassy-stm32/src/i2c/v2.rs b/embassy-stm32/src/i2c/v2.rs index 12df98534..aa6daf786 100644 --- a/embassy-stm32/src/i2c/v2.rs +++ b/embassy-stm32/src/i2c/v2.rs @@ -10,7 +10,7 @@ use super::*; use crate::pac::i2c; pub(crate) unsafe fn on_interrupt() { - let regs = T::regs(); + let regs = T::info().regs; let isr = regs.isr().read(); if isr.tcr() || isr.tc() { @@ -23,16 +23,16 @@ pub(crate) unsafe fn on_interrupt() { }); } -impl<'d, T: Instance, M: Mode> I2c<'d, T, M> { +impl<'d, M: Mode> I2c<'d, M> { pub(crate) fn init(&mut self, freq: Hertz, _config: Config) { - T::regs().cr1().modify(|reg| { + self.info.regs.cr1().modify(|reg| { reg.set_pe(false); reg.set_anfoff(false); }); - let timings = Timings::new(T::frequency(), freq.into()); + let timings = Timings::new(self.kernel_clock, freq.into()); - T::regs().timingr().write(|reg| { + self.info.regs.timingr().write(|reg| { reg.set_presc(timings.prescale); reg.set_scll(timings.scll); reg.set_sclh(timings.sclh); @@ -40,16 +40,17 @@ impl<'d, T: Instance, M: Mode> I2c<'d, T, M> { reg.set_scldel(timings.scldel); }); - T::regs().cr1().modify(|reg| { + self.info.regs.cr1().modify(|reg| { reg.set_pe(true); }); } fn master_stop(&mut self) { - T::regs().cr2().write(|w| w.set_stop(true)); + self.info.regs.cr2().write(|w| w.set_stop(true)); } fn master_read( + info: &'static Info, address: u8, length: usize, stop: Stop, @@ -63,7 +64,7 @@ impl<'d, T: Instance, M: Mode> I2c<'d, T, M> { // Wait for any previous address sequence to end // automatically. This could be up to 50% of a bus // cycle (ie. up to 0.5/freq) - while T::regs().cr2().read().start() { + while info.regs.cr2().read().start() { timeout.check()?; } } @@ -78,7 +79,7 @@ impl<'d, T: Instance, M: Mode> I2c<'d, T, M> { i2c::vals::Reload::COMPLETED }; - T::regs().cr2().modify(|w| { + info.regs.cr2().modify(|w| { w.set_sadd((address << 1 | 0) as u16); w.set_add10(i2c::vals::Addmode::BIT7); w.set_dir(i2c::vals::Dir::READ); @@ -91,13 +92,20 @@ impl<'d, T: Instance, M: Mode> I2c<'d, T, M> { Ok(()) } - fn master_write(address: u8, length: usize, stop: Stop, reload: bool, timeout: Timeout) -> Result<(), Error> { + fn master_write( + info: &'static Info, + address: u8, + length: usize, + stop: Stop, + reload: bool, + timeout: Timeout, + ) -> Result<(), Error> { assert!(length < 256); // Wait for any previous address sequence to end // automatically. This could be up to 50% of a bus // cycle (ie. up to 0.5/freq) - while T::regs().cr2().read().start() { + while info.regs.cr2().read().start() { timeout.check()?; } @@ -110,7 +118,7 @@ impl<'d, T: Instance, M: Mode> I2c<'d, T, M> { // Set START and prepare to send `bytes`. The // START bit can be set even if the bus is BUSY or // I2C is in slave mode. - T::regs().cr2().modify(|w| { + info.regs.cr2().modify(|w| { w.set_sadd((address << 1 | 0) as u16); w.set_add10(i2c::vals::Addmode::BIT7); w.set_dir(i2c::vals::Dir::WRITE); @@ -123,10 +131,10 @@ impl<'d, T: Instance, M: Mode> I2c<'d, T, M> { Ok(()) } - fn master_continue(length: usize, reload: bool, timeout: Timeout) -> Result<(), Error> { + fn master_continue(info: &'static Info, length: usize, reload: bool, timeout: Timeout) -> Result<(), Error> { assert!(length < 256 && length > 0); - while !T::regs().isr().read().tcr() { + while !info.regs.isr().read().tcr() { timeout.check()?; } @@ -136,7 +144,7 @@ impl<'d, T: Instance, M: Mode> I2c<'d, T, M> { i2c::vals::Reload::COMPLETED }; - T::regs().cr2().modify(|w| { + info.regs.cr2().modify(|w| { w.set_nbytes(length as u8); w.set_reload(reload); }); @@ -145,27 +153,27 @@ impl<'d, T: Instance, M: Mode> I2c<'d, T, M> { } fn flush_txdr(&self) { - if T::regs().isr().read().txis() { - T::regs().txdr().write(|w| w.set_txdata(0)); + if self.info.regs.isr().read().txis() { + self.info.regs.txdr().write(|w| w.set_txdata(0)); } - if !T::regs().isr().read().txe() { - T::regs().isr().modify(|w| w.set_txe(true)) + if !self.info.regs.isr().read().txe() { + self.info.regs.isr().modify(|w| w.set_txe(true)) } } fn wait_txe(&self, timeout: Timeout) -> Result<(), Error> { loop { - let isr = T::regs().isr().read(); + let isr = self.info.regs.isr().read(); if isr.txe() { return Ok(()); } else if isr.berr() { - T::regs().icr().write(|reg| reg.set_berrcf(true)); + self.info.regs.icr().write(|reg| reg.set_berrcf(true)); return Err(Error::Bus); } else if isr.arlo() { - T::regs().icr().write(|reg| reg.set_arlocf(true)); + self.info.regs.icr().write(|reg| reg.set_arlocf(true)); return Err(Error::Arbitration); } else if isr.nackf() { - T::regs().icr().write(|reg| reg.set_nackcf(true)); + self.info.regs.icr().write(|reg| reg.set_nackcf(true)); self.flush_txdr(); return Err(Error::Nack); } @@ -176,17 +184,17 @@ impl<'d, T: Instance, M: Mode> I2c<'d, T, M> { fn wait_rxne(&self, timeout: Timeout) -> Result<(), Error> { loop { - let isr = T::regs().isr().read(); + let isr = self.info.regs.isr().read(); if isr.rxne() { return Ok(()); } else if isr.berr() { - T::regs().icr().write(|reg| reg.set_berrcf(true)); + self.info.regs.icr().write(|reg| reg.set_berrcf(true)); return Err(Error::Bus); } else if isr.arlo() { - T::regs().icr().write(|reg| reg.set_arlocf(true)); + self.info.regs.icr().write(|reg| reg.set_arlocf(true)); return Err(Error::Arbitration); } else if isr.nackf() { - T::regs().icr().write(|reg| reg.set_nackcf(true)); + self.info.regs.icr().write(|reg| reg.set_nackcf(true)); self.flush_txdr(); return Err(Error::Nack); } @@ -197,17 +205,17 @@ impl<'d, T: Instance, M: Mode> I2c<'d, T, M> { fn wait_tc(&self, timeout: Timeout) -> Result<(), Error> { loop { - let isr = T::regs().isr().read(); + let isr = self.info.regs.isr().read(); if isr.tc() { return Ok(()); } else if isr.berr() { - T::regs().icr().write(|reg| reg.set_berrcf(true)); + self.info.regs.icr().write(|reg| reg.set_berrcf(true)); return Err(Error::Bus); } else if isr.arlo() { - T::regs().icr().write(|reg| reg.set_arlocf(true)); + self.info.regs.icr().write(|reg| reg.set_arlocf(true)); return Err(Error::Arbitration); } else if isr.nackf() { - T::regs().icr().write(|reg| reg.set_nackcf(true)); + self.info.regs.icr().write(|reg| reg.set_nackcf(true)); self.flush_txdr(); return Err(Error::Nack); } @@ -226,6 +234,7 @@ impl<'d, T: Instance, M: Mode> I2c<'d, T, M> { let last_chunk_idx = total_chunks.saturating_sub(1); Self::master_read( + self.info, address, read.len().min(255), Stop::Automatic, @@ -236,14 +245,14 @@ impl<'d, T: Instance, M: Mode> I2c<'d, T, M> { for (number, chunk) in read.chunks_mut(255).enumerate() { if number != 0 { - Self::master_continue(chunk.len(), number != last_chunk_idx, timeout)?; + Self::master_continue(self.info, chunk.len(), number != last_chunk_idx, timeout)?; } for byte in chunk { // Wait until we have received something self.wait_rxne(timeout)?; - *byte = T::regs().rxdr().read().rxdata(); + *byte = self.info.regs.rxdr().read().rxdata(); } } Ok(()) @@ -262,6 +271,7 @@ impl<'d, T: Instance, M: Mode> I2c<'d, T, M> { // // ST SAD+W if let Err(err) = Self::master_write( + self.info, address, write.len().min(255), Stop::Software, @@ -276,7 +286,7 @@ impl<'d, T: Instance, M: Mode> I2c<'d, T, M> { for (number, chunk) in write.chunks(255).enumerate() { if number != 0 { - Self::master_continue(chunk.len(), number != last_chunk_idx, timeout)?; + Self::master_continue(self.info, chunk.len(), number != last_chunk_idx, timeout)?; } for byte in chunk { @@ -290,7 +300,7 @@ impl<'d, T: Instance, M: Mode> I2c<'d, T, M> { return Err(err); } - T::regs().txdr().write(|w| w.set_txdata(*byte)); + self.info.regs.txdr().write(|w| w.set_txdata(*byte)); } } // Wait until the write finishes @@ -348,6 +358,7 @@ impl<'d, T: Instance, M: Mode> I2c<'d, T, M> { let last_slice_index = write.len() - 1; if let Err(err) = Self::master_write( + self.info, address, first_length.min(255), Stop::Software, @@ -370,6 +381,7 @@ impl<'d, T: Instance, M: Mode> I2c<'d, T, M> { if idx != 0 { if let Err(err) = Self::master_continue( + self.info, slice_len.min(255), (idx != last_slice_index) || (slice_len > 255), timeout, @@ -382,6 +394,7 @@ impl<'d, T: Instance, M: Mode> I2c<'d, T, M> { for (number, chunk) in slice.chunks(255).enumerate() { if number != 0 { if let Err(err) = Self::master_continue( + self.info, chunk.len(), (number != last_chunk_idx) || (idx != last_slice_index), timeout, @@ -402,7 +415,7 @@ impl<'d, T: Instance, M: Mode> I2c<'d, T, M> { // Put byte on the wire //self.i2c.txdr.write(|w| w.txdata().bits(*byte)); - T::regs().txdr().write(|w| w.set_txdata(*byte)); + self.info.regs.txdr().write(|w| w.set_txdata(*byte)); } } } @@ -413,7 +426,7 @@ impl<'d, T: Instance, M: Mode> I2c<'d, T, M> { } } -impl<'d, T: Instance> I2c<'d, T, Async> { +impl<'d> I2c<'d, Async> { async fn write_dma_internal( &mut self, address: u8, @@ -425,7 +438,7 @@ impl<'d, T: Instance> I2c<'d, T, Async> { let total_len = write.len(); let dma_transfer = unsafe { - let regs = T::regs(); + let regs = self.info.regs; regs.cr1().modify(|w| { w.set_txdmaen(true); if first_slice { @@ -437,11 +450,10 @@ impl<'d, T: Instance> I2c<'d, T, Async> { self.tx_dma.as_mut().unwrap().write(write, dst, Default::default()) }; - let state = T::state(); let mut remaining_len = total_len; let on_drop = OnDrop::new(|| { - let regs = T::regs(); + let regs = self.info.regs; regs.cr1().modify(|w| { if last_slice { w.set_txdmaen(false); @@ -451,12 +463,13 @@ impl<'d, T: Instance> I2c<'d, T, Async> { }); poll_fn(|cx| { - state.waker.register(cx.waker()); + self.state.waker.register(cx.waker()); - let isr = T::regs().isr().read(); + let isr = self.info.regs.isr().read(); if remaining_len == total_len { if first_slice { Self::master_write( + self.info, address, total_len.min(255), Stop::Software, @@ -464,8 +477,8 @@ impl<'d, T: Instance> I2c<'d, T, Async> { timeout, )?; } else { - Self::master_continue(total_len.min(255), (total_len > 255) || !last_slice, timeout)?; - T::regs().cr1().modify(|w| w.set_tcie(true)); + Self::master_continue(self.info, total_len.min(255), (total_len > 255) || !last_slice, timeout)?; + self.info.regs.cr1().modify(|w| w.set_tcie(true)); } } else if !(isr.tcr() || isr.tc()) { // poll_fn was woken without an interrupt present @@ -475,10 +488,10 @@ impl<'d, T: Instance> I2c<'d, T, Async> { } else { let last_piece = (remaining_len <= 255) && last_slice; - if let Err(e) = Self::master_continue(remaining_len.min(255), !last_piece, timeout) { + if let Err(e) = Self::master_continue(self.info, remaining_len.min(255), !last_piece, timeout) { return Poll::Ready(Err(e)); } - T::regs().cr1().modify(|w| w.set_tcie(true)); + self.info.regs.cr1().modify(|w| w.set_tcie(true)); } remaining_len = remaining_len.saturating_sub(255); @@ -509,7 +522,7 @@ impl<'d, T: Instance> I2c<'d, T, Async> { let total_len = buffer.len(); let dma_transfer = unsafe { - let regs = T::regs(); + let regs = self.info.regs; regs.cr1().modify(|w| { w.set_rxdmaen(true); w.set_tcie(true); @@ -519,11 +532,10 @@ impl<'d, T: Instance> I2c<'d, T, Async> { self.rx_dma.as_mut().unwrap().read(src, buffer, Default::default()) }; - let state = T::state(); let mut remaining_len = total_len; let on_drop = OnDrop::new(|| { - let regs = T::regs(); + let regs = self.info.regs; regs.cr1().modify(|w| { w.set_rxdmaen(false); w.set_tcie(false); @@ -531,11 +543,12 @@ impl<'d, T: Instance> I2c<'d, T, Async> { }); poll_fn(|cx| { - state.waker.register(cx.waker()); + self.state.waker.register(cx.waker()); - let isr = T::regs().isr().read(); + let isr = self.info.regs.isr().read(); if remaining_len == total_len { Self::master_read( + self.info, address, total_len.min(255), Stop::Software, @@ -551,10 +564,10 @@ impl<'d, T: Instance> I2c<'d, T, Async> { } else { let last_piece = remaining_len <= 255; - if let Err(e) = Self::master_continue(remaining_len.min(255), !last_piece, timeout) { + if let Err(e) = Self::master_continue(self.info, remaining_len.min(255), !last_piece, timeout) { return Poll::Ready(Err(e)); } - T::regs().cr1().modify(|w| w.set_tcie(true)); + self.info.regs.cr1().modify(|w| w.set_tcie(true)); } remaining_len = remaining_len.saturating_sub(255); @@ -658,9 +671,9 @@ impl<'d, T: Instance> I2c<'d, T, Async> { } } -impl<'d, T: Instance, M: Mode> Drop for I2c<'d, T, M> { +impl<'d, M: Mode> Drop for I2c<'d, M> { fn drop(&mut self) { - T::disable(); + self.info.enable_bit.disable(); } } @@ -788,12 +801,12 @@ impl Timings { } } -impl<'d, T: Instance, M: Mode> SetConfig for I2c<'d, T, M> { +impl<'d, M: Mode> SetConfig for I2c<'d, M> { type Config = Hertz; type ConfigError = (); fn set_config(&mut self, config: &Self::Config) -> Result<(), ()> { - let timings = Timings::new(T::frequency(), *config); - T::regs().timingr().write(|reg| { + let timings = Timings::new(self.kernel_clock, *config); + self.info.regs.timingr().write(|reg| { reg.set_presc(timings.prescale); reg.set_scll(timings.scll); reg.set_sclh(timings.sclh); diff --git a/embassy-stm32/src/macros.rs b/embassy-stm32/src/macros.rs index 6a5691181..7f8076043 100644 --- a/embassy-stm32/src/macros.rs +++ b/embassy-stm32/src/macros.rs @@ -1,7 +1,9 @@ #![macro_use] macro_rules! peri_trait { - () => { + ( + $(irqs: [$($irq:ident),*],)? + ) => { #[allow(private_interfaces)] pub(crate) trait SealedInstance { #[allow(unused)] @@ -10,9 +12,14 @@ macro_rules! peri_trait { fn state() -> &'static State; } - /// SPI instance trait. + /// Peripheral instance trait. #[allow(private_bounds)] - pub trait Instance: Peripheral

+ SealedInstance + RccPeripheral {} + pub trait Instance: crate::Peripheral

+ SealedInstance + crate::rcc::RccPeripheral { + $($( + /// Interrupt for this peripheral. + type $irq: crate::interrupt::typelevel::Interrupt; + )*)? + } }; } diff --git a/examples/stm32h7/src/bin/i2c_shared.rs b/examples/stm32h7/src/bin/i2c_shared.rs index 79d213ae4..6f4815582 100644 --- a/examples/stm32h7/src/bin/i2c_shared.rs +++ b/examples/stm32h7/src/bin/i2c_shared.rs @@ -6,11 +6,10 @@ use core::cell::RefCell; use defmt::*; use embassy_embedded_hal::shared_bus::blocking::i2c::I2cDevice; use embassy_executor::Spawner; -use embassy_stm32::bind_interrupts; use embassy_stm32::i2c::{self, I2c}; use embassy_stm32::mode::Async; -use embassy_stm32::peripherals::{self, I2C1}; use embassy_stm32::time::Hertz; +use embassy_stm32::{bind_interrupts, peripherals}; use embassy_sync::blocking_mutex::NoopMutex; use embassy_time::{Duration, Timer}; use static_cell::StaticCell; @@ -24,7 +23,7 @@ const SHTC3_WAKEUP: [u8; 2] = [0x35, 0x17]; const SHTC3_MEASURE_RH_FIRST: [u8; 2] = [0x5c, 0x24]; const SHTC3_SLEEP: [u8; 2] = [0xb0, 0x98]; -static I2C_BUS: StaticCell>>> = StaticCell::new(); +static I2C_BUS: StaticCell>>> = StaticCell::new(); bind_interrupts!(struct Irqs { I2C1_EV => i2c::EventInterruptHandler; diff --git a/examples/stm32l4/src/bin/spe_adin1110_http_server.rs b/examples/stm32l4/src/bin/spe_adin1110_http_server.rs index 985ac8171..33149144c 100644 --- a/examples/stm32l4/src/bin/spe_adin1110_http_server.rs +++ b/examples/stm32l4/src/bin/spe_adin1110_http_server.rs @@ -60,7 +60,7 @@ pub type SpeSpiCs = ExclusiveDevice, Delay>; pub type SpeInt = exti::ExtiInput<'static>; pub type SpeRst = Output<'static>; pub type Adin1110T = ADIN1110; -pub type TempSensI2c = I2c<'static, peripherals::I2C3, Async>; +pub type TempSensI2c = I2c<'static, Async>; static TEMP: AtomicI32 = AtomicI32::new(0); From 7cdbae2a5d5693a63ce55c08f39a69f2b4f0689c Mon Sep 17 00:00:00 2001 From: Univa <41708691+Univa@users.noreply.github.com> Date: Mon, 20 May 2024 21:29:20 -0400 Subject: [PATCH 346/581] add AnyAdcChannel --- embassy-stm32/src/adc/f1.rs | 16 +++++----- embassy-stm32/src/adc/f3.rs | 16 +++++----- embassy-stm32/src/adc/f3_v1_1.rs | 24 +++++++------- embassy-stm32/src/adc/g4.rs | 27 ++++++---------- embassy-stm32/src/adc/mod.rs | 54 ++++++++++++++++++++++++-------- embassy-stm32/src/adc/v1.rs | 22 ++++++------- embassy-stm32/src/adc/v2.rs | 20 ++++++------ embassy-stm32/src/adc/v3.rs | 34 ++++++++++---------- embassy-stm32/src/adc/v4.rs | 29 ++++++----------- embassy-stm32/src/opamp.rs | 8 ++--- examples/stm32h7/src/bin/adc.rs | 2 +- 11 files changed, 131 insertions(+), 121 deletions(-) diff --git a/embassy-stm32/src/adc/f1.rs b/embassy-stm32/src/adc/f1.rs index 80eaecc14..3822d5032 100644 --- a/embassy-stm32/src/adc/f1.rs +++ b/embassy-stm32/src/adc/f1.rs @@ -5,7 +5,7 @@ use core::task::Poll; use embassy_hal_internal::into_ref; use super::blocking_delay_us; -use crate::adc::{Adc, AdcPin, Instance, SampleTime}; +use crate::adc::{Adc, AdcChannel, Instance, SampleTime}; use crate::time::Hertz; use crate::{interrupt, Peripheral}; @@ -32,16 +32,16 @@ impl interrupt::typelevel::Handler for InterruptHandl } pub struct Vref; -impl AdcPin for Vref {} -impl super::SealedAdcPin for Vref { +impl AdcChannel for Vref {} +impl super::SealedAdcChannel for Vref { fn channel(&self) -> u8 { 17 } } pub struct Temperature; -impl AdcPin for Temperature {} -impl super::SealedAdcPin for Temperature { +impl AdcChannel for Temperature {} +impl super::SealedAdcChannel for Temperature { fn channel(&self) -> u8 { 16 } @@ -135,8 +135,8 @@ impl<'d, T: Instance> Adc<'d, T> { T::regs().dr().read().0 as u16 } - pub async fn read(&mut self, pin: &mut impl AdcPin) -> u16 { - Self::set_channel_sample_time(pin.channel(), self.sample_time); + pub async fn read(&mut self, channel: &mut impl AdcChannel) -> u16 { + Self::set_channel_sample_time(channel.channel(), self.sample_time); T::regs().cr1().modify(|reg| { reg.set_scan(false); reg.set_discen(false); @@ -151,7 +151,7 @@ impl<'d, T: Instance> Adc<'d, T> { }); // Configure the channel to sample - T::regs().sqr3().write(|reg| reg.set_sq(0, pin.channel())); + T::regs().sqr3().write(|reg| reg.set_sq(0, channel.channel())); self.convert().await } diff --git a/embassy-stm32/src/adc/f3.rs b/embassy-stm32/src/adc/f3.rs index c22a3fe4a..3f076d64b 100644 --- a/embassy-stm32/src/adc/f3.rs +++ b/embassy-stm32/src/adc/f3.rs @@ -5,7 +5,7 @@ use core::task::Poll; use embassy_hal_internal::into_ref; use super::blocking_delay_us; -use crate::adc::{Adc, AdcPin, Instance, SampleTime}; +use crate::adc::{Adc, AdcChannel, Instance, SampleTime}; use crate::interrupt::typelevel::Interrupt; use crate::time::Hertz; use crate::{interrupt, Peripheral}; @@ -32,8 +32,8 @@ impl interrupt::typelevel::Handler for InterruptHandl } pub struct Vref; -impl AdcPin for Vref {} -impl super::SealedAdcPin for Vref { +impl AdcChannel for Vref {} +impl super::SealedAdcChannel for Vref { fn channel(&self) -> u8 { 18 } @@ -47,8 +47,8 @@ impl Vref { } pub struct Temperature; -impl AdcPin for Temperature {} -impl super::SealedAdcPin for Temperature { +impl AdcChannel for Temperature {} +impl super::SealedAdcChannel for Temperature { fn channel(&self) -> u8 { 16 } @@ -154,11 +154,11 @@ impl<'d, T: Instance> Adc<'d, T> { T::regs().dr().read().rdata() } - pub async fn read(&mut self, pin: &mut impl AdcPin) -> u16 { - Self::set_channel_sample_time(pin.channel(), self.sample_time); + pub async fn read(&mut self, channel: &mut impl AdcChannel) -> u16 { + Self::set_channel_sample_time(channel.channel(), self.sample_time); // Configure the channel to sample - T::regs().sqr1().write(|w| w.set_sq(0, pin.channel())); + T::regs().sqr1().write(|w| w.set_sq(0, channel.channel())); self.convert().await } diff --git a/embassy-stm32/src/adc/f3_v1_1.rs b/embassy-stm32/src/adc/f3_v1_1.rs index 672ace04f..106956989 100644 --- a/embassy-stm32/src/adc/f3_v1_1.rs +++ b/embassy-stm32/src/adc/f3_v1_1.rs @@ -7,7 +7,7 @@ use embassy_hal_internal::into_ref; use embassy_time::Instant; use super::Resolution; -use crate::adc::{Adc, AdcPin, Instance, SampleTime}; +use crate::adc::{Adc, AdcChannel, Instance, SampleTime}; use crate::interrupt::typelevel::Interrupt; use crate::time::Hertz; use crate::{interrupt, Peripheral}; @@ -64,8 +64,8 @@ fn update_vref(op: i8) { } pub struct Vref(core::marker::PhantomData); -impl AdcPin for Vref {} -impl super::SealedAdcPin for Vref { +impl AdcChannel for Vref {} +impl super::SealedAdcChannel for Vref { fn channel(&self) -> u8 { 17 } @@ -123,8 +123,8 @@ impl Drop for Vref { } pub struct Temperature(core::marker::PhantomData); -impl AdcPin for Temperature {} -impl super::SealedAdcPin for Temperature { +impl AdcChannel for Temperature {} +impl super::SealedAdcChannel for Temperature { fn channel(&self) -> u8 { 16 } @@ -271,8 +271,8 @@ impl<'d, T: Instance> Adc<'d, T> { } } - pub async fn read(&mut self, pin: &mut impl AdcPin) -> u16 { - self.set_sample_sequence(&[pin.channel()]).await; + pub async fn read(&mut self, channel: &mut impl AdcChannel) -> u16 { + self.set_sample_sequence(&[channel.channel()]).await; self.convert().await } @@ -283,18 +283,18 @@ impl<'d, T: Instance> Adc<'d, T> { } } - pub async fn set_sample_time(&mut self, pin: &mut impl AdcPin, sample_time: SampleTime) { - if Self::get_channel_sample_time(pin.channel()) != sample_time { + pub async fn set_sample_time(&mut self, channel: &mut impl AdcChannel, sample_time: SampleTime) { + if Self::get_channel_sample_time(channel.channel()) != sample_time { self.stop_adc().await; unsafe { - Self::set_channel_sample_time(pin.channel(), sample_time); + Self::set_channel_sample_time(channel.channel(), sample_time); } self.start_adc().await; } } - pub fn get_sample_time(&self, pin: &impl AdcPin) -> SampleTime { - Self::get_channel_sample_time(pin.channel()) + pub fn get_sample_time(&self, channel: &impl AdcChannel) -> SampleTime { + Self::get_channel_sample_time(channel.channel()) } /// Sets the channel sample time diff --git a/embassy-stm32/src/adc/g4.rs b/embassy-stm32/src/adc/g4.rs index 221cc2a40..ce7f5db70 100644 --- a/embassy-stm32/src/adc/g4.rs +++ b/embassy-stm32/src/adc/g4.rs @@ -2,7 +2,7 @@ use pac::adc::vals::{Adcaldif, Difsel, Exten}; use pac::adccommon::vals::Presc; -use super::{blocking_delay_us, Adc, AdcPin, Instance, InternalChannel, Resolution, SampleTime}; +use super::{blocking_delay_us, Adc, AdcChannel, Instance, Resolution, SampleTime}; use crate::time::Hertz; use crate::{pac, Peripheral}; @@ -33,8 +33,8 @@ const VBAT_CHANNEL: u8 = 17; // NOTE: Vrefint/Temperature/Vbat are not available on all ADCs, this currently cannot be modeled with stm32-data, so these are available from the software on all ADCs /// Internal voltage reference channel. pub struct VrefInt; -impl InternalChannel for VrefInt {} -impl super::SealedInternalChannel for VrefInt { +impl AdcChannel for VrefInt {} +impl super::SealedAdcChannel for VrefInt { fn channel(&self) -> u8 { VREF_CHANNEL } @@ -42,8 +42,8 @@ impl super::SealedInternalChannel for VrefInt { /// Internal temperature channel. pub struct Temperature; -impl InternalChannel for Temperature {} -impl super::SealedInternalChannel for Temperature { +impl AdcChannel for Temperature {} +impl super::SealedAdcChannel for Temperature { fn channel(&self) -> u8 { TEMP_CHANNEL } @@ -51,8 +51,8 @@ impl super::SealedInternalChannel for Temperature { /// Internal battery voltage channel. pub struct Vbat; -impl InternalChannel for Vbat {} -impl super::SealedInternalChannel for Vbat { +impl AdcChannel for Vbat {} +impl super::SealedAdcChannel for Vbat { fn channel(&self) -> u8 { VBAT_CHANNEL } @@ -258,18 +258,9 @@ impl<'d, T: Instance> Adc<'d, T> { } /// Read an ADC pin. - pub fn read

(&mut self, pin: &mut P) -> u16 - where - P: AdcPin, - P: crate::gpio::Pin, - { - pin.set_as_analog(); + pub fn read(&mut self, channel: &mut impl AdcChannel) -> u16 { + channel.setup(); - self.read_channel(pin.channel()) - } - - /// Read an ADC internal channel. - pub fn read_internal(&mut self, channel: &mut impl InternalChannel) -> u16 { self.read_channel(channel.channel()) } diff --git a/embassy-stm32/src/adc/mod.rs b/embassy-stm32/src/adc/mod.rs index c753d046c..6a3d0f44c 100644 --- a/embassy-stm32/src/adc/mod.rs +++ b/embassy-stm32/src/adc/mod.rs @@ -15,6 +15,8 @@ #[cfg_attr(adc_g4, path = "g4.rs")] mod _version; +use core::marker::PhantomData; + #[allow(unused)] #[cfg(not(adc_f3_v2))] pub use _version::*; @@ -58,15 +60,12 @@ trait SealedInstance { fn state() -> &'static State; } -pub(crate) trait SealedAdcPin { - #[cfg(any(adc_v1, adc_l0, adc_v2))] - fn set_as_analog(&mut self) {} +pub(crate) trait SealedAdcPin {} - #[allow(unused)] - fn channel(&self) -> u8; -} +pub(crate) trait SealedAdcChannel { + #[cfg(any(adc_v1, adc_l0, adc_v2, adc_g4, adc_v4))] + fn setup(&mut self) {} -trait SealedInternalChannel { #[allow(unused)] fn channel(&self) -> u8; } @@ -126,10 +125,37 @@ pub trait Instance: SealedInstance + crate::Peripheral

+ crate::rcc::R /// ADC pin. #[allow(private_bounds)] -pub trait AdcPin: SealedAdcPin {} -/// ADC internal channel. +pub trait AdcPin: AdcChannel + SealedAdcPin {} +/// ADC channel. #[allow(private_bounds)] -pub trait InternalChannel: SealedInternalChannel {} +pub trait AdcChannel: SealedAdcChannel + Sized { + #[allow(unused_mut)] + fn degrade_adc(mut self) -> AnyAdcChannel { + #[cfg(any(adc_v1, adc_l0, adc_v2, adc_g4, adc_v4))] + self.setup(); + + AnyAdcChannel { + channel: self.channel(), + _phantom: PhantomData, + } + } +} + +/// A type-erased channel for a given ADC instance. +/// +/// This is useful in scenarios where you need the ADC channels to have the same type, such as +/// storing them in an array. +pub struct AnyAdcChannel { + channel: u8, + _phantom: PhantomData, +} + +impl AdcChannel for AnyAdcChannel {} +impl SealedAdcChannel for AnyAdcChannel { + fn channel(&self) -> u8 { + self.channel + } +} foreach_adc!( ($inst:ident, $common_inst:ident, $clock:ident) => { @@ -159,10 +185,12 @@ foreach_adc!( macro_rules! impl_adc_pin { ($inst:ident, $pin:ident, $ch:expr) => { impl crate::adc::AdcPin for crate::peripherals::$pin {} + impl crate::adc::SealedAdcPin for crate::peripherals::$pin {} - impl crate::adc::SealedAdcPin for crate::peripherals::$pin { - #[cfg(any(adc_v1, adc_l0, adc_v2))] - fn set_as_analog(&mut self) { + impl crate::adc::AdcChannel for crate::peripherals::$pin {} + impl crate::adc::SealedAdcChannel for crate::peripherals::$pin { + #[cfg(any(adc_v1, adc_l0, adc_v2, adc_g4, adc_v4))] + fn setup(&mut self) { ::set_as_analog(self); } diff --git a/embassy-stm32/src/adc/v1.rs b/embassy-stm32/src/adc/v1.rs index f17522076..090790c39 100644 --- a/embassy-stm32/src/adc/v1.rs +++ b/embassy-stm32/src/adc/v1.rs @@ -7,7 +7,7 @@ use embassy_hal_internal::into_ref; use stm32_metapac::adc::vals::Ckmode; use super::blocking_delay_us; -use crate::adc::{Adc, AdcPin, Instance, Resolution, SampleTime}; +use crate::adc::{Adc, AdcChannel, Instance, Resolution, SampleTime}; use crate::interrupt::typelevel::Interrupt; use crate::peripherals::ADC1; use crate::{interrupt, Peripheral}; @@ -36,26 +36,26 @@ impl interrupt::typelevel::Handler for InterruptHandl pub struct Vbat; #[cfg(not(adc_l0))] -impl AdcPin for Vbat {} +impl AdcChannel for Vbat {} #[cfg(not(adc_l0))] -impl super::SealedAdcPin for Vbat { +impl super::SealedAdcChannel for Vbat { fn channel(&self) -> u8 { 18 } } pub struct Vref; -impl AdcPin for Vref {} -impl super::SealedAdcPin for Vref { +impl AdcChannel for Vref {} +impl super::SealedAdcChannel for Vref { fn channel(&self) -> u8 { 17 } } pub struct Temperature; -impl AdcPin for Temperature {} -impl super::SealedAdcPin for Temperature { +impl AdcChannel for Temperature {} +impl super::SealedAdcChannel for Temperature { fn channel(&self) -> u8 { 16 } @@ -155,12 +155,12 @@ impl<'d, T: Instance> Adc<'d, T> { T::regs().cfgr2().modify(|reg| reg.set_ckmode(ckmode)); } - pub async fn read(&mut self, pin: &mut impl AdcPin) -> u16 { - let channel = pin.channel(); - pin.set_as_analog(); + pub async fn read(&mut self, channel: &mut impl AdcChannel) -> u16 { + let ch_num = channel.channel(); + channel.setup(); // A.7.5 Single conversion sequence code example - Software trigger - T::regs().chselr().write(|reg| reg.set_chselx(channel as usize, true)); + T::regs().chselr().write(|reg| reg.set_chselx(ch_num as usize, true)); self.convert().await } diff --git a/embassy-stm32/src/adc/v2.rs b/embassy-stm32/src/adc/v2.rs index 7771cf768..033108195 100644 --- a/embassy-stm32/src/adc/v2.rs +++ b/embassy-stm32/src/adc/v2.rs @@ -1,7 +1,7 @@ use embassy_hal_internal::into_ref; use super::blocking_delay_us; -use crate::adc::{Adc, AdcPin, Instance, Resolution, SampleTime}; +use crate::adc::{Adc, AdcChannel, Instance, Resolution, SampleTime}; use crate::peripherals::ADC1; use crate::time::Hertz; use crate::Peripheral; @@ -12,8 +12,8 @@ pub const VREF_DEFAULT_MV: u32 = 3300; pub const VREF_CALIB_MV: u32 = 3300; pub struct VrefInt; -impl AdcPin for VrefInt {} -impl super::SealedAdcPin for VrefInt { +impl AdcChannel for VrefInt {} +impl super::SealedAdcChannel for VrefInt { fn channel(&self) -> u8 { 17 } @@ -27,8 +27,8 @@ impl VrefInt { } pub struct Temperature; -impl AdcPin for Temperature {} -impl super::SealedAdcPin for Temperature { +impl AdcChannel for Temperature {} +impl super::SealedAdcChannel for Temperature { fn channel(&self) -> u8 { cfg_if::cfg_if! { if #[cfg(any(stm32f2, stm32f40, stm32f41))] { @@ -48,8 +48,8 @@ impl Temperature { } pub struct Vbat; -impl AdcPin for Vbat {} -impl super::SealedAdcPin for Vbat { +impl AdcChannel for Vbat {} +impl super::SealedAdcChannel for Vbat { fn channel(&self) -> u8 { 18 } @@ -175,11 +175,11 @@ where T::regs().dr().read().0 as u16 } - pub fn read(&mut self, pin: &mut impl AdcPin) -> u16 { - pin.set_as_analog(); + pub fn read(&mut self, channel: &mut impl AdcChannel) -> u16 { + channel.setup(); // Configure ADC - let channel = pin.channel(); + let channel = channel.channel(); // Select channel T::regs().sqr3().write(|reg| reg.set_sq(0, channel)); diff --git a/embassy-stm32/src/adc/v3.rs b/embassy-stm32/src/adc/v3.rs index dc418297e..be857f4dd 100644 --- a/embassy-stm32/src/adc/v3.rs +++ b/embassy-stm32/src/adc/v3.rs @@ -2,7 +2,7 @@ use cfg_if::cfg_if; use embassy_hal_internal::into_ref; use super::blocking_delay_us; -use crate::adc::{Adc, AdcPin, Instance, Resolution, SampleTime}; +use crate::adc::{Adc, AdcChannel, Instance, Resolution, SampleTime}; use crate::Peripheral; /// Default VREF voltage used for sample conversion to millivolts. @@ -11,8 +11,8 @@ pub const VREF_DEFAULT_MV: u32 = 3300; pub const VREF_CALIB_MV: u32 = 3000; pub struct VrefInt; -impl AdcPin for VrefInt {} -impl super::SealedAdcPin for VrefInt { +impl AdcChannel for VrefInt {} +impl super::SealedAdcChannel for VrefInt { fn channel(&self) -> u8 { cfg_if! { if #[cfg(adc_g0)] { @@ -30,8 +30,8 @@ impl super::SealedAdcPin for VrefInt { } pub struct Temperature; -impl AdcPin for Temperature {} -impl super::SealedAdcPin for Temperature { +impl AdcChannel for Temperature {} +impl super::SealedAdcChannel for Temperature { fn channel(&self) -> u8 { cfg_if! { if #[cfg(adc_g0)] { @@ -49,8 +49,8 @@ impl super::SealedAdcPin for Temperature { } pub struct Vbat; -impl AdcPin for Vbat {} -impl super::SealedAdcPin for Vbat { +impl AdcChannel for Vbat {} +impl super::SealedAdcChannel for Vbat { fn channel(&self) -> u8 { cfg_if! { if #[cfg(adc_g0)] { @@ -70,8 +70,8 @@ impl super::SealedAdcPin for Vbat { cfg_if! { if #[cfg(adc_h5)] { pub struct VddCore; - impl AdcPin for VddCore {} - impl super::SealedAdcPin for VddCore { + impl AdcChannel for VddCore {} + impl super::SealedAdcChannel for VddCore { fn channel(&self) -> u8 { 6 } @@ -82,8 +82,8 @@ cfg_if! { cfg_if! { if #[cfg(adc_u0)] { pub struct DacOut; - impl AdcPin for DacOut {} - impl super::SealedAdcPin for DacOut { + impl AdcChannel for DacOut {} + impl super::SealedAdcChannel for DacOut { fn channel(&self) -> u8 { 19 } @@ -220,7 +220,7 @@ impl<'d, T: Instance> Adc<'d, T> { T::regs().dr().read().0 as u16 } - pub fn read(&mut self, pin: &mut impl AdcPin) -> u16 { + pub fn read(&mut self, channel: &mut impl AdcChannel) -> u16 { // Make sure bits are off while T::regs().cr().read().addis() { // spin @@ -241,18 +241,18 @@ impl<'d, T: Instance> Adc<'d, T> { // RM0492, RM0481, etc. // "This option bit must be set to 1 when ADCx_INP0 or ADCx_INN1 channel is selected." #[cfg(adc_h5)] - if pin.channel() == 0 { + if channel.channel() == 0 { T::regs().or().modify(|reg| reg.set_op0(true)); } // Configure channel - Self::set_channel_sample_time(pin.channel(), self.sample_time); + Self::set_channel_sample_time(channel.channel(), self.sample_time); // Select channel #[cfg(not(any(adc_g0, adc_u0)))] - T::regs().sqr1().write(|reg| reg.set_sq(0, pin.channel())); + T::regs().sqr1().write(|reg| reg.set_sq(0, channel.channel())); #[cfg(any(adc_g0, adc_u0))] - T::regs().chselr().write(|reg| reg.set_chsel(1 << pin.channel())); + T::regs().chselr().write(|reg| reg.set_chsel(1 << channel.channel())); // Some models are affected by an erratum: // If we perform conversions slower than 1 kHz, the first read ADC value can be @@ -270,7 +270,7 @@ impl<'d, T: Instance> Adc<'d, T> { // RM0492, RM0481, etc. // "This option bit must be set to 1 when ADCx_INP0 or ADCx_INN1 channel is selected." #[cfg(adc_h5)] - if pin.channel() == 0 { + if channel.channel() == 0 { T::regs().or().modify(|reg| reg.set_op0(false)); } diff --git a/embassy-stm32/src/adc/v4.rs b/embassy-stm32/src/adc/v4.rs index ca87b41ee..f564114c2 100644 --- a/embassy-stm32/src/adc/v4.rs +++ b/embassy-stm32/src/adc/v4.rs @@ -2,7 +2,7 @@ use pac::adc::vals::{Adcaldif, Boost, Difsel, Exten, Pcsel}; use pac::adccommon::vals::Presc; -use super::{blocking_delay_us, Adc, AdcPin, Instance, InternalChannel, Resolution, SampleTime}; +use super::{blocking_delay_us, Adc, AdcChannel, Instance, Resolution, SampleTime}; use crate::time::Hertz; use crate::{pac, Peripheral}; @@ -33,8 +33,8 @@ const VBAT_CHANNEL: u8 = 17; // NOTE: Vrefint/Temperature/Vbat are not available on all ADCs, this currently cannot be modeled with stm32-data, so these are available from the software on all ADCs /// Internal voltage reference channel. pub struct VrefInt; -impl InternalChannel for VrefInt {} -impl super::SealedInternalChannel for VrefInt { +impl AdcChannel for VrefInt {} +impl super::SealedAdcChannel for VrefInt { fn channel(&self) -> u8 { VREF_CHANNEL } @@ -42,8 +42,8 @@ impl super::SealedInternalChannel for VrefInt { /// Internal temperature channel. pub struct Temperature; -impl InternalChannel for Temperature {} -impl super::SealedInternalChannel for Temperature { +impl AdcChannel for Temperature {} +impl super::SealedAdcChannel for Temperature { fn channel(&self) -> u8 { TEMP_CHANNEL } @@ -51,8 +51,8 @@ impl super::SealedInternalChannel for Temperature { /// Internal battery voltage channel. pub struct Vbat; -impl InternalChannel for Vbat {} -impl super::SealedInternalChannel for Vbat { +impl AdcChannel for Vbat {} +impl super::SealedAdcChannel for Vbat { fn channel(&self) -> u8 { VBAT_CHANNEL } @@ -271,19 +271,10 @@ impl<'d, T: Instance> Adc<'d, T> { T::regs().dr().read().0 as u16 } - /// Read an ADC pin. - pub fn read

(&mut self, pin: &mut P) -> u16 - where - P: AdcPin, - P: crate::gpio::Pin, - { - pin.set_as_analog(); + /// Read an ADC channel. + pub fn read(&mut self, channel: &mut impl AdcChannel) -> u16 { + channel.setup(); - self.read_channel(pin.channel()) - } - - /// Read an ADC internal channel. - pub fn read_internal(&mut self, channel: &mut impl InternalChannel) -> u16 { self.read_channel(channel.channel()) } diff --git a/embassy-stm32/src/opamp.rs b/embassy-stm32/src/opamp.rs index a3b4352c0..487902959 100644 --- a/embassy-stm32/src/opamp.rs +++ b/embassy-stm32/src/opamp.rs @@ -198,7 +198,7 @@ macro_rules! impl_opamp_external_output { ($inst:ident, $adc:ident, $ch:expr) => { foreach_adc!( ($adc, $common_inst:ident, $adc_clock:ident) => { - impl<'d> crate::adc::SealedAdcPin + impl<'d> crate::adc::SealedAdcChannel for OpAmpOutput<'d, crate::peripherals::$inst> { fn channel(&self) -> u8 { @@ -206,7 +206,7 @@ macro_rules! impl_opamp_external_output { } } - impl<'d> crate::adc::AdcPin + impl<'d> crate::adc::AdcChannel for OpAmpOutput<'d, crate::peripherals::$inst> { } @@ -244,7 +244,7 @@ macro_rules! impl_opamp_internal_output { ($inst:ident, $adc:ident, $ch:expr) => { foreach_adc!( ($adc, $common_inst:ident, $adc_clock:ident) => { - impl<'d> crate::adc::SealedAdcPin + impl<'d> crate::adc::SealedAdcChannel for OpAmpInternalOutput<'d, crate::peripherals::$inst> { fn channel(&self) -> u8 { @@ -252,7 +252,7 @@ macro_rules! impl_opamp_internal_output { } } - impl<'d> crate::adc::AdcPin + impl<'d> crate::adc::AdcChannel for OpAmpInternalOutput<'d, crate::peripherals::$inst> { } diff --git a/examples/stm32h7/src/bin/adc.rs b/examples/stm32h7/src/bin/adc.rs index 0009103d1..e9a857a74 100644 --- a/examples/stm32h7/src/bin/adc.rs +++ b/examples/stm32h7/src/bin/adc.rs @@ -51,7 +51,7 @@ async fn main(_spawner: Spawner) { let mut vrefint_channel = adc.enable_vrefint(); loop { - let vrefint = adc.read_internal(&mut vrefint_channel); + let vrefint = adc.read(&mut vrefint_channel); info!("vrefint: {}", vrefint); let measured = adc.read(&mut p.PC0); info!("measured: {}", measured); From 739e5861c2e47db251725163fcd91cd822cf97b7 Mon Sep 17 00:00:00 2001 From: Ulf Lilleengen Date: Sat, 18 May 2024 10:17:03 +0200 Subject: [PATCH 347/581] convert from antora to asciidoctor --- docs/README.md | 9 ++++++-- docs/antora.yml | 5 ----- .../examples/basic/.cargo/config.toml | 0 .../ROOT => }/examples/basic/Cargo.toml | 0 .../ROOT => }/examples/basic/build.rs | 0 .../ROOT => }/examples/basic/memory.x | 0 .../ROOT => }/examples/basic/src/main.rs | 0 docs/examples/examples | 1 + .../layer-by-layer/.cargo/config.toml | 0 .../examples/layer-by-layer/Cargo.toml | 0 .../layer-by-layer/blinky-async/Cargo.toml | 0 .../layer-by-layer/blinky-async/src/main.rs | 0 .../layer-by-layer/blinky-hal/Cargo.toml | 0 .../layer-by-layer/blinky-hal/src/main.rs | 0 .../layer-by-layer/blinky-irq/Cargo.toml | 0 .../layer-by-layer/blinky-irq/src/main.rs | 0 .../layer-by-layer/blinky-pac/Cargo.toml | 0 .../layer-by-layer/blinky-pac/src/main.rs | 0 docs/index.adoc | 15 +++++++++++++ docs/modules/ROOT/examples/examples | 1 - .../ROOT => }/pages/basic_application.adoc | 10 ++++----- docs/pages/beginners.adoc | 11 ++++++++++ .../ROOT => }/pages/best_practices.adoc | 0 docs/{modules/ROOT => }/pages/bootloader.adoc | 0 docs/{modules/ROOT => }/pages/developer.adoc | 0 .../ROOT => }/pages/developer_stm32.adoc | 0 .../ROOT => }/pages/embassy_in_the_wild.adoc | 0 docs/{modules/ROOT => }/pages/examples.adoc | 2 +- docs/{modules/ROOT => }/pages/faq.adoc | 0 .../ROOT => }/pages/getting_started.adoc | 0 docs/{modules/ROOT => }/pages/hal.adoc | 0 .../ROOT => }/pages/layer_by_layer.adoc | 8 +++---- .../{modules/ROOT => }/pages/new_project.adoc | 21 ++++++++++--------- docs/{modules/ROOT => }/pages/nrf.adoc | 0 .../pages/index.adoc => pages/overview.adoc} | 16 +++++++++++++- .../ROOT => }/pages/project_structure.adoc | 12 +++++++++-- docs/{modules/ROOT => }/pages/runtime.adoc | 0 .../ROOT => }/pages/sharing_peripherals.adoc | 0 docs/{modules/ROOT => }/pages/stm32.adoc | 0 docs/pages/system.adoc | 13 ++++++++++++ .../ROOT => }/pages/time_keeping.adoc | 0 41 files changed, 93 insertions(+), 31 deletions(-) delete mode 100644 docs/antora.yml rename docs/{modules/ROOT => }/examples/basic/.cargo/config.toml (100%) rename docs/{modules/ROOT => }/examples/basic/Cargo.toml (100%) rename docs/{modules/ROOT => }/examples/basic/build.rs (100%) rename docs/{modules/ROOT => }/examples/basic/memory.x (100%) rename docs/{modules/ROOT => }/examples/basic/src/main.rs (100%) create mode 120000 docs/examples/examples rename docs/{modules/ROOT => }/examples/layer-by-layer/.cargo/config.toml (100%) rename docs/{modules/ROOT => }/examples/layer-by-layer/Cargo.toml (100%) rename docs/{modules/ROOT => }/examples/layer-by-layer/blinky-async/Cargo.toml (100%) rename docs/{modules/ROOT => }/examples/layer-by-layer/blinky-async/src/main.rs (100%) rename docs/{modules/ROOT => }/examples/layer-by-layer/blinky-hal/Cargo.toml (100%) rename docs/{modules/ROOT => }/examples/layer-by-layer/blinky-hal/src/main.rs (100%) rename docs/{modules/ROOT => }/examples/layer-by-layer/blinky-irq/Cargo.toml (100%) rename docs/{modules/ROOT => }/examples/layer-by-layer/blinky-irq/src/main.rs (100%) rename docs/{modules/ROOT => }/examples/layer-by-layer/blinky-pac/Cargo.toml (100%) rename docs/{modules/ROOT => }/examples/layer-by-layer/blinky-pac/src/main.rs (100%) create mode 100644 docs/index.adoc delete mode 120000 docs/modules/ROOT/examples/examples rename docs/{modules/ROOT => }/pages/basic_application.adoc (91%) create mode 100644 docs/pages/beginners.adoc rename docs/{modules/ROOT => }/pages/best_practices.adoc (100%) rename docs/{modules/ROOT => }/pages/bootloader.adoc (100%) rename docs/{modules/ROOT => }/pages/developer.adoc (100%) rename docs/{modules/ROOT => }/pages/developer_stm32.adoc (100%) rename docs/{modules/ROOT => }/pages/embassy_in_the_wild.adoc (100%) rename docs/{modules/ROOT => }/pages/examples.adoc (74%) rename docs/{modules/ROOT => }/pages/faq.adoc (100%) rename docs/{modules/ROOT => }/pages/getting_started.adoc (100%) rename docs/{modules/ROOT => }/pages/hal.adoc (100%) rename docs/{modules/ROOT => }/pages/layer_by_layer.adoc (95%) rename docs/{modules/ROOT => }/pages/new_project.adoc (96%) rename docs/{modules/ROOT => }/pages/nrf.adoc (100%) rename docs/{modules/ROOT/pages/index.adoc => pages/overview.adoc} (96%) rename docs/{modules/ROOT => }/pages/project_structure.adoc (96%) rename docs/{modules/ROOT => }/pages/runtime.adoc (100%) rename docs/{modules/ROOT => }/pages/sharing_peripherals.adoc (100%) rename docs/{modules/ROOT => }/pages/stm32.adoc (100%) create mode 100644 docs/pages/system.adoc rename docs/{modules/ROOT => }/pages/time_keeping.adoc (100%) diff --git a/docs/README.md b/docs/README.md index 0bf3a6c89..8b9a3c48d 100644 --- a/docs/README.md +++ b/docs/README.md @@ -1,4 +1,9 @@ # embassy docs -The documentation hosted at [https://embassy.dev/book](https://embassy.dev/book). Building the documentation requires -cloning the [embassy-book](https://github.com/embassy-rs/embassy-book) repository and following the instructions. +The documentation hosted at [https://embassy.dev/book](https://embassy.dev/book). Building the documentation requires the [asciidoctor](https://asciidoctor.org/) tool, and can be built like this: + +``` +asciidoctor -d book -D thebook/ index.adoc +``` + +Then open the generated file `thebook/index.html`. diff --git a/docs/antora.yml b/docs/antora.yml deleted file mode 100644 index 9a00fa820..000000000 --- a/docs/antora.yml +++ /dev/null @@ -1,5 +0,0 @@ -name: ROOT -title: Embassy -version: dev -nav: - - modules/ROOT/nav.adoc diff --git a/docs/modules/ROOT/examples/basic/.cargo/config.toml b/docs/examples/basic/.cargo/config.toml similarity index 100% rename from docs/modules/ROOT/examples/basic/.cargo/config.toml rename to docs/examples/basic/.cargo/config.toml diff --git a/docs/modules/ROOT/examples/basic/Cargo.toml b/docs/examples/basic/Cargo.toml similarity index 100% rename from docs/modules/ROOT/examples/basic/Cargo.toml rename to docs/examples/basic/Cargo.toml diff --git a/docs/modules/ROOT/examples/basic/build.rs b/docs/examples/basic/build.rs similarity index 100% rename from docs/modules/ROOT/examples/basic/build.rs rename to docs/examples/basic/build.rs diff --git a/docs/modules/ROOT/examples/basic/memory.x b/docs/examples/basic/memory.x similarity index 100% rename from docs/modules/ROOT/examples/basic/memory.x rename to docs/examples/basic/memory.x diff --git a/docs/modules/ROOT/examples/basic/src/main.rs b/docs/examples/basic/src/main.rs similarity index 100% rename from docs/modules/ROOT/examples/basic/src/main.rs rename to docs/examples/basic/src/main.rs diff --git a/docs/examples/examples b/docs/examples/examples new file mode 120000 index 000000000..d15735c1d --- /dev/null +++ b/docs/examples/examples @@ -0,0 +1 @@ +../../examples \ No newline at end of file diff --git a/docs/modules/ROOT/examples/layer-by-layer/.cargo/config.toml b/docs/examples/layer-by-layer/.cargo/config.toml similarity index 100% rename from docs/modules/ROOT/examples/layer-by-layer/.cargo/config.toml rename to docs/examples/layer-by-layer/.cargo/config.toml diff --git a/docs/modules/ROOT/examples/layer-by-layer/Cargo.toml b/docs/examples/layer-by-layer/Cargo.toml similarity index 100% rename from docs/modules/ROOT/examples/layer-by-layer/Cargo.toml rename to docs/examples/layer-by-layer/Cargo.toml diff --git a/docs/modules/ROOT/examples/layer-by-layer/blinky-async/Cargo.toml b/docs/examples/layer-by-layer/blinky-async/Cargo.toml similarity index 100% rename from docs/modules/ROOT/examples/layer-by-layer/blinky-async/Cargo.toml rename to docs/examples/layer-by-layer/blinky-async/Cargo.toml diff --git a/docs/modules/ROOT/examples/layer-by-layer/blinky-async/src/main.rs b/docs/examples/layer-by-layer/blinky-async/src/main.rs similarity index 100% rename from docs/modules/ROOT/examples/layer-by-layer/blinky-async/src/main.rs rename to docs/examples/layer-by-layer/blinky-async/src/main.rs diff --git a/docs/modules/ROOT/examples/layer-by-layer/blinky-hal/Cargo.toml b/docs/examples/layer-by-layer/blinky-hal/Cargo.toml similarity index 100% rename from docs/modules/ROOT/examples/layer-by-layer/blinky-hal/Cargo.toml rename to docs/examples/layer-by-layer/blinky-hal/Cargo.toml diff --git a/docs/modules/ROOT/examples/layer-by-layer/blinky-hal/src/main.rs b/docs/examples/layer-by-layer/blinky-hal/src/main.rs similarity index 100% rename from docs/modules/ROOT/examples/layer-by-layer/blinky-hal/src/main.rs rename to docs/examples/layer-by-layer/blinky-hal/src/main.rs diff --git a/docs/modules/ROOT/examples/layer-by-layer/blinky-irq/Cargo.toml b/docs/examples/layer-by-layer/blinky-irq/Cargo.toml similarity index 100% rename from docs/modules/ROOT/examples/layer-by-layer/blinky-irq/Cargo.toml rename to docs/examples/layer-by-layer/blinky-irq/Cargo.toml diff --git a/docs/modules/ROOT/examples/layer-by-layer/blinky-irq/src/main.rs b/docs/examples/layer-by-layer/blinky-irq/src/main.rs similarity index 100% rename from docs/modules/ROOT/examples/layer-by-layer/blinky-irq/src/main.rs rename to docs/examples/layer-by-layer/blinky-irq/src/main.rs diff --git a/docs/modules/ROOT/examples/layer-by-layer/blinky-pac/Cargo.toml b/docs/examples/layer-by-layer/blinky-pac/Cargo.toml similarity index 100% rename from docs/modules/ROOT/examples/layer-by-layer/blinky-pac/Cargo.toml rename to docs/examples/layer-by-layer/blinky-pac/Cargo.toml diff --git a/docs/modules/ROOT/examples/layer-by-layer/blinky-pac/src/main.rs b/docs/examples/layer-by-layer/blinky-pac/src/main.rs similarity index 100% rename from docs/modules/ROOT/examples/layer-by-layer/blinky-pac/src/main.rs rename to docs/examples/layer-by-layer/blinky-pac/src/main.rs diff --git a/docs/index.adoc b/docs/index.adoc new file mode 100644 index 000000000..f0fa6f2b7 --- /dev/null +++ b/docs/index.adoc @@ -0,0 +1,15 @@ +:description: Embassy Book +:sectanchors: +:doctype: book +:toc: +:toc-placement: left +:toclevels: 2 + +# Embassy Book + +Welcome to the Embassy Book. The Embassy Book is for everyone who wants to use Embassy and understand how Embassy works. + +include::pages/overview.adoc[leveloffset = 1] +include::pages/beginners.adoc[leveloffset = 1] +include::pages/system.adoc[leveloffset = 1] +include::pages/faq.adoc[leveloffset = 1] diff --git a/docs/modules/ROOT/examples/examples b/docs/modules/ROOT/examples/examples deleted file mode 120000 index 1929330b0..000000000 --- a/docs/modules/ROOT/examples/examples +++ /dev/null @@ -1 +0,0 @@ -../../../../examples \ No newline at end of file diff --git a/docs/modules/ROOT/pages/basic_application.adoc b/docs/pages/basic_application.adoc similarity index 91% rename from docs/modules/ROOT/pages/basic_application.adoc rename to docs/pages/basic_application.adoc index d5aad806d..aa3ea2d1b 100644 --- a/docs/modules/ROOT/pages/basic_application.adoc +++ b/docs/pages/basic_application.adoc @@ -14,7 +14,7 @@ The first thing you’ll notice are two attributes at the top of the file. These [source,rust] ---- -include::example$basic/src/main.rs[lines="1..2"] +include::../examples/basic/src/main.rs[lines="1..2"] ---- === Dealing with errors @@ -23,7 +23,7 @@ Then, what follows are some declarations on how to deal with panics and faults. [source,rust] ---- -include::example$basic/src/main.rs[lines="8"] +include::../examples/basic/src/main.rs[lines="8"] ---- === Task declaration @@ -32,7 +32,7 @@ After a bit of import declaration, the tasks run by the application should be de [source,rust] ---- -include::example$basic/src/main.rs[lines="10..18"] +include::../examples/basic/src/main.rs[lines="10..18"] ---- An embassy task must be declared `async`, and may NOT take generic arguments. In this case, we are handed the LED that should be blinked and the interval of the blinking. @@ -47,7 +47,7 @@ We then initialize the HAL with a default config, which gives us a `Peripherals` [source,rust] ---- -include::example$basic/src/main.rs[lines="20..-1"] +include::../examples/basic/src/main.rs[lines="20..-1"] ---- What happens when the `blinker` task has been spawned and main returns? Well, the main entry point is actually just like any other task, except that you can only have one and it takes some specific type arguments. The magic lies within the `#[embassy_executor::main]` macro. The macro does the following: @@ -64,7 +64,7 @@ The project definition needs to contain the embassy dependencies: [source,toml] ---- -include::example$basic/Cargo.toml[lines="9..11"] +include::../examples/basic/Cargo.toml[lines="9..11"] ---- Depending on your microcontroller, you may need to replace `embassy-nrf` with something else (`embassy-stm32` for STM32. Remember to update feature flags as well). diff --git a/docs/pages/beginners.adoc b/docs/pages/beginners.adoc new file mode 100644 index 000000000..48c9f4541 --- /dev/null +++ b/docs/pages/beginners.adoc @@ -0,0 +1,11 @@ += For beginners + +The articles in this section are primarily aimed at users new to Embassy, +showing how to get started, how to structure your project and other best practices. + +include::getting_started.adoc[leveloffset = 2] +include::basic_application.adoc[leveloffset = 2] +include::project_structure.adoc[leveloffset = 2] +include::new_project.adoc[leveloffset = 2] +include::best_practices.adoc[leveloffset = 2] +include::layer_by_layer.adoc[leveloffset = 2] diff --git a/docs/modules/ROOT/pages/best_practices.adoc b/docs/pages/best_practices.adoc similarity index 100% rename from docs/modules/ROOT/pages/best_practices.adoc rename to docs/pages/best_practices.adoc diff --git a/docs/modules/ROOT/pages/bootloader.adoc b/docs/pages/bootloader.adoc similarity index 100% rename from docs/modules/ROOT/pages/bootloader.adoc rename to docs/pages/bootloader.adoc diff --git a/docs/modules/ROOT/pages/developer.adoc b/docs/pages/developer.adoc similarity index 100% rename from docs/modules/ROOT/pages/developer.adoc rename to docs/pages/developer.adoc diff --git a/docs/modules/ROOT/pages/developer_stm32.adoc b/docs/pages/developer_stm32.adoc similarity index 100% rename from docs/modules/ROOT/pages/developer_stm32.adoc rename to docs/pages/developer_stm32.adoc diff --git a/docs/modules/ROOT/pages/embassy_in_the_wild.adoc b/docs/pages/embassy_in_the_wild.adoc similarity index 100% rename from docs/modules/ROOT/pages/embassy_in_the_wild.adoc rename to docs/pages/embassy_in_the_wild.adoc diff --git a/docs/modules/ROOT/pages/examples.adoc b/docs/pages/examples.adoc similarity index 74% rename from docs/modules/ROOT/pages/examples.adoc rename to docs/pages/examples.adoc index c852f5205..82381a2c5 100644 --- a/docs/modules/ROOT/pages/examples.adoc +++ b/docs/pages/examples.adoc @@ -7,5 +7,5 @@ Main loop example [source,rust] ---- -include::example$examples/std/src/bin/tick.rs[] +include::../examples/examples/std/src/bin/tick.rs[] ---- diff --git a/docs/modules/ROOT/pages/faq.adoc b/docs/pages/faq.adoc similarity index 100% rename from docs/modules/ROOT/pages/faq.adoc rename to docs/pages/faq.adoc diff --git a/docs/modules/ROOT/pages/getting_started.adoc b/docs/pages/getting_started.adoc similarity index 100% rename from docs/modules/ROOT/pages/getting_started.adoc rename to docs/pages/getting_started.adoc diff --git a/docs/modules/ROOT/pages/hal.adoc b/docs/pages/hal.adoc similarity index 100% rename from docs/modules/ROOT/pages/hal.adoc rename to docs/pages/hal.adoc diff --git a/docs/modules/ROOT/pages/layer_by_layer.adoc b/docs/pages/layer_by_layer.adoc similarity index 95% rename from docs/modules/ROOT/pages/layer_by_layer.adoc rename to docs/pages/layer_by_layer.adoc index fa419f75e..f87291c20 100644 --- a/docs/modules/ROOT/pages/layer_by_layer.adoc +++ b/docs/pages/layer_by_layer.adoc @@ -16,7 +16,7 @@ The blinky app using PAC is shown below: [source,rust] ---- -include::example$layer-by-layer/blinky-pac/src/main.rs[] +include::../examples/layer-by-layer/blinky-pac/src/main.rs[] ---- As you can see, a lot of code is needed to enable the peripheral clocks and to configure the input pins and the output pins of the application. @@ -35,7 +35,7 @@ The HAL example is shown below: [source,rust] ---- -include::example$layer-by-layer/blinky-hal/src/main.rs[] +include::../examples/layer-by-layer/blinky-hal/src/main.rs[] ---- As you can see, the application becomes a lot simpler, even without using any async code. The `Input` and `Output` types hide all the details of accessing the GPIO registers and allow you to use a much simpler API for querying the state of the button and toggling the LED output. @@ -52,7 +52,7 @@ Given Embassy focus on async Rust (which we'll come back to after this example), [source,rust] ---- -include::example$layer-by-layer/blinky-irq/src/main.rs[lines="1..57"] +include::../examples/layer-by-layer/blinky-irq/src/main.rs[lines="1..57"] ---- The simple application is now more complex again, primarily because of the need to keep the button and LED states in the global scope where it is accessible by the main application loop, as well as the interrupt handler. @@ -67,7 +67,7 @@ It's time to use the Embassy capabilities to its fullest. At the core, Embassy h [source,rust] ---- -include::example$layer-by-layer/blinky-async/src/main.rs[] +include::../examples/layer-by-layer/blinky-async/src/main.rs[] ---- The async version looks very similar to the HAL version, apart from a few minor details: diff --git a/docs/modules/ROOT/pages/new_project.adoc b/docs/pages/new_project.adoc similarity index 96% rename from docs/modules/ROOT/pages/new_project.adoc rename to docs/pages/new_project.adoc index 320966bb6..346d9f0f8 100644 --- a/docs/modules/ROOT/pages/new_project.adoc +++ b/docs/pages/new_project.adoc @@ -1,17 +1,18 @@ -= Starting a new Embassy project += Starting a new project Once you’ve successfully xref:getting_started.adoc[run some example projects], the next step is to make a standalone Embassy project. -There are some tools for generating Embassy projects: (WIP) +== Tools for generating Embassy projects -==== CLI +=== CLI - link:https://github.com/adinack/cargo-embassy[cargo-embassy] (STM32 and NRF) -==== cargo-generate +=== cargo-generate - link:https://github.com/lulf/embassy-template[embassy-template] (STM32, NRF, and RP) - link:https://github.com/bentwire/embassy-rp2040-template[embassy-rp2040-template] (RP) -But if you want to start from scratch: + +== Starting a project from scratch As an example, let’s create a new embassy project from scratch for a STM32G474. The same instructions are applicable for any supported chip with some minor changes. @@ -35,7 +36,7 @@ stm32g474-example Looking in link:https://github.com/embassy-rs/embassy/tree/main/examples[the Embassy examples], we can see there’s a `stm32g4` folder. Find `src/blinky.rs` and copy its contents into our `src/main.rs`. -== .cargo/config.toml +=== The .cargo/config.toml Currently, we’d need to provide cargo with a target triple every time we run `cargo build` or `cargo run`. Let’s spare ourselves that work by copying `.cargo/config.toml` from `examples/stm32g4` into our project. @@ -66,7 +67,7 @@ and copying `STM32G474RETx` into `.cargo/config.toml` as so: runner = "probe-rs run --chip STM32G474RETx" ---- -== Cargo.toml +=== Cargo.toml Now that cargo knows what target to compile for (and probe-rs knows what chip to run it on), we’re ready to add some dependencies. @@ -117,7 +118,7 @@ Finally, copy the `[profile.release]` section from the example `Cargo.toml` into debug = 2 ---- -== rust-toolchain.toml +=== rust-toolchain.toml Before we can build our project, we need to add an additional file to tell cargo to use the nightly toolchain. Copy the `rust-toolchain.toml` from the embassy repo to ours, and trim the list of targets down to only the target triple relevent for our project — in this case, `thumbv7em-none-eabi`: @@ -142,7 +143,7 @@ components = [ "rust-src", "rustfmt", "llvm-tools", "miri" ] targets = ["thumbv7em-none-eabi"] ---- -== build.rs +=== build.rs In order to produce a working binary for our target, cargo requires a custom build script. Copy `build.rs` from the example to our project: @@ -158,7 +159,7 @@ stm32g474-example └── main.rs ---- -== Building and running +=== Building and running At this point, we‘re finally ready to build and run our project! Connect your board via a debug probe and run: diff --git a/docs/modules/ROOT/pages/nrf.adoc b/docs/pages/nrf.adoc similarity index 100% rename from docs/modules/ROOT/pages/nrf.adoc rename to docs/pages/nrf.adoc diff --git a/docs/modules/ROOT/pages/index.adoc b/docs/pages/overview.adoc similarity index 96% rename from docs/modules/ROOT/pages/index.adoc rename to docs/pages/overview.adoc index 7116f357f..1b9381bfe 100644 --- a/docs/modules/ROOT/pages/index.adoc +++ b/docs/pages/overview.adoc @@ -1,4 +1,4 @@ -= Embassy += Introduction Embassy is a project to make async/await a first-class option for embedded development. @@ -56,6 +56,20 @@ For most I/O in embedded devices, the peripheral doesn't directly support the tr The Direct Memory Access controller (DMA) is a controller that is present in MCUs that Embassy supports, including stm32 and nrf. The DMA allows the MCU to set up a transfer, either send or receive, and then wait for the transfer to complete. With DMA, once started, no MCU intervention is required until the transfer is complete, meaning that the MCU can perform other computation, or set up other I/O while the transfer is in progress. For high I/O rates, DMA can cut the time that the MCU spends handling I/O by over half. However, because DMA is more complex to set-up, it is less widely used in the embedded community. Embassy aims to change that by making DMA the first choice rather than the last. Using Embassy, there's no additional tuning required once I/O rates increase because your application is already set-up to handle them. +== Examples + +Embassy provides examples for all HALs supported. You can find them in the `examples/` folder. + + +Main loop example + +[source,rust] +---- +include::../examples/examples/std/src/bin/tick.rs[] +---- + +include::embassy_in_the_wild.adoc[leveloffset = 2] + == Resources For more reading material on async Rust and Embassy: diff --git a/docs/modules/ROOT/pages/project_structure.adoc b/docs/pages/project_structure.adoc similarity index 96% rename from docs/modules/ROOT/pages/project_structure.adoc rename to docs/pages/project_structure.adoc index 2adfcc1df..722ec8d9d 100644 --- a/docs/modules/ROOT/pages/project_structure.adoc +++ b/docs/pages/project_structure.adoc @@ -18,6 +18,7 @@ my-project |- rust-toolchain.toml ---- +[discrete] == .cargo/config.toml This directory/file describes what platform you're on, and configures link:https://github.com/probe-rs/probe-rs[probe-rs] to deploy to your device. @@ -36,21 +37,27 @@ target = "thumbv6m-none-eabi" # <-change for your platform DEFMT_LOG = "trace" # <- can change to info, warn, or error ---- +[discrete] == build.rs This is the build script for your project. It links defmt (what is link:https://defmt.ferrous-systems.com[defmt]?) and the `memory.x` file if needed. This file is pretty specific for each chipset, just copy and paste from the corresponding link:https://github.com/embassy-rs/embassy/tree/main/examples[example]. +[discrete] == Cargo.toml This is your manifest file, where you can configure all of the embassy components to use the features you need. -==== Features -===== Time +[discrete] +=== Features + +[discrete] +==== Time - tick-hz-x: Configures the tick rate of `embassy-time`. Higher tick rate means higher precision, and higher CPU wakes. - defmt-timestamp-uptime: defmt log entries will display the uptime in seconds. ...more to come +[discrete] == memory.x This file outlines the flash/ram usage of your program. It is especially useful when using link:https://github.com/embassy-rs/nrf-softdevice[nrf-softdevice] on an nRF5x. @@ -68,6 +75,7 @@ MEMORY } ---- +[discrete] == rust-toolchain.toml This file configures the rust version and configuration to use. diff --git a/docs/modules/ROOT/pages/runtime.adoc b/docs/pages/runtime.adoc similarity index 100% rename from docs/modules/ROOT/pages/runtime.adoc rename to docs/pages/runtime.adoc diff --git a/docs/modules/ROOT/pages/sharing_peripherals.adoc b/docs/pages/sharing_peripherals.adoc similarity index 100% rename from docs/modules/ROOT/pages/sharing_peripherals.adoc rename to docs/pages/sharing_peripherals.adoc diff --git a/docs/modules/ROOT/pages/stm32.adoc b/docs/pages/stm32.adoc similarity index 100% rename from docs/modules/ROOT/pages/stm32.adoc rename to docs/pages/stm32.adoc diff --git a/docs/pages/system.adoc b/docs/pages/system.adoc new file mode 100644 index 000000000..985f92b18 --- /dev/null +++ b/docs/pages/system.adoc @@ -0,0 +1,13 @@ += System description + +This section describes different parts of Embassy in more detail. + +include::runtime.adoc[leveloffset = 2] +include::bootloader.adoc[leveloffset = 2] +include::time_keeping.adoc[leveloffset = 2] +include::hal.adoc[leveloffset = 2] +include::nrf.adoc[leveloffset = 2] +include::stm32.adoc[leveloffset = 2] +include::sharing_peripherals.adoc[leveloffset = 2] +include::developer.adoc[leveloffset = 2] +include::developer_stm32.adoc[leveloffset = 2] diff --git a/docs/modules/ROOT/pages/time_keeping.adoc b/docs/pages/time_keeping.adoc similarity index 100% rename from docs/modules/ROOT/pages/time_keeping.adoc rename to docs/pages/time_keeping.adoc From 2991099daa5b1cfbc7b67f358497ec4821c71a53 Mon Sep 17 00:00:00 2001 From: Ulf Lilleengen Date: Sat, 18 May 2024 10:22:33 +0200 Subject: [PATCH 348/581] move images and add makefile --- docs/Makefile | 8 ++++++++ docs/README.md | 4 ++-- .../ROOT => }/images/bootloader_flash.png | Bin .../ROOT => }/images/embassy_executor.drawio | 0 .../ROOT => }/images/embassy_executor.png | Bin .../ROOT => }/images/embassy_irq.drawio | 0 .../{modules/ROOT => }/images/embassy_irq.png | Bin docs/index.adoc | 1 + docs/modules/ROOT/nav.adoc | 19 ------------------ 9 files changed, 11 insertions(+), 21 deletions(-) create mode 100644 docs/Makefile rename docs/{modules/ROOT => }/images/bootloader_flash.png (100%) rename docs/{modules/ROOT => }/images/embassy_executor.drawio (100%) rename docs/{modules/ROOT => }/images/embassy_executor.png (100%) rename docs/{modules/ROOT => }/images/embassy_irq.drawio (100%) rename docs/{modules/ROOT => }/images/embassy_irq.png (100%) delete mode 100644 docs/modules/ROOT/nav.adoc diff --git a/docs/Makefile b/docs/Makefile new file mode 100644 index 000000000..eadcf2370 --- /dev/null +++ b/docs/Makefile @@ -0,0 +1,8 @@ +all: + asciidoctor -d book -D thebook/ index.adoc + cp -r images thebook + +clean: + rm -rf thebook + +.PHONY: all clean diff --git a/docs/README.md b/docs/README.md index 8b9a3c48d..94ebd7a05 100644 --- a/docs/README.md +++ b/docs/README.md @@ -1,9 +1,9 @@ # embassy docs -The documentation hosted at [https://embassy.dev/book](https://embassy.dev/book). Building the documentation requires the [asciidoctor](https://asciidoctor.org/) tool, and can be built like this: +The documentation hosted at [https://embassy.dev/book](https://embassy.dev/book). Building the documentation requires the [asciidoctor](https://asciidoctor.org/) tool, and can built running `make` in this folder: ``` -asciidoctor -d book -D thebook/ index.adoc +make ``` Then open the generated file `thebook/index.html`. diff --git a/docs/modules/ROOT/images/bootloader_flash.png b/docs/images/bootloader_flash.png similarity index 100% rename from docs/modules/ROOT/images/bootloader_flash.png rename to docs/images/bootloader_flash.png diff --git a/docs/modules/ROOT/images/embassy_executor.drawio b/docs/images/embassy_executor.drawio similarity index 100% rename from docs/modules/ROOT/images/embassy_executor.drawio rename to docs/images/embassy_executor.drawio diff --git a/docs/modules/ROOT/images/embassy_executor.png b/docs/images/embassy_executor.png similarity index 100% rename from docs/modules/ROOT/images/embassy_executor.png rename to docs/images/embassy_executor.png diff --git a/docs/modules/ROOT/images/embassy_irq.drawio b/docs/images/embassy_irq.drawio similarity index 100% rename from docs/modules/ROOT/images/embassy_irq.drawio rename to docs/images/embassy_irq.drawio diff --git a/docs/modules/ROOT/images/embassy_irq.png b/docs/images/embassy_irq.png similarity index 100% rename from docs/modules/ROOT/images/embassy_irq.png rename to docs/images/embassy_irq.png diff --git a/docs/index.adoc b/docs/index.adoc index f0fa6f2b7..9c6150196 100644 --- a/docs/index.adoc +++ b/docs/index.adoc @@ -4,6 +4,7 @@ :toc: :toc-placement: left :toclevels: 2 +:imagesdir: images # Embassy Book diff --git a/docs/modules/ROOT/nav.adoc b/docs/modules/ROOT/nav.adoc deleted file mode 100644 index 44b0eddb9..000000000 --- a/docs/modules/ROOT/nav.adoc +++ /dev/null @@ -1,19 +0,0 @@ -* xref:getting_started.adoc[Getting started] -** xref:basic_application.adoc[Basic application] -** xref:project_structure.adoc[Project Structure] -** xref:new_project.adoc[Starting a new Embassy project] -** xref:best_practices.adoc[Best Practices] -* xref:runtime.adoc[Executor] -* xref::time_keeping.adoc[Time-keeping] -* xref:sharing_peripherals.adoc[Sharing peripherals] -* xref:hal.adoc[HAL] -** xref:layer_by_layer.adoc[Anatomy of an async HAL] -** xref:nrf.adoc[nRF] -** xref:stm32.adoc[STM32] -* xref:bootloader.adoc[Bootloader] - -* xref:examples.adoc[Examples] -* xref:developer.adoc[Developer Docs] -** xref:developer_stm32.adoc[Developer Docs: STM32] -* xref:embassy_in_the_wild.adoc[Embassy in the wild] -* xref:faq.adoc[Frequently Asked Questions] From 797f5c1e5e45e35b25721492950ae0247632d0d4 Mon Sep 17 00:00:00 2001 From: Ulf Lilleengen Date: Sat, 18 May 2024 15:02:49 +0200 Subject: [PATCH 349/581] add book ci script --- .github/ci/book.sh | 17 +++++++++++++++++ docs/Makefile | 6 +++--- docs/pages/embassy_in_the_wild.adoc | 4 ++-- 3 files changed, 22 insertions(+), 5 deletions(-) create mode 100644 .github/ci/book.sh diff --git a/.github/ci/book.sh b/.github/ci/book.sh new file mode 100644 index 000000000..285cdc8fa --- /dev/null +++ b/.github/ci/book.sh @@ -0,0 +1,17 @@ +#!/bin/bash +## on push branch=main + +set -euxo pipefail + +make -C docs + +export KUBECONFIG=/ci/secrets/kubeconfig.yml +POD=$(kubectl -n embassy get po -l app=website -o jsonpath={.items[0].metadata.name}) + +mkdir -p build +mv docs/book build/book +tar -C build -cf book.tar book +kubectl exec $POD -- mkdir -p /usr/share/nginx/html +kubectl cp book.tar $POD:/usr/share/nginx/html/ +kubectl exec $POD -- find /usr/share/nginx/html +kubectl exec $POD -- tar -C /usr/share/nginx/html -xvf /usr/share/nginx/html/book.tar diff --git a/docs/Makefile b/docs/Makefile index eadcf2370..834802d3b 100644 --- a/docs/Makefile +++ b/docs/Makefile @@ -1,8 +1,8 @@ all: - asciidoctor -d book -D thebook/ index.adoc - cp -r images thebook + asciidoctor -d book -D book/ index.adoc + cp -r images book clean: - rm -rf thebook + rm -rf book .PHONY: all clean diff --git a/docs/pages/embassy_in_the_wild.adoc b/docs/pages/embassy_in_the_wild.adoc index a7d63f990..93ff58146 100644 --- a/docs/pages/embassy_in_the_wild.adoc +++ b/docs/pages/embassy_in_the_wild.adoc @@ -10,8 +10,8 @@ Here are known examples of real-world projects which make use of Embassy. Feel f * link:https://github.com/card-io-ecg/card-io-fw[Card/IO firmware] - firmware for an open source ECG device ** Targets the ESP32-S3 or ESP32-C6 MCU * The link:https://github.com/lora-rs/lora-rs[lora-rs] project includes link:https://github.com/lora-rs/lora-rs/tree/main/examples/stm32l0/src/bin[various standalone examples] for NRF52840, RP2040, STM32L0 and STM32WL -** link:https://github.com/matoushybl/air-force-one[Air force one: A simple air quality monitoring system] -*** Targets nRF52 and uses nrf-softdevice +* link:https://github.com/matoushybl/air-force-one[Air force one: A simple air quality monitoring system] +** Targets nRF52 and uses nrf-softdevice * link:https://github.com/schmettow/ylab-edge-go[YLab Edge Go] and link:https://github.com/schmettow/ylab-edge-pro[YLab Edge Pro] projects develop firmware (RP2040, STM32) for capturing physiological data in behavioural science research. Included so far are: From d90e35980f0963387aeb80bbb974418a3b516ae7 Mon Sep 17 00:00:00 2001 From: Ulf Lilleengen Date: Sat, 18 May 2024 15:04:24 +0200 Subject: [PATCH 350/581] update example path --- ci.sh | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/ci.sh b/ci.sh index 6fff1e68c..8e37b6178 100755 --- a/ci.sh +++ b/ci.sh @@ -171,11 +171,11 @@ cargo batch \ --- build --release --manifest-path embassy-boot-nrf/Cargo.toml --target thumbv8m.main-none-eabihf --features embassy-nrf/nrf9160-ns \ --- build --release --manifest-path embassy-boot-rp/Cargo.toml --target thumbv6m-none-eabi \ --- build --release --manifest-path embassy-boot-stm32/Cargo.toml --target thumbv7em-none-eabi --features embassy-stm32/stm32wl55jc-cm4 \ - --- build --release --manifest-path docs/modules/ROOT/examples/basic/Cargo.toml --target thumbv7em-none-eabi \ - --- build --release --manifest-path docs/modules/ROOT/examples/layer-by-layer/blinky-pac/Cargo.toml --target thumbv7em-none-eabi \ - --- build --release --manifest-path docs/modules/ROOT/examples/layer-by-layer/blinky-hal/Cargo.toml --target thumbv7em-none-eabi \ - --- build --release --manifest-path docs/modules/ROOT/examples/layer-by-layer/blinky-irq/Cargo.toml --target thumbv7em-none-eabi \ - --- build --release --manifest-path docs/modules/ROOT/examples/layer-by-layer/blinky-async/Cargo.toml --target thumbv7em-none-eabi \ + --- build --release --manifest-path docs/examples/basic/Cargo.toml --target thumbv7em-none-eabi \ + --- build --release --manifest-path docs/examples/layer-by-layer/blinky-pac/Cargo.toml --target thumbv7em-none-eabi \ + --- build --release --manifest-path docs/examples/layer-by-layer/blinky-hal/Cargo.toml --target thumbv7em-none-eabi \ + --- build --release --manifest-path docs/examples/layer-by-layer/blinky-irq/Cargo.toml --target thumbv7em-none-eabi \ + --- build --release --manifest-path docs/examples/layer-by-layer/blinky-async/Cargo.toml --target thumbv7em-none-eabi \ --- build --release --manifest-path examples/nrf52840/Cargo.toml --target thumbv7em-none-eabi --out-dir out/examples/nrf52840 \ --- build --release --manifest-path examples/nrf5340/Cargo.toml --target thumbv8m.main-none-eabihf --out-dir out/examples/nrf5340 \ --- build --release --manifest-path examples/nrf9160/Cargo.toml --target thumbv8m.main-none-eabihf --out-dir out/examples/nrf9160 \ From 38946114d8b87e1ef867d1ef5830f5e781195921 Mon Sep 17 00:00:00 2001 From: Ulf Lilleengen Date: Sat, 18 May 2024 15:10:13 +0200 Subject: [PATCH 351/581] update links --- docs/pages/basic_application.adoc | 2 +- docs/pages/embassy_in_the_wild.adoc | 2 +- docs/pages/faq.adoc | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) diff --git a/docs/pages/basic_application.adoc b/docs/pages/basic_application.adoc index aa3ea2d1b..781598aff 100644 --- a/docs/pages/basic_application.adoc +++ b/docs/pages/basic_application.adoc @@ -4,7 +4,7 @@ So you've got one of the xref:examples.adoc[examples] running, but what now? Let == Main -The full example can be found link:https://github.com/embassy-rs/embassy/tree/master/docs/modules/ROOT/examples/basic[here]. +The full example can be found link:https://github.com/embassy-rs/embassy/tree/master/docs/examples/basic[here]. NOTE: If you’re using VS Code and rust-analyzer to view and edit the examples, you may need to make some changes to `.vscode/settings.json` to tell it which project we’re working on. Follow the instructions commented in that file to get rust-analyzer working correctly. diff --git a/docs/pages/embassy_in_the_wild.adoc b/docs/pages/embassy_in_the_wild.adoc index 93ff58146..76b1169bd 100644 --- a/docs/pages/embassy_in_the_wild.adoc +++ b/docs/pages/embassy_in_the_wild.adoc @@ -1,6 +1,6 @@ = Embassy in the wild! -Here are known examples of real-world projects which make use of Embassy. Feel free to link:https://github.com/embassy-rs/embassy/blob/main/docs/modules/ROOT/pages/embassy_in_the_wild.adoc[add more]! +Here are known examples of real-world projects which make use of Embassy. Feel free to link:https://github.com/embassy-rs/embassy/blob/main/docs/pages/embassy_in_the_wild.adoc[add more]! * link:https://github.com/haobogu/rmk/[RMK: A feature-rich Rust keyboard firmware] ** RMK has built-in layer support, wireless(BLE) support, real-time key editing support using vial, and more! diff --git a/docs/pages/faq.adoc b/docs/pages/faq.adoc index 8b1f22f6e..5f50951d8 100644 --- a/docs/pages/faq.adoc +++ b/docs/pages/faq.adoc @@ -2,7 +2,7 @@ These are a list of unsorted, commonly asked questions and answers. -Please feel free to add items to link:https://github.com/embassy-rs/embassy/edit/main/docs/modules/ROOT/pages/faq.adoc[this page], especially if someone in the chat answered a question for you! +Please feel free to add items to link:https://github.com/embassy-rs/embassy/edit/main/docs/pages/faq.adoc[this page], especially if someone in the chat answered a question for you! == How to deploy to RP2040 without a debugging probe. From 06218f9536ef7e64e2e072f9578592d27028f99d Mon Sep 17 00:00:00 2001 From: Ulf Lilleengen Date: Sat, 18 May 2024 15:50:17 +0200 Subject: [PATCH 352/581] fix internal refs --- docs/pages/basic_application.adoc | 2 +- docs/pages/getting_started.adoc | 8 ++++---- 2 files changed, 5 insertions(+), 5 deletions(-) diff --git a/docs/pages/basic_application.adoc b/docs/pages/basic_application.adoc index 781598aff..7b4ebda4f 100644 --- a/docs/pages/basic_application.adoc +++ b/docs/pages/basic_application.adoc @@ -1,6 +1,6 @@ = A basic Embassy application -So you've got one of the xref:examples.adoc[examples] running, but what now? Let's go through a simple Embassy application for the nRF52 DK to understand it better. +So you've got one of the examples running, but what now? Let's go through a simple Embassy application for the nRF52 DK to understand it better. == Main diff --git a/docs/pages/getting_started.adoc b/docs/pages/getting_started.adoc index 73cb5530d..465059922 100644 --- a/docs/pages/getting_started.adoc +++ b/docs/pages/getting_started.adoc @@ -137,7 +137,7 @@ If you’re still having problems, check the link:https://embassy.dev/book/dev/f Congratulations, you have your first Embassy application running! Here are some suggestions for where to go from here: -* Read more about the xref:runtime.adoc[executor]. -* Read more about the xref:hal.adoc[HAL]. -* Start xref:basic_application.adoc[writing your application]. -* Learn how to xref:new_project.adoc[start a new embassy project by adapting an example]. +* Read more about the xref:_embassy_executor[executor]. +* Read more about the xref:_hardware_abstraction_layer_hal[HAL]. +* Start xref:_a_basic_embassy_application[writing your application]. +* Learn how to xref:_starting_a_new_project[start a new embassy project by adapting an example]. From bb9c687a39c0675bd622f612a645b16229cb9024 Mon Sep 17 00:00:00 2001 From: Ulf Lilleengen Date: Mon, 20 May 2024 20:20:48 +0200 Subject: [PATCH 353/581] update crate paths --- docs/examples/basic/Cargo.toml | 6 +++--- docs/examples/layer-by-layer/Cargo.toml | 4 ++-- 2 files changed, 5 insertions(+), 5 deletions(-) diff --git a/docs/examples/basic/Cargo.toml b/docs/examples/basic/Cargo.toml index 2c282145d..d86d4a809 100644 --- a/docs/examples/basic/Cargo.toml +++ b/docs/examples/basic/Cargo.toml @@ -6,9 +6,9 @@ version = "0.1.0" license = "MIT OR Apache-2.0" [dependencies] -embassy-executor = { version = "0.5.0", path = "../../../../../embassy-executor", features = ["defmt", "integrated-timers", "arch-cortex-m", "executor-thread"] } -embassy-time = { version = "0.3.0", path = "../../../../../embassy-time", features = ["defmt"] } -embassy-nrf = { version = "0.1.0", path = "../../../../../embassy-nrf", features = ["defmt", "nrf52840", "time-driver-rtc1", "gpiote"] } +embassy-executor = { version = "0.5.0", path = "../../../embassy-executor", features = ["defmt", "integrated-timers", "arch-cortex-m", "executor-thread"] } +embassy-time = { version = "0.3.0", path = "../../../embassy-time", features = ["defmt"] } +embassy-nrf = { version = "0.1.0", path = "../../../embassy-nrf", features = ["defmt", "nrf52840", "time-driver-rtc1", "gpiote"] } defmt = "0.3" defmt-rtt = "0.3" diff --git a/docs/examples/layer-by-layer/Cargo.toml b/docs/examples/layer-by-layer/Cargo.toml index 943249a17..0f233eae5 100644 --- a/docs/examples/layer-by-layer/Cargo.toml +++ b/docs/examples/layer-by-layer/Cargo.toml @@ -8,8 +8,8 @@ members = [ ] [patch.crates-io] -embassy-executor = { path = "../../../../../embassy-executor" } -embassy-stm32 = { path = "../../../../../embassy-stm32" } +embassy-executor = { path = "../../../embassy-executor" } +embassy-stm32 = { path = "../../../embassy-stm32" } [profile.release] codegen-units = 1 From cab46a7a8c54fdd106f8876f986c3a4e5f56d2ff Mon Sep 17 00:00:00 2001 From: Ulf Lilleengen Date: Tue, 21 May 2024 10:21:45 +0200 Subject: [PATCH 354/581] update script permission --- .github/ci/book.sh | 0 1 file changed, 0 insertions(+), 0 deletions(-) mode change 100644 => 100755 .github/ci/book.sh diff --git a/.github/ci/book.sh b/.github/ci/book.sh old mode 100644 new mode 100755 From 9d6746e650381c2b6624c2018e54e6aa4b2ba5e4 Mon Sep 17 00:00:00 2001 From: Matt Ickstadt Date: Tue, 21 May 2024 14:23:32 -0500 Subject: [PATCH 355/581] usb: add transceiver delay option --- embassy-usb-synopsys-otg/src/lib.rs | 16 +++++++++++++++- 1 file changed, 15 insertions(+), 1 deletion(-) diff --git a/embassy-usb-synopsys-otg/src/lib.rs b/embassy-usb-synopsys-otg/src/lib.rs index 34dcd1497..b90e059f6 100644 --- a/embassy-usb-synopsys-otg/src/lib.rs +++ b/embassy-usb-synopsys-otg/src/lib.rs @@ -293,11 +293,22 @@ pub struct Config { /// If you set this to true, you must connect VBUS to PA9 for FS, PB13 for HS, possibly with a /// voltage divider. See ST application note AN4879 and the reference manual for more details. pub vbus_detection: bool, + + /// Enable transceiver delay. + /// + /// Some ULPI PHYs like the Microchip USB334x series require a delay between the ULPI register write that initiates + /// the HS Chirp and the subsequent transmit command, otherwise the HS Chirp does not get executed and the deivce + /// enumerates in FS mode. Some USB Link IP like those in the STM32H7 series support adding this delay to work with + /// the affected PHYs. + pub xcvrdly: bool, } impl Default for Config { fn default() -> Self { - Self { vbus_detection: false } + Self { + vbus_detection: false, + xcvrdly: false, + } } } @@ -581,6 +592,9 @@ impl<'d, const MAX_EP_COUNT: usize> Bus<'d, MAX_EP_COUNT> { r.dcfg().write(|w| { w.set_pfivl(vals::Pfivl::FRAME_INTERVAL_80); w.set_dspd(phy_type.to_dspd()); + if self.config.xcvrdly { + w.set_xcvrdly(true); + } }); // Unmask transfer complete EP interrupt From 4e42eaef7c423f7f15af38991d4444141a8af1c2 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Jo=C3=ABl=20Schulz-Ansres?= Date: Tue, 21 May 2024 12:17:51 +0200 Subject: [PATCH 356/581] Add dsi example --- ci.sh | 1 + examples/stm32f4/Cargo.toml | 2 +- examples/stm32f469/.cargo/config.toml | 9 + examples/stm32f469/Cargo.toml | 22 + examples/stm32f469/build.rs | 5 + examples/stm32f469/src/bin/dsi_bsp.rs | 694 ++++++++++++++++++++++++++ examples/stm32f469/src/bin/ferris.bin | 70 +++ 7 files changed, 802 insertions(+), 1 deletion(-) create mode 100644 examples/stm32f469/.cargo/config.toml create mode 100644 examples/stm32f469/Cargo.toml create mode 100644 examples/stm32f469/build.rs create mode 100644 examples/stm32f469/src/bin/dsi_bsp.rs create mode 100644 examples/stm32f469/src/bin/ferris.bin diff --git a/ci.sh b/ci.sh index 8e37b6178..0b5308153 100755 --- a/ci.sh +++ b/ci.sh @@ -187,6 +187,7 @@ cargo batch \ --- build --release --manifest-path examples/stm32f3/Cargo.toml --target thumbv7em-none-eabi --out-dir out/examples/stm32f3 \ --- build --release --manifest-path examples/stm32f334/Cargo.toml --target thumbv7em-none-eabi --out-dir out/examples/stm32f334 \ --- build --release --manifest-path examples/stm32f4/Cargo.toml --target thumbv7em-none-eabi --out-dir out/examples/stm32f4 \ + --- build --release --manifest-path examples/stm32f469/Cargo.toml --target thumbv7em-none-eabi --out-dir out/examples/stm32f469 \ --- build --release --manifest-path examples/stm32f7/Cargo.toml --target thumbv7em-none-eabi --out-dir out/examples/stm32f7 \ --- build --release --manifest-path examples/stm32c0/Cargo.toml --target thumbv6m-none-eabi --out-dir out/examples/stm32c0 \ --- build --release --manifest-path examples/stm32g0/Cargo.toml --target thumbv6m-none-eabi --out-dir out/examples/stm32g0 \ diff --git a/examples/stm32f4/Cargo.toml b/examples/stm32f4/Cargo.toml index 64ac50818..1eb1ae6db 100644 --- a/examples/stm32f4/Cargo.toml +++ b/examples/stm32f4/Cargo.toml @@ -6,7 +6,7 @@ license = "MIT OR Apache-2.0" [dependencies] # Change stm32f429zi to your chip name, if necessary. -embassy-stm32 = { version = "0.1.0", path = "../../embassy-stm32", features = ["defmt", "stm32f429zi", "unstable-pac", "memory-x", "time-driver-any", "exti", "chrono"] } +embassy-stm32 = { version = "0.1.0", path = "../../embassy-stm32", features = ["defmt", "stm32f429zi", "unstable-pac", "memory-x", "time-driver-any", "exti", "chrono"] } embassy-sync = { version = "0.5.0", path = "../../embassy-sync", features = ["defmt"] } embassy-executor = { version = "0.5.0", path = "../../embassy-executor", features = ["task-arena-size-32768", "arch-cortex-m", "executor-thread", "executor-interrupt", "defmt", "integrated-timers"] } embassy-time = { version = "0.3.0", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime", "tick-hz-32_768"] } diff --git a/examples/stm32f469/.cargo/config.toml b/examples/stm32f469/.cargo/config.toml new file mode 100644 index 000000000..05250954f --- /dev/null +++ b/examples/stm32f469/.cargo/config.toml @@ -0,0 +1,9 @@ +[target.'cfg(all(target_arch = "arm", target_os = "none"))'] +# replace STM32F429ZITx with your chip as listed in `probe-rs chip list` +runner = "probe-rs run --chip STM32F469NIHx" + +[build] +target = "thumbv7em-none-eabi" + +[env] +DEFMT_LOG = "trace" diff --git a/examples/stm32f469/Cargo.toml b/examples/stm32f469/Cargo.toml new file mode 100644 index 000000000..7718a46c1 --- /dev/null +++ b/examples/stm32f469/Cargo.toml @@ -0,0 +1,22 @@ +[package] +edition = "2021" +name = "embassy-stm32f469-examples" +version = "0.1.0" +license = "MIT OR Apache-2.0" + +[dependencies] +# Specific examples only for stm32f469 +embassy-stm32 = { version = "0.1.0", path = "../../embassy-stm32", features = ["defmt", "stm32f469ni", "unstable-pac", "memory-x", "time-driver-any", "exti", "chrono"] } +embassy-executor = { version = "0.5.0", path = "../../embassy-executor", features = ["task-arena-size-32768", "arch-cortex-m", "executor-thread", "executor-interrupt", "defmt", "integrated-timers"] } +embassy-time = { version = "0.3.0", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime", "tick-hz-32_768"] } + +defmt = "0.3" +defmt-rtt = "0.4" + +cortex-m = { version = "0.7.6", features = ["inline-asm", "critical-section-single-core"] } +cortex-m-rt = "0.7.0" +embedded-hal = "1.0.0" +panic-probe = { version = "0.3", features = ["print-defmt"] } + +[profile.release] +debug = 2 diff --git a/examples/stm32f469/build.rs b/examples/stm32f469/build.rs new file mode 100644 index 000000000..8cd32d7ed --- /dev/null +++ b/examples/stm32f469/build.rs @@ -0,0 +1,5 @@ +fn main() { + println!("cargo:rustc-link-arg-bins=--nmagic"); + println!("cargo:rustc-link-arg-bins=-Tlink.x"); + println!("cargo:rustc-link-arg-bins=-Tdefmt.x"); +} diff --git a/examples/stm32f469/src/bin/dsi_bsp.rs b/examples/stm32f469/src/bin/dsi_bsp.rs new file mode 100644 index 000000000..e4e9e9c01 --- /dev/null +++ b/examples/stm32f469/src/bin/dsi_bsp.rs @@ -0,0 +1,694 @@ +#![no_std] +#![no_main] + +use defmt::*; +use embassy_executor::Spawner; +use embassy_stm32::dsihost::{blocking_delay_ms, DsiHost, PacketType}; +use embassy_stm32::gpio::{Level, Output, Speed}; +use embassy_stm32::ltdc::Ltdc; +use embassy_stm32::pac::dsihost::regs::{Ier0, Ier1}; +use embassy_stm32::pac::ltdc::vals::{Bf1, Bf2, Depol, Hspol, Imr, Pcpol, Pf, Vspol}; +use embassy_stm32::pac::{DSIHOST, LTDC}; +use embassy_stm32::rcc::{ + AHBPrescaler, APBPrescaler, Hse, HseMode, Pll, PllMul, PllPDiv, PllPreDiv, PllQDiv, PllRDiv, PllSource, Sysclk, +}; +use embassy_stm32::time::mhz; +use embassy_time::Timer; +use {defmt_rtt as _, panic_probe as _}; + +enum _Orientation { + Landscape, + Portrait, +} + +const _LCD_ORIENTATION: _Orientation = _Orientation::Landscape; +const LCD_X_SIZE: u16 = 800; +const LCD_Y_SIZE: u16 = 480; + +static FERRIS_IMAGE: &[u8; 1536000] = include_bytes!("ferris.bin"); + +// This example allows to display an image on the STM32F469NI-DISCO boards +// with the Revision C, that is at least the boards marked DK32F469I$AU1. +// These boards have the NT35510 display driver. This example does not work +// for the older revisions with OTM8009A, though there are lots of C-examples +// available online where the correct config for the OTM8009A could be gotten from. +#[embassy_executor::main] +async fn main(_spawner: Spawner) { + let mut config = embassy_stm32::Config::default(); + config.rcc.sys = Sysclk::PLL1_P; + config.rcc.ahb_pre = AHBPrescaler::DIV1; + config.rcc.apb1_pre = APBPrescaler::DIV4; + config.rcc.apb2_pre = APBPrescaler::DIV2; + + // HSE is on and ready + config.rcc.hse = Some(Hse { + freq: mhz(8), + mode: HseMode::Oscillator, + }); + config.rcc.pll_src = PllSource::HSE; + + config.rcc.pll = Some(Pll { + prediv: PllPreDiv::DIV8, // PLLM + mul: PllMul::MUL360, // PLLN + divp: Some(PllPDiv::DIV2), + divq: Some(PllQDiv::DIV7), // was DIV4, but STM BSP example uses 7 + divr: Some(PllRDiv::DIV6), + }); + + // This seems to be working, the values in the RCC.PLLSAICFGR are correct according to the debugger. Also on and ready according to CR + config.rcc.pllsai = Some(Pll { + prediv: PllPreDiv::DIV8, // Actually ignored + mul: PllMul::MUL384, // PLLN + divp: None, // PLLP + divq: None, // PLLQ + divr: Some(PllRDiv::DIV7), // PLLR (Sai actually has special clockdiv register) + }); + + let p = embassy_stm32::init(config); + info!("Starting..."); + + let mut led = Output::new(p.PG6, Level::High, Speed::Low); + + // According to UM for the discovery kit, PH7 is an active-low reset for the LCD and touchsensor + let mut reset = Output::new(p.PH7, Level::Low, Speed::High); + + // CubeMX example waits 20 ms before de-asserting reset + embassy_time::block_for(embassy_time::Duration::from_millis(20)); + + // Disable the reset signal and wait 140ms as in the Linux driver (CubeMX waits only 20) + reset.set_high(); + embassy_time::block_for(embassy_time::Duration::from_millis(140)); + + let mut ltdc = Ltdc::new(p.LTDC); + let mut dsi = DsiHost::new(p.DSIHOST, p.PJ2); + let version = dsi.get_version(); + defmt::warn!("en: {:x}", version); + + // Disable the DSI wrapper + dsi.disable_wrapper_dsi(); + + // Disable the DSI host + dsi.disable(); + + // D-PHY clock and digital disable + DSIHOST.pctlr().modify(|w| { + w.set_cke(false); + w.set_den(false) + }); + + // Turn off the DSI PLL + DSIHOST.wrpcr().modify(|w| w.set_pllen(false)); + + // Disable the regulator + DSIHOST.wrpcr().write(|w| w.set_regen(false)); + + // Enable regulator + info!("DSIHOST: enabling regulator"); + DSIHOST.wrpcr().write(|w| w.set_regen(true)); + + for _ in 1..1000 { + // The regulator status (ready or not) can be monitored with the RRS flag in the DSI_WISR register. + // Once it is set, we stop waiting. + if DSIHOST.wisr().read().rrs() { + info!("DSIHOST Regulator ready"); + break; + } + embassy_time::block_for(embassy_time::Duration::from_millis(1)); + } + + if !DSIHOST.wisr().read().rrs() { + defmt::panic!("DSIHOST: enabling regulator FAILED"); + } + + // Set up PLL and enable it + DSIHOST.wrpcr().modify(|w| { + w.set_pllen(true); + w.set_ndiv(125); // PLL loop division factor set to 125 + w.set_idf(2); // PLL input divided by 2 + w.set_odf(0); // PLL output divided by 1 + }); + + /* 500 MHz / 8 = 62.5 MHz = 62500 kHz */ + const LANE_BYTE_CLK_K_HZ: u16 = 62500; // https://github.com/STMicroelectronics/32f469idiscovery-bsp/blob/ec051de2bff3e1b73a9ccd49c9b85abf7320add9/stm32469i_discovery_lcd.c#L224C21-L224C26 + + const _LCD_CLOCK: u16 = 27429; // https://github.com/STMicroelectronics/32f469idiscovery-bsp/blob/ec051de2bff3e1b73a9ccd49c9b85abf7320add9/stm32469i_discovery_lcd.c#L183 + + /* TX_ESCAPE_CKDIV = f(LaneByteClk)/15.62 = 4 */ + const TX_ESCAPE_CKDIV: u8 = (LANE_BYTE_CLK_K_HZ / 15620) as u8; // https://github.com/STMicroelectronics/32f469idiscovery-bsp/blob/ec051de2bff3e1b73a9ccd49c9b85abf7320add9/stm32469i_discovery_lcd.c#L230 + + for _ in 1..1000 { + embassy_time::block_for(embassy_time::Duration::from_millis(1)); + // The PLL status (lock or unlock) can be monitored with the PLLLS flag in the DSI_WISR register. + // Once it is set, we stop waiting. + if DSIHOST.wisr().read().pllls() { + info!("DSIHOST PLL locked"); + break; + } + } + + if !DSIHOST.wisr().read().pllls() { + defmt::panic!("DSIHOST: enabling PLL FAILED"); + } + + // Set the PHY parameters + + // D-PHY clock and digital enable + DSIHOST.pctlr().write(|w| { + w.set_cke(true); + w.set_den(true); + }); + + // Set Clock lane to high-speed mode and disable automatic clock lane control + DSIHOST.clcr().modify(|w| { + w.set_dpcc(true); + w.set_acr(false); + }); + + // Set number of active data lanes to two (lanes 0 and 1) + DSIHOST.pconfr().modify(|w| w.set_nl(1)); + + // Set the DSI clock parameters + + // Set the TX escape clock division factor to 4 + DSIHOST.ccr().modify(|w| w.set_txeckdiv(TX_ESCAPE_CKDIV)); + + // Calculate the bit period in high-speed mode in unit of 0.25 ns (UIX4) + // The equation is : UIX4 = IntegerPart( (1000/F_PHY_Mhz) * 4 ) + // Where : F_PHY_Mhz = (NDIV * HSE_Mhz) / (IDF * ODF) + // Set the bit period in high-speed mode + DSIHOST.wpcr0().modify(|w| w.set_uix4(8)); // 8 is set in the BSP example (confirmed with Debugger) + + // Disable all error interrupts and reset the Error Mask + DSIHOST.ier0().write_value(Ier0(0)); + DSIHOST.ier1().write_value(Ier1(0)); + + // Enable this to fix read timeout + DSIHOST.pcr().modify(|w| w.set_btae(true)); + + const DSI_PIXEL_FORMAT_RGB888: u8 = 0x05; + const _DSI_PIXEL_FORMAT_ARGB888: u8 = 0x00; + + const HACT: u16 = LCD_X_SIZE; + const VACT: u16 = LCD_Y_SIZE; + + const VSA: u16 = 120; + const VBP: u16 = 150; + const VFP: u16 = 150; + const HSA: u16 = 2; + const HBP: u16 = 34; + const HFP: u16 = 34; + + const VIRTUAL_CHANNEL_ID: u8 = 0; + + const COLOR_CODING: u8 = DSI_PIXEL_FORMAT_RGB888; + const VS_POLARITY: bool = false; // DSI_VSYNC_ACTIVE_HIGH == 0 + const HS_POLARITY: bool = false; // DSI_HSYNC_ACTIVE_HIGH == 0 + const DE_POLARITY: bool = false; // DSI_DATA_ENABLE_ACTIVE_HIGH == 0 + const MODE: u8 = 2; // DSI_VID_MODE_BURST; /* Mode Video burst ie : one LgP per line */ + const NULL_PACKET_SIZE: u16 = 0xFFF; + const NUMBER_OF_CHUNKS: u16 = 0; + const PACKET_SIZE: u16 = HACT; /* Value depending on display orientation choice portrait/landscape */ + const HORIZONTAL_SYNC_ACTIVE: u16 = 4; // ((HSA as u32 * LANE_BYTE_CLK_K_HZ as u32 ) / LCD_CLOCK as u32 ) as u16; + const HORIZONTAL_BACK_PORCH: u16 = 77; //((HBP as u32 * LANE_BYTE_CLK_K_HZ as u32 ) / LCD_CLOCK as u32) as u16; + const HORIZONTAL_LINE: u16 = 1982; //(((HACT + HSA + HBP + HFP) as u32 * LANE_BYTE_CLK_K_HZ as u32 ) / LCD_CLOCK as u32 ) as u16; /* Value depending on display orientation choice portrait/landscape */ + // FIXME: Make depend on orientation + const VERTICAL_SYNC_ACTIVE: u16 = VSA; + const VERTICAL_BACK_PORCH: u16 = VBP; + const VERTICAL_FRONT_PORCH: u16 = VFP; + const VERTICAL_ACTIVE: u16 = VACT; + const LP_COMMAND_ENABLE: bool = true; /* Enable sending commands in mode LP (Low Power) */ + + /* Largest packet size possible to transmit in LP mode in VSA, VBP, VFP regions */ + /* Only useful when sending LP packets is allowed while streaming is active in video mode */ + const LP_LARGEST_PACKET_SIZE: u8 = 16; + + /* Largest packet size possible to transmit in LP mode in HFP region during VACT period */ + /* Only useful when sending LP packets is allowed while streaming is active in video mode */ + const LPVACT_LARGEST_PACKET_SIZE: u8 = 0; + + const LPHORIZONTAL_FRONT_PORCH_ENABLE: bool = true; /* Allow sending LP commands during HFP period */ + const LPHORIZONTAL_BACK_PORCH_ENABLE: bool = true; /* Allow sending LP commands during HBP period */ + const LPVERTICAL_ACTIVE_ENABLE: bool = true; /* Allow sending LP commands during VACT period */ + const LPVERTICAL_FRONT_PORCH_ENABLE: bool = true; /* Allow sending LP commands during VFP period */ + const LPVERTICAL_BACK_PORCH_ENABLE: bool = true; /* Allow sending LP commands during VBP period */ + const LPVERTICAL_SYNC_ACTIVE_ENABLE: bool = true; /* Allow sending LP commands during VSync = VSA period */ + const FRAME_BTAACKNOWLEDGE_ENABLE: bool = false; /* Frame bus-turn-around acknowledge enable => false according to debugger */ + + /* Select video mode by resetting CMDM and DSIM bits */ + DSIHOST.mcr().modify(|w| w.set_cmdm(false)); + DSIHOST.wcfgr().modify(|w| w.set_dsim(false)); + + /* Configure the video mode transmission type */ + DSIHOST.vmcr().modify(|w| w.set_vmt(MODE)); + + /* Configure the video packet size */ + DSIHOST.vpcr().modify(|w| w.set_vpsize(PACKET_SIZE)); + + /* Set the chunks number to be transmitted through the DSI link */ + DSIHOST.vccr().modify(|w| w.set_numc(NUMBER_OF_CHUNKS)); + + /* Set the size of the null packet */ + DSIHOST.vnpcr().modify(|w| w.set_npsize(NULL_PACKET_SIZE)); + + /* Select the virtual channel for the LTDC interface traffic */ + DSIHOST.lvcidr().modify(|w| w.set_vcid(VIRTUAL_CHANNEL_ID)); + + /* Configure the polarity of control signals */ + DSIHOST.lpcr().modify(|w| { + w.set_dep(DE_POLARITY); + w.set_hsp(HS_POLARITY); + w.set_vsp(VS_POLARITY); + }); + + /* Select the color coding for the host */ + DSIHOST.lcolcr().modify(|w| w.set_colc(COLOR_CODING)); + + /* Select the color coding for the wrapper */ + DSIHOST.wcfgr().modify(|w| w.set_colmux(COLOR_CODING)); + + /* Set the Horizontal Synchronization Active (HSA) in lane byte clock cycles */ + DSIHOST.vhsacr().modify(|w| w.set_hsa(HORIZONTAL_SYNC_ACTIVE)); + + /* Set the Horizontal Back Porch (HBP) in lane byte clock cycles */ + DSIHOST.vhbpcr().modify(|w| w.set_hbp(HORIZONTAL_BACK_PORCH)); + + /* Set the total line time (HLINE=HSA+HBP+HACT+HFP) in lane byte clock cycles */ + DSIHOST.vlcr().modify(|w| w.set_hline(HORIZONTAL_LINE)); + + /* Set the Vertical Synchronization Active (VSA) */ + DSIHOST.vvsacr().modify(|w| w.set_vsa(VERTICAL_SYNC_ACTIVE)); + + /* Set the Vertical Back Porch (VBP)*/ + DSIHOST.vvbpcr().modify(|w| w.set_vbp(VERTICAL_BACK_PORCH)); + + /* Set the Vertical Front Porch (VFP)*/ + DSIHOST.vvfpcr().modify(|w| w.set_vfp(VERTICAL_FRONT_PORCH)); + + /* Set the Vertical Active period*/ + DSIHOST.vvacr().modify(|w| w.set_va(VERTICAL_ACTIVE)); + + /* Configure the command transmission mode */ + DSIHOST.vmcr().modify(|w| w.set_lpce(LP_COMMAND_ENABLE)); + + /* Low power largest packet size */ + DSIHOST.lpmcr().modify(|w| w.set_lpsize(LP_LARGEST_PACKET_SIZE)); + + /* Low power VACT largest packet size */ + DSIHOST.lpmcr().modify(|w| w.set_lpsize(LP_LARGEST_PACKET_SIZE)); + DSIHOST.lpmcr().modify(|w| w.set_vlpsize(LPVACT_LARGEST_PACKET_SIZE)); + + /* Enable LP transition in HFP period */ + DSIHOST.vmcr().modify(|w| w.set_lphfpe(LPHORIZONTAL_FRONT_PORCH_ENABLE)); + + /* Enable LP transition in HBP period */ + DSIHOST.vmcr().modify(|w| w.set_lphbpe(LPHORIZONTAL_BACK_PORCH_ENABLE)); + + /* Enable LP transition in VACT period */ + DSIHOST.vmcr().modify(|w| w.set_lpvae(LPVERTICAL_ACTIVE_ENABLE)); + + /* Enable LP transition in VFP period */ + DSIHOST.vmcr().modify(|w| w.set_lpvfpe(LPVERTICAL_FRONT_PORCH_ENABLE)); + + /* Enable LP transition in VBP period */ + DSIHOST.vmcr().modify(|w| w.set_lpvbpe(LPVERTICAL_BACK_PORCH_ENABLE)); + + /* Enable LP transition in vertical sync period */ + DSIHOST.vmcr().modify(|w| w.set_lpvsae(LPVERTICAL_SYNC_ACTIVE_ENABLE)); + + /* Enable the request for an acknowledge response at the end of a frame */ + DSIHOST.vmcr().modify(|w| w.set_fbtaae(FRAME_BTAACKNOWLEDGE_ENABLE)); + + /* Configure DSI PHY HS2LP and LP2HS timings */ + const CLOCK_LANE_HS2_LPTIME: u16 = 35; + const CLOCK_LANE_LP2_HSTIME: u16 = 35; + const DATA_LANE_HS2_LPTIME: u8 = 35; + const DATA_LANE_LP2_HSTIME: u8 = 35; + const DATA_LANE_MAX_READ_TIME: u16 = 0; + const STOP_WAIT_TIME: u8 = 10; + + const MAX_TIME: u16 = if CLOCK_LANE_HS2_LPTIME > CLOCK_LANE_LP2_HSTIME { + CLOCK_LANE_HS2_LPTIME + } else { + CLOCK_LANE_LP2_HSTIME + }; + + /* Clock lane timer configuration */ + + /* In Automatic Clock Lane control mode, the DSI Host can turn off the clock lane between two + High-Speed transmission. + To do so, the DSI Host calculates the time required for the clock lane to change from HighSpeed + to Low-Power and from Low-Power to High-Speed. + This timings are configured by the HS2LP_TIME and LP2HS_TIME in the DSI Host Clock Lane Timer Configuration + Register (DSI_CLTCR). + But the DSI Host is not calculating LP2HS_TIME + HS2LP_TIME but 2 x HS2LP_TIME. + + Workaround : Configure HS2LP_TIME and LP2HS_TIME with the same value being the max of HS2LP_TIME or LP2HS_TIME. + */ + + DSIHOST.cltcr().modify(|w| { + w.set_hs2lp_time(MAX_TIME); + w.set_lp2hs_time(MAX_TIME) + }); + + // Data lane timer configuration + DSIHOST.dltcr().modify(|w| { + w.set_hs2lp_time(DATA_LANE_HS2_LPTIME); + w.set_lp2hs_time(DATA_LANE_LP2_HSTIME); + w.set_mrd_time(DATA_LANE_MAX_READ_TIME); + }); + + // Configure the wait period to request HS transmission after a stop state + DSIHOST.pconfr().modify(|w| w.set_sw_time(STOP_WAIT_TIME)); + + const _PCPOLARITY: bool = false; // LTDC_PCPOLARITY_IPC == 0 + + const LTDC_DE_POLARITY: Depol = if !DE_POLARITY { + Depol::ACTIVELOW + } else { + Depol::ACTIVEHIGH + }; + const LTDC_VS_POLARITY: Vspol = if !VS_POLARITY { + Vspol::ACTIVEHIGH + } else { + Vspol::ACTIVELOW + }; + + const LTDC_HS_POLARITY: Hspol = if !HS_POLARITY { + Hspol::ACTIVEHIGH + } else { + Hspol::ACTIVELOW + }; + + /* Timing Configuration */ + const HORIZONTAL_SYNC: u16 = HSA - 1; + const VERTICAL_SYNC: u16 = VERTICAL_SYNC_ACTIVE - 1; + const ACCUMULATED_HBP: u16 = HSA + HBP - 1; + const ACCUMULATED_VBP: u16 = VERTICAL_SYNC_ACTIVE + VERTICAL_BACK_PORCH - 1; + const ACCUMULATED_ACTIVE_W: u16 = LCD_X_SIZE + HSA + HBP - 1; + const ACCUMULATED_ACTIVE_H: u16 = VERTICAL_SYNC_ACTIVE + VERTICAL_BACK_PORCH + VERTICAL_ACTIVE - 1; + const TOTAL_WIDTH: u16 = LCD_X_SIZE + HSA + HBP + HFP - 1; + const TOTAL_HEIGHT: u16 = VERTICAL_SYNC_ACTIVE + VERTICAL_BACK_PORCH + VERTICAL_ACTIVE + VERTICAL_FRONT_PORCH - 1; + + // DISABLE LTDC before making changes + ltdc.disable(); + + // Configure the HS, VS, DE and PC polarity + LTDC.gcr().modify(|w| { + w.set_hspol(LTDC_HS_POLARITY); + w.set_vspol(LTDC_VS_POLARITY); + w.set_depol(LTDC_DE_POLARITY); + w.set_pcpol(Pcpol::RISINGEDGE); + }); + + // Set Synchronization size + LTDC.sscr().modify(|w| { + w.set_hsw(HORIZONTAL_SYNC); + w.set_vsh(VERTICAL_SYNC) + }); + + // Set Accumulated Back porch + LTDC.bpcr().modify(|w| { + w.set_ahbp(ACCUMULATED_HBP); + w.set_avbp(ACCUMULATED_VBP); + }); + + // Set Accumulated Active Width + LTDC.awcr().modify(|w| { + w.set_aah(ACCUMULATED_ACTIVE_H); + w.set_aaw(ACCUMULATED_ACTIVE_W); + }); + + // Set Total Width + LTDC.twcr().modify(|w| { + w.set_totalh(TOTAL_HEIGHT); + w.set_totalw(TOTAL_WIDTH); + }); + + // Set the background color value + LTDC.bccr().modify(|w| { + w.set_bcred(0); + w.set_bcgreen(0); + w.set_bcblue(0) + }); + + // Enable the Transfer Error and FIFO underrun interrupts + LTDC.ier().modify(|w| { + w.set_terrie(true); + w.set_fuie(true); + }); + + // ENABLE LTDC after making changes + ltdc.enable(); + + dsi.enable(); + dsi.enable_wrapper_dsi(); + + // First, delay 120 ms (reason unknown, STM32 Cube Example does it) + blocking_delay_ms(120); + + // 1 to 26 + dsi.write_cmd(0, NT35510_WRITES_0[0], &NT35510_WRITES_0[1..]).unwrap(); + dsi.write_cmd(0, NT35510_WRITES_1[0], &NT35510_WRITES_1[1..]).unwrap(); + dsi.write_cmd(0, NT35510_WRITES_2[0], &NT35510_WRITES_2[1..]).unwrap(); + dsi.write_cmd(0, NT35510_WRITES_3[0], &NT35510_WRITES_3[1..]).unwrap(); + dsi.write_cmd(0, NT35510_WRITES_4[0], &NT35510_WRITES_4[1..]).unwrap(); + dsi.write_cmd(0, NT35510_WRITES_5[0], &NT35510_WRITES_5[1..]).unwrap(); + dsi.write_cmd(0, NT35510_WRITES_6[0], &NT35510_WRITES_6[1..]).unwrap(); + dsi.write_cmd(0, NT35510_WRITES_7[0], &NT35510_WRITES_7[1..]).unwrap(); + dsi.write_cmd(0, NT35510_WRITES_8[0], &NT35510_WRITES_8[1..]).unwrap(); + dsi.write_cmd(0, NT35510_WRITES_9[0], &NT35510_WRITES_9[1..]).unwrap(); + dsi.write_cmd(0, NT35510_WRITES_10[0], &NT35510_WRITES_10[1..]).unwrap(); + // 11 missing + dsi.write_cmd(0, NT35510_WRITES_12[0], &NT35510_WRITES_12[1..]).unwrap(); + dsi.write_cmd(0, NT35510_WRITES_13[0], &NT35510_WRITES_13[1..]).unwrap(); + dsi.write_cmd(0, NT35510_WRITES_14[0], &NT35510_WRITES_14[1..]).unwrap(); + dsi.write_cmd(0, NT35510_WRITES_15[0], &NT35510_WRITES_15[1..]).unwrap(); + dsi.write_cmd(0, NT35510_WRITES_16[0], &NT35510_WRITES_16[1..]).unwrap(); + dsi.write_cmd(0, NT35510_WRITES_17[0], &NT35510_WRITES_17[1..]).unwrap(); + dsi.write_cmd(0, NT35510_WRITES_18[0], &NT35510_WRITES_18[1..]).unwrap(); + dsi.write_cmd(0, NT35510_WRITES_19[0], &NT35510_WRITES_19[1..]).unwrap(); + dsi.write_cmd(0, NT35510_WRITES_20[0], &NT35510_WRITES_20[1..]).unwrap(); + dsi.write_cmd(0, NT35510_WRITES_21[0], &NT35510_WRITES_21[1..]).unwrap(); + dsi.write_cmd(0, NT35510_WRITES_22[0], &NT35510_WRITES_22[1..]).unwrap(); + dsi.write_cmd(0, NT35510_WRITES_23[0], &NT35510_WRITES_23[1..]).unwrap(); + dsi.write_cmd(0, NT35510_WRITES_24[0], &NT35510_WRITES_24[1..]).unwrap(); + + // Tear on + dsi.write_cmd(0, NT35510_WRITES_26[0], &NT35510_WRITES_26[1..]).unwrap(); + + // Set Pixel color format to RGB888 + dsi.write_cmd(0, NT35510_WRITES_37[0], &NT35510_WRITES_37[1..]).unwrap(); + + // Add a delay, otherwise MADCTL not taken + blocking_delay_ms(200); + + // Configure orientation as landscape + dsi.write_cmd(0, NT35510_MADCTL_LANDSCAPE[0], &NT35510_MADCTL_LANDSCAPE[1..]) + .unwrap(); + dsi.write_cmd(0, NT35510_CASET_LANDSCAPE[0], &NT35510_CASET_LANDSCAPE[1..]) + .unwrap(); + dsi.write_cmd(0, NT35510_RASET_LANDSCAPE[0], &NT35510_RASET_LANDSCAPE[1..]) + .unwrap(); + + // Sleep out + dsi.write_cmd(0, NT35510_WRITES_27[0], &NT35510_WRITES_27[1..]).unwrap(); + + // Wait for sleep out exit + blocking_delay_ms(120); + + // Configure COLOR_CODING + dsi.write_cmd(0, NT35510_WRITES_37[0], &NT35510_WRITES_37[1..]).unwrap(); + + /* CABC : Content Adaptive Backlight Control section start >> */ + /* Note : defaut is 0 (lowest Brightness), 0xFF is highest Brightness, try 0x7F : intermediate value */ + dsi.write_cmd(0, NT35510_WRITES_31[0], &NT35510_WRITES_31[1..]).unwrap(); + /* defaut is 0, try 0x2C - Brightness Control Block, Display Dimming & BackLight on */ + dsi.write_cmd(0, NT35510_WRITES_32[0], &NT35510_WRITES_32[1..]).unwrap(); + /* defaut is 0, try 0x02 - image Content based Adaptive Brightness [Still Picture] */ + dsi.write_cmd(0, NT35510_WRITES_33[0], &NT35510_WRITES_33[1..]).unwrap(); + /* defaut is 0 (lowest Brightness), 0xFF is highest Brightness */ + dsi.write_cmd(0, NT35510_WRITES_34[0], &NT35510_WRITES_34[1..]).unwrap(); + /* CABC : Content Adaptive Backlight Control section end << */ + /* Display on */ + dsi.write_cmd(0, NT35510_WRITES_30[0], &NT35510_WRITES_30[1..]).unwrap(); + + /* Send Command GRAM memory write (no parameters) : this initiates frame write via other DSI commands sent by */ + /* DSI host from LTDC incoming pixels in video mode */ + dsi.write_cmd(0, NT35510_WRITES_35[0], &NT35510_WRITES_35[1..]).unwrap(); + + /* Initialize the LCD pixel width and pixel height */ + const WINDOW_X0: u16 = 0; + const WINDOW_X1: u16 = LCD_X_SIZE; // 480 for ferris + const WINDOW_Y0: u16 = 0; + const WINDOW_Y1: u16 = LCD_Y_SIZE; // 800 for ferris + const PIXEL_FORMAT: Pf = Pf::ARGB8888; + //const FBStartAdress: u16 = FB_Address; + const ALPHA: u8 = 255; + const ALPHA0: u8 = 0; + const BACKCOLOR_BLUE: u8 = 0; + const BACKCOLOR_GREEN: u8 = 0; + const BACKCOLOR_RED: u8 = 0; + const IMAGE_WIDTH: u16 = LCD_X_SIZE; // 480 for ferris + const IMAGE_HEIGHT: u16 = LCD_Y_SIZE; // 800 for ferris + + const PIXEL_SIZE: u8 = match PIXEL_FORMAT { + Pf::ARGB8888 => 4, + Pf::RGB888 => 3, + Pf::ARGB4444 | Pf::RGB565 | Pf::ARGB1555 | Pf::AL88 => 2, + _ => 1, + }; + + // Configure the horizontal start and stop position + LTDC.layer(0).whpcr().write(|w| { + w.set_whstpos(LTDC.bpcr().read().ahbp() + 1 + WINDOW_X0); + w.set_whsppos(LTDC.bpcr().read().ahbp() + WINDOW_X1); + }); + + // Configures the vertical start and stop position + LTDC.layer(0).wvpcr().write(|w| { + w.set_wvstpos(LTDC.bpcr().read().avbp() + 1 + WINDOW_Y0); + w.set_wvsppos(LTDC.bpcr().read().avbp() + WINDOW_Y1); + }); + + // Specify the pixel format + LTDC.layer(0).pfcr().write(|w| w.set_pf(PIXEL_FORMAT)); + + // Configures the default color values as zero + LTDC.layer(0).dccr().modify(|w| { + w.set_dcblue(BACKCOLOR_BLUE); + w.set_dcgreen(BACKCOLOR_GREEN); + w.set_dcred(BACKCOLOR_RED); + w.set_dcalpha(ALPHA0); + }); + + // Specifies the constant ALPHA value + LTDC.layer(0).cacr().write(|w| w.set_consta(ALPHA)); + + // Specifies the blending factors + LTDC.layer(0).bfcr().write(|w| { + w.set_bf1(Bf1::CONSTANT); + w.set_bf2(Bf2::CONSTANT); + }); + + // Configure the color frame buffer start address + let fb_start_address: u32 = &FERRIS_IMAGE[0] as *const _ as u32; + info!("Setting Framebuffer Start Address: {:010x}", fb_start_address); + LTDC.layer(0).cfbar().write(|w| w.set_cfbadd(fb_start_address)); + + // Configures the color frame buffer pitch in byte + LTDC.layer(0).cfblr().write(|w| { + w.set_cfbp(IMAGE_WIDTH * PIXEL_SIZE as u16); + w.set_cfbll(((WINDOW_X1 - WINDOW_X0) * PIXEL_SIZE as u16) + 3); + }); + + // Configures the frame buffer line number + LTDC.layer(0).cfblnr().write(|w| w.set_cfblnbr(IMAGE_HEIGHT)); + + // Enable LTDC_Layer by setting LEN bit + LTDC.layer(0).cr().modify(|w| w.set_len(true)); + + //LTDC->SRCR = LTDC_SRCR_IMR; + LTDC.srcr().modify(|w| w.set_imr(Imr::RELOAD)); + + blocking_delay_ms(5000); + + const READ_SIZE: u16 = 1; + let mut data = [1u8; READ_SIZE as usize]; + dsi.read(0, PacketType::DcsShortPktRead(0xDA), READ_SIZE, &mut data) + .unwrap(); + info!("Display ID1: {:#04x}", data); + + dsi.read(0, PacketType::DcsShortPktRead(0xDB), READ_SIZE, &mut data) + .unwrap(); + info!("Display ID2: {:#04x}", data); + + dsi.read(0, PacketType::DcsShortPktRead(0xDC), READ_SIZE, &mut data) + .unwrap(); + info!("Display ID3: {:#04x}", data); + + blocking_delay_ms(500); + + info!("Config done, start blinking LED"); + loop { + led.set_high(); + Timer::after_millis(1000).await; + + // Increase screen brightness + dsi.write_cmd(0, NT35510_CMD_WRDISBV, &[0xFF]).unwrap(); + + led.set_low(); + Timer::after_millis(1000).await; + + // Reduce screen brightness + dsi.write_cmd(0, NT35510_CMD_WRDISBV, &[0x50]).unwrap(); + } +} + +const NT35510_WRITES_0: &[u8] = &[0xF0, 0x55, 0xAA, 0x52, 0x08, 0x01]; // LV2: Page 1 enable +const NT35510_WRITES_1: &[u8] = &[0xB0, 0x03, 0x03, 0x03]; // AVDD: 5.2V +const NT35510_WRITES_2: &[u8] = &[0xB6, 0x46, 0x46, 0x46]; // AVDD: Ratio +const NT35510_WRITES_3: &[u8] = &[0xB1, 0x03, 0x03, 0x03]; // AVEE: -5.2V +const NT35510_WRITES_4: &[u8] = &[0xB7, 0x36, 0x36, 0x36]; // AVEE: Ratio +const NT35510_WRITES_5: &[u8] = &[0xB2, 0x00, 0x00, 0x02]; // VCL: -2.5V +const NT35510_WRITES_6: &[u8] = &[0xB8, 0x26, 0x26, 0x26]; // VCL: Ratio +const NT35510_WRITES_7: &[u8] = &[0xBF, 0x01]; // VGH: 15V (Free Pump) +const NT35510_WRITES_8: &[u8] = &[0xB3, 0x09, 0x09, 0x09]; +const NT35510_WRITES_9: &[u8] = &[0xB9, 0x36, 0x36, 0x36]; // VGH: Ratio +const NT35510_WRITES_10: &[u8] = &[0xB5, 0x08, 0x08, 0x08]; // VGL_REG: -10V +const NT35510_WRITES_12: &[u8] = &[0xBA, 0x26, 0x26, 0x26]; // VGLX: Ratio +const NT35510_WRITES_13: &[u8] = &[0xBC, 0x00, 0x80, 0x00]; // VGMP/VGSP: 4.5V/0V +const NT35510_WRITES_14: &[u8] = &[0xBD, 0x00, 0x80, 0x00]; // VGMN/VGSN:-4.5V/0V +const NT35510_WRITES_15: &[u8] = &[0xBE, 0x00, 0x50]; // VCOM: -1.325V +const NT35510_WRITES_16: &[u8] = &[0xF0, 0x55, 0xAA, 0x52, 0x08, 0x00]; // LV2: Page 0 enable +const NT35510_WRITES_17: &[u8] = &[0xB1, 0xFC, 0x00]; // Display control +const NT35510_WRITES_18: &[u8] = &[0xB6, 0x03]; // Src hold time +const NT35510_WRITES_19: &[u8] = &[0xB5, 0x51]; +const NT35510_WRITES_20: &[u8] = &[0x00, 0x00, 0xB7]; // Gate EQ control +const NT35510_WRITES_21: &[u8] = &[0xB8, 0x01, 0x02, 0x02, 0x02]; // Src EQ control(Mode2) +const NT35510_WRITES_22: &[u8] = &[0xBC, 0x00, 0x00, 0x00]; // Inv. mode(2-dot) +const NT35510_WRITES_23: &[u8] = &[0xCC, 0x03, 0x00, 0x00]; +const NT35510_WRITES_24: &[u8] = &[0xBA, 0x01]; + +const _NT35510_MADCTL_PORTRAIT: &[u8] = &[NT35510_CMD_MADCTL, 0x00]; +const _NT35510_CASET_PORTRAIT: &[u8] = &[NT35510_CMD_CASET, 0x00, 0x00, 0x01, 0xDF]; +const _NT35510_RASET_PORTRAIT: &[u8] = &[NT35510_CMD_RASET, 0x00, 0x00, 0x03, 0x1F]; +const NT35510_MADCTL_LANDSCAPE: &[u8] = &[NT35510_CMD_MADCTL, 0x60]; +const NT35510_CASET_LANDSCAPE: &[u8] = &[NT35510_CMD_CASET, 0x00, 0x00, 0x03, 0x1F]; +const NT35510_RASET_LANDSCAPE: &[u8] = &[NT35510_CMD_RASET, 0x00, 0x00, 0x01, 0xDF]; + +const NT35510_WRITES_26: &[u8] = &[NT35510_CMD_TEEON, 0x00]; // Tear on +const NT35510_WRITES_27: &[u8] = &[NT35510_CMD_SLPOUT, 0x00]; // Sleep out + // 28,29 missing +const NT35510_WRITES_30: &[u8] = &[NT35510_CMD_DISPON, 0x00]; // Display on + +const NT35510_WRITES_31: &[u8] = &[NT35510_CMD_WRDISBV, 0x7F]; +const NT35510_WRITES_32: &[u8] = &[NT35510_CMD_WRCTRLD, 0x2C]; +const NT35510_WRITES_33: &[u8] = &[NT35510_CMD_WRCABC, 0x02]; +const NT35510_WRITES_34: &[u8] = &[NT35510_CMD_WRCABCMB, 0xFF]; +const NT35510_WRITES_35: &[u8] = &[NT35510_CMD_RAMWR, 0x00]; + +//const NT35510_WRITES_36: &[u8] = &[NT35510_CMD_COLMOD, NT35510_COLMOD_RGB565]; // FIXME: Example sets it to 888 but rest of the code seems to configure DSI for 565 +const NT35510_WRITES_37: &[u8] = &[NT35510_CMD_COLMOD, NT35510_COLMOD_RGB888]; + +// More of these: https://elixir.bootlin.com/linux/latest/source/include/video/mipi_display.h#L83 +const _NT35510_CMD_TEEON_GET_DISPLAY_ID: u8 = 0x04; + +const NT35510_CMD_TEEON: u8 = 0x35; +const NT35510_CMD_MADCTL: u8 = 0x36; + +const NT35510_CMD_SLPOUT: u8 = 0x11; +const NT35510_CMD_DISPON: u8 = 0x29; +const NT35510_CMD_CASET: u8 = 0x2A; +const NT35510_CMD_RASET: u8 = 0x2B; +const NT35510_CMD_RAMWR: u8 = 0x2C; /* Memory write */ +const NT35510_CMD_COLMOD: u8 = 0x3A; + +const NT35510_CMD_WRDISBV: u8 = 0x51; /* Write display brightness */ +const _NT35510_CMD_RDDISBV: u8 = 0x52; /* Read display brightness */ +const NT35510_CMD_WRCTRLD: u8 = 0x53; /* Write CTRL display */ +const _NT35510_CMD_RDCTRLD: u8 = 0x54; /* Read CTRL display value */ +const NT35510_CMD_WRCABC: u8 = 0x55; /* Write content adaptative brightness control */ +const NT35510_CMD_WRCABCMB: u8 = 0x5E; /* Write CABC minimum brightness */ + +const _NT35510_COLMOD_RGB565: u8 = 0x55; +const NT35510_COLMOD_RGB888: u8 = 0x77; diff --git a/examples/stm32f469/src/bin/ferris.bin b/examples/stm32f469/src/bin/ferris.bin new file mode 100644 index 000000000..ae1c466be --- /dev/null +++ b/examples/stm32f469/src/bin/ferris.bin @@ -0,0 +1,70 @@ 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Date: Tue, 21 May 2024 22:59:39 +0200 Subject: [PATCH 357/581] embassy-sync: fixed some clippy warnings --- embassy-sync/src/channel.rs | 8 ++++---- embassy-sync/src/pipe.rs | 2 +- embassy-sync/src/priority_channel.rs | 4 ++-- embassy-sync/src/waitqueue/multi_waker.rs | 2 +- 4 files changed, 8 insertions(+), 8 deletions(-) diff --git a/embassy-sync/src/channel.rs b/embassy-sync/src/channel.rs index f9f71d026..b124a885f 100644 --- a/embassy-sync/src/channel.rs +++ b/embassy-sync/src/channel.rs @@ -42,7 +42,7 @@ where M: RawMutex, { fn clone(&self) -> Self { - Sender { channel: self.channel } + *self } } @@ -81,7 +81,7 @@ pub struct DynamicSender<'ch, T> { impl<'ch, T> Clone for DynamicSender<'ch, T> { fn clone(&self) -> Self { - DynamicSender { channel: self.channel } + *self } } @@ -135,7 +135,7 @@ where M: RawMutex, { fn clone(&self) -> Self { - Receiver { channel: self.channel } + *self } } @@ -188,7 +188,7 @@ pub struct DynamicReceiver<'ch, T> { impl<'ch, T> Clone for DynamicReceiver<'ch, T> { fn clone(&self) -> Self { - DynamicReceiver { channel: self.channel } + *self } } diff --git a/embassy-sync/src/pipe.rs b/embassy-sync/src/pipe.rs index 42fe8ebd0..cd5b8ed75 100644 --- a/embassy-sync/src/pipe.rs +++ b/embassy-sync/src/pipe.rs @@ -25,7 +25,7 @@ where M: RawMutex, { fn clone(&self) -> Self { - Writer { pipe: self.pipe } + *self } } diff --git a/embassy-sync/src/priority_channel.rs b/embassy-sync/src/priority_channel.rs index 4b9bd0515..8572d3608 100644 --- a/embassy-sync/src/priority_channel.rs +++ b/embassy-sync/src/priority_channel.rs @@ -33,7 +33,7 @@ where M: RawMutex, { fn clone(&self) -> Self { - Sender { channel: self.channel } + *self } } @@ -101,7 +101,7 @@ where M: RawMutex, { fn clone(&self) -> Self { - Receiver { channel: self.channel } + *self } } diff --git a/embassy-sync/src/waitqueue/multi_waker.rs b/embassy-sync/src/waitqueue/multi_waker.rs index 824d192da..0e520bf40 100644 --- a/embassy-sync/src/waitqueue/multi_waker.rs +++ b/embassy-sync/src/waitqueue/multi_waker.rs @@ -14,7 +14,7 @@ impl MultiWakerRegistration { } /// Register a waker. If the buffer is full the function returns it in the error - pub fn register<'a>(&mut self, w: &'a Waker) { + pub fn register(&mut self, w: &Waker) { // If we already have some waker that wakes the same task as `w`, do nothing. // This avoids cloning wakers, and avoids unnecessary mass-wakes. for w2 in &self.wakers { From 7d350fb4c8133d7569f3b0873a7120e3a7832dcd Mon Sep 17 00:00:00 2001 From: Michael Zill Date: Fri, 5 Apr 2024 16:12:58 +0200 Subject: [PATCH 358/581] HSEM support for embassy-stm32 --- embassy-stm32/src/hsem/mod.rs | 181 ++++++++++++++++++++++++++++++++++ embassy-stm32/src/lib.rs | 2 + 2 files changed, 183 insertions(+) create mode 100644 embassy-stm32/src/hsem/mod.rs diff --git a/embassy-stm32/src/hsem/mod.rs b/embassy-stm32/src/hsem/mod.rs new file mode 100644 index 000000000..cc30302b9 --- /dev/null +++ b/embassy-stm32/src/hsem/mod.rs @@ -0,0 +1,181 @@ +//! Hardware Semaphore (HSEM) + +// TODO: This code works for all HSEM implemenations except for the STM32WBA52/4/5xx MCUs. +// Those MCUs have a different HSEM implementation (Secure semaphore lock support, +// Privileged / unprivileged semaphore lock support, Semaphore lock protection via semaphore attribute), +// which is not yet supported by this code. +use embassy_hal_internal::{into_ref, PeripheralRef}; + +use crate::rcc::RccPeripheral; +use crate::{pac, Peripheral}; + +/// HSEM error. +#[derive(Debug)] +pub enum HsemError { + /// Locking the semaphore failed. + LockFailed, +} + +/// CPU core. +/// The enum values are identical to the bus master IDs / core Ids defined for each +/// chip family (i.e. stm32h747 see rm0399 table 95) +#[derive(Debug, PartialEq, Eq, Clone, Copy, Hash)] +#[repr(u8)] +#[derive(defmt::Format)] +pub enum CoreId { + #[cfg(any(stm32h745, stm32h747, stm32h755, stm32h757))] + /// Cortex-M7, core 1. + Core0 = 0x3, + + #[cfg(any(stm32h745, stm32h747, stm32h755, stm32h757))] + /// Cortex-M4, core 2. + Core1 = 0x1, + + #[cfg(not(any(stm32h745, stm32h747, stm32h755, stm32h757)))] + /// Cortex-M4, core 1 + Core0 = 0x4, + + #[cfg(any(stm32wb, stm32wl))] + // Cortex-M0+, core 2. + Core1 = 0x8, +} + +/// Get the current core id +/// This code assume that it is only executed on a Cortex-M M0+, M4 or M7 core. +#[inline(always)] +pub fn get_current_coreid() -> CoreId { + let cpuid = unsafe { cortex_m::peripheral::CPUID::PTR.read_volatile().base.read() }; + match cpuid & 0x000000F0 { + #[cfg(any(stm32wb, stm32wl))] + 0x0 => CoreId::Core1, + + #[cfg(not(any(stm32h745, stm32h747, stm32h755, stm32h757)))] + 0x4 => CoreId::Core0, + + #[cfg(any(stm32h745, stm32h747, stm32h755, stm32h757))] + 0x4 => CoreId::Core1, + + #[cfg(any(stm32h745, stm32h747, stm32h755, stm32h757))] + 0x7 => CoreId::Core0, + _ => panic!("Unknown Cortex-M core"), + } +} + +/// Translates the core ID to an index into the interrupt registers. +#[inline(always)] +fn core_id_to_index(core: CoreId) -> usize { + match core { + CoreId::Core0 => 0, + CoreId::Core1 => 1, + } +} + +/// HSEM driver +pub struct HardwareSemaphore<'d, T: Instance> { + _peri: PeripheralRef<'d, T>, +} + +impl<'d, T: Instance> HardwareSemaphore<'d, T> { + /// Creates a new HardwareSemaphore instance. + pub fn new(peripheral: impl Peripheral

+ 'd) -> Self { + into_ref!(peripheral); + HardwareSemaphore { _peri: peripheral } + } + + /// Locks the semaphore. + /// The 2-step lock procedure consists in a write to lock the semaphore, followed by a read to + /// check if the lock has been successful, carried out from the HSEM_Rx register. + pub fn two_step_lock(&mut self, sem_id: u8, process_id: u8) -> Result<(), HsemError> { + T::regs().r(sem_id as usize).write(|w| { + w.set_procid(process_id); + w.set_coreid(get_current_coreid() as u8); + w.set_lock(true); + }); + let reg = T::regs().r(sem_id as usize).read(); + match ( + reg.lock(), + reg.coreid() == get_current_coreid() as u8, + reg.procid() == process_id, + ) { + (true, true, true) => Ok(()), + _ => Err(HsemError::LockFailed), + } + } + + /// Locks the semaphore. + /// The 1-step procedure consists in a read to lock and check the semaphore in a single step, + /// carried out from the HSEM_RLRx register. + pub fn one_step_lock(&mut self, sem_id: u8) -> Result<(), HsemError> { + let reg = T::regs().rlr(sem_id as usize).read(); + match (reg.lock(), reg.coreid() == get_current_coreid() as u8, reg.procid()) { + (false, true, 0) => Ok(()), + _ => Err(HsemError::LockFailed), + } + } + + /// Unlocks the semaphore. + /// Unlocking a semaphore is a protected process, to prevent accidental clearing by a AHB bus + /// core ID or by a process not having the semaphore lock right. + pub fn unlock(&mut self, sem_id: u8, process_id: u8) { + T::regs().r(sem_id as usize).write(|w| { + w.set_procid(process_id); + w.set_coreid(get_current_coreid() as u8); + w.set_lock(false); + }); + } + + /// Unlocks all semaphores. + /// All semaphores locked by a COREID can be unlocked at once by using the HSEM_CR + /// register. Write COREID and correct KEY value in HSEM_CR. All locked semaphores with a + /// matching COREID are unlocked, and may generate an interrupt when enabled. + pub fn unlock_all(&mut self, key: u16, core_id: u8) { + T::regs().cr().write(|w| { + w.set_key(key); + w.set_coreid(core_id); + }); + } + + /// Checks if the semaphore is locked. + pub fn is_semaphore_locked(&self, sem_id: u8) -> bool { + T::regs().r(sem_id as usize).read().lock() + } + + /// Sets the clear (unlock) key + pub fn set_clear_key(&mut self, key: u16) { + T::regs().keyr().modify(|w| w.set_key(key)); + } + + /// Gets the clear (unlock) key + pub fn get_clear_key(&mut self) -> u16 { + T::regs().keyr().read().key() + } + + /// Sets the interrupt enable bit for the semaphore. + pub fn enable_interrupt(&mut self, core_id: CoreId, sem_x: usize, enable: bool) { + T::regs() + .ier(core_id_to_index(core_id)) + .modify(|w| w.set_ise(sem_x, enable)); + } + + /// Clears the interrupt flag for the semaphore. + pub fn clear_interrupt(&mut self, core_id: CoreId, sem_x: usize) { + T::regs() + .icr(core_id_to_index(core_id)) + .write(|w| w.set_isc(sem_x, false)); + } +} + +trait SealedInstance { + fn regs() -> pac::hsem::Hsem; +} + +/// HSEM instance trait. +#[allow(private_bounds)] +pub trait Instance: SealedInstance + RccPeripheral + Send + 'static {} + +impl SealedInstance for crate::peripherals::HSEM { + fn regs() -> crate::pac::hsem::Hsem { + crate::pac::HSEM + } +} +impl Instance for crate::peripherals::HSEM {} diff --git a/embassy-stm32/src/lib.rs b/embassy-stm32/src/lib.rs index 029e01480..e0b3cbe37 100644 --- a/embassy-stm32/src/lib.rs +++ b/embassy-stm32/src/lib.rs @@ -79,6 +79,8 @@ pub mod fmc; pub mod hash; #[cfg(hrtim)] pub mod hrtim; +#[cfg(hsem)] +pub mod hsem; #[cfg(i2c)] pub mod i2c; #[cfg(all(spi_v1, rcc_f4))] From afd61ed610293b1f41bc926bf3a0fa35d78a8815 Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Tue, 21 May 2024 23:18:31 +0200 Subject: [PATCH 359/581] stm32/hsem: misc fixes. --- embassy-stm32/Cargo.toml | 4 ++-- embassy-stm32/src/hsem/mod.rs | 5 +++-- 2 files changed, 5 insertions(+), 4 deletions(-) diff --git a/embassy-stm32/Cargo.toml b/embassy-stm32/Cargo.toml index a7137d132..5ef2366d9 100644 --- a/embassy-stm32/Cargo.toml +++ b/embassy-stm32/Cargo.toml @@ -72,7 +72,7 @@ rand_core = "0.6.3" sdio-host = "0.5.0" critical-section = "1.1" #stm32-metapac = { version = "15" } -stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-f1297385e91f061fcb6134bb25f51e12d8abff93" } +stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-34c0188a682b32c32ff147d377e0629b1ebe8318" } vcell = "0.1.3" nb = "1.0.0" @@ -97,7 +97,7 @@ proc-macro2 = "1.0.36" quote = "1.0.15" #stm32-metapac = { version = "15", default-features = false, features = ["metadata"]} -stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-f1297385e91f061fcb6134bb25f51e12d8abff93", default-features = false, features = ["metadata"]} +stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-34c0188a682b32c32ff147d377e0629b1ebe8318", default-features = false, features = ["metadata"]} [features] default = ["rt"] diff --git a/embassy-stm32/src/hsem/mod.rs b/embassy-stm32/src/hsem/mod.rs index cc30302b9..b77a3415b 100644 --- a/embassy-stm32/src/hsem/mod.rs +++ b/embassy-stm32/src/hsem/mod.rs @@ -21,7 +21,7 @@ pub enum HsemError { /// chip family (i.e. stm32h747 see rm0399 table 95) #[derive(Debug, PartialEq, Eq, Clone, Copy, Hash)] #[repr(u8)] -#[derive(defmt::Format)] +#[cfg_attr(feature = "defmt", derive(defmt::Format))] pub enum CoreId { #[cfg(any(stm32h745, stm32h747, stm32h755, stm32h757))] /// Cortex-M7, core 1. @@ -36,7 +36,7 @@ pub enum CoreId { Core0 = 0x4, #[cfg(any(stm32wb, stm32wl))] - // Cortex-M0+, core 2. + /// Cortex-M0+, core 2. Core1 = 0x8, } @@ -66,6 +66,7 @@ pub fn get_current_coreid() -> CoreId { fn core_id_to_index(core: CoreId) -> usize { match core { CoreId::Core0 => 0, + #[cfg(any(stm32h745, stm32h747, stm32h755, stm32h757, stm32wb, stm32wl))] CoreId::Core1 => 1, } } From 24032d0853adc799588dbc84315b3e72ec5bf7b2 Mon Sep 17 00:00:00 2001 From: Ismet Handzic Date: Sat, 6 Apr 2024 11:33:58 -0400 Subject: [PATCH 360/581] Remove generics from embassy-rp --- embassy-rp/src/pwm.rs | 92 +++++++++++++++++++++++-------------------- 1 file changed, 50 insertions(+), 42 deletions(-) diff --git a/embassy-rp/src/pwm.rs b/embassy-rp/src/pwm.rs index a1f400cfb..2e5aebc57 100644 --- a/embassy-rp/src/pwm.rs +++ b/embassy-rp/src/pwm.rs @@ -81,24 +81,22 @@ impl From for Divmode { } /// PWM driver. -pub struct Pwm<'d, T: Slice> { - inner: PeripheralRef<'d, T>, +pub struct Pwm<'d> { pin_a: Option>, pin_b: Option>, + channel: usize, } -impl<'d, T: Slice> Pwm<'d, T> { +impl<'d> Pwm<'d> { fn new_inner( - inner: impl Peripheral

+ 'd, + channel: usize, a: Option>, b: Option>, b_pull: Pull, config: Config, divmode: Divmode, ) -> Self { - into_ref!(inner); - - let p = inner.regs(); + let p = pac::PWM.ch(channel); p.csr().modify(|w| { w.set_divmode(divmode); w.set_en(false); @@ -117,51 +115,66 @@ impl<'d, T: Slice> Pwm<'d, T> { }); } Self { - inner, + // inner: p.into(), pin_a: a, pin_b: b, + channel, } } /// Create PWM driver without any configured pins. #[inline] - pub fn new_free(inner: impl Peripheral

+ 'd, config: Config) -> Self { - Self::new_inner(inner, None, None, Pull::None, config, Divmode::DIV) + pub fn new_free(channel: impl Peripheral

+ 'd, config: Config) -> Self { + Self::new_inner(channel.number(), None, None, Pull::None, config, Divmode::DIV) } /// Create PWM driver with a single 'a' as output. #[inline] - pub fn new_output_a( - inner: impl Peripheral

+ 'd, + pub fn new_output_a( + channel: impl Peripheral

+ 'd, a: impl Peripheral

> + 'd, config: Config, ) -> Self { into_ref!(a); - Self::new_inner(inner, Some(a.map_into()), None, Pull::None, config, Divmode::DIV) + Self::new_inner( + channel.number(), + Some(a.map_into()), + None, + Pull::None, + config, + Divmode::DIV, + ) } /// Create PWM driver with a single 'b' pin as output. #[inline] - pub fn new_output_b( - inner: impl Peripheral

+ 'd, + pub fn new_output_b( + channel: impl Peripheral

+ 'd, b: impl Peripheral

> + 'd, config: Config, ) -> Self { into_ref!(b); - Self::new_inner(inner, None, Some(b.map_into()), Pull::None, config, Divmode::DIV) + Self::new_inner( + channel.number(), + None, + Some(b.map_into()), + Pull::None, + config, + Divmode::DIV, + ) } /// Create PWM driver with a 'a' and 'b' pins as output. #[inline] - pub fn new_output_ab( - inner: impl Peripheral

+ 'd, + pub fn new_output_ab( + channel: impl Peripheral

+ 'd, a: impl Peripheral

> + 'd, b: impl Peripheral

> + 'd, config: Config, ) -> Self { into_ref!(a, b); Self::new_inner( - inner, + channel.number(), Some(a.map_into()), Some(b.map_into()), Pull::None, @@ -172,21 +185,21 @@ impl<'d, T: Slice> Pwm<'d, T> { /// Create PWM driver with a single 'b' as input pin. #[inline] - pub fn new_input( - inner: impl Peripheral

+ 'd, + pub fn new_input( + channel: impl Peripheral

+ 'd, b: impl Peripheral

> + 'd, b_pull: Pull, mode: InputMode, config: Config, ) -> Self { into_ref!(b); - Self::new_inner(inner, None, Some(b.map_into()), b_pull, config, mode.into()) + Self::new_inner(channel.number(), None, Some(b.map_into()), b_pull, config, mode.into()) } /// Create PWM driver with a 'a' and 'b' pins in the desired input mode. #[inline] - pub fn new_output_input( - inner: impl Peripheral

+ 'd, + pub fn new_output_input( + channel: impl Peripheral

+ 'd, a: impl Peripheral

> + 'd, b: impl Peripheral

> + 'd, b_pull: Pull, @@ -195,7 +208,7 @@ impl<'d, T: Slice> Pwm<'d, T> { ) -> Self { into_ref!(a, b); Self::new_inner( - inner, + channel.number(), Some(a.map_into()), Some(b.map_into()), b_pull, @@ -206,7 +219,7 @@ impl<'d, T: Slice> Pwm<'d, T> { /// Set the PWM config. pub fn set_config(&mut self, config: &Config) { - Self::configure(self.inner.regs(), config); + Self::configure(pac::PWM.ch(self.channel), config); } fn configure(p: pac::pwm::Channel, config: &Config) { @@ -228,22 +241,22 @@ impl<'d, T: Slice> Pwm<'d, T> { }); } - /// Advances a slice’s output phase by one count while it is running + /// Advances a slice's output phase by one count while it is running /// by inserting a pulse into the clock enable. The counter /// will not count faster than once per cycle. #[inline] pub fn phase_advance(&mut self) { - let p = self.inner.regs(); + let p = pac::PWM.ch(self.channel); p.csr().write_set(|w| w.set_ph_adv(true)); while p.csr().read().ph_adv() {} } - /// Retards a slice’s output phase by one count while it is running + /// Retards a slice's output phase by one count while it is running /// by deleting a pulse from the clock enable. The counter will not - /// count backward when clock enable is permenantly low. + /// count backward when clock enable is permanently low. #[inline] pub fn phase_retard(&mut self) { - let p = self.inner.regs(); + let p = pac::PWM.ch(self.channel); p.csr().write_set(|w| w.set_ph_ret(true)); while p.csr().read().ph_ret() {} } @@ -251,13 +264,13 @@ impl<'d, T: Slice> Pwm<'d, T> { /// Read PWM counter. #[inline] pub fn counter(&self) -> u16 { - self.inner.regs().ctr().read().ctr() + pac::PWM.ch(self.channel).ctr().read().ctr() } /// Write PWM counter. #[inline] pub fn set_counter(&self, ctr: u16) { - self.inner.regs().ctr().write(|w| w.set_ctr(ctr)) + pac::PWM.ch(self.channel).ctr().write(|w| w.set_ctr(ctr)) } /// Wait for channel interrupt. @@ -281,7 +294,7 @@ impl<'d, T: Slice> Pwm<'d, T> { #[inline] fn bit(&self) -> u32 { - 1 << self.inner.number() as usize + 1 << self.channel as usize } } @@ -291,7 +304,7 @@ pub struct PwmBatch(u32); impl PwmBatch { #[inline] /// Enable a PWM slice in this batch. - pub fn enable(&mut self, pwm: &Pwm<'_, impl Slice>) { + pub fn enable(&mut self, pwm: &Pwm<'_>) { self.0 |= pwm.bit(); } @@ -308,9 +321,9 @@ impl PwmBatch { } } -impl<'d, T: Slice> Drop for Pwm<'d, T> { +impl<'d> Drop for Pwm<'d> { fn drop(&mut self) { - self.inner.regs().csr().write_clear(|w| w.set_en(false)); + pac::PWM.ch(self.channel).csr().write_clear(|w| w.set_en(false)); if let Some(pin) = &self.pin_a { pin.gpio().ctrl().write(|w| w.set_funcsel(31)); } @@ -327,11 +340,6 @@ trait SealedSlice {} pub trait Slice: Peripheral

+ SealedSlice + Sized + 'static { /// Slice number. fn number(&self) -> u8; - - /// Slice register block. - fn regs(&self) -> pac::pwm::Channel { - pac::PWM.ch(self.number() as _) - } } macro_rules! slice { From e55f31bdc6882b6a6ac78a59aabf42ff9433f48d Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Tue, 21 May 2024 23:41:45 +0200 Subject: [PATCH 361/581] rp/pwm: rename channel->slice in args, misc fix. --- embassy-rp/src/pwm.rs | 61 ++++++++++++++++---------------- examples/rp/src/bin/interrupt.rs | 3 +- 2 files changed, 32 insertions(+), 32 deletions(-) diff --git a/embassy-rp/src/pwm.rs b/embassy-rp/src/pwm.rs index 2e5aebc57..20b5c4d58 100644 --- a/embassy-rp/src/pwm.rs +++ b/embassy-rp/src/pwm.rs @@ -84,19 +84,19 @@ impl From for Divmode { pub struct Pwm<'d> { pin_a: Option>, pin_b: Option>, - channel: usize, + slice: usize, } impl<'d> Pwm<'d> { fn new_inner( - channel: usize, + slice: usize, a: Option>, b: Option>, b_pull: Pull, config: Config, divmode: Divmode, ) -> Self { - let p = pac::PWM.ch(channel); + let p = pac::PWM.ch(slice); p.csr().modify(|w| { w.set_divmode(divmode); w.set_en(false); @@ -118,26 +118,27 @@ impl<'d> Pwm<'d> { // inner: p.into(), pin_a: a, pin_b: b, - channel, + slice, } } /// Create PWM driver without any configured pins. #[inline] - pub fn new_free(channel: impl Peripheral

+ 'd, config: Config) -> Self { - Self::new_inner(channel.number(), None, None, Pull::None, config, Divmode::DIV) + pub fn new_free(slice: impl Peripheral

+ 'd, config: Config) -> Self { + into_ref!(slice); + Self::new_inner(slice.number(), None, None, Pull::None, config, Divmode::DIV) } /// Create PWM driver with a single 'a' as output. #[inline] pub fn new_output_a( - channel: impl Peripheral

+ 'd, + slice: impl Peripheral

+ 'd, a: impl Peripheral

> + 'd, config: Config, ) -> Self { - into_ref!(a); + into_ref!(slice, a); Self::new_inner( - channel.number(), + slice.number(), Some(a.map_into()), None, Pull::None, @@ -149,13 +150,13 @@ impl<'d> Pwm<'d> { /// Create PWM driver with a single 'b' pin as output. #[inline] pub fn new_output_b( - channel: impl Peripheral

+ 'd, + slice: impl Peripheral

+ 'd, b: impl Peripheral

> + 'd, config: Config, ) -> Self { - into_ref!(b); + into_ref!(slice, b); Self::new_inner( - channel.number(), + slice.number(), None, Some(b.map_into()), Pull::None, @@ -167,14 +168,14 @@ impl<'d> Pwm<'d> { /// Create PWM driver with a 'a' and 'b' pins as output. #[inline] pub fn new_output_ab( - channel: impl Peripheral

+ 'd, + slice: impl Peripheral

+ 'd, a: impl Peripheral

> + 'd, b: impl Peripheral

> + 'd, config: Config, ) -> Self { - into_ref!(a, b); + into_ref!(slice, a, b); Self::new_inner( - channel.number(), + slice.number(), Some(a.map_into()), Some(b.map_into()), Pull::None, @@ -186,29 +187,29 @@ impl<'d> Pwm<'d> { /// Create PWM driver with a single 'b' as input pin. #[inline] pub fn new_input( - channel: impl Peripheral

+ 'd, + slice: impl Peripheral

+ 'd, b: impl Peripheral

> + 'd, b_pull: Pull, mode: InputMode, config: Config, ) -> Self { - into_ref!(b); - Self::new_inner(channel.number(), None, Some(b.map_into()), b_pull, config, mode.into()) + into_ref!(slice, b); + Self::new_inner(slice.number(), None, Some(b.map_into()), b_pull, config, mode.into()) } /// Create PWM driver with a 'a' and 'b' pins in the desired input mode. #[inline] pub fn new_output_input( - channel: impl Peripheral

+ 'd, + slice: impl Peripheral

+ 'd, a: impl Peripheral

> + 'd, b: impl Peripheral

> + 'd, b_pull: Pull, mode: InputMode, config: Config, ) -> Self { - into_ref!(a, b); + into_ref!(slice, a, b); Self::new_inner( - channel.number(), + slice.number(), Some(a.map_into()), Some(b.map_into()), b_pull, @@ -219,7 +220,7 @@ impl<'d> Pwm<'d> { /// Set the PWM config. pub fn set_config(&mut self, config: &Config) { - Self::configure(pac::PWM.ch(self.channel), config); + Self::configure(pac::PWM.ch(self.slice), config); } fn configure(p: pac::pwm::Channel, config: &Config) { @@ -246,7 +247,7 @@ impl<'d> Pwm<'d> { /// will not count faster than once per cycle. #[inline] pub fn phase_advance(&mut self) { - let p = pac::PWM.ch(self.channel); + let p = pac::PWM.ch(self.slice); p.csr().write_set(|w| w.set_ph_adv(true)); while p.csr().read().ph_adv() {} } @@ -256,7 +257,7 @@ impl<'d> Pwm<'d> { /// count backward when clock enable is permanently low. #[inline] pub fn phase_retard(&mut self) { - let p = pac::PWM.ch(self.channel); + let p = pac::PWM.ch(self.slice); p.csr().write_set(|w| w.set_ph_ret(true)); while p.csr().read().ph_ret() {} } @@ -264,13 +265,13 @@ impl<'d> Pwm<'d> { /// Read PWM counter. #[inline] pub fn counter(&self) -> u16 { - pac::PWM.ch(self.channel).ctr().read().ctr() + pac::PWM.ch(self.slice).ctr().read().ctr() } /// Write PWM counter. #[inline] pub fn set_counter(&self, ctr: u16) { - pac::PWM.ch(self.channel).ctr().write(|w| w.set_ctr(ctr)) + pac::PWM.ch(self.slice).ctr().write(|w| w.set_ctr(ctr)) } /// Wait for channel interrupt. @@ -294,7 +295,7 @@ impl<'d> Pwm<'d> { #[inline] fn bit(&self) -> u32 { - 1 << self.channel as usize + 1 << self.slice as usize } } @@ -323,7 +324,7 @@ impl PwmBatch { impl<'d> Drop for Pwm<'d> { fn drop(&mut self) { - pac::PWM.ch(self.channel).csr().write_clear(|w| w.set_en(false)); + pac::PWM.ch(self.slice).csr().write_clear(|w| w.set_en(false)); if let Some(pin) = &self.pin_a { pin.gpio().ctrl().write(|w| w.set_funcsel(31)); } @@ -339,14 +340,14 @@ trait SealedSlice {} #[allow(private_bounds)] pub trait Slice: Peripheral

+ SealedSlice + Sized + 'static { /// Slice number. - fn number(&self) -> u8; + fn number(&self) -> usize; } macro_rules! slice { ($name:ident, $num:expr) => { impl SealedSlice for peripherals::$name {} impl Slice for peripherals::$name { - fn number(&self) -> u8 { + fn number(&self) -> usize { $num } } diff --git a/examples/rp/src/bin/interrupt.rs b/examples/rp/src/bin/interrupt.rs index d334d35d7..5b9d7027e 100644 --- a/examples/rp/src/bin/interrupt.rs +++ b/examples/rp/src/bin/interrupt.rs @@ -15,7 +15,6 @@ use embassy_executor::Spawner; use embassy_rp::adc::{self, Adc, Blocking}; use embassy_rp::gpio::Pull; use embassy_rp::interrupt; -use embassy_rp::peripherals::PWM_SLICE4; use embassy_rp::pwm::{Config, Pwm}; use embassy_sync::blocking_mutex::raw::CriticalSectionRawMutex; use embassy_sync::blocking_mutex::Mutex; @@ -26,7 +25,7 @@ use static_cell::StaticCell; use {defmt_rtt as _, panic_probe as _}; static COUNTER: AtomicU32 = AtomicU32::new(0); -static PWM: Mutex>>> = Mutex::new(RefCell::new(None)); +static PWM: Mutex>> = Mutex::new(RefCell::new(None)); static ADC: Mutex, adc::Channel)>>> = Mutex::new(RefCell::new(None)); static ADC_VALUES: Channel = Channel::new(); From 3b0102363632d72f31e276bf4a8606706fa0b5fc Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Tue, 21 May 2024 23:45:01 +0200 Subject: [PATCH 362/581] Remove "cargo install probe-rs", point users to probe.rs instead. Fixes #2965 --- README.md | 7 +------ cyw43/README.md | 2 +- 2 files changed, 2 insertions(+), 7 deletions(-) diff --git a/README.md b/README.md index ffc7899d7..65ccaa967 100644 --- a/README.md +++ b/README.md @@ -100,12 +100,7 @@ Examples are found in the `examples/` folder separated by the chip manufacturer ### Running examples -- Install `probe-rs`. - -```bash -cargo install probe-rs --features cli -``` - +- Install `probe-rs` following the instructions at . - Change directory to the sample's base directory. For example: ```bash diff --git a/cyw43/README.md b/cyw43/README.md index dabdf0471..5b4a5d789 100644 --- a/cyw43/README.md +++ b/cyw43/README.md @@ -23,7 +23,7 @@ TODO: ## Running the examples -- `cargo install probe-rs --features cli` +- Install `probe-rs` following the instructions at . - `cd examples/rp` ### Example 1: Scan the wifi stations - `cargo run --release --bin wifi_scan` From ec321595765ee63f1c14b72fb62d9d02344fa8dd Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ren=C3=A9=20Herrero?= Date: Tue, 21 May 2024 17:14:31 -0500 Subject: [PATCH 363/581] added CAN example --- examples/stm32l4/src/bin/can.rs | 68 +++++++++++++++++++++++++++++++++ 1 file changed, 68 insertions(+) create mode 100644 examples/stm32l4/src/bin/can.rs diff --git a/examples/stm32l4/src/bin/can.rs b/examples/stm32l4/src/bin/can.rs new file mode 100644 index 000000000..3c4cdac24 --- /dev/null +++ b/examples/stm32l4/src/bin/can.rs @@ -0,0 +1,68 @@ +#![no_std] +#![no_main] + +use defmt::*; +use embassy_executor::Spawner; +use embassy_stm32::can::filter::Mask32; +use embassy_stm32::can::{ + Can, Fifo, Frame, Rx0InterruptHandler, Rx1InterruptHandler, SceInterruptHandler, TxInterruptHandler, +}; +use embassy_stm32::peripherals::CAN1; +use embassy_stm32::{bind_interrupts, Config}; +use embassy_time::Timer; +use {defmt_rtt as _, panic_probe as _}; + +bind_interrupts!(struct Irqs { + CAN1_RX0 => Rx0InterruptHandler; + CAN1_RX1 => Rx1InterruptHandler; + CAN1_SCE => SceInterruptHandler; + CAN1_TX => TxInterruptHandler; +}); + +#[embassy_executor::main] +async fn main(_spawner: Spawner) { + let p = embassy_stm32::init(Config::default()); + + let mut can = Can::new(p.CAN1, p.PA11, p.PA12, Irqs); + + can.modify_filters().enable_bank(0, Fifo::Fifo0, Mask32::accept_all()); + + can.modify_config() + .set_loopback(true) // Receive own frames + .set_silent(true) + .set_bitrate(250_000); + + can.enable().await; + println!("CAN enabled"); + + let mut i = 0; + let mut last_read_ts = embassy_time::Instant::now(); + loop { + let frame = Frame::new_extended(0x123456F, &[i; 8]).unwrap(); + info!("Writing frame"); + + _ = can.write(&frame).await; + + match can.read().await { + Ok(envelope) => { + let (ts, rx_frame) = (envelope.ts, envelope.frame); + let delta = (ts - last_read_ts).as_millis(); + last_read_ts = ts; + info!( + "Rx: {} {:02x} --- {}ms", + rx_frame.header().len(), + rx_frame.data()[0..rx_frame.header().len() as usize], + delta, + ) + } + Err(err) => error!("Error in frame: {}", err), + } + + Timer::after_millis(250).await; + + i += 1; + if i > 2 { + break; + } + } +} From e7161aa085bb145df6607eff5b2c2d0ed06acda1 Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Wed, 22 May 2024 00:23:14 +0200 Subject: [PATCH 364/581] stm32/qspi: remove DMA generic param. --- embassy-stm32/src/qspi/mod.rs | 317 ++++++++++++++++--------------- examples/stm32f7/src/bin/qspi.rs | 13 +- 2 files changed, 173 insertions(+), 157 deletions(-) diff --git a/embassy-stm32/src/qspi/mod.rs b/embassy-stm32/src/qspi/mod.rs index 0a4b4f074..a82e93b5b 100644 --- a/embassy-stm32/src/qspi/mod.rs +++ b/embassy-stm32/src/qspi/mod.rs @@ -4,11 +4,14 @@ pub mod enums; +use core::marker::PhantomData; + use embassy_hal_internal::{into_ref, PeripheralRef}; use enums::*; -use crate::dma::Transfer; -use crate::gpio::{AFType, AnyPin, Pull}; +use crate::dma::ChannelAndRequest; +use crate::gpio::{AFType, AnyPin, Pull, Speed}; +use crate::mode::{Async, Blocking, Mode as PeriMode}; use crate::pac::quadspi::Quadspi as Regs; use crate::rcc::RccPeripheral; use crate::{peripherals, Peripheral}; @@ -71,7 +74,7 @@ impl Default for Config { /// QSPI driver. #[allow(dead_code)] -pub struct Qspi<'d, T: Instance, Dma> { +pub struct Qspi<'d, T: Instance, M: PeriMode> { _peri: PeripheralRef<'d, T>, sck: Option>, d0: Option>, @@ -79,93 +82,12 @@ pub struct Qspi<'d, T: Instance, Dma> { d2: Option>, d3: Option>, nss: Option>, - dma: PeripheralRef<'d, Dma>, + dma: Option>, + _phantom: PhantomData, config: Config, } -impl<'d, T: Instance, Dma> Qspi<'d, T, Dma> { - /// Create a new QSPI driver for bank 1. - pub fn new_bk1( - peri: impl Peripheral

+ 'd, - d0: impl Peripheral

> + 'd, - d1: impl Peripheral

> + 'd, - d2: impl Peripheral

> + 'd, - d3: impl Peripheral

> + 'd, - sck: impl Peripheral

> + 'd, - nss: impl Peripheral

> + 'd, - dma: impl Peripheral

+ 'd, - config: Config, - ) -> Self { - into_ref!(peri, d0, d1, d2, d3, sck, nss); - - sck.set_as_af_pull(sck.af_num(), AFType::OutputPushPull, Pull::None); - sck.set_speed(crate::gpio::Speed::VeryHigh); - nss.set_as_af_pull(nss.af_num(), AFType::OutputPushPull, Pull::Up); - nss.set_speed(crate::gpio::Speed::VeryHigh); - d0.set_as_af_pull(d0.af_num(), AFType::OutputPushPull, Pull::None); - d0.set_speed(crate::gpio::Speed::VeryHigh); - d1.set_as_af_pull(d1.af_num(), AFType::OutputPushPull, Pull::None); - d1.set_speed(crate::gpio::Speed::VeryHigh); - d2.set_as_af_pull(d2.af_num(), AFType::OutputPushPull, Pull::None); - d2.set_speed(crate::gpio::Speed::VeryHigh); - d3.set_as_af_pull(d3.af_num(), AFType::OutputPushPull, Pull::None); - d3.set_speed(crate::gpio::Speed::VeryHigh); - - Self::new_inner( - peri, - Some(d0.map_into()), - Some(d1.map_into()), - Some(d2.map_into()), - Some(d3.map_into()), - Some(sck.map_into()), - Some(nss.map_into()), - dma, - config, - FlashSelection::Flash1, - ) - } - - /// Create a new QSPI driver for bank 2. - pub fn new_bk2( - peri: impl Peripheral

+ 'd, - d0: impl Peripheral

> + 'd, - d1: impl Peripheral

> + 'd, - d2: impl Peripheral

> + 'd, - d3: impl Peripheral

> + 'd, - sck: impl Peripheral

> + 'd, - nss: impl Peripheral

> + 'd, - dma: impl Peripheral

+ 'd, - config: Config, - ) -> Self { - into_ref!(peri, d0, d1, d2, d3, sck, nss); - - sck.set_as_af_pull(sck.af_num(), AFType::OutputPushPull, Pull::None); - sck.set_speed(crate::gpio::Speed::VeryHigh); - nss.set_as_af_pull(nss.af_num(), AFType::OutputPushPull, Pull::Up); - nss.set_speed(crate::gpio::Speed::VeryHigh); - d0.set_as_af_pull(d0.af_num(), AFType::OutputPushPull, Pull::None); - d0.set_speed(crate::gpio::Speed::VeryHigh); - d1.set_as_af_pull(d1.af_num(), AFType::OutputPushPull, Pull::None); - d1.set_speed(crate::gpio::Speed::VeryHigh); - d2.set_as_af_pull(d2.af_num(), AFType::OutputPushPull, Pull::None); - d2.set_speed(crate::gpio::Speed::VeryHigh); - d3.set_as_af_pull(d3.af_num(), AFType::OutputPushPull, Pull::None); - d3.set_speed(crate::gpio::Speed::VeryHigh); - - Self::new_inner( - peri, - Some(d0.map_into()), - Some(d1.map_into()), - Some(d2.map_into()), - Some(d3.map_into()), - Some(sck.map_into()), - Some(nss.map_into()), - dma, - config, - FlashSelection::Flash2, - ) - } - +impl<'d, T: Instance, M: PeriMode> Qspi<'d, T, M> { fn new_inner( peri: impl Peripheral

+ 'd, d0: Option>, @@ -174,11 +96,11 @@ impl<'d, T: Instance, Dma> Qspi<'d, T, Dma> { d3: Option>, sck: Option>, nss: Option>, - dma: impl Peripheral

+ 'd, + dma: Option>, config: Config, fsel: FlashSelection, ) -> Self { - into_ref!(peri, dma); + into_ref!(peri); T::enable_and_reset(); @@ -220,6 +142,7 @@ impl<'d, T: Instance, Dma> Qspi<'d, T, Dma> { d3, nss, dma, + _phantom: PhantomData, config, } } @@ -278,68 +201,6 @@ impl<'d, T: Instance, Dma> Qspi<'d, T, Dma> { T::REGS.fcr().modify(|v| v.set_ctcf(true)); } - /// Blocking read data, using DMA. - pub fn blocking_read_dma(&mut self, buf: &mut [u8], transaction: TransferConfig) - where - Dma: QuadDma, - { - self.setup_transaction(QspiMode::IndirectWrite, &transaction, Some(buf.len())); - - T::REGS.ccr().modify(|v| { - v.set_fmode(QspiMode::IndirectRead.into()); - }); - let current_ar = T::REGS.ar().read().address(); - T::REGS.ar().write(|v| { - v.set_address(current_ar); - }); - - let request = self.dma.request(); - let transfer = unsafe { - Transfer::new_read( - &mut self.dma, - request, - T::REGS.dr().as_ptr() as *mut u8, - buf, - Default::default(), - ) - }; - - // STM32H7 does not have dmaen - #[cfg(not(stm32h7))] - T::REGS.cr().modify(|v| v.set_dmaen(true)); - - transfer.blocking_wait(); - } - - /// Blocking write data, using DMA. - pub fn blocking_write_dma(&mut self, buf: &[u8], transaction: TransferConfig) - where - Dma: QuadDma, - { - self.setup_transaction(QspiMode::IndirectWrite, &transaction, Some(buf.len())); - - T::REGS.ccr().modify(|v| { - v.set_fmode(QspiMode::IndirectWrite.into()); - }); - - let request = self.dma.request(); - let transfer = unsafe { - Transfer::new_write( - &mut self.dma, - request, - buf, - T::REGS.dr().as_ptr() as *mut u8, - Default::default(), - ) - }; - - // STM32H7 does not have dmaen - #[cfg(not(stm32h7))] - T::REGS.cr().modify(|v| v.set_dmaen(true)); - - transfer.blocking_wait(); - } - fn setup_transaction(&mut self, fmode: QspiMode, transaction: &TransferConfig, data_len: Option) { T::REGS.fcr().modify(|v| { v.set_csmf(true); @@ -373,6 +234,160 @@ impl<'d, T: Instance, Dma> Qspi<'d, T, Dma> { } } +impl<'d, T: Instance> Qspi<'d, T, Blocking> { + /// Create a new QSPI driver for bank 1, in blocking mode. + pub fn new_blocking_bank1( + peri: impl Peripheral

+ 'd, + d0: impl Peripheral

> + 'd, + d1: impl Peripheral

> + 'd, + d2: impl Peripheral

> + 'd, + d3: impl Peripheral

> + 'd, + sck: impl Peripheral

> + 'd, + nss: impl Peripheral

> + 'd, + config: Config, + ) -> Self { + Self::new_inner( + peri, + new_pin!(d0, AFType::OutputPushPull, Speed::VeryHigh), + new_pin!(d1, AFType::OutputPushPull, Speed::VeryHigh), + new_pin!(d2, AFType::OutputPushPull, Speed::VeryHigh), + new_pin!(d3, AFType::OutputPushPull, Speed::VeryHigh), + new_pin!(sck, AFType::OutputPushPull, Speed::VeryHigh), + new_pin!(nss, AFType::OutputPushPull, Speed::VeryHigh, Pull::Up), + None, + config, + FlashSelection::Flash1, + ) + } + + /// Create a new QSPI driver for bank 2, in blocking mode. + pub fn new_blocking_bank2( + peri: impl Peripheral

+ 'd, + d0: impl Peripheral

> + 'd, + d1: impl Peripheral

> + 'd, + d2: impl Peripheral

> + 'd, + d3: impl Peripheral

> + 'd, + sck: impl Peripheral

> + 'd, + nss: impl Peripheral

> + 'd, + config: Config, + ) -> Self { + Self::new_inner( + peri, + new_pin!(d0, AFType::OutputPushPull, Speed::VeryHigh), + new_pin!(d1, AFType::OutputPushPull, Speed::VeryHigh), + new_pin!(d2, AFType::OutputPushPull, Speed::VeryHigh), + new_pin!(d3, AFType::OutputPushPull, Speed::VeryHigh), + new_pin!(sck, AFType::OutputPushPull, Speed::VeryHigh), + new_pin!(nss, AFType::OutputPushPull, Speed::VeryHigh, Pull::Up), + None, + config, + FlashSelection::Flash2, + ) + } +} + +impl<'d, T: Instance> Qspi<'d, T, Async> { + /// Create a new QSPI driver for bank 1. + pub fn new_bank1( + peri: impl Peripheral

+ 'd, + d0: impl Peripheral

> + 'd, + d1: impl Peripheral

> + 'd, + d2: impl Peripheral

> + 'd, + d3: impl Peripheral

> + 'd, + sck: impl Peripheral

> + 'd, + nss: impl Peripheral

> + 'd, + dma: impl Peripheral

> + 'd, + config: Config, + ) -> Self { + Self::new_inner( + peri, + new_pin!(d0, AFType::OutputPushPull, Speed::VeryHigh), + new_pin!(d1, AFType::OutputPushPull, Speed::VeryHigh), + new_pin!(d2, AFType::OutputPushPull, Speed::VeryHigh), + new_pin!(d3, AFType::OutputPushPull, Speed::VeryHigh), + new_pin!(sck, AFType::OutputPushPull, Speed::VeryHigh), + new_pin!(nss, AFType::OutputPushPull, Speed::VeryHigh, Pull::Up), + new_dma!(dma), + config, + FlashSelection::Flash1, + ) + } + + /// Create a new QSPI driver for bank 2. + pub fn new_bank2( + peri: impl Peripheral

+ 'd, + d0: impl Peripheral

> + 'd, + d1: impl Peripheral

> + 'd, + d2: impl Peripheral

> + 'd, + d3: impl Peripheral

> + 'd, + sck: impl Peripheral

> + 'd, + nss: impl Peripheral

> + 'd, + dma: impl Peripheral

> + 'd, + config: Config, + ) -> Self { + Self::new_inner( + peri, + new_pin!(d0, AFType::OutputPushPull, Speed::VeryHigh), + new_pin!(d1, AFType::OutputPushPull, Speed::VeryHigh), + new_pin!(d2, AFType::OutputPushPull, Speed::VeryHigh), + new_pin!(d3, AFType::OutputPushPull, Speed::VeryHigh), + new_pin!(sck, AFType::OutputPushPull, Speed::VeryHigh), + new_pin!(nss, AFType::OutputPushPull, Speed::VeryHigh, Pull::Up), + new_dma!(dma), + config, + FlashSelection::Flash2, + ) + } + + /// Blocking read data, using DMA. + pub fn blocking_read_dma(&mut self, buf: &mut [u8], transaction: TransferConfig) { + self.setup_transaction(QspiMode::IndirectWrite, &transaction, Some(buf.len())); + + T::REGS.ccr().modify(|v| { + v.set_fmode(QspiMode::IndirectRead.into()); + }); + let current_ar = T::REGS.ar().read().address(); + T::REGS.ar().write(|v| { + v.set_address(current_ar); + }); + + let transfer = unsafe { + self.dma + .as_mut() + .unwrap() + .read(T::REGS.dr().as_ptr() as *mut u8, buf, Default::default()) + }; + + // STM32H7 does not have dmaen + #[cfg(not(stm32h7))] + T::REGS.cr().modify(|v| v.set_dmaen(true)); + + transfer.blocking_wait(); + } + + /// Blocking write data, using DMA. + pub fn blocking_write_dma(&mut self, buf: &[u8], transaction: TransferConfig) { + self.setup_transaction(QspiMode::IndirectWrite, &transaction, Some(buf.len())); + + T::REGS.ccr().modify(|v| { + v.set_fmode(QspiMode::IndirectWrite.into()); + }); + + let transfer = unsafe { + self.dma + .as_mut() + .unwrap() + .write(buf, T::REGS.dr().as_ptr() as *mut u8, Default::default()) + }; + + // STM32H7 does not have dmaen + #[cfg(not(stm32h7))] + T::REGS.cr().modify(|v| v.set_dmaen(true)); + + transfer.blocking_wait(); + } +} + trait SealedInstance { const REGS: Regs; } diff --git a/examples/stm32f7/src/bin/qspi.rs b/examples/stm32f7/src/bin/qspi.rs index 005694db3..90d319b7a 100644 --- a/examples/stm32f7/src/bin/qspi.rs +++ b/examples/stm32f7/src/bin/qspi.rs @@ -4,8 +4,9 @@ use defmt::info; use embassy_executor::Spawner; +use embassy_stm32::mode::Async; use embassy_stm32::qspi::enums::{AddressSize, ChipSelectHighTime, FIFOThresholdLevel, MemorySize, *}; -use embassy_stm32::qspi::{Config as QspiCfg, Instance, Qspi, QuadDma, TransferConfig}; +use embassy_stm32::qspi::{Config as QspiCfg, Instance, Qspi, TransferConfig}; use embassy_stm32::time::mhz; use embassy_stm32::Config as StmCfg; use {defmt_rtt as _, panic_probe as _}; @@ -43,12 +44,12 @@ const MEMORY_ADDR: u32 = 0x00000000u32; /// Implementation of access to flash chip. /// Chip commands are hardcoded as it depends on used chip. /// This implementation is using chip GD25Q64C from Giga Device -pub struct FlashMemory> { - qspi: Qspi<'static, I, D>, +pub struct FlashMemory { + qspi: Qspi<'static, I, Async>, } -impl> FlashMemory { - pub fn new(qspi: Qspi<'static, I, D>) -> Self { +impl FlashMemory { + pub fn new(qspi: Qspi<'static, I, Async>) -> Self { let mut memory = Self { qspi }; memory.reset_memory(); @@ -279,7 +280,7 @@ async fn main(_spawner: Spawner) -> ! { cs_high_time: ChipSelectHighTime::_1Cycle, fifo_threshold: FIFOThresholdLevel::_16Bytes, }; - let driver = Qspi::new_bk1( + let driver = Qspi::new_bank1( p.QUADSPI, p.PF8, p.PF9, p.PE2, p.PF6, p.PF10, p.PB10, p.DMA2_CH7, config, ); let mut flash = FlashMemory::new(driver); From aee9d5902a4feb4a5fbb8d0e719401c96f3f651e Mon Sep 17 00:00:00 2001 From: Oliver Rockstedt Date: Wed, 22 May 2024 00:54:52 +0200 Subject: [PATCH 365/581] embassy-sync: fixed some documentation typos --- embassy-sync/src/once_lock.rs | 6 +++--- embassy-sync/src/priority_channel.rs | 2 +- embassy-sync/src/pubsub/mod.rs | 2 +- 3 files changed, 5 insertions(+), 5 deletions(-) diff --git a/embassy-sync/src/once_lock.rs b/embassy-sync/src/once_lock.rs index 9332ecfaf..55608ba32 100644 --- a/embassy-sync/src/once_lock.rs +++ b/embassy-sync/src/once_lock.rs @@ -1,4 +1,4 @@ -//! Syncronization primitive for initializing a value once, allowing others to await a reference to the value. +//! Synchronization primitive for initializing a value once, allowing others to await a reference to the value. use core::cell::Cell; use core::future::poll_fn; @@ -78,7 +78,7 @@ impl OnceLock { /// Set the underlying value. If the value is already set, this will return an error with the given value. pub fn init(&self, value: T) -> Result<(), T> { // Critical section is required to ensure that the value is - // not simultaniously initialized elsewhere at the same time. + // not simultaneously initialized elsewhere at the same time. critical_section::with(|_| { // If the value is not set, set it and return Ok. if !self.init.load(Ordering::Relaxed) { @@ -99,7 +99,7 @@ impl OnceLock { F: FnOnce() -> T, { // Critical section is required to ensure that the value is - // not simultaniously initialized elsewhere at the same time. + // not simultaneously initialized elsewhere at the same time. critical_section::with(|_| { // If the value is not set, set it. if !self.init.load(Ordering::Relaxed) { diff --git a/embassy-sync/src/priority_channel.rs b/embassy-sync/src/priority_channel.rs index 8572d3608..2954d1b76 100644 --- a/embassy-sync/src/priority_channel.rs +++ b/embassy-sync/src/priority_channel.rs @@ -335,7 +335,7 @@ where /// buffer is full, attempts to `send` new messages will wait until a message is /// received from the channel. /// -/// Sent data may be reordered based on their priorty within the channel. +/// Sent data may be reordered based on their priority within the channel. /// For example, in a [`Max`](heapless::binary_heap::Max) [`PriorityChannel`] /// containing `u32`'s, data sent in the following order `[1, 2, 3]` will be received as `[3, 2, 1]`. pub struct PriorityChannel diff --git a/embassy-sync/src/pubsub/mod.rs b/embassy-sync/src/pubsub/mod.rs index af3d6db2a..637336d9d 100644 --- a/embassy-sync/src/pubsub/mod.rs +++ b/embassy-sync/src/pubsub/mod.rs @@ -437,7 +437,7 @@ pub enum Error { trait SealedPubSubBehavior { /// Try to get a message from the queue with the given message id. /// - /// If the message is not yet present and a context is given, then its waker is registered in the subsriber wakers. + /// If the message is not yet present and a context is given, then its waker is registered in the subscriber wakers. fn get_message_with_context(&self, next_message_id: &mut u64, cx: Option<&mut Context<'_>>) -> Poll>; /// Get the amount of messages that are between the given the next_message_id and the most recent message. From ddbb6c8c31a558b82f8e2a13ddb364e371ec5776 Mon Sep 17 00:00:00 2001 From: Univa <41708691+Univa@users.noreply.github.com> Date: Tue, 21 May 2024 19:03:14 -0400 Subject: [PATCH 366/581] add back InternalChannel and implement it where its missing --- embassy-stm32/src/adc/f1.rs | 6 +++++- embassy-stm32/src/adc/f3.rs | 6 +++++- embassy-stm32/src/adc/f3_v1_1.rs | 6 +++++- embassy-stm32/src/adc/g4.rs | 8 +++++++- embassy-stm32/src/adc/mod.rs | 5 ++++- embassy-stm32/src/adc/v1.rs | 12 +++++++++++- embassy-stm32/src/adc/v2.rs | 8 +++++++- embassy-stm32/src/adc/v3.rs | 12 +++++++++++- embassy-stm32/src/adc/v4.rs | 8 +++++++- 9 files changed, 62 insertions(+), 9 deletions(-) diff --git a/embassy-stm32/src/adc/f1.rs b/embassy-stm32/src/adc/f1.rs index 3822d5032..cc7ffdea8 100644 --- a/embassy-stm32/src/adc/f1.rs +++ b/embassy-stm32/src/adc/f1.rs @@ -4,7 +4,7 @@ use core::task::Poll; use embassy_hal_internal::into_ref; -use super::blocking_delay_us; +use super::{blocking_delay_us, InternalChannel}; use crate::adc::{Adc, AdcChannel, Instance, SampleTime}; use crate::time::Hertz; use crate::{interrupt, Peripheral}; @@ -32,6 +32,8 @@ impl interrupt::typelevel::Handler for InterruptHandl } pub struct Vref; +impl InternalChannel for Vref {} +impl super::SealedInternalChannel for Vref {} impl AdcChannel for Vref {} impl super::SealedAdcChannel for Vref { fn channel(&self) -> u8 { @@ -40,6 +42,8 @@ impl super::SealedAdcChannel for Vref { } pub struct Temperature; +impl InternalChannel for Temperature {} +impl super::SealedInternalChannel for Temperature {} impl AdcChannel for Temperature {} impl super::SealedAdcChannel for Temperature { fn channel(&self) -> u8 { diff --git a/embassy-stm32/src/adc/f3.rs b/embassy-stm32/src/adc/f3.rs index 3f076d64b..363ddbe3a 100644 --- a/embassy-stm32/src/adc/f3.rs +++ b/embassy-stm32/src/adc/f3.rs @@ -4,7 +4,7 @@ use core::task::Poll; use embassy_hal_internal::into_ref; -use super::blocking_delay_us; +use super::{blocking_delay_us, InternalChannel}; use crate::adc::{Adc, AdcChannel, Instance, SampleTime}; use crate::interrupt::typelevel::Interrupt; use crate::time::Hertz; @@ -32,6 +32,8 @@ impl interrupt::typelevel::Handler for InterruptHandl } pub struct Vref; +impl InternalChannel for Vref {} +impl super::SealedInternalChannel for Vref {} impl AdcChannel for Vref {} impl super::SealedAdcChannel for Vref { fn channel(&self) -> u8 { @@ -47,6 +49,8 @@ impl Vref { } pub struct Temperature; +impl InternalChannel for Temperature {} +impl super::SealedInternalChannel for Temperature {} impl AdcChannel for Temperature {} impl super::SealedAdcChannel for Temperature { fn channel(&self) -> u8 { diff --git a/embassy-stm32/src/adc/f3_v1_1.rs b/embassy-stm32/src/adc/f3_v1_1.rs index 106956989..73bfe4876 100644 --- a/embassy-stm32/src/adc/f3_v1_1.rs +++ b/embassy-stm32/src/adc/f3_v1_1.rs @@ -6,7 +6,7 @@ use embassy_futures::yield_now; use embassy_hal_internal::into_ref; use embassy_time::Instant; -use super::Resolution; +use super::{InternalChannel, Resolution}; use crate::adc::{Adc, AdcChannel, Instance, SampleTime}; use crate::interrupt::typelevel::Interrupt; use crate::time::Hertz; @@ -64,6 +64,8 @@ fn update_vref(op: i8) { } pub struct Vref(core::marker::PhantomData); +impl InternalChannel for Vref {} +impl super::SealedInternalChannel for Vref {} impl AdcChannel for Vref {} impl super::SealedAdcChannel for Vref { fn channel(&self) -> u8 { @@ -123,6 +125,8 @@ impl Drop for Vref { } pub struct Temperature(core::marker::PhantomData); +impl InternalChannel for Temperature {} +impl super::SealedInternalChannel for Temperature {} impl AdcChannel for Temperature {} impl super::SealedAdcChannel for Temperature { fn channel(&self) -> u8 { diff --git a/embassy-stm32/src/adc/g4.rs b/embassy-stm32/src/adc/g4.rs index ce7f5db70..f9751bd92 100644 --- a/embassy-stm32/src/adc/g4.rs +++ b/embassy-stm32/src/adc/g4.rs @@ -2,7 +2,7 @@ use pac::adc::vals::{Adcaldif, Difsel, Exten}; use pac::adccommon::vals::Presc; -use super::{blocking_delay_us, Adc, AdcChannel, Instance, Resolution, SampleTime}; +use super::{blocking_delay_us, Adc, AdcChannel, Instance, InternalChannel, Resolution, SampleTime}; use crate::time::Hertz; use crate::{pac, Peripheral}; @@ -33,6 +33,8 @@ const VBAT_CHANNEL: u8 = 17; // NOTE: Vrefint/Temperature/Vbat are not available on all ADCs, this currently cannot be modeled with stm32-data, so these are available from the software on all ADCs /// Internal voltage reference channel. pub struct VrefInt; +impl InternalChannel for VrefInt {} +impl super::SealedInternalChannel for VrefInt {} impl AdcChannel for VrefInt {} impl super::SealedAdcChannel for VrefInt { fn channel(&self) -> u8 { @@ -42,6 +44,8 @@ impl super::SealedAdcChannel for VrefInt { /// Internal temperature channel. pub struct Temperature; +impl InternalChannel for Temperature {} +impl super::SealedInternalChannel for Temperature {} impl AdcChannel for Temperature {} impl super::SealedAdcChannel for Temperature { fn channel(&self) -> u8 { @@ -51,6 +55,8 @@ impl super::SealedAdcChannel for Temperature { /// Internal battery voltage channel. pub struct Vbat; +impl InternalChannel for Vbat {} +impl super::SealedInternalChannel for Vbat {} impl AdcChannel for Vbat {} impl super::SealedAdcChannel for Vbat { fn channel(&self) -> u8 { diff --git a/embassy-stm32/src/adc/mod.rs b/embassy-stm32/src/adc/mod.rs index 6a3d0f44c..3e62b6f3b 100644 --- a/embassy-stm32/src/adc/mod.rs +++ b/embassy-stm32/src/adc/mod.rs @@ -61,7 +61,7 @@ trait SealedInstance { } pub(crate) trait SealedAdcPin {} - +pub(crate) trait SealedInternalChannel {} pub(crate) trait SealedAdcChannel { #[cfg(any(adc_v1, adc_l0, adc_v2, adc_g4, adc_v4))] fn setup(&mut self) {} @@ -126,6 +126,9 @@ pub trait Instance: SealedInstance + crate::Peripheral

+ crate::rcc::R /// ADC pin. #[allow(private_bounds)] pub trait AdcPin: AdcChannel + SealedAdcPin {} +/// ADC internal channel. +#[allow(private_bounds)] +pub trait InternalChannel: SealedInternalChannel {} /// ADC channel. #[allow(private_bounds)] pub trait AdcChannel: SealedAdcChannel + Sized { diff --git a/embassy-stm32/src/adc/v1.rs b/embassy-stm32/src/adc/v1.rs index 090790c39..abd58952d 100644 --- a/embassy-stm32/src/adc/v1.rs +++ b/embassy-stm32/src/adc/v1.rs @@ -6,7 +6,7 @@ use embassy_hal_internal::into_ref; #[cfg(adc_l0)] use stm32_metapac::adc::vals::Ckmode; -use super::blocking_delay_us; +use super::{blocking_delay_us, InternalChannel}; use crate::adc::{Adc, AdcChannel, Instance, Resolution, SampleTime}; use crate::interrupt::typelevel::Interrupt; use crate::peripherals::ADC1; @@ -35,6 +35,12 @@ impl interrupt::typelevel::Handler for InterruptHandl #[cfg(not(adc_l0))] pub struct Vbat; +#[cfg(not(adc_l0))] +impl InternalChannel for Vbat {} + +#[cfg(not(adc_l0))] +impl super::SealedInternalChannel for Vbat {} + #[cfg(not(adc_l0))] impl AdcChannel for Vbat {} @@ -46,6 +52,8 @@ impl super::SealedAdcChannel for Vbat { } pub struct Vref; +impl InternalChannel for Vref {} +impl super::SealedInternalChannel for Vref {} impl AdcChannel for Vref {} impl super::SealedAdcChannel for Vref { fn channel(&self) -> u8 { @@ -54,6 +62,8 @@ impl super::SealedAdcChannel for Vref { } pub struct Temperature; +impl InternalChannel for Temperature {} +impl super::SealedInternalChannel for Temperature {} impl AdcChannel for Temperature {} impl super::SealedAdcChannel for Temperature { fn channel(&self) -> u8 { diff --git a/embassy-stm32/src/adc/v2.rs b/embassy-stm32/src/adc/v2.rs index 033108195..f7b791903 100644 --- a/embassy-stm32/src/adc/v2.rs +++ b/embassy-stm32/src/adc/v2.rs @@ -1,6 +1,6 @@ use embassy_hal_internal::into_ref; -use super::blocking_delay_us; +use super::{blocking_delay_us, InternalChannel}; use crate::adc::{Adc, AdcChannel, Instance, Resolution, SampleTime}; use crate::peripherals::ADC1; use crate::time::Hertz; @@ -12,6 +12,8 @@ pub const VREF_DEFAULT_MV: u32 = 3300; pub const VREF_CALIB_MV: u32 = 3300; pub struct VrefInt; +impl InternalChannel for VrefInt {} +impl super::SealedInternalChannel for VrefInt {} impl AdcChannel for VrefInt {} impl super::SealedAdcChannel for VrefInt { fn channel(&self) -> u8 { @@ -27,6 +29,8 @@ impl VrefInt { } pub struct Temperature; +impl InternalChannel for Temperature {} +impl super::SealedInternalChannel for Temperature {} impl AdcChannel for Temperature {} impl super::SealedAdcChannel for Temperature { fn channel(&self) -> u8 { @@ -48,6 +52,8 @@ impl Temperature { } pub struct Vbat; +impl InternalChannel for Vbat {} +impl super::SealedInternalChannel for Vbat {} impl AdcChannel for Vbat {} impl super::SealedAdcChannel for Vbat { fn channel(&self) -> u8 { diff --git a/embassy-stm32/src/adc/v3.rs b/embassy-stm32/src/adc/v3.rs index be857f4dd..36e0e3df3 100644 --- a/embassy-stm32/src/adc/v3.rs +++ b/embassy-stm32/src/adc/v3.rs @@ -1,7 +1,7 @@ use cfg_if::cfg_if; use embassy_hal_internal::into_ref; -use super::blocking_delay_us; +use super::{blocking_delay_us, InternalChannel}; use crate::adc::{Adc, AdcChannel, Instance, Resolution, SampleTime}; use crate::Peripheral; @@ -11,6 +11,8 @@ pub const VREF_DEFAULT_MV: u32 = 3300; pub const VREF_CALIB_MV: u32 = 3000; pub struct VrefInt; +impl InternalChannel for VrefInt {} +impl super::SealedInternalChannel for VrefInt {} impl AdcChannel for VrefInt {} impl super::SealedAdcChannel for VrefInt { fn channel(&self) -> u8 { @@ -30,6 +32,8 @@ impl super::SealedAdcChannel for VrefInt { } pub struct Temperature; +impl InternalChannel for Temperature {} +impl super::SealedInternalChannel for Temperature {} impl AdcChannel for Temperature {} impl super::SealedAdcChannel for Temperature { fn channel(&self) -> u8 { @@ -49,6 +53,8 @@ impl super::SealedAdcChannel for Temperature { } pub struct Vbat; +impl InternalChannel for Vbat {} +impl super::SealedInternalChannel for Vbat {} impl AdcChannel for Vbat {} impl super::SealedAdcChannel for Vbat { fn channel(&self) -> u8 { @@ -70,6 +76,8 @@ impl super::SealedAdcChannel for Vbat { cfg_if! { if #[cfg(adc_h5)] { pub struct VddCore; + impl InternalChannel for VddCore {} + impl super::SealedInternalChannel for VddCore {} impl AdcChannel for VddCore {} impl super::SealedAdcChannel for VddCore { fn channel(&self) -> u8 { @@ -82,6 +90,8 @@ cfg_if! { cfg_if! { if #[cfg(adc_u0)] { pub struct DacOut; + impl InternalChannel for DacOut {} + impl super::SealedInternalChannel for DacOut {} impl AdcChannel for DacOut {} impl super::SealedAdcChannel for DacOut { fn channel(&self) -> u8 { diff --git a/embassy-stm32/src/adc/v4.rs b/embassy-stm32/src/adc/v4.rs index f564114c2..bf3a55797 100644 --- a/embassy-stm32/src/adc/v4.rs +++ b/embassy-stm32/src/adc/v4.rs @@ -2,7 +2,7 @@ use pac::adc::vals::{Adcaldif, Boost, Difsel, Exten, Pcsel}; use pac::adccommon::vals::Presc; -use super::{blocking_delay_us, Adc, AdcChannel, Instance, Resolution, SampleTime}; +use super::{blocking_delay_us, Adc, AdcChannel, Instance, InternalChannel, Resolution, SampleTime}; use crate::time::Hertz; use crate::{pac, Peripheral}; @@ -33,6 +33,8 @@ const VBAT_CHANNEL: u8 = 17; // NOTE: Vrefint/Temperature/Vbat are not available on all ADCs, this currently cannot be modeled with stm32-data, so these are available from the software on all ADCs /// Internal voltage reference channel. pub struct VrefInt; +impl InternalChannel for VrefInt {} +impl super::SealedInternalChannel for VrefInt {} impl AdcChannel for VrefInt {} impl super::SealedAdcChannel for VrefInt { fn channel(&self) -> u8 { @@ -42,6 +44,8 @@ impl super::SealedAdcChannel for VrefInt { /// Internal temperature channel. pub struct Temperature; +impl InternalChannel for Temperature {} +impl super::SealedInternalChannel for Temperature {} impl AdcChannel for Temperature {} impl super::SealedAdcChannel for Temperature { fn channel(&self) -> u8 { @@ -51,6 +55,8 @@ impl super::SealedAdcChannel for Temperature { /// Internal battery voltage channel. pub struct Vbat; +impl InternalChannel for Vbat {} +impl super::SealedInternalChannel for Vbat {} impl AdcChannel for Vbat {} impl super::SealedAdcChannel for Vbat { fn channel(&self) -> u8 { From 41e11d86b9d2014c2d2b66dd55522a7dc77ac3d8 Mon Sep 17 00:00:00 2001 From: Univa <41708691+Univa@users.noreply.github.com> Date: Tue, 21 May 2024 19:08:01 -0400 Subject: [PATCH 367/581] make AdcChannel required for InternalChannel --- embassy-stm32/src/adc/mod.rs | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/embassy-stm32/src/adc/mod.rs b/embassy-stm32/src/adc/mod.rs index 3e62b6f3b..9a15b4434 100644 --- a/embassy-stm32/src/adc/mod.rs +++ b/embassy-stm32/src/adc/mod.rs @@ -128,7 +128,7 @@ pub trait Instance: SealedInstance + crate::Peripheral

+ crate::rcc::R pub trait AdcPin: AdcChannel + SealedAdcPin {} /// ADC internal channel. #[allow(private_bounds)] -pub trait InternalChannel: SealedInternalChannel {} +pub trait InternalChannel: AdcChannel + SealedInternalChannel {} /// ADC channel. #[allow(private_bounds)] pub trait AdcChannel: SealedAdcChannel + Sized { From bbeba7f014b383568e999650f0d954a33955ce73 Mon Sep 17 00:00:00 2001 From: Oliver Rockstedt Date: Wed, 22 May 2024 14:54:09 +0200 Subject: [PATCH 368/581] embassy-sync: Add clear function to all channels --- embassy-sync/CHANGELOG.md | 6 +++--- embassy-sync/src/channel.rs | 9 +++++++++ embassy-sync/src/priority_channel.rs | 9 +++++++++ embassy-sync/src/pubsub/mod.rs | 16 ++++++++++++++++ embassy-sync/src/pubsub/publisher.rs | 10 ++++++++++ embassy-sync/src/pubsub/subscriber.rs | 5 +++++ 6 files changed, 52 insertions(+), 3 deletions(-) diff --git a/embassy-sync/CHANGELOG.md b/embassy-sync/CHANGELOG.md index bb919b28a..e5c453ce2 100644 --- a/embassy-sync/CHANGELOG.md +++ b/embassy-sync/CHANGELOG.md @@ -7,9 +7,9 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0 ## Unreleased -- Add `capacity`, `free_capacity`, `len`, `is_empty` and `is_full` functions to `Channel`. -- Add `capacity`, `free_capacity`, `len`, `is_empty` and `is_full` functions to `PriorityChannel`. -- Add `capacity`, `free_capacity`, `len`, `is_empty` and `is_full` functions to `PubSubChannel`. +- Add `capacity`, `free_capacity`, `clear`, `len`, `is_empty` and `is_full` functions to `Channel`. +- Add `capacity`, `free_capacity`, `clear`, `len`, `is_empty` and `is_full` functions to `PriorityChannel`. +- Add `capacity`, `free_capacity`, `clear`, `len`, `is_empty` and `is_full` functions to `PubSubChannel`. - Made `PubSubBehavior` sealed - If you called `.publish_immediate(...)` on the queue directly before, then now call `.immediate_publisher().publish_immediate(...)` diff --git a/embassy-sync/src/channel.rs b/embassy-sync/src/channel.rs index b124a885f..55ac5fb66 100644 --- a/embassy-sync/src/channel.rs +++ b/embassy-sync/src/channel.rs @@ -477,6 +477,10 @@ impl ChannelState { } } + fn clear(&mut self) { + self.queue.clear(); + } + fn len(&self) -> usize { self.queue.len() } @@ -632,6 +636,11 @@ where N - self.len() } + /// Clears all elements in the channel. + pub fn clear(&self) { + self.lock(|c| c.clear()); + } + /// Returns the number of elements currently in the channel. pub fn len(&self) -> usize { self.lock(|c| c.len()) diff --git a/embassy-sync/src/priority_channel.rs b/embassy-sync/src/priority_channel.rs index 2954d1b76..24c6c5a7f 100644 --- a/embassy-sync/src/priority_channel.rs +++ b/embassy-sync/src/priority_channel.rs @@ -315,6 +315,10 @@ where } } + fn clear(&mut self) { + self.queue.clear(); + } + fn len(&self) -> usize { self.queue.len() } @@ -458,6 +462,11 @@ where N - self.len() } + /// Clears all elements in the channel. + pub fn clear(&self) { + self.lock(|c| c.clear()); + } + /// Returns the number of elements currently in the channel. pub fn len(&self) -> usize { self.lock(|c| c.len()) diff --git a/embassy-sync/src/pubsub/mod.rs b/embassy-sync/src/pubsub/mod.rs index 637336d9d..66c9b0017 100644 --- a/embassy-sync/src/pubsub/mod.rs +++ b/embassy-sync/src/pubsub/mod.rs @@ -173,6 +173,11 @@ impl usize { self.inner.lock(|inner| inner.borrow().len()) @@ -270,6 +275,10 @@ impl usize { self.len() } @@ -407,6 +416,10 @@ impl PubSubSta self.publisher_count -= 1; } + fn clear(&mut self) { + self.queue.clear(); + } + fn len(&self) -> usize { self.queue.len() } @@ -460,6 +473,9 @@ trait SealedPubSubBehavior { /// This is equivalent to `capacity() - len()` fn free_capacity(&self) -> usize; + /// Clears all elements in the channel. + fn clear(&self); + /// Returns the number of elements currently in the channel. fn len(&self) -> usize; diff --git a/embassy-sync/src/pubsub/publisher.rs b/embassy-sync/src/pubsub/publisher.rs index 26e2c63b7..e66b3b1db 100644 --- a/embassy-sync/src/pubsub/publisher.rs +++ b/embassy-sync/src/pubsub/publisher.rs @@ -55,6 +55,11 @@ impl<'a, PSB: PubSubBehavior + ?Sized, T: Clone> Pub<'a, PSB, T> { self.channel.free_capacity() } + /// Clears all elements in the ***channel***. + pub fn clear(&self) { + self.channel.clear(); + } + /// Returns the number of elements currently in the ***channel***. pub fn len(&self) -> usize { self.channel.len() @@ -155,6 +160,11 @@ impl<'a, PSB: PubSubBehavior + ?Sized, T: Clone> ImmediatePub<'a, PSB, T> { self.channel.free_capacity() } + /// Clears all elements in the ***channel***. + pub fn clear(&self) { + self.channel.clear(); + } + /// Returns the number of elements currently in the ***channel***. pub fn len(&self) -> usize { self.channel.len() diff --git a/embassy-sync/src/pubsub/subscriber.rs b/embassy-sync/src/pubsub/subscriber.rs index 2e2bd26a9..6ad660cb3 100644 --- a/embassy-sync/src/pubsub/subscriber.rs +++ b/embassy-sync/src/pubsub/subscriber.rs @@ -83,6 +83,11 @@ impl<'a, PSB: PubSubBehavior + ?Sized, T: Clone> Sub<'a, PSB, T> { self.channel.free_capacity() } + /// Clears all elements in the ***channel***. + pub fn clear(&self) { + self.channel.clear(); + } + /// Returns the number of elements currently in the ***channel***. /// See [Self::available] for how many messages are available for this subscriber. pub fn len(&self) -> usize { From 94e559eba7b0b0031e2ceaebd96f0343d6173139 Mon Sep 17 00:00:00 2001 From: Scott Mabin Date: Wed, 22 May 2024 22:28:03 +0100 Subject: [PATCH 369/581] Don't teardown during reconfigure --- embassy-stm32/src/usart/ringbuffered.rs | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/embassy-stm32/src/usart/ringbuffered.rs b/embassy-stm32/src/usart/ringbuffered.rs index 7ab6cbda7..0a6491bd5 100644 --- a/embassy-stm32/src/usart/ringbuffered.rs +++ b/embassy-stm32/src/usart/ringbuffered.rs @@ -72,9 +72,8 @@ impl<'d, T: BasicInstance> RingBufferedUartRx<'d, T> { Err(err) } - /// Cleanly stop and reconfigure the driver + /// Reconfigure the driver pub fn set_config(&mut self, config: &Config) -> Result<(), ConfigError> { - self.teardown_uart(); reconfigure::(config) } From 2f7bba4668006ed3124adf6c94efeb2169d79a9c Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Jo=C3=ABl=20Schulz-Ansres?= Date: Wed, 22 May 2024 23:44:34 +0200 Subject: [PATCH 370/581] Use ODR register for Pull::Up or Down --- embassy-stm32/src/gpio.rs | 22 ++++++++++++---------- 1 file changed, 12 insertions(+), 10 deletions(-) diff --git a/embassy-stm32/src/gpio.rs b/embassy-stm32/src/gpio.rs index 7de223455..3fb7fda57 100644 --- a/embassy-stm32/src/gpio.rs +++ b/embassy-stm32/src/gpio.rs @@ -689,17 +689,19 @@ pub(crate) trait SealedPin { #[cfg(gpio_v1)] { let crlh = if n < 8 { 0 } else { 1 }; - match r.cr(crlh).cnf(n % 8) { - vals::CnfIn::FLOATING => Pull::None, - _ => { - if r.bsrr().read().bs(n % 8) { - Pull::Up - } else if r.bsrr().read().br(n % 8) { - Pull::Down - } else { - Pull::None + match r.cr(crlh).read().mode(n % 8) { + vals::Mode::INPUT => { + match r.cr(crlh).read().cnf_in(n % 8) { + vals::CnfIn::PULL => { + match r.odr().read().odr(n % 8) { + vals::Odr::LOW => Pull::Down, + vals::Odr::HIGH => Pull::Up + } + }, + _ => Pull::None } - } + }, + _ => Pull::None } } #[cfg(gpio_v2)] From 89017d338f407e8e5319cccf97b2d47900f58b81 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Jo=C3=ABl=20Schulz-Ansres?= Date: Wed, 22 May 2024 23:45:26 +0200 Subject: [PATCH 371/581] Cargo format --- embassy-stm32/src/gpio.rs | 18 +++++++----------- 1 file changed, 7 insertions(+), 11 deletions(-) diff --git a/embassy-stm32/src/gpio.rs b/embassy-stm32/src/gpio.rs index 3fb7fda57..fb3b79a36 100644 --- a/embassy-stm32/src/gpio.rs +++ b/embassy-stm32/src/gpio.rs @@ -690,18 +690,14 @@ pub(crate) trait SealedPin { { let crlh = if n < 8 { 0 } else { 1 }; match r.cr(crlh).read().mode(n % 8) { - vals::Mode::INPUT => { - match r.cr(crlh).read().cnf_in(n % 8) { - vals::CnfIn::PULL => { - match r.odr().read().odr(n % 8) { - vals::Odr::LOW => Pull::Down, - vals::Odr::HIGH => Pull::Up - } - }, - _ => Pull::None - } + vals::Mode::INPUT => match r.cr(crlh).read().cnf_in(n % 8) { + vals::CnfIn::PULL => match r.odr().read().odr(n % 8) { + vals::Odr::LOW => Pull::Down, + vals::Odr::HIGH => Pull::Up, + }, + _ => Pull::None, }, - _ => Pull::None + _ => Pull::None, } } #[cfg(gpio_v2)] From 27e8ef6e7e720a3c74f7c696ab105915695431c5 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Jo=C3=ABl=20Schulz-Ansres?= Date: Wed, 22 May 2024 23:49:48 +0200 Subject: [PATCH 372/581] Remove Speed::Input in order to move it into separate PR --- embassy-stm32/src/gpio.rs | 3 --- embassy-stm32/src/spi/mod.rs | 4 ++-- 2 files changed, 2 insertions(+), 5 deletions(-) diff --git a/embassy-stm32/src/gpio.rs b/embassy-stm32/src/gpio.rs index fb3b79a36..9f28c8ec2 100644 --- a/embassy-stm32/src/gpio.rs +++ b/embassy-stm32/src/gpio.rs @@ -265,7 +265,6 @@ impl From for vals::Pupdr { #[derive(Debug, Copy, Clone)] #[cfg_attr(feature = "defmt", derive(defmt::Format))] pub enum Speed { - Input, Low, Medium, #[cfg(not(any(syscfg_f0, gpio_v1)))] @@ -279,7 +278,6 @@ impl From for vals::Mode { use Speed::*; match speed { - Input => vals::Mode::INPUT, Low => vals::Mode::OUTPUT2MHZ, Medium => vals::Mode::OUTPUT10MHZ, VeryHigh => vals::Mode::OUTPUT50MHZ, @@ -293,7 +291,6 @@ impl From for vals::Ospeedr { use Speed::*; match speed { - Input => vals::Ospeedr::LOWSPEED, Low => vals::Ospeedr::LOWSPEED, Medium => vals::Ospeedr::MEDIUMSPEED, #[cfg(not(syscfg_f0))] diff --git a/embassy-stm32/src/spi/mod.rs b/embassy-stm32/src/spi/mod.rs index 76d58def6..24159adce 100644 --- a/embassy-stm32/src/spi/mod.rs +++ b/embassy-stm32/src/spi/mod.rs @@ -430,7 +430,7 @@ impl<'d, T: Instance> Spi<'d, T, Blocking> { new_pin!( miso, AFType::Input, - Speed::Input, + Speed::VeryHigh, match config.miso_pullup { true => Pull::Up, false => Pull::None, @@ -456,7 +456,7 @@ impl<'d, T: Instance> Spi<'d, T, Blocking> { new_pin!( miso, AFType::Input, - Speed::Input, + Speed::VeryHigh, match config.miso_pullup { true => Pull::Up, false => Pull::None, From 4e9206efb8fa49ad2ea0b5420db1d0e4cc22b6cc Mon Sep 17 00:00:00 2001 From: Univa <41708691+Univa@users.noreply.github.com> Date: Wed, 22 May 2024 19:00:48 -0400 Subject: [PATCH 373/581] remove InternalChannel and AdcPin --- embassy-stm32/src/adc/f1.rs | 6 +----- embassy-stm32/src/adc/f3.rs | 6 +----- embassy-stm32/src/adc/f3_v1_1.rs | 6 +----- embassy-stm32/src/adc/g4.rs | 8 +------- embassy-stm32/src/adc/mod.rs | 11 ----------- embassy-stm32/src/adc/v1.rs | 12 +----------- embassy-stm32/src/adc/v2.rs | 8 +------- embassy-stm32/src/adc/v3.rs | 12 +----------- embassy-stm32/src/adc/v4.rs | 8 +------- 9 files changed, 8 insertions(+), 69 deletions(-) diff --git a/embassy-stm32/src/adc/f1.rs b/embassy-stm32/src/adc/f1.rs index cc7ffdea8..3822d5032 100644 --- a/embassy-stm32/src/adc/f1.rs +++ b/embassy-stm32/src/adc/f1.rs @@ -4,7 +4,7 @@ use core::task::Poll; use embassy_hal_internal::into_ref; -use super::{blocking_delay_us, InternalChannel}; +use super::blocking_delay_us; use crate::adc::{Adc, AdcChannel, Instance, SampleTime}; use crate::time::Hertz; use crate::{interrupt, Peripheral}; @@ -32,8 +32,6 @@ impl interrupt::typelevel::Handler for InterruptHandl } pub struct Vref; -impl InternalChannel for Vref {} -impl super::SealedInternalChannel for Vref {} impl AdcChannel for Vref {} impl super::SealedAdcChannel for Vref { fn channel(&self) -> u8 { @@ -42,8 +40,6 @@ impl super::SealedAdcChannel for Vref { } pub struct Temperature; -impl InternalChannel for Temperature {} -impl super::SealedInternalChannel for Temperature {} impl AdcChannel for Temperature {} impl super::SealedAdcChannel for Temperature { fn channel(&self) -> u8 { diff --git a/embassy-stm32/src/adc/f3.rs b/embassy-stm32/src/adc/f3.rs index 363ddbe3a..3f076d64b 100644 --- a/embassy-stm32/src/adc/f3.rs +++ b/embassy-stm32/src/adc/f3.rs @@ -4,7 +4,7 @@ use core::task::Poll; use embassy_hal_internal::into_ref; -use super::{blocking_delay_us, InternalChannel}; +use super::blocking_delay_us; use crate::adc::{Adc, AdcChannel, Instance, SampleTime}; use crate::interrupt::typelevel::Interrupt; use crate::time::Hertz; @@ -32,8 +32,6 @@ impl interrupt::typelevel::Handler for InterruptHandl } pub struct Vref; -impl InternalChannel for Vref {} -impl super::SealedInternalChannel for Vref {} impl AdcChannel for Vref {} impl super::SealedAdcChannel for Vref { fn channel(&self) -> u8 { @@ -49,8 +47,6 @@ impl Vref { } pub struct Temperature; -impl InternalChannel for Temperature {} -impl super::SealedInternalChannel for Temperature {} impl AdcChannel for Temperature {} impl super::SealedAdcChannel for Temperature { fn channel(&self) -> u8 { diff --git a/embassy-stm32/src/adc/f3_v1_1.rs b/embassy-stm32/src/adc/f3_v1_1.rs index 73bfe4876..106956989 100644 --- a/embassy-stm32/src/adc/f3_v1_1.rs +++ b/embassy-stm32/src/adc/f3_v1_1.rs @@ -6,7 +6,7 @@ use embassy_futures::yield_now; use embassy_hal_internal::into_ref; use embassy_time::Instant; -use super::{InternalChannel, Resolution}; +use super::Resolution; use crate::adc::{Adc, AdcChannel, Instance, SampleTime}; use crate::interrupt::typelevel::Interrupt; use crate::time::Hertz; @@ -64,8 +64,6 @@ fn update_vref(op: i8) { } pub struct Vref(core::marker::PhantomData); -impl InternalChannel for Vref {} -impl super::SealedInternalChannel for Vref {} impl AdcChannel for Vref {} impl super::SealedAdcChannel for Vref { fn channel(&self) -> u8 { @@ -125,8 +123,6 @@ impl Drop for Vref { } pub struct Temperature(core::marker::PhantomData); -impl InternalChannel for Temperature {} -impl super::SealedInternalChannel for Temperature {} impl AdcChannel for Temperature {} impl super::SealedAdcChannel for Temperature { fn channel(&self) -> u8 { diff --git a/embassy-stm32/src/adc/g4.rs b/embassy-stm32/src/adc/g4.rs index f9751bd92..ce7f5db70 100644 --- a/embassy-stm32/src/adc/g4.rs +++ b/embassy-stm32/src/adc/g4.rs @@ -2,7 +2,7 @@ use pac::adc::vals::{Adcaldif, Difsel, Exten}; use pac::adccommon::vals::Presc; -use super::{blocking_delay_us, Adc, AdcChannel, Instance, InternalChannel, Resolution, SampleTime}; +use super::{blocking_delay_us, Adc, AdcChannel, Instance, Resolution, SampleTime}; use crate::time::Hertz; use crate::{pac, Peripheral}; @@ -33,8 +33,6 @@ const VBAT_CHANNEL: u8 = 17; // NOTE: Vrefint/Temperature/Vbat are not available on all ADCs, this currently cannot be modeled with stm32-data, so these are available from the software on all ADCs /// Internal voltage reference channel. pub struct VrefInt; -impl InternalChannel for VrefInt {} -impl super::SealedInternalChannel for VrefInt {} impl AdcChannel for VrefInt {} impl super::SealedAdcChannel for VrefInt { fn channel(&self) -> u8 { @@ -44,8 +42,6 @@ impl super::SealedAdcChannel for VrefInt { /// Internal temperature channel. pub struct Temperature; -impl InternalChannel for Temperature {} -impl super::SealedInternalChannel for Temperature {} impl AdcChannel for Temperature {} impl super::SealedAdcChannel for Temperature { fn channel(&self) -> u8 { @@ -55,8 +51,6 @@ impl super::SealedAdcChannel for Temperature { /// Internal battery voltage channel. pub struct Vbat; -impl InternalChannel for Vbat {} -impl super::SealedInternalChannel for Vbat {} impl AdcChannel for Vbat {} impl super::SealedAdcChannel for Vbat { fn channel(&self) -> u8 { diff --git a/embassy-stm32/src/adc/mod.rs b/embassy-stm32/src/adc/mod.rs index 9a15b4434..040ee9c53 100644 --- a/embassy-stm32/src/adc/mod.rs +++ b/embassy-stm32/src/adc/mod.rs @@ -60,8 +60,6 @@ trait SealedInstance { fn state() -> &'static State; } -pub(crate) trait SealedAdcPin {} -pub(crate) trait SealedInternalChannel {} pub(crate) trait SealedAdcChannel { #[cfg(any(adc_v1, adc_l0, adc_v2, adc_g4, adc_v4))] fn setup(&mut self) {} @@ -123,12 +121,6 @@ pub trait Instance: SealedInstance + crate::Peripheral

+ crate::rcc::R type Interrupt: crate::interrupt::typelevel::Interrupt; } -/// ADC pin. -#[allow(private_bounds)] -pub trait AdcPin: AdcChannel + SealedAdcPin {} -/// ADC internal channel. -#[allow(private_bounds)] -pub trait InternalChannel: AdcChannel + SealedInternalChannel {} /// ADC channel. #[allow(private_bounds)] pub trait AdcChannel: SealedAdcChannel + Sized { @@ -187,9 +179,6 @@ foreach_adc!( macro_rules! impl_adc_pin { ($inst:ident, $pin:ident, $ch:expr) => { - impl crate::adc::AdcPin for crate::peripherals::$pin {} - impl crate::adc::SealedAdcPin for crate::peripherals::$pin {} - impl crate::adc::AdcChannel for crate::peripherals::$pin {} impl crate::adc::SealedAdcChannel for crate::peripherals::$pin { #[cfg(any(adc_v1, adc_l0, adc_v2, adc_g4, adc_v4))] diff --git a/embassy-stm32/src/adc/v1.rs b/embassy-stm32/src/adc/v1.rs index abd58952d..090790c39 100644 --- a/embassy-stm32/src/adc/v1.rs +++ b/embassy-stm32/src/adc/v1.rs @@ -6,7 +6,7 @@ use embassy_hal_internal::into_ref; #[cfg(adc_l0)] use stm32_metapac::adc::vals::Ckmode; -use super::{blocking_delay_us, InternalChannel}; +use super::blocking_delay_us; use crate::adc::{Adc, AdcChannel, Instance, Resolution, SampleTime}; use crate::interrupt::typelevel::Interrupt; use crate::peripherals::ADC1; @@ -35,12 +35,6 @@ impl interrupt::typelevel::Handler for InterruptHandl #[cfg(not(adc_l0))] pub struct Vbat; -#[cfg(not(adc_l0))] -impl InternalChannel for Vbat {} - -#[cfg(not(adc_l0))] -impl super::SealedInternalChannel for Vbat {} - #[cfg(not(adc_l0))] impl AdcChannel for Vbat {} @@ -52,8 +46,6 @@ impl super::SealedAdcChannel for Vbat { } pub struct Vref; -impl InternalChannel for Vref {} -impl super::SealedInternalChannel for Vref {} impl AdcChannel for Vref {} impl super::SealedAdcChannel for Vref { fn channel(&self) -> u8 { @@ -62,8 +54,6 @@ impl super::SealedAdcChannel for Vref { } pub struct Temperature; -impl InternalChannel for Temperature {} -impl super::SealedInternalChannel for Temperature {} impl AdcChannel for Temperature {} impl super::SealedAdcChannel for Temperature { fn channel(&self) -> u8 { diff --git a/embassy-stm32/src/adc/v2.rs b/embassy-stm32/src/adc/v2.rs index f7b791903..033108195 100644 --- a/embassy-stm32/src/adc/v2.rs +++ b/embassy-stm32/src/adc/v2.rs @@ -1,6 +1,6 @@ use embassy_hal_internal::into_ref; -use super::{blocking_delay_us, InternalChannel}; +use super::blocking_delay_us; use crate::adc::{Adc, AdcChannel, Instance, Resolution, SampleTime}; use crate::peripherals::ADC1; use crate::time::Hertz; @@ -12,8 +12,6 @@ pub const VREF_DEFAULT_MV: u32 = 3300; pub const VREF_CALIB_MV: u32 = 3300; pub struct VrefInt; -impl InternalChannel for VrefInt {} -impl super::SealedInternalChannel for VrefInt {} impl AdcChannel for VrefInt {} impl super::SealedAdcChannel for VrefInt { fn channel(&self) -> u8 { @@ -29,8 +27,6 @@ impl VrefInt { } pub struct Temperature; -impl InternalChannel for Temperature {} -impl super::SealedInternalChannel for Temperature {} impl AdcChannel for Temperature {} impl super::SealedAdcChannel for Temperature { fn channel(&self) -> u8 { @@ -52,8 +48,6 @@ impl Temperature { } pub struct Vbat; -impl InternalChannel for Vbat {} -impl super::SealedInternalChannel for Vbat {} impl AdcChannel for Vbat {} impl super::SealedAdcChannel for Vbat { fn channel(&self) -> u8 { diff --git a/embassy-stm32/src/adc/v3.rs b/embassy-stm32/src/adc/v3.rs index 36e0e3df3..be857f4dd 100644 --- a/embassy-stm32/src/adc/v3.rs +++ b/embassy-stm32/src/adc/v3.rs @@ -1,7 +1,7 @@ use cfg_if::cfg_if; use embassy_hal_internal::into_ref; -use super::{blocking_delay_us, InternalChannel}; +use super::blocking_delay_us; use crate::adc::{Adc, AdcChannel, Instance, Resolution, SampleTime}; use crate::Peripheral; @@ -11,8 +11,6 @@ pub const VREF_DEFAULT_MV: u32 = 3300; pub const VREF_CALIB_MV: u32 = 3000; pub struct VrefInt; -impl InternalChannel for VrefInt {} -impl super::SealedInternalChannel for VrefInt {} impl AdcChannel for VrefInt {} impl super::SealedAdcChannel for VrefInt { fn channel(&self) -> u8 { @@ -32,8 +30,6 @@ impl super::SealedAdcChannel for VrefInt { } pub struct Temperature; -impl InternalChannel for Temperature {} -impl super::SealedInternalChannel for Temperature {} impl AdcChannel for Temperature {} impl super::SealedAdcChannel for Temperature { fn channel(&self) -> u8 { @@ -53,8 +49,6 @@ impl super::SealedAdcChannel for Temperature { } pub struct Vbat; -impl InternalChannel for Vbat {} -impl super::SealedInternalChannel for Vbat {} impl AdcChannel for Vbat {} impl super::SealedAdcChannel for Vbat { fn channel(&self) -> u8 { @@ -76,8 +70,6 @@ impl super::SealedAdcChannel for Vbat { cfg_if! { if #[cfg(adc_h5)] { pub struct VddCore; - impl InternalChannel for VddCore {} - impl super::SealedInternalChannel for VddCore {} impl AdcChannel for VddCore {} impl super::SealedAdcChannel for VddCore { fn channel(&self) -> u8 { @@ -90,8 +82,6 @@ cfg_if! { cfg_if! { if #[cfg(adc_u0)] { pub struct DacOut; - impl InternalChannel for DacOut {} - impl super::SealedInternalChannel for DacOut {} impl AdcChannel for DacOut {} impl super::SealedAdcChannel for DacOut { fn channel(&self) -> u8 { diff --git a/embassy-stm32/src/adc/v4.rs b/embassy-stm32/src/adc/v4.rs index bf3a55797..f564114c2 100644 --- a/embassy-stm32/src/adc/v4.rs +++ b/embassy-stm32/src/adc/v4.rs @@ -2,7 +2,7 @@ use pac::adc::vals::{Adcaldif, Boost, Difsel, Exten, Pcsel}; use pac::adccommon::vals::Presc; -use super::{blocking_delay_us, Adc, AdcChannel, Instance, InternalChannel, Resolution, SampleTime}; +use super::{blocking_delay_us, Adc, AdcChannel, Instance, Resolution, SampleTime}; use crate::time::Hertz; use crate::{pac, Peripheral}; @@ -33,8 +33,6 @@ const VBAT_CHANNEL: u8 = 17; // NOTE: Vrefint/Temperature/Vbat are not available on all ADCs, this currently cannot be modeled with stm32-data, so these are available from the software on all ADCs /// Internal voltage reference channel. pub struct VrefInt; -impl InternalChannel for VrefInt {} -impl super::SealedInternalChannel for VrefInt {} impl AdcChannel for VrefInt {} impl super::SealedAdcChannel for VrefInt { fn channel(&self) -> u8 { @@ -44,8 +42,6 @@ impl super::SealedAdcChannel for VrefInt { /// Internal temperature channel. pub struct Temperature; -impl InternalChannel for Temperature {} -impl super::SealedInternalChannel for Temperature {} impl AdcChannel for Temperature {} impl super::SealedAdcChannel for Temperature { fn channel(&self) -> u8 { @@ -55,8 +51,6 @@ impl super::SealedAdcChannel for Temperature { /// Internal battery voltage channel. pub struct Vbat; -impl InternalChannel for Vbat {} -impl super::SealedInternalChannel for Vbat {} impl AdcChannel for Vbat {} impl super::SealedAdcChannel for Vbat { fn channel(&self) -> u8 { From 495a29ad6ef875a0f2db150fa447bb949808ee7a Mon Sep 17 00:00:00 2001 From: James Munns Date: Thu, 23 May 2024 09:57:10 +0200 Subject: [PATCH 374/581] Explicitly license the book prose CC-BY-SA This matches the Rust Embedded books --- LICENSE-CC-BY-SA | 428 +++++++++++++++++++++++++++++++++++++++++++++++ docs/README.md | 20 +++ 2 files changed, 448 insertions(+) create mode 100644 LICENSE-CC-BY-SA diff --git a/LICENSE-CC-BY-SA b/LICENSE-CC-BY-SA new file mode 100644 index 000000000..a73481c4b --- /dev/null +++ b/LICENSE-CC-BY-SA @@ -0,0 +1,428 @@ +Attribution-ShareAlike 4.0 International + +======================================================================= + +Creative Commons Corporation ("Creative Commons") is not a law firm and +does not provide legal services or legal advice. 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For +the avoidance of doubt, this paragraph does not form part of the +public licenses. + +Creative Commons may be contacted at creativecommons.org. + diff --git a/docs/README.md b/docs/README.md index 94ebd7a05..d766a86d9 100644 --- a/docs/README.md +++ b/docs/README.md @@ -7,3 +7,23 @@ make ``` Then open the generated file `thebook/index.html`. + +## License + +The Embassy Docs (this folder) is distributed under the following licenses: + +* The code samples and free-standing Cargo projects contained within these docs are licensed under the terms of both the [MIT License] and the [Apache License v2.0]. +* The written prose contained within these docs are licensed under the terms of the Creative Commons [CC-BY-SA v4.0] license. + +Copies of the licenses used by this project may also be found here: + +* [MIT License Hosted] +* [Apache License v2.0 Hosted] +* [CC-BY-SA v4.0 Hosted] + +[MIT License]: ./../LICENSE-MIT +[Apache License v2.0]: ./../LICENSE-APACHE +[CC-BY-SA v4.0]: ./../LICENSE-CC-BY-SA +[MIT License Hosted]: https://opensource.org/licenses/MIT +[Apache License v2.0 Hosted]: http://www.apache.org/licenses/LICENSE-2.0 +[CC-BY-SA v4.0 Hosted]: https://creativecommons.org/licenses/by-sa/4.0/legalcode From 183f2f6913032600d74ea058b50a1fcedbebe719 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Jan=20=C5=A0pa=C4=8Dek?= Date: Thu, 18 Apr 2024 18:50:30 +0200 Subject: [PATCH 375/581] stm32/usart: remove instance generic params --- embassy-stm32/build.rs | 6 +- embassy-stm32/src/usart/buffered.rs | 372 ++++++++------- embassy-stm32/src/usart/mod.rs | 456 ++++++++++--------- embassy-stm32/src/usart/ringbuffered.rs | 57 +-- examples/stm32h5/src/bin/usart_split.rs | 3 +- examples/stm32h7/src/bin/usart_split.rs | 3 +- examples/stm32h7rs/src/bin/usart_split.rs | 3 +- tests/stm32/src/bin/usart_rx_ringbuffered.rs | 4 +- 8 files changed, 470 insertions(+), 434 deletions(-) diff --git a/embassy-stm32/build.rs b/embassy-stm32/build.rs index 4eed6fe7d..7bf6ffba2 100644 --- a/embassy-stm32/build.rs +++ b/embassy-stm32/build.rs @@ -387,7 +387,6 @@ fn main() { struct ClockGen<'a> { rcc_registers: &'a PeripheralRegisters, chained_muxes: HashMap<&'a str, &'a PeripheralRccRegister>, - force_refcount: HashSet<&'a str>, refcount_statics: BTreeSet, clock_names: BTreeSet, @@ -397,7 +396,6 @@ fn main() { let mut clock_gen = ClockGen { rcc_registers, chained_muxes: HashMap::new(), - force_refcount: HashSet::from(["usart"]), refcount_statics: BTreeSet::new(), clock_names: BTreeSet::new(), @@ -542,7 +540,6 @@ fn main() { None => (TokenStream::new(), TokenStream::new()), }; - let ptype = if let Some(reg) = &p.registers { reg.kind } else { "" }; let pname = format_ident!("{}", p.name); let en_reg = format_ident!("{}", en.register.to_ascii_lowercase()); let set_en_field = format_ident!("set_{}", en.field.to_ascii_lowercase()); @@ -570,8 +567,7 @@ fn main() { }; let en_bit_offs: u8 = en_bit_offs.offset.try_into().unwrap(); - let refcount = - clock_gen.force_refcount.contains(ptype) || *rcc_field_count.get(&(en.register, en.field)).unwrap() > 1; + let refcount = *rcc_field_count.get(&(en.register, en.field)).unwrap() > 1; let (before_enable, before_disable) = if refcount { let refcount_static = format_ident!("{}_{}", en.register.to_ascii_uppercase(), en.field.to_ascii_uppercase()); diff --git a/embassy-stm32/src/usart/buffered.rs b/embassy-stm32/src/usart/buffered.rs index 52011cd1f..492ad334b 100644 --- a/embassy-stm32/src/usart/buffered.rs +++ b/embassy-stm32/src/usart/buffered.rs @@ -1,7 +1,7 @@ use core::future::poll_fn; use core::marker::PhantomData; use core::slice; -use core::sync::atomic::{AtomicBool, Ordering}; +use core::sync::atomic::{AtomicBool, AtomicU8, Ordering}; use core::task::Poll; use embassy_embedded_hal::SetConfig; @@ -12,154 +12,163 @@ use embassy_sync::waitqueue::AtomicWaker; #[cfg(not(any(usart_v1, usart_v2)))] use super::DePin; use super::{ - clear_interrupt_flags, configure, rdr, reconfigure, sr, tdr, BasicInstance, Config, ConfigError, CtsPin, Error, - RtsPin, RxPin, TxPin, + clear_interrupt_flags, configure, rdr, reconfigure, sr, tdr, Config, ConfigError, CtsPin, Error, Info, Instance, + Regs, RtsPin, RxPin, TxPin, }; use crate::gpio::AFType; -use crate::interrupt; -use crate::interrupt::typelevel::Interrupt; +use crate::interrupt::typelevel::Interrupt as _; +use crate::interrupt::{self, InterruptExt}; +use crate::time::Hertz; /// Interrupt handler. -pub struct InterruptHandler { +pub struct InterruptHandler { _phantom: PhantomData, } -impl interrupt::typelevel::Handler for InterruptHandler { +impl interrupt::typelevel::Handler for InterruptHandler { unsafe fn on_interrupt() { - let r = T::regs(); - let state = T::buffered_state(); + on_interrupt(T::info().regs, T::buffered_state()) + } +} - // RX - let sr_val = sr(r).read(); - // On v1 & v2, reading DR clears the rxne, error and idle interrupt - // flags. Keep this close to the SR read to reduce the chance of a - // flag being set in-between. - let dr = if sr_val.rxne() || cfg!(any(usart_v1, usart_v2)) && (sr_val.ore() || sr_val.idle()) { - Some(rdr(r).read_volatile()) +unsafe fn on_interrupt(r: Regs, state: &'static State) { + // RX + let sr_val = sr(r).read(); + // On v1 & v2, reading DR clears the rxne, error and idle interrupt + // flags. Keep this close to the SR read to reduce the chance of a + // flag being set in-between. + let dr = if sr_val.rxne() || cfg!(any(usart_v1, usart_v2)) && (sr_val.ore() || sr_val.idle()) { + Some(rdr(r).read_volatile()) + } else { + None + }; + clear_interrupt_flags(r, sr_val); + + if sr_val.pe() { + warn!("Parity error"); + } + if sr_val.fe() { + warn!("Framing error"); + } + if sr_val.ne() { + warn!("Noise error"); + } + if sr_val.ore() { + warn!("Overrun error"); + } + if sr_val.rxne() { + let mut rx_writer = state.rx_buf.writer(); + let buf = rx_writer.push_slice(); + if !buf.is_empty() { + if let Some(byte) = dr { + buf[0] = byte; + rx_writer.push_done(1); + } } else { - None - }; - clear_interrupt_flags(r, sr_val); - - if sr_val.pe() { - warn!("Parity error"); - } - if sr_val.fe() { - warn!("Framing error"); - } - if sr_val.ne() { - warn!("Noise error"); - } - if sr_val.ore() { - warn!("Overrun error"); - } - if sr_val.rxne() { - let mut rx_writer = state.rx_buf.writer(); - let buf = rx_writer.push_slice(); - if !buf.is_empty() { - if let Some(byte) = dr { - buf[0] = byte; - rx_writer.push_done(1); - } - } else { - // FIXME: Should we disable any further RX interrupts when the buffer becomes full. - } - - if !state.rx_buf.is_empty() { - state.rx_waker.wake(); - } + // FIXME: Should we disable any further RX interrupts when the buffer becomes full. } - if sr_val.idle() { + if !state.rx_buf.is_empty() { state.rx_waker.wake(); } + } - // With `usart_v4` hardware FIFO is enabled and Transmission complete (TC) - // indicates that all bytes are pushed out from the FIFO. - // For other usart variants it shows that last byte from the buffer was just sent. - if sr_val.tc() { - // For others it is cleared above with `clear_interrupt_flags`. - #[cfg(any(usart_v1, usart_v2))] - sr(r).modify(|w| w.set_tc(false)); + if sr_val.idle() { + state.rx_waker.wake(); + } + // With `usart_v4` hardware FIFO is enabled and Transmission complete (TC) + // indicates that all bytes are pushed out from the FIFO. + // For other usart variants it shows that last byte from the buffer was just sent. + if sr_val.tc() { + // For others it is cleared above with `clear_interrupt_flags`. + #[cfg(any(usart_v1, usart_v2))] + sr(r).modify(|w| w.set_tc(false)); + + r.cr1().modify(|w| { + w.set_tcie(false); + }); + + state.tx_done.store(true, Ordering::Release); + state.tx_waker.wake(); + } + + // TX + if sr(r).read().txe() { + let mut tx_reader = state.tx_buf.reader(); + let buf = tx_reader.pop_slice(); + if !buf.is_empty() { r.cr1().modify(|w| { - w.set_tcie(false); + w.set_txeie(true); }); - state.tx_done.store(true, Ordering::Release); - state.tx_waker.wake(); - } - - // TX - if sr(r).read().txe() { - let mut tx_reader = state.tx_buf.reader(); - let buf = tx_reader.pop_slice(); - if !buf.is_empty() { + // Enable transmission complete interrupt when last byte is going to be sent out. + if buf.len() == 1 { r.cr1().modify(|w| { - w.set_txeie(true); - }); - - // Enable transmission complete interrupt when last byte is going to be sent out. - if buf.len() == 1 { - r.cr1().modify(|w| { - w.set_tcie(true); - }); - } - - tdr(r).write_volatile(buf[0].into()); - tx_reader.pop_done(1); - } else { - // Disable interrupt until we have something to transmit again. - r.cr1().modify(|w| { - w.set_txeie(false); + w.set_tcie(true); }); } + + tdr(r).write_volatile(buf[0].into()); + tx_reader.pop_done(1); + } else { + // Disable interrupt until we have something to transmit again. + r.cr1().modify(|w| { + w.set_txeie(false); + }); } } } -pub(crate) struct State { - pub(crate) rx_waker: AtomicWaker, - pub(crate) rx_buf: RingBuffer, - pub(crate) tx_waker: AtomicWaker, - pub(crate) tx_buf: RingBuffer, - pub(crate) tx_done: AtomicBool, +pub(super) struct State { + rx_waker: AtomicWaker, + rx_buf: RingBuffer, + tx_waker: AtomicWaker, + tx_buf: RingBuffer, + tx_done: AtomicBool, + tx_rx_refcount: AtomicU8, } impl State { - /// Create new state - pub(crate) const fn new() -> Self { + pub(super) const fn new() -> Self { Self { rx_buf: RingBuffer::new(), tx_buf: RingBuffer::new(), rx_waker: AtomicWaker::new(), tx_waker: AtomicWaker::new(), tx_done: AtomicBool::new(true), + tx_rx_refcount: AtomicU8::new(0), } } } /// Bidirectional buffered UART -pub struct BufferedUart<'d, T: BasicInstance> { - rx: BufferedUartRx<'d, T>, - tx: BufferedUartTx<'d, T>, +pub struct BufferedUart<'d> { + rx: BufferedUartRx<'d>, + tx: BufferedUartTx<'d>, } /// Tx-only buffered UART /// /// Created with [BufferedUart::split] -pub struct BufferedUartTx<'d, T: BasicInstance> { - phantom: PhantomData<&'d mut T>, +pub struct BufferedUartTx<'d> { + info: &'static Info, + state: &'static State, + kernel_clock: Hertz, + _phantom: PhantomData<&'d mut ()>, } /// Rx-only buffered UART /// /// Created with [BufferedUart::split] -pub struct BufferedUartRx<'d, T: BasicInstance> { - phantom: PhantomData<&'d mut T>, +pub struct BufferedUartRx<'d> { + info: &'static Info, + state: &'static State, + kernel_clock: Hertz, + _phantom: PhantomData<&'d mut ()>, } -impl<'d, T: BasicInstance> SetConfig for BufferedUart<'d, T> { +impl<'d> SetConfig for BufferedUart<'d> { type Config = Config; type ConfigError = ConfigError; @@ -168,7 +177,7 @@ impl<'d, T: BasicInstance> SetConfig for BufferedUart<'d, T> { } } -impl<'d, T: BasicInstance> SetConfig for BufferedUartRx<'d, T> { +impl<'d> SetConfig for BufferedUartRx<'d> { type Config = Config; type ConfigError = ConfigError; @@ -177,7 +186,7 @@ impl<'d, T: BasicInstance> SetConfig for BufferedUartRx<'d, T> { } } -impl<'d, T: BasicInstance> SetConfig for BufferedUartTx<'d, T> { +impl<'d> SetConfig for BufferedUartTx<'d> { type Config = Config; type ConfigError = ConfigError; @@ -186,9 +195,9 @@ impl<'d, T: BasicInstance> SetConfig for BufferedUartTx<'d, T> { } } -impl<'d, T: BasicInstance> BufferedUart<'d, T> { +impl<'d> BufferedUart<'d> { /// Create a new bidirectional buffered UART driver - pub fn new( + pub fn new( peri: impl Peripheral

+ 'd, _irq: impl interrupt::typelevel::Binding> + 'd, rx: impl Peripheral

> + 'd, @@ -197,15 +206,13 @@ impl<'d, T: BasicInstance> BufferedUart<'d, T> { rx_buffer: &'d mut [u8], config: Config, ) -> Result { - // UartRx and UartTx have one refcount ea. - T::enable_and_reset(); T::enable_and_reset(); Self::new_inner(peri, rx, tx, tx_buffer, rx_buffer, config) } /// Create a new bidirectional buffered UART driver with request-to-send and clear-to-send pins - pub fn new_with_rtscts( + pub fn new_with_rtscts( peri: impl Peripheral

+ 'd, _irq: impl interrupt::typelevel::Binding> + 'd, rx: impl Peripheral

> + 'd, @@ -218,13 +225,11 @@ impl<'d, T: BasicInstance> BufferedUart<'d, T> { ) -> Result { into_ref!(cts, rts); - // UartRx and UartTx have one refcount ea. - T::enable_and_reset(); T::enable_and_reset(); rts.set_as_af(rts.af_num(), AFType::OutputPushPull); cts.set_as_af(cts.af_num(), AFType::Input); - T::regs().cr3().write(|w| { + T::info().regs.cr3().write(|w| { w.set_rtse(true); w.set_ctse(true); }); @@ -234,7 +239,7 @@ impl<'d, T: BasicInstance> BufferedUart<'d, T> { /// Create a new bidirectional buffered UART driver with a driver-enable pin #[cfg(not(any(usart_v1, usart_v2)))] - pub fn new_with_de( + pub fn new_with_de( peri: impl Peripheral

+ 'd, _irq: impl interrupt::typelevel::Binding> + 'd, rx: impl Peripheral

> + 'd, @@ -246,19 +251,17 @@ impl<'d, T: BasicInstance> BufferedUart<'d, T> { ) -> Result { into_ref!(de); - // UartRx and UartTx have one refcount ea. - T::enable_and_reset(); T::enable_and_reset(); de.set_as_af(de.af_num(), AFType::OutputPushPull); - T::regs().cr3().write(|w| { + T::info().regs.cr3().write(|w| { w.set_dem(true); }); Self::new_inner(peri, rx, tx, tx_buffer, rx_buffer, config) } - fn new_inner( + fn new_inner( _peri: impl Peripheral

+ 'd, rx: impl Peripheral

> + 'd, tx: impl Peripheral

> + 'd, @@ -268,17 +271,19 @@ impl<'d, T: BasicInstance> BufferedUart<'d, T> { ) -> Result { into_ref!(_peri, rx, tx); + let info = T::info(); let state = T::buffered_state(); + let kernel_clock = T::frequency(); let len = tx_buffer.len(); unsafe { state.tx_buf.init(tx_buffer.as_mut_ptr(), len) }; let len = rx_buffer.len(); unsafe { state.rx_buf.init(rx_buffer.as_mut_ptr(), len) }; - let r = T::regs(); + let r = info.regs; rx.set_as_af(rx.af_num(), AFType::Input); tx.set_as_af(tx.af_num(), AFType::OutputPushPull); - configure(r, &config, T::frequency(), T::KIND, true, true)?; + configure(info, kernel_clock, &config, true, true)?; r.cr1().modify(|w| { w.set_rxneie(true); @@ -288,22 +293,34 @@ impl<'d, T: BasicInstance> BufferedUart<'d, T> { T::Interrupt::unpend(); unsafe { T::Interrupt::enable() }; + state.tx_rx_refcount.store(2, Ordering::Relaxed); + Ok(Self { - rx: BufferedUartRx { phantom: PhantomData }, - tx: BufferedUartTx { phantom: PhantomData }, + rx: BufferedUartRx { + info, + state, + kernel_clock, + _phantom: PhantomData, + }, + tx: BufferedUartTx { + info, + state, + kernel_clock, + _phantom: PhantomData, + }, }) } /// Split the driver into a Tx and Rx part (useful for sending to separate tasks) - pub fn split(self) -> (BufferedUartTx<'d, T>, BufferedUartRx<'d, T>) { + pub fn split(self) -> (BufferedUartTx<'d>, BufferedUartRx<'d>) { (self.tx, self.rx) } /// Reconfigure the driver pub fn set_config(&mut self, config: &Config) -> Result<(), ConfigError> { - reconfigure::(config)?; + reconfigure(self.rx.info, self.rx.kernel_clock, config)?; - T::regs().cr1().modify(|w| { + self.rx.info.regs.cr1().modify(|w| { w.set_rxneie(true); w.set_idleie(true); }); @@ -312,10 +329,10 @@ impl<'d, T: BasicInstance> BufferedUart<'d, T> { } } -impl<'d, T: BasicInstance> BufferedUartRx<'d, T> { +impl<'d> BufferedUartRx<'d> { async fn read(&self, buf: &mut [u8]) -> Result { poll_fn(move |cx| { - let state = T::buffered_state(); + let state = self.state; let mut rx_reader = unsafe { state.rx_buf.reader() }; let data = rx_reader.pop_slice(); @@ -327,7 +344,7 @@ impl<'d, T: BasicInstance> BufferedUartRx<'d, T> { rx_reader.pop_done(len); if do_pend { - T::Interrupt::pend(); + self.info.interrupt.pend(); } return Poll::Ready(Ok(len)); @@ -341,7 +358,7 @@ impl<'d, T: BasicInstance> BufferedUartRx<'d, T> { fn blocking_read(&self, buf: &mut [u8]) -> Result { loop { - let state = T::buffered_state(); + let state = self.state; let mut rx_reader = unsafe { state.rx_buf.reader() }; let data = rx_reader.pop_slice(); @@ -353,7 +370,7 @@ impl<'d, T: BasicInstance> BufferedUartRx<'d, T> { rx_reader.pop_done(len); if do_pend { - T::Interrupt::pend(); + self.info.interrupt.pend(); } return Ok(len); @@ -363,7 +380,7 @@ impl<'d, T: BasicInstance> BufferedUartRx<'d, T> { async fn fill_buf(&self) -> Result<&[u8], Error> { poll_fn(move |cx| { - let state = T::buffered_state(); + let state = self.state; let mut rx_reader = unsafe { state.rx_buf.reader() }; let (p, n) = rx_reader.pop_buf(); if n == 0 { @@ -378,20 +395,20 @@ impl<'d, T: BasicInstance> BufferedUartRx<'d, T> { } fn consume(&self, amt: usize) { - let state = T::buffered_state(); + let state = self.state; let mut rx_reader = unsafe { state.rx_buf.reader() }; let full = state.rx_buf.is_full(); rx_reader.pop_done(amt); if full { - T::Interrupt::pend(); + self.info.interrupt.pend(); } } /// Reconfigure the driver pub fn set_config(&mut self, config: &Config) -> Result<(), ConfigError> { - reconfigure::(config)?; + reconfigure(self.info, self.kernel_clock, config)?; - T::regs().cr1().modify(|w| { + self.info.regs.cr1().modify(|w| { w.set_rxneie(true); w.set_idleie(true); }); @@ -400,10 +417,10 @@ impl<'d, T: BasicInstance> BufferedUartRx<'d, T> { } } -impl<'d, T: BasicInstance> BufferedUartTx<'d, T> { +impl<'d> BufferedUartTx<'d> { async fn write(&self, buf: &[u8]) -> Result { poll_fn(move |cx| { - let state = T::buffered_state(); + let state = self.state; state.tx_done.store(false, Ordering::Release); let empty = state.tx_buf.is_empty(); @@ -420,7 +437,7 @@ impl<'d, T: BasicInstance> BufferedUartTx<'d, T> { tx_writer.push_done(n); if empty { - T::Interrupt::pend(); + self.info.interrupt.pend(); } Poll::Ready(Ok(n)) @@ -430,7 +447,7 @@ impl<'d, T: BasicInstance> BufferedUartTx<'d, T> { async fn flush(&self) -> Result<(), Error> { poll_fn(move |cx| { - let state = T::buffered_state(); + let state = self.state; if !state.tx_done.load(Ordering::Acquire) { state.tx_waker.register(cx.waker()); @@ -444,7 +461,7 @@ impl<'d, T: BasicInstance> BufferedUartTx<'d, T> { fn blocking_write(&self, buf: &[u8]) -> Result { loop { - let state = T::buffered_state(); + let state = self.state; let empty = state.tx_buf.is_empty(); let mut tx_writer = unsafe { state.tx_buf.writer() }; @@ -455,7 +472,7 @@ impl<'d, T: BasicInstance> BufferedUartTx<'d, T> { tx_writer.push_done(n); if empty { - T::Interrupt::pend(); + self.info.interrupt.pend(); } return Ok(n); @@ -465,7 +482,7 @@ impl<'d, T: BasicInstance> BufferedUartTx<'d, T> { fn blocking_flush(&self) -> Result<(), Error> { loop { - let state = T::buffered_state(); + let state = self.state; if state.tx_buf.is_empty() { return Ok(()); } @@ -474,9 +491,9 @@ impl<'d, T: BasicInstance> BufferedUartTx<'d, T> { /// Reconfigure the driver pub fn set_config(&mut self, config: &Config) -> Result<(), ConfigError> { - reconfigure::(config)?; + reconfigure(self.info, self.kernel_clock, config)?; - T::regs().cr1().modify(|w| { + self.info.regs.cr1().modify(|w| { w.set_rxneie(true); w.set_idleie(true); }); @@ -485,65 +502,78 @@ impl<'d, T: BasicInstance> BufferedUartTx<'d, T> { } } -impl<'d, T: BasicInstance> Drop for BufferedUartRx<'d, T> { +impl<'d> Drop for BufferedUartRx<'d> { fn drop(&mut self) { - let state = T::buffered_state(); + let state = self.state; unsafe { state.rx_buf.deinit(); // TX is inactive if the the buffer is not available. // We can now unregister the interrupt handler if state.tx_buf.len() == 0 { - T::Interrupt::disable(); + self.info.interrupt.disable(); } } - T::disable(); + drop_tx_rx(self.info, state); } } -impl<'d, T: BasicInstance> Drop for BufferedUartTx<'d, T> { +impl<'d> Drop for BufferedUartTx<'d> { fn drop(&mut self) { - let state = T::buffered_state(); + let state = self.state; unsafe { state.tx_buf.deinit(); // RX is inactive if the the buffer is not available. // We can now unregister the interrupt handler if state.rx_buf.len() == 0 { - T::Interrupt::disable(); + self.info.interrupt.disable(); } } - T::disable(); + drop_tx_rx(self.info, state); } } -impl<'d, T: BasicInstance> embedded_io_async::ErrorType for BufferedUart<'d, T> { +fn drop_tx_rx(info: &Info, state: &State) { + // We cannot use atomic subtraction here, because it's not supported for all targets + let is_last_drop = critical_section::with(|_| { + let refcount = state.tx_rx_refcount.load(Ordering::Relaxed); + assert!(refcount >= 1); + state.tx_rx_refcount.store(refcount - 1, Ordering::Relaxed); + refcount == 1 + }); + if is_last_drop { + info.enable_bit.disable(); + } +} + +impl<'d> embedded_io_async::ErrorType for BufferedUart<'d> { type Error = Error; } -impl<'d, T: BasicInstance> embedded_io_async::ErrorType for BufferedUartRx<'d, T> { +impl<'d> embedded_io_async::ErrorType for BufferedUartRx<'d> { type Error = Error; } -impl<'d, T: BasicInstance> embedded_io_async::ErrorType for BufferedUartTx<'d, T> { +impl<'d> embedded_io_async::ErrorType for BufferedUartTx<'d> { type Error = Error; } -impl<'d, T: BasicInstance> embedded_io_async::Read for BufferedUart<'d, T> { +impl<'d> embedded_io_async::Read for BufferedUart<'d> { async fn read(&mut self, buf: &mut [u8]) -> Result { self.rx.read(buf).await } } -impl<'d, T: BasicInstance> embedded_io_async::Read for BufferedUartRx<'d, T> { +impl<'d> embedded_io_async::Read for BufferedUartRx<'d> { async fn read(&mut self, buf: &mut [u8]) -> Result { Self::read(self, buf).await } } -impl<'d, T: BasicInstance> embedded_io_async::BufRead for BufferedUart<'d, T> { +impl<'d> embedded_io_async::BufRead for BufferedUart<'d> { async fn fill_buf(&mut self) -> Result<&[u8], Self::Error> { self.rx.fill_buf().await } @@ -553,7 +583,7 @@ impl<'d, T: BasicInstance> embedded_io_async::BufRead for BufferedUart<'d, T> { } } -impl<'d, T: BasicInstance> embedded_io_async::BufRead for BufferedUartRx<'d, T> { +impl<'d> embedded_io_async::BufRead for BufferedUartRx<'d> { async fn fill_buf(&mut self) -> Result<&[u8], Self::Error> { Self::fill_buf(self).await } @@ -563,7 +593,7 @@ impl<'d, T: BasicInstance> embedded_io_async::BufRead for BufferedUartRx<'d, T> } } -impl<'d, T: BasicInstance> embedded_io_async::Write for BufferedUart<'d, T> { +impl<'d> embedded_io_async::Write for BufferedUart<'d> { async fn write(&mut self, buf: &[u8]) -> Result { self.tx.write(buf).await } @@ -573,7 +603,7 @@ impl<'d, T: BasicInstance> embedded_io_async::Write for BufferedUart<'d, T> { } } -impl<'d, T: BasicInstance> embedded_io_async::Write for BufferedUartTx<'d, T> { +impl<'d> embedded_io_async::Write for BufferedUartTx<'d> { async fn write(&mut self, buf: &[u8]) -> Result { Self::write(self, buf).await } @@ -583,19 +613,19 @@ impl<'d, T: BasicInstance> embedded_io_async::Write for BufferedUartTx<'d, T> { } } -impl<'d, T: BasicInstance> embedded_io::Read for BufferedUart<'d, T> { +impl<'d> embedded_io::Read for BufferedUart<'d> { fn read(&mut self, buf: &mut [u8]) -> Result { self.rx.blocking_read(buf) } } -impl<'d, T: BasicInstance> embedded_io::Read for BufferedUartRx<'d, T> { +impl<'d> embedded_io::Read for BufferedUartRx<'d> { fn read(&mut self, buf: &mut [u8]) -> Result { self.blocking_read(buf) } } -impl<'d, T: BasicInstance> embedded_io::Write for BufferedUart<'d, T> { +impl<'d> embedded_io::Write for BufferedUart<'d> { fn write(&mut self, buf: &[u8]) -> Result { self.tx.blocking_write(buf) } @@ -605,7 +635,7 @@ impl<'d, T: BasicInstance> embedded_io::Write for BufferedUart<'d, T> { } } -impl<'d, T: BasicInstance> embedded_io::Write for BufferedUartTx<'d, T> { +impl<'d> embedded_io::Write for BufferedUartTx<'d> { fn write(&mut self, buf: &[u8]) -> Result { Self::blocking_write(self, buf) } @@ -615,11 +645,11 @@ impl<'d, T: BasicInstance> embedded_io::Write for BufferedUartTx<'d, T> { } } -impl<'d, T: BasicInstance> embedded_hal_02::serial::Read for BufferedUartRx<'d, T> { +impl<'d> embedded_hal_02::serial::Read for BufferedUartRx<'d> { type Error = Error; fn read(&mut self) -> Result> { - let r = T::regs(); + let r = self.info.regs; unsafe { let sr = sr(r).read(); if sr.pe() { @@ -643,7 +673,7 @@ impl<'d, T: BasicInstance> embedded_hal_02::serial::Read for BufferedUartRx< } } -impl<'d, T: BasicInstance> embedded_hal_02::blocking::serial::Write for BufferedUartTx<'d, T> { +impl<'d> embedded_hal_02::blocking::serial::Write for BufferedUartTx<'d> { type Error = Error; fn bwrite_all(&mut self, mut buffer: &[u8]) -> Result<(), Self::Error> { @@ -662,7 +692,7 @@ impl<'d, T: BasicInstance> embedded_hal_02::blocking::serial::Write for Buff } } -impl<'d, T: BasicInstance> embedded_hal_02::serial::Read for BufferedUart<'d, T> { +impl<'d> embedded_hal_02::serial::Read for BufferedUart<'d> { type Error = Error; fn read(&mut self) -> Result> { @@ -670,7 +700,7 @@ impl<'d, T: BasicInstance> embedded_hal_02::serial::Read for BufferedUart<'d } } -impl<'d, T: BasicInstance> embedded_hal_02::blocking::serial::Write for BufferedUart<'d, T> { +impl<'d> embedded_hal_02::blocking::serial::Write for BufferedUart<'d> { type Error = Error; fn bwrite_all(&mut self, mut buffer: &[u8]) -> Result<(), Self::Error> { @@ -689,25 +719,25 @@ impl<'d, T: BasicInstance> embedded_hal_02::blocking::serial::Write for Buff } } -impl<'d, T: BasicInstance> embedded_hal_nb::serial::ErrorType for BufferedUart<'d, T> { +impl<'d> embedded_hal_nb::serial::ErrorType for BufferedUart<'d> { type Error = Error; } -impl<'d, T: BasicInstance> embedded_hal_nb::serial::ErrorType for BufferedUartTx<'d, T> { +impl<'d> embedded_hal_nb::serial::ErrorType for BufferedUartTx<'d> { type Error = Error; } -impl<'d, T: BasicInstance> embedded_hal_nb::serial::ErrorType for BufferedUartRx<'d, T> { +impl<'d> embedded_hal_nb::serial::ErrorType for BufferedUartRx<'d> { type Error = Error; } -impl<'d, T: BasicInstance> embedded_hal_nb::serial::Read for BufferedUartRx<'d, T> { +impl<'d> embedded_hal_nb::serial::Read for BufferedUartRx<'d> { fn read(&mut self) -> nb::Result { embedded_hal_02::serial::Read::read(self) } } -impl<'d, T: BasicInstance> embedded_hal_nb::serial::Write for BufferedUartTx<'d, T> { +impl<'d> embedded_hal_nb::serial::Write for BufferedUartTx<'d> { fn write(&mut self, char: u8) -> nb::Result<(), Self::Error> { self.blocking_write(&[char]).map(drop).map_err(nb::Error::Other) } @@ -717,13 +747,13 @@ impl<'d, T: BasicInstance> embedded_hal_nb::serial::Write for BufferedUartTx<'d, } } -impl<'d, T: BasicInstance> embedded_hal_nb::serial::Read for BufferedUart<'d, T> { +impl<'d> embedded_hal_nb::serial::Read for BufferedUart<'d> { fn read(&mut self) -> Result> { embedded_hal_02::serial::Read::read(&mut self.rx) } } -impl<'d, T: BasicInstance> embedded_hal_nb::serial::Write for BufferedUart<'d, T> { +impl<'d> embedded_hal_nb::serial::Write for BufferedUart<'d> { fn write(&mut self, char: u8) -> nb::Result<(), Self::Error> { self.tx.blocking_write(&[char]).map(drop).map_err(nb::Error::Other) } diff --git a/embassy-stm32/src/usart/mod.rs b/embassy-stm32/src/usart/mod.rs index a6dfbd482..b24335f3a 100644 --- a/embassy-stm32/src/usart/mod.rs +++ b/embassy-stm32/src/usart/mod.rs @@ -4,7 +4,7 @@ use core::future::poll_fn; use core::marker::PhantomData; -use core::sync::atomic::{compiler_fence, Ordering}; +use core::sync::atomic::{compiler_fence, AtomicU8, Ordering}; use core::task::Poll; use embassy_embedded_hal::SetConfig; @@ -15,7 +15,8 @@ use futures_util::future::{select, Either}; use crate::dma::ChannelAndRequest; use crate::gpio::{AFType, AnyPin, SealedPin}; -use crate::interrupt::typelevel::Interrupt; +use crate::interrupt::typelevel::Interrupt as _; +use crate::interrupt::{self, Interrupt, InterruptExt}; use crate::mode::{Async, Blocking, Mode}; #[allow(unused_imports)] #[cfg(not(any(usart_v1, usart_v2)))] @@ -27,57 +28,59 @@ use crate::pac::usart::Lpuart as Regs; #[cfg(any(usart_v1, usart_v2))] use crate::pac::usart::Usart as Regs; use crate::pac::usart::{regs, vals}; +use crate::rcc::{ClockEnableBit, SealedRccPeripheral}; use crate::time::Hertz; -use crate::{interrupt, peripherals, Peripheral}; +use crate::Peripheral; /// Interrupt handler. -pub struct InterruptHandler { +pub struct InterruptHandler { _phantom: PhantomData, } -impl interrupt::typelevel::Handler for InterruptHandler { +impl interrupt::typelevel::Handler for InterruptHandler { unsafe fn on_interrupt() { - let r = T::regs(); - let s = T::state(); - - let (sr, cr1, cr3) = (sr(r).read(), r.cr1().read(), r.cr3().read()); - - let has_errors = (sr.pe() && cr1.peie()) || ((sr.fe() || sr.ne() || sr.ore()) && cr3.eie()); - if has_errors { - // clear all interrupts and DMA Rx Request - r.cr1().modify(|w| { - // disable RXNE interrupt - w.set_rxneie(false); - // disable parity interrupt - w.set_peie(false); - // disable idle line interrupt - w.set_idleie(false); - }); - r.cr3().modify(|w| { - // disable Error Interrupt: (Frame error, Noise error, Overrun error) - w.set_eie(false); - // disable DMA Rx Request - w.set_dmar(false); - }); - } else if cr1.idleie() && sr.idle() { - // IDLE detected: no more data will come - r.cr1().modify(|w| { - // disable idle line detection - w.set_idleie(false); - }); - } else if cr1.rxneie() { - // We cannot check the RXNE flag as it is auto-cleared by the DMA controller - - // It is up to the listener to determine if this in fact was a RX event and disable the RXNE detection - } else { - return; - } - - compiler_fence(Ordering::SeqCst); - s.rx_waker.wake(); + on_interrupt(T::info().regs, T::state()) } } +unsafe fn on_interrupt(r: Regs, s: &'static State) { + let (sr, cr1, cr3) = (sr(r).read(), r.cr1().read(), r.cr3().read()); + + let has_errors = (sr.pe() && cr1.peie()) || ((sr.fe() || sr.ne() || sr.ore()) && cr3.eie()); + if has_errors { + // clear all interrupts and DMA Rx Request + r.cr1().modify(|w| { + // disable RXNE interrupt + w.set_rxneie(false); + // disable parity interrupt + w.set_peie(false); + // disable idle line interrupt + w.set_idleie(false); + }); + r.cr3().modify(|w| { + // disable Error Interrupt: (Frame error, Noise error, Overrun error) + w.set_eie(false); + // disable DMA Rx Request + w.set_dmar(false); + }); + } else if cr1.idleie() && sr.idle() { + // IDLE detected: no more data will come + r.cr1().modify(|w| { + // disable idle line detection + w.set_idleie(false); + }); + } else if cr1.rxneie() { + // We cannot check the RXNE flag as it is auto-cleared by the DMA controller + + // It is up to the listener to determine if this in fact was a RX event and disable the RXNE detection + } else { + return; + } + + compiler_fence(Ordering::SeqCst); + s.rx_waker.wake(); +} + #[derive(Clone, Copy, PartialEq, Eq, Debug)] #[cfg_attr(feature = "defmt", derive(defmt::Format))] /// Number of data bits @@ -239,12 +242,12 @@ enum ReadCompletionEvent { /// /// See [`UartRx`] for more details, and see [`BufferedUart`] and [`RingBufferedUartRx`] /// as alternatives that do provide the necessary guarantees for `embedded_io::Read`. -pub struct Uart<'d, T: BasicInstance, M: Mode> { - tx: UartTx<'d, T, M>, - rx: UartRx<'d, T, M>, +pub struct Uart<'d, M: Mode> { + tx: UartTx<'d, M>, + rx: UartRx<'d, M>, } -impl<'d, T: BasicInstance, M: Mode> SetConfig for Uart<'d, T, M> { +impl<'d, M: Mode> SetConfig for Uart<'d, M> { type Config = Config; type ConfigError = ConfigError; @@ -258,15 +261,18 @@ impl<'d, T: BasicInstance, M: Mode> SetConfig for Uart<'d, T, M> { /// /// Can be obtained from [`Uart::split`], or can be constructed independently, /// if you do not need the receiving half of the driver. -pub struct UartTx<'d, T: BasicInstance, M: Mode> { - _phantom: PhantomData<(T, M)>, +pub struct UartTx<'d, M: Mode> { + info: &'static Info, + state: &'static State, + kernel_clock: Hertz, tx: Option>, cts: Option>, de: Option>, tx_dma: Option>, + _phantom: PhantomData, } -impl<'d, T: BasicInstance, M: Mode> SetConfig for UartTx<'d, T, M> { +impl<'d, M: Mode> SetConfig for UartTx<'d, M> { type Config = Config; type ConfigError = ConfigError; @@ -304,17 +310,20 @@ impl<'d, T: BasicInstance, M: Mode> SetConfig for UartTx<'d, T, M> { /// store data received between calls. /// /// Also see [this github comment](https://github.com/embassy-rs/embassy/pull/2185#issuecomment-1810047043). -pub struct UartRx<'d, T: BasicInstance, M: Mode> { - _phantom: PhantomData<(T, M)>, +pub struct UartRx<'d, M: Mode> { + info: &'static Info, + state: &'static State, + kernel_clock: Hertz, rx: Option>, rts: Option>, rx_dma: Option>, detect_previous_overrun: bool, #[cfg(any(usart_v1, usart_v2))] buffered_sr: stm32_metapac::usart::regs::Sr, + _phantom: PhantomData, } -impl<'d, T: BasicInstance, M: Mode> SetConfig for UartRx<'d, T, M> { +impl<'d, M: Mode> SetConfig for UartRx<'d, M> { type Config = Config; type ConfigError = ConfigError; @@ -323,9 +332,9 @@ impl<'d, T: BasicInstance, M: Mode> SetConfig for UartRx<'d, T, M> { } } -impl<'d, T: BasicInstance> UartTx<'d, T, Async> { +impl<'d> UartTx<'d, Async> { /// Useful if you only want Uart Tx. It saves 1 pin and consumes a little less power. - pub fn new( + pub fn new( peri: impl Peripheral

+ 'd, tx: impl Peripheral

> + 'd, tx_dma: impl Peripheral

> + 'd, @@ -341,7 +350,7 @@ impl<'d, T: BasicInstance> UartTx<'d, T, Async> { } /// Create a new tx-only UART with a clear-to-send pin - pub fn new_with_cts( + pub fn new_with_cts( peri: impl Peripheral

+ 'd, tx: impl Peripheral

> + 'd, cts: impl Peripheral

> + 'd, @@ -359,7 +368,7 @@ impl<'d, T: BasicInstance> UartTx<'d, T, Async> { /// Initiate an asynchronous UART write pub async fn write(&mut self, buffer: &[u8]) -> Result<(), Error> { - let r = T::regs(); + let r = self.info.regs; // Disable Receiver for Half-Duplex mode if r.cr3().read().hdsel() { @@ -377,21 +386,17 @@ impl<'d, T: BasicInstance> UartTx<'d, T, Async> { Ok(()) } - async fn flush_inner() -> Result<(), Error> { - Self::blocking_flush_inner() - } - /// Wait until transmission complete pub async fn flush(&mut self) -> Result<(), Error> { - Self::flush_inner().await + self.blocking_flush() } } -impl<'d, T: BasicInstance> UartTx<'d, T, Blocking> { +impl<'d> UartTx<'d, Blocking> { /// Create a new blocking tx-only UART with no hardware flow control. /// /// Useful if you only want Uart Tx. It saves 1 pin and consumes a little less power. - pub fn new_blocking( + pub fn new_blocking( peri: impl Peripheral

+ 'd, tx: impl Peripheral

> + 'd, config: Config, @@ -400,7 +405,7 @@ impl<'d, T: BasicInstance> UartTx<'d, T, Blocking> { } /// Create a new blocking tx-only UART with a clear-to-send pin - pub fn new_blocking_with_cts( + pub fn new_blocking_with_cts( peri: impl Peripheral

+ 'd, tx: impl Peripheral

> + 'd, cts: impl Peripheral

> + 'd, @@ -416,8 +421,8 @@ impl<'d, T: BasicInstance> UartTx<'d, T, Blocking> { } } -impl<'d, T: BasicInstance, M: Mode> UartTx<'d, T, M> { - fn new_inner( +impl<'d, M: Mode> UartTx<'d, M> { + fn new_inner( _peri: impl Peripheral

+ 'd, tx: Option>, cts: Option>, @@ -426,16 +431,21 @@ impl<'d, T: BasicInstance, M: Mode> UartTx<'d, T, M> { ) -> Result { T::enable_and_reset(); - let r = T::regs(); + let info = T::info(); + let state = T::state(); + let kernel_clock = T::frequency(); + let r = info.regs; r.cr3().modify(|w| { w.set_ctse(cts.is_some()); }); - configure(r, &config, T::frequency(), T::KIND, false, true)?; + configure(info, kernel_clock, &config, false, true)?; - // create state once! - let _s = T::state(); + state.tx_rx_refcount.store(1, Ordering::Relaxed); Ok(Self { + info, + state, + kernel_clock, tx, cts, de: None, @@ -446,12 +456,12 @@ impl<'d, T: BasicInstance, M: Mode> UartTx<'d, T, M> { /// Reconfigure the driver pub fn set_config(&mut self, config: &Config) -> Result<(), ConfigError> { - reconfigure::(config) + reconfigure(self.info, self.kernel_clock, config) } /// Perform a blocking UART write pub fn blocking_write(&mut self, buffer: &[u8]) -> Result<(), Error> { - let r = T::regs(); + let r = self.info.regs; // Disable Receiver for Half-Duplex mode if r.cr3().read().hdsel() { @@ -465,28 +475,29 @@ impl<'d, T: BasicInstance, M: Mode> UartTx<'d, T, M> { Ok(()) } - fn blocking_flush_inner() -> Result<(), Error> { - let r = T::regs(); - while !sr(r).read().tc() {} - - // Enable Receiver after transmission complete for Half-Duplex mode - if r.cr3().read().hdsel() { - r.cr1().modify(|reg| reg.set_re(true)); - } - Ok(()) - } - /// Block until transmission complete pub fn blocking_flush(&mut self) -> Result<(), Error> { - Self::blocking_flush_inner() + blocking_flush(self.info) } } -impl<'d, T: BasicInstance> UartRx<'d, T, Async> { +fn blocking_flush(info: &Info) -> Result<(), Error> { + let r = info.regs; + while !sr(r).read().tc() {} + + // Enable Receiver after transmission complete for Half-Duplex mode + if r.cr3().read().hdsel() { + r.cr1().modify(|reg| reg.set_re(true)); + } + + Ok(()) +} + +impl<'d> UartRx<'d, Async> { /// Create a new rx-only UART with no hardware flow control. /// /// Useful if you only want Uart Rx. It saves 1 pin and consumes a little less power. - pub fn new( + pub fn new( peri: impl Peripheral

+ 'd, _irq: impl interrupt::typelevel::Binding> + 'd, rx: impl Peripheral

> + 'd, @@ -497,7 +508,7 @@ impl<'d, T: BasicInstance> UartRx<'d, T, Async> { } /// Create a new rx-only UART with a request-to-send pin - pub fn new_with_rts( + pub fn new_with_rts( peri: impl Peripheral

+ 'd, _irq: impl interrupt::typelevel::Binding> + 'd, rx: impl Peripheral

> + 'd, @@ -531,11 +542,11 @@ impl<'d, T: BasicInstance> UartRx<'d, T, Async> { buffer: &mut [u8], enable_idle_line_detection: bool, ) -> Result { - let r = T::regs(); + let r = self.info.regs; // Call flush for Half-Duplex mode. It prevents reading of bytes which have just been written. if r.cr3().read().hdsel() { - UartTx::<'d, T, Async>::flush_inner().await?; + blocking_flush(self.info)?; } // make sure USART state is restored to neutral state when this future is dropped @@ -565,7 +576,7 @@ impl<'d, T: BasicInstance> UartRx<'d, T, Async> { // Start USART DMA // will not do anything yet because DMAR is not yet set // future which will complete when DMA Read request completes - let transfer = unsafe { ch.read(rdr(T::regs()), buffer, Default::default()) }; + let transfer = unsafe { ch.read(rdr(r), buffer, Default::default()) }; // clear ORE flag just before enabling DMA Rx Request: can be mandatory for the second transfer if !self.detect_previous_overrun { @@ -640,9 +651,8 @@ impl<'d, T: BasicInstance> UartRx<'d, T, Async> { compiler_fence(Ordering::SeqCst); // future which completes when idle line or error is detected + let s = self.state; let abort = poll_fn(move |cx| { - let s = T::state(); - s.rx_waker.register(cx.waker()); let sr = sr(r).read(); @@ -728,11 +738,11 @@ impl<'d, T: BasicInstance> UartRx<'d, T, Async> { } } -impl<'d, T: BasicInstance> UartRx<'d, T, Blocking> { +impl<'d> UartRx<'d, Blocking> { /// Create a new rx-only UART with no hardware flow control. /// /// Useful if you only want Uart Rx. It saves 1 pin and consumes a little less power. - pub fn new_blocking( + pub fn new_blocking( peri: impl Peripheral

+ 'd, rx: impl Peripheral

> + 'd, config: Config, @@ -741,7 +751,7 @@ impl<'d, T: BasicInstance> UartRx<'d, T, Blocking> { } /// Create a new rx-only UART with a request-to-send pin - pub fn new_blocking_with_rts( + pub fn new_blocking_with_rts( peri: impl Peripheral

+ 'd, rx: impl Peripheral

> + 'd, rts: impl Peripheral

> + 'd, @@ -757,8 +767,8 @@ impl<'d, T: BasicInstance> UartRx<'d, T, Blocking> { } } -impl<'d, T: BasicInstance, M: Mode> UartRx<'d, T, M> { - fn new_inner( +impl<'d, M: Mode> UartRx<'d, M> { + fn new_inner( _peri: impl Peripheral

+ 'd, rx: Option>, rts: Option>, @@ -767,20 +777,25 @@ impl<'d, T: BasicInstance, M: Mode> UartRx<'d, T, M> { ) -> Result { T::enable_and_reset(); - let r = T::regs(); + let info = T::info(); + let state = T::state(); + let kernel_clock = T::frequency(); + let r = info.regs; r.cr3().write(|w| { w.set_rtse(rts.is_some()); }); - configure(r, &config, T::frequency(), T::KIND, true, false)?; + configure(info, kernel_clock, &config, true, false)?; T::Interrupt::unpend(); unsafe { T::Interrupt::enable() }; - // create state once! - let _s = T::state(); + state.tx_rx_refcount.store(1, Ordering::Relaxed); Ok(Self { _phantom: PhantomData, + info, + state, + kernel_clock, rx, rts, rx_dma, @@ -792,12 +807,12 @@ impl<'d, T: BasicInstance, M: Mode> UartRx<'d, T, M> { /// Reconfigure the driver pub fn set_config(&mut self, config: &Config) -> Result<(), ConfigError> { - reconfigure::(config) + reconfigure(self.info, self.kernel_clock, config) } #[cfg(any(usart_v1, usart_v2))] fn check_rx_flags(&mut self) -> Result { - let r = T::regs(); + let r = self.info.regs; loop { // Handle all buffered error flags. if self.buffered_sr.pe() { @@ -830,7 +845,7 @@ impl<'d, T: BasicInstance, M: Mode> UartRx<'d, T, M> { #[cfg(any(usart_v3, usart_v4))] fn check_rx_flags(&mut self) -> Result { - let r = T::regs(); + let r = self.info.regs; let sr = r.isr().read(); if sr.pe() { r.icr().write(|w| w.set_pe(true)); @@ -850,7 +865,7 @@ impl<'d, T: BasicInstance, M: Mode> UartRx<'d, T, M> { /// Read a single u8 if there is one available, otherwise return WouldBlock pub(crate) fn nb_read(&mut self) -> Result> { - let r = T::regs(); + let r = self.info.regs; if self.check_rx_flags()? { Ok(unsafe { rdr(r).read_volatile() }) } else { @@ -860,11 +875,11 @@ impl<'d, T: BasicInstance, M: Mode> UartRx<'d, T, M> { /// Perform a blocking read into `buffer` pub fn blocking_read(&mut self, buffer: &mut [u8]) -> Result<(), Error> { - let r = T::regs(); + let r = self.info.regs; // Call flush for Half-Duplex mode. It prevents reading of bytes which have just been written. if r.cr3().read().hdsel() { - UartTx::<'d, T, M>::blocking_flush_inner()?; + blocking_flush(self.info)?; } for b in buffer { @@ -875,26 +890,39 @@ impl<'d, T: BasicInstance, M: Mode> UartRx<'d, T, M> { } } -impl<'d, T: BasicInstance, M: Mode> Drop for UartTx<'d, T, M> { +impl<'d, M: Mode> Drop for UartTx<'d, M> { fn drop(&mut self) { self.tx.as_ref().map(|x| x.set_as_disconnected()); self.cts.as_ref().map(|x| x.set_as_disconnected()); self.de.as_ref().map(|x| x.set_as_disconnected()); - T::disable(); + drop_tx_rx(self.info, self.state); } } -impl<'d, T: BasicInstance, M: Mode> Drop for UartRx<'d, T, M> { +impl<'d, M: Mode> Drop for UartRx<'d, M> { fn drop(&mut self) { self.rx.as_ref().map(|x| x.set_as_disconnected()); self.rts.as_ref().map(|x| x.set_as_disconnected()); - T::disable(); + drop_tx_rx(self.info, self.state); } } -impl<'d, T: BasicInstance> Uart<'d, T, Async> { +fn drop_tx_rx(info: &Info, state: &State) { + // We cannot use atomic subtraction here, because it's not supported for all targets + let is_last_drop = critical_section::with(|_| { + let refcount = state.tx_rx_refcount.load(Ordering::Relaxed); + assert!(refcount >= 1); + state.tx_rx_refcount.store(refcount - 1, Ordering::Relaxed); + refcount == 1 + }); + if is_last_drop { + info.enable_bit.disable(); + } +} + +impl<'d> Uart<'d, Async> { /// Create a new bidirectional UART - pub fn new( + pub fn new( peri: impl Peripheral

+ 'd, rx: impl Peripheral

> + 'd, tx: impl Peripheral

> + 'd, @@ -917,7 +945,7 @@ impl<'d, T: BasicInstance> Uart<'d, T, Async> { } /// Create a new bidirectional UART with request-to-send and clear-to-send pins - pub fn new_with_rtscts( + pub fn new_with_rtscts( peri: impl Peripheral

+ 'd, rx: impl Peripheral

> + 'd, tx: impl Peripheral

> + 'd, @@ -943,7 +971,7 @@ impl<'d, T: BasicInstance> Uart<'d, T, Async> { #[cfg(not(any(usart_v1, usart_v2)))] /// Create a new bidirectional UART with a driver-enable pin - pub fn new_with_de( + pub fn new_with_de( peri: impl Peripheral

+ 'd, rx: impl Peripheral

> + 'd, tx: impl Peripheral

> + 'd, @@ -977,7 +1005,7 @@ impl<'d, T: BasicInstance> Uart<'d, T, Async> { /// Apart from this, the communication protocol is similar to normal USART mode. Any conflict /// on the line must be managed by software (for instance by using a centralized arbiter). #[doc(alias("HDSEL"))] - pub fn new_half_duplex( + pub fn new_half_duplex( peri: impl Peripheral

+ 'd, tx: impl Peripheral

> + 'd, _irq: impl interrupt::typelevel::Binding> + 'd, @@ -1015,7 +1043,7 @@ impl<'d, T: BasicInstance> Uart<'d, T, Async> { /// on the line must be managed by software (for instance by using a centralized arbiter). #[cfg(not(any(usart_v1, usart_v2)))] #[doc(alias("HDSEL"))] - pub fn new_half_duplex_on_rx( + pub fn new_half_duplex_on_rx( peri: impl Peripheral

+ 'd, rx: impl Peripheral

> + 'd, _irq: impl interrupt::typelevel::Binding> + 'd, @@ -1055,9 +1083,9 @@ impl<'d, T: BasicInstance> Uart<'d, T, Async> { } } -impl<'d, T: BasicInstance> Uart<'d, T, Blocking> { +impl<'d> Uart<'d, Blocking> { /// Create a new blocking bidirectional UART. - pub fn new_blocking( + pub fn new_blocking( peri: impl Peripheral

+ 'd, rx: impl Peripheral

> + 'd, tx: impl Peripheral

> + 'd, @@ -1077,7 +1105,7 @@ impl<'d, T: BasicInstance> Uart<'d, T, Blocking> { } /// Create a new bidirectional UART with request-to-send and clear-to-send pins - pub fn new_blocking_with_rtscts( + pub fn new_blocking_with_rtscts( peri: impl Peripheral

+ 'd, rx: impl Peripheral

> + 'd, tx: impl Peripheral

> + 'd, @@ -1100,7 +1128,7 @@ impl<'d, T: BasicInstance> Uart<'d, T, Blocking> { #[cfg(not(any(usart_v1, usart_v2)))] /// Create a new bidirectional UART with a driver-enable pin - pub fn new_blocking_with_de( + pub fn new_blocking_with_de( peri: impl Peripheral

+ 'd, rx: impl Peripheral

> + 'd, tx: impl Peripheral

> + 'd, @@ -1131,7 +1159,7 @@ impl<'d, T: BasicInstance> Uart<'d, T, Blocking> { /// Apart from this, the communication protocol is similar to normal USART mode. Any conflict /// on the line must be managed by software (for instance by using a centralized arbiter). #[doc(alias("HDSEL"))] - pub fn new_blocking_half_duplex( + pub fn new_blocking_half_duplex( peri: impl Peripheral

+ 'd, tx: impl Peripheral

> + 'd, mut config: Config, @@ -1166,7 +1194,7 @@ impl<'d, T: BasicInstance> Uart<'d, T, Blocking> { /// on the line must be managed by software (for instance by using a centralized arbiter). #[cfg(not(any(usart_v1, usart_v2)))] #[doc(alias("HDSEL"))] - pub fn new_blocking_half_duplex_on_rx( + pub fn new_blocking_half_duplex_on_rx( peri: impl Peripheral

+ 'd, rx: impl Peripheral

> + 'd, mut config: Config, @@ -1188,8 +1216,8 @@ impl<'d, T: BasicInstance> Uart<'d, T, Blocking> { } } -impl<'d, T: BasicInstance, M: Mode> Uart<'d, T, M> { - fn new_inner( +impl<'d, M: Mode> Uart<'d, M> { + fn new_inner( _peri: impl Peripheral

+ 'd, rx: Option>, tx: Option>, @@ -1200,11 +1228,12 @@ impl<'d, T: BasicInstance, M: Mode> Uart<'d, T, M> { rx_dma: Option>, config: Config, ) -> Result { - // UartRx and UartTx have one refcount each. - T::enable_and_reset(); T::enable_and_reset(); - let r = T::regs(); + let info = T::info(); + let state = T::state(); + let kernel_clock = T::frequency(); + let r = info.regs; r.cr3().write(|w| { w.set_rtse(rts.is_some()); @@ -1212,17 +1241,19 @@ impl<'d, T: BasicInstance, M: Mode> Uart<'d, T, M> { #[cfg(not(any(usart_v1, usart_v2)))] w.set_dem(de.is_some()); }); - configure(r, &config, T::frequency(), T::KIND, true, true)?; + configure(info, kernel_clock, &config, true, true)?; T::Interrupt::unpend(); unsafe { T::Interrupt::enable() }; - // create state once! - let _s = T::state(); + state.tx_rx_refcount.store(2, Ordering::Relaxed); Ok(Self { tx: UartTx { _phantom: PhantomData, + info, + state, + kernel_clock, tx, cts, de, @@ -1230,6 +1261,9 @@ impl<'d, T: BasicInstance, M: Mode> Uart<'d, T, M> { }, rx: UartRx { _phantom: PhantomData, + info, + state, + kernel_clock, rx, rts, rx_dma, @@ -1263,32 +1297,34 @@ impl<'d, T: BasicInstance, M: Mode> Uart<'d, T, M> { /// Split the Uart into a transmitter and receiver, which is /// particularly useful when having two tasks correlating to /// transmitting and receiving. - pub fn split(self) -> (UartTx<'d, T, M>, UartRx<'d, T, M>) { + pub fn split(self) -> (UartTx<'d, M>, UartRx<'d, M>) { (self.tx, self.rx) } } -fn reconfigure(config: &Config) -> Result<(), ConfigError> { - T::Interrupt::disable(); - let r = T::regs(); +fn reconfigure(info: &Info, kernel_clock: Hertz, config: &Config) -> Result<(), ConfigError> { + info.interrupt.disable(); + let r = info.regs; let cr = r.cr1().read(); - configure(r, config, T::frequency(), T::KIND, cr.re(), cr.te())?; + configure(info, kernel_clock, config, cr.re(), cr.te())?; - T::Interrupt::unpend(); - unsafe { T::Interrupt::enable() }; + info.interrupt.unpend(); + unsafe { info.interrupt.enable() }; Ok(()) } fn configure( - r: Regs, + info: &Info, + kernel_clock: Hertz, config: &Config, - pclk_freq: Hertz, - kind: Kind, enable_rx: bool, enable_tx: bool, ) -> Result<(), ConfigError> { + let r = info.regs; + let kind = info.kind; + if !enable_rx && !enable_tx { return Err(ConfigError::RxOrTxNotEnabled); } @@ -1348,7 +1384,7 @@ fn configure( let mut over8 = false; let mut found_brr = None; for &(presc, _presc_val) in &DIVS { - let brr = calculate_brr(config.baudrate, pclk_freq.0, presc as u32, mul); + let brr = calculate_brr(config.baudrate, kernel_clock.0, presc as u32, mul); trace!( "USART: presc={}, div=0x{:08x} (mantissa = {}, fraction = {})", presc, @@ -1389,7 +1425,7 @@ fn configure( "Using {} oversampling, desired baudrate: {}, actual baudrate: {}", oversampling, config.baudrate, - pclk_freq.0 / brr * mul + kernel_clock.0 / brr * mul ); r.cr2().write(|w| { @@ -1458,14 +1494,14 @@ fn configure( Ok(()) } -impl<'d, T: BasicInstance, M: Mode> embedded_hal_02::serial::Read for UartRx<'d, T, M> { +impl<'d, M: Mode> embedded_hal_02::serial::Read for UartRx<'d, M> { type Error = Error; fn read(&mut self) -> Result> { self.nb_read() } } -impl<'d, T: BasicInstance, M: Mode> embedded_hal_02::blocking::serial::Write for UartTx<'d, T, M> { +impl<'d, M: Mode> embedded_hal_02::blocking::serial::Write for UartTx<'d, M> { type Error = Error; fn bwrite_all(&mut self, buffer: &[u8]) -> Result<(), Self::Error> { self.blocking_write(buffer) @@ -1475,14 +1511,14 @@ impl<'d, T: BasicInstance, M: Mode> embedded_hal_02::blocking::serial::Write } } -impl<'d, T: BasicInstance, M: Mode> embedded_hal_02::serial::Read for Uart<'d, T, M> { +impl<'d, M: Mode> embedded_hal_02::serial::Read for Uart<'d, M> { type Error = Error; fn read(&mut self) -> Result> { self.nb_read() } } -impl<'d, T: BasicInstance, M: Mode> embedded_hal_02::blocking::serial::Write for Uart<'d, T, M> { +impl<'d, M: Mode> embedded_hal_02::blocking::serial::Write for Uart<'d, M> { type Error = Error; fn bwrite_all(&mut self, buffer: &[u8]) -> Result<(), Self::Error> { self.blocking_write(buffer) @@ -1504,25 +1540,25 @@ impl embedded_hal_nb::serial::Error for Error { } } -impl<'d, T: BasicInstance, M: Mode> embedded_hal_nb::serial::ErrorType for Uart<'d, T, M> { +impl<'d, M: Mode> embedded_hal_nb::serial::ErrorType for Uart<'d, M> { type Error = Error; } -impl<'d, T: BasicInstance, M: Mode> embedded_hal_nb::serial::ErrorType for UartTx<'d, T, M> { +impl<'d, M: Mode> embedded_hal_nb::serial::ErrorType for UartTx<'d, M> { type Error = Error; } -impl<'d, T: BasicInstance, M: Mode> embedded_hal_nb::serial::ErrorType for UartRx<'d, T, M> { +impl<'d, M: Mode> embedded_hal_nb::serial::ErrorType for UartRx<'d, M> { type Error = Error; } -impl<'d, T: BasicInstance, M: Mode> embedded_hal_nb::serial::Read for UartRx<'d, T, M> { +impl<'d, M: Mode> embedded_hal_nb::serial::Read for UartRx<'d, M> { fn read(&mut self) -> nb::Result { self.nb_read() } } -impl<'d, T: BasicInstance, M: Mode> embedded_hal_nb::serial::Write for UartTx<'d, T, M> { +impl<'d, M: Mode> embedded_hal_nb::serial::Write for UartTx<'d, M> { fn write(&mut self, char: u8) -> nb::Result<(), Self::Error> { self.blocking_write(&[char]).map_err(nb::Error::Other) } @@ -1532,13 +1568,13 @@ impl<'d, T: BasicInstance, M: Mode> embedded_hal_nb::serial::Write for UartTx<'d } } -impl<'d, T: BasicInstance, M: Mode> embedded_hal_nb::serial::Read for Uart<'d, T, M> { +impl<'d, M: Mode> embedded_hal_nb::serial::Read for Uart<'d, M> { fn read(&mut self) -> Result> { self.nb_read() } } -impl<'d, T: BasicInstance, M: Mode> embedded_hal_nb::serial::Write for Uart<'d, T, M> { +impl<'d, M: Mode> embedded_hal_nb::serial::Write for Uart<'d, M> { fn write(&mut self, char: u8) -> nb::Result<(), Self::Error> { self.blocking_write(&[char]).map_err(nb::Error::Other) } @@ -1554,24 +1590,15 @@ impl embedded_io::Error for Error { } } -impl embedded_io::ErrorType for Uart<'_, T, M> -where - T: BasicInstance, -{ +impl embedded_io::ErrorType for Uart<'_, M> { type Error = Error; } -impl embedded_io::ErrorType for UartTx<'_, T, M> -where - T: BasicInstance, -{ +impl embedded_io::ErrorType for UartTx<'_, M> { type Error = Error; } -impl embedded_io::Write for Uart<'_, T, M> -where - T: BasicInstance, -{ +impl embedded_io::Write for Uart<'_, M> { fn write(&mut self, buf: &[u8]) -> Result { self.blocking_write(buf)?; Ok(buf.len()) @@ -1582,10 +1609,7 @@ where } } -impl embedded_io::Write for UartTx<'_, T, M> -where - T: BasicInstance, -{ +impl embedded_io::Write for UartTx<'_, M> { fn write(&mut self, buf: &[u8]) -> Result { self.blocking_write(buf)?; Ok(buf.len()) @@ -1596,10 +1620,7 @@ where } } -impl embedded_io_async::Write for Uart<'_, T, Async> -where - T: BasicInstance, -{ +impl embedded_io_async::Write for Uart<'_, Async> { async fn write(&mut self, buf: &[u8]) -> Result { self.write(buf).await?; Ok(buf.len()) @@ -1610,10 +1631,7 @@ where } } -impl embedded_io_async::Write for UartTx<'_, T, Async> -where - T: BasicInstance, -{ +impl embedded_io_async::Write for UartTx<'_, Async> { async fn write(&mut self, buf: &[u8]) -> Result { self.write(buf).await?; Ok(buf.len()) @@ -1686,72 +1704,75 @@ enum Kind { struct State { rx_waker: AtomicWaker, + tx_rx_refcount: AtomicU8, } impl State { const fn new() -> Self { Self { rx_waker: AtomicWaker::new(), + tx_rx_refcount: AtomicU8::new(0), } } } -trait SealedBasicInstance: crate::rcc::RccPeripheral { - const KIND: Kind; +struct Info { + regs: Regs, + enable_bit: ClockEnableBit, + interrupt: Interrupt, + kind: Kind, +} - fn regs() -> Regs; +#[allow(private_interfaces)] +pub(crate) trait SealedInstance: crate::rcc::RccPeripheral { + fn info() -> &'static Info; fn state() -> &'static State; - fn buffered_state() -> &'static buffered::State; } -trait SealedFullInstance: SealedBasicInstance { - #[allow(unused)] - fn regs_uart() -> crate::pac::usart::Usart; -} - -/// Basic UART driver instance +/// USART peripheral instance trait. #[allow(private_bounds)] -pub trait BasicInstance: Peripheral

+ SealedBasicInstance + 'static + Send { - /// Interrupt for this instance. +pub trait Instance: Peripheral

+ SealedInstance + 'static + Send { + /// Interrupt for this peripheral. type Interrupt: interrupt::typelevel::Interrupt; } -/// Full UART driver instance -#[allow(private_bounds)] -pub trait FullInstance: SealedFullInstance {} +pin_trait!(RxPin, Instance); +pin_trait!(TxPin, Instance); +pin_trait!(CtsPin, Instance); +pin_trait!(RtsPin, Instance); +pin_trait!(CkPin, Instance); +pin_trait!(DePin, Instance); -pin_trait!(RxPin, BasicInstance); -pin_trait!(TxPin, BasicInstance); -pin_trait!(CtsPin, BasicInstance); -pin_trait!(RtsPin, BasicInstance); -pin_trait!(CkPin, BasicInstance); -pin_trait!(DePin, BasicInstance); - -dma_trait!(TxDma, BasicInstance); -dma_trait!(RxDma, BasicInstance); +dma_trait!(TxDma, Instance); +dma_trait!(RxDma, Instance); macro_rules! impl_usart { ($inst:ident, $irq:ident, $kind:expr) => { - impl SealedBasicInstance for crate::peripherals::$inst { - const KIND: Kind = $kind; - - fn regs() -> Regs { - unsafe { Regs::from_ptr(crate::pac::$inst.as_ptr()) } + #[allow(private_interfaces)] + impl SealedInstance for crate::peripherals::$inst { + fn info() -> &'static Info { + static INFO: Info = Info { + regs: unsafe { Regs::from_ptr(crate::pac::$inst.as_ptr()) }, + enable_bit: crate::peripherals::$inst::ENABLE_BIT, + interrupt: crate::interrupt::typelevel::$irq::IRQ, + kind: $kind, + }; + &INFO } - fn state() -> &'static crate::usart::State { - static STATE: crate::usart::State = crate::usart::State::new(); + fn state() -> &'static State { + static STATE: State = State::new(); &STATE } fn buffered_state() -> &'static buffered::State { - static STATE: buffered::State = buffered::State::new(); - &STATE + static BUFFERED_STATE: buffered::State = buffered::State::new(); + &BUFFERED_STATE } } - impl BasicInstance for peripherals::$inst { + impl Instance for crate::peripherals::$inst { type Interrupt = crate::interrupt::typelevel::$irq; } }; @@ -1761,16 +1782,7 @@ foreach_interrupt!( ($inst:ident, usart, LPUART, $signal_name:ident, $irq:ident) => { impl_usart!($inst, $irq, Kind::Lpuart); }; - ($inst:ident, usart, $block:ident, $signal_name:ident, $irq:ident) => { impl_usart!($inst, $irq, Kind::Uart); - - impl SealedFullInstance for peripherals::$inst { - fn regs_uart() -> crate::pac::usart::Usart { - crate::pac::$inst - } - } - - impl FullInstance for peripherals::$inst {} }; ); diff --git a/embassy-stm32/src/usart/ringbuffered.rs b/embassy-stm32/src/usart/ringbuffered.rs index 0a6491bd5..f3a88b93f 100644 --- a/embassy-stm32/src/usart/ringbuffered.rs +++ b/embassy-stm32/src/usart/ringbuffered.rs @@ -1,5 +1,4 @@ use core::future::poll_fn; -use core::marker::PhantomData; use core::mem; use core::sync::atomic::{compiler_fence, Ordering}; use core::task::Poll; @@ -7,20 +6,23 @@ use core::task::Poll; use embassy_embedded_hal::SetConfig; use futures_util::future::{select, Either}; -use super::{clear_interrupt_flags, rdr, reconfigure, sr, BasicInstance, Config, ConfigError, Error, UartRx}; +use super::{clear_interrupt_flags, rdr, reconfigure, sr, Config, ConfigError, Error, Info, State, UartRx}; use crate::dma::ReadableRingBuffer; use crate::mode::Async; +use crate::time::Hertz; use crate::usart::{Regs, Sr}; /// Rx-only Ring-buffered UART Driver /// /// Created with [UartRx::into_ring_buffered] -pub struct RingBufferedUartRx<'d, T: BasicInstance> { - _phantom: PhantomData, +pub struct RingBufferedUartRx<'d> { + info: &'static Info, + state: &'static State, + kernel_clock: Hertz, ring_buf: ReadableRingBuffer<'d, u8>, } -impl<'d, T: BasicInstance> SetConfig for RingBufferedUartRx<'d, T> { +impl<'d> SetConfig for RingBufferedUartRx<'d> { type Config = Config; type ConfigError = ConfigError; @@ -29,11 +31,11 @@ impl<'d, T: BasicInstance> SetConfig for RingBufferedUartRx<'d, T> { } } -impl<'d, T: BasicInstance> UartRx<'d, T, Async> { +impl<'d> UartRx<'d, Async> { /// Turn the `UartRx` into a buffered uart which can continously receive in the background /// without the possibility of losing bytes. The `dma_buf` is a buffer registered to the /// DMA controller, and must be large enough to prevent overflows. - pub fn into_ring_buffered(mut self, dma_buf: &'d mut [u8]) -> RingBufferedUartRx<'d, T> { + pub fn into_ring_buffered(mut self, dma_buf: &'d mut [u8]) -> RingBufferedUartRx<'d> { assert!(!dma_buf.is_empty() && dma_buf.len() <= 0xFFFF); let opts = Default::default(); @@ -43,19 +45,24 @@ impl<'d, T: BasicInstance> UartRx<'d, T, Async> { let request = rx_dma.request; let rx_dma = unsafe { rx_dma.channel.clone_unchecked() }; - let ring_buf = unsafe { ReadableRingBuffer::new(rx_dma, request, rdr(T::regs()), dma_buf, opts) }; + let info = self.info; + let state = self.state; + let kernel_clock = self.kernel_clock; + let ring_buf = unsafe { ReadableRingBuffer::new(rx_dma, request, rdr(info.regs), dma_buf, opts) }; // Don't disable the clock mem::forget(self); RingBufferedUartRx { - _phantom: PhantomData, + info, + state, + kernel_clock, ring_buf, } } } -impl<'d, T: BasicInstance> RingBufferedUartRx<'d, T> { +impl<'d> RingBufferedUartRx<'d> { /// Clear the ring buffer and start receiving in the background pub fn start(&mut self) -> Result<(), Error> { // Clear the ring buffer so that it is ready to receive data @@ -74,7 +81,7 @@ impl<'d, T: BasicInstance> RingBufferedUartRx<'d, T> { /// Reconfigure the driver pub fn set_config(&mut self, config: &Config) -> Result<(), ConfigError> { - reconfigure::(config) + reconfigure(self.info, self.kernel_clock, config) } /// Start uart background receive @@ -85,7 +92,7 @@ impl<'d, T: BasicInstance> RingBufferedUartRx<'d, T> { // start the dma controller self.ring_buf.start(); - let r = T::regs(); + let r = self.info.regs; // clear all interrupts and DMA Rx Request r.cr1().modify(|w| { // disable RXNE interrupt @@ -107,7 +114,7 @@ impl<'d, T: BasicInstance> RingBufferedUartRx<'d, T> { fn teardown_uart(&mut self) { self.ring_buf.request_stop(); - let r = T::regs(); + let r = self.info.regs; // clear all interrupts and DMA Rx Request r.cr1().modify(|w| { // disable RXNE interrupt @@ -136,14 +143,14 @@ impl<'d, T: BasicInstance> RingBufferedUartRx<'d, T> { /// Receive in the background is terminated if an error is returned. /// It must then manually be started again by calling `start()` or by re-calling `read()`. pub async fn read(&mut self, buf: &mut [u8]) -> Result { - let r = T::regs(); + let r = self.info.regs; // Start background receive if it was not already started if !r.cr3().read().dmar() { self.start()?; } - check_for_errors(clear_idle_flag(T::regs()))?; + check_for_errors(clear_idle_flag(r))?; loop { match self.ring_buf.read(buf) { @@ -184,15 +191,15 @@ impl<'d, T: BasicInstance> RingBufferedUartRx<'d, T> { }); // Future which completes when idle line is detected + let s = self.state; let uart = poll_fn(|cx| { - let s = T::state(); s.rx_waker.register(cx.waker()); compiler_fence(Ordering::SeqCst); // Critical section is needed so that IDLE isn't set after // our read but before we clear it. - let sr = critical_section::with(|_| clear_idle_flag(T::regs())); + let sr = critical_section::with(|_| clear_idle_flag(self.info.regs)); check_for_errors(sr)?; @@ -211,13 +218,13 @@ impl<'d, T: BasicInstance> RingBufferedUartRx<'d, T> { } } -impl Drop for RingBufferedUartRx<'_, T> { +impl Drop for RingBufferedUartRx<'_> { fn drop(&mut self) { self.teardown_uart(); - - T::disable(); + super::drop_tx_rx(self.info, self.state); } } + /// Return an error result if the Sr register has errors fn check_for_errors(s: Sr) -> Result<(), Error> { if s.pe() { @@ -248,17 +255,11 @@ fn clear_idle_flag(r: Regs) -> Sr { sr } -impl embedded_io_async::ErrorType for RingBufferedUartRx<'_, T> -where - T: BasicInstance, -{ +impl embedded_io_async::ErrorType for RingBufferedUartRx<'_> { type Error = Error; } -impl embedded_io_async::Read for RingBufferedUartRx<'_, T> -where - T: BasicInstance, -{ +impl embedded_io_async::Read for RingBufferedUartRx<'_> { async fn read(&mut self, buf: &mut [u8]) -> Result { self.read(buf).await } diff --git a/examples/stm32h5/src/bin/usart_split.rs b/examples/stm32h5/src/bin/usart_split.rs index 77b4caa9e..d26c5003c 100644 --- a/examples/stm32h5/src/bin/usart_split.rs +++ b/examples/stm32h5/src/bin/usart_split.rs @@ -4,7 +4,6 @@ use defmt::*; use embassy_executor::Spawner; use embassy_stm32::mode::Async; -use embassy_stm32::peripherals::UART7; use embassy_stm32::usart::{Config, Uart, UartRx}; use embassy_stm32::{bind_interrupts, peripherals, usart}; use embassy_sync::blocking_mutex::raw::ThreadModeRawMutex; @@ -38,7 +37,7 @@ async fn main(spawner: Spawner) -> ! { } #[embassy_executor::task] -async fn reader(mut rx: UartRx<'static, UART7, Async>) { +async fn reader(mut rx: UartRx<'static, Async>) { let mut buf = [0; 8]; loop { info!("reading..."); diff --git a/examples/stm32h7/src/bin/usart_split.rs b/examples/stm32h7/src/bin/usart_split.rs index 4ad8e77ce..2bb58be5e 100644 --- a/examples/stm32h7/src/bin/usart_split.rs +++ b/examples/stm32h7/src/bin/usart_split.rs @@ -4,7 +4,6 @@ use defmt::*; use embassy_executor::Spawner; use embassy_stm32::mode::Async; -use embassy_stm32::peripherals::UART7; use embassy_stm32::usart::{Config, Uart, UartRx}; use embassy_stm32::{bind_interrupts, peripherals, usart}; use embassy_sync::blocking_mutex::raw::ThreadModeRawMutex; @@ -38,7 +37,7 @@ async fn main(spawner: Spawner) -> ! { } #[embassy_executor::task] -async fn reader(mut rx: UartRx<'static, UART7, Async>) { +async fn reader(mut rx: UartRx<'static, Async>) { let mut buf = [0; 8]; loop { info!("reading..."); diff --git a/examples/stm32h7rs/src/bin/usart_split.rs b/examples/stm32h7rs/src/bin/usart_split.rs index 77b4caa9e..d26c5003c 100644 --- a/examples/stm32h7rs/src/bin/usart_split.rs +++ b/examples/stm32h7rs/src/bin/usart_split.rs @@ -4,7 +4,6 @@ use defmt::*; use embassy_executor::Spawner; use embassy_stm32::mode::Async; -use embassy_stm32::peripherals::UART7; use embassy_stm32::usart::{Config, Uart, UartRx}; use embassy_stm32::{bind_interrupts, peripherals, usart}; use embassy_sync::blocking_mutex::raw::ThreadModeRawMutex; @@ -38,7 +37,7 @@ async fn main(spawner: Spawner) -> ! { } #[embassy_executor::task] -async fn reader(mut rx: UartRx<'static, UART7, Async>) { +async fn reader(mut rx: UartRx<'static, Async>) { let mut buf = [0; 8]; loop { info!("reading..."); diff --git a/tests/stm32/src/bin/usart_rx_ringbuffered.rs b/tests/stm32/src/bin/usart_rx_ringbuffered.rs index 908452eaf..ea1e52358 100644 --- a/tests/stm32/src/bin/usart_rx_ringbuffered.rs +++ b/tests/stm32/src/bin/usart_rx_ringbuffered.rs @@ -52,7 +52,7 @@ async fn main(spawner: Spawner) { } #[embassy_executor::task] -async fn transmit_task(mut tx: UartTx<'static, peris::UART, Async>) { +async fn transmit_task(mut tx: UartTx<'static, Async>) { // workaround https://github.com/embassy-rs/embassy/issues/1426 Timer::after_millis(100).await; @@ -75,7 +75,7 @@ async fn transmit_task(mut tx: UartTx<'static, peris::UART, Async>) { } #[embassy_executor::task] -async fn receive_task(mut rx: RingBufferedUartRx<'static, peris::UART>) { +async fn receive_task(mut rx: RingBufferedUartRx<'static>) { info!("Ready to receive..."); let mut rng = ChaCha8Rng::seed_from_u64(1337); From f285a545be80772d1b9dd0d98f8ec89184deb388 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Jo=C3=ABl=20Schulz-Ansres?= Date: Thu, 23 May 2024 23:52:18 +0200 Subject: [PATCH 376/581] Change bool to Pull --- embassy-stm32/src/spi/mod.rs | 34 ++++++---------------------------- 1 file changed, 6 insertions(+), 28 deletions(-) diff --git a/embassy-stm32/src/spi/mod.rs b/embassy-stm32/src/spi/mod.rs index be8cfcecf..9238e0f6f 100644 --- a/embassy-stm32/src/spi/mod.rs +++ b/embassy-stm32/src/spi/mod.rs @@ -54,7 +54,7 @@ pub struct Config { /// /// There are some ICs that require a pull-up on the MISO pin for some applications. /// If you are unsure, you probably don't need this. - pub miso_pullup: bool, + pub miso_pullup: Pull, } impl Default for Config { @@ -63,7 +63,7 @@ impl Default for Config { mode: MODE_0, bit_order: BitOrder::MsbFirst, frequency: Hertz(1_000_000), - miso_pullup: false, + miso_pullup: Pull::None, } } } @@ -280,14 +280,8 @@ impl<'d, M: PeriMode> Spi<'d, M> { }; let miso_pullup = match &self.miso { - None => false, - Some(pin) => { - if pin.pull() == Pull::Up { - true - } else { - false - } - } + None => Pull::None, + Some(pin) => pin.pull(), }; #[cfg(any(spi_v1, spi_f1, spi_v2))] @@ -424,15 +418,7 @@ impl<'d> Spi<'d, Blocking> { peri, new_pin!(sck, AFType::OutputPushPull, Speed::VeryHigh, config.sck_pull_mode()), new_pin!(mosi, AFType::OutputPushPull, Speed::VeryHigh), - new_pin!( - miso, - AFType::Input, - Speed::VeryHigh, - match config.miso_pullup { - true => Pull::Up, - false => Pull::None, - } - ), + new_pin!(miso, AFType::Input, Speed::VeryHigh, config.miso_pullup), None, None, config, @@ -450,15 +436,7 @@ impl<'d> Spi<'d, Blocking> { peri, new_pin!(sck, AFType::OutputPushPull, Speed::VeryHigh, config.sck_pull_mode()), None, - new_pin!( - miso, - AFType::Input, - Speed::VeryHigh, - match config.miso_pullup { - true => Pull::Up, - false => Pull::None, - } - ), + new_pin!(miso, AFType::Input, Speed::VeryHigh, config.miso_pullup), None, None, config, From 5cba97821f6f3e716452d38bb0c645b51592abc0 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Jo=C3=ABl=20Schulz-Ansres?= Date: Fri, 24 May 2024 01:05:56 +0200 Subject: [PATCH 377/581] Naming: Change pullup to pull --- embassy-stm32/src/spi/mod.rs | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/embassy-stm32/src/spi/mod.rs b/embassy-stm32/src/spi/mod.rs index 9238e0f6f..5fc8691ac 100644 --- a/embassy-stm32/src/spi/mod.rs +++ b/embassy-stm32/src/spi/mod.rs @@ -54,7 +54,7 @@ pub struct Config { /// /// There are some ICs that require a pull-up on the MISO pin for some applications. /// If you are unsure, you probably don't need this. - pub miso_pullup: Pull, + pub miso_pull: Pull, } impl Default for Config { @@ -63,7 +63,7 @@ impl Default for Config { mode: MODE_0, bit_order: BitOrder::MsbFirst, frequency: Hertz(1_000_000), - miso_pullup: Pull::None, + miso_pull: Pull::None, } } } @@ -279,7 +279,7 @@ impl<'d, M: PeriMode> Spi<'d, M> { BitOrder::MsbFirst }; - let miso_pullup = match &self.miso { + let miso_pull = match &self.miso { None => Pull::None, Some(pin) => pin.pull(), }; @@ -295,7 +295,7 @@ impl<'d, M: PeriMode> Spi<'d, M> { mode: Mode { polarity, phase }, bit_order, frequency, - miso_pullup, + miso_pull, } } @@ -418,7 +418,7 @@ impl<'d> Spi<'d, Blocking> { peri, new_pin!(sck, AFType::OutputPushPull, Speed::VeryHigh, config.sck_pull_mode()), new_pin!(mosi, AFType::OutputPushPull, Speed::VeryHigh), - new_pin!(miso, AFType::Input, Speed::VeryHigh, config.miso_pullup), + new_pin!(miso, AFType::Input, Speed::VeryHigh, config.miso_pull), None, None, config, @@ -436,7 +436,7 @@ impl<'d> Spi<'d, Blocking> { peri, new_pin!(sck, AFType::OutputPushPull, Speed::VeryHigh, config.sck_pull_mode()), None, - new_pin!(miso, AFType::Input, Speed::VeryHigh, config.miso_pullup), + new_pin!(miso, AFType::Input, Speed::VeryHigh, config.miso_pull), None, None, config, From bfc5929f50c766a88c3c5120aa3210d3f1f21f5c Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Jo=C3=ABl=20Schulz-Andres?= Date: Fri, 24 May 2024 13:46:55 +0200 Subject: [PATCH 378/581] gpiov1: Do not call set_speed for AFType::Input Co-authored-by: Toby Fleming --- embassy-stm32/src/gpio.rs | 5 +++++ embassy-stm32/src/macros.rs | 6 +++++- 2 files changed, 10 insertions(+), 1 deletion(-) diff --git a/embassy-stm32/src/gpio.rs b/embassy-stm32/src/gpio.rs index 214813a42..81cb09b24 100644 --- a/embassy-stm32/src/gpio.rs +++ b/embassy-stm32/src/gpio.rs @@ -661,6 +661,11 @@ pub(crate) trait SealedPin { self.set_as_analog(); } + /// Sets the speed of the output pin. + /// + /// This should never be called for AFType::Input on the STM32F1 series, since MODE and + /// CNF bits are not independent. If the CNF bits are altered afterwards as well, this + /// will put the pin into output mode. #[inline] fn set_speed(&self, speed: Speed) { let pin = self._pin() as usize; diff --git a/embassy-stm32/src/macros.rs b/embassy-stm32/src/macros.rs index 7f8076043..8166dff6a 100644 --- a/embassy-stm32/src/macros.rs +++ b/embassy-stm32/src/macros.rs @@ -106,7 +106,11 @@ macro_rules! new_pin { ($name:ident, $aftype:expr, $speed:expr, $pull:expr) => {{ let pin = $name.into_ref(); pin.set_as_af_pull(pin.af_num(), $aftype, $pull); - pin.set_speed($speed); + // Do not call set_speed on AFType::Input, as MODE and CNF bits are not independent + // for gpio_v1 + if $aftype != crate::gpio::low_level::AFType::Input { + pin.set_speed($speed); + } Some(pin.map_into()) }}; } From 32a75cb7641faa8231d04a3ac53e9acac6a95d8f Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Jo=C3=ABl=20Schulz-Andres?= Date: Fri, 24 May 2024 13:53:19 +0200 Subject: [PATCH 379/581] Fix naming --- embassy-stm32/src/macros.rs | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/embassy-stm32/src/macros.rs b/embassy-stm32/src/macros.rs index 8166dff6a..8ffa50021 100644 --- a/embassy-stm32/src/macros.rs +++ b/embassy-stm32/src/macros.rs @@ -108,7 +108,7 @@ macro_rules! new_pin { pin.set_as_af_pull(pin.af_num(), $aftype, $pull); // Do not call set_speed on AFType::Input, as MODE and CNF bits are not independent // for gpio_v1 - if $aftype != crate::gpio::low_level::AFType::Input { + if $aftype != crate::gpio::AFType::Input { pin.set_speed($speed); } Some(pin.map_into()) From 201b5c6ec1eee12b34a2a2102263849d21ae8e7f Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Jo=C3=ABl=20Schulz-Andres?= Date: Fri, 24 May 2024 14:03:27 +0200 Subject: [PATCH 380/581] Add NRF52810 example --- examples/nrf52810/.cargo/config.toml | 9 +++++++ examples/nrf52810/Cargo.toml | 24 +++++++++++++++++++ examples/nrf52810/build.rs | 35 ++++++++++++++++++++++++++++ examples/nrf52810/memory.x | 7 ++++++ examples/nrf52810/src/bin/blinky.rs | 20 ++++++++++++++++ 5 files changed, 95 insertions(+) create mode 100644 examples/nrf52810/.cargo/config.toml create mode 100644 examples/nrf52810/Cargo.toml create mode 100644 examples/nrf52810/build.rs create mode 100644 examples/nrf52810/memory.x create mode 100644 examples/nrf52810/src/bin/blinky.rs diff --git a/examples/nrf52810/.cargo/config.toml b/examples/nrf52810/.cargo/config.toml new file mode 100644 index 000000000..47647db91 --- /dev/null +++ b/examples/nrf52810/.cargo/config.toml @@ -0,0 +1,9 @@ +[target.'cfg(all(target_arch = "arm", target_os = "none"))'] +# replace nRF82840_xxAA with your chip as listed in `probe-rs chip list` +runner = "probe-rs run --chip nRF52810_xxAA" + +[build] +target = "thumbv7em-none-eabi" + +[env] +DEFMT_LOG = "trace" diff --git a/examples/nrf52810/Cargo.toml b/examples/nrf52810/Cargo.toml new file mode 100644 index 000000000..8ed8f54d7 --- /dev/null +++ b/examples/nrf52810/Cargo.toml @@ -0,0 +1,24 @@ +[package] +edition = "2021" +name = "embassy-nrf52810-examples" +version = "0.1.0" +license = "MIT OR Apache-2.0" + +[dependencies] +embassy-futures = { version = "0.1.0", path = "../../embassy-futures" } +embassy-sync = { version = "0.5.0", path = "../../embassy-sync", features = ["defmt"] } +embassy-executor = { version = "0.5.0", path = "../../embassy-executor", features = ["task-arena-size-8192", "arch-cortex-m", "executor-thread", "executor-interrupt", "defmt", "integrated-timers"] } +embassy-time = { version = "0.3.0", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime"] } +embassy-nrf = { version = "0.1.0", path = "../../embassy-nrf", features = ["defmt", "nrf52810", "time-driver-rtc1", "gpiote", "unstable-pac", "time"] } + +defmt = "0.3" +defmt-rtt = "0.4" + +fixed = "1.10.0" +static_cell = { version = "2" } +cortex-m = { version = "0.7.6", features = ["inline-asm", "critical-section-single-core"] } +cortex-m-rt = "0.7.0" +panic-probe = { version = "0.3", features = ["print-defmt"] } + +[profile.release] +debug = 2 diff --git a/examples/nrf52810/build.rs b/examples/nrf52810/build.rs new file mode 100644 index 000000000..30691aa97 --- /dev/null +++ b/examples/nrf52810/build.rs @@ -0,0 +1,35 @@ +//! This build script copies the `memory.x` file from the crate root into +//! a directory where the linker can always find it at build time. +//! For many projects this is optional, as the linker always searches the +//! project root directory -- wherever `Cargo.toml` is. However, if you +//! are using a workspace or have a more complicated build setup, this +//! build script becomes required. Additionally, by requesting that +//! Cargo re-run the build script whenever `memory.x` is changed, +//! updating `memory.x` ensures a rebuild of the application with the +//! new memory settings. + +use std::env; +use std::fs::File; +use std::io::Write; +use std::path::PathBuf; + +fn main() { + // Put `memory.x` in our output directory and ensure it's + // on the linker search path. + let out = &PathBuf::from(env::var_os("OUT_DIR").unwrap()); + File::create(out.join("memory.x")) + .unwrap() + .write_all(include_bytes!("memory.x")) + .unwrap(); + println!("cargo:rustc-link-search={}", out.display()); + + // By default, Cargo will re-run a build script whenever + // any file in the project changes. By specifying `memory.x` + // here, we ensure the build script is only re-run when + // `memory.x` is changed. + println!("cargo:rerun-if-changed=memory.x"); + + println!("cargo:rustc-link-arg-bins=--nmagic"); + println!("cargo:rustc-link-arg-bins=-Tlink.x"); + println!("cargo:rustc-link-arg-bins=-Tdefmt.x"); +} diff --git a/examples/nrf52810/memory.x b/examples/nrf52810/memory.x new file mode 100644 index 000000000..7cf560e44 --- /dev/null +++ b/examples/nrf52810/memory.x @@ -0,0 +1,7 @@ +MEMORY +{ + /* NOTE 1 K = 1 KiBi = 1024 bytes */ + FLASH : ORIGIN = 0x00000000, LENGTH = 256K + RAM : ORIGIN = 0x20000000, LENGTH = 24K + +} diff --git a/examples/nrf52810/src/bin/blinky.rs b/examples/nrf52810/src/bin/blinky.rs new file mode 100644 index 000000000..1da039f7d --- /dev/null +++ b/examples/nrf52810/src/bin/blinky.rs @@ -0,0 +1,20 @@ +#![no_std] +#![no_main] + +use embassy_executor::Spawner; +use embassy_nrf::gpio::{Level, Output, OutputDrive}; +use embassy_time::Timer; +use {defmt_rtt as _, panic_probe as _}; + +#[embassy_executor::main] +async fn main(_spawner: Spawner) { + let p = embassy_nrf::init(Default::default()); + let mut led = Output::new(p.P0_18, Level::Low, OutputDrive::Standard); + + loop { + led.set_high(); + Timer::after_millis(300).await; + led.set_low(); + Timer::after_millis(300).await; + } +} From 06234e7839685fad6b4f3364f84305f2cf7b22c6 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Jo=C3=ABl=20Schulz-Andres?= Date: Fri, 24 May 2024 14:04:44 +0200 Subject: [PATCH 381/581] Add example to CI --- ci.sh | 1 + 1 file changed, 1 insertion(+) diff --git a/ci.sh b/ci.sh index 0b5308153..ee2f320b5 100755 --- a/ci.sh +++ b/ci.sh @@ -176,6 +176,7 @@ cargo batch \ --- build --release --manifest-path docs/examples/layer-by-layer/blinky-hal/Cargo.toml --target thumbv7em-none-eabi \ --- build --release --manifest-path docs/examples/layer-by-layer/blinky-irq/Cargo.toml --target thumbv7em-none-eabi \ --- build --release --manifest-path docs/examples/layer-by-layer/blinky-async/Cargo.toml --target thumbv7em-none-eabi \ + --- build --release --manifest-path examples/nrf52810/Cargo.toml --target thumbv7em-none-eabi --out-dir out/examples/nrf52810 \ --- build --release --manifest-path examples/nrf52840/Cargo.toml --target thumbv7em-none-eabi --out-dir out/examples/nrf52840 \ --- build --release --manifest-path examples/nrf5340/Cargo.toml --target thumbv8m.main-none-eabihf --out-dir out/examples/nrf5340 \ --- build --release --manifest-path examples/nrf9160/Cargo.toml --target thumbv8m.main-none-eabihf --out-dir out/examples/nrf9160 \ From fab434ae844d6fd64a5cdd282d47515a29e952e8 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Jo=C3=ABl=20Schulz-Andres?= Date: Fri, 24 May 2024 14:09:29 +0200 Subject: [PATCH 382/581] Use match instead of if --- embassy-stm32/src/macros.rs | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/embassy-stm32/src/macros.rs b/embassy-stm32/src/macros.rs index 8ffa50021..2458d089f 100644 --- a/embassy-stm32/src/macros.rs +++ b/embassy-stm32/src/macros.rs @@ -108,9 +108,10 @@ macro_rules! new_pin { pin.set_as_af_pull(pin.af_num(), $aftype, $pull); // Do not call set_speed on AFType::Input, as MODE and CNF bits are not independent // for gpio_v1 - if $aftype != crate::gpio::AFType::Input { - pin.set_speed($speed); - } + match $aftype { + crate::gpio::AFType::Input => {}, + _ => pin.set_speed($speed); + }; Some(pin.map_into()) }}; } From c4b3488f7ff747da776310ef0f9099329b5a069e Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Jo=C3=ABl=20Schulz-Andres?= Date: Fri, 24 May 2024 14:12:01 +0200 Subject: [PATCH 383/581] Add body to match statement --- embassy-stm32/src/macros.rs | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/embassy-stm32/src/macros.rs b/embassy-stm32/src/macros.rs index 2458d089f..2d3040b08 100644 --- a/embassy-stm32/src/macros.rs +++ b/embassy-stm32/src/macros.rs @@ -110,7 +110,7 @@ macro_rules! new_pin { // for gpio_v1 match $aftype { crate::gpio::AFType::Input => {}, - _ => pin.set_speed($speed); + _ => {pin.set_speed($speed);}, }; Some(pin.map_into()) }}; From e1d2ba07a79561cf18b30e905a28d0ff0744cb58 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Jo=C3=ABl=20Schulz-Andres?= Date: Fri, 24 May 2024 14:15:10 +0200 Subject: [PATCH 384/581] Formatting --- embassy-stm32/src/macros.rs | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/embassy-stm32/src/macros.rs b/embassy-stm32/src/macros.rs index 2d3040b08..dcd25cbe9 100644 --- a/embassy-stm32/src/macros.rs +++ b/embassy-stm32/src/macros.rs @@ -109,8 +109,10 @@ macro_rules! new_pin { // Do not call set_speed on AFType::Input, as MODE and CNF bits are not independent // for gpio_v1 match $aftype { - crate::gpio::AFType::Input => {}, - _ => {pin.set_speed($speed);}, + crate::gpio::AFType::Input => {} + _ => { + pin.set_speed($speed); + } }; Some(pin.map_into()) }}; From 92988a39397b8d016fbd6ec3783530da1bb43ae4 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Jo=C3=ABl=20Schulz-Andres?= Date: Fri, 24 May 2024 14:22:30 +0200 Subject: [PATCH 385/581] Correct chip in comment --- examples/nrf52810/.cargo/config.toml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/examples/nrf52810/.cargo/config.toml b/examples/nrf52810/.cargo/config.toml index 47647db91..917a5364a 100644 --- a/examples/nrf52810/.cargo/config.toml +++ b/examples/nrf52810/.cargo/config.toml @@ -1,5 +1,5 @@ [target.'cfg(all(target_arch = "arm", target_os = "none"))'] -# replace nRF82840_xxAA with your chip as listed in `probe-rs chip list` +# replace nRF82810_xxAA with your chip as listed in `probe-rs chip list` runner = "probe-rs run --chip nRF52810_xxAA" [build] From ac76a713e1dbf4b3b3de9b3017256a708b335452 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Jo=C3=ABl=20Schulz-Andres?= Date: Fri, 24 May 2024 16:54:04 +0200 Subject: [PATCH 386/581] Remove wrong modulo --- embassy-stm32/src/gpio.rs | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/embassy-stm32/src/gpio.rs b/embassy-stm32/src/gpio.rs index 9f28c8ec2..6a00b70ec 100644 --- a/embassy-stm32/src/gpio.rs +++ b/embassy-stm32/src/gpio.rs @@ -688,7 +688,7 @@ pub(crate) trait SealedPin { let crlh = if n < 8 { 0 } else { 1 }; match r.cr(crlh).read().mode(n % 8) { vals::Mode::INPUT => match r.cr(crlh).read().cnf_in(n % 8) { - vals::CnfIn::PULL => match r.odr().read().odr(n % 8) { + vals::CnfIn::PULL => match r.odr().read().odr(n) { vals::Odr::LOW => Pull::Down, vals::Odr::HIGH => Pull::Up, }, @@ -699,7 +699,7 @@ pub(crate) trait SealedPin { } #[cfg(gpio_v2)] { - match r.pupdr().read().pupdr(n % 8) { + match r.pupdr().read().pupdr(n) { vals::Pupdr::FLOATING => Pull::None, vals::Pupdr::PULLDOWN => Pull::Down, vals::Pupdr::PULLUP => Pull::Up, From 8e89e6a3139ce957ca2a0e126efcc80d8c33c683 Mon Sep 17 00:00:00 2001 From: Ulf Lilleengen Date: Fri, 24 May 2024 17:31:14 +0200 Subject: [PATCH 387/581] fix link to embassy book --- README.md | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/README.md b/README.md index 65ccaa967..8952b0358 100644 --- a/README.md +++ b/README.md @@ -2,7 +2,7 @@ Embassy is the next-generation framework for embedded applications. Write safe, correct and energy-efficient embedded code faster, using the Rust programming language, its async facilities, and the Embassy libraries. -## Documentation - API reference - Website - Chat +## Documentation - API reference - Website - Chat ## Rust + async â¤ï¸ embedded The Rust programming language is blazingly fast and memory-efficient, with no runtime, garbage collector or OS. It catches a wide variety of bugs at compile time, thanks to its full memory- and thread-safety, and expressive type system. From 33bdc9e85ff391da4ff4ff439abe86c2bae32986 Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Fri, 24 May 2024 20:04:14 +0200 Subject: [PATCH 388/581] rp: fix spinlocks staying locked after reset. Fixes #1736 --- embassy-rp/src/lib.rs | 44 +++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 44 insertions(+) diff --git a/embassy-rp/src/lib.rs b/embassy-rp/src/lib.rs index 1c83e306d..4602e66f4 100644 --- a/embassy-rp/src/lib.rs +++ b/embassy-rp/src/lib.rs @@ -352,6 +352,50 @@ pub fn init(config: config::Config) -> Peripherals { peripherals } +#[cfg(feature = "rt")] +#[cortex_m_rt::pre_init] +unsafe fn pre_init() { + // SIO does not get reset when core0 is reset with either `scb::sys_reset()` or with SWD. + // Since we're using SIO spinlock 31 for the critical-section impl, this causes random + // hangs if we reset in the middle of a CS, because the next boot sees the spinlock + // as locked and waits forever. + // + // See https://github.com/embassy-rs/embassy/issues/1736 + // and https://github.com/rp-rs/rp-hal/issues/292 + // and https://matrix.to/#/!vhKMWjizPZBgKeknOo:matrix.org/$VfOkQgyf1PjmaXZbtycFzrCje1RorAXd8BQFHTl4d5M + // + // According to Raspberry Pi, this is considered Working As Intended, and not an errata, + // even though this behavior is different from every other ARM chip (sys_reset usually resets + // the *system* as its name implies, not just the current core). + // + // To fix this, reset SIO on boot. We must do this in pre_init because it's unsound to do it + // in `embassy_rp::init`, since the user could've acquired a CS by then. pre_init is guaranteed + // to run before any user code. + // + // A similar thing could happen with PROC1. It is unclear whether it's possible for PROC1 + // to stay unreset through a PROC0 reset, so we reset it anyway just in case. + // + // Important info from PSM logic (from Luke Wren in above Matrix thread) + // + // The logic is, each PSM stage is reset if either of the following is true: + // - The previous stage is in reset and FRCE_ON is false + // - FRCE_OFF is true + // + // The PSM order is SIO -> PROC0 -> PROC1. + // So, we have to force-on PROC0 to prevent it from getting reset when resetting SIO. + pac::PSM.frce_on().write(|w| { + w.set_proc0(true); + }); + // Then reset SIO and PROC1. + pac::PSM.frce_off().write(|w| { + w.set_sio(true); + w.set_proc1(true); + }); + // clear force_off first, force_on second. The other way around would reset PROC0. + pac::PSM.frce_off().write(|_| {}); + pac::PSM.frce_on().write(|_| {}); +} + /// Extension trait for PAC regs, adding atomic xor/bitset/bitclear writes. trait RegExt { #[allow(unused)] From 081afca3f065dfd91e157d7c9a9477e2d914c99d Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Jan=20=C5=A0pa=C4=8Dek?= Date: Fri, 24 May 2024 22:04:04 +0200 Subject: [PATCH 389/581] stm32/rcc: replace generated enable/disable code with runtime info --- embassy-stm32/build.rs | 195 +++++++-------------- embassy-stm32/src/adc/f1.rs | 6 +- embassy-stm32/src/adc/f3.rs | 6 +- embassy-stm32/src/adc/f3_v1_1.rs | 6 +- embassy-stm32/src/adc/g4.rs | 4 +- embassy-stm32/src/adc/v1.rs | 6 +- embassy-stm32/src/adc/v2.rs | 6 +- embassy-stm32/src/adc/v3.rs | 4 +- embassy-stm32/src/adc/v4.rs | 4 +- embassy-stm32/src/can/bxcan/mod.rs | 6 +- embassy-stm32/src/can/fdcan.rs | 4 +- embassy-stm32/src/cordic/mod.rs | 6 +- embassy-stm32/src/crc/v1.rs | 5 +- embassy-stm32/src/crc/v2v3.rs | 5 +- embassy-stm32/src/cryp/mod.rs | 4 +- embassy-stm32/src/dac/mod.rs | 16 +- embassy-stm32/src/dcmi.rs | 4 +- embassy-stm32/src/dsihost.rs | 4 +- embassy-stm32/src/fmc.rs | 8 +- embassy-stm32/src/gpio.rs | 2 +- embassy-stm32/src/hash/mod.rs | 5 +- embassy-stm32/src/hrtim/mod.rs | 4 +- embassy-stm32/src/i2c/mod.rs | 8 +- embassy-stm32/src/i2c/v1.rs | 2 +- embassy-stm32/src/i2c/v2.rs | 2 +- embassy-stm32/src/ipcc.rs | 5 +- embassy-stm32/src/lib.rs | 7 +- embassy-stm32/src/ltdc.rs | 4 +- embassy-stm32/src/ospi/mod.rs | 6 +- embassy-stm32/src/qspi/mod.rs | 4 +- embassy-stm32/src/rcc/hsi48.rs | 4 +- embassy-stm32/src/rcc/mod.rs | 252 +++++++++++++++++++++------ embassy-stm32/src/rng.rs | 4 +- embassy-stm32/src/rtc/mod.rs | 2 +- embassy-stm32/src/sai/mod.rs | 6 +- embassy-stm32/src/sdmmc/mod.rs | 4 +- embassy-stm32/src/spi/mod.rs | 10 +- embassy-stm32/src/time_driver.rs | 4 +- embassy-stm32/src/timer/low_level.rs | 5 +- embassy-stm32/src/tsc/mod.rs | 6 +- embassy-stm32/src/ucpd.rs | 8 +- embassy-stm32/src/usart/buffered.rs | 9 +- embassy-stm32/src/usart/mod.rs | 14 +- embassy-stm32/src/usb/mod.rs | 4 +- embassy-stm32/src/usb/otg.rs | 4 +- 45 files changed, 379 insertions(+), 305 deletions(-) diff --git a/embassy-stm32/build.rs b/embassy-stm32/build.rs index 7bf6ffba2..6c524ced6 100644 --- a/embassy-stm32/build.rs +++ b/embassy-stm32/build.rs @@ -367,9 +367,6 @@ fn main() { .filter_map(|p| p.registers.as_ref()) .find(|r| r.kind == "rcc") .unwrap(); - for b in rcc_registers.ir.blocks { - eprintln!("{}", b.name); - } let rcc_block = rcc_registers.ir.blocks.iter().find(|b| b.name == "Rcc").unwrap(); // ======== @@ -388,7 +385,6 @@ fn main() { rcc_registers: &'a PeripheralRegisters, chained_muxes: HashMap<&'a str, &'a PeripheralRccRegister>, - refcount_statics: BTreeSet, clock_names: BTreeSet, muxes: BTreeSet<(Ident, Ident, Ident)>, } @@ -397,7 +393,6 @@ fn main() { rcc_registers, chained_muxes: HashMap::new(), - refcount_statics: BTreeSet::new(), clock_names: BTreeSet::new(), muxes: BTreeSet::new(), }; @@ -516,80 +511,64 @@ fn main() { } } + let mut refcount_idxs = HashMap::new(); + for p in METADATA.peripherals { if !singletons.contains(&p.name.to_string()) { continue; } if let Some(rcc) = &p.rcc { - let en = rcc.enable.as_ref().unwrap(); - - let (start_rst, end_rst) = match &rcc.reset { - Some(rst) => { - let rst_reg = format_ident!("{}", rst.register.to_ascii_lowercase()); - let set_rst_field = format_ident!("set_{}", rst.field.to_ascii_lowercase()); - ( - quote! { - crate::pac::RCC.#rst_reg().modify(|w| w.#set_rst_field(true)); - }, - quote! { - crate::pac::RCC.#rst_reg().modify(|w| w.#set_rst_field(false)); - }, - ) - } - None => (TokenStream::new(), TokenStream::new()), - }; - + let rst_reg = rcc.reset.as_ref(); + let en_reg = rcc.enable.as_ref().unwrap(); let pname = format_ident!("{}", p.name); - let en_reg = format_ident!("{}", en.register.to_ascii_lowercase()); - let set_en_field = format_ident!("set_{}", en.field.to_ascii_lowercase()); - let en_reg_offs = rcc_block - .items - .iter() - .find(|i| i.name.eq_ignore_ascii_case(en.register)) - .unwrap() - .byte_offset; - let en_reg_offs: u8 = (en_reg_offs / 4).try_into().unwrap(); - let en_bit_offs = &rcc_registers - .ir - .fieldsets - .iter() - .find(|i| i.name.eq_ignore_ascii_case(en.register)) - .unwrap() - .fields - .iter() - .find(|i| i.name.eq_ignore_ascii_case(en.field)) - .unwrap() - .bit_offset; - let BitOffset::Regular(en_bit_offs) = en_bit_offs else { - panic!("cursed bit offset") + let get_offset_and_bit = |reg: &PeripheralRccRegister| -> TokenStream { + let reg_offset = rcc_block + .items + .iter() + .find(|i| i.name.eq_ignore_ascii_case(reg.register)) + .unwrap() + .byte_offset; + let reg_offset: u8 = (reg_offset / 4).try_into().unwrap(); + + let bit_offset = &rcc_registers + .ir + .fieldsets + .iter() + .find(|i| i.name.eq_ignore_ascii_case(reg.register)) + .unwrap() + .fields + .iter() + .find(|i| i.name.eq_ignore_ascii_case(reg.field)) + .unwrap() + .bit_offset; + let BitOffset::Regular(bit_offset) = bit_offset else { + panic!("cursed bit offset") + }; + let bit_offset: u8 = bit_offset.offset.try_into().unwrap(); + + quote! { (#reg_offset, #bit_offset) } }; - let en_bit_offs: u8 = en_bit_offs.offset.try_into().unwrap(); - let refcount = *rcc_field_count.get(&(en.register, en.field)).unwrap() > 1; - let (before_enable, before_disable) = if refcount { - let refcount_static = - format_ident!("{}_{}", en.register.to_ascii_uppercase(), en.field.to_ascii_uppercase()); + let reset_offset_and_bit = match rst_reg { + Some(rst_reg) => { + let reset_offset_and_bit = get_offset_and_bit(rst_reg); + quote! { Some(#reset_offset_and_bit) } + } + None => quote! { None }, + }; + let enable_offset_and_bit = get_offset_and_bit(en_reg); - clock_gen.refcount_statics.insert(refcount_static.clone()); - - ( - quote! { - unsafe { refcount_statics::#refcount_static += 1 }; - if unsafe { refcount_statics::#refcount_static } > 1 { - return; - } - }, - quote! { - unsafe { refcount_statics::#refcount_static -= 1 }; - if unsafe { refcount_statics::#refcount_static } > 0 { - return; - } - }, - ) + let needs_refcount = *rcc_field_count.get(&(en_reg.register, en_reg.field)).unwrap() > 1; + let refcount_idx = if needs_refcount { + let next_refcount_idx = refcount_idxs.len() as u8; + let refcount_idx = *refcount_idxs + .entry((en_reg.register, en_reg.field)) + .or_insert(next_refcount_idx); + quote! { Some(#refcount_idx) } } else { - (TokenStream::new(), TokenStream::new()) + quote! { None } }; let clock_frequency = match &rcc.kernel_clock { @@ -599,24 +578,10 @@ fn main() { // A refcount leak can result if the same field is shared by peripherals with different stop modes // This condition should be checked in stm32-data - let stop_refcount = match rcc.stop_mode { - StopMode::Standby => None, - StopMode::Stop2 => Some(quote! { REFCOUNT_STOP2 }), - StopMode::Stop1 => Some(quote! { REFCOUNT_STOP1 }), - }; - - let (incr_stop_refcount, decr_stop_refcount) = match stop_refcount { - Some(stop_refcount) => ( - quote! { - #[cfg(feature = "low-power")] - unsafe { crate::rcc::#stop_refcount += 1 }; - }, - quote! { - #[cfg(feature = "low-power")] - unsafe { crate::rcc::#stop_refcount -= 1 }; - }, - ), - None => (TokenStream::new(), TokenStream::new()), + let stop_mode = match rcc.stop_mode { + StopMode::Standby => quote! { crate::rcc::StopMode::Standby }, + StopMode::Stop2 => quote! { crate::rcc::StopMode::Stop2 }, + StopMode::Stop1 => quote! { crate::rcc::StopMode::Stop1 }, }; g.extend(quote! { @@ -624,34 +589,16 @@ fn main() { fn frequency() -> crate::time::Hertz { #clock_frequency } - fn enable_and_reset_with_cs(_cs: critical_section::CriticalSection) { - #before_enable - #incr_stop_refcount - #start_rst - - crate::pac::RCC.#en_reg().modify(|w| w.#set_en_field(true)); - - // we must wait two peripheral clock cycles before the clock is active - // this seems to work, but might be incorrect - // see http://efton.sk/STM32/gotcha/g183.html - - // dummy read (like in the ST HALs) - let _ = crate::pac::RCC.#en_reg().read(); - - // DSB for good measure - cortex_m::asm::dsb(); - - #end_rst - } - fn disable_with_cs(_cs: critical_section::CriticalSection) { - #before_disable - crate::pac::RCC.#en_reg().modify(|w| w.#set_en_field(false)); - #decr_stop_refcount - } - - const ENABLE_BIT: crate::rcc::ClockEnableBit = - unsafe { crate::rcc::ClockEnableBit::new(#en_reg_offs, #en_bit_offs) }; + const RCC_INFO: crate::rcc::RccInfo = unsafe { + crate::rcc::RccInfo::new( + #reset_offset_and_bit, + #enable_offset_and_bit, + #refcount_idx, + #[cfg(feature = "low-power")] + #stop_mode, + ) + }; } impl crate::rcc::RccPeripheral for peripherals::#pname {} @@ -659,6 +606,14 @@ fn main() { } } + g.extend({ + let refcounts_len = refcount_idxs.len(); + let refcount_zeros: TokenStream = refcount_idxs.iter().map(|_| quote! { 0u8, }).collect(); + quote! { + pub(crate) static mut REFCOUNTS: [u8; #refcounts_len] = [#refcount_zeros]; + } + }); + let struct_fields: Vec<_> = clock_gen .muxes .iter() @@ -762,22 +717,6 @@ fn main() { } ); - let refcount_mod: TokenStream = clock_gen - .refcount_statics - .iter() - .map(|refcount_static| { - quote! { - pub(crate) static mut #refcount_static: u8 = 0; - } - }) - .collect(); - - g.extend(quote! { - mod refcount_statics { - #refcount_mod - } - }); - // ======== // Generate fns to enable GPIO, DMA in RCC diff --git a/embassy-stm32/src/adc/f1.rs b/embassy-stm32/src/adc/f1.rs index 3822d5032..b37ec260f 100644 --- a/embassy-stm32/src/adc/f1.rs +++ b/embassy-stm32/src/adc/f1.rs @@ -7,7 +7,7 @@ use embassy_hal_internal::into_ref; use super::blocking_delay_us; use crate::adc::{Adc, AdcChannel, Instance, SampleTime}; use crate::time::Hertz; -use crate::{interrupt, Peripheral}; +use crate::{interrupt, rcc, Peripheral}; pub const VDDA_CALIB_MV: u32 = 3300; pub const ADC_MAX: u32 = (1 << 12) - 1; @@ -50,7 +50,7 @@ impl super::SealedAdcChannel for Temperature { impl<'d, T: Instance> Adc<'d, T> { pub fn new(adc: impl Peripheral

+ 'd) -> Self { into_ref!(adc); - T::enable_and_reset(); + rcc::enable_and_reset::(); T::regs().cr2().modify(|reg| reg.set_adon(true)); // 11.4: Before starting a calibration, the ADC must have been in power-on state (ADON bit = ‘1’) @@ -169,6 +169,6 @@ impl<'d, T: Instance> Drop for Adc<'d, T> { fn drop(&mut self) { T::regs().cr2().modify(|reg| reg.set_adon(false)); - T::disable(); + rcc::disable::(); } } diff --git a/embassy-stm32/src/adc/f3.rs b/embassy-stm32/src/adc/f3.rs index 3f076d64b..ac88c9742 100644 --- a/embassy-stm32/src/adc/f3.rs +++ b/embassy-stm32/src/adc/f3.rs @@ -8,7 +8,7 @@ use super::blocking_delay_us; use crate::adc::{Adc, AdcChannel, Instance, SampleTime}; use crate::interrupt::typelevel::Interrupt; use crate::time::Hertz; -use crate::{interrupt, Peripheral}; +use crate::{interrupt, rcc, Peripheral}; pub const VDDA_CALIB_MV: u32 = 3300; pub const ADC_MAX: u32 = (1 << 12) - 1; @@ -63,7 +63,7 @@ impl<'d, T: Instance> Adc<'d, T> { into_ref!(adc); - T::enable_and_reset(); + rcc::enable_and_reset::(); // Enable the adc regulator T::regs().cr().modify(|w| w.set_advregen(vals::Advregen::INTERMEDIATE)); @@ -188,6 +188,6 @@ impl<'d, T: Instance> Drop for Adc<'d, T> { T::regs().cr().modify(|w| w.set_advregen(vals::Advregen::INTERMEDIATE)); T::regs().cr().modify(|w| w.set_advregen(vals::Advregen::DISABLED)); - T::disable(); + rcc::disable::(); } } diff --git a/embassy-stm32/src/adc/f3_v1_1.rs b/embassy-stm32/src/adc/f3_v1_1.rs index 106956989..689c2871d 100644 --- a/embassy-stm32/src/adc/f3_v1_1.rs +++ b/embassy-stm32/src/adc/f3_v1_1.rs @@ -10,7 +10,7 @@ use super::Resolution; use crate::adc::{Adc, AdcChannel, Instance, SampleTime}; use crate::interrupt::typelevel::Interrupt; use crate::time::Hertz; -use crate::{interrupt, Peripheral}; +use crate::{interrupt, rcc, Peripheral}; const ADC_FREQ: Hertz = crate::rcc::HSI_FREQ; @@ -143,7 +143,7 @@ impl<'d, T: Instance> Adc<'d, T> { ) -> Self { into_ref!(adc); - T::enable_and_reset(); + rcc::enable_and_reset::(); //let r = T::regs(); //r.cr2().write(|w| w.set_align(true)); @@ -403,6 +403,6 @@ impl<'d, T: Instance> Drop for Adc<'d, T> { T::regs().cr2().modify(|w| w.set_adon(false)); - T::disable(); + rcc::disable::(); } } diff --git a/embassy-stm32/src/adc/g4.rs b/embassy-stm32/src/adc/g4.rs index ce7f5db70..6569361fe 100644 --- a/embassy-stm32/src/adc/g4.rs +++ b/embassy-stm32/src/adc/g4.rs @@ -4,7 +4,7 @@ use pac::adccommon::vals::Presc; use super::{blocking_delay_us, Adc, AdcChannel, Instance, Resolution, SampleTime}; use crate::time::Hertz; -use crate::{pac, Peripheral}; +use crate::{pac, rcc, Peripheral}; /// Default VREF voltage used for sample conversion to millivolts. pub const VREF_DEFAULT_MV: u32 = 3300; @@ -130,7 +130,7 @@ impl<'d, T: Instance> Adc<'d, T> { /// Create a new ADC driver. pub fn new(adc: impl Peripheral

+ 'd) -> Self { embassy_hal_internal::into_ref!(adc); - T::enable_and_reset(); + rcc::enable_and_reset::(); let prescaler = Prescaler::from_ker_ck(T::frequency()); diff --git a/embassy-stm32/src/adc/v1.rs b/embassy-stm32/src/adc/v1.rs index 090790c39..9bec2e13b 100644 --- a/embassy-stm32/src/adc/v1.rs +++ b/embassy-stm32/src/adc/v1.rs @@ -10,7 +10,7 @@ use super::blocking_delay_us; use crate::adc::{Adc, AdcChannel, Instance, Resolution, SampleTime}; use crate::interrupt::typelevel::Interrupt; use crate::peripherals::ADC1; -use crate::{interrupt, Peripheral}; +use crate::{interrupt, rcc, Peripheral}; pub const VDDA_CALIB_MV: u32 = 3300; pub const VREF_INT: u32 = 1230; @@ -67,7 +67,7 @@ impl<'d, T: Instance> Adc<'d, T> { _irq: impl interrupt::typelevel::Binding> + 'd, ) -> Self { into_ref!(adc); - T::enable_and_reset(); + rcc::enable_and_reset::(); // Delay 1μs when using HSI14 as the ADC clock. // @@ -199,6 +199,6 @@ impl<'d, T: Instance> Drop for Adc<'d, T> { T::regs().cr().modify(|reg| reg.set_addis(true)); while T::regs().cr().read().aden() {} - T::disable(); + rcc::disable::(); } } diff --git a/embassy-stm32/src/adc/v2.rs b/embassy-stm32/src/adc/v2.rs index 033108195..77e8bb56f 100644 --- a/embassy-stm32/src/adc/v2.rs +++ b/embassy-stm32/src/adc/v2.rs @@ -4,7 +4,7 @@ use super::blocking_delay_us; use crate::adc::{Adc, AdcChannel, Instance, Resolution, SampleTime}; use crate::peripherals::ADC1; use crate::time::Hertz; -use crate::Peripheral; +use crate::{rcc, Peripheral}; /// Default VREF voltage used for sample conversion to millivolts. pub const VREF_DEFAULT_MV: u32 = 3300; @@ -96,7 +96,7 @@ where { pub fn new(adc: impl Peripheral

+ 'd) -> Self { into_ref!(adc); - T::enable_and_reset(); + rcc::enable_and_reset::(); let presc = Prescaler::from_pclk2(T::frequency()); T::common_regs().ccr().modify(|w| w.set_adcpre(presc.adcpre())); @@ -206,6 +206,6 @@ impl<'d, T: Instance> Drop for Adc<'d, T> { reg.set_adon(false); }); - T::disable(); + rcc::disable::(); } } diff --git a/embassy-stm32/src/adc/v3.rs b/embassy-stm32/src/adc/v3.rs index be857f4dd..398c57a92 100644 --- a/embassy-stm32/src/adc/v3.rs +++ b/embassy-stm32/src/adc/v3.rs @@ -3,7 +3,7 @@ use embassy_hal_internal::into_ref; use super::blocking_delay_us; use crate::adc::{Adc, AdcChannel, Instance, Resolution, SampleTime}; -use crate::Peripheral; +use crate::{rcc, Peripheral}; /// Default VREF voltage used for sample conversion to millivolts. pub const VREF_DEFAULT_MV: u32 = 3300; @@ -94,7 +94,7 @@ cfg_if! { impl<'d, T: Instance> Adc<'d, T> { pub fn new(adc: impl Peripheral

+ 'd) -> Self { into_ref!(adc); - T::enable_and_reset(); + rcc::enable_and_reset::(); T::regs().cr().modify(|reg| { #[cfg(not(any(adc_g0, adc_u0)))] reg.set_deeppwd(false); diff --git a/embassy-stm32/src/adc/v4.rs b/embassy-stm32/src/adc/v4.rs index f564114c2..50db646fe 100644 --- a/embassy-stm32/src/adc/v4.rs +++ b/embassy-stm32/src/adc/v4.rs @@ -4,7 +4,7 @@ use pac::adccommon::vals::Presc; use super::{blocking_delay_us, Adc, AdcChannel, Instance, Resolution, SampleTime}; use crate::time::Hertz; -use crate::{pac, Peripheral}; +use crate::{pac, rcc, Peripheral}; /// Default VREF voltage used for sample conversion to millivolts. pub const VREF_DEFAULT_MV: u32 = 3300; @@ -130,7 +130,7 @@ impl<'d, T: Instance> Adc<'d, T> { /// Create a new ADC driver. pub fn new(adc: impl Peripheral

+ 'd) -> Self { embassy_hal_internal::into_ref!(adc); - T::enable_and_reset(); + rcc::enable_and_reset::(); let prescaler = Prescaler::from_ker_ck(T::frequency()); diff --git a/embassy-stm32/src/can/bxcan/mod.rs b/embassy-stm32/src/can/bxcan/mod.rs index 912634b84..f6657f57e 100644 --- a/embassy-stm32/src/can/bxcan/mod.rs +++ b/embassy-stm32/src/can/bxcan/mod.rs @@ -19,7 +19,7 @@ use super::util; use crate::can::enums::{BusError, TryReadError}; use crate::gpio::AFType; use crate::interrupt::typelevel::Interrupt; -use crate::rcc::RccPeripheral; +use crate::rcc::{self, RccPeripheral}; use crate::{interrupt, peripherals, Peripheral}; /// Interrupt handler. @@ -183,7 +183,7 @@ impl<'d, T: Instance> Can<'d, T> { rx.set_as_af(rx.af_num(), AFType::Input); tx.set_as_af(tx.af_num(), AFType::OutputPushPull); - T::enable_and_reset(); + rcc::enable_and_reset::(); { T::regs().ier().write(|w| { @@ -720,7 +720,7 @@ impl<'d, T: Instance> Drop for Can<'d, T> { // Cannot call `free()` because it moves the instance. // Manually reset the peripheral. T::regs().mcr().write(|w| w.set_reset(true)); - T::disable(); + rcc::disable::(); } } diff --git a/embassy-stm32/src/can/fdcan.rs b/embassy-stm32/src/can/fdcan.rs index 81ceb06aa..d7b15274c 100644 --- a/embassy-stm32/src/can/fdcan.rs +++ b/embassy-stm32/src/can/fdcan.rs @@ -11,7 +11,7 @@ use embassy_sync::waitqueue::AtomicWaker; use crate::can::fd::peripheral::Registers; use crate::gpio::AFType; use crate::interrupt::typelevel::Interrupt; -use crate::rcc::RccPeripheral; +use crate::rcc::{self, RccPeripheral}; use crate::{interrupt, peripherals, Peripheral}; pub(crate) mod fd; @@ -180,7 +180,7 @@ impl<'d, T: Instance> CanConfigurator<'d, T> { rx.set_as_af(rx.af_num(), AFType::Input); tx.set_as_af(tx.af_num(), AFType::OutputPushPull); - T::enable_and_reset(); + rcc::enable_and_reset::(); let mut config = crate::can::fd::config::FdCanConfig::default(); config.timestamp_source = TimestampSource::Prescaler(TimestampPrescaler::_1); diff --git a/embassy-stm32/src/cordic/mod.rs b/embassy-stm32/src/cordic/mod.rs index 29b11735e..fb342d2e7 100644 --- a/embassy-stm32/src/cordic/mod.rs +++ b/embassy-stm32/src/cordic/mod.rs @@ -4,7 +4,7 @@ use embassy_hal_internal::drop::OnDrop; use embassy_hal_internal::{into_ref, Peripheral, PeripheralRef}; use crate::pac::cordic::vals; -use crate::{dma, peripherals}; +use crate::{dma, peripherals, rcc}; mod enums; pub use enums::*; @@ -199,7 +199,7 @@ impl<'d, T: Instance> Cordic<'d, T> { /// If you need a peripheral -> CORDIC -> peripheral mode, /// you may want to set Cordic into [Mode::ZeroOverhead] mode, and add extra arguments with [Self::extra_config] pub fn new(peri: impl Peripheral

+ 'd, config: Config) -> Self { - T::enable_and_reset(); + rcc::enable_and_reset::(); into_ref!(peri); @@ -259,7 +259,7 @@ impl<'d, T: Instance> Cordic<'d, T> { impl<'d, T: Instance> Drop for Cordic<'d, T> { fn drop(&mut self) { - T::disable(); + rcc::disable::(); } } diff --git a/embassy-stm32/src/crc/v1.rs b/embassy-stm32/src/crc/v1.rs index e8e0270af..f3d13de7c 100644 --- a/embassy-stm32/src/crc/v1.rs +++ b/embassy-stm32/src/crc/v1.rs @@ -2,8 +2,7 @@ use embassy_hal_internal::{into_ref, PeripheralRef}; use crate::pac::CRC as PAC_CRC; use crate::peripherals::CRC; -use crate::rcc::SealedRccPeripheral; -use crate::Peripheral; +use crate::{rcc, Peripheral}; /// CRC driver. pub struct Crc<'d> { @@ -17,7 +16,7 @@ impl<'d> Crc<'d> { // Note: enable and reset come from RccPeripheral. // enable CRC clock in RCC. - CRC::enable_and_reset(); + rcc::enable_and_reset::(); // Peripheral the peripheral let mut instance = Self { _peri: peripheral }; instance.reset(); diff --git a/embassy-stm32/src/crc/v2v3.rs b/embassy-stm32/src/crc/v2v3.rs index ad7c79f12..09d956d7c 100644 --- a/embassy-stm32/src/crc/v2v3.rs +++ b/embassy-stm32/src/crc/v2v3.rs @@ -3,8 +3,7 @@ use embassy_hal_internal::{into_ref, PeripheralRef}; use crate::pac::crc::vals; use crate::pac::CRC as PAC_CRC; use crate::peripherals::CRC; -use crate::rcc::SealedRccPeripheral; -use crate::Peripheral; +use crate::{rcc, Peripheral}; /// CRC driver. pub struct Crc<'d> { @@ -84,7 +83,7 @@ impl<'d> Crc<'d> { pub fn new(peripheral: impl Peripheral

+ 'd, config: Config) -> Self { // Note: enable and reset come from RccPeripheral. // reset to default values and enable CRC clock in RCC. - CRC::enable_and_reset(); + rcc::enable_and_reset::(); into_ref!(peripheral); let mut instance = Self { _peripheral: peripheral, diff --git a/embassy-stm32/src/cryp/mod.rs b/embassy-stm32/src/cryp/mod.rs index f19c94fda..01ea57d8e 100644 --- a/embassy-stm32/src/cryp/mod.rs +++ b/embassy-stm32/src/cryp/mod.rs @@ -9,7 +9,7 @@ use embassy_sync::waitqueue::AtomicWaker; use crate::dma::{NoDma, Transfer, TransferOptions}; use crate::interrupt::typelevel::Interrupt; -use crate::{interrupt, pac, peripherals, Peripheral}; +use crate::{interrupt, pac, peripherals, rcc, Peripheral}; const DES_BLOCK_SIZE: usize = 8; // 64 bits const AES_BLOCK_SIZE: usize = 16; // 128 bits @@ -1029,7 +1029,7 @@ impl<'d, T: Instance, DmaIn, DmaOut> Cryp<'d, T, DmaIn, DmaOut> { outdma: impl Peripheral

+ 'd, _irq: impl interrupt::typelevel::Binding> + 'd, ) -> Self { - T::enable_and_reset(); + rcc::enable_and_reset::(); into_ref!(peri, indma, outdma); let instance = Self { _peripheral: peri, diff --git a/embassy-stm32/src/dac/mod.rs b/embassy-stm32/src/dac/mod.rs index 8a748ad72..cdd8d1fd7 100644 --- a/embassy-stm32/src/dac/mod.rs +++ b/embassy-stm32/src/dac/mod.rs @@ -8,7 +8,7 @@ use embassy_hal_internal::{into_ref, PeripheralRef}; use crate::dma::NoDma; #[cfg(any(dac_v3, dac_v4, dac_v5, dac_v6, dac_v7))] use crate::pac::dac; -use crate::rcc::RccPeripheral; +use crate::rcc::{self, RccPeripheral}; use crate::{peripherals, Peripheral}; mod tsel; @@ -131,7 +131,7 @@ impl<'d, T: Instance, const N: u8, DMA> DacChannel<'d, T, N, DMA> { ) -> Self { into_ref!(dma, pin); pin.set_as_analog(); - T::enable_and_reset(); + rcc::enable_and_reset::(); let mut dac = Self { phantom: PhantomData, dma, @@ -157,7 +157,7 @@ impl<'d, T: Instance, const N: u8, DMA> DacChannel<'d, T, N, DMA> { #[cfg(all(any(dac_v3, dac_v4, dac_v5, dac_v6, dac_v7), not(any(stm32h56x, stm32h57x))))] pub fn new_internal(_peri: impl Peripheral

+ 'd, dma: impl Peripheral

+ 'd) -> Self { into_ref!(dma); - T::enable_and_reset(); + rcc::enable_and_reset::(); let mut dac = Self { phantom: PhantomData, dma, @@ -356,7 +356,7 @@ impl_dma_methods!(2, DacDma2); impl<'d, T: Instance, const N: u8, DMA> Drop for DacChannel<'d, T, N, DMA> { fn drop(&mut self) { - T::disable(); + rcc::disable::(); } } @@ -400,8 +400,8 @@ impl<'d, T: Instance, DMACh1, DMACh2> Dac<'d, T, DMACh1, DMACh2> { pin_ch2.set_as_analog(); // Enable twice to increment the DAC refcount for each channel. - T::enable_and_reset(); - T::enable_and_reset(); + rcc::enable_and_reset::(); + rcc::enable_and_reset::(); let mut ch1 = DacCh1 { phantom: PhantomData, @@ -444,8 +444,8 @@ impl<'d, T: Instance, DMACh1, DMACh2> Dac<'d, T, DMACh1, DMACh2> { ) -> Self { into_ref!(dma_ch1, dma_ch2); // Enable twice to increment the DAC refcount for each channel. - T::enable_and_reset(); - T::enable_and_reset(); + rcc::enable_and_reset::(); + rcc::enable_and_reset::(); let mut ch1 = DacCh1 { phantom: PhantomData, diff --git a/embassy-stm32/src/dcmi.rs b/embassy-stm32/src/dcmi.rs index 646ee2ce2..858ae49ca 100644 --- a/embassy-stm32/src/dcmi.rs +++ b/embassy-stm32/src/dcmi.rs @@ -9,7 +9,7 @@ use embassy_sync::waitqueue::AtomicWaker; use crate::dma::Transfer; use crate::gpio::{AFType, Speed}; use crate::interrupt::typelevel::Interrupt; -use crate::{interrupt, Peripheral}; +use crate::{interrupt, rcc, Peripheral}; /// Interrupt handler. pub struct InterruptHandler { @@ -350,7 +350,7 @@ where use_embedded_synchronization: bool, edm: u8, ) -> Self { - T::enable_and_reset(); + rcc::enable_and_reset::(); peri.regs().cr().modify(|r| { r.set_cm(true); // disable continuous mode (snapshot mode) diff --git a/embassy-stm32/src/dsihost.rs b/embassy-stm32/src/dsihost.rs index f1c737fdc..447665669 100644 --- a/embassy-stm32/src/dsihost.rs +++ b/embassy-stm32/src/dsihost.rs @@ -6,7 +6,7 @@ use embassy_hal_internal::{into_ref, PeripheralRef}; //use crate::gpio::{AnyPin, SealedPin}; use crate::gpio::{AFType, AnyPin, Pull, Speed}; -use crate::rcc::RccPeripheral; +use crate::rcc::{self, RccPeripheral}; use crate::{peripherals, Peripheral}; /// Performs a busy-wait delay for a specified number of microseconds. @@ -77,7 +77,7 @@ impl<'d, T: Instance> DsiHost<'d, T> { pub fn new(_peri: impl Peripheral

+ 'd, te: impl Peripheral

> + 'd) -> Self { into_ref!(te); - T::enable_and_reset(); + rcc::enable_and_reset::(); // Set Tearing Enable pin according to CubeMx example te.set_as_af_pull(te.af_num(), AFType::OutputPushPull, Pull::None); diff --git a/embassy-stm32/src/fmc.rs b/embassy-stm32/src/fmc.rs index aced69878..0df64f711 100644 --- a/embassy-stm32/src/fmc.rs +++ b/embassy-stm32/src/fmc.rs @@ -4,7 +4,7 @@ use core::marker::PhantomData; use embassy_hal_internal::into_ref; use crate::gpio::{AFType, Pull, Speed}; -use crate::Peripheral; +use crate::{rcc, Peripheral}; /// FMC driver pub struct Fmc<'d, T: Instance> { @@ -27,7 +27,7 @@ where /// Enable the FMC peripheral and reset it. pub fn enable(&mut self) { - T::enable_and_reset(); + rcc::enable_and_reset::(); } /// Enable the memory controller on applicable chips. @@ -54,7 +54,7 @@ where const REGISTERS: *const () = T::REGS.as_ptr() as *const _; fn enable(&mut self) { - T::enable_and_reset(); + rcc::enable_and_reset::(); } fn memory_controller_enable(&mut self) { @@ -200,7 +200,7 @@ impl<'d, T: Instance> Fmc<'d, T> { )); } -trait SealedInstance: crate::rcc::SealedRccPeripheral { +trait SealedInstance: crate::rcc::RccPeripheral { const REGS: crate::pac::fmc::Fmc; } diff --git a/embassy-stm32/src/gpio.rs b/embassy-stm32/src/gpio.rs index 808a5bc82..1c5d3fc76 100644 --- a/embassy-stm32/src/gpio.rs +++ b/embassy-stm32/src/gpio.rs @@ -813,7 +813,7 @@ foreach_pin!( pub(crate) unsafe fn init(_cs: CriticalSection) { #[cfg(afio)] - ::enable_and_reset_with_cs(_cs); + crate::rcc::enable_and_reset_with_cs::(_cs); crate::_generated::init_gpio(); } diff --git a/embassy-stm32/src/hash/mod.rs b/embassy-stm32/src/hash/mod.rs index 787d5b1c9..4d4a8ec5b 100644 --- a/embassy-stm32/src/hash/mod.rs +++ b/embassy-stm32/src/hash/mod.rs @@ -17,8 +17,7 @@ use crate::dma::NoDma; use crate::dma::Transfer; use crate::interrupt::typelevel::Interrupt; use crate::peripherals::HASH; -use crate::rcc::SealedRccPeripheral; -use crate::{interrupt, pac, peripherals, Peripheral}; +use crate::{interrupt, pac, peripherals, rcc, Peripheral}; #[cfg(hash_v1)] const NUM_CONTEXT_REGS: usize = 51; @@ -130,7 +129,7 @@ impl<'d, T: Instance, D> Hash<'d, T, D> { dma: impl Peripheral

+ 'd, _irq: impl interrupt::typelevel::Binding> + 'd, ) -> Self { - HASH::enable_and_reset(); + rcc::enable_and_reset::(); into_ref!(peripheral, dma); let instance = Self { _peripheral: peripheral, diff --git a/embassy-stm32/src/hrtim/mod.rs b/embassy-stm32/src/hrtim/mod.rs index 02e45819c..c9d5bff17 100644 --- a/embassy-stm32/src/hrtim/mod.rs +++ b/embassy-stm32/src/hrtim/mod.rs @@ -9,7 +9,7 @@ pub use traits::Instance; use crate::gpio::{AFType, AnyPin}; use crate::time::Hertz; -use crate::Peripheral; +use crate::{rcc, Peripheral}; /// HRTIM burst controller instance. pub struct BurstController { @@ -172,7 +172,7 @@ impl<'d, T: Instance> AdvancedPwm<'d, T> { fn new_inner(tim: impl Peripheral

+ 'd) -> Self { into_ref!(tim); - T::enable_and_reset(); + rcc::enable_and_reset::(); #[cfg(stm32f334)] if crate::pac::RCC.cfgr3().read().hrtim1sw() == crate::pac::rcc::vals::Timsw::PLL1_P { diff --git a/embassy-stm32/src/i2c/mod.rs b/embassy-stm32/src/i2c/mod.rs index ef5fd0972..0bf57ef8a 100644 --- a/embassy-stm32/src/i2c/mod.rs +++ b/embassy-stm32/src/i2c/mod.rs @@ -18,7 +18,7 @@ use crate::dma::ChannelAndRequest; use crate::gpio::{AFType, Pull}; use crate::interrupt::typelevel::Interrupt; use crate::mode::{Async, Blocking, Mode}; -use crate::rcc::{ClockEnableBit, SealedRccPeripheral}; +use crate::rcc::{self, RccInfo, SealedRccPeripheral}; use crate::time::Hertz; use crate::{interrupt, peripherals}; @@ -128,7 +128,7 @@ impl<'d, M: Mode> I2c<'d, M> { ) -> Self { into_ref!(scl, sda); - T::enable_and_reset(); + rcc::enable_and_reset::(); scl.set_as_af_pull( scl.af_num(), @@ -224,7 +224,7 @@ impl State { struct Info { regs: crate::pac::i2c::I2c, - pub(crate) enable_bit: ClockEnableBit, + rcc: RccInfo, } peri_trait!( @@ -265,7 +265,7 @@ foreach_peripheral!( fn info() -> &'static Info { static INFO: Info = Info{ regs: crate::pac::$inst, - enable_bit: crate::peripherals::$inst::ENABLE_BIT, + rcc: crate::peripherals::$inst::RCC_INFO, }; &INFO } diff --git a/embassy-stm32/src/i2c/v1.rs b/embassy-stm32/src/i2c/v1.rs index 0269e53aa..0e2bd2e40 100644 --- a/embassy-stm32/src/i2c/v1.rs +++ b/embassy-stm32/src/i2c/v1.rs @@ -702,7 +702,7 @@ impl<'d> I2c<'d, Async> { impl<'d, M: PeriMode> Drop for I2c<'d, M> { fn drop(&mut self) { - self.info.enable_bit.disable() + self.info.rcc.disable() } } diff --git a/embassy-stm32/src/i2c/v2.rs b/embassy-stm32/src/i2c/v2.rs index aa6daf786..193f29733 100644 --- a/embassy-stm32/src/i2c/v2.rs +++ b/embassy-stm32/src/i2c/v2.rs @@ -673,7 +673,7 @@ impl<'d> I2c<'d, Async> { impl<'d, M: Mode> Drop for I2c<'d, M> { fn drop(&mut self) { - self.info.enable_bit.disable(); + self.info.rcc.disable(); } } diff --git a/embassy-stm32/src/ipcc.rs b/embassy-stm32/src/ipcc.rs index 4d535cce2..6c8347311 100644 --- a/embassy-stm32/src/ipcc.rs +++ b/embassy-stm32/src/ipcc.rs @@ -6,10 +6,9 @@ use core::task::Poll; use embassy_sync::waitqueue::AtomicWaker; -use crate::interrupt; use crate::interrupt::typelevel::Interrupt; use crate::peripherals::IPCC; -use crate::rcc::SealedRccPeripheral; +use crate::{interrupt, rcc}; /// Interrupt handler. pub struct ReceiveInterruptHandler {} @@ -102,7 +101,7 @@ pub struct Ipcc; impl Ipcc { /// Enable IPCC. pub fn enable(_config: Config) { - IPCC::enable_and_reset(); + rcc::enable_and_reset::(); IPCC::set_cpu2(true); // set RF wake-up clock = LSE diff --git a/embassy-stm32/src/lib.rs b/embassy-stm32/src/lib.rs index 81ee60c1c..fe9c0dcb5 100644 --- a/embassy-stm32/src/lib.rs +++ b/embassy-stm32/src/lib.rs @@ -194,7 +194,6 @@ pub(crate) use stm32_metapac as pac; use crate::interrupt::Priority; #[cfg(feature = "rt")] pub use crate::pac::NVIC_PRIO_BITS; -use crate::rcc::SealedRccPeripheral; /// `embassy-stm32` global configuration. #[non_exhaustive] @@ -310,11 +309,11 @@ pub fn init(config: Config) -> Peripherals { }); #[cfg(not(any(stm32f1, stm32wb, stm32wl)))] - peripherals::SYSCFG::enable_and_reset_with_cs(cs); + rcc::enable_and_reset_with_cs::(cs); #[cfg(not(any(stm32h5, stm32h7, stm32h7rs, stm32wb, stm32wl)))] - peripherals::PWR::enable_and_reset_with_cs(cs); + rcc::enable_and_reset_with_cs::(cs); #[cfg(not(any(stm32f2, stm32f4, stm32f7, stm32l0, stm32h5, stm32h7, stm32h7rs)))] - peripherals::FLASH::enable_and_reset_with_cs(cs); + rcc::enable_and_reset_with_cs::(cs); // Enable the VDDIO2 power supply on chips that have it. // Note that this requires the PWR peripheral to be enabled first. diff --git a/embassy-stm32/src/ltdc.rs b/embassy-stm32/src/ltdc.rs index 0cc8a0557..ac5decb03 100644 --- a/embassy-stm32/src/ltdc.rs +++ b/embassy-stm32/src/ltdc.rs @@ -1,7 +1,7 @@ //! LTDC use core::marker::PhantomData; -use crate::rcc::RccPeripheral; +use crate::rcc::{self, RccPeripheral}; use crate::{peripherals, Peripheral}; /// LTDC driver. @@ -60,7 +60,7 @@ impl<'d, T: Instance> Ltdc<'d, T> { .modify(|w| w.set_pllsaidivr(stm32_metapac::rcc::vals::Pllsaidivr::DIV2)); }); - T::enable_and_reset(); + rcc::enable_and_reset::(); //new_pin!(clk, AFType::OutputPushPull, Speed::VeryHigh, Pull::None); diff --git a/embassy-stm32/src/ospi/mod.rs b/embassy-stm32/src/ospi/mod.rs index 536da4ca0..882781cce 100644 --- a/embassy-stm32/src/ospi/mod.rs +++ b/embassy-stm32/src/ospi/mod.rs @@ -16,7 +16,7 @@ use crate::dma::{word, ChannelAndRequest}; use crate::gpio::{AFType, AnyPin, Pull, SealedPin as _, Speed}; use crate::mode::{Async, Blocking, Mode as PeriMode}; use crate::pac::octospi::{vals, Octospi as Regs}; -use crate::rcc::RccPeripheral; +use crate::rcc::{self, RccPeripheral}; use crate::{peripherals, Peripheral}; /// OPSI driver config. @@ -198,7 +198,7 @@ impl<'d, T: Instance, M: PeriMode> Ospi<'d, T, M> { into_ref!(peri); // System configuration - T::enable_and_reset(); + rcc::enable_and_reset::(); while T::REGS.sr().read().busy() {} // Device configuration @@ -1013,7 +1013,7 @@ impl<'d, T: Instance, M: PeriMode> Drop for Ospi<'d, T, M> { self.nss.as_ref().map(|x| x.set_as_disconnected()); self.dqs.as_ref().map(|x| x.set_as_disconnected()); - T::disable(); + rcc::disable::(); } } diff --git a/embassy-stm32/src/qspi/mod.rs b/embassy-stm32/src/qspi/mod.rs index a82e93b5b..06c8f4812 100644 --- a/embassy-stm32/src/qspi/mod.rs +++ b/embassy-stm32/src/qspi/mod.rs @@ -13,7 +13,7 @@ use crate::dma::ChannelAndRequest; use crate::gpio::{AFType, AnyPin, Pull, Speed}; use crate::mode::{Async, Blocking, Mode as PeriMode}; use crate::pac::quadspi::Quadspi as Regs; -use crate::rcc::RccPeripheral; +use crate::rcc::{self, RccPeripheral}; use crate::{peripherals, Peripheral}; /// QSPI transfer configuration. @@ -102,7 +102,7 @@ impl<'d, T: Instance, M: PeriMode> Qspi<'d, T, M> { ) -> Self { into_ref!(peri); - T::enable_and_reset(); + rcc::enable_and_reset::(); while T::REGS.sr().read().busy() {} diff --git a/embassy-stm32/src/rcc/hsi48.rs b/embassy-stm32/src/rcc/hsi48.rs index da81abc34..efabd059f 100644 --- a/embassy-stm32/src/rcc/hsi48.rs +++ b/embassy-stm32/src/rcc/hsi48.rs @@ -2,7 +2,7 @@ use crate::pac::crs::vals::Syncsrc; use crate::pac::{CRS, RCC}; -use crate::rcc::SealedRccPeripheral; +use crate::rcc::{self, SealedRccPeripheral}; use crate::time::Hertz; /// HSI48 speed @@ -44,7 +44,7 @@ pub(crate) fn init_hsi48(config: Hsi48Config) -> Hertz { while r.read().hsi48rdy() == false {} if config.sync_from_usb { - crate::peripherals::CRS::enable_and_reset(); + rcc::enable_and_reset::(); CRS.cfgr().modify(|w| { w.set_syncsrc(Syncsrc::USB); diff --git a/embassy-stm32/src/rcc/mod.rs b/embassy-stm32/src/rcc/mod.rs index 28816256c..0bf344c40 100644 --- a/embassy-stm32/src/rcc/mod.rs +++ b/embassy-stm32/src/rcc/mod.rs @@ -67,23 +67,185 @@ pub(crate) unsafe fn get_freqs() -> &'static Clocks { } pub(crate) trait SealedRccPeripheral { - const ENABLE_BIT: ClockEnableBit; - fn frequency() -> Hertz; - fn enable_and_reset_with_cs(cs: CriticalSection); - fn disable_with_cs(cs: CriticalSection); - - fn enable_and_reset() { - critical_section::with(|cs| Self::enable_and_reset_with_cs(cs)) - } - fn disable() { - critical_section::with(|cs| Self::disable_with_cs(cs)) - } + const RCC_INFO: RccInfo; } #[allow(private_bounds)] pub trait RccPeripheral: SealedRccPeripheral + 'static {} +/// Runtime information necessary to reset, enable and disable a peripheral. +pub(crate) struct RccInfo { + /// Offset in 32-bit words of the xxxRSTR register into the RCC register block, or 0xff if the + /// peripheral has no reset bit (we don't use an `Option` to save one byte of storage). + reset_offset_or_0xff: u8, + /// Position of the xxxRST bit within the xxxRSTR register (0..=31). + reset_bit: u8, + /// Offset in 32-bit words of the xxxENR register into the RCC register block. + enable_offset: u8, + /// Position of the xxxEN bit within the xxxENR register (0..=31). + enable_bit: u8, + /// If this peripheral shares the same xxxRSTR bit and xxxEN bit with other peripherals, we + /// maintain a refcount in `crate::_generated::REFCOUNTS` at this index. If the bit is not + /// shared, this is 0xff (we don't use an `Option` to save one byte of storage). + refcount_idx_or_0xff: u8, + /// Stop mode of the peripheral, used to maintain `REFCOUNT_STOP1` and `REFCOUNT_STOP2`. + #[cfg(feature = "low-power")] + stop_mode: StopMode, +} + +#[cfg(feature = "low-power")] +#[allow(dead_code)] +pub(crate) enum StopMode { + Standby, + Stop2, + Stop1, +} + +impl RccInfo { + /// Safety: + /// - `reset_offset_and_bit`, if set, must correspond to valid xxxRST bit + /// - `enable_offset_and_bit` must correspond to valid xxxEN bit + /// - `refcount_idx`, if set, must correspond to valid refcount in `_generated::REFCOUNTS` + /// - `stop_mode` must be valid + pub(crate) const unsafe fn new( + reset_offset_and_bit: Option<(u8, u8)>, + enable_offset_and_bit: (u8, u8), + refcount_idx: Option, + #[cfg(feature = "low-power")] stop_mode: StopMode, + ) -> Self { + let (reset_offset_or_0xff, reset_bit) = match reset_offset_and_bit { + Some((offset, bit)) => (offset, bit), + None => (0xff, 0xff), + }; + let (enable_offset, enable_bit) = enable_offset_and_bit; + let refcount_idx_or_0xff = match refcount_idx { + Some(idx) => idx, + None => 0xff, + }; + Self { + reset_offset_or_0xff, + reset_bit, + enable_offset, + enable_bit, + refcount_idx_or_0xff, + #[cfg(feature = "low-power")] + stop_mode, + } + } + + // TODO: should this be `unsafe`? + pub(crate) fn enable_and_reset_with_cs(&self, _cs: CriticalSection) { + if self.refcount_idx_or_0xff != 0xff { + let refcount_idx = self.refcount_idx_or_0xff as usize; + unsafe { + crate::_generated::REFCOUNTS[refcount_idx] += 1; + } + if unsafe { crate::_generated::REFCOUNTS[refcount_idx] } > 1 { + return; + } + } + + #[cfg(feature = "low-power")] + match self.stop_mode { + StopMode::Standby => {} + StopMode::Stop2 => unsafe { + REFCOUNT_STOP2 += 1; + }, + StopMode::Stop1 => unsafe { + REFCOUNT_STOP1 += 1; + }, + } + + // set the xxxRST bit + let reset_ptr = self.reset_ptr(); + if let Some(reset_ptr) = reset_ptr { + unsafe { + let val = reset_ptr.read_volatile(); + reset_ptr.write_volatile(val | 1u32 << self.reset_bit); + } + } + + // set the xxxEN bit + let enable_ptr = self.enable_ptr(); + unsafe { + let val = enable_ptr.read_volatile(); + enable_ptr.write_volatile(val | 1u32 << self.enable_bit); + } + + // we must wait two peripheral clock cycles before the clock is active + // this seems to work, but might be incorrect + // see http://efton.sk/STM32/gotcha/g183.html + + // dummy read (like in the ST HALs) + let _ = unsafe { enable_ptr.read_volatile() }; + + // DSB for good measure + cortex_m::asm::dsb(); + + // clear the xxxRST bit + if let Some(reset_ptr) = reset_ptr { + unsafe { + let val = reset_ptr.read_volatile(); + reset_ptr.write_volatile(val & !(1u32 << self.reset_bit)); + } + } + } + + // TODO: should this be `unsafe`? + pub(crate) fn disable_with_cs(&self, _cs: CriticalSection) { + if self.refcount_idx_or_0xff != 0xff { + let refcount_idx = self.refcount_idx_or_0xff as usize; + unsafe { + crate::_generated::REFCOUNTS[refcount_idx] -= 1; + } + if unsafe { crate::_generated::REFCOUNTS[refcount_idx] } > 0 { + return; + } + } + + #[cfg(feature = "low-power")] + match self.stop_mode { + StopMode::Standby => {} + StopMode::Stop2 => unsafe { + REFCOUNT_STOP2 -= 1; + }, + StopMode::Stop1 => unsafe { + REFCOUNT_STOP1 -= 1; + }, + } + + // clear the xxxEN bit + let enable_ptr = self.enable_ptr(); + unsafe { + let val = enable_ptr.read_volatile(); + enable_ptr.write_volatile(val & !(1u32 << self.enable_bit)); + } + } + + // TODO: should this be `unsafe`? + pub(crate) fn enable_and_reset(&self) { + critical_section::with(|cs| self.enable_and_reset_with_cs(cs)) + } + + // TODO: should this be `unsafe`? + pub(crate) fn disable(&self) { + critical_section::with(|cs| self.disable_with_cs(cs)) + } + + fn reset_ptr(&self) -> Option<*mut u32> { + if self.reset_offset_or_0xff != 0xff { + Some(unsafe { (RCC.as_ptr() as *mut u32).add(self.reset_offset_or_0xff as _) }) + } else { + None + } + } + + fn enable_ptr(&self) -> *mut u32 { + unsafe { (RCC.as_ptr() as *mut u32).add(self.enable_offset as _) } + } +} + #[allow(unused)] mod util { use crate::time::Hertz; @@ -128,8 +290,9 @@ pub fn frequency() -> Hertz { /// # Safety /// /// Peripheral must not be in use. -pub unsafe fn enable_and_reset() { - T::enable_and_reset(); +// TODO: should this be `unsafe`? +pub fn enable_and_reset_with_cs(cs: CriticalSection) { + T::RCC_INFO.enable_and_reset_with_cs(cs); } /// Disables peripheral `T`. @@ -137,52 +300,27 @@ pub unsafe fn enable_and_reset() { /// # Safety /// /// Peripheral must not be in use. -pub unsafe fn disable() { - T::disable(); +// TODO: should this be `unsafe`? +pub fn disable_with_cs(cs: CriticalSection) { + T::RCC_INFO.disable_with_cs(cs); } -/// Struct representing some clock enable bit (xxxENR.xxEN), only known at runtime. -#[derive(Clone, Copy)] -pub(crate) struct ClockEnableBit { - /// offset in 32bit words of the xxxENR register into the RCC register block. - offset: u8, - /// bit within the register (0..=31) - bit: u8, +/// Enables and resets peripheral `T`. +/// +/// # Safety +/// +/// Peripheral must not be in use. +// TODO: should this be `unsafe`? +pub fn enable_and_reset() { + T::RCC_INFO.enable_and_reset(); } -impl ClockEnableBit { - /// Safety: offset+bit must correspond to a valid xxxEN bit. - pub(crate) const unsafe fn new(offset: u8, bit: u8) -> Self { - Self { offset, bit } - } - - fn ptr(self) -> *mut u32 { - unsafe { (RCC.as_ptr() as *mut u32).add(self.offset as _) } - } - - #[allow(unused)] - pub(crate) fn enable_with_cs(self, _cs: CriticalSection) { - let p = self.ptr(); - unsafe { - let val = p.read_volatile(); - p.write_volatile(val | 1u32 << self.bit); - } - } - - pub(crate) fn disable_with_cs(self, _cs: CriticalSection) { - let p = self.ptr(); - unsafe { - let val = p.read_volatile(); - p.write_volatile(val & !(1u32 << self.bit)); - } - } - - #[allow(unused)] - pub(crate) fn enable(self) { - critical_section::with(|cs| self.enable_with_cs(cs)) - } - - pub(crate) fn disable(self) { - critical_section::with(|cs| self.disable_with_cs(cs)) - } +/// Disables peripheral `T`. +/// +/// # Safety +/// +/// Peripheral must not be in use. +// TODO: should this be `unsafe`? +pub fn disable() { + T::RCC_INFO.disable(); } diff --git a/embassy-stm32/src/rng.rs b/embassy-stm32/src/rng.rs index 7a228e4a4..94491c32f 100644 --- a/embassy-stm32/src/rng.rs +++ b/embassy-stm32/src/rng.rs @@ -10,7 +10,7 @@ use embassy_sync::waitqueue::AtomicWaker; use rand_core::{CryptoRng, RngCore}; use crate::interrupt::typelevel::Interrupt; -use crate::{interrupt, pac, peripherals, Peripheral}; +use crate::{interrupt, pac, peripherals, rcc, Peripheral}; static RNG_WAKER: AtomicWaker = AtomicWaker::new(); @@ -52,7 +52,7 @@ impl<'d, T: Instance> Rng<'d, T> { inner: impl Peripheral

+ 'd, _irq: impl interrupt::typelevel::Binding> + 'd, ) -> Self { - T::enable_and_reset(); + rcc::enable_and_reset::(); into_ref!(inner); let mut random = Self { _inner: inner }; random.reset(); diff --git a/embassy-stm32/src/rtc/mod.rs b/embassy-stm32/src/rtc/mod.rs index b12a0db66..f3cd16b4f 100644 --- a/embassy-stm32/src/rtc/mod.rs +++ b/embassy-stm32/src/rtc/mod.rs @@ -205,7 +205,7 @@ impl Rtc { /// Create a new RTC instance. pub fn new(_rtc: impl Peripheral

, rtc_config: RtcConfig) -> Self { #[cfg(not(any(stm32l0, stm32f3, stm32l1, stm32f0, stm32f2)))] - ::enable_and_reset(); + crate::rcc::enable_and_reset::(); let mut this = Self { #[cfg(feature = "low-power")] diff --git a/embassy-stm32/src/sai/mod.rs b/embassy-stm32/src/sai/mod.rs index 54dd81524..3faecdc33 100644 --- a/embassy-stm32/src/sai/mod.rs +++ b/embassy-stm32/src/sai/mod.rs @@ -11,7 +11,7 @@ pub use crate::dma::word; use crate::dma::{ringbuffer, Channel, ReadableRingBuffer, Request, TransferOptions, WritableRingBuffer}; use crate::gpio::{AFType, AnyPin, SealedPin as _}; use crate::pac::sai::{vals, Sai as Regs}; -use crate::rcc::RccPeripheral; +use crate::rcc::{self, RccPeripheral}; use crate::{peripherals, Peripheral}; /// SAI error @@ -722,7 +722,7 @@ pub struct SubBlock<'d, T, S: SubBlockInstance> { /// You can then create a [`Sai`] driver for each each half. pub fn split_subblocks<'d, T: Instance>(peri: impl Peripheral

+ 'd) -> (SubBlock<'d, T, A>, SubBlock<'d, T, B>) { into_ref!(peri); - T::enable_and_reset(); + rcc::enable_and_reset::(); ( SubBlock { @@ -978,7 +978,7 @@ impl<'d, T: Instance, W: word::Word> Sai<'d, T, W> { /// Reset SAI operation. pub fn reset() { - T::enable_and_reset(); + rcc::enable_and_reset::(); } /// Flush. diff --git a/embassy-stm32/src/sdmmc/mod.rs b/embassy-stm32/src/sdmmc/mod.rs index f79a11606..9c14837e1 100644 --- a/embassy-stm32/src/sdmmc/mod.rs +++ b/embassy-stm32/src/sdmmc/mod.rs @@ -16,7 +16,7 @@ use crate::dma::NoDma; use crate::gpio::{AFType, AnyPin, Pull, SealedPin, Speed}; use crate::interrupt::typelevel::Interrupt; use crate::pac::sdmmc::Sdmmc as RegBlock; -use crate::rcc::RccPeripheral; +use crate::rcc::{self, RccPeripheral}; use crate::time::Hertz; use crate::{interrupt, peripherals, Peripheral}; @@ -468,7 +468,7 @@ impl<'d, T: Instance, Dma: SdmmcDma + 'd> Sdmmc<'d, T, Dma> { ) -> Self { into_ref!(sdmmc, dma); - T::enable_and_reset(); + rcc::enable_and_reset::(); T::Interrupt::unpend(); unsafe { T::Interrupt::enable() }; diff --git a/embassy-stm32/src/spi/mod.rs b/embassy-stm32/src/spi/mod.rs index 5fc8691ac..33be7a701 100644 --- a/embassy-stm32/src/spi/mod.rs +++ b/embassy-stm32/src/spi/mod.rs @@ -13,7 +13,7 @@ use crate::dma::{slice_ptr_parts, word, ChannelAndRequest}; use crate::gpio::{AFType, AnyPin, Pull, SealedPin as _, Speed}; use crate::mode::{Async, Blocking, Mode as PeriMode}; use crate::pac::spi::{regs, vals, Spi as Regs}; -use crate::rcc::{ClockEnableBit, SealedRccPeripheral}; +use crate::rcc::{self, RccInfo, SealedRccPeripheral}; use crate::time::Hertz; use crate::Peripheral; @@ -129,7 +129,7 @@ impl<'d, M: PeriMode> Spi<'d, M> { let lsbfirst = config.raw_byte_order(); - T::enable_and_reset(); + rcc::enable_and_reset::(); #[cfg(any(spi_v1, spi_f1))] { @@ -738,7 +738,7 @@ impl<'d, M: PeriMode> Drop for Spi<'d, M> { self.mosi.as_ref().map(|x| x.set_as_disconnected()); self.miso.as_ref().map(|x| x.set_as_disconnected()); - self.info.enable_bit.disable(); + self.info.rcc.disable(); } } @@ -1118,7 +1118,7 @@ mod word_impl { pub(crate) struct Info { pub(crate) regs: Regs, - pub(crate) enable_bit: ClockEnableBit, + pub(crate) rcc: RccInfo, } struct State {} @@ -1145,7 +1145,7 @@ foreach_peripheral!( (spi, $inst:ident) => { peri_trait_impl!($inst, Info { regs: crate::pac::$inst, - enable_bit: crate::peripherals::$inst::ENABLE_BIT, + rcc: crate::peripherals::$inst::RCC_INFO, }); }; ); diff --git a/embassy-stm32/src/time_driver.rs b/embassy-stm32/src/time_driver.rs index e592fbf7d..f8041bf1e 100644 --- a/embassy-stm32/src/time_driver.rs +++ b/embassy-stm32/src/time_driver.rs @@ -12,7 +12,7 @@ use stm32_metapac::timer::{regs, TimGp16}; use crate::interrupt::typelevel::Interrupt; use crate::pac::timer::vals; -use crate::rcc::SealedRccPeripheral; +use crate::rcc::{self, SealedRccPeripheral}; #[cfg(feature = "low-power")] use crate::rtc::Rtc; use crate::timer::{CoreInstance, GeneralInstance1Channel}; @@ -276,7 +276,7 @@ impl RtcDriver { fn init(&'static self, cs: critical_section::CriticalSection) { let r = regs_gp16(); - ::enable_and_reset_with_cs(cs); + rcc::enable_and_reset_with_cs::(cs); let timer_freq = T::frequency(); diff --git a/embassy-stm32/src/timer/low_level.rs b/embassy-stm32/src/timer/low_level.rs index 7f533b75c..9932c04cd 100644 --- a/embassy-stm32/src/timer/low_level.rs +++ b/embassy-stm32/src/timer/low_level.rs @@ -10,6 +10,7 @@ use embassy_hal_internal::{into_ref, Peripheral, PeripheralRef}; use super::*; use crate::pac::timer::vals; +use crate::rcc; use crate::time::Hertz; /// Input capture mode. @@ -181,7 +182,7 @@ pub struct Timer<'d, T: CoreInstance> { impl<'d, T: CoreInstance> Drop for Timer<'d, T> { fn drop(&mut self) { - T::disable() + rcc::disable::(); } } @@ -190,7 +191,7 @@ impl<'d, T: CoreInstance> Timer<'d, T> { pub fn new(tim: impl Peripheral

+ 'd) -> Self { into_ref!(tim); - T::enable_and_reset(); + rcc::enable_and_reset::(); Self { tim } } diff --git a/embassy-stm32/src/tsc/mod.rs b/embassy-stm32/src/tsc/mod.rs index bf583f04c..045d6317c 100644 --- a/embassy-stm32/src/tsc/mod.rs +++ b/embassy-stm32/src/tsc/mod.rs @@ -72,7 +72,7 @@ pub use enums::*; use crate::gpio::{AFType, AnyPin}; use crate::pac::tsc::Tsc as Regs; -use crate::rcc::RccPeripheral; +use crate::rcc::{self, RccPeripheral}; use crate::{peripherals, Peripheral}; #[cfg(tsc_v1)] @@ -649,7 +649,7 @@ impl<'d, T: Instance> Tsc<'d, T> { ) -> Self { into_ref!(peri); - T::enable_and_reset(); + rcc::enable_and_reset::(); T::REGS.cr().modify(|w| { w.set_tsce(true); @@ -880,7 +880,7 @@ impl<'d, T: Instance> Tsc<'d, T> { impl<'d, T: Instance> Drop for Tsc<'d, T> { fn drop(&mut self) { - T::disable(); + rcc::disable::(); } } diff --git a/embassy-stm32/src/ucpd.rs b/embassy-stm32/src/ucpd.rs index d6d0682b9..89e2f5d49 100644 --- a/embassy-stm32/src/ucpd.rs +++ b/embassy-stm32/src/ucpd.rs @@ -28,7 +28,7 @@ use crate::interrupt; use crate::interrupt::typelevel::Interrupt; use crate::pac::ucpd::vals::{Anamode, Ccenable, PscUsbpdclk, Txmode}; pub use crate::pac::ucpd::vals::{Phyccsel as CcSel, TypecVstateCc as CcVState}; -use crate::rcc::RccPeripheral; +use crate::rcc::{self, RccPeripheral}; pub(crate) fn init( _cs: critical_section::CriticalSection, @@ -103,7 +103,7 @@ impl<'d, T: Instance> Ucpd<'d, T> { cc1.set_as_analog(); cc2.set_as_analog(); - T::enable_and_reset(); + rcc::enable_and_reset::(); T::Interrupt::unpend(); unsafe { T::Interrupt::enable() }; @@ -212,7 +212,7 @@ impl<'d, T: Instance> Drop for CcPhy<'d, T> { drop_not_ready.store(true, Ordering::Relaxed); } else { r.cfgr1().write(|w| w.set_ucpden(false)); - T::disable(); + rcc::disable::(); T::Interrupt::disable(); } } @@ -325,7 +325,7 @@ impl<'d, T: Instance> Drop for PdPhy<'d, T> { drop_not_ready.store(true, Ordering::Relaxed); } else { T::REGS.cfgr1().write(|w| w.set_ucpden(false)); - T::disable(); + rcc::disable::(); T::Interrupt::disable(); } } diff --git a/embassy-stm32/src/usart/buffered.rs b/embassy-stm32/src/usart/buffered.rs index 492ad334b..eacf95002 100644 --- a/embassy-stm32/src/usart/buffered.rs +++ b/embassy-stm32/src/usart/buffered.rs @@ -18,6 +18,7 @@ use super::{ use crate::gpio::AFType; use crate::interrupt::typelevel::Interrupt as _; use crate::interrupt::{self, InterruptExt}; +use crate::rcc; use crate::time::Hertz; /// Interrupt handler. @@ -206,7 +207,7 @@ impl<'d> BufferedUart<'d> { rx_buffer: &'d mut [u8], config: Config, ) -> Result { - T::enable_and_reset(); + rcc::enable_and_reset::(); Self::new_inner(peri, rx, tx, tx_buffer, rx_buffer, config) } @@ -225,7 +226,7 @@ impl<'d> BufferedUart<'d> { ) -> Result { into_ref!(cts, rts); - T::enable_and_reset(); + rcc::enable_and_reset::(); rts.set_as_af(rts.af_num(), AFType::OutputPushPull); cts.set_as_af(cts.af_num(), AFType::Input); @@ -251,7 +252,7 @@ impl<'d> BufferedUart<'d> { ) -> Result { into_ref!(de); - T::enable_and_reset(); + rcc::enable_and_reset::(); de.set_as_af(de.af_num(), AFType::OutputPushPull); T::info().regs.cr3().write(|w| { @@ -545,7 +546,7 @@ fn drop_tx_rx(info: &Info, state: &State) { refcount == 1 }); if is_last_drop { - info.enable_bit.disable(); + info.rcc.disable(); } } diff --git a/embassy-stm32/src/usart/mod.rs b/embassy-stm32/src/usart/mod.rs index b24335f3a..2a39c6301 100644 --- a/embassy-stm32/src/usart/mod.rs +++ b/embassy-stm32/src/usart/mod.rs @@ -28,7 +28,7 @@ use crate::pac::usart::Lpuart as Regs; #[cfg(any(usart_v1, usart_v2))] use crate::pac::usart::Usart as Regs; use crate::pac::usart::{regs, vals}; -use crate::rcc::{ClockEnableBit, SealedRccPeripheral}; +use crate::rcc::{self, RccInfo, SealedRccPeripheral}; use crate::time::Hertz; use crate::Peripheral; @@ -429,7 +429,7 @@ impl<'d, M: Mode> UartTx<'d, M> { tx_dma: Option>, config: Config, ) -> Result { - T::enable_and_reset(); + rcc::enable_and_reset::(); let info = T::info(); let state = T::state(); @@ -775,7 +775,7 @@ impl<'d, M: Mode> UartRx<'d, M> { rx_dma: Option>, config: Config, ) -> Result { - T::enable_and_reset(); + rcc::enable_and_reset::(); let info = T::info(); let state = T::state(); @@ -916,7 +916,7 @@ fn drop_tx_rx(info: &Info, state: &State) { refcount == 1 }); if is_last_drop { - info.enable_bit.disable(); + info.rcc.disable(); } } @@ -1228,7 +1228,7 @@ impl<'d, M: Mode> Uart<'d, M> { rx_dma: Option>, config: Config, ) -> Result { - T::enable_and_reset(); + rcc::enable_and_reset::(); let info = T::info(); let state = T::state(); @@ -1718,7 +1718,7 @@ impl State { struct Info { regs: Regs, - enable_bit: ClockEnableBit, + rcc: RccInfo, interrupt: Interrupt, kind: Kind, } @@ -1754,7 +1754,7 @@ macro_rules! impl_usart { fn info() -> &'static Info { static INFO: Info = Info { regs: unsafe { Regs::from_ptr(crate::pac::$inst.as_ptr()) }, - enable_bit: crate::peripherals::$inst::ENABLE_BIT, + rcc: crate::peripherals::$inst::RCC_INFO, interrupt: crate::interrupt::typelevel::$irq::IRQ, kind: $kind, }; diff --git a/embassy-stm32/src/usb/mod.rs b/embassy-stm32/src/usb/mod.rs index 349438ec5..ce9fe0a9b 100644 --- a/embassy-stm32/src/usb/mod.rs +++ b/embassy-stm32/src/usb/mod.rs @@ -6,7 +6,7 @@ mod _version; pub use _version::*; use crate::interrupt::typelevel::Interrupt; -use crate::rcc::SealedRccPeripheral; +use crate::rcc; /// clock, power initialization stuff that's common for USB and OTG. fn common_init() { @@ -65,5 +65,5 @@ fn common_init() { T::Interrupt::unpend(); unsafe { T::Interrupt::enable() }; - ::enable_and_reset(); + rcc::enable_and_reset::(); } diff --git a/embassy-stm32/src/usb/otg.rs b/embassy-stm32/src/usb/otg.rs index 3debd5079..e5131250a 100644 --- a/embassy-stm32/src/usb/otg.rs +++ b/embassy-stm32/src/usb/otg.rs @@ -13,7 +13,7 @@ use embassy_usb_synopsys_otg::{ use crate::gpio::AFType; use crate::interrupt; use crate::interrupt::typelevel::Interrupt; -use crate::rcc::{RccPeripheral, SealedRccPeripheral}; +use crate::rcc::{self, RccPeripheral}; const MAX_EP_COUNT: usize = 9; @@ -246,7 +246,7 @@ impl<'d, T: Instance> Bus<'d, T> { fn disable(&mut self) { T::Interrupt::disable(); - ::disable(); + rcc::disable::(); self.inited = false; #[cfg(stm32l4)] From 9c32c43cf84d0dc1bf241d2894143a57da9e8c65 Mon Sep 17 00:00:00 2001 From: James Munns Date: Sat, 25 May 2024 19:32:02 +0200 Subject: [PATCH 390/581] FAQ: One vs Many tasks Copy and paste from chat --- docs/pages/faq.adoc | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) diff --git a/docs/pages/faq.adoc b/docs/pages/faq.adoc index 5f50951d8..270b0f71e 100644 --- a/docs/pages/faq.adoc +++ b/docs/pages/faq.adoc @@ -333,3 +333,27 @@ This is not the only possible approach, but if you are looking for where to star 8. Then start implementing whatever peripherals you need, like GPIOs, UART, SPI, I2C, etc. This is the largest part of the work, and will likely continue for a while! Don't feel like you need 100% coverage of all peripherals at first, this is likely to be an ongoing process over time. 9. Start implementing the embedded-hal, embedded-io, and embedded-hal-async traits on top of your HAL drivers, once you start having more features completed. This will allow users to use standard external device drivers (e.g. sensors, actuators, displays, etc.) with your HAL. 10. Discuss upstreaming the PAC/HAL for embassy support, or make sure your drivers are added to the awesome-embedded-rust list so that people can find it. + +== Multiple Tasks, or one task with multiple futures? + +Some examples end like this in main: + +[source,rust] +---- +// Run everything concurrently. +// If we had made everything `'static` above instead, we could do this using separate tasks instead. +join(usb_fut, join(echo_fut, log_fut)).await; +---- + +There are two main ways to handle concurrency in Embassy: + +1. Spawn multiple tasks, e.g. with `#[embassy_executor::task]` +2. Manage multiple futures inside ONE task using `join()` or `select()` (as shown above) + +In general, either of these approaches will work. The main differences of these approaches are: + +When using **separate tasks**, each task needs it's own RAM allocation, so there's a little overhead for each task, so one task that does three things will likely be a little bit smaller than three tasks that do one thing (not a lot, probably a couple dozen bytes). In contrast, with **multiple futures in one task**, you don't need multiple task allocations, and it will generally be easier to share data, or use borrowed resources, inside of a single task. + +But when it comes to "waking" tasks, for example when a data transfer is complete or a button is pressed, it's faster to wake a dedicated task, because that task does not need to check which future is actually ready. `join` and `select` must check ALL of the futures they are managing to see which one (or which ones) are ready to do more work. This is because all Rust executors (like Embassy or Tokio) only have the ability to wake tasks, not specific futures. This means you will use slightly less CPU time juggling futures when using dedicated tasks. + +Practically, there's not a LOT of difference either way - so go with what makes it easier for you and your code first, but there will be some details that are slightly different in each case. From ad45725a2413709373e5911ab6174332740bd606 Mon Sep 17 00:00:00 2001 From: James Munns Date: Sat, 25 May 2024 19:33:13 +0200 Subject: [PATCH 391/581] Update docs/pages/faq.adoc --- docs/pages/faq.adoc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/docs/pages/faq.adoc b/docs/pages/faq.adoc index 270b0f71e..827164bae 100644 --- a/docs/pages/faq.adoc +++ b/docs/pages/faq.adoc @@ -352,7 +352,7 @@ There are two main ways to handle concurrency in Embassy: In general, either of these approaches will work. The main differences of these approaches are: -When using **separate tasks**, each task needs it's own RAM allocation, so there's a little overhead for each task, so one task that does three things will likely be a little bit smaller than three tasks that do one thing (not a lot, probably a couple dozen bytes). In contrast, with **multiple futures in one task**, you don't need multiple task allocations, and it will generally be easier to share data, or use borrowed resources, inside of a single task. +When using **separate tasks**, each task needs its own RAM allocation, so there's a little overhead for each task, so one task that does three things will likely be a little bit smaller than three tasks that do one thing (not a lot, probably a couple dozen bytes). In contrast, with **multiple futures in one task**, you don't need multiple task allocations, and it will generally be easier to share data, or use borrowed resources, inside of a single task. But when it comes to "waking" tasks, for example when a data transfer is complete or a button is pressed, it's faster to wake a dedicated task, because that task does not need to check which future is actually ready. `join` and `select` must check ALL of the futures they are managing to see which one (or which ones) are ready to do more work. This is because all Rust executors (like Embassy or Tokio) only have the ability to wake tasks, not specific futures. This means you will use slightly less CPU time juggling futures when using dedicated tasks. From d18a919ab9cfa1c07d339dd885d8268ab0abb7e6 Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Mon, 27 May 2024 00:11:13 +0200 Subject: [PATCH 392/581] rp: wait until read matches for PSM accesses. --- embassy-rp/src/lib.rs | 25 +++++++++++++++++++++---- 1 file changed, 21 insertions(+), 4 deletions(-) diff --git a/embassy-rp/src/lib.rs b/embassy-rp/src/lib.rs index 4602e66f4..507d42280 100644 --- a/embassy-rp/src/lib.rs +++ b/embassy-rp/src/lib.rs @@ -383,25 +383,29 @@ unsafe fn pre_init() { // // The PSM order is SIO -> PROC0 -> PROC1. // So, we have to force-on PROC0 to prevent it from getting reset when resetting SIO. - pac::PSM.frce_on().write(|w| { + pac::PSM.frce_on().write_and_wait(|w| { w.set_proc0(true); }); // Then reset SIO and PROC1. - pac::PSM.frce_off().write(|w| { + pac::PSM.frce_off().write_and_wait(|w| { w.set_sio(true); w.set_proc1(true); }); // clear force_off first, force_on second. The other way around would reset PROC0. - pac::PSM.frce_off().write(|_| {}); - pac::PSM.frce_on().write(|_| {}); + pac::PSM.frce_off().write_and_wait(|_| {}); + pac::PSM.frce_on().write_and_wait(|_| {}); } /// Extension trait for PAC regs, adding atomic xor/bitset/bitclear writes. +#[allow(unused)] trait RegExt { #[allow(unused)] fn write_xor(&self, f: impl FnOnce(&mut T) -> R) -> R; fn write_set(&self, f: impl FnOnce(&mut T) -> R) -> R; fn write_clear(&self, f: impl FnOnce(&mut T) -> R) -> R; + fn write_and_wait(&self, f: impl FnOnce(&mut T) -> R) -> R + where + T: PartialEq; } impl RegExt for pac::common::Reg { @@ -434,4 +438,17 @@ impl RegExt for pac::common::Reg(&self, f: impl FnOnce(&mut T) -> R) -> R + where + T: PartialEq, + { + let mut val = Default::default(); + let res = f(&mut val); + unsafe { + self.as_ptr().write_volatile(val); + while self.as_ptr().read_volatile() != val {} + } + res + } } From 854ae5da8fde2b2b33b6ad3c5de1a1d441b4d6b3 Mon Sep 17 00:00:00 2001 From: Maarten de Vries Date: Wed, 22 May 2024 16:26:14 +0200 Subject: [PATCH 393/581] embassy_stm32: implement optional FIFO scheduling for outgoing frames --- embassy-stm32/src/can/bxcan/mod.rs | 29 +++++++++- embassy-stm32/src/can/bxcan/registers.rs | 67 +++++++++++++++++++----- 2 files changed, 81 insertions(+), 15 deletions(-) diff --git a/embassy-stm32/src/can/bxcan/mod.rs b/embassy-stm32/src/can/bxcan/mod.rs index 912634b84..05b1b83d8 100644 --- a/embassy-stm32/src/can/bxcan/mod.rs +++ b/embassy-stm32/src/can/bxcan/mod.rs @@ -133,7 +133,7 @@ impl CanConfig<'_, T> { self } - /// Enables or disables automatic retransmission of messages. + /// Enables or disables automatic retransmission of frames. /// /// If this is enabled, the CAN peripheral will automatically try to retransmit each frame /// until it can be sent. Otherwise, it will try only once to send each frame. @@ -298,6 +298,23 @@ impl<'d, T: Instance> Can<'d, T> { T::regs().ier().modify(|i| i.set_slkie(false)); } + /// Enable FIFO scheduling of outgoing frames. + /// + /// If this is enabled, frames will be transmitted in the order that they are passed to + /// [`write()`][Self::write] or [`try_write()`][Self::try_write()]. + /// + /// If this is disabled, frames are transmitted in order of priority. + /// + /// FIFO scheduling is disabled by default. + pub fn set_tx_fifo_scheduling(&mut self, enabled: bool) { + Registers(T::regs()).set_tx_fifo_scheduling(enabled) + } + + /// Checks if FIFO scheduling of outgoing frames is enabled. + pub fn tx_fifo_scheduling_enabled(&self) -> bool { + Registers(T::regs()).tx_fifo_scheduling_enabled() + } + /// Queues the message to be sent. /// /// If the TX queue is full, this will wait until there is space, therefore exerting backpressure. @@ -318,6 +335,11 @@ impl<'d, T: Instance> Can<'d, T> { } /// Waits until any of the transmit mailboxes become empty + /// + /// Note that [`Self::try_write()`] may fail with [`TryWriteError::Full`], + /// even after the future returned by this function completes. + /// This will happen if FIFO scheduling of outgoing frames is not enabled, + /// and a frame with equal priority is already queued for transmission. pub async fn flush_any(&self) { CanTx::::flush_any_inner().await } @@ -505,6 +527,11 @@ impl<'d, T: Instance> CanTx<'d, T> { } /// Waits until any of the transmit mailboxes become empty + /// + /// Note that [`Self::try_write()`] may fail with [`TryWriteError::Full`], + /// even after the future returned by this function completes. + /// This will happen if FIFO scheduling of outgoing frames is not enabled, + /// and a frame with equal priority is already queued for transmission. pub async fn flush_any(&self) { Self::flush_any_inner().await } diff --git a/embassy-stm32/src/can/bxcan/registers.rs b/embassy-stm32/src/can/bxcan/registers.rs index 446f3ad6f..a0519cd1f 100644 --- a/embassy-stm32/src/can/bxcan/registers.rs +++ b/embassy-stm32/src/can/bxcan/registers.rs @@ -181,46 +181,85 @@ impl Registers { None } + /// Enables or disables FIFO scheduling of outgoing mailboxes. + /// + /// If this is enabled, mailboxes are scheduled based on the time when the transmit request bit of the mailbox was set. + /// + /// If this is disabled, mailboxes are scheduled based on the priority of the frame in the mailbox. + pub fn set_tx_fifo_scheduling(&mut self, enabled: bool) { + self.0.mcr().modify(|w| w.set_txfp(enabled)) + } + + /// Checks if FIFO scheduling of outgoing mailboxes is enabled. + pub fn tx_fifo_scheduling_enabled(&self) -> bool { + self.0.mcr().read().txfp() + } + /// Puts a CAN frame in a transmit mailbox for transmission on the bus. /// - /// Frames are transmitted to the bus based on their priority (see [`FramePriority`]). - /// Transmit order is preserved for frames with identical priority. + /// The behavior of this function depends on wheter or not FIFO scheduling is enabled. + /// See [`Self::set_tx_fifo_scheduling()`] and [`Self::tx_fifo_scheduling_enabled()`]. + /// + /// # Priority based scheduling + /// + /// If FIFO scheduling is disabled, frames are transmitted to the bus based on their + /// priority (see [`FramePriority`]). Transmit order is preserved for frames with identical + /// priority. /// /// If all transmit mailboxes are full, and `frame` has a higher priority than the /// lowest-priority message in the transmit mailboxes, transmission of the enqueued frame is /// cancelled and `frame` is enqueued instead. The frame that was replaced is returned as /// [`TransmitStatus::dequeued_frame`]. + /// + /// # FIFO scheduling + /// + /// If FIFO scheduling is enabled, frames are transmitted in the order that they are passed to this function. + /// + /// If all transmit mailboxes are full, this function returns [`nb::Error::WouldBlock`]. pub fn transmit(&mut self, frame: &Frame) -> nb::Result { + // Check if FIFO scheduling is enabled. + let fifo_scheduling = self.0.mcr().read().txfp(); + // Get the index of the next free mailbox or the one with the lowest priority. let tsr = self.0.tsr().read(); let idx = tsr.code() as usize; let frame_is_pending = !tsr.tme(0) || !tsr.tme(1) || !tsr.tme(2); - let pending_frame = if frame_is_pending { - // High priority frames are transmitted first by the mailbox system. - // Frames with identical identifier shall be transmitted in FIFO order. - // The controller schedules pending frames of same priority based on the - // mailbox index instead. As a workaround check all pending mailboxes - // and only accept higher priority frames. + let all_frames_are_pending = !tsr.tme(0) && !tsr.tme(1) && !tsr.tme(2); + + let pending_frame; + if fifo_scheduling && all_frames_are_pending { + // FIFO scheduling is enabled and all mailboxes are full. + // We will not drop a lower priority frame, we just report WouldBlock. + return Err(nb::Error::WouldBlock); + } else if !fifo_scheduling && frame_is_pending { + // Priority scheduling is enabled and alteast one mailbox is full. + // + // In this mode, the peripheral transmits high priority frames first. + // Frames with identical priority should be transmitted in FIFO order, + // but the controller schedules pending frames of same priority based on the + // mailbox index. As a workaround check all pending mailboxes and only accept + // higher priority frames. self.check_priority(0, frame.id().into())?; self.check_priority(1, frame.id().into())?; self.check_priority(2, frame.id().into())?; - let all_frames_are_pending = !tsr.tme(0) && !tsr.tme(1) && !tsr.tme(2); if all_frames_are_pending { // No free mailbox is available. This can only happen when three frames with // ascending priority (descending IDs) were requested for transmission and all // of them are blocked by bus traffic with even higher priority. // To prevent a priority inversion abort and replace the lowest priority frame. - self.read_pending_mailbox(idx) + pending_frame = self.read_pending_mailbox(idx); } else { // There was a free mailbox. - None + pending_frame = None; } } else { - // All mailboxes are available: Send frame without performing any checks. - None - }; + // Either we have FIFO scheduling and at-least one free mailbox, + // or we have priority scheduling and all mailboxes are free. + // No further checks are needed. + pending_frame = None + } self.write_mailbox(idx, frame); From 807e573994d046d0cd00e631db111fafd2627559 Mon Sep 17 00:00:00 2001 From: Maarten de Vries Date: Wed, 22 May 2024 17:13:38 +0200 Subject: [PATCH 394/581] embassy_stm32: allow scheduling lower priority frames in bxcan driver --- embassy-stm32/src/can/bxcan/mod.rs | 16 ++++++++++++++-- embassy-stm32/src/can/bxcan/registers.rs | 10 ++++------ 2 files changed, 18 insertions(+), 8 deletions(-) diff --git a/embassy-stm32/src/can/bxcan/mod.rs b/embassy-stm32/src/can/bxcan/mod.rs index 05b1b83d8..0ac4cdab6 100644 --- a/embassy-stm32/src/can/bxcan/mod.rs +++ b/embassy-stm32/src/can/bxcan/mod.rs @@ -324,7 +324,13 @@ impl<'d, T: Instance> Can<'d, T> { /// Attempts to transmit a frame without blocking. /// - /// Returns [Err(TryWriteError::Full)] if all transmit mailboxes are full. + /// Returns [Err(TryWriteError::Full)] if the frame can not be queued for transmission now. + /// + /// If FIFO scheduling is enabled, any empty mailbox will be used. + /// + /// Otherwise, the frame will only be accepted if there is no frame with the same priority already queued. + /// This is done to work around a hardware limitation that could lead to out-of-order delivery + /// of frames with the same priority. pub fn try_write(&mut self, frame: &Frame) -> Result { self.split().0.try_write(frame) } @@ -487,7 +493,13 @@ impl<'d, T: Instance> CanTx<'d, T> { /// Attempts to transmit a frame without blocking. /// - /// Returns [Err(TryWriteError::Full)] if all transmit mailboxes are full. + /// Returns [Err(TryWriteError::Full)] if the frame can not be queued for transmission now. + /// + /// If FIFO scheduling is enabled, any empty mailbox will be used. + /// + /// Otherwise, the frame will only be accepted if there is no frame with the same priority already queued. + /// This is done to work around a hardware limitation that could lead to out-of-order delivery + /// of frames with the same priority. pub fn try_write(&mut self, frame: &Frame) -> Result { Registers(T::regs()).transmit(frame).map_err(|_| TryWriteError::Full) } diff --git a/embassy-stm32/src/can/bxcan/registers.rs b/embassy-stm32/src/can/bxcan/registers.rs index a0519cd1f..ad27e0744 100644 --- a/embassy-stm32/src/can/bxcan/registers.rs +++ b/embassy-stm32/src/can/bxcan/registers.rs @@ -239,7 +239,7 @@ impl Registers { // Frames with identical priority should be transmitted in FIFO order, // but the controller schedules pending frames of same priority based on the // mailbox index. As a workaround check all pending mailboxes and only accept - // higher priority frames. + // frames with a different priority. self.check_priority(0, frame.id().into())?; self.check_priority(1, frame.id().into())?; self.check_priority(2, frame.id().into())?; @@ -276,18 +276,16 @@ impl Registers { } /// Returns `Ok` when the mailbox is free or if it contains pending frame with a - /// lower priority (higher ID) than the identifier `id`. + /// different priority from the identifier `id`. fn check_priority(&self, idx: usize, id: IdReg) -> nb::Result<(), Infallible> { // Read the pending frame's id to check its priority. assert!(idx < 3); let tir = &self.0.tx(idx).tir().read(); - //let tir = &can.tx[idx].tir.read(); // Check the priority by comparing the identifiers. But first make sure the // frame has not finished the transmission (`TXRQ` == 0) in the meantime. - if tir.txrq() && id <= IdReg::from_register(tir.0) { - // There's a mailbox whose priority is higher or equal - // the priority of the new frame. + if tir.txrq() && id == IdReg::from_register(tir.0) { + // There's a mailbox whose priority is equal to the priority of the new frame. return Err(nb::Error::WouldBlock); } From f9324201b1d9375e12b4af9a6b2424fe3ff85d32 Mon Sep 17 00:00:00 2001 From: Alexandros Liarokapis Date: Mon, 27 May 2024 15:44:58 +0300 Subject: [PATCH 395/581] add proper rxonly support for spi_v3 and force tx dma stream requirement on others --- embassy-stm32/Cargo.toml | 4 +- embassy-stm32/src/dma/util.rs | 1 + embassy-stm32/src/i2s.rs | 12 +++- embassy-stm32/src/spi/mod.rs | 121 ++++++++++++++++++++++++++++++++-- 4 files changed, 130 insertions(+), 8 deletions(-) diff --git a/embassy-stm32/Cargo.toml b/embassy-stm32/Cargo.toml index 5ef2366d9..67c61a671 100644 --- a/embassy-stm32/Cargo.toml +++ b/embassy-stm32/Cargo.toml @@ -72,7 +72,7 @@ rand_core = "0.6.3" sdio-host = "0.5.0" critical-section = "1.1" #stm32-metapac = { version = "15" } -stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-34c0188a682b32c32ff147d377e0629b1ebe8318" } +stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-ad633a3e266151ea4d8fad630031a075ee02ab34" } vcell = "0.1.3" nb = "1.0.0" @@ -97,7 +97,7 @@ proc-macro2 = "1.0.36" quote = "1.0.15" #stm32-metapac = { version = "15", default-features = false, features = ["metadata"]} -stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-34c0188a682b32c32ff147d377e0629b1ebe8318", default-features = false, features = ["metadata"]} +stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-ad633a3e266151ea4d8fad630031a075ee02ab34", default-features = false, features = ["metadata"]} [features] default = ["rt"] diff --git a/embassy-stm32/src/dma/util.rs b/embassy-stm32/src/dma/util.rs index 962ea2501..5aaca57c9 100644 --- a/embassy-stm32/src/dma/util.rs +++ b/embassy-stm32/src/dma/util.rs @@ -48,6 +48,7 @@ impl<'d> ChannelAndRequest<'d> { Transfer::new_write_raw(&mut self.channel, self.request, buf, peri_addr, options) } + #[allow(dead_code)] pub unsafe fn write_repeated<'a, W: Word>( &'a mut self, repeated: &'a W, diff --git a/embassy-stm32/src/i2s.rs b/embassy-stm32/src/i2s.rs index c78810a38..9c0bbbb87 100644 --- a/embassy-stm32/src/i2s.rs +++ b/embassy-stm32/src/i2s.rs @@ -169,7 +169,7 @@ impl<'d> I2S<'d> { ws: impl Peripheral

> + 'd, ck: impl Peripheral

> + 'd, mck: impl Peripheral

> + 'd, - txdma: impl Peripheral

> + 'd, + #[cfg(not(spi_v3))] txdma: impl Peripheral

> + 'd, rxdma: impl Peripheral

> + 'd, freq: Hertz, config: Config, @@ -190,7 +190,15 @@ impl<'d> I2S<'d> { let mut spi_cfg = SpiConfig::default(); spi_cfg.frequency = freq; - let spi = Spi::new_internal(peri, txdma, rxdma, spi_cfg); + let spi = Spi::new_internal( + peri, + #[cfg(not(spi_v3))] + new_dma!(txdma), + #[cfg(spi_v3)] + None, + new_dma!(rxdma), + spi_cfg, + ); // TODO move i2s to the new mux infra. //#[cfg(all(rcc_f4, not(stm32f410)))] diff --git a/embassy-stm32/src/spi/mod.rs b/embassy-stm32/src/spi/mod.rs index 5fc8691ac..0a0afafc6 100644 --- a/embassy-stm32/src/spi/mod.rs +++ b/embassy-stm32/src/spi/mod.rs @@ -508,6 +508,7 @@ impl<'d> Spi<'d, Async> { peri: impl Peripheral

+ 'd, sck: impl Peripheral

> + 'd, miso: impl Peripheral

> + 'd, + #[cfg(not(spi_v3))] tx_dma: impl Peripheral

> + 'd, rx_dma: impl Peripheral

> + 'd, config: Config, ) -> Self { @@ -516,6 +517,9 @@ impl<'d> Spi<'d, Async> { new_pin!(sck, AFType::OutputPushPull, Speed::VeryHigh, config.sck_pull_mode()), None, new_pin!(miso, AFType::Input, Speed::VeryHigh), + #[cfg(not(spi_v3))] + new_dma!(tx_dma), + #[cfg(spi_v3)] None, new_dma!(rx_dma), config, @@ -584,11 +588,11 @@ impl<'d> Spi<'d, Async> { #[allow(dead_code)] pub(crate) fn new_internal( peri: impl Peripheral

+ 'd, - tx_dma: impl Peripheral

> + 'd, - rx_dma: impl Peripheral

> + 'd, + tx_dma: Option>, + rx_dma: Option>, config: Config, ) -> Self { - Self::new_inner(peri, None, None, None, new_dma!(tx_dma), new_dma!(rx_dma), config) + Self::new_inner(peri, None, None, None, tx_dma, rx_dma, config) } /// SPI write, using DMA. @@ -623,11 +627,114 @@ impl<'d> Spi<'d, Async> { /// SPI read, using DMA. pub async fn read(&mut self, data: &mut [W]) -> Result<(), Error> { + #[cfg(not(spi_v3))] + { + self.transmission_read(data).await + } + #[cfg(spi_v3)] + { + self.tsize_read(data).await + } + } + + #[cfg(spi_v3)] + async fn tsize_read(&mut self, data: &mut [W]) -> Result<(), Error> { + if data.is_empty() { + return Ok(()); + } + + self.info.regs.cr1().modify(|w| { + w.set_spe(false); + }); + + let comm = self.info.regs.cfg2().modify(|w| { + let prev = w.comm(); + w.set_comm(vals::Comm::RECEIVER); + prev + }); + + let i2scfg = self.info.regs.i2scfgr().modify(|w| { + let prev = w.i2scfg(); + w.set_i2scfg(match prev { + vals::I2scfg::SLAVERX | vals::I2scfg::SLAVEFULLDUPLEX => vals::I2scfg::SLAVERX, + vals::I2scfg::MASTERRX | vals::I2scfg::MASTERFULLDUPLEX => vals::I2scfg::MASTERRX, + _ => panic!("unsupported configuration"), + }); + prev + }); + + let tsize = self.info.regs.cr2().read().tsize(); + + let rx_src = self.info.regs.rx_ptr(); + + let mut read = 0; + let mut remaining = data.len(); + + loop { + self.set_word_size(W::CONFIG); + set_rxdmaen(self.info.regs, true); + + let transfer_size = remaining.min(u16::max_value().into()); + + let transfer = unsafe { + self.rx_dma + .as_mut() + .unwrap() + .read(rx_src, &mut data[read..(read + transfer_size)], Default::default()) + }; + + self.info.regs.cr2().modify(|w| { + w.set_tsize(transfer_size as u16); + }); + + self.info.regs.cr1().modify(|w| { + w.set_spe(true); + }); + + self.info.regs.cr1().modify(|w| { + w.set_cstart(true); + }); + + transfer.await; + + finish_dma(self.info.regs); + + remaining -= transfer_size; + + if remaining == 0 { + break; + } + + read += transfer_size; + } + + self.info.regs.cr1().modify(|w| { + w.set_spe(false); + }); + + self.info.regs.cfg2().modify(|w| { + w.set_comm(comm); + }); + + self.info.regs.cr2().modify(|w| { + w.set_tsize(tsize); + }); + + self.info.regs.i2scfgr().modify(|w| { + w.set_i2scfg(i2scfg); + }); + + Ok(()) + } + + #[cfg(not(spi_v3))] + async fn transmission_read(&mut self, data: &mut [W]) -> Result<(), Error> { if data.is_empty() { return Ok(()); } self.set_word_size(W::CONFIG); + self.info.regs.cr1().modify(|w| { w.set_spe(false); }); @@ -907,7 +1014,13 @@ fn finish_dma(regs: Regs) { while regs.sr().read().ftlvl().to_bits() > 0 {} #[cfg(any(spi_v3, spi_v4, spi_v5))] - while !regs.sr().read().txc() {} + { + if regs.cr2().read().tsize() == 0 { + while !regs.sr().read().txc() {} + } else { + while !regs.sr().read().eot() {} + } + } #[cfg(not(any(spi_v3, spi_v4, spi_v5)))] while regs.sr().read().bsy() {} From 25cc5241b1e7c4a35c427626cd8f2f8721948830 Mon Sep 17 00:00:00 2001 From: Alexandros Liarokapis Date: Mon, 20 May 2024 16:15:41 +0300 Subject: [PATCH 396/581] Add i2s support for spi_v3. --- embassy-stm32/src/i2s.rs | 337 ++++++++++++++++++++++------ embassy-stm32/src/lib.rs | 2 +- examples/stm32f4/src/bin/i2s_dma.rs | 3 +- 3 files changed, 268 insertions(+), 74 deletions(-) diff --git a/embassy-stm32/src/i2s.rs b/embassy-stm32/src/i2s.rs index 9c0bbbb87..f893dd235 100644 --- a/embassy-stm32/src/i2s.rs +++ b/embassy-stm32/src/i2s.rs @@ -1,7 +1,9 @@ //! Inter-IC Sound (I2S) + use embassy_hal_internal::into_ref; -use crate::gpio::{AFType, AnyPin, SealedPin}; +use crate::dma::ChannelAndRequest; +use crate::gpio::{AFType, AnyPin, SealedPin, Speed}; use crate::mode::Async; use crate::pac::spi::vals; use crate::spi::{Config as SpiConfig, *}; @@ -17,15 +19,6 @@ pub enum Mode { Slave, } -/// I2S function -#[derive(Copy, Clone)] -pub enum Function { - /// Transmit audio data - Transmit, - /// Receive audio data - Receive, -} - /// I2C standard #[derive(Copy, Clone)] pub enum Standard { @@ -42,7 +35,7 @@ pub enum Standard { } impl Standard { - #[cfg(any(spi_v1, spi_f1))] + #[cfg(any(spi_v1, spi_v3, spi_f1))] const fn i2sstd(&self) -> vals::I2sstd { match self { Standard::Philips => vals::I2sstd::PHILIPS, @@ -53,7 +46,7 @@ impl Standard { } } - #[cfg(any(spi_v1, spi_f1))] + #[cfg(any(spi_v1, spi_v3, spi_f1))] const fn pcmsync(&self) -> vals::Pcmsync { match self { Standard::PcmLongSync => vals::Pcmsync::LONG, @@ -76,7 +69,7 @@ pub enum Format { } impl Format { - #[cfg(any(spi_v1, spi_f1))] + #[cfg(any(spi_v1, spi_v3, spi_f1))] const fn datlen(&self) -> vals::Datlen { match self { Format::Data16Channel16 => vals::Datlen::BITS16, @@ -86,7 +79,7 @@ impl Format { } } - #[cfg(any(spi_v1, spi_f1))] + #[cfg(any(spi_v1, spi_v3, spi_f1))] const fn chlen(&self) -> vals::Chlen { match self { Format::Data16Channel16 => vals::Chlen::BITS16, @@ -107,7 +100,7 @@ pub enum ClockPolarity { } impl ClockPolarity { - #[cfg(any(spi_v1, spi_f1))] + #[cfg(any(spi_v1, spi_v3, spi_f1))] const fn ckpol(&self) -> vals::Ckpol { match self { ClockPolarity::IdleHigh => vals::Ckpol::IDLEHIGH, @@ -127,15 +120,13 @@ impl ClockPolarity { pub struct Config { /// Mode pub mode: Mode, - /// Function (transmit, receive) - pub function: Function, /// Which I2S standard to use. pub standard: Standard, /// Data format. pub format: Format, /// Clock polarity. pub clock_polarity: ClockPolarity, - /// True to eanble master clock output from this instance. + /// True to enable master clock output from this instance. pub master_clock: bool, } @@ -143,7 +134,6 @@ impl Default for Config { fn default() -> Self { Self { mode: Mode::Master, - function: Function::Transmit, standard: Standard::Philips, format: Format::Data16Channel16, clock_polarity: ClockPolarity::IdleLow, @@ -155,50 +145,168 @@ impl Default for Config { /// I2S driver. pub struct I2S<'d> { _peri: Spi<'d, Async>, - sd: Option>, + txsd: Option>, + rxsd: Option>, ws: Option>, ck: Option>, mck: Option>, } +/// I2S function +#[derive(Copy, Clone)] +#[allow(dead_code)] +enum Function { + /// Transmit audio data + Transmit, + /// Receive audio data + Receive, + #[cfg(spi_v3)] + /// Transmit and Receive audio data + FullDuplex, +} + impl<'d> I2S<'d> { - /// Note: Full-Duplex modes are not supported at this time - pub fn new( + /// Create a transmitter driver + pub fn new_txonly( peri: impl Peripheral

+ 'd, sd: impl Peripheral

> + 'd, ws: impl Peripheral

> + 'd, ck: impl Peripheral

> + 'd, mck: impl Peripheral

> + 'd, + txdma: impl Peripheral

> + 'd, + freq: Hertz, + config: Config, + ) -> Self { + into_ref!(sd); + Self::new_inner( + peri, + new_pin!(sd, AFType::OutputPushPull, Speed::VeryHigh), + None, + ws, + ck, + mck, + new_dma!(txdma), + None, + freq, + config, + Function::Transmit, + ) + } + + /// Create a receiver driver + pub fn new_rxonly( + peri: impl Peripheral

+ 'd, + sd: impl Peripheral

> + 'd, + ws: impl Peripheral

> + 'd, + ck: impl Peripheral

> + 'd, + mck: impl Peripheral

> + 'd, #[cfg(not(spi_v3))] txdma: impl Peripheral

> + 'd, rxdma: impl Peripheral

> + 'd, freq: Hertz, config: Config, ) -> Self { - into_ref!(sd, ws, ck, mck); - - sd.set_as_af(sd.af_num(), AFType::OutputPushPull); - sd.set_speed(crate::gpio::Speed::VeryHigh); - - ws.set_as_af(ws.af_num(), AFType::OutputPushPull); - ws.set_speed(crate::gpio::Speed::VeryHigh); - - ck.set_as_af(ck.af_num(), AFType::OutputPushPull); - ck.set_speed(crate::gpio::Speed::VeryHigh); - - mck.set_as_af(mck.af_num(), AFType::OutputPushPull); - mck.set_speed(crate::gpio::Speed::VeryHigh); - - let mut spi_cfg = SpiConfig::default(); - spi_cfg.frequency = freq; - let spi = Spi::new_internal( + into_ref!(sd); + Self::new_inner( peri, + None, + new_pin!(sd, AFType::OutputPushPull, Speed::VeryHigh), + ws, + ck, + mck, #[cfg(not(spi_v3))] new_dma!(txdma), #[cfg(spi_v3)] None, new_dma!(rxdma), - spi_cfg, - ); + freq, + config, + #[cfg(not(spi_v3))] + Function::Transmit, + #[cfg(spi_v3)] + Function::Receive, + ) + } + + #[cfg(spi_v3)] + /// Create a full duplex transmitter driver + pub fn new_full_duplex( + peri: impl Peripheral

+ 'd, + txsd: impl Peripheral

> + 'd, + rxsd: impl Peripheral

> + 'd, + ws: impl Peripheral

> + 'd, + ck: impl Peripheral

> + 'd, + mck: impl Peripheral

> + 'd, + txdma: impl Peripheral

> + 'd, + rxdma: impl Peripheral

> + 'd, + freq: Hertz, + config: Config, + ) -> Self { + into_ref!(txsd, rxsd); + Self::new_inner( + peri, + new_pin!(txsd, AFType::OutputPushPull, Speed::VeryHigh), + new_pin!(rxsd, AFType::OutputPushPull, Speed::VeryHigh), + ws, + ck, + mck, + new_dma!(txdma), + new_dma!(rxdma), + freq, + config, + Function::FullDuplex, + ) + } + + /// Write audio data. + pub async fn read(&mut self, data: &mut [W]) -> Result<(), Error> { + self._peri.read(data).await + } + + /// Write audio data. + pub async fn write(&mut self, data: &[W]) -> Result<(), Error> { + self._peri.write(data).await + } + + /// Transfer audio data. + pub async fn transfer(&mut self, read: &mut [W], write: &[W]) -> Result<(), Error> { + self._peri.transfer(read, write).await + } + + /// Transfer audio data in place. + pub async fn transfer_in_place(&mut self, data: &mut [W]) -> Result<(), Error> { + self._peri.transfer_in_place(data).await + } + + fn new_inner( + peri: impl Peripheral

+ 'd, + txsd: Option>, + rxsd: Option>, + ws: impl Peripheral

> + 'd, + ck: impl Peripheral

> + 'd, + mck: impl Peripheral

> + 'd, + txdma: Option>, + rxdma: Option>, + freq: Hertz, + config: Config, + function: Function, + ) -> Self { + into_ref!(ws, ck, mck); + + ws.set_as_af(ws.af_num(), AFType::OutputPushPull); + ws.set_speed(Speed::VeryHigh); + + ck.set_as_af(ck.af_num(), AFType::OutputPushPull); + ck.set_speed(Speed::VeryHigh); + + mck.set_as_af(mck.af_num(), AFType::OutputPushPull); + mck.set_speed(Speed::VeryHigh); + + let mut spi_cfg = SpiConfig::default(); + spi_cfg.frequency = freq; + + let spi = Spi::new_internal(peri, txdma, rxdma, spi_cfg); + + let regs = T::info().regs; // TODO move i2s to the new mux infra. //#[cfg(all(rcc_f4, not(stm32f410)))] @@ -208,26 +316,23 @@ impl<'d> I2S<'d> { let (odd, div) = compute_baud_rate(pclk, freq, config.master_clock, config.format); - #[cfg(any(spi_v1, spi_f1))] + #[cfg(any(spi_v1, spi_v3, spi_f1))] { + #[cfg(spi_v3)] + { + regs.cr1().modify(|w| w.set_spe(false)); + + reset_incompatible_bitfields::(); + } + use stm32_metapac::spi::vals::{I2scfg, Odd}; - // 1. Select the I2SDIV[7:0] bits in the SPI_I2SPR register to define the serial clock baud - // rate to reach the proper audio sample frequency. The ODD bit in the SPI_I2SPR - // register also has to be defined. - - spi.info.regs.i2spr().modify(|w| { - w.set_i2sdiv(div); - w.set_odd(match odd { - true => Odd::ODD, - false => Odd::EVEN, - }); - - w.set_mckoe(config.master_clock); - }); + // 1. Select the I2SDIV[7:0] bits in the SPI_I2SPR/SPI_I2SCFGR register to define the serial clock baud + // rate to reach the proper audio sample frequency. The ODD bit in the + // SPI_I2SPR/SPI_I2SCFGR register also has to be defined. // 2. Select the CKPOL bit to define the steady level for the communication clock. Set the - // MCKOE bit in the SPI_I2SPR register if the master clock MCK needs to be provided to + // MCKOE bit in the SPI_I2SPR/SPI_I2SCFGR register if the master clock MCK needs to be provided to // the external DAC/ADC audio component (the I2SDIV and ODD values should be // computed depending on the state of the MCK output, for more details refer to // Section 28.4.4: Clock generator). @@ -243,50 +348,72 @@ impl<'d> I2S<'d> { // 5. The I2SE bit in SPI_I2SCFGR register must be set. - spi.info.regs.i2scfgr().modify(|w| { + let clk_reg = { + #[cfg(any(spi_v1, spi_f1))] + { + regs.i2spr() + } + #[cfg(spi_v3)] + { + regs.i2scfgr() + } + }; + + clk_reg.modify(|w| { + w.set_i2sdiv(div); + w.set_odd(match odd { + true => Odd::ODD, + false => Odd::EVEN, + }); + + w.set_mckoe(config.master_clock); + }); + + regs.i2scfgr().modify(|w| { w.set_ckpol(config.clock_polarity.ckpol()); w.set_i2smod(true); + w.set_i2sstd(config.standard.i2sstd()); w.set_pcmsync(config.standard.pcmsync()); w.set_datlen(config.format.datlen()); w.set_chlen(config.format.chlen()); - w.set_i2scfg(match (config.mode, config.function) { + w.set_i2scfg(match (config.mode, function) { (Mode::Master, Function::Transmit) => I2scfg::MASTERTX, (Mode::Master, Function::Receive) => I2scfg::MASTERRX, + #[cfg(spi_v3)] + (Mode::Master, Function::FullDuplex) => I2scfg::MASTERFULLDUPLEX, (Mode::Slave, Function::Transmit) => I2scfg::SLAVETX, (Mode::Slave, Function::Receive) => I2scfg::SLAVERX, + #[cfg(spi_v3)] + (Mode::Slave, Function::FullDuplex) => I2scfg::SLAVEFULLDUPLEX, }); - w.set_i2se(true) + #[cfg(any(spi_v1, spi_f1))] + w.set_i2se(true); }); + + #[cfg(spi_v3)] + regs.cr1().modify(|w| w.set_spe(true)); } Self { _peri: spi, - sd: Some(sd.map_into()), + txsd: txsd.map(|w| w.map_into()), + rxsd: rxsd.map(|w| w.map_into()), ws: Some(ws.map_into()), ck: Some(ck.map_into()), mck: Some(mck.map_into()), } } - - /// Write audio data. - pub async fn write(&mut self, data: &[W]) -> Result<(), Error> { - self._peri.write(data).await - } - - /// Read audio data. - pub async fn read(&mut self, data: &mut [W]) -> Result<(), Error> { - self._peri.read(data).await - } } impl<'d> Drop for I2S<'d> { fn drop(&mut self) { - self.sd.as_ref().map(|x| x.set_as_disconnected()); + self.txsd.as_ref().map(|x| x.set_as_disconnected()); + self.rxsd.as_ref().map(|x| x.set_as_disconnected()); self.ws.as_ref().map(|x| x.set_as_disconnected()); self.ck.as_ref().map(|x| x.set_as_disconnected()); self.mck.as_ref().map(|x| x.set_as_disconnected()); @@ -328,3 +455,71 @@ fn compute_baud_rate(i2s_clock: Hertz, request_freq: Hertz, mclk: bool, data_for ((division & 1) == 1, (division >> 1) as u8) } } + +#[cfg(spi_v3)] +// The STM32H7 reference manual specifies that any incompatible bitfields should be reset +// to their reset values while operating in I2S mode. +fn reset_incompatible_bitfields() { + let regs = T::info().regs; + regs.cr1().modify(|w| { + let iolock = w.iolock(); + let csusp = w.csusp(); + let spe = w.cstart(); + let cstart = w.cstart(); + w.0 = 0; + w.set_iolock(iolock); + w.set_csusp(csusp); + w.set_spe(spe); + w.set_cstart(cstart); + }); + + regs.cr2().write(|w| w.0 = 0); + + regs.cfg1().modify(|w| { + let txdmaen = w.txdmaen(); + let rxdmaen = w.rxdmaen(); + let fthlv = w.fthlv(); + w.0 = 0; + w.set_txdmaen(txdmaen); + w.set_rxdmaen(rxdmaen); + w.set_fthlv(fthlv); + }); + + regs.cfg2().modify(|w| { + let afcntr = w.afcntr(); + let lsbfirst = w.lsbfirst(); + let ioswp = w.ioswp(); + w.0 = 0; + w.set_afcntr(afcntr); + w.set_lsbfirst(lsbfirst); + w.set_ioswp(ioswp); + }); + + regs.ier().modify(|w| { + let tifreie = w.tifreie(); + let ovrie = w.ovrie(); + let udrie = w.udrie(); + let txpie = w.txpie(); + let rxpie = w.rxpie(); + + w.0 = 0; + + w.set_tifreie(tifreie); + w.set_ovrie(ovrie); + w.set_udrie(udrie); + w.set_txpie(txpie); + w.set_rxpie(rxpie); + }); + + regs.ifcr().write(|w| { + w.set_suspc(true); + w.set_tifrec(true); + w.set_ovrc(true); + w.set_udrc(true); + }); + + regs.crcpoly().write(|w| w.0 = 0x107); + regs.txcrc().write(|w| w.0 = 0); + regs.rxcrc().write(|w| w.0 = 0); + regs.udrdr().write(|w| w.0 = 0); +} diff --git a/embassy-stm32/src/lib.rs b/embassy-stm32/src/lib.rs index 81ee60c1c..990bde98a 100644 --- a/embassy-stm32/src/lib.rs +++ b/embassy-stm32/src/lib.rs @@ -83,7 +83,7 @@ pub mod hrtim; pub mod hsem; #[cfg(i2c)] pub mod i2c; -#[cfg(all(spi_v1, rcc_f4))] +#[cfg(any(all(spi_v1, rcc_f4), spi_v3))] pub mod i2s; #[cfg(stm32wb)] pub mod ipcc; diff --git a/examples/stm32f4/src/bin/i2s_dma.rs b/examples/stm32f4/src/bin/i2s_dma.rs index 97a04b2aa..27b165f1b 100644 --- a/examples/stm32f4/src/bin/i2s_dma.rs +++ b/examples/stm32f4/src/bin/i2s_dma.rs @@ -15,14 +15,13 @@ async fn main(_spawner: Spawner) { let p = embassy_stm32::init(Default::default()); info!("Hello World!"); - let mut i2s = I2S::new( + let mut i2s = I2S::new_txonly( p.SPI2, p.PC3, // sd p.PB12, // ws p.PB10, // ck p.PC6, // mck p.DMA1_CH4, - p.DMA1_CH3, Hertz(1_000_000), Config::default(), ); From ec6cfc1f21ad043e10daf03a302342a295febbdd Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Aur=C3=A9lien=20Jacobs?= Date: Mon, 27 May 2024 17:31:29 +0200 Subject: [PATCH 397/581] stm32: ensure the core runs on HSI clock while setting up rcc --- embassy-stm32/src/rcc/c0.rs | 44 +++++++++++++++++++++-------------- embassy-stm32/src/rcc/f013.rs | 24 ++++++++++++------- embassy-stm32/src/rcc/g0.rs | 25 +++++++++++++------- embassy-stm32/src/rcc/g4.rs | 25 +++++++++++++------- embassy-stm32/src/rcc/h.rs | 33 ++++++++++++++++---------- 5 files changed, 95 insertions(+), 56 deletions(-) diff --git a/embassy-stm32/src/rcc/c0.rs b/embassy-stm32/src/rcc/c0.rs index 349f978c5..5adf37941 100644 --- a/embassy-stm32/src/rcc/c0.rs +++ b/embassy-stm32/src/rcc/c0.rs @@ -76,25 +76,29 @@ impl Default for Config { } pub(crate) unsafe fn init(config: Config) { + // Turn on the HSI + match config.hsi { + None => RCC.cr().modify(|w| w.set_hsion(true)), + Some(hsi) => RCC.cr().modify(|w| { + w.set_hsidiv(hsi.sys_div); + w.set_hsikerdiv(hsi.ker_div); + w.set_hsion(true); + }), + } + while !RCC.cr().read().hsirdy() {} + + // Use the HSI clock as system clock during the actual clock setup + RCC.cfgr().modify(|w| w.set_sw(Sysclk::HSISYS)); + while RCC.cfgr().read().sws() != Sysclk::HSISYS {} + // Configure HSI let (hsi, hsisys, hsiker) = match config.hsi { - None => { - RCC.cr().modify(|w| w.set_hsion(false)); - (None, None, None) - } - Some(hsi) => { - RCC.cr().modify(|w| { - w.set_hsidiv(hsi.sys_div); - w.set_hsikerdiv(hsi.ker_div); - w.set_hsion(true); - }); - while !RCC.cr().read().hsirdy() {} - ( - Some(HSI_FREQ), - Some(HSI_FREQ / hsi.sys_div), - Some(HSI_FREQ / hsi.ker_div), - ) - } + None => (None, None, None), + Some(hsi) => ( + Some(HSI_FREQ), + Some(HSI_FREQ / hsi.sys_div), + Some(HSI_FREQ / hsi.ker_div), + ), }; // Configure HSE @@ -150,6 +154,12 @@ pub(crate) unsafe fn init(config: Config) { w.set_hpre(config.ahb_pre); w.set_ppre(config.apb1_pre); }); + while RCC.cfgr().read().sws() != config.sys {} + + // Disable HSI if not used + if config.hsi.is_none() { + RCC.cr().modify(|w| w.set_hsion(false)); + } let rtc = config.ls.init(); diff --git a/embassy-stm32/src/rcc/f013.rs b/embassy-stm32/src/rcc/f013.rs index f33351e74..0946287ea 100644 --- a/embassy-stm32/src/rcc/f013.rs +++ b/embassy-stm32/src/rcc/f013.rs @@ -135,17 +135,18 @@ impl Default for Config { /// Initialize and Set the clock frequencies pub(crate) unsafe fn init(config: Config) { + // Turn on the HSI + RCC.cr().modify(|w| w.set_hsion(true)); + while !RCC.cr().read().hsirdy() {} + + // Use the HSI clock as system clock during the actual clock setup + RCC.cfgr().modify(|w| w.set_sw(Sysclk::HSI)); + while RCC.cfgr().read().sws() != Sysclk::HSI {} + // Configure HSI let hsi = match config.hsi { - false => { - RCC.cr().modify(|w| w.set_hsion(false)); - None - } - true => { - RCC.cr().modify(|w| w.set_hsion(true)); - while !RCC.cr().read().hsirdy() {} - Some(HSI_FREQ) - } + false => None, + true => Some(HSI_FREQ), }; // Configure HSE @@ -297,6 +298,11 @@ pub(crate) unsafe fn init(config: Config) { RCC.cfgr().modify(|w| w.set_sw(config.sys)); while RCC.cfgr().read().sws() != config.sys {} + // Disable HSI if not used + if !config.hsi { + RCC.cr().modify(|w| w.set_hsion(false)); + } + let rtc = config.ls.init(); // TODO: all this ADC stuff should probably go into the ADC module, not here. diff --git a/embassy-stm32/src/rcc/g0.rs b/embassy-stm32/src/rcc/g0.rs index ea4422ccc..c2fa0ca39 100644 --- a/embassy-stm32/src/rcc/g0.rs +++ b/embassy-stm32/src/rcc/g0.rs @@ -116,17 +116,18 @@ pub struct PllFreq { } pub(crate) unsafe fn init(config: Config) { + // Turn on the HSI + RCC.cr().modify(|w| w.set_hsion(true)); + while !RCC.cr().read().hsirdy() {} + + // Use the HSI clock as system clock during the actual clock setup + RCC.cfgr().modify(|w| w.set_sw(Sysclk::HSI)); + while RCC.cfgr().read().sws() != Sysclk::HSI {} + // Configure HSI let hsi = match config.hsi { - false => { - RCC.cr().modify(|w| w.set_hsion(false)); - None - } - true => { - RCC.cr().modify(|w| w.set_hsion(true)); - while !RCC.cr().read().hsirdy() {} - Some(HSI_FREQ) - } + false => None, + true => Some(HSI_FREQ), }; // Configure HSE @@ -259,6 +260,12 @@ pub(crate) unsafe fn init(config: Config) { w.set_hpre(config.ahb_pre); w.set_ppre(config.apb1_pre); }); + while RCC.cfgr().read().sws() != config.sys {} + + // Disable HSI if not used + if !config.hsi { + RCC.cr().modify(|w| w.set_hsion(false)); + } if config.low_power_run { assert!(sys <= Hertz(2_000_000)); diff --git a/embassy-stm32/src/rcc/g4.rs b/embassy-stm32/src/rcc/g4.rs index cd2d2a8a2..c261c0fed 100644 --- a/embassy-stm32/src/rcc/g4.rs +++ b/embassy-stm32/src/rcc/g4.rs @@ -117,17 +117,18 @@ pub struct PllFreq { } pub(crate) unsafe fn init(config: Config) { + // Turn on the HSI + RCC.cr().modify(|w| w.set_hsion(true)); + while !RCC.cr().read().hsirdy() {} + + // Use the HSI clock as system clock during the actual clock setup + RCC.cfgr().modify(|w| w.set_sw(Sysclk::HSI)); + while RCC.cfgr().read().sws() != Sysclk::HSI {} + // Configure HSI let hsi = match config.hsi { - false => { - RCC.cr().modify(|w| w.set_hsion(false)); - None - } - true => { - RCC.cr().modify(|w| w.set_hsion(true)); - while !RCC.cr().read().hsirdy() {} - Some(HSI_FREQ) - } + false => None, + true => Some(HSI_FREQ), }; // Configure HSE @@ -285,6 +286,12 @@ pub(crate) unsafe fn init(config: Config) { w.set_ppre1(config.apb1_pre); w.set_ppre2(config.apb2_pre); }); + while RCC.cfgr().read().sws() != config.sys {} + + // Disable HSI if not used + if !config.hsi { + RCC.cr().modify(|w| w.set_hsion(false)); + } if config.low_power_run { assert!(sys <= Hertz(2_000_000)); diff --git a/embassy-stm32/src/rcc/h.rs b/embassy-stm32/src/rcc/h.rs index 4d7004872..e3c7dd158 100644 --- a/embassy-stm32/src/rcc/h.rs +++ b/embassy-stm32/src/rcc/h.rs @@ -402,20 +402,24 @@ pub(crate) unsafe fn init(config: Config) { } } + // Turn on the HSI + match config.hsi { + None => RCC.cr().modify(|w| w.set_hsion(true)), + Some(hsidiv) => RCC.cr().modify(|w| { + w.set_hsidiv(hsidiv); + w.set_hsion(true); + }), + } + while !RCC.cr().read().hsirdy() {} + + // Use the HSI clock as system clock during the actual clock setup + RCC.cfgr().modify(|w| w.set_sw(Sysclk::HSI)); + while RCC.cfgr().read().sws() != Sysclk::HSI {} + // Configure HSI let hsi = match config.hsi { - None => { - RCC.cr().modify(|w| w.set_hsion(false)); - None - } - Some(hsidiv) => { - RCC.cr().modify(|w| { - w.set_hsidiv(hsidiv); - w.set_hsion(true); - }); - while !RCC.cr().read().hsirdy() {} - Some(HSI_FREQ / hsidiv) - } + None => None, + Some(hsidiv) => Some(HSI_FREQ / hsidiv), }; // Configure HSE @@ -608,6 +612,11 @@ pub(crate) unsafe fn init(config: Config) { RCC.cfgr().modify(|w| w.set_sw(config.sys)); while RCC.cfgr().read().sws() != config.sys {} + // Disable HSI if not used + if config.hsi.is_none() { + RCC.cr().modify(|w| w.set_hsion(false)); + } + // IO compensation cell - Requires CSI clock and SYSCFG #[cfg(any(stm32h7))] // TODO h5, h7rs if csi.is_some() { From 76fbec74da30c5cd04b441aa49414a286170a491 Mon Sep 17 00:00:00 2001 From: Alexandros Liarokapis Date: Mon, 27 May 2024 20:43:17 +0300 Subject: [PATCH 398/581] fix spi panic on read due to i2s configuration conversion check --- embassy-stm32/src/spi/mod.rs | 52 ++++++++++++++++++++---------------- 1 file changed, 29 insertions(+), 23 deletions(-) diff --git a/embassy-stm32/src/spi/mod.rs b/embassy-stm32/src/spi/mod.rs index 0a0afafc6..0b12bc9b6 100644 --- a/embassy-stm32/src/spi/mod.rs +++ b/embassy-stm32/src/spi/mod.rs @@ -643,36 +643,40 @@ impl<'d> Spi<'d, Async> { return Ok(()); } - self.info.regs.cr1().modify(|w| { + let regs = self.info.regs; + + regs.cr1().modify(|w| { w.set_spe(false); }); - let comm = self.info.regs.cfg2().modify(|w| { + let comm = regs.cfg2().modify(|w| { let prev = w.comm(); w.set_comm(vals::Comm::RECEIVER); prev }); - let i2scfg = self.info.regs.i2scfgr().modify(|w| { - let prev = w.i2scfg(); - w.set_i2scfg(match prev { - vals::I2scfg::SLAVERX | vals::I2scfg::SLAVEFULLDUPLEX => vals::I2scfg::SLAVERX, - vals::I2scfg::MASTERRX | vals::I2scfg::MASTERFULLDUPLEX => vals::I2scfg::MASTERRX, - _ => panic!("unsupported configuration"), - }); - prev + let i2scfg = regs.i2scfgr().modify(|w| { + w.i2smod().then(|| { + let prev = w.i2scfg(); + w.set_i2scfg(match prev { + vals::I2scfg::SLAVERX | vals::I2scfg::SLAVEFULLDUPLEX => vals::I2scfg::SLAVERX, + vals::I2scfg::MASTERRX | vals::I2scfg::MASTERFULLDUPLEX => vals::I2scfg::MASTERRX, + _ => panic!("unsupported configuration"), + }); + prev + }) }); - let tsize = self.info.regs.cr2().read().tsize(); + let tsize = regs.cr2().read().tsize(); - let rx_src = self.info.regs.rx_ptr(); + let rx_src = regs.rx_ptr(); let mut read = 0; let mut remaining = data.len(); loop { self.set_word_size(W::CONFIG); - set_rxdmaen(self.info.regs, true); + set_rxdmaen(regs, true); let transfer_size = remaining.min(u16::max_value().into()); @@ -683,21 +687,21 @@ impl<'d> Spi<'d, Async> { .read(rx_src, &mut data[read..(read + transfer_size)], Default::default()) }; - self.info.regs.cr2().modify(|w| { + regs.cr2().modify(|w| { w.set_tsize(transfer_size as u16); }); - self.info.regs.cr1().modify(|w| { + regs.cr1().modify(|w| { w.set_spe(true); }); - self.info.regs.cr1().modify(|w| { + regs.cr1().modify(|w| { w.set_cstart(true); }); transfer.await; - finish_dma(self.info.regs); + finish_dma(regs); remaining -= transfer_size; @@ -708,21 +712,23 @@ impl<'d> Spi<'d, Async> { read += transfer_size; } - self.info.regs.cr1().modify(|w| { + regs.cr1().modify(|w| { w.set_spe(false); }); - self.info.regs.cfg2().modify(|w| { + regs.cfg2().modify(|w| { w.set_comm(comm); }); - self.info.regs.cr2().modify(|w| { + regs.cr2().modify(|w| { w.set_tsize(tsize); }); - self.info.regs.i2scfgr().modify(|w| { - w.set_i2scfg(i2scfg); - }); + if let Some(i2scfg) = i2scfg { + regs.i2scfgr().modify(|w| { + w.set_i2scfg(i2scfg); + }); + } Ok(()) } From 1d05015a1c6b79d9cf7f93d16718508f3f80fc7e Mon Sep 17 00:00:00 2001 From: Alexandros Liarokapis Date: Mon, 27 May 2024 20:42:29 +0300 Subject: [PATCH 399/581] broaden tsize read support to other spi versions --- embassy-stm32/src/spi/mod.rs | 24 +++++++----------------- 1 file changed, 7 insertions(+), 17 deletions(-) diff --git a/embassy-stm32/src/spi/mod.rs b/embassy-stm32/src/spi/mod.rs index 0b12bc9b6..a3578dfde 100644 --- a/embassy-stm32/src/spi/mod.rs +++ b/embassy-stm32/src/spi/mod.rs @@ -508,7 +508,7 @@ impl<'d> Spi<'d, Async> { peri: impl Peripheral

+ 'd, sck: impl Peripheral

> + 'd, miso: impl Peripheral

> + 'd, - #[cfg(not(spi_v3))] tx_dma: impl Peripheral

> + 'd, + #[cfg(any(spi_v1, spi_f1))] tx_dma: impl Peripheral

> + 'd, rx_dma: impl Peripheral

> + 'd, config: Config, ) -> Self { @@ -517,9 +517,9 @@ impl<'d> Spi<'d, Async> { new_pin!(sck, AFType::OutputPushPull, Speed::VeryHigh, config.sck_pull_mode()), None, new_pin!(miso, AFType::Input, Speed::VeryHigh), - #[cfg(not(spi_v3))] + #[cfg(any(spi_v1, spi_f1))] new_dma!(tx_dma), - #[cfg(spi_v3)] + #[cfg(any(spi_v2, spi_v3, spi_v4, spi_v5))] None, new_dma!(rx_dma), config, @@ -626,19 +626,8 @@ impl<'d> Spi<'d, Async> { } /// SPI read, using DMA. + #[cfg(any(spi_v2, spi_v3, spi_v4, spi_v5))] pub async fn read(&mut self, data: &mut [W]) -> Result<(), Error> { - #[cfg(not(spi_v3))] - { - self.transmission_read(data).await - } - #[cfg(spi_v3)] - { - self.tsize_read(data).await - } - } - - #[cfg(spi_v3)] - async fn tsize_read(&mut self, data: &mut [W]) -> Result<(), Error> { if data.is_empty() { return Ok(()); } @@ -733,8 +722,9 @@ impl<'d> Spi<'d, Async> { Ok(()) } - #[cfg(not(spi_v3))] - async fn transmission_read(&mut self, data: &mut [W]) -> Result<(), Error> { + /// SPI read, using DMA. + #[cfg(any(spi_v1, spi_f1))] + pub async fn read(&mut self, data: &mut [W]) -> Result<(), Error> { if data.is_empty() { return Ok(()); } From 9a6ed79ad124c8a22f6833c2c4f9637661a5bbdb Mon Sep 17 00:00:00 2001 From: Alexandros Liarokapis Date: Mon, 27 May 2024 20:51:50 +0300 Subject: [PATCH 400/581] remove rx-only support for new spi versions with missing I2SCFGR register --- embassy-stm32/src/spi/mod.rs | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/embassy-stm32/src/spi/mod.rs b/embassy-stm32/src/spi/mod.rs index a3578dfde..d9b6f0003 100644 --- a/embassy-stm32/src/spi/mod.rs +++ b/embassy-stm32/src/spi/mod.rs @@ -508,7 +508,7 @@ impl<'d> Spi<'d, Async> { peri: impl Peripheral

+ 'd, sck: impl Peripheral

> + 'd, miso: impl Peripheral

> + 'd, - #[cfg(any(spi_v1, spi_f1))] tx_dma: impl Peripheral

> + 'd, + #[cfg(any(spi_v1, spi_f1, spi_v4, spi_v5))] tx_dma: impl Peripheral

> + 'd, rx_dma: impl Peripheral

> + 'd, config: Config, ) -> Self { @@ -517,9 +517,9 @@ impl<'d> Spi<'d, Async> { new_pin!(sck, AFType::OutputPushPull, Speed::VeryHigh, config.sck_pull_mode()), None, new_pin!(miso, AFType::Input, Speed::VeryHigh), - #[cfg(any(spi_v1, spi_f1))] + #[cfg(any(spi_v1, spi_f1, spi_v4, spi_v5))] new_dma!(tx_dma), - #[cfg(any(spi_v2, spi_v3, spi_v4, spi_v5))] + #[cfg(any(spi_v2, spi_v3))] None, new_dma!(rx_dma), config, @@ -626,7 +626,7 @@ impl<'d> Spi<'d, Async> { } /// SPI read, using DMA. - #[cfg(any(spi_v2, spi_v3, spi_v4, spi_v5))] + #[cfg(any(spi_v2, spi_v3))] pub async fn read(&mut self, data: &mut [W]) -> Result<(), Error> { if data.is_empty() { return Ok(()); @@ -723,7 +723,7 @@ impl<'d> Spi<'d, Async> { } /// SPI read, using DMA. - #[cfg(any(spi_v1, spi_f1))] + #[cfg(any(spi_v1, spi_f1, spi_v4, spi_v5))] pub async fn read(&mut self, data: &mut [W]) -> Result<(), Error> { if data.is_empty() { return Ok(()); From 4d431b308011db6c196cc052c03ca94d6222e97e Mon Sep 17 00:00:00 2001 From: Priit Laes Date: Tue, 28 May 2024 11:27:21 +0300 Subject: [PATCH 401/581] docs: faq: Fix link to bdma example and improve wording. --- docs/pages/faq.adoc | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/docs/pages/faq.adoc b/docs/pages/faq.adoc index 827164bae..bb088dfb6 100644 --- a/docs/pages/faq.adoc +++ b/docs/pages/faq.adoc @@ -267,10 +267,10 @@ Additionally, some PWR settings require a full device reboot (and enough time to There is not a fix for this yet, as it is board/hardware dependant. See link:https://github.com/embassy-rs/embassy/issues/2806[this tracking issue] for more details -=== STM32 BDMA only work out of some RAM regions +=== STM32 BDMA only working out of some RAM regions -The STM32 BDMA controller included in some chips (TODO: list which ones) has a limitation in that it only works out of certain regions of RAM (TODO: list which ones), otherwise the transfer -will fail. +The STM32 BDMA controller included in some STM32H7 chips has to be configured to use only certain regions of RAM, +otherwise the transfer will fail. If you see errors that look like this: @@ -279,7 +279,7 @@ If you see errors that look like this: DMA: error on BDMA@1234ABCD channel 4 ---- -You need to set up your linker script to define a special region for this area, and copy data to that region before using with BDMA. +You need to set up your linker script to define a special region for this area and copy data to that region before using with BDMA. General steps: @@ -289,7 +289,7 @@ General steps: 4. In your code, access the defined memory region using `#[link_section = ".xxx"]` 5. Copy data to that region before using BDMA. -See link:/examples/stm32h7/src/bin/spi_bdma.rs[this example] for more details. +See link:https://github.com/embassy-rs/embassy/blob/main/examples/stm32h7/src/bin/spi_bdma.rs[SMT32H7 SPI BDMA example] for more details. == How do I switch to the `main` branch? From 46fc15783d226d66aa93e38c0b36c8cac9b71700 Mon Sep 17 00:00:00 2001 From: Alexandros Liarokapis Date: Tue, 28 May 2024 12:50:24 +0300 Subject: [PATCH 402/581] add spi_v4 and spi_v5 support but block i2scfg rx-only configuration --- embassy-stm32/src/spi/mod.rs | 12 +++++++----- 1 file changed, 7 insertions(+), 5 deletions(-) diff --git a/embassy-stm32/src/spi/mod.rs b/embassy-stm32/src/spi/mod.rs index d9b6f0003..109b2738b 100644 --- a/embassy-stm32/src/spi/mod.rs +++ b/embassy-stm32/src/spi/mod.rs @@ -508,7 +508,7 @@ impl<'d> Spi<'d, Async> { peri: impl Peripheral

+ 'd, sck: impl Peripheral

> + 'd, miso: impl Peripheral

> + 'd, - #[cfg(any(spi_v1, spi_f1, spi_v4, spi_v5))] tx_dma: impl Peripheral

> + 'd, + #[cfg(any(spi_v1, spi_f1, spi_v2))] tx_dma: impl Peripheral

> + 'd, rx_dma: impl Peripheral

> + 'd, config: Config, ) -> Self { @@ -517,9 +517,9 @@ impl<'d> Spi<'d, Async> { new_pin!(sck, AFType::OutputPushPull, Speed::VeryHigh, config.sck_pull_mode()), None, new_pin!(miso, AFType::Input, Speed::VeryHigh), - #[cfg(any(spi_v1, spi_f1, spi_v4, spi_v5))] + #[cfg(any(spi_v1, spi_f1, spi_v2))] new_dma!(tx_dma), - #[cfg(any(spi_v2, spi_v3))] + #[cfg(any(spi_v3, spi_v4, spi_v5))] None, new_dma!(rx_dma), config, @@ -626,7 +626,7 @@ impl<'d> Spi<'d, Async> { } /// SPI read, using DMA. - #[cfg(any(spi_v2, spi_v3))] + #[cfg(any(spi_v3, spi_v4, spi_v5))] pub async fn read(&mut self, data: &mut [W]) -> Result<(), Error> { if data.is_empty() { return Ok(()); @@ -644,6 +644,7 @@ impl<'d> Spi<'d, Async> { prev }); + #[cfg(spi_v3)] let i2scfg = regs.i2scfgr().modify(|w| { w.i2smod().then(|| { let prev = w.i2scfg(); @@ -713,6 +714,7 @@ impl<'d> Spi<'d, Async> { w.set_tsize(tsize); }); + #[cfg(spi_v3)] if let Some(i2scfg) = i2scfg { regs.i2scfgr().modify(|w| { w.set_i2scfg(i2scfg); @@ -723,7 +725,7 @@ impl<'d> Spi<'d, Async> { } /// SPI read, using DMA. - #[cfg(any(spi_v1, spi_f1, spi_v4, spi_v5))] + #[cfg(any(spi_v1, spi_f1, spi_v2))] pub async fn read(&mut self, data: &mut [W]) -> Result<(), Error> { if data.is_empty() { return Ok(()); From 4d1fbcd9cd42ebc3169008e189fcd98dce1c427d Mon Sep 17 00:00:00 2001 From: Alexandros Liarokapis Date: Tue, 28 May 2024 13:38:27 +0300 Subject: [PATCH 403/581] address review comments --- embassy-stm32/src/spi/mod.rs | 23 +++++------------------ 1 file changed, 5 insertions(+), 18 deletions(-) diff --git a/embassy-stm32/src/spi/mod.rs b/embassy-stm32/src/spi/mod.rs index 109b2738b..7fb8da5ac 100644 --- a/embassy-stm32/src/spi/mod.rs +++ b/embassy-stm32/src/spi/mod.rs @@ -657,28 +657,23 @@ impl<'d> Spi<'d, Async> { }) }); - let tsize = regs.cr2().read().tsize(); - let rx_src = regs.rx_ptr(); - let mut read = 0; - let mut remaining = data.len(); - - loop { + for mut chunk in data.chunks_mut(u16::max_value().into()) { self.set_word_size(W::CONFIG); set_rxdmaen(regs, true); - let transfer_size = remaining.min(u16::max_value().into()); + let tsize = chunk.len(); let transfer = unsafe { self.rx_dma .as_mut() .unwrap() - .read(rx_src, &mut data[read..(read + transfer_size)], Default::default()) + .read(rx_src, &mut chunk, Default::default()) }; regs.cr2().modify(|w| { - w.set_tsize(transfer_size as u16); + w.set_tsize(tsize as u16); }); regs.cr1().modify(|w| { @@ -692,14 +687,6 @@ impl<'d> Spi<'d, Async> { transfer.await; finish_dma(regs); - - remaining -= transfer_size; - - if remaining == 0 { - break; - } - - read += transfer_size; } regs.cr1().modify(|w| { @@ -711,7 +698,7 @@ impl<'d> Spi<'d, Async> { }); regs.cr2().modify(|w| { - w.set_tsize(tsize); + w.set_tsize(0); }); #[cfg(spi_v3)] From 4f76f6b9df72c10f039911d0e35ca504be750564 Mon Sep 17 00:00:00 2001 From: Alexandros Liarokapis Date: Tue, 28 May 2024 15:24:05 +0300 Subject: [PATCH 404/581] add spi_dma rx-only test --- tests/stm32/src/bin/spi_dma.rs | 65 +++++++++++++++++++++++++++++++--- 1 file changed, 60 insertions(+), 5 deletions(-) diff --git a/tests/stm32/src/bin/spi_dma.rs b/tests/stm32/src/bin/spi_dma.rs index 5d46726dd..30e679f2a 100644 --- a/tests/stm32/src/bin/spi_dma.rs +++ b/tests/stm32/src/bin/spi_dma.rs @@ -8,27 +8,33 @@ use defmt::assert_eq; use embassy_executor::Spawner; use embassy_stm32::spi::{self, Spi}; use embassy_stm32::time::Hertz; +use embassy_stm32::{into_ref, Peripheral as _}; #[embassy_executor::main] async fn main(_spawner: Spawner) { let p = embassy_stm32::init(config()); info!("Hello World!"); - let spi = peri!(p, SPI); + let spi_peri = peri!(p, SPI); let sck = peri!(p, SPI_SCK); let mosi = peri!(p, SPI_MOSI); let miso = peri!(p, SPI_MISO); let tx_dma = peri!(p, SPI_TX_DMA); let rx_dma = peri!(p, SPI_RX_DMA); + into_ref!(spi_peri, sck, mosi, miso, tx_dma, rx_dma); + let mut spi_config = spi::Config::default(); spi_config.frequency = Hertz(1_000_000); let mut spi = Spi::new( - spi, sck, // Arduino D13 - mosi, // Arduino D11 - miso, // Arduino D12 - tx_dma, rx_dma, spi_config, + spi_peri.reborrow(), + sck.reborrow(), // Arduino D13 + mosi.reborrow(), // Arduino D11 + miso.reborrow(), // Arduino D12 + tx_dma.reborrow(), + rx_dma.reborrow(), + spi_config, ); let data: [u8; 9] = [0x00, 0xFF, 0xAA, 0x55, 0xC0, 0xFF, 0xEE, 0xC0, 0xDE]; @@ -76,6 +82,55 @@ async fn main(_spawner: Spawner) { spi.blocking_read(&mut buf).unwrap(); spi.write(&buf).await.unwrap(); + core::mem::drop(spi); + + // test rx-only configuration + + // stm32f207zg - spi_v1 + // stm32f103c8 - spi_f1 + // stm32g491re - spi_v2 + // stm32h753zi - spi_v3 + // stm32h563zi - spi_v4 + // stm32wba52cg - spi_v5 + + #[cfg(any(stm32f207zg, stm32f103c8, stm32g491re, stm32h753zi, stm32h563zi, stm32wba52cg))] + { + let mut spi = { + #[cfg(stm32f207zg, stm32f103c8, stm32g491re)] + { + Spi::new_rxonly( + spi_peri.reborrow(), + sck.reborrow(), + miso.reborrow(), + tx_dma.reborrow(), + rx_dma.reborrow(), + spi_config, + ) + } + #[cfg(stm32h753zi, stm32h563zi, stm32wba52cg)] + { + Spi::new_rxonly( + spi_peri.reborrow(), + sck.reborrow(), + miso.reborrow(), + rx_dma.reborrow(), + spi_config, + ) + } + }; + + use embassy_stm32::gpio; + let mut mosi = gpio::Output::new(mosi.reborrow(), gpio::Level::Low, gpio::Speed::Low); + + mosi.set_high(); + spi.read(&mut buf).await.unwrap(); + assert_eq!(buf, [0xff; 9]); + + mosi.set_low(); + spi.read(&mut buf).await.unwrap(); + assert_eq!(buf, [0x00; 9]); + }; + info!("Test OK"); cortex_m::asm::bkpt(); } From 642465a7da64333b9339283f3b3a14cb04bd349e Mon Sep 17 00:00:00 2001 From: Bruno Bousquet <21108660+brunob45@users.noreply.github.com> Date: Tue, 28 May 2024 20:20:15 -0400 Subject: [PATCH 405/581] add stm32f446 files --- examples/stm32f4/.cargo/config.toml | 6 +++-- examples/stm32f4/.vscode/launch.json | 33 +++++++++++++++++++++++ examples/stm32f4/.vscode/tasks.json | 21 +++++++++++++++ examples/stm32f4/Cargo.toml | 2 +- examples/stm32f4/openocd.cfg | 5 ++++ examples/stm32f4/openocd.gdb | 40 ++++++++++++++++++++++++++++ 6 files changed, 104 insertions(+), 3 deletions(-) create mode 100644 examples/stm32f4/.vscode/launch.json create mode 100644 examples/stm32f4/.vscode/tasks.json create mode 100644 examples/stm32f4/openocd.cfg create mode 100644 examples/stm32f4/openocd.gdb diff --git a/examples/stm32f4/.cargo/config.toml b/examples/stm32f4/.cargo/config.toml index 16efa8e6f..f5a4af51a 100644 --- a/examples/stm32f4/.cargo/config.toml +++ b/examples/stm32f4/.cargo/config.toml @@ -1,9 +1,11 @@ [target.'cfg(all(target_arch = "arm", target_os = "none"))'] # replace STM32F429ZITx with your chip as listed in `probe-rs chip list` -runner = "probe-rs run --chip STM32F429ZITx" +# runner = "probe-rs run --chip STM32F429ZITx" +runner = "arm-none-eabi-gdb -q -x openocd.gdb" [build] -target = "thumbv7em-none-eabi" +# target = "thumbv7em-none-eabi" +target = "thumbv7em-none-eabihf" # Cortex-M4F and Cortex-M7F (with FPU) [env] DEFMT_LOG = "trace" diff --git a/examples/stm32f4/.vscode/launch.json b/examples/stm32f4/.vscode/launch.json new file mode 100644 index 000000000..59f98070d --- /dev/null +++ b/examples/stm32f4/.vscode/launch.json @@ -0,0 +1,33 @@ +{ + /* + * Requires the Rust Language Server (rust-analyzer) and Cortex-Debug extensions + * https://marketplace.visualstudio.com/items?itemName=rust-lang.rust-analyzer + * https://marketplace.visualstudio.com/items?itemName=marus25.cortex-debug + */ + "version": "0.2.0", + "configurations": [ + { + /* Configuration for the STM32F446 Discovery board */ + "type": "cortex-debug", + "request": "launch", + "name": "Debug (OpenOCD)", + "servertype": "openocd", + "cwd": "${workspaceRoot}", + "preLaunchTask": "Cargo Build (debug)", + "runToEntryPoint": "main", + "executable": "./target/thumbv7em-none-eabihf/debug/multiprio", + /* Run `cargo build --example itm` and uncomment this line to run itm example */ + // "executable": "./target/thumbv7em-none-eabihf/debug/examples/itm", + "device": "STM32F446RET6", + "configFiles": [ + "interface/stlink.cfg", + "target/stm32f4x.cfg" + ], + "postLaunchCommands": [ + "monitor arm semihosting enable" + ], + "postRestartCommands": [], + "postResetCommands": [], + } + ] +} \ No newline at end of file diff --git a/examples/stm32f4/.vscode/tasks.json b/examples/stm32f4/.vscode/tasks.json new file mode 100644 index 000000000..3cbed84b4 --- /dev/null +++ b/examples/stm32f4/.vscode/tasks.json @@ -0,0 +1,21 @@ +{ + "version": "2.0.0", + "tasks": [ + { + "type": "cargo", + "command": "build", + "problemMatcher": [ + "$rustc" + ], + "args": [ + "--bin", + "multiprio" + ], + "group": { + "kind": "build", + "isDefault": true + }, + "label": "Cargo Build (debug)", + } + ] +} \ No newline at end of file diff --git a/examples/stm32f4/Cargo.toml b/examples/stm32f4/Cargo.toml index 1eb1ae6db..ee7594c95 100644 --- a/examples/stm32f4/Cargo.toml +++ b/examples/stm32f4/Cargo.toml @@ -6,7 +6,7 @@ license = "MIT OR Apache-2.0" [dependencies] # Change stm32f429zi to your chip name, if necessary. -embassy-stm32 = { version = "0.1.0", path = "../../embassy-stm32", features = ["defmt", "stm32f429zi", "unstable-pac", "memory-x", "time-driver-any", "exti", "chrono"] } +embassy-stm32 = { version = "0.1.0", path = "../../embassy-stm32", features = ["defmt", "stm32f446re", "unstable-pac", "memory-x", "time-driver-any", "exti", "chrono"] } embassy-sync = { version = "0.5.0", path = "../../embassy-sync", features = ["defmt"] } embassy-executor = { version = "0.5.0", path = "../../embassy-executor", features = ["task-arena-size-32768", "arch-cortex-m", "executor-thread", "executor-interrupt", "defmt", "integrated-timers"] } embassy-time = { version = "0.3.0", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime", "tick-hz-32_768"] } diff --git a/examples/stm32f4/openocd.cfg b/examples/stm32f4/openocd.cfg new file mode 100644 index 000000000..e41d52b1a --- /dev/null +++ b/examples/stm32f4/openocd.cfg @@ -0,0 +1,5 @@ +# Sample OpenOCD configuration for the STM32F3DISCOVERY development board + +source [find interface/stlink.cfg] + +source [find target/stm32f4x.cfg] diff --git a/examples/stm32f4/openocd.gdb b/examples/stm32f4/openocd.gdb new file mode 100644 index 000000000..7795319fb --- /dev/null +++ b/examples/stm32f4/openocd.gdb @@ -0,0 +1,40 @@ +target extended-remote :3333 + +# print demangled symbols +set print asm-demangle on + +# set backtrace limit to not have infinite backtrace loops +set backtrace limit 32 + +# detect unhandled exceptions, hard faults and panics +break DefaultHandler +break HardFault +break rust_begin_unwind +# # run the next few lines so the panic message is printed immediately +# # the number needs to be adjusted for your panic handler +# commands $bpnum +# next 4 +# end + +# *try* to stop at the user entry point (it might be gone due to inlining) +break main + +monitor arm semihosting enable + +# # send captured ITM to the file itm.fifo +# # (the microcontroller SWO pin must be connected to the programmer SWO pin) +# # 8000000 must match the core clock frequency +# monitor tpiu config internal itm.txt uart off 8000000 + +# # OR: make the microcontroller SWO pin output compatible with UART (8N1) +# # 8000000 must match the core clock frequency +# # 2000000 is the frequency of the SWO pin +# monitor tpiu config external uart off 8000000 2000000 + +# # enable ITM port 0 +# monitor itm port 0 on + +load + +# start the process but immediately halt the processor +stepi From 41b9a12574f9ad992ca986b87926838fbe1f1775 Mon Sep 17 00:00:00 2001 From: Bruno Bousquet <21108660+brunob45@users.noreply.github.com> Date: Tue, 28 May 2024 20:36:23 -0400 Subject: [PATCH 406/581] compile pwm_input example --- examples/stm32f4/.vscode/launch.json | 2 +- examples/stm32f4/.vscode/tasks.json | 2 +- examples/stm32f4/src/bin/pwm_input.rs | 52 +++++++++++++++++++++++++++ rust-toolchain.toml | 2 +- 4 files changed, 55 insertions(+), 3 deletions(-) create mode 100644 examples/stm32f4/src/bin/pwm_input.rs diff --git a/examples/stm32f4/.vscode/launch.json b/examples/stm32f4/.vscode/launch.json index 59f98070d..a9849e0da 100644 --- a/examples/stm32f4/.vscode/launch.json +++ b/examples/stm32f4/.vscode/launch.json @@ -15,7 +15,7 @@ "cwd": "${workspaceRoot}", "preLaunchTask": "Cargo Build (debug)", "runToEntryPoint": "main", - "executable": "./target/thumbv7em-none-eabihf/debug/multiprio", + "executable": "./target/thumbv7em-none-eabihf/debug/pwm_input", /* Run `cargo build --example itm` and uncomment this line to run itm example */ // "executable": "./target/thumbv7em-none-eabihf/debug/examples/itm", "device": "STM32F446RET6", diff --git a/examples/stm32f4/.vscode/tasks.json b/examples/stm32f4/.vscode/tasks.json index 3cbed84b4..de7013b12 100644 --- a/examples/stm32f4/.vscode/tasks.json +++ b/examples/stm32f4/.vscode/tasks.json @@ -9,7 +9,7 @@ ], "args": [ "--bin", - "multiprio" + "pwm_input" ], "group": { "kind": "build", diff --git a/examples/stm32f4/src/bin/pwm_input.rs b/examples/stm32f4/src/bin/pwm_input.rs new file mode 100644 index 000000000..49de33d2b --- /dev/null +++ b/examples/stm32f4/src/bin/pwm_input.rs @@ -0,0 +1,52 @@ +#![no_std] +#![no_main] + +use defmt::*; +use embassy_executor::Spawner; +use embassy_stm32::gpio::{Level, Output, Pull, Speed}; +use embassy_stm32::time::khz; +use embassy_stm32::timer::input_capture::{CapturePin, InputCapture}; +use embassy_stm32::timer::{self, Channel}; +use embassy_stm32::{bind_interrupts, peripherals}; +use embassy_time::Timer; +use {defmt_rtt as _, panic_probe as _}; + +/// Connect PB2 and PB10 with a 1k Ohm resistor + +#[embassy_executor::task] +async fn blinky(led: peripherals::PB2) { + let mut led = Output::new(led, Level::High, Speed::Low); + + loop { + info!("high"); + led.set_high(); + Timer::after_millis(300).await; + + info!("low"); + led.set_low(); + Timer::after_millis(300).await; + } +} + +bind_interrupts!(struct Irqs { + TIM2 => timer::CaptureCompareInterruptHandler; +}); + +#[embassy_executor::main] +async fn main(spawner: Spawner) { + let p = embassy_stm32::init(Default::default()); + info!("Hello World!"); + + unwrap!(spawner.spawn(blinky(p.PB2))); + + let ch3 = CapturePin::new_ch3(p.PB10, Pull::None); + let mut ic = InputCapture::new(p.TIM2, None, None, Some(ch3), None, Irqs, khz(1000), Default::default()); + + loop { + info!("wait for risign edge"); + ic.wait_for_rising_edge(Channel::Ch3).await; + + let capture_value = ic.get_capture_value(Channel::Ch3); + info!("new capture! {}", capture_value); + } +} diff --git a/rust-toolchain.toml b/rust-toolchain.toml index 57185e217..2f5d17069 100644 --- a/rust-toolchain.toml +++ b/rust-toolchain.toml @@ -1,5 +1,5 @@ [toolchain] -channel = "1.78" +channel = "1.77" components = [ "rust-src", "rustfmt", "llvm-tools" ] targets = [ "thumbv7em-none-eabi", From 7c1e1ee288bc46dbf030749c242d60e222d1fbe5 Mon Sep 17 00:00:00 2001 From: Bruno Bousquet <21108660+brunob45@users.noreply.github.com> Date: Tue, 28 May 2024 22:30:10 -0400 Subject: [PATCH 407/581] example is working now --- embassy-stm32/src/timer/input_capture.rs | 63 +++++++++++++++++++----- examples/stm32f4/.vscode/launch.json | 2 +- examples/stm32f4/.vscode/tasks.json | 2 +- 3 files changed, 54 insertions(+), 13 deletions(-) diff --git a/embassy-stm32/src/timer/input_capture.rs b/embassy-stm32/src/timer/input_capture.rs index a1c1486f9..ab6f10a1d 100644 --- a/embassy-stm32/src/timer/input_capture.rs +++ b/embassy-stm32/src/timer/input_capture.rs @@ -26,6 +26,10 @@ pub enum Ch3 {} /// Channel 4 marker type. pub enum Ch4 {} +fn regs_gp16(ptr: *mut ()) -> crate::pac::timer::TimGp16 { + unsafe { crate::pac::timer::TimGp16::from_ptr(ptr) } +} + /// Capture pin wrapper. /// /// This wraps a pin to make it usable with capture. @@ -76,10 +80,6 @@ impl<'d, T: GeneralInstance4Channel> InputCapture<'d, T> { freq: Hertz, counting_mode: CountingMode, ) -> Self { - Self::new_inner(tim, freq, counting_mode) - } - - fn new_inner(tim: impl Peripheral

+ 'd, freq: Hertz, counting_mode: CountingMode) -> Self { let mut this = Self { inner: Timer::new(tim) }; this.inner.set_counting_mode(counting_mode); @@ -148,11 +148,52 @@ impl<'d, T: GeneralInstance4Channel> InputCapture<'d, T> { } fn new_future(&self, channel: Channel, mode: InputCaptureMode, tisel: InputTISelection) -> InputCaptureFuture { - self.inner.enable_channel(channel, true); - self.inner.set_input_capture_mode(channel, mode); - self.inner.set_input_ti_selection(channel, tisel); - self.inner.clear_input_interrupt(channel); - self.inner.enable_input_interrupt(channel, true); + use stm32_metapac::timer::vals::*; + + let regs = regs_gp16(T::regs()); + let idx = channel.index(); + + // Select the active input: TIMx_CCR1 must be linked to the TI1 input, so write the CC1S + // bits to 01 in the TIMx_CCMR1 register. As soon as CC1S becomes different from 00, + // the channel is configured in input and the TIMx_CCR1 register becomes read-only. + regs.ccmr_input(idx / 2) + .modify(|r| r.set_ccs(idx % 2, CcmrInputCcs::from(tisel))); + + // Program the appropriate input filter duration in relation with the signal connected to the + // timer (by programming the ICxF bits in the TIMx_CCMRx register if the input is one of + // the TIx inputs). Let’s imagine that, when toggling, the input signal is not stable during at + // must 5 internal clock cycles. We must program a filter duration longer than these 5 + // clock cycles. We can validate a transition on TI1 when 8 consecutive samples with the + // new level have been detected (sampled at fDTS frequency). Then write IC1F bits to + // 0011 in the TIMx_CCMR1 register. + regs.ccmr_input(idx / 2) + .modify(|r| r.set_icf(idx % 2, FilterValue::NOFILTER)); + + // Select the edge of the active transition on the TI1 channel by writing the CC1P and + // CC1NP bits to 00 in the TIMx_CCER register (rising edge in this case). + let ccpnp = match mode { + InputCaptureMode::Rising => (false, false), + InputCaptureMode::Falling => (false, true), + InputCaptureMode::BothEdges => (true, true), + }; + regs.ccer().modify(|r| { + r.set_ccp(idx, ccpnp.0); + r.set_ccnp(idx, ccpnp.1); + }); + + // Program the input prescaler. In our example, we wish the capture to be performed at + // each valid transition, so the prescaler is disabled (write IC1PS bits to 00 in the + // TIMx_CCMR1 register). + regs.ccmr_input(idx / 2).modify(|r| r.set_icpsc(idx % 2, 0)); + + // Enable capture from the counter into the capture register by setting the CC1E bit in the + // TIMx_CCER register. + regs.ccer().modify(|r| r.set_cce(idx, true)); + + // If needed, enable the related interrupt request by setting the CC1IE bit in the + // TIMx_DIER register, and/or the DMA request by setting the CC1DE bit in the + // TIMx_DIER register. + regs.dier().modify(|r| r.set_ccie(idx, true)); InputCaptureFuture { channel, @@ -206,7 +247,7 @@ struct InputCaptureFuture { impl Drop for InputCaptureFuture { fn drop(&mut self) { critical_section::with(|_| { - let regs = unsafe { crate::pac::timer::TimGp16::from_ptr(T::regs()) }; + let regs = regs_gp16(T::regs()); // disable interrupt enable regs.dier().modify(|w| w.set_ccie(self.channel.index(), false)); @@ -220,7 +261,7 @@ impl Future for InputCaptureFuture { fn poll(self: Pin<&mut Self>, cx: &mut Context<'_>) -> Poll { T::state().cc_waker[self.channel.index()].register(cx.waker()); - let regs = unsafe { crate::pac::timer::TimGp16::from_ptr(T::regs()) }; + let regs = regs_gp16(T::regs()); let dier = regs.dier().read(); if !dier.ccie(self.channel.index()) { diff --git a/examples/stm32f4/.vscode/launch.json b/examples/stm32f4/.vscode/launch.json index a9849e0da..20cd4d2e8 100644 --- a/examples/stm32f4/.vscode/launch.json +++ b/examples/stm32f4/.vscode/launch.json @@ -15,7 +15,7 @@ "cwd": "${workspaceRoot}", "preLaunchTask": "Cargo Build (debug)", "runToEntryPoint": "main", - "executable": "./target/thumbv7em-none-eabihf/debug/pwm_input", + "executable": "./target/thumbv7em-none-eabihf/debug/input_capture", /* Run `cargo build --example itm` and uncomment this line to run itm example */ // "executable": "./target/thumbv7em-none-eabihf/debug/examples/itm", "device": "STM32F446RET6", diff --git a/examples/stm32f4/.vscode/tasks.json b/examples/stm32f4/.vscode/tasks.json index de7013b12..e153722da 100644 --- a/examples/stm32f4/.vscode/tasks.json +++ b/examples/stm32f4/.vscode/tasks.json @@ -9,7 +9,7 @@ ], "args": [ "--bin", - "pwm_input" + "input_capture" ], "group": { "kind": "build", From a52841041de7cbc6d315b3616768b531716056a0 Mon Sep 17 00:00:00 2001 From: Bruno Bousquet <21108660+brunob45@users.noreply.github.com> Date: Tue, 28 May 2024 22:38:08 -0400 Subject: [PATCH 408/581] use timer LL --- embassy-stm32/src/timer/input_capture.rs | 52 ++++-------------------- 1 file changed, 7 insertions(+), 45 deletions(-) diff --git a/embassy-stm32/src/timer/input_capture.rs b/embassy-stm32/src/timer/input_capture.rs index ab6f10a1d..5dadc9131 100644 --- a/embassy-stm32/src/timer/input_capture.rs +++ b/embassy-stm32/src/timer/input_capture.rs @@ -148,52 +148,14 @@ impl<'d, T: GeneralInstance4Channel> InputCapture<'d, T> { } fn new_future(&self, channel: Channel, mode: InputCaptureMode, tisel: InputTISelection) -> InputCaptureFuture { - use stm32_metapac::timer::vals::*; + use stm32_metapac::timer::vals::FilterValue; - let regs = regs_gp16(T::regs()); - let idx = channel.index(); - - // Select the active input: TIMx_CCR1 must be linked to the TI1 input, so write the CC1S - // bits to 01 in the TIMx_CCMR1 register. As soon as CC1S becomes different from 00, - // the channel is configured in input and the TIMx_CCR1 register becomes read-only. - regs.ccmr_input(idx / 2) - .modify(|r| r.set_ccs(idx % 2, CcmrInputCcs::from(tisel))); - - // Program the appropriate input filter duration in relation with the signal connected to the - // timer (by programming the ICxF bits in the TIMx_CCMRx register if the input is one of - // the TIx inputs). Let’s imagine that, when toggling, the input signal is not stable during at - // must 5 internal clock cycles. We must program a filter duration longer than these 5 - // clock cycles. We can validate a transition on TI1 when 8 consecutive samples with the - // new level have been detected (sampled at fDTS frequency). Then write IC1F bits to - // 0011 in the TIMx_CCMR1 register. - regs.ccmr_input(idx / 2) - .modify(|r| r.set_icf(idx % 2, FilterValue::NOFILTER)); - - // Select the edge of the active transition on the TI1 channel by writing the CC1P and - // CC1NP bits to 00 in the TIMx_CCER register (rising edge in this case). - let ccpnp = match mode { - InputCaptureMode::Rising => (false, false), - InputCaptureMode::Falling => (false, true), - InputCaptureMode::BothEdges => (true, true), - }; - regs.ccer().modify(|r| { - r.set_ccp(idx, ccpnp.0); - r.set_ccnp(idx, ccpnp.1); - }); - - // Program the input prescaler. In our example, we wish the capture to be performed at - // each valid transition, so the prescaler is disabled (write IC1PS bits to 00 in the - // TIMx_CCMR1 register). - regs.ccmr_input(idx / 2).modify(|r| r.set_icpsc(idx % 2, 0)); - - // Enable capture from the counter into the capture register by setting the CC1E bit in the - // TIMx_CCER register. - regs.ccer().modify(|r| r.set_cce(idx, true)); - - // If needed, enable the related interrupt request by setting the CC1IE bit in the - // TIMx_DIER register, and/or the DMA request by setting the CC1DE bit in the - // TIMx_DIER register. - regs.dier().modify(|r| r.set_ccie(idx, true)); + self.inner.set_input_ti_selection(channel, tisel); + self.inner.set_input_capture_filter(channel, FilterValue::NOFILTER); + self.inner.set_input_capture_mode(channel, mode); + self.inner.set_input_capture_prescaler(channel, 0); + self.inner.enable_channel(channel, true); + self.inner.enable_input_interrupt(channel, true); InputCaptureFuture { channel, From f1d5f4ca21629036f510e52aeee617ffb70db51b Mon Sep 17 00:00:00 2001 From: Bruno Bousquet <21108660+brunob45@users.noreply.github.com> Date: Tue, 28 May 2024 22:43:23 -0400 Subject: [PATCH 409/581] undo minor changes --- embassy-stm32/src/timer/input_capture.rs | 14 ++++++++++---- 1 file changed, 10 insertions(+), 4 deletions(-) diff --git a/embassy-stm32/src/timer/input_capture.rs b/embassy-stm32/src/timer/input_capture.rs index 5dadc9131..000938a70 100644 --- a/embassy-stm32/src/timer/input_capture.rs +++ b/embassy-stm32/src/timer/input_capture.rs @@ -26,10 +26,6 @@ pub enum Ch3 {} /// Channel 4 marker type. pub enum Ch4 {} -fn regs_gp16(ptr: *mut ()) -> crate::pac::timer::TimGp16 { - unsafe { crate::pac::timer::TimGp16::from_ptr(ptr) } -} - /// Capture pin wrapper. /// /// This wraps a pin to make it usable with capture. @@ -80,6 +76,10 @@ impl<'d, T: GeneralInstance4Channel> InputCapture<'d, T> { freq: Hertz, counting_mode: CountingMode, ) -> Self { + Self::new_inner(tim, freq, counting_mode) + } + + fn new_inner(tim: impl Peripheral

+ 'd, freq: Hertz, counting_mode: CountingMode) -> Self { let mut this = Self { inner: Timer::new(tim) }; this.inner.set_counting_mode(counting_mode); @@ -150,6 +150,7 @@ impl<'d, T: GeneralInstance4Channel> InputCapture<'d, T> { fn new_future(&self, channel: Channel, mode: InputCaptureMode, tisel: InputTISelection) -> InputCaptureFuture { use stm32_metapac::timer::vals::FilterValue; + // Configuration steps from ST RM0390 chapter 17.3.5 Input Capture Mode self.inner.set_input_ti_selection(channel, tisel); self.inner.set_input_capture_filter(channel, FilterValue::NOFILTER); self.inner.set_input_capture_mode(channel, mode); @@ -200,6 +201,11 @@ impl<'d, T: GeneralInstance4Channel> InputCapture<'d, T> { } } +/// Convert pointer to TIM instance to TimGp16 object +fn regs_gp16(ptr: *mut ()) -> crate::pac::timer::TimGp16 { + unsafe { crate::pac::timer::TimGp16::from_ptr(ptr) } +} + #[must_use = "futures do nothing unless you `.await` or poll them"] struct InputCaptureFuture { channel: Channel, From a6c419d096bf2a4d14243fe90a7e2c1881b33fdf Mon Sep 17 00:00:00 2001 From: Bruno Bousquet <21108660+brunob45@users.noreply.github.com> Date: Tue, 28 May 2024 23:12:08 -0400 Subject: [PATCH 410/581] add f103 example for input_capture --- examples/stm32f1/.vscode/launch.json | 33 +++++++++++++++ examples/stm32f1/.vscode/tasks.json | 21 ++++++++++ examples/stm32f1/openocd.cfg | 5 +++ examples/stm32f1/openocd.gdb | 40 +++++++++++++++++++ .../src/bin/input_capture.rs} | 8 ++-- 5 files changed, 103 insertions(+), 4 deletions(-) create mode 100644 examples/stm32f1/.vscode/launch.json create mode 100644 examples/stm32f1/.vscode/tasks.json create mode 100644 examples/stm32f1/openocd.cfg create mode 100644 examples/stm32f1/openocd.gdb rename examples/{stm32f4/src/bin/pwm_input.rs => stm32f1/src/bin/input_capture.rs} (86%) diff --git a/examples/stm32f1/.vscode/launch.json b/examples/stm32f1/.vscode/launch.json new file mode 100644 index 000000000..7d1504a39 --- /dev/null +++ b/examples/stm32f1/.vscode/launch.json @@ -0,0 +1,33 @@ +{ + /* + * Requires the Rust Language Server (rust-analyzer) and Cortex-Debug extensions + * https://marketplace.visualstudio.com/items?itemName=rust-lang.rust-analyzer + * https://marketplace.visualstudio.com/items?itemName=marus25.cortex-debug + */ + "version": "0.2.0", + "configurations": [ + { + /* Configuration for the STM32F446 Discovery board */ + "type": "cortex-debug", + "request": "launch", + "name": "Debug (OpenOCD)", + "servertype": "openocd", + "cwd": "${workspaceRoot}", + "preLaunchTask": "Cargo Build (debug)", + "runToEntryPoint": "main", + "executable": "./target/thumbv7m-none-eabi/debug/input_capture", + /* Run `cargo build --example itm` and uncomment this line to run itm example */ + // "executable": "./target/thumbv7em-none-eabihf/debug/examples/itm", + "device": "STM32F103TB", + "configFiles": [ + "interface/stlink.cfg", + "target/stm32f1x.cfg" + ], + "postLaunchCommands": [ + "monitor arm semihosting enable" + ], + "postRestartCommands": [], + "postResetCommands": [], + } + ] +} \ No newline at end of file diff --git a/examples/stm32f1/.vscode/tasks.json b/examples/stm32f1/.vscode/tasks.json new file mode 100644 index 000000000..e153722da --- /dev/null +++ b/examples/stm32f1/.vscode/tasks.json @@ -0,0 +1,21 @@ +{ + "version": "2.0.0", + "tasks": [ + { + "type": "cargo", + "command": "build", + "problemMatcher": [ + "$rustc" + ], + "args": [ + "--bin", + "input_capture" + ], + "group": { + "kind": "build", + "isDefault": true + }, + "label": "Cargo Build (debug)", + } + ] +} \ No newline at end of file diff --git a/examples/stm32f1/openocd.cfg b/examples/stm32f1/openocd.cfg new file mode 100644 index 000000000..0325cd651 --- /dev/null +++ b/examples/stm32f1/openocd.cfg @@ -0,0 +1,5 @@ +# Sample OpenOCD configuration for the STM32F3DISCOVERY development board + +source [find interface/stlink.cfg] + +source [find target/stm32f1x.cfg] diff --git a/examples/stm32f1/openocd.gdb b/examples/stm32f1/openocd.gdb new file mode 100644 index 000000000..7795319fb --- /dev/null +++ b/examples/stm32f1/openocd.gdb @@ -0,0 +1,40 @@ +target extended-remote :3333 + +# print demangled symbols +set print asm-demangle on + +# set backtrace limit to not have infinite backtrace loops +set backtrace limit 32 + +# detect unhandled exceptions, hard faults and panics +break DefaultHandler +break HardFault +break rust_begin_unwind +# # run the next few lines so the panic message is printed immediately +# # the number needs to be adjusted for your panic handler +# commands $bpnum +# next 4 +# end + +# *try* to stop at the user entry point (it might be gone due to inlining) +break main + +monitor arm semihosting enable + +# # send captured ITM to the file itm.fifo +# # (the microcontroller SWO pin must be connected to the programmer SWO pin) +# # 8000000 must match the core clock frequency +# monitor tpiu config internal itm.txt uart off 8000000 + +# # OR: make the microcontroller SWO pin output compatible with UART (8N1) +# # 8000000 must match the core clock frequency +# # 2000000 is the frequency of the SWO pin +# monitor tpiu config external uart off 8000000 2000000 + +# # enable ITM port 0 +# monitor itm port 0 on + +load + +# start the process but immediately halt the processor +stepi diff --git a/examples/stm32f4/src/bin/pwm_input.rs b/examples/stm32f1/src/bin/input_capture.rs similarity index 86% rename from examples/stm32f4/src/bin/pwm_input.rs rename to examples/stm32f1/src/bin/input_capture.rs index 49de33d2b..417830231 100644 --- a/examples/stm32f4/src/bin/pwm_input.rs +++ b/examples/stm32f1/src/bin/input_capture.rs @@ -11,10 +11,10 @@ use embassy_stm32::{bind_interrupts, peripherals}; use embassy_time::Timer; use {defmt_rtt as _, panic_probe as _}; -/// Connect PB2 and PB10 with a 1k Ohm resistor +/// Connect PA2 and PC13 with a 1k Ohm resistor #[embassy_executor::task] -async fn blinky(led: peripherals::PB2) { +async fn blinky(led: peripherals::PC13) { let mut led = Output::new(led, Level::High, Speed::Low); loop { @@ -37,9 +37,9 @@ async fn main(spawner: Spawner) { let p = embassy_stm32::init(Default::default()); info!("Hello World!"); - unwrap!(spawner.spawn(blinky(p.PB2))); + unwrap!(spawner.spawn(blinky(p.PC13))); - let ch3 = CapturePin::new_ch3(p.PB10, Pull::None); + let ch3 = CapturePin::new_ch3(p.PA2, Pull::None); let mut ic = InputCapture::new(p.TIM2, None, None, Some(ch3), None, Irqs, khz(1000), Default::default()); loop { From 521332bdd1d682b1d43ab7896b54e280c17b9771 Mon Sep 17 00:00:00 2001 From: Bruno Bousquet <21108660+brunob45@users.noreply.github.com> Date: Wed, 29 May 2024 00:28:26 -0400 Subject: [PATCH 411/581] pwm_input is working on F446 --- embassy-stm32/src/timer/input_capture.rs | 33 ++---- embassy-stm32/src/timer/low_level.rs | 16 +++ embassy-stm32/src/timer/mod.rs | 1 + embassy-stm32/src/timer/pwm_input.rs | 134 +++++++++++++++++++++++ examples/stm32f1/.vscode/launch.json | 2 +- examples/stm32f1/.vscode/tasks.json | 2 +- examples/stm32f1/src/bin/pwm_input.rs | 50 +++++++++ examples/stm32f4/.vscode/launch.json | 2 +- examples/stm32f4/.vscode/tasks.json | 2 +- examples/stm32f4/src/bin/pwm_input.rs | 52 +++++++++ 10 files changed, 265 insertions(+), 29 deletions(-) create mode 100644 embassy-stm32/src/timer/pwm_input.rs create mode 100644 examples/stm32f1/src/bin/pwm_input.rs create mode 100644 examples/stm32f4/src/bin/pwm_input.rs diff --git a/embassy-stm32/src/timer/input_capture.rs b/embassy-stm32/src/timer/input_capture.rs index 000938a70..b3434ae63 100644 --- a/embassy-stm32/src/timer/input_capture.rs +++ b/embassy-stm32/src/timer/input_capture.rs @@ -80,18 +80,18 @@ impl<'d, T: GeneralInstance4Channel> InputCapture<'d, T> { } fn new_inner(tim: impl Peripheral

+ 'd, freq: Hertz, counting_mode: CountingMode) -> Self { - let mut this = Self { inner: Timer::new(tim) }; + let mut inner = Timer::new(tim); - this.inner.set_counting_mode(counting_mode); - this.set_tick_freq(freq); - this.inner.enable_outputs(); // Required for advanced timers, see GeneralInstance4Channel for details - this.inner.start(); + inner.set_counting_mode(counting_mode); + inner.set_tick_freq(freq); + inner.enable_outputs(); // Required for advanced timers, see GeneralInstance4Channel for details + inner.start(); // enable NVIC interrupt T::CaptureCompareInterrupt::unpend(); unsafe { T::CaptureCompareInterrupt::enable() }; - this + Self { inner } } /// Enable the given channel. @@ -109,24 +109,6 @@ impl<'d, T: GeneralInstance4Channel> InputCapture<'d, T> { self.inner.get_channel_enable_state(channel) } - /// Set tick frequency. - /// - /// Note: when you call this, the max period value changes - pub fn set_tick_freq(&mut self, freq: Hertz) { - let f = freq; - assert!(f.0 > 0); - let timer_f = self.inner.get_clock_frequency(); - - let pclk_ticks_per_timer_period = timer_f / f; - let psc: u16 = unwrap!((pclk_ticks_per_timer_period - 1).try_into()); - - let regs = self.inner.regs_core(); - regs.psc().write_value(psc); - - // Generate an Update Request - regs.egr().write(|r| r.set_ug(true)); - } - /// Set the input capture mode for a given channel. pub fn set_input_capture_mode(&mut self, channel: Channel, mode: InputCaptureMode) { self.inner.set_input_capture_mode(channel, mode); @@ -150,7 +132,8 @@ impl<'d, T: GeneralInstance4Channel> InputCapture<'d, T> { fn new_future(&self, channel: Channel, mode: InputCaptureMode, tisel: InputTISelection) -> InputCaptureFuture { use stm32_metapac::timer::vals::FilterValue; - // Configuration steps from ST RM0390 chapter 17.3.5 Input Capture Mode + // Configuration steps from ST RM0390 (STM32F446) chapter 17.3.5 + // or ST RM0008 (STM32F103) chapter 15.3.5 Input capture mode self.inner.set_input_ti_selection(channel, tisel); self.inner.set_input_capture_filter(channel, FilterValue::NOFILTER); self.inner.set_input_capture_mode(channel, mode); diff --git a/embassy-stm32/src/timer/low_level.rs b/embassy-stm32/src/timer/low_level.rs index 7f533b75c..141e96894 100644 --- a/embassy-stm32/src/timer/low_level.rs +++ b/embassy-stm32/src/timer/low_level.rs @@ -273,6 +273,22 @@ impl<'d, T: CoreInstance> Timer<'d, T> { } } + /// Set tick frequency. + pub fn set_tick_freq(&mut self, freq: Hertz) { + let f = freq; + assert!(f.0 > 0); + let timer_f = self.get_clock_frequency(); + + let pclk_ticks_per_timer_period = timer_f / f; + let psc: u16 = unwrap!((pclk_ticks_per_timer_period - 1).try_into()); + + let regs = self.regs_core(); + regs.psc().write_value(psc); + + // Generate an Update Request + regs.egr().write(|r| r.set_ug(true)); + } + /// Clear update interrupt. /// /// Returns whether the update interrupt flag was set. diff --git a/embassy-stm32/src/timer/mod.rs b/embassy-stm32/src/timer/mod.rs index 314b6006b..25782ee13 100644 --- a/embassy-stm32/src/timer/mod.rs +++ b/embassy-stm32/src/timer/mod.rs @@ -8,6 +8,7 @@ use embassy_sync::waitqueue::AtomicWaker; pub mod complementary_pwm; pub mod input_capture; pub mod low_level; +pub mod pwm_input; pub mod qei; pub mod simple_pwm; diff --git a/embassy-stm32/src/timer/pwm_input.rs b/embassy-stm32/src/timer/pwm_input.rs new file mode 100644 index 000000000..d34ba086f --- /dev/null +++ b/embassy-stm32/src/timer/pwm_input.rs @@ -0,0 +1,134 @@ +//! Input capture driver. + +use embassy_hal_internal::into_ref; + +use super::low_level::{CountingMode, InputCaptureMode, InputTISelection, Timer}; +use super::{Channel, Channel1Pin, Channel2Pin, GeneralInstance4Channel}; +use crate::gpio::{AFType, Pull}; +use crate::time::Hertz; +use crate::Peripheral; + +/// Input capture driver. +pub struct PwmInput<'d, T: GeneralInstance4Channel> { + channel: Channel, + inner: Timer<'d, T>, +} + +/// Convert pointer to TIM instance to TimGp16 object +fn regs_gp16(ptr: *mut ()) -> crate::pac::timer::TimGp16 { + unsafe { crate::pac::timer::TimGp16::from_ptr(ptr) } +} + +impl<'d, T: GeneralInstance4Channel> PwmInput<'d, T> { + /// Create a new input capture driver. + pub fn new( + tim: impl Peripheral

+ 'd, + pin: impl Peripheral

> + 'd, + pull_type: Pull, + freq: Hertz, + ) -> Self { + into_ref!(pin); + critical_section::with(|_| { + pin.set_as_af_pull(pin.af_num(), AFType::Input, pull_type); + #[cfg(gpio_v2)] + pin.set_speed(crate::gpio::Speed::VeryHigh); + }); + + Self::new_inner(tim, freq, Channel::Ch1, Channel::Ch2) + } + + /// Create a new input capture driver. + pub fn new_alt( + tim: impl Peripheral

+ 'd, + pin: impl Peripheral

> + 'd, + pull_type: Pull, + freq: Hertz, + ) -> Self { + into_ref!(pin); + critical_section::with(|_| { + pin.set_as_af_pull(pin.af_num(), AFType::Input, pull_type); + #[cfg(gpio_v2)] + pin.set_speed(crate::gpio::Speed::VeryHigh); + }); + + Self::new_inner(tim, freq, Channel::Ch2, Channel::Ch1) + } + + fn new_inner(tim: impl Peripheral

+ 'd, freq: Hertz, ch1: Channel, ch2: Channel) -> Self { + use stm32_metapac::timer::vals::{Sms, Ts}; + + let mut inner = Timer::new(tim); + + inner.set_counting_mode(CountingMode::EdgeAlignedUp); + inner.set_tick_freq(freq); + inner.enable_outputs(); // Required for advanced timers, see GeneralInstance4Channel for details + inner.start(); + + // Configuration steps from ST RM0390 (STM32F446) chapter 17.3.6 + // or ST RM0008 (STM32F103) chapter 15.3.6 Input capture mode + inner.set_input_ti_selection(ch1, InputTISelection::Normal); + inner.set_input_capture_mode(ch1, InputCaptureMode::Rising); + + inner.set_input_ti_selection(ch2, InputTISelection::Alternate); + inner.set_input_capture_mode(ch2, InputCaptureMode::Falling); + + let regs = regs_gp16(T::regs()); + regs.smcr().modify(|r| { + // Select the valid trigger input: write the TS bits to 101 in the TIMx_SMCR register + // (TI1FP1 selected). + r.set_ts(match ch1 { + Channel::Ch1 => Ts::TI1FP1, + Channel::Ch2 => Ts::TI2FP2, + _ => panic!("Invalid channel for PWM input"), + }); + + // Configure the slave mode controller in reset mode: write the SMS bits to 100 in the + // TIMx_SMCR register. + r.set_sms(Sms::RESET_MODE); + }); + + // Must call the `enable` function after + + Self { channel: ch1, inner } + } + + /// Enable the given channel. + pub fn enable(&mut self) { + self.inner.enable_channel(Channel::Ch1, true); + self.inner.enable_channel(Channel::Ch2, true); + } + + /// Disable the given channel. + pub fn disable(&mut self) { + self.inner.enable_channel(Channel::Ch1, false); + self.inner.enable_channel(Channel::Ch2, false); + } + + /// Check whether given channel is enabled + pub fn is_enabled(&self) -> bool { + self.inner.get_channel_enable_state(Channel::Ch1) + } + + /// Get the period tick count + pub fn get_period_ticks(&self) -> u32 { + self.inner.get_capture_value(self.channel) + } + + /// Get the duty tick count + pub fn get_duty_ticks(&self) -> u32 { + self.inner.get_capture_value(match self.channel { + Channel::Ch1 => Channel::Ch2, + Channel::Ch2 => Channel::Ch1, + _ => panic!("Invalid channel for PWM input"), + }) + } + + /// Get the duty cycle in 100% + pub fn get_duty_cycle(&self) -> f32 { + let period = self.get_period_ticks(); + if period == 0 { + return 0.; + } + 100. * (self.get_duty_ticks() as f32) / (period as f32) + } +} diff --git a/examples/stm32f1/.vscode/launch.json b/examples/stm32f1/.vscode/launch.json index 7d1504a39..998508867 100644 --- a/examples/stm32f1/.vscode/launch.json +++ b/examples/stm32f1/.vscode/launch.json @@ -15,7 +15,7 @@ "cwd": "${workspaceRoot}", "preLaunchTask": "Cargo Build (debug)", "runToEntryPoint": "main", - "executable": "./target/thumbv7m-none-eabi/debug/input_capture", + "executable": "./target/thumbv7m-none-eabi/debug/pwm_input", /* Run `cargo build --example itm` and uncomment this line to run itm example */ // "executable": "./target/thumbv7em-none-eabihf/debug/examples/itm", "device": "STM32F103TB", diff --git a/examples/stm32f1/.vscode/tasks.json b/examples/stm32f1/.vscode/tasks.json index e153722da..de7013b12 100644 --- a/examples/stm32f1/.vscode/tasks.json +++ b/examples/stm32f1/.vscode/tasks.json @@ -9,7 +9,7 @@ ], "args": [ "--bin", - "input_capture" + "pwm_input" ], "group": { "kind": "build", diff --git a/examples/stm32f1/src/bin/pwm_input.rs b/examples/stm32f1/src/bin/pwm_input.rs new file mode 100644 index 000000000..14978f817 --- /dev/null +++ b/examples/stm32f1/src/bin/pwm_input.rs @@ -0,0 +1,50 @@ +#![no_std] +#![no_main] + +use defmt::*; +use embassy_executor::Spawner; +use embassy_stm32::gpio::{Level, Output, Pull, Speed}; +use embassy_stm32::time::khz; +use embassy_stm32::timer::{self, pwm_input::PwmInput}; +use embassy_stm32::{bind_interrupts, peripherals}; +use embassy_time::Timer; +use {defmt_rtt as _, panic_probe as _}; + +/// Connect PB2 and PB10 with a 1k Ohm resistor + +#[embassy_executor::task] +async fn blinky(led: peripherals::PC13) { + let mut led = Output::new(led, Level::High, Speed::Low); + + loop { + info!("high"); + led.set_high(); + Timer::after_millis(300).await; + + info!("low"); + led.set_low(); + Timer::after_millis(300).await; + } +} + +bind_interrupts!(struct Irqs { + TIM2 => timer::CaptureCompareInterruptHandler; +}); + +#[embassy_executor::main] +async fn main(spawner: Spawner) { + let p = embassy_stm32::init(Default::default()); + info!("Hello World!"); + + unwrap!(spawner.spawn(blinky(p.PC13))); + + let pwm_input = PwmInput::new(p.TIM2, p.PA0, Pull::None, khz(1000)); + + loop { + Timer::after_millis(500).await; + let _per = pwm_input.get_period_ticks(); + let _dc = pwm_input.get_duty_ticks(); + let _pc = pwm_input.get_duty_cycle(); + asm::nop(); + } +} diff --git a/examples/stm32f4/.vscode/launch.json b/examples/stm32f4/.vscode/launch.json index 20cd4d2e8..a9849e0da 100644 --- a/examples/stm32f4/.vscode/launch.json +++ b/examples/stm32f4/.vscode/launch.json @@ -15,7 +15,7 @@ "cwd": "${workspaceRoot}", "preLaunchTask": "Cargo Build (debug)", "runToEntryPoint": "main", - "executable": "./target/thumbv7em-none-eabihf/debug/input_capture", + "executable": "./target/thumbv7em-none-eabihf/debug/pwm_input", /* Run `cargo build --example itm` and uncomment this line to run itm example */ // "executable": "./target/thumbv7em-none-eabihf/debug/examples/itm", "device": "STM32F446RET6", diff --git a/examples/stm32f4/.vscode/tasks.json b/examples/stm32f4/.vscode/tasks.json index e153722da..de7013b12 100644 --- a/examples/stm32f4/.vscode/tasks.json +++ b/examples/stm32f4/.vscode/tasks.json @@ -9,7 +9,7 @@ ], "args": [ "--bin", - "input_capture" + "pwm_input" ], "group": { "kind": "build", diff --git a/examples/stm32f4/src/bin/pwm_input.rs b/examples/stm32f4/src/bin/pwm_input.rs new file mode 100644 index 000000000..e57e58c22 --- /dev/null +++ b/examples/stm32f4/src/bin/pwm_input.rs @@ -0,0 +1,52 @@ +#![no_std] +#![no_main] + +use cortex_m::asm; +use defmt::*; +use embassy_executor::Spawner; +use embassy_stm32::gpio::{Level, Output, Pull, Speed}; +use embassy_stm32::time::khz; +use embassy_stm32::timer::{self, pwm_input::PwmInput}; +use embassy_stm32::{bind_interrupts, peripherals}; +use embassy_time::Timer; +use {defmt_rtt as _, panic_probe as _}; + +/// Connect PB2 and PB10 with a 1k Ohm resistor + +#[embassy_executor::task] +async fn blinky(led: peripherals::PB2) { + let mut led = Output::new(led, Level::High, Speed::Low); + + loop { + info!("high"); + led.set_high(); + Timer::after_millis(300).await; + + info!("low"); + led.set_low(); + Timer::after_millis(300).await; + } +} + +bind_interrupts!(struct Irqs { + TIM2 => timer::CaptureCompareInterruptHandler; +}); + +#[embassy_executor::main] +async fn main(spawner: Spawner) { + let p = embassy_stm32::init(Default::default()); + info!("Hello World!"); + + unwrap!(spawner.spawn(blinky(p.PB2))); + + let mut pwm_input = PwmInput::new(p.TIM3, p.PA6, Pull::None, khz(10)); + pwm_input.enable(); + + loop { + Timer::after_millis(500).await; + let _per = pwm_input.get_period_ticks(); + let _dc = pwm_input.get_duty_ticks(); + let _pc = pwm_input.get_duty_cycle(); + asm::nop(); + } +} From 50039b17a78bbefeca1a3dd6b689ea478079ea6b Mon Sep 17 00:00:00 2001 From: Bruno Bousquet <21108660+brunob45@users.noreply.github.com> Date: Wed, 29 May 2024 00:33:35 -0400 Subject: [PATCH 412/581] fix F103 example --- examples/stm32f1/.vscode/launch.json | 2 +- examples/stm32f1/src/bin/pwm_input.rs | 4 +++- 2 files changed, 4 insertions(+), 2 deletions(-) diff --git a/examples/stm32f1/.vscode/launch.json b/examples/stm32f1/.vscode/launch.json index 998508867..71f203614 100644 --- a/examples/stm32f1/.vscode/launch.json +++ b/examples/stm32f1/.vscode/launch.json @@ -18,7 +18,7 @@ "executable": "./target/thumbv7m-none-eabi/debug/pwm_input", /* Run `cargo build --example itm` and uncomment this line to run itm example */ // "executable": "./target/thumbv7em-none-eabihf/debug/examples/itm", - "device": "STM32F103TB", + "device": "STM32F103T8", "configFiles": [ "interface/stlink.cfg", "target/stm32f1x.cfg" diff --git a/examples/stm32f1/src/bin/pwm_input.rs b/examples/stm32f1/src/bin/pwm_input.rs index 14978f817..718bf0fcf 100644 --- a/examples/stm32f1/src/bin/pwm_input.rs +++ b/examples/stm32f1/src/bin/pwm_input.rs @@ -1,6 +1,7 @@ #![no_std] #![no_main] +use cortex_m::asm; use defmt::*; use embassy_executor::Spawner; use embassy_stm32::gpio::{Level, Output, Pull, Speed}; @@ -38,7 +39,8 @@ async fn main(spawner: Spawner) { unwrap!(spawner.spawn(blinky(p.PC13))); - let pwm_input = PwmInput::new(p.TIM2, p.PA0, Pull::None, khz(1000)); + let mut pwm_input = PwmInput::new(p.TIM2, p.PA0, Pull::None, khz(10)); + pwm_input.enable(); loop { Timer::after_millis(500).await; From 69badfb845c0fb43b4e4c1c2e9f74a535fcd317a Mon Sep 17 00:00:00 2001 From: Bruno Bousquet <21108660+brunob45@users.noreply.github.com> Date: Wed, 29 May 2024 00:37:50 -0400 Subject: [PATCH 413/581] remove dev files --- examples/stm32f1/.vscode/launch.json | 33 ----------------------- examples/stm32f1/.vscode/tasks.json | 21 --------------- examples/stm32f1/openocd.cfg | 5 ---- examples/stm32f1/openocd.gdb | 40 ---------------------------- examples/stm32f4/.cargo/config.toml | 6 ++--- examples/stm32f4/.vscode/launch.json | 33 ----------------------- examples/stm32f4/.vscode/tasks.json | 21 --------------- examples/stm32f4/Cargo.toml | 2 +- examples/stm32f4/openocd.cfg | 5 ---- examples/stm32f4/openocd.gdb | 40 ---------------------------- rust-toolchain.toml | 2 +- 11 files changed, 4 insertions(+), 204 deletions(-) delete mode 100644 examples/stm32f1/.vscode/launch.json delete mode 100644 examples/stm32f1/.vscode/tasks.json delete mode 100644 examples/stm32f1/openocd.cfg delete mode 100644 examples/stm32f1/openocd.gdb delete mode 100644 examples/stm32f4/.vscode/launch.json delete mode 100644 examples/stm32f4/.vscode/tasks.json delete mode 100644 examples/stm32f4/openocd.cfg delete mode 100644 examples/stm32f4/openocd.gdb diff --git a/examples/stm32f1/.vscode/launch.json b/examples/stm32f1/.vscode/launch.json deleted file mode 100644 index 71f203614..000000000 --- a/examples/stm32f1/.vscode/launch.json +++ /dev/null @@ -1,33 +0,0 @@ -{ - /* - * Requires the Rust Language Server (rust-analyzer) and Cortex-Debug extensions - * https://marketplace.visualstudio.com/items?itemName=rust-lang.rust-analyzer - * https://marketplace.visualstudio.com/items?itemName=marus25.cortex-debug - */ - "version": "0.2.0", - "configurations": [ - { - /* Configuration for the STM32F446 Discovery board */ - "type": "cortex-debug", - "request": "launch", - "name": "Debug (OpenOCD)", - "servertype": "openocd", - "cwd": "${workspaceRoot}", - "preLaunchTask": "Cargo Build (debug)", - "runToEntryPoint": "main", - "executable": "./target/thumbv7m-none-eabi/debug/pwm_input", - /* Run `cargo build --example itm` and uncomment this line to run itm example */ - // "executable": "./target/thumbv7em-none-eabihf/debug/examples/itm", - "device": "STM32F103T8", - "configFiles": [ - "interface/stlink.cfg", - "target/stm32f1x.cfg" - ], - "postLaunchCommands": [ - "monitor arm semihosting enable" - ], - "postRestartCommands": [], - "postResetCommands": [], - } - ] -} \ No newline at end of file diff --git a/examples/stm32f1/.vscode/tasks.json b/examples/stm32f1/.vscode/tasks.json deleted file mode 100644 index de7013b12..000000000 --- a/examples/stm32f1/.vscode/tasks.json +++ /dev/null @@ -1,21 +0,0 @@ -{ - "version": "2.0.0", - "tasks": [ - { - "type": "cargo", - "command": "build", - "problemMatcher": [ - "$rustc" - ], - "args": [ - "--bin", - "pwm_input" - ], - "group": { - "kind": "build", - "isDefault": true - }, - "label": "Cargo Build (debug)", - } - ] -} \ No newline at end of file diff --git a/examples/stm32f1/openocd.cfg b/examples/stm32f1/openocd.cfg deleted file mode 100644 index 0325cd651..000000000 --- a/examples/stm32f1/openocd.cfg +++ /dev/null @@ -1,5 +0,0 @@ -# Sample OpenOCD configuration for the STM32F3DISCOVERY development board - -source [find interface/stlink.cfg] - -source [find target/stm32f1x.cfg] diff --git a/examples/stm32f1/openocd.gdb b/examples/stm32f1/openocd.gdb deleted file mode 100644 index 7795319fb..000000000 --- a/examples/stm32f1/openocd.gdb +++ /dev/null @@ -1,40 +0,0 @@ -target extended-remote :3333 - -# print demangled symbols -set print asm-demangle on - -# set backtrace limit to not have infinite backtrace loops -set backtrace limit 32 - -# detect unhandled exceptions, hard faults and panics -break DefaultHandler -break HardFault -break rust_begin_unwind -# # run the next few lines so the panic message is printed immediately -# # the number needs to be adjusted for your panic handler -# commands $bpnum -# next 4 -# end - -# *try* to stop at the user entry point (it might be gone due to inlining) -break main - -monitor arm semihosting enable - -# # send captured ITM to the file itm.fifo -# # (the microcontroller SWO pin must be connected to the programmer SWO pin) -# # 8000000 must match the core clock frequency -# monitor tpiu config internal itm.txt uart off 8000000 - -# # OR: make the microcontroller SWO pin output compatible with UART (8N1) -# # 8000000 must match the core clock frequency -# # 2000000 is the frequency of the SWO pin -# monitor tpiu config external uart off 8000000 2000000 - -# # enable ITM port 0 -# monitor itm port 0 on - -load - -# start the process but immediately halt the processor -stepi diff --git a/examples/stm32f4/.cargo/config.toml b/examples/stm32f4/.cargo/config.toml index f5a4af51a..16efa8e6f 100644 --- a/examples/stm32f4/.cargo/config.toml +++ b/examples/stm32f4/.cargo/config.toml @@ -1,11 +1,9 @@ [target.'cfg(all(target_arch = "arm", target_os = "none"))'] # replace STM32F429ZITx with your chip as listed in `probe-rs chip list` -# runner = "probe-rs run --chip STM32F429ZITx" -runner = "arm-none-eabi-gdb -q -x openocd.gdb" +runner = "probe-rs run --chip STM32F429ZITx" [build] -# target = "thumbv7em-none-eabi" -target = "thumbv7em-none-eabihf" # Cortex-M4F and Cortex-M7F (with FPU) +target = "thumbv7em-none-eabi" [env] DEFMT_LOG = "trace" diff --git a/examples/stm32f4/.vscode/launch.json b/examples/stm32f4/.vscode/launch.json deleted file mode 100644 index a9849e0da..000000000 --- a/examples/stm32f4/.vscode/launch.json +++ /dev/null @@ -1,33 +0,0 @@ -{ - /* - * Requires the Rust Language Server (rust-analyzer) and Cortex-Debug extensions - * https://marketplace.visualstudio.com/items?itemName=rust-lang.rust-analyzer - * https://marketplace.visualstudio.com/items?itemName=marus25.cortex-debug - */ - "version": "0.2.0", - "configurations": [ - { - /* Configuration for the STM32F446 Discovery board */ - "type": "cortex-debug", - "request": "launch", - "name": "Debug (OpenOCD)", - "servertype": "openocd", - "cwd": "${workspaceRoot}", - "preLaunchTask": "Cargo Build (debug)", - "runToEntryPoint": "main", - "executable": "./target/thumbv7em-none-eabihf/debug/pwm_input", - /* Run `cargo build --example itm` and uncomment this line to run itm example */ - // "executable": "./target/thumbv7em-none-eabihf/debug/examples/itm", - "device": "STM32F446RET6", - "configFiles": [ - "interface/stlink.cfg", - "target/stm32f4x.cfg" - ], - "postLaunchCommands": [ - "monitor arm semihosting enable" - ], - "postRestartCommands": [], - "postResetCommands": [], - } - ] -} \ No newline at end of file diff --git a/examples/stm32f4/.vscode/tasks.json b/examples/stm32f4/.vscode/tasks.json deleted file mode 100644 index de7013b12..000000000 --- a/examples/stm32f4/.vscode/tasks.json +++ /dev/null @@ -1,21 +0,0 @@ -{ - "version": "2.0.0", - "tasks": [ - { - "type": "cargo", - "command": "build", - "problemMatcher": [ - "$rustc" - ], - "args": [ - "--bin", - "pwm_input" - ], - "group": { - "kind": "build", - "isDefault": true - }, - "label": "Cargo Build (debug)", - } - ] -} \ No newline at end of file diff --git a/examples/stm32f4/Cargo.toml b/examples/stm32f4/Cargo.toml index ee7594c95..1eb1ae6db 100644 --- a/examples/stm32f4/Cargo.toml +++ b/examples/stm32f4/Cargo.toml @@ -6,7 +6,7 @@ license = "MIT OR Apache-2.0" [dependencies] # Change stm32f429zi to your chip name, if necessary. -embassy-stm32 = { version = "0.1.0", path = "../../embassy-stm32", features = ["defmt", "stm32f446re", "unstable-pac", "memory-x", "time-driver-any", "exti", "chrono"] } +embassy-stm32 = { version = "0.1.0", path = "../../embassy-stm32", features = ["defmt", "stm32f429zi", "unstable-pac", "memory-x", "time-driver-any", "exti", "chrono"] } embassy-sync = { version = "0.5.0", path = "../../embassy-sync", features = ["defmt"] } embassy-executor = { version = "0.5.0", path = "../../embassy-executor", features = ["task-arena-size-32768", "arch-cortex-m", "executor-thread", "executor-interrupt", "defmt", "integrated-timers"] } embassy-time = { version = "0.3.0", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime", "tick-hz-32_768"] } diff --git a/examples/stm32f4/openocd.cfg b/examples/stm32f4/openocd.cfg deleted file mode 100644 index e41d52b1a..000000000 --- a/examples/stm32f4/openocd.cfg +++ /dev/null @@ -1,5 +0,0 @@ -# Sample OpenOCD configuration for the STM32F3DISCOVERY development board - -source [find interface/stlink.cfg] - -source [find target/stm32f4x.cfg] diff --git a/examples/stm32f4/openocd.gdb b/examples/stm32f4/openocd.gdb deleted file mode 100644 index 7795319fb..000000000 --- a/examples/stm32f4/openocd.gdb +++ /dev/null @@ -1,40 +0,0 @@ -target extended-remote :3333 - -# print demangled symbols -set print asm-demangle on - -# set backtrace limit to not have infinite backtrace loops -set backtrace limit 32 - -# detect unhandled exceptions, hard faults and panics -break DefaultHandler -break HardFault -break rust_begin_unwind -# # run the next few lines so the panic message is printed immediately -# # the number needs to be adjusted for your panic handler -# commands $bpnum -# next 4 -# end - -# *try* to stop at the user entry point (it might be gone due to inlining) -break main - -monitor arm semihosting enable - -# # send captured ITM to the file itm.fifo -# # (the microcontroller SWO pin must be connected to the programmer SWO pin) -# # 8000000 must match the core clock frequency -# monitor tpiu config internal itm.txt uart off 8000000 - -# # OR: make the microcontroller SWO pin output compatible with UART (8N1) -# # 8000000 must match the core clock frequency -# # 2000000 is the frequency of the SWO pin -# monitor tpiu config external uart off 8000000 2000000 - -# # enable ITM port 0 -# monitor itm port 0 on - -load - -# start the process but immediately halt the processor -stepi diff --git a/rust-toolchain.toml b/rust-toolchain.toml index 2f5d17069..57185e217 100644 --- a/rust-toolchain.toml +++ b/rust-toolchain.toml @@ -1,5 +1,5 @@ [toolchain] -channel = "1.77" +channel = "1.78" components = [ "rust-src", "rustfmt", "llvm-tools" ] targets = [ "thumbv7em-none-eabi", From 61f1f80e90c3fd8ec505936f3bab0a50d2ba9b79 Mon Sep 17 00:00:00 2001 From: Bruno Bousquet <21108660+brunob45@users.noreply.github.com> Date: Wed, 29 May 2024 00:52:55 -0400 Subject: [PATCH 414/581] fix fmt --- examples/stm32f1/src/bin/pwm_input.rs | 3 ++- examples/stm32f4/src/bin/pwm_input.rs | 3 ++- 2 files changed, 4 insertions(+), 2 deletions(-) diff --git a/examples/stm32f1/src/bin/pwm_input.rs b/examples/stm32f1/src/bin/pwm_input.rs index 718bf0fcf..9ca44d048 100644 --- a/examples/stm32f1/src/bin/pwm_input.rs +++ b/examples/stm32f1/src/bin/pwm_input.rs @@ -6,7 +6,8 @@ use defmt::*; use embassy_executor::Spawner; use embassy_stm32::gpio::{Level, Output, Pull, Speed}; use embassy_stm32::time::khz; -use embassy_stm32::timer::{self, pwm_input::PwmInput}; +use embassy_stm32::timer; +use embassy_stm32::timer::pwm_input::PwmInput; use embassy_stm32::{bind_interrupts, peripherals}; use embassy_time::Timer; use {defmt_rtt as _, panic_probe as _}; diff --git a/examples/stm32f4/src/bin/pwm_input.rs b/examples/stm32f4/src/bin/pwm_input.rs index e57e58c22..98ea50df4 100644 --- a/examples/stm32f4/src/bin/pwm_input.rs +++ b/examples/stm32f4/src/bin/pwm_input.rs @@ -6,7 +6,8 @@ use defmt::*; use embassy_executor::Spawner; use embassy_stm32::gpio::{Level, Output, Pull, Speed}; use embassy_stm32::time::khz; -use embassy_stm32::timer::{self, pwm_input::PwmInput}; +use embassy_stm32::timer; +use embassy_stm32::timer::pwm_input::PwmInput; use embassy_stm32::{bind_interrupts, peripherals}; use embassy_time::Timer; use {defmt_rtt as _, panic_probe as _}; From 7f4803ddaf8f6eeeec45418f23b092bff95222d2 Mon Sep 17 00:00:00 2001 From: Bruno Bousquet <21108660+brunob45@users.noreply.github.com> Date: Wed, 29 May 2024 00:55:49 -0400 Subject: [PATCH 415/581] fix fmt again --- examples/stm32f1/src/bin/pwm_input.rs | 3 +-- examples/stm32f4/src/bin/pwm_input.rs | 3 +-- 2 files changed, 2 insertions(+), 4 deletions(-) diff --git a/examples/stm32f1/src/bin/pwm_input.rs b/examples/stm32f1/src/bin/pwm_input.rs index 9ca44d048..c051d1328 100644 --- a/examples/stm32f1/src/bin/pwm_input.rs +++ b/examples/stm32f1/src/bin/pwm_input.rs @@ -6,9 +6,8 @@ use defmt::*; use embassy_executor::Spawner; use embassy_stm32::gpio::{Level, Output, Pull, Speed}; use embassy_stm32::time::khz; -use embassy_stm32::timer; use embassy_stm32::timer::pwm_input::PwmInput; -use embassy_stm32::{bind_interrupts, peripherals}; +use embassy_stm32::{bind_interrupts, peripherals, timer}; use embassy_time::Timer; use {defmt_rtt as _, panic_probe as _}; diff --git a/examples/stm32f4/src/bin/pwm_input.rs b/examples/stm32f4/src/bin/pwm_input.rs index 98ea50df4..eb1e7cb87 100644 --- a/examples/stm32f4/src/bin/pwm_input.rs +++ b/examples/stm32f4/src/bin/pwm_input.rs @@ -6,9 +6,8 @@ use defmt::*; use embassy_executor::Spawner; use embassy_stm32::gpio::{Level, Output, Pull, Speed}; use embassy_stm32::time::khz; -use embassy_stm32::timer; use embassy_stm32::timer::pwm_input::PwmInput; -use embassy_stm32::{bind_interrupts, peripherals}; +use embassy_stm32::{bind_interrupts, peripherals, timer}; use embassy_time::Timer; use {defmt_rtt as _, panic_probe as _}; From 9031ce7fa78b899d13e4b0966e57c5684adcd6e1 Mon Sep 17 00:00:00 2001 From: Nick <10801854+valleyflowerbear@users.noreply.github.com> Date: Wed, 29 May 2024 06:29:25 +0100 Subject: [PATCH 416/581] rp: fix watchdog CTRL register getting overwritten --- embassy-rp/src/watchdog.rs | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/embassy-rp/src/watchdog.rs b/embassy-rp/src/watchdog.rs index f1e986ec7..229a306fe 100644 --- a/embassy-rp/src/watchdog.rs +++ b/embassy-rp/src/watchdog.rs @@ -46,7 +46,7 @@ impl Watchdog { /// or when JTAG is accessing bus fabric pub fn pause_on_debug(&mut self, pause: bool) { let watchdog = pac::WATCHDOG; - watchdog.ctrl().write(|w| { + watchdog.ctrl().modify(|w| { w.set_pause_dbg0(pause); w.set_pause_dbg1(pause); w.set_pause_jtag(pause); @@ -60,7 +60,7 @@ impl Watchdog { fn enable(&self, bit: bool) { let watchdog = pac::WATCHDOG; - watchdog.ctrl().write(|w| w.set_enable(bit)) + watchdog.ctrl().modify(|w| w.set_enable(bit)) } // Configure which hardware will be reset by the watchdog From 35feb1bf230a1af7fbac6dced25ed3cce727543d Mon Sep 17 00:00:00 2001 From: Corey Schuhen Date: Sun, 26 May 2024 19:54:46 +1000 Subject: [PATCH 417/581] Remove generic argument for STM32 FDCAN. --- embassy-stm32/src/can/fdcan.rs | 413 ++++++++++++++++++------------ tests/stm32/src/bin/can.rs | 8 +- tests/stm32/src/bin/can_common.rs | 9 +- tests/stm32/src/bin/fdcan.rs | 4 + 4 files changed, 258 insertions(+), 176 deletions(-) diff --git a/embassy-stm32/src/can/fdcan.rs b/embassy-stm32/src/can/fdcan.rs index 81ceb06aa..b772a3ca0 100644 --- a/embassy-stm32/src/can/fdcan.rs +++ b/embassy-stm32/src/can/fdcan.rs @@ -3,6 +3,7 @@ use core::future::poll_fn; use core::marker::PhantomData; use core::task::Poll; +use embassy_hal_internal::interrupt::InterruptExt; use embassy_hal_internal::{into_ref, PeripheralRef}; use embassy_sync::blocking_mutex::raw::CriticalSectionRawMutex; use embassy_sync::channel::{Channel, DynamicReceiver, DynamicSender}; @@ -40,7 +41,7 @@ pub struct IT0InterruptHandler { // We use IT0 for everything currently impl interrupt::typelevel::Handler for IT0InterruptHandler { unsafe fn on_interrupt() { - let regs = T::regs(); + let regs = T::registers().regs; let ir = regs.ir().read(); @@ -140,22 +141,13 @@ pub enum OperatingMode { //TestMode, } -/// FDCAN Configuration instance instance -/// Create instance of this first -pub struct CanConfigurator<'d, T: Instance> { - config: crate::can::fd::config::FdCanConfig, - /// Reference to internals. - instance: FdcanInstance<'d, T>, - properties: Properties, -} - fn calc_ns_per_timer_tick(mode: crate::can::fd::config::FrameTransmissionConfig) -> u64 { match mode { // Use timestamp from Rx FIFO to adjust timestamp reported to user crate::can::fd::config::FrameTransmissionConfig::ClassicCanOnly => { let freq = T::frequency(); - let prescale: u64 = - ({ T::regs().nbtp().read().nbrp() } + 1) as u64 * ({ T::regs().tscc().read().tcp() } + 1) as u64; + let prescale: u64 = ({ T::registers().regs.nbtp().read().nbrp() } + 1) as u64 + * ({ T::registers().regs.tscc().read().tcp() } + 1) as u64; 1_000_000_000 as u64 / (freq.0 as u64 * prescale) } // For VBR this is too hard because the FDCAN timer switches clock rate you need to configure to use @@ -164,6 +156,18 @@ fn calc_ns_per_timer_tick(mode: crate::can::fd::config::FrameTransm } } +/// FDCAN Configuration instance instance +/// Create instance of this first +pub struct CanConfigurator<'d, T: Instance> { + config: crate::can::fd::config::FdCanConfig, + info: &'static Info, + state: &'static State, + /// Reference to internals. + _instance: FdcanInstance<'d, T>, + properties: Properties, + periph_clock: crate::time::Hertz, +} + impl<'d, T: Instance> CanConfigurator<'d, T> { /// Creates a new Fdcan instance, keeping the peripheral in sleep mode. /// You must call [Fdcan::enable_non_blocking] to use the peripheral. @@ -196,16 +200,18 @@ impl<'d, T: Instance> CanConfigurator<'d, T> { T::IT1Interrupt::unpend(); // Not unsafe T::IT1Interrupt::enable(); } - Self { config, - instance: FdcanInstance(peri), - properties: Properties::new(), + info: T::info(), + state: T::state(), + _instance: FdcanInstance(peri), + properties: Properties::new(T::info()), + periph_clock: T::frequency(), } } /// Get driver properties - pub fn properties(&self) -> &Properties { + pub fn properties(&self) -> &Properties { &self.properties } @@ -221,7 +227,7 @@ impl<'d, T: Instance> CanConfigurator<'d, T> { /// Configures the bit timings calculated from supplied bitrate. pub fn set_bitrate(&mut self, bitrate: u32) { - let bit_timing = util::calc_can_timings(T::frequency(), bitrate).unwrap(); + let bit_timing = util::calc_can_timings(self.periph_clock, bitrate).unwrap(); let nbtr = crate::can::fd::config::NominalBitTiming { sync_jump_width: bit_timing.sync_jump_width, @@ -234,7 +240,7 @@ impl<'d, T: Instance> CanConfigurator<'d, T> { /// Configures the bit timings for VBR data calculated from supplied bitrate. This also sets confit to allow can FD and VBR pub fn set_fd_data_bitrate(&mut self, bitrate: u32, transceiver_delay_compensation: bool) { - let bit_timing = util::calc_can_timings(T::frequency(), bitrate).unwrap(); + let bit_timing = util::calc_can_timings(self.periph_clock, bitrate).unwrap(); // Note, used existing calcluation for normal(non-VBR) bitrate, appears to work for 250k/1M let nbtr = crate::can::fd::config::DataBitTiming { transceiver_delay_compensation, @@ -248,62 +254,68 @@ impl<'d, T: Instance> CanConfigurator<'d, T> { } /// Start in mode. - pub fn start(self, mode: OperatingMode) -> Can<'d, T> { + pub fn start(self, mode: OperatingMode) -> Can<'d> { let ns_per_timer_tick = calc_ns_per_timer_tick::(self.config.frame_transmit); - critical_section::with(|_| unsafe { - T::mut_state().ns_per_timer_tick = ns_per_timer_tick; + critical_section::with(|_| { + let state = self.state as *const State; + unsafe { + let mut_state = state as *mut State; + (*mut_state).ns_per_timer_tick = ns_per_timer_tick; + } }); T::registers().into_mode(self.config, mode); - let ret = Can { + Can { config: self.config, - instance: self.instance, + info: self.info, + state: self.state, + instance: T::info().regs.regs, _mode: mode, - properties: self.properties, - }; - ret + properties: Properties::new(T::info()), + } } /// Start, entering mode. Does same as start(mode) - pub fn into_normal_mode(self) -> Can<'d, T> { + pub fn into_normal_mode(self) -> Can<'d> { self.start(OperatingMode::NormalOperationMode) } /// Start, entering mode. Does same as start(mode) - pub fn into_internal_loopback_mode(self) -> Can<'d, T> { + pub fn into_internal_loopback_mode(self) -> Can<'d> { self.start(OperatingMode::InternalLoopbackMode) } /// Start, entering mode. Does same as start(mode) - pub fn into_external_loopback_mode(self) -> Can<'d, T> { + pub fn into_external_loopback_mode(self) -> Can<'d> { self.start(OperatingMode::ExternalLoopbackMode) } } /// FDCAN Instance -pub struct Can<'d, T: Instance> { +pub struct Can<'d> { config: crate::can::fd::config::FdCanConfig, - /// Reference to internals. - instance: FdcanInstance<'d, T>, + info: &'static Info, + state: &'static State, + instance: &'d crate::pac::can::Fdcan, _mode: OperatingMode, - properties: Properties, + properties: Properties, } -impl<'d, T: Instance> Can<'d, T> { +impl<'d> Can<'d> { /// Get driver properties - pub fn properties(&self) -> &Properties { + pub fn properties(&self) -> &Properties { &self.properties } /// Flush one of the TX mailboxes. pub async fn flush(&self, idx: usize) { poll_fn(|cx| { - T::state().tx_mode.register(cx.waker()); + self.state.tx_mode.register(cx.waker()); if idx > 3 { panic!("Bad mailbox"); } let idx = 1 << idx; - if !T::regs().txbrp().read().trp(idx) { + if !self.info.regs.regs.txbrp().read().trp(idx) { return Poll::Ready(()); } @@ -317,12 +329,12 @@ impl<'d, T: Instance> Can<'d, T> { /// can be replaced, this call asynchronously waits for a frame to be successfully /// transmitted, then tries again. pub async fn write(&mut self, frame: &Frame) -> Option { - T::state().tx_mode.write::(frame).await + self.state.tx_mode.write(self.info, frame).await } /// Returns the next received message frame pub async fn read(&mut self) -> Result { - T::state().rx_mode.read_classic::().await + self.state.rx_mode.read_classic(self.info, self.state).await } /// Queues the message to be sent but exerts backpressure. If a lower-priority @@ -330,58 +342,61 @@ impl<'d, T: Instance> Can<'d, T> { /// can be replaced, this call asynchronously waits for a frame to be successfully /// transmitted, then tries again. pub async fn write_fd(&mut self, frame: &FdFrame) -> Option { - T::state().tx_mode.write_fd::(frame).await + self.state.tx_mode.write_fd(self.info, frame).await } /// Returns the next received message frame pub async fn read_fd(&mut self) -> Result { - T::state().rx_mode.read_fd::().await + self.state.rx_mode.read_fd(self.info, self.state).await } /// Split instance into separate portions: Tx(write), Rx(read), common properties - pub fn split(self) -> (CanTx<'d, T>, CanRx<'d, T>, Properties) { + pub fn split(self) -> (CanTx<'d>, CanRx<'d>, Properties) { ( CanTx { + info: self.info, + state: self.state, config: self.config, _instance: self.instance, _mode: self._mode, }, CanRx { - _instance1: PhantomData::, - _instance2: T::regs(), + info: self.info, + state: self.state, + _instance: self.instance, _mode: self._mode, }, self.properties, ) } - /// Join split rx and tx portions back together - pub fn join(tx: CanTx<'d, T>, rx: CanRx<'d, T>) -> Self { + pub fn join(tx: CanTx<'d>, rx: CanRx<'d>) -> Self { Can { config: tx.config, - //_instance2: T::regs(), + info: tx.info, + state: tx.state, instance: tx._instance, _mode: rx._mode, - properties: Properties::new(), + properties: Properties::new(tx.info), } } /// Return a buffered instance of driver without CAN FD support. User must supply Buffers pub fn buffered( - &self, + self, tx_buf: &'static mut TxBuf, rxb: &'static mut RxBuf, - ) -> BufferedCan<'d, T, TX_BUF_SIZE, RX_BUF_SIZE> { - BufferedCan::new(PhantomData::, T::regs(), self._mode, tx_buf, rxb) + ) -> BufferedCan<'d, TX_BUF_SIZE, RX_BUF_SIZE> { + BufferedCan::new(self.info, self.state, self.info.regs.regs, self._mode, tx_buf, rxb) } /// Return a buffered instance of driver with CAN FD support. User must supply Buffers pub fn buffered_fd( - &self, + self, tx_buf: &'static mut TxFdBuf, rxb: &'static mut RxFdBuf, - ) -> BufferedCanFd<'d, T, TX_BUF_SIZE, RX_BUF_SIZE> { - BufferedCanFd::new(PhantomData::, T::regs(), self._mode, tx_buf, rxb) + ) -> BufferedCanFd<'d, TX_BUF_SIZE, RX_BUF_SIZE> { + BufferedCanFd::new(self.info, self.state, self.info.regs.regs, self._mode, tx_buf, rxb) } } @@ -392,52 +407,57 @@ pub type RxBuf = Channel = Channel; /// Buffered FDCAN Instance -pub struct BufferedCan<'d, T: Instance, const TX_BUF_SIZE: usize, const RX_BUF_SIZE: usize> { - _instance1: PhantomData, - _instance2: &'d crate::pac::can::Fdcan, +pub struct BufferedCan<'d, const TX_BUF_SIZE: usize, const RX_BUF_SIZE: usize> { + info: &'static Info, + state: &'static State, + _instance: &'d crate::pac::can::Fdcan, _mode: OperatingMode, tx_buf: &'static TxBuf, rx_buf: &'static RxBuf, - properties: Properties, + properties: Properties, } -impl<'c, 'd, T: Instance, const TX_BUF_SIZE: usize, const RX_BUF_SIZE: usize> - BufferedCan<'d, T, TX_BUF_SIZE, RX_BUF_SIZE> -{ +impl<'c, 'd, const TX_BUF_SIZE: usize, const RX_BUF_SIZE: usize> BufferedCan<'d, TX_BUF_SIZE, RX_BUF_SIZE> { fn new( - _instance1: PhantomData, - _instance2: &'d crate::pac::can::Fdcan, + info: &'static Info, + state: &'static State, + _instance: &'d crate::pac::can::Fdcan, _mode: OperatingMode, tx_buf: &'static TxBuf, rx_buf: &'static RxBuf, ) -> Self { BufferedCan { - _instance1, - _instance2, + info, + state, + _instance, _mode, tx_buf, rx_buf, - properties: Properties::new(), + properties: Properties::new(info), } .setup() } /// Get driver properties - pub fn properties(&self) -> &Properties { + pub fn properties(&self) -> &Properties { &self.properties } fn setup(self) -> Self { // We don't want interrupts being processed while we change modes. - critical_section::with(|_| unsafe { + critical_section::with(|_| { let rx_inner = super::common::ClassicBufferedRxInner { rx_sender: self.rx_buf.sender().into(), }; let tx_inner = super::common::ClassicBufferedTxInner { tx_receiver: self.tx_buf.receiver().into(), }; - T::mut_state().rx_mode = RxMode::ClassicBuffered(rx_inner); - T::mut_state().tx_mode = TxMode::ClassicBuffered(tx_inner); + let state = self.state as *const State; + unsafe { + let mut_state = state as *mut State; + (*mut_state).rx_mode = RxMode::ClassicBuffered(rx_inner); + (*mut_state).tx_mode = TxMode::ClassicBuffered(tx_inner); + } }); self } @@ -445,7 +465,8 @@ impl<'c, 'd, T: Instance, const TX_BUF_SIZE: usize, const RX_BUF_SIZE: usize> /// Async write frame to TX buffer. pub async fn write(&mut self, frame: Frame) { self.tx_buf.send(frame).await; - T::IT0Interrupt::pend(); // Wake for Tx + self.info.interrupt0.pend(); // Wake for Tx + //T::IT0Interrupt::pend(); // Wake for Tx } /// Async read frame from RX buffer. @@ -457,7 +478,7 @@ impl<'c, 'd, T: Instance, const TX_BUF_SIZE: usize, const RX_BUF_SIZE: usize> pub fn writer(&self) -> BufferedCanSender { BufferedCanSender { tx_buf: self.tx_buf.sender().into(), - waker: T::IT0Interrupt::pend, + waker: self.info.tx_waker, } } @@ -467,13 +488,15 @@ impl<'c, 'd, T: Instance, const TX_BUF_SIZE: usize, const RX_BUF_SIZE: usize> } } -impl<'c, 'd, T: Instance, const TX_BUF_SIZE: usize, const RX_BUF_SIZE: usize> Drop - for BufferedCan<'d, T, TX_BUF_SIZE, RX_BUF_SIZE> -{ +impl<'c, 'd, const TX_BUF_SIZE: usize, const RX_BUF_SIZE: usize> Drop for BufferedCan<'d, TX_BUF_SIZE, RX_BUF_SIZE> { fn drop(&mut self) { - critical_section::with(|_| unsafe { - T::mut_state().rx_mode = RxMode::NonBuffered(embassy_sync::waitqueue::AtomicWaker::new()); - T::mut_state().tx_mode = TxMode::NonBuffered(embassy_sync::waitqueue::AtomicWaker::new()); + critical_section::with(|_| { + let state = self.state as *const State; + unsafe { + let mut_state = state as *mut State; + (*mut_state).rx_mode = RxMode::NonBuffered(embassy_sync::waitqueue::AtomicWaker::new()); + (*mut_state).tx_mode = TxMode::NonBuffered(embassy_sync::waitqueue::AtomicWaker::new()); + } }); } } @@ -484,16 +507,6 @@ pub type RxFdBuf = Channel = Channel; -/// Buffered FDCAN Instance -pub struct BufferedCanFd<'d, T: Instance, const TX_BUF_SIZE: usize, const RX_BUF_SIZE: usize> { - _instance1: PhantomData, - _instance2: &'d crate::pac::can::Fdcan, - _mode: OperatingMode, - tx_buf: &'static TxFdBuf, - rx_buf: &'static RxFdBuf, - properties: Properties, -} - /// Sender that can be used for sending CAN frames. #[derive(Copy, Clone)] pub struct BufferedFdCanSender { @@ -524,43 +537,58 @@ impl BufferedFdCanSender { /// Receiver that can be used for receiving CAN frames. Note, each CAN frame will only be received by one receiver. pub type BufferedFdCanReceiver = DynamicReceiver<'static, Result>; -impl<'c, 'd, T: Instance, const TX_BUF_SIZE: usize, const RX_BUF_SIZE: usize> - BufferedCanFd<'d, T, TX_BUF_SIZE, RX_BUF_SIZE> -{ +/// Buffered FDCAN Instance +pub struct BufferedCanFd<'d, const TX_BUF_SIZE: usize, const RX_BUF_SIZE: usize> { + info: &'static Info, + state: &'static State, + _instance: &'d crate::pac::can::Fdcan, + _mode: OperatingMode, + tx_buf: &'static TxFdBuf, + rx_buf: &'static RxFdBuf, + properties: Properties, +} + +impl<'c, 'd, const TX_BUF_SIZE: usize, const RX_BUF_SIZE: usize> BufferedCanFd<'d, TX_BUF_SIZE, RX_BUF_SIZE> { fn new( - _instance1: PhantomData, - _instance2: &'d crate::pac::can::Fdcan, + info: &'static Info, + state: &'static State, + _instance: &'d crate::pac::can::Fdcan, _mode: OperatingMode, tx_buf: &'static TxFdBuf, rx_buf: &'static RxFdBuf, ) -> Self { BufferedCanFd { - _instance1, - _instance2, + info, + state, + _instance, _mode, tx_buf, rx_buf, - properties: Properties::new(), + properties: Properties::new(info), } .setup() } /// Get driver properties - pub fn properties(&self) -> &Properties { + pub fn properties(&self) -> &Properties { &self.properties } fn setup(self) -> Self { // We don't want interrupts being processed while we change modes. - critical_section::with(|_| unsafe { + critical_section::with(|_| { let rx_inner = super::common::FdBufferedRxInner { rx_sender: self.rx_buf.sender().into(), }; let tx_inner = super::common::FdBufferedTxInner { tx_receiver: self.tx_buf.receiver().into(), }; - T::mut_state().rx_mode = RxMode::FdBuffered(rx_inner); - T::mut_state().tx_mode = TxMode::FdBuffered(tx_inner); + let state = self.state as *const State; + unsafe { + let mut_state = state as *mut State; + (*mut_state).rx_mode = RxMode::FdBuffered(rx_inner); + (*mut_state).tx_mode = TxMode::FdBuffered(tx_inner); + } }); self } @@ -568,7 +596,8 @@ impl<'c, 'd, T: Instance, const TX_BUF_SIZE: usize, const RX_BUF_SIZE: usize> /// Async write frame to TX buffer. pub async fn write(&mut self, frame: FdFrame) { self.tx_buf.send(frame).await; - T::IT0Interrupt::pend(); // Wake for Tx + self.info.interrupt0.pend(); // Wake for Tx + //T::IT0Interrupt::pend(); // Wake for Tx } /// Async read frame from RX buffer. @@ -580,7 +609,7 @@ impl<'c, 'd, T: Instance, const TX_BUF_SIZE: usize, const RX_BUF_SIZE: usize> pub fn writer(&self) -> BufferedFdCanSender { BufferedFdCanSender { tx_buf: self.tx_buf.sender().into(), - waker: T::IT0Interrupt::pend, + waker: self.info.tx_waker, } } @@ -590,38 +619,55 @@ impl<'c, 'd, T: Instance, const TX_BUF_SIZE: usize, const RX_BUF_SIZE: usize> } } -impl<'c, 'd, T: Instance, const TX_BUF_SIZE: usize, const RX_BUF_SIZE: usize> Drop - for BufferedCanFd<'d, T, TX_BUF_SIZE, RX_BUF_SIZE> -{ +impl<'c, 'd, const TX_BUF_SIZE: usize, const RX_BUF_SIZE: usize> Drop for BufferedCanFd<'d, TX_BUF_SIZE, RX_BUF_SIZE> { fn drop(&mut self) { - critical_section::with(|_| unsafe { - T::mut_state().rx_mode = RxMode::NonBuffered(embassy_sync::waitqueue::AtomicWaker::new()); - T::mut_state().tx_mode = TxMode::NonBuffered(embassy_sync::waitqueue::AtomicWaker::new()); + critical_section::with(|_| { + let state = self.state as *const State; + unsafe { + let mut_state = state as *mut State; + (*mut_state).rx_mode = RxMode::NonBuffered(embassy_sync::waitqueue::AtomicWaker::new()); + (*mut_state).tx_mode = TxMode::NonBuffered(embassy_sync::waitqueue::AtomicWaker::new()); + } }); } } /// FDCAN Rx only Instance -pub struct CanRx<'d, T: Instance> { - _instance1: PhantomData, - _instance2: &'d crate::pac::can::Fdcan, +pub struct CanRx<'d> { + info: &'static Info, + state: &'static State, + _instance: &'d crate::pac::can::Fdcan, _mode: OperatingMode, } +impl<'d> CanRx<'d> { + /// Returns the next received message frame + pub async fn read(&mut self) -> Result { + self.state.rx_mode.read_classic(&self.info, &self.state).await + } + + /// Returns the next received message frame + pub async fn read_fd(&mut self) -> Result { + self.state.rx_mode.read_fd(&self.info, &self.state).await + } +} + /// FDCAN Tx only Instance -pub struct CanTx<'d, T: Instance> { +pub struct CanTx<'d> { + info: &'static Info, + state: &'static State, config: crate::can::fd::config::FdCanConfig, - _instance: FdcanInstance<'d, T>, //(PeripheralRef<'a, T>); + _instance: &'d crate::pac::can::Fdcan, _mode: OperatingMode, } -impl<'c, 'd, T: Instance> CanTx<'d, T> { +impl<'c, 'd> CanTx<'d> { /// Queues the message to be sent but exerts backpressure. If a lower-priority /// frame is dropped from the mailbox, it is returned. If no lower-priority frames /// can be replaced, this call asynchronously waits for a frame to be successfully /// transmitted, then tries again. pub async fn write(&mut self, frame: &Frame) -> Option { - T::state().tx_mode.write::(frame).await + self.state.tx_mode.write(self.info, frame).await } /// Queues the message to be sent but exerts backpressure. If a lower-priority @@ -629,19 +675,7 @@ impl<'c, 'd, T: Instance> CanTx<'d, T> { /// can be replaced, this call asynchronously waits for a frame to be successfully /// transmitted, then tries again. pub async fn write_fd(&mut self, frame: &FdFrame) -> Option { - T::state().tx_mode.write_fd::(frame).await - } -} - -impl<'c, 'd, T: Instance> CanRx<'d, T> { - /// Returns the next received message frame - pub async fn read(&mut self) -> Result { - T::state().rx_mode.read_classic::().await - } - - /// Returns the next received message frame - pub async fn read_fd(&mut self) -> Result { - T::state().rx_mode.read_fd::().await + self.state.tx_mode.write_fd(self.info, frame).await } } @@ -662,7 +696,7 @@ impl RxMode { } fn on_interrupt(&self, fifonr: usize) { - T::regs().ir().write(|w| w.set_rfn(fifonr, true)); + T::registers().regs.ir().write(|w| w.set_rfn(fifonr, true)); match self { RxMode::NonBuffered(waker) => { waker.wake(); @@ -696,7 +730,6 @@ impl RxMode { } } - //async fn read_classic(&self) -> Result { fn try_read_fd(&self) -> Option> { if let Some((frame, ts)) = T::registers().read(0) { let ts = T::calc_timestamp(T::state().ns_per_timer_tick, ts); @@ -712,14 +745,18 @@ impl RxMode { } } - fn read(&self) -> Option> { - if let Some((msg, ts)) = T::registers().read(0) { - let ts = T::calc_timestamp(T::state().ns_per_timer_tick, ts); + fn read( + &self, + info: &'static Info, + state: &'static State, + ) -> Option> { + if let Some((msg, ts)) = info.regs.read(0) { + let ts = info.calc_timestamp(state.ns_per_timer_tick, ts); Some(Ok((msg, ts))) - } else if let Some((msg, ts)) = T::registers().read(1) { - let ts = T::calc_timestamp(T::state().ns_per_timer_tick, ts); + } else if let Some((msg, ts)) = info.regs.read(1) { + let ts = info.calc_timestamp(state.ns_per_timer_tick, ts); Some(Ok((msg, ts))) - } else if let Some(err) = T::registers().curr_error() { + } else if let Some(err) = info.regs.curr_error() { // TODO: this is probably wrong Some(Err(err)) } else { @@ -727,11 +764,16 @@ impl RxMode { } } - async fn read_async(&self) -> Result<(F, Timestamp), BusError> { - poll_fn(|cx| { - T::state().err_waker.register(cx.waker()); + async fn read_async( + &self, + info: &'static Info, + state: &'static State, + ) -> Result<(F, Timestamp), BusError> { + //let _ = self.read::(info, state); + poll_fn(move |cx| { + state.err_waker.register(cx.waker()); self.register(cx.waker()); - match self.read::() { + match self.read::<_>(info, state) { Some(result) => Poll::Ready(result), None => Poll::Pending, } @@ -739,15 +781,15 @@ impl RxMode { .await } - async fn read_classic(&self) -> Result { - match self.read_async::().await { + async fn read_classic(&self, info: &'static Info, state: &'static State) -> Result { + match self.read_async::<_>(info, state).await { Ok((frame, ts)) => Ok(Envelope { ts, frame }), Err(e) => Err(e), } } - async fn read_fd(&self) -> Result { - match self.read_async::().await { + async fn read_fd(&self, info: &'static Info, state: &'static State) -> Result { + match self.read_async::<_>(info, state).await { Ok((frame, ts)) => Ok(FdEnvelope { ts, frame }), Err(e) => Err(e), } @@ -776,11 +818,11 @@ impl TxMode { /// frame is dropped from the mailbox, it is returned. If no lower-priority frames /// can be replaced, this call asynchronously waits for a frame to be successfully /// transmitted, then tries again. - async fn write_generic(&self, frame: &F) -> Option { + async fn write_generic(&self, info: &'static Info, frame: &F) -> Option { poll_fn(|cx| { self.register(cx.waker()); - if let Ok(dropped) = T::registers().write(frame) { + if let Ok(dropped) = info.regs.write(frame) { return Poll::Ready(dropped); } @@ -795,68 +837,70 @@ impl TxMode { /// frame is dropped from the mailbox, it is returned. If no lower-priority frames /// can be replaced, this call asynchronously waits for a frame to be successfully /// transmitted, then tries again. - async fn write(&self, frame: &Frame) -> Option { - self.write_generic::(frame).await + async fn write(&self, info: &'static Info, frame: &Frame) -> Option { + self.write_generic::<_>(info, frame).await } /// Queues the message to be sent but exerts backpressure. If a lower-priority /// frame is dropped from the mailbox, it is returned. If no lower-priority frames /// can be replaced, this call asynchronously waits for a frame to be successfully /// transmitted, then tries again. - async fn write_fd(&self, frame: &FdFrame) -> Option { - self.write_generic::(frame).await + async fn write_fd(&self, info: &'static Info, frame: &FdFrame) -> Option { + self.write_generic::<_>(info, frame).await } } /// Common driver properties, including filters and error counters -pub struct Properties { +pub struct Properties { + info: &'static Info, // phantom pointer to ensure !Sync - instance: PhantomData<*const T>, + //instance: PhantomData<*const T>, } -impl Properties { - fn new() -> Self { +impl Properties { + fn new(info: &'static Info) -> Self { Self { - instance: Default::default(), + info, + //instance: Default::default(), } } /// Set a standard address CAN filter in the specified slot in FDCAN memory. #[inline] pub fn set_standard_filter(&self, slot: StandardFilterSlot, filter: StandardFilter) { - T::registers().msg_ram_mut().filters.flssa[slot as usize].activate(filter); + self.info.regs.msg_ram_mut().filters.flssa[slot as usize].activate(filter); } /// Set the full array of standard address CAN filters in FDCAN memory. /// Overwrites all standard address filters in memory. pub fn set_standard_filters(&self, filters: &[StandardFilter; STANDARD_FILTER_MAX as usize]) { for (i, f) in filters.iter().enumerate() { - T::registers().msg_ram_mut().filters.flssa[i].activate(*f); + self.info.regs.msg_ram_mut().filters.flssa[i].activate(*f); } } /// Set an extended address CAN filter in the specified slot in FDCAN memory. #[inline] pub fn set_extended_filter(&self, slot: ExtendedFilterSlot, filter: ExtendedFilter) { - T::registers().msg_ram_mut().filters.flesa[slot as usize].activate(filter); + self.info.regs.msg_ram_mut().filters.flesa[slot as usize].activate(filter); } /// Set the full array of extended address CAN filters in FDCAN memory. /// Overwrites all extended address filters in memory. pub fn set_extended_filters(&self, filters: &[ExtendedFilter; EXTENDED_FILTER_MAX as usize]) { for (i, f) in filters.iter().enumerate() { - T::registers().msg_ram_mut().filters.flesa[i].activate(*f); + self.info.regs.msg_ram_mut().filters.flesa[i].activate(*f); } } /// Get the CAN RX error counter pub fn rx_error_count(&self) -> u8 { - T::regs().ecr().read().rec() + self.info.regs.regs.ecr().read().rec() } /// Get the CAN TX error counter pub fn tx_error_count(&self) -> u8 { - T::regs().ecr().read().tec() + self.info.regs.regs.ecr().read().tec() } /// Get the current bus error mode @@ -864,7 +908,7 @@ impl Properties { // This read will clear LEC and DLEC. This is not ideal, but protocol // error reporting in this driver should have a big ol' FIXME on it // anyway! - let psr = T::regs().psr().read(); + let psr = self.info.regs.regs.psr().read(); match (psr.bo(), psr.ep()) { (false, false) => BusErrorMode::ErrorActive, (false, true) => BusErrorMode::ErrorPassive, @@ -892,10 +936,37 @@ impl State { } } +struct Info { + regs: Registers, + interrupt0: crate::interrupt::Interrupt, + _interrupt1: crate::interrupt::Interrupt, + tx_waker: fn(), +} + +impl Info { + #[cfg(feature = "time")] + fn calc_timestamp(&self, ns_per_timer_tick: u64, ts_val: u16) -> Timestamp { + let now_embassy = embassy_time::Instant::now(); + if ns_per_timer_tick == 0 { + return now_embassy; + } + let cantime = { self.regs.regs.tscv().read().tsc() }; + let delta = cantime.overflowing_sub(ts_val).0 as u64; + let ns = ns_per_timer_tick * delta as u64; + now_embassy - embassy_time::Duration::from_nanos(ns) + } + + #[cfg(not(feature = "time"))] + fn calc_timestamp(&self, _ns_per_timer_tick: u64, ts_val: u16) -> Timestamp { + ts_val + } +} + trait SealedInstance { const MSG_RAM_OFFSET: usize; - fn regs() -> &'static crate::pac::can::Fdcan; + fn info() -> &'static Info; + //fn regs() -> &'static crate::pac::can::Fdcan; fn registers() -> crate::can::fd::peripheral::Registers; fn state() -> &'static State; unsafe fn mut_state() -> &'static mut State; @@ -915,12 +986,20 @@ pub trait Instance: SealedInstance + RccPeripheral + 'static { pub struct FdcanInstance<'a, T>(PeripheralRef<'a, T>); macro_rules! impl_fdcan { - ($inst:ident, $msg_ram_inst:ident, $msg_ram_offset:literal) => { + ($inst:ident, + //$irq0:ident, $irq1:ident, + $msg_ram_inst:ident, $msg_ram_offset:literal) => { impl SealedInstance for peripherals::$inst { const MSG_RAM_OFFSET: usize = $msg_ram_offset; - fn regs() -> &'static crate::pac::can::Fdcan { - &crate::pac::$inst + fn info() -> &'static Info { + static INFO: Info = Info { + regs: Registers{regs: &crate::pac::$inst, msgram: &crate::pac::$msg_ram_inst, msg_ram_offset: $msg_ram_offset}, + interrupt0: crate::_generated::peripheral_interrupts::$inst::IT0::IRQ, + _interrupt1: crate::_generated::peripheral_interrupts::$inst::IT1::IRQ, + tx_waker: crate::_generated::peripheral_interrupts::$inst::IT0::pend, + }; + &INFO } fn registers() -> Registers { Registers{regs: &crate::pac::$inst, msgram: &crate::pac::$msg_ram_inst, msg_ram_offset: Self::MSG_RAM_OFFSET} @@ -939,7 +1018,7 @@ macro_rules! impl_fdcan { if ns_per_timer_tick == 0 { return now_embassy; } - let cantime = { Self::regs().tscv().read().tsc() }; + let cantime = { Self::registers().regs.tscv().read().tsc() }; let delta = cantime.overflowing_sub(ts_val).0 as u64; let ns = ns_per_timer_tick * delta as u64; now_embassy - embassy_time::Duration::from_nanos(ns) diff --git a/tests/stm32/src/bin/can.rs b/tests/stm32/src/bin/can.rs index 551764458..004b1a729 100644 --- a/tests/stm32/src/bin/can.rs +++ b/tests/stm32/src/bin/can.rs @@ -9,9 +9,7 @@ use common::*; use embassy_executor::Spawner; use embassy_stm32::bind_interrupts; use embassy_stm32::can::filter::Mask32; -use embassy_stm32::can::{ - Can, Fifo, Rx0InterruptHandler, Rx1InterruptHandler, SceInterruptHandler, TxInterruptHandler, -}; +use embassy_stm32::can::{Fifo, Rx0InterruptHandler, Rx1InterruptHandler, SceInterruptHandler, TxInterruptHandler}; use embassy_stm32::gpio::{Input, Pull}; use embassy_stm32::peripherals::CAN1; use embassy_time::Duration; @@ -20,6 +18,10 @@ use {defmt_rtt as _, panic_probe as _}; mod can_common; use can_common::*; +type Can<'d> = embassy_stm32::can::Can<'d, embassy_stm32::peripherals::CAN1>; +type CanTx<'d> = embassy_stm32::can::CanTx<'d, embassy_stm32::peripherals::CAN1>; +type CanRx<'d> = embassy_stm32::can::CanRx<'d, embassy_stm32::peripherals::CAN1>; + bind_interrupts!(struct Irqs { CAN1_RX0 => Rx0InterruptHandler; CAN1_RX1 => Rx1InterruptHandler; diff --git a/tests/stm32/src/bin/can_common.rs b/tests/stm32/src/bin/can_common.rs index 4b39269cc..fbfbcdc21 100644 --- a/tests/stm32/src/bin/can_common.rs +++ b/tests/stm32/src/bin/can_common.rs @@ -8,7 +8,8 @@ pub struct TestOptions { pub max_buffered: u8, } -pub async fn run_can_tests<'d, T: can::Instance>(can: &mut can::Can<'d, T>, options: &TestOptions) { +pub async fn run_can_tests<'d>(can: &mut crate::Can<'d>, options: &TestOptions) { + //pub async fn run_can_tests<'d, T: can::Instance>(can: &mut can::Can<'d, T>, options: &TestOptions) { let mut i: u8 = 0; loop { //let tx_frame = can::frame::Frame::new_standard(0x123, &[i, 0x12 as u8, 0x34 as u8, 0x56 as u8, 0x78 as u8, 0x9A as u8, 0xBC as u8 ]).unwrap(); @@ -79,11 +80,7 @@ pub async fn run_can_tests<'d, T: can::Instance>(can: &mut can::Can<'d, T>, opti } } -pub async fn run_split_can_tests<'d, T: can::Instance>( - tx: &mut can::CanTx<'d, T>, - rx: &mut can::CanRx<'d, T>, - options: &TestOptions, -) { +pub async fn run_split_can_tests<'d>(tx: &mut crate::CanTx<'d>, rx: &mut crate::CanRx<'d>, options: &TestOptions) { for i in 0..options.max_buffered { // Try filling up the RX FIFO0 buffers //let tx_frame = if 0 != (i & 0x01) { diff --git a/tests/stm32/src/bin/fdcan.rs b/tests/stm32/src/bin/fdcan.rs index 20bd3f7e3..8534f92e8 100644 --- a/tests/stm32/src/bin/fdcan.rs +++ b/tests/stm32/src/bin/fdcan.rs @@ -15,6 +15,10 @@ use {defmt_rtt as _, panic_probe as _}; mod can_common; use can_common::*; +type Can<'d> = can::Can<'d>; +type CanTx<'d> = can::CanTx<'d>; +type CanRx<'d> = can::CanRx<'d>; + bind_interrupts!(struct Irqs2 { FDCAN2_IT0 => can::IT0InterruptHandler; FDCAN2_IT1 => can::IT1InterruptHandler; From cf0d227cca92a80e85575154d380d1ff73fb32cf Mon Sep 17 00:00:00 2001 From: Ulf Lilleengen Date: Wed, 29 May 2024 12:09:55 +0200 Subject: [PATCH 418/581] Prepare for embassy-sync 0.6.0 release --- cyw43/Cargo.toml | 2 +- embassy-boot-nrf/Cargo.toml | 2 +- embassy-boot-rp/Cargo.toml | 2 +- embassy-boot-stm32/Cargo.toml | 2 +- embassy-boot/Cargo.toml | 2 +- embassy-embedded-hal/Cargo.toml | 2 +- embassy-net-driver-channel/Cargo.toml | 2 +- embassy-net-esp-hosted/Cargo.toml | 2 +- embassy-net-ppp/Cargo.toml | 2 +- embassy-net/Cargo.toml | 2 +- embassy-nrf/Cargo.toml | 2 +- embassy-rp/Cargo.toml | 2 +- embassy-stm32-wpan/Cargo.toml | 2 +- embassy-stm32/Cargo.toml | 2 +- embassy-sync/CHANGELOG.md | 2 ++ embassy-sync/Cargo.toml | 2 +- embassy-usb-dfu/Cargo.toml | 2 +- embassy-usb-logger/Cargo.toml | 2 +- embassy-usb-synopsys-otg/Cargo.toml | 2 +- embassy-usb/Cargo.toml | 2 +- examples/boot/application/nrf/Cargo.toml | 2 +- examples/boot/application/rp/Cargo.toml | 2 +- examples/boot/application/stm32f3/Cargo.toml | 2 +- examples/boot/application/stm32f7/Cargo.toml | 2 +- examples/boot/application/stm32h7/Cargo.toml | 2 +- examples/boot/application/stm32l0/Cargo.toml | 2 +- examples/boot/application/stm32l1/Cargo.toml | 2 +- examples/boot/application/stm32l4/Cargo.toml | 2 +- examples/boot/application/stm32wb-dfu/Cargo.toml | 2 +- examples/boot/application/stm32wl/Cargo.toml | 2 +- examples/boot/bootloader/nrf/Cargo.toml | 2 +- examples/boot/bootloader/rp/Cargo.toml | 2 +- examples/boot/bootloader/stm32-dual-bank/Cargo.toml | 2 +- examples/boot/bootloader/stm32/Cargo.toml | 2 +- examples/boot/bootloader/stm32wb-dfu/Cargo.toml | 2 +- examples/nrf-rtos-trace/Cargo.toml | 2 +- examples/nrf52810/Cargo.toml | 2 +- examples/nrf52840-rtic/Cargo.toml | 2 +- examples/nrf52840/Cargo.toml | 2 +- examples/nrf5340/Cargo.toml | 2 +- examples/rp/Cargo.toml | 2 +- examples/std/Cargo.toml | 2 +- examples/stm32c0/Cargo.toml | 2 +- examples/stm32f0/Cargo.toml | 2 +- examples/stm32f1/Cargo.toml | 2 +- examples/stm32f2/Cargo.toml | 2 +- examples/stm32f3/Cargo.toml | 2 +- examples/stm32f334/Cargo.toml | 2 +- examples/stm32f4/Cargo.toml | 2 +- examples/stm32f7/Cargo.toml | 2 +- examples/stm32g0/Cargo.toml | 2 +- examples/stm32g4/Cargo.toml | 2 +- examples/stm32h5/Cargo.toml | 2 +- examples/stm32h7/Cargo.toml | 2 +- examples/stm32h7rs/Cargo.toml | 2 +- examples/stm32l0/Cargo.toml | 2 +- examples/stm32l1/Cargo.toml | 2 +- examples/stm32l4/Cargo.toml | 2 +- examples/stm32l5/Cargo.toml | 2 +- examples/stm32u0/Cargo.toml | 2 +- examples/stm32u5/Cargo.toml | 2 +- examples/stm32wb/Cargo.toml | 2 +- examples/stm32wba/Cargo.toml | 2 +- examples/stm32wl/Cargo.toml | 2 +- examples/wasm/Cargo.toml | 2 +- tests/nrf51422/Cargo.toml | 2 +- tests/nrf52840/Cargo.toml | 2 +- tests/riscv32/Cargo.toml | 2 +- tests/rp/Cargo.toml | 2 +- tests/stm32/Cargo.toml | 2 +- 70 files changed, 71 insertions(+), 69 deletions(-) diff --git a/cyw43/Cargo.toml b/cyw43/Cargo.toml index f279739e4..7d060c9c8 100644 --- a/cyw43/Cargo.toml +++ b/cyw43/Cargo.toml @@ -18,7 +18,7 @@ firmware-logs = [] [dependencies] embassy-time = { version = "0.3.0", path = "../embassy-time"} -embassy-sync = { version = "0.5.0", path = "../embassy-sync"} +embassy-sync = { version = "0.6.0", path = "../embassy-sync"} embassy-futures = { version = "0.1.0", path = "../embassy-futures"} embassy-net-driver-channel = { version = "0.2.0", path = "../embassy-net-driver-channel"} diff --git a/embassy-boot-nrf/Cargo.toml b/embassy-boot-nrf/Cargo.toml index c056dc66a..e6bb27043 100644 --- a/embassy-boot-nrf/Cargo.toml +++ b/embassy-boot-nrf/Cargo.toml @@ -23,7 +23,7 @@ target = "thumbv7em-none-eabi" [dependencies] defmt = { version = "0.3", optional = true } -embassy-sync = { version = "0.5.0", path = "../embassy-sync" } +embassy-sync = { version = "0.6.0", path = "../embassy-sync" } embassy-nrf = { version = "0.1.0", path = "../embassy-nrf", default-features = false } embassy-boot = { version = "0.2.0", path = "../embassy-boot" } cortex-m = { version = "0.7.6" } diff --git a/embassy-boot-rp/Cargo.toml b/embassy-boot-rp/Cargo.toml index 305bc5995..0bd8abf4c 100644 --- a/embassy-boot-rp/Cargo.toml +++ b/embassy-boot-rp/Cargo.toml @@ -24,7 +24,7 @@ defmt = { version = "0.3", optional = true } defmt-rtt = { version = "0.4", optional = true } log = { version = "0.4", optional = true } -embassy-sync = { version = "0.5.0", path = "../embassy-sync" } +embassy-sync = { version = "0.6.0", path = "../embassy-sync" } embassy-rp = { version = "0.1.0", path = "../embassy-rp", default-features = false } embassy-boot = { version = "0.2.0", path = "../embassy-boot" } embassy-time = { version = "0.3.0", path = "../embassy-time" } diff --git a/embassy-boot-stm32/Cargo.toml b/embassy-boot-stm32/Cargo.toml index 6f8fbe355..a3661f6cb 100644 --- a/embassy-boot-stm32/Cargo.toml +++ b/embassy-boot-stm32/Cargo.toml @@ -25,7 +25,7 @@ defmt = { version = "0.3", optional = true } defmt-rtt = { version = "0.4", optional = true } log = { version = "0.4", optional = true } -embassy-sync = { version = "0.5.0", path = "../embassy-sync" } +embassy-sync = { version = "0.6.0", path = "../embassy-sync" } embassy-stm32 = { version = "0.1.0", path = "../embassy-stm32", default-features = false } embassy-boot = { version = "0.2.0", path = "../embassy-boot" } cortex-m = { version = "0.7.6" } diff --git a/embassy-boot/Cargo.toml b/embassy-boot/Cargo.toml index 242caa229..16dc52bcc 100644 --- a/embassy-boot/Cargo.toml +++ b/embassy-boot/Cargo.toml @@ -29,7 +29,7 @@ digest = "0.10" log = { version = "0.4", optional = true } ed25519-dalek = { version = "2", default_features = false, features = ["digest"], optional = true } embassy-embedded-hal = { version = "0.1.0", path = "../embassy-embedded-hal" } -embassy-sync = { version = "0.5.0", path = "../embassy-sync" } +embassy-sync = { version = "0.6.0", path = "../embassy-sync" } embedded-storage = "0.3.1" embedded-storage-async = { version = "0.4.1" } salty = { version = "0.3", optional = true } diff --git a/embassy-embedded-hal/Cargo.toml b/embassy-embedded-hal/Cargo.toml index e89179740..1602e802c 100644 --- a/embassy-embedded-hal/Cargo.toml +++ b/embassy-embedded-hal/Cargo.toml @@ -28,7 +28,7 @@ default = ["time"] [dependencies] embassy-futures = { version = "0.1.0", path = "../embassy-futures" } -embassy-sync = { version = "0.5.0", path = "../embassy-sync" } +embassy-sync = { version = "0.6.0", path = "../embassy-sync" } embassy-time = { version = "0.3.0", path = "../embassy-time", optional = true } embedded-hal-02 = { package = "embedded-hal", version = "0.2.6", features = [ "unproven", diff --git a/embassy-net-driver-channel/Cargo.toml b/embassy-net-driver-channel/Cargo.toml index c1ad11482..3bd7d288a 100644 --- a/embassy-net-driver-channel/Cargo.toml +++ b/embassy-net-driver-channel/Cargo.toml @@ -25,6 +25,6 @@ features = ["defmt"] defmt = { version = "0.3", optional = true } log = { version = "0.4.14", optional = true } -embassy-sync = { version = "0.5.0", path = "../embassy-sync" } +embassy-sync = { version = "0.6.0", path = "../embassy-sync" } embassy-futures = { version = "0.1.0", path = "../embassy-futures" } embassy-net-driver = { version = "0.2.0", path = "../embassy-net-driver" } diff --git a/embassy-net-esp-hosted/Cargo.toml b/embassy-net-esp-hosted/Cargo.toml index 96f6c8b00..337c749b6 100644 --- a/embassy-net-esp-hosted/Cargo.toml +++ b/embassy-net-esp-hosted/Cargo.toml @@ -18,7 +18,7 @@ defmt = { version = "0.3", optional = true } log = { version = "0.4.14", optional = true } embassy-time = { version = "0.3.0", path = "../embassy-time" } -embassy-sync = { version = "0.5.0", path = "../embassy-sync"} +embassy-sync = { version = "0.6.0", path = "../embassy-sync"} embassy-futures = { version = "0.1.0", path = "../embassy-futures"} embassy-net-driver-channel = { version = "0.2.0", path = "../embassy-net-driver-channel"} diff --git a/embassy-net-ppp/Cargo.toml b/embassy-net-ppp/Cargo.toml index c4bea202f..cdfafaae1 100644 --- a/embassy-net-ppp/Cargo.toml +++ b/embassy-net-ppp/Cargo.toml @@ -21,7 +21,7 @@ embedded-io-async = { version = "0.6.1" } embassy-net-driver-channel = { version = "0.2.0", path = "../embassy-net-driver-channel" } embassy-futures = { version = "0.1.0", path = "../embassy-futures" } ppproto = { version = "0.1.2"} -embassy-sync = { version = "0.5.0", path = "../embassy-sync" } +embassy-sync = { version = "0.6.0", path = "../embassy-sync" } [package.metadata.embassy_docs] src_base = "https://github.com/embassy-rs/embassy/blob/embassy-net-ppp-v$VERSION/embassy-net-ppp/src/" diff --git a/embassy-net/Cargo.toml b/embassy-net/Cargo.toml index b7146c430..8c2daebf1 100644 --- a/embassy-net/Cargo.toml +++ b/embassy-net/Cargo.toml @@ -73,7 +73,7 @@ smoltcp = { version = "0.11.0", default-features = false, features = [ embassy-net-driver = { version = "0.2.0", path = "../embassy-net-driver" } embassy-time = { version = "0.3.0", path = "../embassy-time" } -embassy-sync = { version = "0.5.0", path = "../embassy-sync" } +embassy-sync = { version = "0.6.0", path = "../embassy-sync" } embedded-io-async = { version = "0.6.1" } managed = { version = "0.8.0", default-features = false, features = [ "map" ] } diff --git a/embassy-nrf/Cargo.toml b/embassy-nrf/Cargo.toml index 0045d9f97..bdf9ec8f5 100644 --- a/embassy-nrf/Cargo.toml +++ b/embassy-nrf/Cargo.toml @@ -126,7 +126,7 @@ _nrf52832_anomaly_109 = [] [dependencies] embassy-time-driver = { version = "0.1", path = "../embassy-time-driver", optional = true } embassy-time = { version = "0.3.0", path = "../embassy-time", optional = true } -embassy-sync = { version = "0.5.0", path = "../embassy-sync" } +embassy-sync = { version = "0.6.0", path = "../embassy-sync" } embassy-hal-internal = {version = "0.1.0", path = "../embassy-hal-internal", features = ["cortex-m", "prio-bits-3"] } embassy-embedded-hal = {version = "0.1.0", path = "../embassy-embedded-hal" } embassy-usb-driver = {version = "0.1.0", path = "../embassy-usb-driver" } diff --git a/embassy-rp/Cargo.toml b/embassy-rp/Cargo.toml index d97b7c6fc..48f7ad138 100644 --- a/embassy-rp/Cargo.toml +++ b/embassy-rp/Cargo.toml @@ -81,7 +81,7 @@ boot2-w25q080 = [] boot2-w25x10cl = [] [dependencies] -embassy-sync = { version = "0.5.0", path = "../embassy-sync" } +embassy-sync = { version = "0.6.0", path = "../embassy-sync" } embassy-time-driver = { version = "0.1", path = "../embassy-time-driver", optional = true } embassy-time = { version = "0.3.0", path = "../embassy-time" } embassy-futures = { version = "0.1.0", path = "../embassy-futures" } diff --git a/embassy-stm32-wpan/Cargo.toml b/embassy-stm32-wpan/Cargo.toml index d4f7e5892..11a0adab2 100644 --- a/embassy-stm32-wpan/Cargo.toml +++ b/embassy-stm32-wpan/Cargo.toml @@ -20,7 +20,7 @@ features = ["stm32wb55rg"] [dependencies] embassy-stm32 = { version = "0.1.0", path = "../embassy-stm32" } -embassy-sync = { version = "0.5.0", path = "../embassy-sync" } +embassy-sync = { version = "0.6.0", path = "../embassy-sync" } embassy-time = { version = "0.3.0", path = "../embassy-time", optional = true } embassy-futures = { version = "0.1.0", path = "../embassy-futures" } embassy-hal-internal = { version = "0.1.0", path = "../embassy-hal-internal" } diff --git a/embassy-stm32/Cargo.toml b/embassy-stm32/Cargo.toml index 5ef2366d9..fde5b4786 100644 --- a/embassy-stm32/Cargo.toml +++ b/embassy-stm32/Cargo.toml @@ -42,7 +42,7 @@ features = ["defmt", "unstable-pac", "exti", "time-driver-any", "time", "stm32h7 rustdoc-args = ["--cfg", "docsrs"] [dependencies] -embassy-sync = { version = "0.5.0", path = "../embassy-sync" } +embassy-sync = { version = "0.6.0", path = "../embassy-sync" } embassy-time = { version = "0.3.0", path = "../embassy-time", optional = true } embassy-time-driver = { version = "0.1", path = "../embassy-time-driver", optional = true } embassy-futures = { version = "0.1.0", path = "../embassy-futures" } diff --git a/embassy-sync/CHANGELOG.md b/embassy-sync/CHANGELOG.md index e5c453ce2..b61d81daa 100644 --- a/embassy-sync/CHANGELOG.md +++ b/embassy-sync/CHANGELOG.md @@ -7,6 +7,8 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0 ## Unreleased +## 0.6.0 - 2024-05-29 + - Add `capacity`, `free_capacity`, `clear`, `len`, `is_empty` and `is_full` functions to `Channel`. - Add `capacity`, `free_capacity`, `clear`, `len`, `is_empty` and `is_full` functions to `PriorityChannel`. - Add `capacity`, `free_capacity`, `clear`, `len`, `is_empty` and `is_full` functions to `PubSubChannel`. diff --git a/embassy-sync/Cargo.toml b/embassy-sync/Cargo.toml index aaf6fab1d..7b7d2bf8e 100644 --- a/embassy-sync/Cargo.toml +++ b/embassy-sync/Cargo.toml @@ -1,6 +1,6 @@ [package] name = "embassy-sync" -version = "0.5.0" +version = "0.6.0" edition = "2021" description = "no-std, no-alloc synchronization primitives with async support" repository = "https://github.com/embassy-rs/embassy" diff --git a/embassy-usb-dfu/Cargo.toml b/embassy-usb-dfu/Cargo.toml index 53d20b7d5..267e412c0 100644 --- a/embassy-usb-dfu/Cargo.toml +++ b/embassy-usb-dfu/Cargo.toml @@ -31,7 +31,7 @@ cortex-m = { version = "0.7.7", features = ["inline-asm"], optional = true } defmt = { version = "0.3.5", optional = true } embassy-boot = { version = "0.2.0", path = "../embassy-boot" } embassy-futures = { version = "0.1.1", path = "../embassy-futures" } -embassy-sync = { version = "0.5.0", path = "../embassy-sync" } +embassy-sync = { version = "0.6.0", path = "../embassy-sync" } embassy-time = { version = "0.3.0", path = "../embassy-time" } embassy-usb = { version = "0.2.0", path = "../embassy-usb", default-features = false } embedded-storage = { version = "0.3.1" } diff --git a/embassy-usb-logger/Cargo.toml b/embassy-usb-logger/Cargo.toml index d58fd7a34..62b4ee723 100644 --- a/embassy-usb-logger/Cargo.toml +++ b/embassy-usb-logger/Cargo.toml @@ -16,6 +16,6 @@ target = "thumbv7em-none-eabi" [dependencies] embassy-usb = { version = "0.2.0", path = "../embassy-usb" } -embassy-sync = { version = "0.5.0", path = "../embassy-sync" } +embassy-sync = { version = "0.6.0", path = "../embassy-sync" } embassy-futures = { version = "0.1.0", path = "../embassy-futures" } log = "0.4" diff --git a/embassy-usb-synopsys-otg/Cargo.toml b/embassy-usb-synopsys-otg/Cargo.toml index 9397ff607..68ab0415f 100644 --- a/embassy-usb-synopsys-otg/Cargo.toml +++ b/embassy-usb-synopsys-otg/Cargo.toml @@ -18,7 +18,7 @@ target = "thumbv7em-none-eabi" [dependencies] critical-section = "1.1" -embassy-sync = { version = "0.5.0", path = "../embassy-sync" } +embassy-sync = { version = "0.6.0", path = "../embassy-sync" } embassy-usb-driver = {version = "0.1.0", path = "../embassy-usb-driver" } defmt = { version = "0.3", optional = true } diff --git a/embassy-usb/Cargo.toml b/embassy-usb/Cargo.toml index 5fb174894..191ed0a6a 100644 --- a/embassy-usb/Cargo.toml +++ b/embassy-usb/Cargo.toml @@ -48,7 +48,7 @@ max-handler-count-8 = [] [dependencies] embassy-futures = { version = "0.1.0", path = "../embassy-futures" } embassy-usb-driver = { version = "0.1.0", path = "../embassy-usb-driver" } -embassy-sync = { version = "0.5.0", path = "../embassy-sync" } +embassy-sync = { version = "0.6.0", path = "../embassy-sync" } embassy-net-driver-channel = { version = "0.2.0", path = "../embassy-net-driver-channel" } defmt = { version = "0.3", optional = true } diff --git a/examples/boot/application/nrf/Cargo.toml b/examples/boot/application/nrf/Cargo.toml index 86f6676cb..f0a710335 100644 --- a/examples/boot/application/nrf/Cargo.toml +++ b/examples/boot/application/nrf/Cargo.toml @@ -5,7 +5,7 @@ version = "0.1.0" license = "MIT OR Apache-2.0" [dependencies] -embassy-sync = { version = "0.5.0", path = "../../../../embassy-sync" } +embassy-sync = { version = "0.6.0", path = "../../../../embassy-sync" } embassy-executor = { version = "0.5.0", path = "../../../../embassy-executor", features = ["task-arena-size-16384", "arch-cortex-m", "executor-thread", "integrated-timers", "arch-cortex-m", "executor-thread"] } embassy-time = { version = "0.3.0", path = "../../../../embassy-time", features = [] } embassy-nrf = { version = "0.1.0", path = "../../../../embassy-nrf", features = ["time-driver-rtc1", "gpiote", ] } diff --git a/examples/boot/application/rp/Cargo.toml b/examples/boot/application/rp/Cargo.toml index 70741a0ce..2ddcbffee 100644 --- a/examples/boot/application/rp/Cargo.toml +++ b/examples/boot/application/rp/Cargo.toml @@ -5,7 +5,7 @@ version = "0.1.0" license = "MIT OR Apache-2.0" [dependencies] -embassy-sync = { version = "0.5.0", path = "../../../../embassy-sync" } +embassy-sync = { version = "0.6.0", path = "../../../../embassy-sync" } embassy-executor = { version = "0.5.0", path = "../../../../embassy-executor", features = ["task-arena-size-16384", "arch-cortex-m", "executor-thread", "integrated-timers", "arch-cortex-m", "executor-thread"] } embassy-time = { version = "0.3.0", path = "../../../../embassy-time", features = [] } embassy-rp = { version = "0.1.0", path = "../../../../embassy-rp", features = ["time-driver", ] } diff --git a/examples/boot/application/stm32f3/Cargo.toml b/examples/boot/application/stm32f3/Cargo.toml index 1cb143820..fe1a6f5b1 100644 --- a/examples/boot/application/stm32f3/Cargo.toml +++ b/examples/boot/application/stm32f3/Cargo.toml @@ -5,7 +5,7 @@ version = "0.1.0" license = "MIT OR Apache-2.0" [dependencies] -embassy-sync = { version = "0.5.0", path = "../../../../embassy-sync" } +embassy-sync = { version = "0.6.0", path = "../../../../embassy-sync" } embassy-executor = { version = "0.5.0", path = "../../../../embassy-executor", features = ["task-arena-size-8192", "arch-cortex-m", "executor-thread", "integrated-timers"] } embassy-time = { version = "0.3.0", path = "../../../../embassy-time", features = [ "tick-hz-32_768"] } embassy-stm32 = { version = "0.1.0", path = "../../../../embassy-stm32", features = ["stm32f303re", "time-driver-any", "exti"] } diff --git a/examples/boot/application/stm32f7/Cargo.toml b/examples/boot/application/stm32f7/Cargo.toml index c4ae461a5..37e362824 100644 --- a/examples/boot/application/stm32f7/Cargo.toml +++ b/examples/boot/application/stm32f7/Cargo.toml @@ -5,7 +5,7 @@ version = "0.1.0" license = "MIT OR Apache-2.0" [dependencies] -embassy-sync = { version = "0.5.0", path = "../../../../embassy-sync" } +embassy-sync = { version = "0.6.0", path = "../../../../embassy-sync" } embassy-executor = { version = "0.5.0", path = "../../../../embassy-executor", features = ["task-arena-size-8192", "arch-cortex-m", "executor-thread", "integrated-timers"] } embassy-time = { version = "0.3.0", path = "../../../../embassy-time", features = [ "tick-hz-32_768"] } embassy-stm32 = { version = "0.1.0", path = "../../../../embassy-stm32", features = ["stm32f767zi", "time-driver-any", "exti"] } diff --git a/examples/boot/application/stm32h7/Cargo.toml b/examples/boot/application/stm32h7/Cargo.toml index 995487cdd..52cd0b546 100644 --- a/examples/boot/application/stm32h7/Cargo.toml +++ b/examples/boot/application/stm32h7/Cargo.toml @@ -5,7 +5,7 @@ version = "0.1.0" license = "MIT OR Apache-2.0" [dependencies] -embassy-sync = { version = "0.5.0", path = "../../../../embassy-sync" } +embassy-sync = { version = "0.6.0", path = "../../../../embassy-sync" } embassy-executor = { version = "0.5.0", path = "../../../../embassy-executor", features = ["task-arena-size-8192", "arch-cortex-m", "executor-thread", "integrated-timers"] } embassy-time = { version = "0.3.0", path = "../../../../embassy-time", features = [ "tick-hz-32_768"] } embassy-stm32 = { version = "0.1.0", path = "../../../../embassy-stm32", features = ["stm32h743zi", "time-driver-any", "exti"] } diff --git a/examples/boot/application/stm32l0/Cargo.toml b/examples/boot/application/stm32l0/Cargo.toml index b2abc005c..0f3cbe654 100644 --- a/examples/boot/application/stm32l0/Cargo.toml +++ b/examples/boot/application/stm32l0/Cargo.toml @@ -5,7 +5,7 @@ version = "0.1.0" license = "MIT OR Apache-2.0" [dependencies] -embassy-sync = { version = "0.5.0", path = "../../../../embassy-sync" } +embassy-sync = { version = "0.6.0", path = "../../../../embassy-sync" } embassy-executor = { version = "0.5.0", path = "../../../../embassy-executor", features = ["task-arena-size-8192", "arch-cortex-m", "executor-thread", "integrated-timers"] } embassy-time = { version = "0.3.0", path = "../../../../embassy-time", features = [ "tick-hz-32_768"] } embassy-stm32 = { version = "0.1.0", path = "../../../../embassy-stm32", features = ["stm32l072cz", "time-driver-any", "exti", "memory-x"] } diff --git a/examples/boot/application/stm32l1/Cargo.toml b/examples/boot/application/stm32l1/Cargo.toml index 7203e6350..3e964df9c 100644 --- a/examples/boot/application/stm32l1/Cargo.toml +++ b/examples/boot/application/stm32l1/Cargo.toml @@ -5,7 +5,7 @@ version = "0.1.0" license = "MIT OR Apache-2.0" [dependencies] -embassy-sync = { version = "0.5.0", path = "../../../../embassy-sync" } +embassy-sync = { version = "0.6.0", path = "../../../../embassy-sync" } embassy-executor = { version = "0.5.0", path = "../../../../embassy-executor", features = ["task-arena-size-8192", "arch-cortex-m", "executor-thread", "integrated-timers"] } embassy-time = { version = "0.3.0", path = "../../../../embassy-time", features = [ "tick-hz-32_768"] } embassy-stm32 = { version = "0.1.0", path = "../../../../embassy-stm32", features = ["stm32l151cb-a", "time-driver-any", "exti"] } diff --git a/examples/boot/application/stm32l4/Cargo.toml b/examples/boot/application/stm32l4/Cargo.toml index ec134f394..b154403ac 100644 --- a/examples/boot/application/stm32l4/Cargo.toml +++ b/examples/boot/application/stm32l4/Cargo.toml @@ -5,7 +5,7 @@ version = "0.1.0" license = "MIT OR Apache-2.0" [dependencies] -embassy-sync = { version = "0.5.0", path = "../../../../embassy-sync" } +embassy-sync = { version = "0.6.0", path = "../../../../embassy-sync" } embassy-executor = { version = "0.5.0", path = "../../../../embassy-executor", features = ["task-arena-size-8192", "arch-cortex-m", "executor-thread", "integrated-timers"] } embassy-time = { version = "0.3.0", path = "../../../../embassy-time", features = [ "tick-hz-32_768"] } embassy-stm32 = { version = "0.1.0", path = "../../../../embassy-stm32", features = ["stm32l475vg", "time-driver-any", "exti"] } diff --git a/examples/boot/application/stm32wb-dfu/Cargo.toml b/examples/boot/application/stm32wb-dfu/Cargo.toml index 84d6d04c1..bb83ae049 100644 --- a/examples/boot/application/stm32wb-dfu/Cargo.toml +++ b/examples/boot/application/stm32wb-dfu/Cargo.toml @@ -5,7 +5,7 @@ version = "0.1.0" license = "MIT OR Apache-2.0" [dependencies] -embassy-sync = { version = "0.5.0", path = "../../../../embassy-sync" } +embassy-sync = { version = "0.6.0", path = "../../../../embassy-sync" } embassy-executor = { version = "0.5.0", path = "../../../../embassy-executor", features = ["task-arena-size-8192", "arch-cortex-m", "executor-thread", "integrated-timers"] } embassy-time = { version = "0.3.0", path = "../../../../embassy-time", features = [ "tick-hz-32_768"] } embassy-stm32 = { version = "0.1.0", path = "../../../../embassy-stm32", features = ["stm32wb55rg", "time-driver-any", "exti"] } diff --git a/examples/boot/application/stm32wl/Cargo.toml b/examples/boot/application/stm32wl/Cargo.toml index e38e9f3af..93ead617c 100644 --- a/examples/boot/application/stm32wl/Cargo.toml +++ b/examples/boot/application/stm32wl/Cargo.toml @@ -5,7 +5,7 @@ version = "0.1.0" license = "MIT OR Apache-2.0" [dependencies] -embassy-sync = { version = "0.5.0", path = "../../../../embassy-sync" } +embassy-sync = { version = "0.6.0", path = "../../../../embassy-sync" } embassy-executor = { version = "0.5.0", path = "../../../../embassy-executor", features = ["task-arena-size-8192", "arch-cortex-m", "executor-thread", "integrated-timers"] } embassy-time = { version = "0.3.0", path = "../../../../embassy-time", features = [ "tick-hz-32_768"] } embassy-stm32 = { version = "0.1.0", path = "../../../../embassy-stm32", features = ["stm32wl55jc-cm4", "time-driver-any", "exti"] } diff --git a/examples/boot/bootloader/nrf/Cargo.toml b/examples/boot/bootloader/nrf/Cargo.toml index 3e41d1479..980149bea 100644 --- a/examples/boot/bootloader/nrf/Cargo.toml +++ b/examples/boot/bootloader/nrf/Cargo.toml @@ -12,7 +12,7 @@ defmt-rtt = { version = "0.4", optional = true } embassy-nrf = { path = "../../../../embassy-nrf", features = [] } embassy-boot-nrf = { path = "../../../../embassy-boot-nrf" } cortex-m = { version = "0.7.6", features = ["inline-asm", "critical-section-single-core"] } -embassy-sync = { version = "0.5.0", path = "../../../../embassy-sync" } +embassy-sync = { version = "0.6.0", path = "../../../../embassy-sync" } cortex-m-rt = { version = "0.7" } cfg-if = "1.0.0" diff --git a/examples/boot/bootloader/rp/Cargo.toml b/examples/boot/bootloader/rp/Cargo.toml index 3cf61a002..7eec3df1b 100644 --- a/examples/boot/bootloader/rp/Cargo.toml +++ b/examples/boot/bootloader/rp/Cargo.toml @@ -11,7 +11,7 @@ defmt-rtt = { version = "0.4", optional = true } embassy-rp = { path = "../../../../embassy-rp", features = [] } embassy-boot-rp = { path = "../../../../embassy-boot-rp" } -embassy-sync = { version = "0.5.0", path = "../../../../embassy-sync" } +embassy-sync = { version = "0.6.0", path = "../../../../embassy-sync" } embassy-time = { path = "../../../../embassy-time", features = [] } cortex-m = { version = "0.7.6", features = ["inline-asm", "critical-section-single-core"] } diff --git a/examples/boot/bootloader/stm32-dual-bank/Cargo.toml b/examples/boot/bootloader/stm32-dual-bank/Cargo.toml index 313187adc..55adf84d7 100644 --- a/examples/boot/bootloader/stm32-dual-bank/Cargo.toml +++ b/examples/boot/bootloader/stm32-dual-bank/Cargo.toml @@ -15,7 +15,7 @@ cortex-m = { version = "0.7.6", features = [ "inline-asm", "critical-section-single-core", ] } -embassy-sync = { version = "0.5.0", path = "../../../../embassy-sync" } +embassy-sync = { version = "0.6.0", path = "../../../../embassy-sync" } cortex-m-rt = { version = "0.7" } embedded-storage = "0.3.1" embedded-storage-async = "0.4.0" diff --git a/examples/boot/bootloader/stm32/Cargo.toml b/examples/boot/bootloader/stm32/Cargo.toml index 74c01b0f4..ef2b99404 100644 --- a/examples/boot/bootloader/stm32/Cargo.toml +++ b/examples/boot/bootloader/stm32/Cargo.toml @@ -12,7 +12,7 @@ defmt-rtt = { version = "0.4", optional = true } embassy-stm32 = { path = "../../../../embassy-stm32", features = [] } embassy-boot-stm32 = { path = "../../../../embassy-boot-stm32" } cortex-m = { version = "0.7.6", features = ["inline-asm", "critical-section-single-core"] } -embassy-sync = { version = "0.5.0", path = "../../../../embassy-sync" } +embassy-sync = { version = "0.6.0", path = "../../../../embassy-sync" } cortex-m-rt = { version = "0.7" } embedded-storage = "0.3.1" embedded-storage-async = "0.4.0" diff --git a/examples/boot/bootloader/stm32wb-dfu/Cargo.toml b/examples/boot/bootloader/stm32wb-dfu/Cargo.toml index 27b6b46df..93b5d8b34 100644 --- a/examples/boot/bootloader/stm32wb-dfu/Cargo.toml +++ b/examples/boot/bootloader/stm32wb-dfu/Cargo.toml @@ -12,7 +12,7 @@ defmt-rtt = { version = "0.4", optional = true } embassy-stm32 = { path = "../../../../embassy-stm32", features = [] } embassy-boot-stm32 = { path = "../../../../embassy-boot-stm32" } cortex-m = { version = "0.7.6", features = ["inline-asm", "critical-section-single-core"] } -embassy-sync = { version = "0.5.0", path = "../../../../embassy-sync" } +embassy-sync = { version = "0.6.0", path = "../../../../embassy-sync" } cortex-m-rt = { version = "0.7" } embedded-storage = "0.3.1" embedded-storage-async = "0.4.0" diff --git a/examples/nrf-rtos-trace/Cargo.toml b/examples/nrf-rtos-trace/Cargo.toml index f3a3f64af..147bb40dc 100644 --- a/examples/nrf-rtos-trace/Cargo.toml +++ b/examples/nrf-rtos-trace/Cargo.toml @@ -15,7 +15,7 @@ log = [ ] [dependencies] -embassy-sync = { version = "0.5.0", path = "../../embassy-sync" } +embassy-sync = { version = "0.6.0", path = "../../embassy-sync" } embassy-executor = { version = "0.5.0", path = "../../embassy-executor", features = ["arch-cortex-m", "executor-thread", "rtos-trace", "integrated-timers"] } embassy-time = { version = "0.3.0", path = "../../embassy-time" } embassy-nrf = { version = "0.1.0", path = "../../embassy-nrf", features = ["nrf52840", "time-driver-rtc1", "gpiote", "unstable-pac"] } diff --git a/examples/nrf52810/Cargo.toml b/examples/nrf52810/Cargo.toml index 8ed8f54d7..faec9a263 100644 --- a/examples/nrf52810/Cargo.toml +++ b/examples/nrf52810/Cargo.toml @@ -6,7 +6,7 @@ license = "MIT OR Apache-2.0" [dependencies] embassy-futures = { version = "0.1.0", path = "../../embassy-futures" } -embassy-sync = { version = "0.5.0", path = "../../embassy-sync", features = ["defmt"] } +embassy-sync = { version = "0.6.0", path = "../../embassy-sync", features = ["defmt"] } embassy-executor = { version = "0.5.0", path = "../../embassy-executor", features = ["task-arena-size-8192", "arch-cortex-m", "executor-thread", "executor-interrupt", "defmt", "integrated-timers"] } embassy-time = { version = "0.3.0", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime"] } embassy-nrf = { version = "0.1.0", path = "../../embassy-nrf", features = ["defmt", "nrf52810", "time-driver-rtc1", "gpiote", "unstable-pac", "time"] } diff --git a/examples/nrf52840-rtic/Cargo.toml b/examples/nrf52840-rtic/Cargo.toml index a0687fa1e..041c779a5 100644 --- a/examples/nrf52840-rtic/Cargo.toml +++ b/examples/nrf52840-rtic/Cargo.toml @@ -8,7 +8,7 @@ license = "MIT OR Apache-2.0" rtic = { version = "2", features = ["thumbv7-backend"] } embassy-futures = { version = "0.1.0", path = "../../embassy-futures" } -embassy-sync = { version = "0.5.0", path = "../../embassy-sync", features = ["defmt"] } +embassy-sync = { version = "0.6.0", path = "../../embassy-sync", features = ["defmt"] } embassy-time = { version = "0.3.0", path = "../../embassy-time", features = [ "defmt", "defmt-timestamp-uptime", "generic-queue"] } embassy-nrf = { version = "0.1.0", path = "../../embassy-nrf", features = [ "defmt", "nrf52840", "time-driver-rtc1", "gpiote", "unstable-pac", "time"] } diff --git a/examples/nrf52840/Cargo.toml b/examples/nrf52840/Cargo.toml index d693c5a02..79d9e4e1a 100644 --- a/examples/nrf52840/Cargo.toml +++ b/examples/nrf52840/Cargo.toml @@ -6,7 +6,7 @@ license = "MIT OR Apache-2.0" [dependencies] embassy-futures = { version = "0.1.0", path = "../../embassy-futures" } -embassy-sync = { version = "0.5.0", path = "../../embassy-sync", features = ["defmt"] } +embassy-sync = { version = "0.6.0", path = "../../embassy-sync", features = ["defmt"] } embassy-executor = { version = "0.5.0", path = "../../embassy-executor", features = ["task-arena-size-32768", "arch-cortex-m", "executor-thread", "executor-interrupt", "defmt", "integrated-timers"] } embassy-time = { version = "0.3.0", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime"] } embassy-nrf = { version = "0.1.0", path = "../../embassy-nrf", features = ["defmt", "nrf52840", "time-driver-rtc1", "gpiote", "unstable-pac", "time"] } diff --git a/examples/nrf5340/Cargo.toml b/examples/nrf5340/Cargo.toml index 0d3e39fe5..e560a3dbb 100644 --- a/examples/nrf5340/Cargo.toml +++ b/examples/nrf5340/Cargo.toml @@ -6,7 +6,7 @@ license = "MIT OR Apache-2.0" [dependencies] embassy-futures = { version = "0.1.0", path = "../../embassy-futures" } -embassy-sync = { version = "0.5.0", path = "../../embassy-sync", features = ["defmt"] } +embassy-sync = { version = "0.6.0", path = "../../embassy-sync", features = ["defmt"] } embassy-executor = { version = "0.5.0", path = "../../embassy-executor", features = ["task-arena-size-32768", "arch-cortex-m", "executor-thread", "defmt", "integrated-timers"] } embassy-time = { version = "0.3.0", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime"] } embassy-nrf = { version = "0.1.0", path = "../../embassy-nrf", features = ["defmt", "nrf5340-app-s", "time-driver-rtc1", "gpiote", "unstable-pac"] } diff --git a/examples/rp/Cargo.toml b/examples/rp/Cargo.toml index 5178a690f..726df29cb 100644 --- a/examples/rp/Cargo.toml +++ b/examples/rp/Cargo.toml @@ -7,7 +7,7 @@ license = "MIT OR Apache-2.0" [dependencies] embassy-embedded-hal = { version = "0.1.0", path = "../../embassy-embedded-hal", features = ["defmt"] } -embassy-sync = { version = "0.5.0", path = "../../embassy-sync", features = ["defmt"] } +embassy-sync = { version = "0.6.0", path = "../../embassy-sync", features = ["defmt"] } embassy-executor = { version = "0.5.0", path = "../../embassy-executor", features = ["task-arena-size-32768", "arch-cortex-m", "executor-thread", "executor-interrupt", "defmt", "integrated-timers"] } embassy-time = { version = "0.3.0", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime"] } embassy-rp = { version = "0.1.0", path = "../../embassy-rp", features = ["defmt", "unstable-pac", "time-driver", "critical-section-impl"] } diff --git a/examples/std/Cargo.toml b/examples/std/Cargo.toml index f05565e84..77c479d3b 100644 --- a/examples/std/Cargo.toml +++ b/examples/std/Cargo.toml @@ -5,7 +5,7 @@ version = "0.1.0" license = "MIT OR Apache-2.0" [dependencies] -embassy-sync = { version = "0.5.0", path = "../../embassy-sync", features = ["log"] } +embassy-sync = { version = "0.6.0", path = "../../embassy-sync", features = ["log"] } embassy-executor = { version = "0.5.0", path = "../../embassy-executor", features = ["task-arena-size-32768", "arch-std", "executor-thread", "log", "integrated-timers"] } embassy-time = { version = "0.3.0", path = "../../embassy-time", features = ["log", "std", ] } embassy-net = { version = "0.4.0", path = "../../embassy-net", features=[ "std", "log", "medium-ethernet", "medium-ip", "tcp", "udp", "dns", "dhcpv4", "proto-ipv6"] } diff --git a/examples/stm32c0/Cargo.toml b/examples/stm32c0/Cargo.toml index aaca857ae..6fdcdce5f 100644 --- a/examples/stm32c0/Cargo.toml +++ b/examples/stm32c0/Cargo.toml @@ -7,7 +7,7 @@ license = "MIT OR Apache-2.0" [dependencies] # Change stm32c031c6 to your chip name, if necessary. embassy-stm32 = { version = "0.1.0", path = "../../embassy-stm32", features = [ "defmt", "time-driver-any", "stm32c031c6", "memory-x", "unstable-pac", "exti"] } -embassy-sync = { version = "0.5.0", path = "../../embassy-sync", features = ["defmt"] } +embassy-sync = { version = "0.6.0", path = "../../embassy-sync", features = ["defmt"] } embassy-executor = { version = "0.5.0", path = "../../embassy-executor", features = ["arch-cortex-m", "executor-thread", "defmt", "integrated-timers"] } embassy-time = { version = "0.3.0", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime", "tick-hz-32_768"] } diff --git a/examples/stm32f0/Cargo.toml b/examples/stm32f0/Cargo.toml index cabeca687..5b648e58a 100644 --- a/examples/stm32f0/Cargo.toml +++ b/examples/stm32f0/Cargo.toml @@ -12,7 +12,7 @@ cortex-m-rt = "0.7.0" defmt = "0.3" defmt-rtt = "0.4" panic-probe = { version = "0.3", features = ["print-defmt"] } -embassy-sync = { version = "0.5.0", path = "../../embassy-sync", features = ["defmt"] } +embassy-sync = { version = "0.6.0", path = "../../embassy-sync", features = ["defmt"] } embassy-executor = { version = "0.5.0", path = "../../embassy-executor", features = ["arch-cortex-m", "executor-thread", "executor-interrupt", "defmt", "integrated-timers"] } embassy-time = { version = "0.3.0", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime", "tick-hz-32_768"] } static_cell = "2" diff --git a/examples/stm32f1/Cargo.toml b/examples/stm32f1/Cargo.toml index 55051703b..51723ac6d 100644 --- a/examples/stm32f1/Cargo.toml +++ b/examples/stm32f1/Cargo.toml @@ -7,7 +7,7 @@ license = "MIT OR Apache-2.0" [dependencies] # Change stm32f103c8 to your chip name, if necessary. embassy-stm32 = { version = "0.1.0", path = "../../embassy-stm32", features = [ "defmt", "stm32f103c8", "unstable-pac", "memory-x", "time-driver-any" ] } -embassy-sync = { version = "0.5.0", path = "../../embassy-sync", features = ["defmt"] } +embassy-sync = { version = "0.6.0", path = "../../embassy-sync", features = ["defmt"] } embassy-executor = { version = "0.5.0", path = "../../embassy-executor", features = ["arch-cortex-m", "executor-thread", "defmt", "integrated-timers"] } embassy-time = { version = "0.3.0", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime", "tick-hz-32_768"] } embassy-usb = { version = "0.2.0", path = "../../embassy-usb", features = ["defmt"] } diff --git a/examples/stm32f2/Cargo.toml b/examples/stm32f2/Cargo.toml index 86921580a..5d07b0e04 100644 --- a/examples/stm32f2/Cargo.toml +++ b/examples/stm32f2/Cargo.toml @@ -7,7 +7,7 @@ license = "MIT OR Apache-2.0" [dependencies] # Change stm32f207zg to your chip name, if necessary. embassy-stm32 = { version = "0.1.0", path = "../../embassy-stm32", features = [ "defmt", "stm32f207zg", "unstable-pac", "memory-x", "time-driver-any", "exti"] } -embassy-sync = { version = "0.5.0", path = "../../embassy-sync", features = ["defmt"] } +embassy-sync = { version = "0.6.0", path = "../../embassy-sync", features = ["defmt"] } embassy-executor = { version = "0.5.0", path = "../../embassy-executor", features = ["arch-cortex-m", "executor-thread", "defmt", "integrated-timers"] } embassy-time = { version = "0.3.0", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime", "tick-hz-32_768"] } diff --git a/examples/stm32f3/Cargo.toml b/examples/stm32f3/Cargo.toml index 2cfb19c42..848a6b331 100644 --- a/examples/stm32f3/Cargo.toml +++ b/examples/stm32f3/Cargo.toml @@ -7,7 +7,7 @@ license = "MIT OR Apache-2.0" [dependencies] # Change stm32f303ze to your chip name, if necessary. embassy-stm32 = { version = "0.1.0", path = "../../embassy-stm32", features = [ "defmt", "stm32f303ze", "unstable-pac", "memory-x", "time-driver-any", "exti"] } -embassy-sync = { version = "0.5.0", path = "../../embassy-sync", features = ["defmt"] } +embassy-sync = { version = "0.6.0", path = "../../embassy-sync", features = ["defmt"] } embassy-executor = { version = "0.5.0", path = "../../embassy-executor", features = ["arch-cortex-m", "executor-thread", "executor-interrupt", "defmt", "integrated-timers"] } embassy-time = { version = "0.3.0", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime", "tick-hz-32_768"] } embassy-usb = { version = "0.2.0", path = "../../embassy-usb", features = ["defmt"] } diff --git a/examples/stm32f334/Cargo.toml b/examples/stm32f334/Cargo.toml index 7c067e140..50046de56 100644 --- a/examples/stm32f334/Cargo.toml +++ b/examples/stm32f334/Cargo.toml @@ -5,7 +5,7 @@ version = "0.1.0" license = "MIT OR Apache-2.0" [dependencies] -embassy-sync = { version = "0.5.0", path = "../../embassy-sync", features = ["defmt"] } +embassy-sync = { version = "0.6.0", path = "../../embassy-sync", features = ["defmt"] } embassy-executor = { version = "0.5.0", path = "../../embassy-executor", features = ["arch-cortex-m", "executor-thread", "executor-interrupt", "defmt", "integrated-timers"] } embassy-time = { version = "0.3.0", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime", "tick-hz-32_768"] } embassy-stm32 = { version = "0.1.0", path = "../../embassy-stm32", features = [ "defmt", "stm32f334r8", "unstable-pac", "memory-x", "time-driver-any", "exti"] } diff --git a/examples/stm32f4/Cargo.toml b/examples/stm32f4/Cargo.toml index 1eb1ae6db..52b7ce9e8 100644 --- a/examples/stm32f4/Cargo.toml +++ b/examples/stm32f4/Cargo.toml @@ -7,7 +7,7 @@ license = "MIT OR Apache-2.0" [dependencies] # Change stm32f429zi to your chip name, if necessary. embassy-stm32 = { version = "0.1.0", path = "../../embassy-stm32", features = ["defmt", "stm32f429zi", "unstable-pac", "memory-x", "time-driver-any", "exti", "chrono"] } -embassy-sync = { version = "0.5.0", path = "../../embassy-sync", features = ["defmt"] } +embassy-sync = { version = "0.6.0", path = "../../embassy-sync", features = ["defmt"] } embassy-executor = { version = "0.5.0", path = "../../embassy-executor", features = ["task-arena-size-32768", "arch-cortex-m", "executor-thread", "executor-interrupt", "defmt", "integrated-timers"] } embassy-time = { version = "0.3.0", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime", "tick-hz-32_768"] } embassy-usb = { version = "0.2.0", path = "../../embassy-usb", features = ["defmt" ] } diff --git a/examples/stm32f7/Cargo.toml b/examples/stm32f7/Cargo.toml index 37bec1bfa..b55c4e127 100644 --- a/examples/stm32f7/Cargo.toml +++ b/examples/stm32f7/Cargo.toml @@ -7,7 +7,7 @@ license = "MIT OR Apache-2.0" [dependencies] # Change stm32f777zi to your chip name, if necessary. embassy-stm32 = { version = "0.1.0", path = "../../embassy-stm32", features = ["defmt", "stm32f777zi", "memory-x", "unstable-pac", "time-driver-any", "exti"] } -embassy-sync = { version = "0.5.0", path = "../../embassy-sync", features = ["defmt"] } +embassy-sync = { version = "0.6.0", path = "../../embassy-sync", features = ["defmt"] } embassy-executor = { version = "0.5.0", path = "../../embassy-executor", features = ["task-arena-size-32768", "arch-cortex-m", "executor-thread", "defmt", "integrated-timers"] } embassy-time = { version = "0.3.0", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime", "tick-hz-32_768"] } embassy-net = { version = "0.4.0", path = "../../embassy-net", features = ["defmt", "tcp", "dhcpv4", "medium-ethernet"] } diff --git a/examples/stm32g0/Cargo.toml b/examples/stm32g0/Cargo.toml index 803d0ae0e..122a996e5 100644 --- a/examples/stm32g0/Cargo.toml +++ b/examples/stm32g0/Cargo.toml @@ -7,7 +7,7 @@ license = "MIT OR Apache-2.0" [dependencies] # Change stm32g0b1re to your chip name, if necessary. embassy-stm32 = { version = "0.1.0", path = "../../embassy-stm32", features = [ "defmt", "time-driver-any", "stm32g0b1re", "memory-x", "unstable-pac", "exti"] } -embassy-sync = { version = "0.5.0", path = "../../embassy-sync", features = ["defmt"] } +embassy-sync = { version = "0.6.0", path = "../../embassy-sync", features = ["defmt"] } embassy-executor = { version = "0.5.0", path = "../../embassy-executor", features = ["arch-cortex-m", "executor-thread", "defmt", "integrated-timers"] } embassy-time = { version = "0.3.0", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime", "tick-hz-32_768"] } embassy-usb = { version = "0.2.0", path = "../../embassy-usb", default-features = false, features = ["defmt"] } diff --git a/examples/stm32g4/Cargo.toml b/examples/stm32g4/Cargo.toml index 7f51631c0..9a34ba19d 100644 --- a/examples/stm32g4/Cargo.toml +++ b/examples/stm32g4/Cargo.toml @@ -7,7 +7,7 @@ license = "MIT OR Apache-2.0" [dependencies] # Change stm32g491re to your chip name, if necessary. embassy-stm32 = { version = "0.1.0", path = "../../embassy-stm32", features = [ "defmt", "time-driver-any", "stm32g491re", "memory-x", "unstable-pac", "exti"] } -embassy-sync = { version = "0.5.0", path = "../../embassy-sync", features = ["defmt"] } +embassy-sync = { version = "0.6.0", path = "../../embassy-sync", features = ["defmt"] } embassy-executor = { version = "0.5.0", path = "../../embassy-executor", features = ["arch-cortex-m", "executor-thread", "defmt", "integrated-timers"] } embassy-time = { version = "0.3.0", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime", "tick-hz-32_768"] } embassy-usb = { version = "0.2.0", path = "../../embassy-usb", features = ["defmt"] } diff --git a/examples/stm32h5/Cargo.toml b/examples/stm32h5/Cargo.toml index 82760db64..87de9f3a4 100644 --- a/examples/stm32h5/Cargo.toml +++ b/examples/stm32h5/Cargo.toml @@ -7,7 +7,7 @@ license = "MIT OR Apache-2.0" [dependencies] # Change stm32h563zi to your chip name, if necessary. embassy-stm32 = { version = "0.1.0", path = "../../embassy-stm32", features = ["defmt", "stm32h563zi", "memory-x", "time-driver-any", "exti", "unstable-pac", "low-power"] } -embassy-sync = { version = "0.5.0", path = "../../embassy-sync", features = ["defmt"] } +embassy-sync = { version = "0.6.0", path = "../../embassy-sync", features = ["defmt"] } embassy-executor = { version = "0.5.0", path = "../../embassy-executor", features = ["task-arena-size-32768", "arch-cortex-m", "executor-thread", "defmt", "integrated-timers"] } embassy-time = { version = "0.3.0", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime", "tick-hz-32_768"] } embassy-net = { version = "0.4.0", path = "../../embassy-net", features = ["defmt", "tcp", "dhcpv4", "medium-ethernet", "proto-ipv6"] } diff --git a/examples/stm32h7/Cargo.toml b/examples/stm32h7/Cargo.toml index c6c2d1354..14125f819 100644 --- a/examples/stm32h7/Cargo.toml +++ b/examples/stm32h7/Cargo.toml @@ -7,7 +7,7 @@ license = "MIT OR Apache-2.0" [dependencies] # Change stm32h743bi to your chip name, if necessary. embassy-stm32 = { version = "0.1.0", path = "../../embassy-stm32", features = ["defmt", "stm32h743bi", "time-driver-tim2", "exti", "memory-x", "unstable-pac", "chrono"] } -embassy-sync = { version = "0.5.0", path = "../../embassy-sync", features = ["defmt"] } +embassy-sync = { version = "0.6.0", path = "../../embassy-sync", features = ["defmt"] } embassy-embedded-hal = { version = "0.1.0", path = "../../embassy-embedded-hal" } embassy-executor = { version = "0.5.0", path = "../../embassy-executor", features = ["task-arena-size-32768", "arch-cortex-m", "executor-thread", "executor-interrupt", "defmt", "integrated-timers"] } embassy-time = { version = "0.3.0", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime", "tick-hz-32_768"] } diff --git a/examples/stm32h7rs/Cargo.toml b/examples/stm32h7rs/Cargo.toml index 192a6ca61..f8c49f3d1 100644 --- a/examples/stm32h7rs/Cargo.toml +++ b/examples/stm32h7rs/Cargo.toml @@ -7,7 +7,7 @@ license = "MIT OR Apache-2.0" [dependencies] # Change stm32h743bi to your chip name, if necessary. embassy-stm32 = { version = "0.1.0", path = "../../embassy-stm32", features = ["defmt", "stm32h7s3l8", "time-driver-tim2", "exti", "memory-x", "unstable-pac", "chrono"] } -embassy-sync = { version = "0.5.0", path = "../../embassy-sync", features = ["defmt"] } +embassy-sync = { version = "0.6.0", path = "../../embassy-sync", features = ["defmt"] } embassy-executor = { version = "0.5.0", path = "../../embassy-executor", features = ["task-arena-size-32768", "arch-cortex-m", "executor-thread", "executor-interrupt", "defmt", "integrated-timers"] } embassy-time = { version = "0.3.0", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime", "tick-hz-32_768"] } embassy-net = { version = "0.4.0", path = "../../embassy-net", features = ["defmt", "tcp", "dhcpv4", "medium-ethernet", "proto-ipv6", "dns"] } diff --git a/examples/stm32l0/Cargo.toml b/examples/stm32l0/Cargo.toml index 8831f9aaf..b6de182e1 100644 --- a/examples/stm32l0/Cargo.toml +++ b/examples/stm32l0/Cargo.toml @@ -7,7 +7,7 @@ license = "MIT OR Apache-2.0" [dependencies] # Change stm32l072cz to your chip name, if necessary. embassy-stm32 = { version = "0.1.0", path = "../../embassy-stm32", features = ["defmt", "stm32l072cz", "time-driver-any", "exti", "memory-x"] } -embassy-sync = { version = "0.5.0", path = "../../embassy-sync", features = ["defmt"] } +embassy-sync = { version = "0.6.0", path = "../../embassy-sync", features = ["defmt"] } embassy-executor = { version = "0.5.0", path = "../../embassy-executor", features = ["arch-cortex-m", "executor-thread", "defmt", "integrated-timers"] } embassy-time = { version = "0.3.0", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime", "tick-hz-32_768"] } diff --git a/examples/stm32l1/Cargo.toml b/examples/stm32l1/Cargo.toml index 24d61043d..17887bc14 100644 --- a/examples/stm32l1/Cargo.toml +++ b/examples/stm32l1/Cargo.toml @@ -5,7 +5,7 @@ version = "0.1.0" license = "MIT OR Apache-2.0" [dependencies] -embassy-sync = { version = "0.5.0", path = "../../embassy-sync", features = ["defmt"] } +embassy-sync = { version = "0.6.0", path = "../../embassy-sync", features = ["defmt"] } embassy-executor = { version = "0.5.0", path = "../../embassy-executor", features = ["arch-cortex-m", "executor-thread", "defmt", "integrated-timers"] } embassy-time = { version = "0.3.0", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime", "tick-hz-32_768"] } embassy-stm32 = { version = "0.1.0", path = "../../embassy-stm32", features = [ "defmt", "stm32l151cb-a", "time-driver-any", "memory-x"] } diff --git a/examples/stm32l4/Cargo.toml b/examples/stm32l4/Cargo.toml index a8c6aa0e9..37f09bbcc 100644 --- a/examples/stm32l4/Cargo.toml +++ b/examples/stm32l4/Cargo.toml @@ -7,7 +7,7 @@ license = "MIT OR Apache-2.0" [dependencies] # Change stm32l4s5vi to your chip name, if necessary. embassy-stm32 = { version = "0.1.0", path = "../../embassy-stm32", features = [ "defmt", "unstable-pac", "stm32l4s5qi", "memory-x", "time-driver-any", "exti", "chrono"] } -embassy-sync = { version = "0.5.0", path = "../../embassy-sync", features = ["defmt"] } +embassy-sync = { version = "0.6.0", path = "../../embassy-sync", features = ["defmt"] } embassy-executor = { version = "0.5.0", path = "../../embassy-executor", features = ["task-arena-size-32768", "arch-cortex-m", "executor-thread", "defmt", "integrated-timers"] } embassy-time = { version = "0.3.0", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime", "tick-hz-32_768", ] } embassy-embedded-hal = { version = "0.1.0", path = "../../embassy-embedded-hal" } diff --git a/examples/stm32l5/Cargo.toml b/examples/stm32l5/Cargo.toml index 2c6c125dc..910b8e6d1 100644 --- a/examples/stm32l5/Cargo.toml +++ b/examples/stm32l5/Cargo.toml @@ -7,7 +7,7 @@ license = "MIT OR Apache-2.0" [dependencies] # Change stm32l552ze to your chip name, if necessary. embassy-stm32 = { version = "0.1.0", path = "../../embassy-stm32", features = [ "defmt", "unstable-pac", "stm32l552ze", "time-driver-any", "exti", "memory-x", "low-power"] } -embassy-sync = { version = "0.5.0", path = "../../embassy-sync", features = ["defmt"] } +embassy-sync = { version = "0.6.0", path = "../../embassy-sync", features = ["defmt"] } embassy-executor = { version = "0.5.0", path = "../../embassy-executor", features = ["task-arena-size-32768", "arch-cortex-m", "executor-thread", "defmt", "integrated-timers"] } embassy-time = { version = "0.3.0", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime", "tick-hz-32_768"] } embassy-usb = { version = "0.2.0", path = "../../embassy-usb", features = ["defmt"] } diff --git a/examples/stm32u0/Cargo.toml b/examples/stm32u0/Cargo.toml index e9a215589..e67856853 100644 --- a/examples/stm32u0/Cargo.toml +++ b/examples/stm32u0/Cargo.toml @@ -7,7 +7,7 @@ license = "MIT OR Apache-2.0" [dependencies] # Change stm32u083rc to your chip name, if necessary. embassy-stm32 = { version = "0.1.0", path = "../../embassy-stm32", features = [ "defmt", "time-driver-any", "stm32u083rc", "memory-x", "unstable-pac", "exti", "chrono"] } -embassy-sync = { version = "0.5.0", path = "../../embassy-sync", features = ["defmt"] } +embassy-sync = { version = "0.6.0", path = "../../embassy-sync", features = ["defmt"] } embassy-executor = { version = "0.5.0", path = "../../embassy-executor", features = ["arch-cortex-m", "executor-thread", "defmt", "integrated-timers"] } embassy-time = { version = "0.3.0", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime", "tick-hz-32_768"] } embassy-usb = { version = "0.2.0", path = "../../embassy-usb", default-features = false, features = ["defmt"] } diff --git a/examples/stm32u5/Cargo.toml b/examples/stm32u5/Cargo.toml index 93127bcb7..24c9263a3 100644 --- a/examples/stm32u5/Cargo.toml +++ b/examples/stm32u5/Cargo.toml @@ -7,7 +7,7 @@ license = "MIT OR Apache-2.0" [dependencies] # Change stm32u585ai to your chip name, if necessary. embassy-stm32 = { version = "0.1.0", path = "../../embassy-stm32", features = ["defmt", "unstable-pac", "stm32u585ai", "time-driver-any", "memory-x" ] } -embassy-sync = { version = "0.5.0", path = "../../embassy-sync", features = ["defmt"] } +embassy-sync = { version = "0.6.0", path = "../../embassy-sync", features = ["defmt"] } embassy-executor = { version = "0.5.0", path = "../../embassy-executor", features = ["task-arena-size-32768", "arch-cortex-m", "executor-thread", "defmt", "integrated-timers"] } embassy-time = { version = "0.3.0", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime", "tick-hz-32_768"] } embassy-usb = { version = "0.2.0", path = "../../embassy-usb", features = ["defmt"] } diff --git a/examples/stm32wb/Cargo.toml b/examples/stm32wb/Cargo.toml index 82419ed10..92865b41c 100644 --- a/examples/stm32wb/Cargo.toml +++ b/examples/stm32wb/Cargo.toml @@ -8,7 +8,7 @@ license = "MIT OR Apache-2.0" # Change stm32wb55rg to your chip name in both dependencies, if necessary. embassy-stm32 = { version = "0.1.0", path = "../../embassy-stm32", features = [ "defmt", "stm32wb55rg", "time-driver-any", "memory-x", "exti"] } embassy-stm32-wpan = { version = "0.1.0", path = "../../embassy-stm32-wpan", features = ["defmt", "stm32wb55rg"] } -embassy-sync = { version = "0.5.0", path = "../../embassy-sync", features = ["defmt"] } +embassy-sync = { version = "0.6.0", path = "../../embassy-sync", features = ["defmt"] } embassy-executor = { version = "0.5.0", path = "../../embassy-executor", features = ["task-arena-size-32768", "arch-cortex-m", "executor-thread", "defmt", "integrated-timers"] } embassy-time = { version = "0.3.0", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime", "tick-hz-32_768"] } embassy-net = { version = "0.4.0", path = "../../embassy-net", features = ["defmt", "udp", "proto-ipv6", "medium-ieee802154", ], optional=true } diff --git a/examples/stm32wba/Cargo.toml b/examples/stm32wba/Cargo.toml index ca55cbe92..60f6e9201 100644 --- a/examples/stm32wba/Cargo.toml +++ b/examples/stm32wba/Cargo.toml @@ -6,7 +6,7 @@ license = "MIT OR Apache-2.0" [dependencies] embassy-stm32 = { version = "0.1.0", path = "../../embassy-stm32", features = [ "defmt", "stm32wba52cg", "time-driver-any", "memory-x", "exti"] } -embassy-sync = { version = "0.5.0", path = "../../embassy-sync", features = ["defmt"] } +embassy-sync = { version = "0.6.0", path = "../../embassy-sync", features = ["defmt"] } embassy-executor = { version = "0.5.0", path = "../../embassy-executor", features = ["task-arena-size-32768", "arch-cortex-m", "executor-thread", "defmt", "integrated-timers"] } embassy-time = { version = "0.3.0", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime", "tick-hz-32_768"] } embassy-net = { version = "0.4.0", path = "../../embassy-net", features = ["defmt", "udp", "proto-ipv6", "medium-ieee802154", ], optional=true } diff --git a/examples/stm32wl/Cargo.toml b/examples/stm32wl/Cargo.toml index b467b97a9..29cd4d466 100644 --- a/examples/stm32wl/Cargo.toml +++ b/examples/stm32wl/Cargo.toml @@ -7,7 +7,7 @@ license = "MIT OR Apache-2.0" [dependencies] # Change stm32wl55jc-cm4 to your chip name, if necessary. embassy-stm32 = { version = "0.1.0", path = "../../embassy-stm32", features = ["defmt", "stm32wl55jc-cm4", "time-driver-any", "memory-x", "unstable-pac", "exti", "chrono"] } -embassy-sync = { version = "0.5.0", path = "../../embassy-sync", features = ["defmt"] } +embassy-sync = { version = "0.6.0", path = "../../embassy-sync", features = ["defmt"] } embassy-executor = { version = "0.5.0", path = "../../embassy-executor", features = ["task-arena-size-4096", "arch-cortex-m", "executor-thread", "defmt", "integrated-timers"] } embassy-time = { version = "0.3.0", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime", "tick-hz-32_768"] } embassy-embedded-hal = { version = "0.1.0", path = "../../embassy-embedded-hal" } diff --git a/examples/wasm/Cargo.toml b/examples/wasm/Cargo.toml index 3d2300b59..e7840d52e 100644 --- a/examples/wasm/Cargo.toml +++ b/examples/wasm/Cargo.toml @@ -8,7 +8,7 @@ license = "MIT OR Apache-2.0" crate-type = ["cdylib"] [dependencies] -embassy-sync = { version = "0.5.0", path = "../../embassy-sync", features = ["log"] } +embassy-sync = { version = "0.6.0", path = "../../embassy-sync", features = ["log"] } embassy-executor = { version = "0.5.0", path = "../../embassy-executor", features = ["arch-wasm", "executor-thread", "log", "integrated-timers"] } embassy-time = { version = "0.3.0", path = "../../embassy-time", features = ["log", "wasm", ] } diff --git a/tests/nrf51422/Cargo.toml b/tests/nrf51422/Cargo.toml index 07236987b..70de9d321 100644 --- a/tests/nrf51422/Cargo.toml +++ b/tests/nrf51422/Cargo.toml @@ -8,7 +8,7 @@ license = "MIT OR Apache-2.0" teleprobe-meta = "1" embassy-futures = { version = "0.1.0", path = "../../embassy-futures" } -embassy-sync = { version = "0.5.0", path = "../../embassy-sync", features = ["defmt", ] } +embassy-sync = { version = "0.6.0", path = "../../embassy-sync", features = ["defmt", ] } embassy-executor = { version = "0.5.0", path = "../../embassy-executor", features = ["arch-cortex-m", "executor-thread", "defmt", "task-arena-size-128", "integrated-timers"] } embassy-time = { version = "0.3.0", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime"] } embassy-nrf = { version = "0.1.0", path = "../../embassy-nrf", features = ["defmt", "nrf51", "time-driver-rtc1", "unstable-pac", "time", "gpiote"] } diff --git a/tests/nrf52840/Cargo.toml b/tests/nrf52840/Cargo.toml index 84ca99f1f..4b89ec569 100644 --- a/tests/nrf52840/Cargo.toml +++ b/tests/nrf52840/Cargo.toml @@ -8,7 +8,7 @@ license = "MIT OR Apache-2.0" teleprobe-meta = "1" embassy-futures = { version = "0.1.0", path = "../../embassy-futures" } -embassy-sync = { version = "0.5.0", path = "../../embassy-sync", features = ["defmt", ] } +embassy-sync = { version = "0.6.0", path = "../../embassy-sync", features = ["defmt", ] } embassy-executor = { version = "0.5.0", path = "../../embassy-executor", features = ["arch-cortex-m", "executor-thread", "defmt", "task-arena-size-16384", "integrated-timers"] } embassy-time = { version = "0.3.0", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime"] } embassy-nrf = { version = "0.1.0", path = "../../embassy-nrf", features = ["defmt", "nrf52840", "time-driver-rtc1", "gpiote", "unstable-pac"] } diff --git a/tests/riscv32/Cargo.toml b/tests/riscv32/Cargo.toml index 94eda3c09..909f9a72c 100644 --- a/tests/riscv32/Cargo.toml +++ b/tests/riscv32/Cargo.toml @@ -6,7 +6,7 @@ license = "MIT OR Apache-2.0" [dependencies] critical-section = { version = "1.1.1", features = ["restore-state-bool"] } -embassy-sync = { version = "0.5.0", path = "../../embassy-sync" } +embassy-sync = { version = "0.6.0", path = "../../embassy-sync" } embassy-executor = { version = "0.5.0", path = "../../embassy-executor", features = ["arch-riscv32", "executor-thread"] } embassy-time = { version = "0.3.0", path = "../../embassy-time" } embassy-futures = { version = "0.1.0", path = "../../embassy-futures" } diff --git a/tests/rp/Cargo.toml b/tests/rp/Cargo.toml index a602e4065..b7eee92e8 100644 --- a/tests/rp/Cargo.toml +++ b/tests/rp/Cargo.toml @@ -7,7 +7,7 @@ license = "MIT OR Apache-2.0" [dependencies] teleprobe-meta = "1.1" -embassy-sync = { version = "0.5.0", path = "../../embassy-sync", features = ["defmt"] } +embassy-sync = { version = "0.6.0", path = "../../embassy-sync", features = ["defmt"] } embassy-executor = { version = "0.5.0", path = "../../embassy-executor", features = ["task-arena-size-32768", "arch-cortex-m", "executor-thread", "defmt", "integrated-timers"] } embassy-time = { version = "0.3.0", path = "../../embassy-time", features = ["defmt", ] } embassy-rp = { version = "0.1.0", path = "../../embassy-rp", features = [ "defmt", "unstable-pac", "time-driver", "critical-section-impl", "intrinsics", "rom-v2-intrinsics", "run-from-ram"] } diff --git a/tests/stm32/Cargo.toml b/tests/stm32/Cargo.toml index 23dfd1565..f6d1d98eb 100644 --- a/tests/stm32/Cargo.toml +++ b/tests/stm32/Cargo.toml @@ -57,7 +57,7 @@ cm0 = ["portable-atomic/unsafe-assume-single-core"] [dependencies] teleprobe-meta = "1" -embassy-sync = { version = "0.5.0", path = "../../embassy-sync", features = ["defmt"] } +embassy-sync = { version = "0.6.0", path = "../../embassy-sync", features = ["defmt"] } embassy-executor = { version = "0.5.0", path = "../../embassy-executor", features = ["arch-cortex-m", "executor-thread", "defmt", "integrated-timers"] } embassy-time = { version = "0.3.0", path = "../../embassy-time", features = ["defmt", "tick-hz-131_072", "defmt-timestamp-uptime"] } embassy-stm32 = { version = "0.1.0", path = "../../embassy-stm32", features = [ "defmt", "unstable-pac", "memory-x", "time-driver-any"] } From d040dfaff99d5ad444498ff6940aca63a4487491 Mon Sep 17 00:00:00 2001 From: Ulf Lilleengen Date: Wed, 29 May 2024 12:21:41 +0200 Subject: [PATCH 419/581] add missing entries to changelog --- embassy-sync/CHANGELOG.md | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/embassy-sync/CHANGELOG.md b/embassy-sync/CHANGELOG.md index b61d81daa..14c81021f 100644 --- a/embassy-sync/CHANGELOG.md +++ b/embassy-sync/CHANGELOG.md @@ -14,6 +14,10 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0 - Add `capacity`, `free_capacity`, `clear`, `len`, `is_empty` and `is_full` functions to `PubSubChannel`. - Made `PubSubBehavior` sealed - If you called `.publish_immediate(...)` on the queue directly before, then now call `.immediate_publisher().publish_immediate(...)` +- Add OnceLock sync primitive. +- Add constructor for DynamicChannel +- Add ready_to_receive functions to Channel and Receiver. +- Add clear function to all channels. ## 0.5.0 - 2023-12-04 From 52965ae96af4f9433da4467c65a4e3012c25d13a Mon Sep 17 00:00:00 2001 From: Ulf Lilleengen Date: Wed, 29 May 2024 12:38:33 +0200 Subject: [PATCH 420/581] remove duplicate entry --- embassy-sync/CHANGELOG.md | 1 - 1 file changed, 1 deletion(-) diff --git a/embassy-sync/CHANGELOG.md b/embassy-sync/CHANGELOG.md index 14c81021f..a283adc0c 100644 --- a/embassy-sync/CHANGELOG.md +++ b/embassy-sync/CHANGELOG.md @@ -17,7 +17,6 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0 - Add OnceLock sync primitive. - Add constructor for DynamicChannel - Add ready_to_receive functions to Channel and Receiver. -- Add clear function to all channels. ## 0.5.0 - 2023-12-04 From b282edcc6e98b6d86e4faa5bf5e7274571684e49 Mon Sep 17 00:00:00 2001 From: Lucas Granberg Date: Wed, 29 May 2024 14:56:29 +0300 Subject: [PATCH 421/581] add set_as_analog to stm32 gpio Flex --- embassy-stm32/src/gpio.rs | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/embassy-stm32/src/gpio.rs b/embassy-stm32/src/gpio.rs index 808a5bc82..d60a857ef 100644 --- a/embassy-stm32/src/gpio.rs +++ b/embassy-stm32/src/gpio.rs @@ -128,6 +128,15 @@ impl<'d> Flex<'d> { }); } + /// Put the pin into analog mode + /// + /// This mode is used by ADC and COMP but usually there is no need to set this manually + /// as the mode change is handled by the driver. + #[inline] + pub fn set_as_analog(&mut self) { + self.pin.set_as_analog(); + } + /// Put the pin into AF mode, unchecked. /// /// This puts the pin into the AF mode, with the requested number, pull and speed. This is From a23fa8dcb2e22ed2d8bac15fd875dfe53af43eda Mon Sep 17 00:00:00 2001 From: Bruno Bousquet <21108660+brunob45@users.noreply.github.com> Date: Wed, 29 May 2024 09:14:05 -0400 Subject: [PATCH 422/581] Apply suggestions from code review Co-authored-by: Romain Reignier --- embassy-stm32/src/timer/pwm_input.rs | 8 ++++---- examples/stm32f1/src/bin/input_capture.rs | 2 +- examples/stm32f1/src/bin/pwm_input.rs | 2 +- examples/stm32f4/src/bin/pwm_input.rs | 2 +- 4 files changed, 7 insertions(+), 7 deletions(-) diff --git a/embassy-stm32/src/timer/pwm_input.rs b/embassy-stm32/src/timer/pwm_input.rs index d34ba086f..d3fe7632a 100644 --- a/embassy-stm32/src/timer/pwm_input.rs +++ b/embassy-stm32/src/timer/pwm_input.rs @@ -1,4 +1,4 @@ -//! Input capture driver. +//! PWM Input driver. use embassy_hal_internal::into_ref; @@ -8,7 +8,7 @@ use crate::gpio::{AFType, Pull}; use crate::time::Hertz; use crate::Peripheral; -/// Input capture driver. +/// PWM Input driver. pub struct PwmInput<'d, T: GeneralInstance4Channel> { channel: Channel, inner: Timer<'d, T>, @@ -20,7 +20,7 @@ fn regs_gp16(ptr: *mut ()) -> crate::pac::timer::TimGp16 { } impl<'d, T: GeneralInstance4Channel> PwmInput<'d, T> { - /// Create a new input capture driver. + /// Create a new PWM input driver. pub fn new( tim: impl Peripheral

+ 'd, pin: impl Peripheral

> + 'd, @@ -37,7 +37,7 @@ impl<'d, T: GeneralInstance4Channel> PwmInput<'d, T> { Self::new_inner(tim, freq, Channel::Ch1, Channel::Ch2) } - /// Create a new input capture driver. + /// Create a new PWM input driver. pub fn new_alt( tim: impl Peripheral

+ 'd, pin: impl Peripheral

> + 'd, diff --git a/examples/stm32f1/src/bin/input_capture.rs b/examples/stm32f1/src/bin/input_capture.rs index 417830231..5e2dab9e6 100644 --- a/examples/stm32f1/src/bin/input_capture.rs +++ b/examples/stm32f1/src/bin/input_capture.rs @@ -43,7 +43,7 @@ async fn main(spawner: Spawner) { let mut ic = InputCapture::new(p.TIM2, None, None, Some(ch3), None, Irqs, khz(1000), Default::default()); loop { - info!("wait for risign edge"); + info!("wait for rising edge"); ic.wait_for_rising_edge(Channel::Ch3).await; let capture_value = ic.get_capture_value(Channel::Ch3); diff --git a/examples/stm32f1/src/bin/pwm_input.rs b/examples/stm32f1/src/bin/pwm_input.rs index c051d1328..de6949eb4 100644 --- a/examples/stm32f1/src/bin/pwm_input.rs +++ b/examples/stm32f1/src/bin/pwm_input.rs @@ -11,7 +11,7 @@ use embassy_stm32::{bind_interrupts, peripherals, timer}; use embassy_time::Timer; use {defmt_rtt as _, panic_probe as _}; -/// Connect PB2 and PB10 with a 1k Ohm resistor +/// Connect PA0 and PC13 with a 1k Ohm resistor #[embassy_executor::task] async fn blinky(led: peripherals::PC13) { diff --git a/examples/stm32f4/src/bin/pwm_input.rs b/examples/stm32f4/src/bin/pwm_input.rs index eb1e7cb87..30cefac3a 100644 --- a/examples/stm32f4/src/bin/pwm_input.rs +++ b/examples/stm32f4/src/bin/pwm_input.rs @@ -11,7 +11,7 @@ use embassy_stm32::{bind_interrupts, peripherals, timer}; use embassy_time::Timer; use {defmt_rtt as _, panic_probe as _}; -/// Connect PB2 and PB10 with a 1k Ohm resistor +/// Connect PB2 and PA6 with a 1k Ohm resistor #[embassy_executor::task] async fn blinky(led: peripherals::PB2) { From 292c1dd0b858fe8dde74edd2f60a96f4c9e588da Mon Sep 17 00:00:00 2001 From: Bruno Bousquet <21108660+brunob45@users.noreply.github.com> Date: Wed, 29 May 2024 09:58:46 -0400 Subject: [PATCH 423/581] rename get_width_ticks and add info!() in examples --- embassy-stm32/src/timer/pwm_input.rs | 6 +++--- examples/stm32f1/src/bin/pwm_input.rs | 9 ++++----- examples/stm32f4/src/bin/pwm_input.rs | 9 ++++----- 3 files changed, 11 insertions(+), 13 deletions(-) diff --git a/embassy-stm32/src/timer/pwm_input.rs b/embassy-stm32/src/timer/pwm_input.rs index d3fe7632a..7bcb7802a 100644 --- a/embassy-stm32/src/timer/pwm_input.rs +++ b/embassy-stm32/src/timer/pwm_input.rs @@ -114,8 +114,8 @@ impl<'d, T: GeneralInstance4Channel> PwmInput<'d, T> { self.inner.get_capture_value(self.channel) } - /// Get the duty tick count - pub fn get_duty_ticks(&self) -> u32 { + /// Get the pulse width tick count + pub fn get_width_ticks(&self) -> u32 { self.inner.get_capture_value(match self.channel { Channel::Ch1 => Channel::Ch2, Channel::Ch2 => Channel::Ch1, @@ -129,6 +129,6 @@ impl<'d, T: GeneralInstance4Channel> PwmInput<'d, T> { if period == 0 { return 0.; } - 100. * (self.get_duty_ticks() as f32) / (period as f32) + 100. * (self.get_width_ticks() as f32) / (period as f32) } } diff --git a/examples/stm32f1/src/bin/pwm_input.rs b/examples/stm32f1/src/bin/pwm_input.rs index de6949eb4..9883280cf 100644 --- a/examples/stm32f1/src/bin/pwm_input.rs +++ b/examples/stm32f1/src/bin/pwm_input.rs @@ -1,7 +1,6 @@ #![no_std] #![no_main] -use cortex_m::asm; use defmt::*; use embassy_executor::Spawner; use embassy_stm32::gpio::{Level, Output, Pull, Speed}; @@ -44,9 +43,9 @@ async fn main(spawner: Spawner) { loop { Timer::after_millis(500).await; - let _per = pwm_input.get_period_ticks(); - let _dc = pwm_input.get_duty_ticks(); - let _pc = pwm_input.get_duty_cycle(); - asm::nop(); + let period = pwm_input.get_period_ticks(); + let width = pwm_input.get_width_ticks(); + let duty_cycle = pwm_input.get_duty_cycle(); + info!("period ticks: {} width ticks: {} duty cycle: {}", period, width, duty_cycle); } } diff --git a/examples/stm32f4/src/bin/pwm_input.rs b/examples/stm32f4/src/bin/pwm_input.rs index 30cefac3a..8fe1fdb5b 100644 --- a/examples/stm32f4/src/bin/pwm_input.rs +++ b/examples/stm32f4/src/bin/pwm_input.rs @@ -1,7 +1,6 @@ #![no_std] #![no_main] -use cortex_m::asm; use defmt::*; use embassy_executor::Spawner; use embassy_stm32::gpio::{Level, Output, Pull, Speed}; @@ -44,9 +43,9 @@ async fn main(spawner: Spawner) { loop { Timer::after_millis(500).await; - let _per = pwm_input.get_period_ticks(); - let _dc = pwm_input.get_duty_ticks(); - let _pc = pwm_input.get_duty_cycle(); - asm::nop(); + let period = pwm_input.get_period_ticks(); + let width = pwm_input.get_width_ticks(); + let duty_cycle = pwm_input.get_duty_cycle(); + info!("period ticks: {} width ticks: {} duty cycle: {}", period, width, duty_cycle); } } From a87b33303403ba3601d0c631b9efe1cb3853c73b Mon Sep 17 00:00:00 2001 From: Bruno Bousquet <21108660+brunob45@users.noreply.github.com> Date: Wed, 29 May 2024 10:02:54 -0400 Subject: [PATCH 424/581] fix fmt --- examples/stm32f1/src/bin/pwm_input.rs | 5 ++++- examples/stm32f4/src/bin/pwm_input.rs | 5 ++++- 2 files changed, 8 insertions(+), 2 deletions(-) diff --git a/examples/stm32f1/src/bin/pwm_input.rs b/examples/stm32f1/src/bin/pwm_input.rs index 9883280cf..f74853d4e 100644 --- a/examples/stm32f1/src/bin/pwm_input.rs +++ b/examples/stm32f1/src/bin/pwm_input.rs @@ -46,6 +46,9 @@ async fn main(spawner: Spawner) { let period = pwm_input.get_period_ticks(); let width = pwm_input.get_width_ticks(); let duty_cycle = pwm_input.get_duty_cycle(); - info!("period ticks: {} width ticks: {} duty cycle: {}", period, width, duty_cycle); + info!( + "period ticks: {} width ticks: {} duty cycle: {}", + period, width, duty_cycle + ); } } diff --git a/examples/stm32f4/src/bin/pwm_input.rs b/examples/stm32f4/src/bin/pwm_input.rs index 8fe1fdb5b..ce200549d 100644 --- a/examples/stm32f4/src/bin/pwm_input.rs +++ b/examples/stm32f4/src/bin/pwm_input.rs @@ -46,6 +46,9 @@ async fn main(spawner: Spawner) { let period = pwm_input.get_period_ticks(); let width = pwm_input.get_width_ticks(); let duty_cycle = pwm_input.get_duty_cycle(); - info!("period ticks: {} width ticks: {} duty cycle: {}", period, width, duty_cycle); + info!( + "period ticks: {} width ticks: {} duty cycle: {}", + period, width, duty_cycle + ); } } From c46172acac0be14b99148c2ec7aa38c9ac605fe1 Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Thu, 30 May 2024 13:07:18 +0200 Subject: [PATCH 425/581] stm32: remove pointer-to-pointer-to-registers. in chiptool pacs the register block struct is already a pointer, so using pointers to it is redundant. --- embassy-stm32/src/can/fd/peripheral.rs | 5 +- embassy-stm32/src/can/fdcan.rs | 30 ++++--- embassy-stm32/src/cryp/mod.rs | 104 ++++++++++++------------- embassy-stm32/src/dac/mod.rs | 6 +- embassy-stm32/src/dsihost.rs | 6 +- embassy-stm32/src/ltdc.rs | 6 +- embassy-stm32/src/rcc/f013.rs | 2 +- embassy-stm32/src/rtc/mod.rs | 8 +- embassy-stm32/src/rtc/v2.rs | 8 +- embassy-stm32/src/rtc/v3.rs | 8 +- 10 files changed, 93 insertions(+), 90 deletions(-) diff --git a/embassy-stm32/src/can/fd/peripheral.rs b/embassy-stm32/src/can/fd/peripheral.rs index 9cd5f0785..7321ab230 100644 --- a/embassy-stm32/src/can/fd/peripheral.rs +++ b/embassy-stm32/src/can/fd/peripheral.rs @@ -20,8 +20,9 @@ enum LoopbackMode { } pub struct Registers { - pub regs: &'static crate::pac::can::Fdcan, - pub msgram: &'static crate::pac::fdcanram::Fdcanram, + pub regs: crate::pac::can::Fdcan, + pub msgram: crate::pac::fdcanram::Fdcanram, + #[allow(dead_code)] pub msg_ram_offset: usize, } diff --git a/embassy-stm32/src/can/fdcan.rs b/embassy-stm32/src/can/fdcan.rs index b772a3ca0..d0c8db090 100644 --- a/embassy-stm32/src/can/fdcan.rs +++ b/embassy-stm32/src/can/fdcan.rs @@ -265,6 +265,7 @@ impl<'d, T: Instance> CanConfigurator<'d, T> { }); T::registers().into_mode(self.config, mode); Can { + _phantom: PhantomData, config: self.config, info: self.info, state: self.state, @@ -292,10 +293,11 @@ impl<'d, T: Instance> CanConfigurator<'d, T> { /// FDCAN Instance pub struct Can<'d> { + _phantom: PhantomData<&'d ()>, config: crate::can::fd::config::FdCanConfig, info: &'static Info, state: &'static State, - instance: &'d crate::pac::can::Fdcan, + instance: crate::pac::can::Fdcan, _mode: OperatingMode, properties: Properties, } @@ -354,6 +356,7 @@ impl<'d> Can<'d> { pub fn split(self) -> (CanTx<'d>, CanRx<'d>, Properties) { ( CanTx { + _phantom: PhantomData, info: self.info, state: self.state, config: self.config, @@ -361,6 +364,7 @@ impl<'d> Can<'d> { _mode: self._mode, }, CanRx { + _phantom: PhantomData, info: self.info, state: self.state, _instance: self.instance, @@ -372,6 +376,7 @@ impl<'d> Can<'d> { /// Join split rx and tx portions back together pub fn join(tx: CanTx<'d>, rx: CanRx<'d>) -> Self { Can { + _phantom: PhantomData, config: tx.config, info: tx.info, state: tx.state, @@ -408,9 +413,10 @@ pub type TxBuf = Channel { + _phantom: PhantomData<&'d ()>, info: &'static Info, state: &'static State, - _instance: &'d crate::pac::can::Fdcan, + _instance: crate::pac::can::Fdcan, _mode: OperatingMode, tx_buf: &'static TxBuf, rx_buf: &'static RxBuf, @@ -421,12 +427,13 @@ impl<'c, 'd, const TX_BUF_SIZE: usize, const RX_BUF_SIZE: usize> BufferedCan<'d, fn new( info: &'static Info, state: &'static State, - _instance: &'d crate::pac::can::Fdcan, + _instance: crate::pac::can::Fdcan, _mode: OperatingMode, tx_buf: &'static TxBuf, rx_buf: &'static RxBuf, ) -> Self { BufferedCan { + _phantom: PhantomData, info, state, _instance, @@ -539,9 +546,10 @@ pub type BufferedFdCanReceiver = DynamicReceiver<'static, Result { + _phantom: PhantomData<&'d ()>, info: &'static Info, state: &'static State, - _instance: &'d crate::pac::can::Fdcan, + _instance: crate::pac::can::Fdcan, _mode: OperatingMode, tx_buf: &'static TxFdBuf, rx_buf: &'static RxFdBuf, @@ -552,12 +560,13 @@ impl<'c, 'd, const TX_BUF_SIZE: usize, const RX_BUF_SIZE: usize> BufferedCanFd<' fn new( info: &'static Info, state: &'static State, - _instance: &'d crate::pac::can::Fdcan, + _instance: crate::pac::can::Fdcan, _mode: OperatingMode, tx_buf: &'static TxFdBuf, rx_buf: &'static RxFdBuf, ) -> Self { BufferedCanFd { + _phantom: PhantomData, info, state, _instance, @@ -634,9 +643,10 @@ impl<'c, 'd, const TX_BUF_SIZE: usize, const RX_BUF_SIZE: usize> Drop for Buffer /// FDCAN Rx only Instance pub struct CanRx<'d> { + _phantom: PhantomData<&'d ()>, info: &'static Info, state: &'static State, - _instance: &'d crate::pac::can::Fdcan, + _instance: crate::pac::can::Fdcan, _mode: OperatingMode, } @@ -654,10 +664,11 @@ impl<'d> CanRx<'d> { /// FDCAN Tx only Instance pub struct CanTx<'d> { + _phantom: PhantomData<&'d ()>, info: &'static Info, state: &'static State, config: crate::can::fd::config::FdCanConfig, - _instance: &'d crate::pac::can::Fdcan, + _instance: crate::pac::can::Fdcan, _mode: OperatingMode, } @@ -966,7 +977,6 @@ trait SealedInstance { const MSG_RAM_OFFSET: usize; fn info() -> &'static Info; - //fn regs() -> &'static crate::pac::can::Fdcan; fn registers() -> crate::can::fd::peripheral::Registers; fn state() -> &'static State; unsafe fn mut_state() -> &'static mut State; @@ -994,7 +1004,7 @@ macro_rules! impl_fdcan { fn info() -> &'static Info { static INFO: Info = Info { - regs: Registers{regs: &crate::pac::$inst, msgram: &crate::pac::$msg_ram_inst, msg_ram_offset: $msg_ram_offset}, + regs: Registers{regs: crate::pac::$inst, msgram: crate::pac::$msg_ram_inst, msg_ram_offset: $msg_ram_offset}, interrupt0: crate::_generated::peripheral_interrupts::$inst::IT0::IRQ, _interrupt1: crate::_generated::peripheral_interrupts::$inst::IT1::IRQ, tx_waker: crate::_generated::peripheral_interrupts::$inst::IT0::pend, @@ -1002,7 +1012,7 @@ macro_rules! impl_fdcan { &INFO } fn registers() -> Registers { - Registers{regs: &crate::pac::$inst, msgram: &crate::pac::$msg_ram_inst, msg_ram_offset: Self::MSG_RAM_OFFSET} + Registers{regs: crate::pac::$inst, msgram: crate::pac::$msg_ram_inst, msg_ram_offset: Self::MSG_RAM_OFFSET} } unsafe fn mut_state() -> &'static mut State { static mut STATE: State = State::new(); diff --git a/embassy-stm32/src/cryp/mod.rs b/embassy-stm32/src/cryp/mod.rs index f19c94fda..e7808b454 100644 --- a/embassy-stm32/src/cryp/mod.rs +++ b/embassy-stm32/src/cryp/mod.rs @@ -51,16 +51,16 @@ pub trait Cipher<'c> { fn iv(&self) -> &[u8]; /// Sets the processor algorithm mode according to the associated cipher. - fn set_algomode(&self, p: &pac::cryp::Cryp); + fn set_algomode(&self, p: pac::cryp::Cryp); /// Performs any key preparation within the processor, if necessary. - fn prepare_key(&self, _p: &pac::cryp::Cryp) {} + fn prepare_key(&self, _p: pac::cryp::Cryp) {} /// Performs any cipher-specific initialization. - fn init_phase_blocking(&self, _p: &pac::cryp::Cryp, _cryp: &Cryp) {} + fn init_phase_blocking(&self, _p: pac::cryp::Cryp, _cryp: &Cryp) {} /// Performs any cipher-specific initialization. - async fn init_phase(&self, _p: &pac::cryp::Cryp, _cryp: &mut Cryp<'_, T, DmaIn, DmaOut>) + async fn init_phase(&self, _p: pac::cryp::Cryp, _cryp: &mut Cryp<'_, T, DmaIn, DmaOut>) where DmaIn: crate::cryp::DmaIn, DmaOut: crate::cryp::DmaOut, @@ -68,14 +68,14 @@ pub trait Cipher<'c> { } /// Called prior to processing the last data block for cipher-specific operations. - fn pre_final(&self, _p: &pac::cryp::Cryp, _dir: Direction, _padding_len: usize) -> [u32; 4] { + fn pre_final(&self, _p: pac::cryp::Cryp, _dir: Direction, _padding_len: usize) -> [u32; 4] { return [0; 4]; } /// Called after processing the last data block for cipher-specific operations. fn post_final_blocking( &self, - _p: &pac::cryp::Cryp, + _p: pac::cryp::Cryp, _cryp: &Cryp, _dir: Direction, _int_data: &mut [u8; AES_BLOCK_SIZE], @@ -87,7 +87,7 @@ pub trait Cipher<'c> { /// Called after processing the last data block for cipher-specific operations. async fn post_final( &self, - _p: &pac::cryp::Cryp, + _p: pac::cryp::Cryp, _cryp: &mut Cryp<'_, T, DmaIn, DmaOut>, _dir: Direction, _int_data: &mut [u8; AES_BLOCK_SIZE], @@ -142,7 +142,7 @@ impl<'c, const KEY_SIZE: usize> Cipher<'c> for TdesEcb<'c, KEY_SIZE> { self.iv } - fn set_algomode(&self, p: &pac::cryp::Cryp) { + fn set_algomode(&self, p: pac::cryp::Cryp) { #[cfg(cryp_v1)] { p.cr().modify(|w| w.set_algomode(0)); @@ -184,7 +184,7 @@ impl<'c, const KEY_SIZE: usize> Cipher<'c> for TdesCbc<'c, KEY_SIZE> { self.iv } - fn set_algomode(&self, p: &pac::cryp::Cryp) { + fn set_algomode(&self, p: pac::cryp::Cryp) { #[cfg(cryp_v1)] { p.cr().modify(|w| w.set_algomode(1)); @@ -226,7 +226,7 @@ impl<'c, const KEY_SIZE: usize> Cipher<'c> for DesEcb<'c, KEY_SIZE> { self.iv } - fn set_algomode(&self, p: &pac::cryp::Cryp) { + fn set_algomode(&self, p: pac::cryp::Cryp) { #[cfg(cryp_v1)] { p.cr().modify(|w| w.set_algomode(2)); @@ -267,7 +267,7 @@ impl<'c, const KEY_SIZE: usize> Cipher<'c> for DesCbc<'c, KEY_SIZE> { self.iv } - fn set_algomode(&self, p: &pac::cryp::Cryp) { + fn set_algomode(&self, p: pac::cryp::Cryp) { #[cfg(cryp_v1)] { p.cr().modify(|w| w.set_algomode(3)); @@ -308,7 +308,7 @@ impl<'c, const KEY_SIZE: usize> Cipher<'c> for AesEcb<'c, KEY_SIZE> { self.iv } - fn prepare_key(&self, p: &pac::cryp::Cryp) { + fn prepare_key(&self, p: pac::cryp::Cryp) { #[cfg(cryp_v1)] { p.cr().modify(|w| w.set_algomode(7)); @@ -322,7 +322,7 @@ impl<'c, const KEY_SIZE: usize> Cipher<'c> for AesEcb<'c, KEY_SIZE> { while p.sr().read().busy() {} } - fn set_algomode(&self, p: &pac::cryp::Cryp) { + fn set_algomode(&self, p: pac::cryp::Cryp) { #[cfg(cryp_v1)] { p.cr().modify(|w| w.set_algomode(2)); @@ -365,7 +365,7 @@ impl<'c, const KEY_SIZE: usize> Cipher<'c> for AesCbc<'c, KEY_SIZE> { self.iv } - fn prepare_key(&self, p: &pac::cryp::Cryp) { + fn prepare_key(&self, p: pac::cryp::Cryp) { #[cfg(cryp_v1)] { p.cr().modify(|w| w.set_algomode(7)); @@ -379,7 +379,7 @@ impl<'c, const KEY_SIZE: usize> Cipher<'c> for AesCbc<'c, KEY_SIZE> { while p.sr().read().busy() {} } - fn set_algomode(&self, p: &pac::cryp::Cryp) { + fn set_algomode(&self, p: pac::cryp::Cryp) { #[cfg(cryp_v1)] { p.cr().modify(|w| w.set_algomode(5)); @@ -421,7 +421,7 @@ impl<'c, const KEY_SIZE: usize> Cipher<'c> for AesCtr<'c, KEY_SIZE> { self.iv } - fn set_algomode(&self, p: &pac::cryp::Cryp) { + fn set_algomode(&self, p: pac::cryp::Cryp) { #[cfg(cryp_v1)] { p.cr().modify(|w| w.set_algomode(6)); @@ -469,29 +469,25 @@ impl<'c, const KEY_SIZE: usize> Cipher<'c> for AesGcm<'c, KEY_SIZE> { self.iv.as_slice() } - fn set_algomode(&self, p: &pac::cryp::Cryp) { + fn set_algomode(&self, p: pac::cryp::Cryp) { p.cr().modify(|w| w.set_algomode0(0)); p.cr().modify(|w| w.set_algomode3(true)); } - fn init_phase_blocking(&self, p: &pac::cryp::Cryp, _cryp: &Cryp) { + fn init_phase_blocking(&self, p: pac::cryp::Cryp, _cryp: &Cryp) { p.cr().modify(|w| w.set_gcm_ccmph(0)); p.cr().modify(|w| w.set_crypen(true)); while p.cr().read().crypen() {} } - async fn init_phase( - &self, - p: &pac::cryp::Cryp, - _cryp: &mut Cryp<'_, T, DmaIn, DmaOut>, - ) { + async fn init_phase(&self, p: pac::cryp::Cryp, _cryp: &mut Cryp<'_, T, DmaIn, DmaOut>) { p.cr().modify(|w| w.set_gcm_ccmph(0)); p.cr().modify(|w| w.set_crypen(true)); while p.cr().read().crypen() {} } #[cfg(cryp_v2)] - fn pre_final(&self, p: &pac::cryp::Cryp, dir: Direction, _padding_len: usize) -> [u32; 4] { + fn pre_final(&self, p: pac::cryp::Cryp, dir: Direction, _padding_len: usize) -> [u32; 4] { //Handle special GCM partial block process. if dir == Direction::Encrypt { p.cr().modify(|w| w.set_crypen(false)); @@ -505,7 +501,7 @@ impl<'c, const KEY_SIZE: usize> Cipher<'c> for AesGcm<'c, KEY_SIZE> { } #[cfg(any(cryp_v3, cryp_v4))] - fn pre_final(&self, p: &pac::cryp::Cryp, _dir: Direction, padding_len: usize) -> [u32; 4] { + fn pre_final(&self, p: pac::cryp::Cryp, _dir: Direction, padding_len: usize) -> [u32; 4] { //Handle special GCM partial block process. p.cr().modify(|w| w.set_npblb(padding_len as u8)); [0; 4] @@ -514,7 +510,7 @@ impl<'c, const KEY_SIZE: usize> Cipher<'c> for AesGcm<'c, KEY_SIZE> { #[cfg(cryp_v2)] fn post_final_blocking( &self, - p: &pac::cryp::Cryp, + p: pac::cryp::Cryp, cryp: &Cryp, dir: Direction, int_data: &mut [u8; AES_BLOCK_SIZE], @@ -540,7 +536,7 @@ impl<'c, const KEY_SIZE: usize> Cipher<'c> for AesGcm<'c, KEY_SIZE> { #[cfg(cryp_v2)] async fn post_final( &self, - p: &pac::cryp::Cryp, + p: pac::cryp::Cryp, cryp: &mut Cryp<'_, T, DmaIn, DmaOut>, dir: Direction, int_data: &mut [u8; AES_BLOCK_SIZE], @@ -614,29 +610,25 @@ impl<'c, const KEY_SIZE: usize> Cipher<'c> for AesGmac<'c, KEY_SIZE> { self.iv.as_slice() } - fn set_algomode(&self, p: &pac::cryp::Cryp) { + fn set_algomode(&self, p: pac::cryp::Cryp) { p.cr().modify(|w| w.set_algomode0(0)); p.cr().modify(|w| w.set_algomode3(true)); } - fn init_phase_blocking(&self, p: &pac::cryp::Cryp, _cryp: &Cryp) { + fn init_phase_blocking(&self, p: pac::cryp::Cryp, _cryp: &Cryp) { p.cr().modify(|w| w.set_gcm_ccmph(0)); p.cr().modify(|w| w.set_crypen(true)); while p.cr().read().crypen() {} } - async fn init_phase( - &self, - p: &pac::cryp::Cryp, - _cryp: &mut Cryp<'_, T, DmaIn, DmaOut>, - ) { + async fn init_phase(&self, p: pac::cryp::Cryp, _cryp: &mut Cryp<'_, T, DmaIn, DmaOut>) { p.cr().modify(|w| w.set_gcm_ccmph(0)); p.cr().modify(|w| w.set_crypen(true)); while p.cr().read().crypen() {} } #[cfg(cryp_v2)] - fn pre_final(&self, p: &pac::cryp::Cryp, dir: Direction, _padding_len: usize) -> [u32; 4] { + fn pre_final(&self, p: pac::cryp::Cryp, dir: Direction, _padding_len: usize) -> [u32; 4] { //Handle special GCM partial block process. if dir == Direction::Encrypt { p.cr().modify(|w| w.set_crypen(false)); @@ -650,7 +642,7 @@ impl<'c, const KEY_SIZE: usize> Cipher<'c> for AesGmac<'c, KEY_SIZE> { } #[cfg(any(cryp_v3, cryp_v4))] - fn pre_final(&self, p: &pac::cryp::Cryp, _dir: Direction, padding_len: usize) -> [u32; 4] { + fn pre_final(&self, p: pac::cryp::Cryp, _dir: Direction, padding_len: usize) -> [u32; 4] { //Handle special GCM partial block process. p.cr().modify(|w| w.set_npblb(padding_len as u8)); [0; 4] @@ -659,7 +651,7 @@ impl<'c, const KEY_SIZE: usize> Cipher<'c> for AesGmac<'c, KEY_SIZE> { #[cfg(cryp_v2)] fn post_final_blocking( &self, - p: &pac::cryp::Cryp, + p: pac::cryp::Cryp, cryp: &Cryp, dir: Direction, int_data: &mut [u8; AES_BLOCK_SIZE], @@ -685,7 +677,7 @@ impl<'c, const KEY_SIZE: usize> Cipher<'c> for AesGmac<'c, KEY_SIZE> { #[cfg(cryp_v2)] async fn post_final( &self, - p: &pac::cryp::Cryp, + p: pac::cryp::Cryp, cryp: &mut Cryp<'_, T, DmaIn, DmaOut>, dir: Direction, int_data: &mut [u8; AES_BLOCK_SIZE], @@ -815,12 +807,12 @@ impl<'c, const KEY_SIZE: usize, const TAG_SIZE: usize, const IV_SIZE: usize> Cip self.ctr.as_slice() } - fn set_algomode(&self, p: &pac::cryp::Cryp) { + fn set_algomode(&self, p: pac::cryp::Cryp) { p.cr().modify(|w| w.set_algomode0(1)); p.cr().modify(|w| w.set_algomode3(true)); } - fn init_phase_blocking(&self, p: &pac::cryp::Cryp, cryp: &Cryp) { + fn init_phase_blocking(&self, p: pac::cryp::Cryp, cryp: &Cryp) { p.cr().modify(|w| w.set_gcm_ccmph(0)); cryp.write_bytes_blocking(Self::BLOCK_SIZE, &self.block0); @@ -829,7 +821,7 @@ impl<'c, const KEY_SIZE: usize, const TAG_SIZE: usize, const IV_SIZE: usize> Cip while p.cr().read().crypen() {} } - async fn init_phase(&self, p: &pac::cryp::Cryp, cryp: &mut Cryp<'_, T, DmaIn, DmaOut>) + async fn init_phase(&self, p: pac::cryp::Cryp, cryp: &mut Cryp<'_, T, DmaIn, DmaOut>) where DmaIn: crate::cryp::DmaIn, DmaOut: crate::cryp::DmaOut, @@ -847,7 +839,7 @@ impl<'c, const KEY_SIZE: usize, const TAG_SIZE: usize, const IV_SIZE: usize> Cip } #[cfg(cryp_v2)] - fn pre_final(&self, p: &pac::cryp::Cryp, dir: Direction, _padding_len: usize) -> [u32; 4] { + fn pre_final(&self, p: pac::cryp::Cryp, dir: Direction, _padding_len: usize) -> [u32; 4] { //Handle special CCM partial block process. let mut temp1 = [0; 4]; if dir == Direction::Decrypt { @@ -866,7 +858,7 @@ impl<'c, const KEY_SIZE: usize, const TAG_SIZE: usize, const IV_SIZE: usize> Cip } #[cfg(any(cryp_v3, cryp_v4))] - fn pre_final(&self, p: &pac::cryp::Cryp, _dir: Direction, padding_len: usize) -> [u32; 4] { + fn pre_final(&self, p: pac::cryp::Cryp, _dir: Direction, padding_len: usize) -> [u32; 4] { //Handle special GCM partial block process. p.cr().modify(|w| w.set_npblb(padding_len as u8)); [0; 4] @@ -875,7 +867,7 @@ impl<'c, const KEY_SIZE: usize, const TAG_SIZE: usize, const IV_SIZE: usize> Cip #[cfg(cryp_v2)] fn post_final_blocking( &self, - p: &pac::cryp::Cryp, + p: pac::cryp::Cryp, cryp: &Cryp, dir: Direction, int_data: &mut [u8; AES_BLOCK_SIZE], @@ -912,7 +904,7 @@ impl<'c, const KEY_SIZE: usize, const TAG_SIZE: usize, const IV_SIZE: usize> Cip #[cfg(cryp_v2)] async fn post_final( &self, - p: &pac::cryp::Cryp, + p: pac::cryp::Cryp, cryp: &mut Cryp<'_, T, DmaIn, DmaOut>, dir: Direction, int_data: &mut [u8; AES_BLOCK_SIZE], @@ -1083,9 +1075,9 @@ impl<'d, T: Instance, DmaIn, DmaOut> Cryp<'d, T, DmaIn, DmaOut> { // Set data type to 8-bit. This will match software implementations. T::regs().cr().modify(|w| w.set_datatype(2)); - ctx.cipher.prepare_key(&T::regs()); + ctx.cipher.prepare_key(T::regs()); - ctx.cipher.set_algomode(&T::regs()); + ctx.cipher.set_algomode(T::regs()); // Set encrypt/decrypt if dir == Direction::Encrypt { @@ -1115,7 +1107,7 @@ impl<'d, T: Instance, DmaIn, DmaOut> Cryp<'d, T, DmaIn, DmaOut> { // Flush in/out FIFOs T::regs().cr().modify(|w| w.fflush()); - ctx.cipher.init_phase_blocking(&T::regs(), self); + ctx.cipher.init_phase_blocking(T::regs(), self); self.store_context(&mut ctx); @@ -1166,9 +1158,9 @@ impl<'d, T: Instance, DmaIn, DmaOut> Cryp<'d, T, DmaIn, DmaOut> { // Set data type to 8-bit. This will match software implementations. T::regs().cr().modify(|w| w.set_datatype(2)); - ctx.cipher.prepare_key(&T::regs()); + ctx.cipher.prepare_key(T::regs()); - ctx.cipher.set_algomode(&T::regs()); + ctx.cipher.set_algomode(T::regs()); // Set encrypt/decrypt if dir == Direction::Encrypt { @@ -1198,7 +1190,7 @@ impl<'d, T: Instance, DmaIn, DmaOut> Cryp<'d, T, DmaIn, DmaOut> { // Flush in/out FIFOs T::regs().cr().modify(|w| w.fflush()); - ctx.cipher.init_phase(&T::regs(), self).await; + ctx.cipher.init_phase(T::regs(), self).await; self.store_context(&mut ctx); @@ -1462,7 +1454,7 @@ impl<'d, T: Instance, DmaIn, DmaOut> Cryp<'d, T, DmaIn, DmaOut> { // Handle the final block, which is incomplete. if last_block_remainder > 0 { let padding_len = C::BLOCK_SIZE - last_block_remainder; - let temp1 = ctx.cipher.pre_final(&T::regs(), ctx.dir, padding_len); + let temp1 = ctx.cipher.pre_final(T::regs(), ctx.dir, padding_len); let mut intermediate_data: [u8; AES_BLOCK_SIZE] = [0; AES_BLOCK_SIZE]; let mut last_block: [u8; AES_BLOCK_SIZE] = [0; AES_BLOCK_SIZE]; @@ -1478,7 +1470,7 @@ impl<'d, T: Instance, DmaIn, DmaOut> Cryp<'d, T, DmaIn, DmaOut> { let mut mask: [u8; 16] = [0; 16]; mask[..last_block_remainder].fill(0xFF); ctx.cipher - .post_final_blocking(&T::regs(), self, ctx.dir, &mut intermediate_data, temp1, mask); + .post_final_blocking(T::regs(), self, ctx.dir, &mut intermediate_data, temp1, mask); } ctx.payload_len += input.len() as u64; @@ -1559,7 +1551,7 @@ impl<'d, T: Instance, DmaIn, DmaOut> Cryp<'d, T, DmaIn, DmaOut> { // Handle the final block, which is incomplete. if last_block_remainder > 0 { let padding_len = C::BLOCK_SIZE - last_block_remainder; - let temp1 = ctx.cipher.pre_final(&T::regs(), ctx.dir, padding_len); + let temp1 = ctx.cipher.pre_final(T::regs(), ctx.dir, padding_len); let mut intermediate_data: [u8; AES_BLOCK_SIZE] = [0; AES_BLOCK_SIZE]; let mut last_block: [u8; AES_BLOCK_SIZE] = [0; AES_BLOCK_SIZE]; @@ -1576,7 +1568,7 @@ impl<'d, T: Instance, DmaIn, DmaOut> Cryp<'d, T, DmaIn, DmaOut> { let mut mask: [u8; 16] = [0; 16]; mask[..last_block_remainder].fill(0xFF); ctx.cipher - .post_final(&T::regs(), self, ctx.dir, &mut intermediate_data, temp1, mask) + .post_final(T::regs(), self, ctx.dir, &mut intermediate_data, temp1, mask) .await; } @@ -1758,7 +1750,7 @@ impl<'d, T: Instance, DmaIn, DmaOut> Cryp<'d, T, DmaIn, DmaOut> { self.load_key(ctx.cipher.key()); // Prepare key if applicable. - ctx.cipher.prepare_key(&T::regs()); + ctx.cipher.prepare_key(T::regs()); T::regs().cr().write(|w| w.0 = ctx.cr); // Enable crypto processor. diff --git a/embassy-stm32/src/dac/mod.rs b/embassy-stm32/src/dac/mod.rs index 8a748ad72..489342a4a 100644 --- a/embassy-stm32/src/dac/mod.rs +++ b/embassy-stm32/src/dac/mod.rs @@ -508,7 +508,7 @@ impl<'d, T: Instance, DMACh1, DMACh2> Dac<'d, T, DMACh1, DMACh2> { } trait SealedInstance { - fn regs() -> &'static crate::pac::dac::Dac; + fn regs() -> crate::pac::dac::Dac; } /// DAC instance. @@ -523,8 +523,8 @@ pub trait DacPin: crate::gpio::Pin + 'static {} foreach_peripheral!( (dac, $inst:ident) => { impl crate::dac::SealedInstance for peripherals::$inst { - fn regs() -> &'static crate::pac::dac::Dac { - &crate::pac::$inst + fn regs() -> crate::pac::dac::Dac { + crate::pac::$inst } } diff --git a/embassy-stm32/src/dsihost.rs b/embassy-stm32/src/dsihost.rs index f1c737fdc..253939394 100644 --- a/embassy-stm32/src/dsihost.rs +++ b/embassy-stm32/src/dsihost.rs @@ -407,7 +407,7 @@ impl<'d, T: Instance> Drop for DsiHost<'d, T> { } trait SealedInstance: crate::rcc::SealedRccPeripheral { - fn regs() -> &'static crate::pac::dsihost::Dsihost; + fn regs() -> crate::pac::dsihost::Dsihost; } /// DSI instance trait. @@ -419,8 +419,8 @@ pin_trait!(TePin, Instance); foreach_peripheral!( (dsihost, $inst:ident) => { impl crate::dsihost::SealedInstance for peripherals::$inst { - fn regs() -> &'static crate::pac::dsihost::Dsihost { - &crate::pac::$inst + fn regs() -> crate::pac::dsihost::Dsihost { + crate::pac::$inst } } diff --git a/embassy-stm32/src/ltdc.rs b/embassy-stm32/src/ltdc.rs index 0cc8a0557..a2d6a3cee 100644 --- a/embassy-stm32/src/ltdc.rs +++ b/embassy-stm32/src/ltdc.rs @@ -93,7 +93,7 @@ impl<'d, T: Instance> Drop for Ltdc<'d, T> { } trait SealedInstance: crate::rcc::SealedRccPeripheral { - fn regs() -> &'static crate::pac::ltdc::Ltdc; + fn regs() -> crate::pac::ltdc::Ltdc; } /// DSI instance trait. @@ -132,8 +132,8 @@ pin_trait!(B7Pin, Instance); foreach_peripheral!( (ltdc, $inst:ident) => { impl crate::ltdc::SealedInstance for peripherals::$inst { - fn regs() -> &'static crate::pac::ltdc::Ltdc { - &crate::pac::$inst + fn regs() -> crate::pac::ltdc::Ltdc { + crate::pac::$inst } } diff --git a/embassy-stm32/src/rcc/f013.rs b/embassy-stm32/src/rcc/f013.rs index 0946287ea..1c951a22b 100644 --- a/embassy-stm32/src/rcc/f013.rs +++ b/embassy-stm32/src/rcc/f013.rs @@ -276,7 +276,7 @@ pub(crate) unsafe fn init(config: Config) { // Set prescalers // CFGR has been written before (PLL, PLL48) don't overwrite these settings - RCC.cfgr().modify(|w: &mut stm32_metapac::rcc::regs::Cfgr| { + RCC.cfgr().modify(|w| { #[cfg(not(stm32f0))] { w.set_ppre1(config.apb1_pre); diff --git a/embassy-stm32/src/rtc/mod.rs b/embassy-stm32/src/rtc/mod.rs index b12a0db66..92a58ee9a 100644 --- a/embassy-stm32/src/rtc/mod.rs +++ b/embassy-stm32/src/rtc/mod.rs @@ -320,7 +320,7 @@ impl Rtc { /// The registers retain their values during wakes from standby mode or system resets. They also /// retain their value when Vdd is switched off as long as V_BAT is powered. pub fn read_backup_register(&self, register: usize) -> Option { - RTC::read_backup_register(&RTC::regs(), register) + RTC::read_backup_register(RTC::regs(), register) } /// Set content of the backup register. @@ -328,7 +328,7 @@ impl Rtc { /// The registers retain their values during wakes from standby mode or system resets. They also /// retain their value when Vdd is switched off as long as V_BAT is powered. pub fn write_backup_register(&self, register: usize, value: u32) { - RTC::write_backup_register(&RTC::regs(), register, value) + RTC::write_backup_register(RTC::regs(), register, value) } #[cfg(feature = "low-power")] @@ -482,13 +482,13 @@ trait SealedInstance { /// /// The registers retain their values during wakes from standby mode or system resets. They also /// retain their value when Vdd is switched off as long as V_BAT is powered. - fn read_backup_register(rtc: &crate::pac::rtc::Rtc, register: usize) -> Option; + fn read_backup_register(rtc: crate::pac::rtc::Rtc, register: usize) -> Option; /// Set content of the backup register. /// /// The registers retain their values during wakes from standby mode or system resets. They also /// retain their value when Vdd is switched off as long as V_BAT is powered. - fn write_backup_register(rtc: &crate::pac::rtc::Rtc, register: usize, value: u32); + fn write_backup_register(rtc: crate::pac::rtc::Rtc, register: usize, value: u32); // fn apply_config(&mut self, rtc_config: RtcConfig); } diff --git a/embassy-stm32/src/rtc/v2.rs b/embassy-stm32/src/rtc/v2.rs index 92f9de846..cdc1cb299 100644 --- a/embassy-stm32/src/rtc/v2.rs +++ b/embassy-stm32/src/rtc/v2.rs @@ -95,7 +95,7 @@ impl super::Rtc { pub(super) fn write(&self, init_mode: bool, f: F) -> R where - F: FnOnce(&crate::pac::rtc::Rtc) -> R, + F: FnOnce(crate::pac::rtc::Rtc) -> R, { let r = RTC::regs(); // Disable write protection. @@ -112,7 +112,7 @@ impl super::Rtc { while !r.isr().read().initf() {} } - let result = f(&r); + let result = f(r); if init_mode { r.isr().modify(|w| w.set_init(false)); // Exits init mode @@ -140,7 +140,7 @@ impl SealedInstance for crate::peripherals::RTC { #[cfg(all(feature = "low-power", stm32l0))] type WakeupInterrupt = crate::interrupt::typelevel::RTC; - fn read_backup_register(rtc: &Rtc, register: usize) -> Option { + fn read_backup_register(rtc: Rtc, register: usize) -> Option { if register < Self::BACKUP_REGISTER_COUNT { Some(rtc.bkpr(register).read().bkp()) } else { @@ -148,7 +148,7 @@ impl SealedInstance for crate::peripherals::RTC { } } - fn write_backup_register(rtc: &Rtc, register: usize, value: u32) { + fn write_backup_register(rtc: Rtc, register: usize, value: u32) { if register < Self::BACKUP_REGISTER_COUNT { rtc.bkpr(register).write(|w| w.set_bkp(value)); } diff --git a/embassy-stm32/src/rtc/v3.rs b/embassy-stm32/src/rtc/v3.rs index e51e09e7c..02fd5272e 100644 --- a/embassy-stm32/src/rtc/v3.rs +++ b/embassy-stm32/src/rtc/v3.rs @@ -97,7 +97,7 @@ impl super::Rtc { pub(super) fn write(&self, init_mode: bool, f: F) -> R where - F: FnOnce(&crate::pac::rtc::Rtc) -> R, + F: FnOnce(crate::pac::rtc::Rtc) -> R, { let r = RTC::regs(); // Disable write protection. @@ -112,7 +112,7 @@ impl super::Rtc { while !r.icsr().read().initf() {} } - let result = f(&r); + let result = f(r); if init_mode { r.icsr().modify(|w| w.set_init(false)); // Exits init mode @@ -143,7 +143,7 @@ impl SealedInstance for crate::peripherals::RTC { } ); - fn read_backup_register(_rtc: &Rtc, register: usize) -> Option { + fn read_backup_register(_rtc: Rtc, register: usize) -> Option { #[allow(clippy::if_same_then_else)] if register < Self::BACKUP_REGISTER_COUNT { //Some(rtc.bkpr()[register].read().bits()) @@ -153,7 +153,7 @@ impl SealedInstance for crate::peripherals::RTC { } } - fn write_backup_register(_rtc: &Rtc, register: usize, _value: u32) { + fn write_backup_register(_rtc: Rtc, register: usize, _value: u32) { if register < Self::BACKUP_REGISTER_COUNT { // RTC3 backup registers come from the TAMP peripheral, not RTC. Not() even in the L412 PAC //self.rtc.bkpr()[register].write(|w| w.bits(value)) From 2c691baadd28f0072c606a843ba14db1ea08ef86 Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Thu, 30 May 2024 13:26:14 +0200 Subject: [PATCH 426/581] stm32/rtc: move lowpower stuff to a separate mod. --- embassy-stm32/src/rtc/datetime.rs | 59 -------- embassy-stm32/src/rtc/low_power.rs | 230 +++++++++++++++++++++++++++++ embassy-stm32/src/rtc/mod.rs | 196 +----------------------- 3 files changed, 236 insertions(+), 249 deletions(-) create mode 100644 embassy-stm32/src/rtc/low_power.rs diff --git a/embassy-stm32/src/rtc/datetime.rs b/embassy-stm32/src/rtc/datetime.rs index 77d89293d..32732e96e 100644 --- a/embassy-stm32/src/rtc/datetime.rs +++ b/embassy-stm32/src/rtc/datetime.rs @@ -1,65 +1,6 @@ #[cfg(feature = "chrono")] use chrono::{Datelike, NaiveDate, Timelike, Weekday}; -#[cfg(any(feature = "defmt", feature = "time"))] -use crate::peripherals::RTC; -#[cfg(any(feature = "defmt", feature = "time"))] -use crate::rtc::SealedInstance; - -/// Represents an instant in time that can be substracted to compute a duration -pub struct RtcInstant { - /// 0..59 - pub second: u8, - /// 0..256 - pub subsecond: u16, -} - -impl RtcInstant { - #[cfg(not(rtc_v2f2))] - pub(super) const fn from(second: u8, subsecond: u16) -> Result { - if second > 59 { - Err(Error::InvalidSecond) - } else { - Ok(Self { second, subsecond }) - } - } -} - -#[cfg(feature = "defmt")] -impl defmt::Format for RtcInstant { - fn format(&self, fmt: defmt::Formatter) { - defmt::write!( - fmt, - "{}:{}", - self.second, - RTC::regs().prer().read().prediv_s() - self.subsecond, - ) - } -} - -#[cfg(feature = "time")] -impl core::ops::Sub for RtcInstant { - type Output = embassy_time::Duration; - - fn sub(self, rhs: Self) -> Self::Output { - use embassy_time::{Duration, TICK_HZ}; - - let second = if self.second < rhs.second { - self.second + 60 - } else { - self.second - }; - - let psc = RTC::regs().prer().read().prediv_s() as u32; - - let self_ticks = second as u32 * (psc + 1) + (psc - self.subsecond as u32); - let other_ticks = rhs.second as u32 * (psc + 1) + (psc - rhs.subsecond as u32); - let rtc_ticks = self_ticks - other_ticks; - - Duration::from_ticks(((rtc_ticks * TICK_HZ as u32) / (psc + 1)) as u64) - } -} - /// Errors regarding the [`DateTime`] struct. #[derive(Clone, Debug, PartialEq, Eq)] pub enum Error { diff --git a/embassy-stm32/src/rtc/low_power.rs b/embassy-stm32/src/rtc/low_power.rs new file mode 100644 index 000000000..a4ff1acbc --- /dev/null +++ b/embassy-stm32/src/rtc/low_power.rs @@ -0,0 +1,230 @@ +use super::{bcd2_to_byte, DateTimeError, Rtc, RtcError}; +use crate::peripherals::RTC; +use crate::rtc::SealedInstance; + +/// Represents an instant in time that can be substracted to compute a duration +pub(super) struct RtcInstant { + /// 0..59 + second: u8, + /// 0..256 + subsecond: u16, +} + +impl RtcInstant { + #[cfg(not(rtc_v2f2))] + const fn from(second: u8, subsecond: u16) -> Result { + if second > 59 { + Err(DateTimeError::InvalidSecond) + } else { + Ok(Self { second, subsecond }) + } + } +} + +#[cfg(feature = "defmt")] +impl defmt::Format for RtcInstant { + fn format(&self, fmt: defmt::Formatter) { + defmt::write!( + fmt, + "{}:{}", + self.second, + RTC::regs().prer().read().prediv_s() - self.subsecond, + ) + } +} + +#[cfg(feature = "time")] +impl core::ops::Sub for RtcInstant { + type Output = embassy_time::Duration; + + fn sub(self, rhs: Self) -> Self::Output { + use embassy_time::{Duration, TICK_HZ}; + + let second = if self.second < rhs.second { + self.second + 60 + } else { + self.second + }; + + let psc = RTC::regs().prer().read().prediv_s() as u32; + + let self_ticks = second as u32 * (psc + 1) + (psc - self.subsecond as u32); + let other_ticks = rhs.second as u32 * (psc + 1) + (psc - rhs.subsecond as u32); + let rtc_ticks = self_ticks - other_ticks; + + Duration::from_ticks(((rtc_ticks * TICK_HZ as u32) / (psc + 1)) as u64) + } +} + +#[repr(u8)] +#[derive(Clone, Copy, Debug)] +pub(crate) enum WakeupPrescaler { + Div2 = 2, + Div4 = 4, + Div8 = 8, + Div16 = 16, +} + +#[cfg(any(stm32f4, stm32l0, stm32g4, stm32l5, stm32wb, stm32h5, stm32g0))] +impl From for crate::pac::rtc::vals::Wucksel { + fn from(val: WakeupPrescaler) -> Self { + use crate::pac::rtc::vals::Wucksel; + + match val { + WakeupPrescaler::Div2 => Wucksel::DIV2, + WakeupPrescaler::Div4 => Wucksel::DIV4, + WakeupPrescaler::Div8 => Wucksel::DIV8, + WakeupPrescaler::Div16 => Wucksel::DIV16, + } + } +} + +#[cfg(any(stm32f4, stm32l0, stm32g4, stm32l5, stm32wb, stm32h5, stm32g0))] +impl From for WakeupPrescaler { + fn from(val: crate::pac::rtc::vals::Wucksel) -> Self { + use crate::pac::rtc::vals::Wucksel; + + match val { + Wucksel::DIV2 => WakeupPrescaler::Div2, + Wucksel::DIV4 => WakeupPrescaler::Div4, + Wucksel::DIV8 => WakeupPrescaler::Div8, + Wucksel::DIV16 => WakeupPrescaler::Div16, + _ => unreachable!(), + } + } +} + +impl WakeupPrescaler { + pub fn compute_min(val: u32) -> Self { + *[ + WakeupPrescaler::Div2, + WakeupPrescaler::Div4, + WakeupPrescaler::Div8, + WakeupPrescaler::Div16, + ] + .iter() + .find(|psc| **psc as u32 > val) + .unwrap_or(&WakeupPrescaler::Div16) + } +} + +impl Rtc { + /// Return the current instant. + fn instant(&self) -> Result { + self.time_provider().read(|_, tr, ss| { + let second = bcd2_to_byte((tr.st(), tr.su())); + + RtcInstant::from(second, ss).map_err(RtcError::InvalidDateTime) + }) + } + + /// start the wakeup alarm and with a duration that is as close to but less than + /// the requested duration, and record the instant the wakeup alarm was started + pub(crate) fn start_wakeup_alarm( + &self, + requested_duration: embassy_time::Duration, + cs: critical_section::CriticalSection, + ) { + use embassy_time::{Duration, TICK_HZ}; + + #[cfg(any(rtc_v3, rtc_v3u5, rtc_v3l5))] + use crate::pac::rtc::vals::Calrf; + + // Panic if the rcc mod knows we're not using low-power rtc + #[cfg(any(rcc_wb, rcc_f4, rcc_f410))] + unsafe { crate::rcc::get_freqs() }.rtc.unwrap(); + + let requested_duration = requested_duration.as_ticks().clamp(0, u32::MAX as u64); + let rtc_hz = Self::frequency().0 as u64; + let rtc_ticks = requested_duration * rtc_hz / TICK_HZ; + let prescaler = WakeupPrescaler::compute_min((rtc_ticks / u16::MAX as u64) as u32); + + // adjust the rtc ticks to the prescaler and subtract one rtc tick + let rtc_ticks = rtc_ticks / prescaler as u64; + let rtc_ticks = rtc_ticks.clamp(0, (u16::MAX - 1) as u64).saturating_sub(1) as u16; + + self.write(false, |regs| { + regs.cr().modify(|w| w.set_wute(false)); + + #[cfg(any( + rtc_v2f0, rtc_v2f2, rtc_v2f3, rtc_v2f4, rtc_v2f7, rtc_v2h7, rtc_v2l0, rtc_v2l1, rtc_v2l4, rtc_v2wb + ))] + { + regs.isr().modify(|w| w.set_wutf(false)); + while !regs.isr().read().wutwf() {} + } + + #[cfg(any(rtc_v3, rtc_v3u5, rtc_v3l5))] + { + regs.scr().write(|w| w.set_cwutf(Calrf::CLEAR)); + while !regs.icsr().read().wutwf() {} + } + + regs.cr().modify(|w| w.set_wucksel(prescaler.into())); + regs.wutr().write(|w| w.set_wut(rtc_ticks)); + regs.cr().modify(|w| w.set_wute(true)); + regs.cr().modify(|w| w.set_wutie(true)); + }); + + let instant = self.instant().unwrap(); + trace!( + "rtc: start wakeup alarm for {} ms (psc: {}, ticks: {}) at {}", + Duration::from_ticks(rtc_ticks as u64 * TICK_HZ * prescaler as u64 / rtc_hz).as_millis(), + prescaler as u32, + rtc_ticks, + instant, + ); + + assert!(self.stop_time.borrow(cs).replace(Some(instant)).is_none()) + } + + /// stop the wakeup alarm and return the time elapsed since `start_wakeup_alarm` + /// was called, otherwise none + pub(crate) fn stop_wakeup_alarm(&self, cs: critical_section::CriticalSection) -> Option { + use crate::interrupt::typelevel::Interrupt; + #[cfg(any(rtc_v3, rtc_v3u5, rtc_v3l5))] + use crate::pac::rtc::vals::Calrf; + + let instant = self.instant().unwrap(); + if RTC::regs().cr().read().wute() { + trace!("rtc: stop wakeup alarm at {}", instant); + + self.write(false, |regs| { + regs.cr().modify(|w| w.set_wutie(false)); + regs.cr().modify(|w| w.set_wute(false)); + + #[cfg(any( + rtc_v2f0, rtc_v2f2, rtc_v2f3, rtc_v2f4, rtc_v2f7, rtc_v2h7, rtc_v2l0, rtc_v2l1, rtc_v2l4, rtc_v2wb + ))] + regs.isr().modify(|w| w.set_wutf(false)); + + #[cfg(any(rtc_v3, rtc_v3u5, rtc_v3l5))] + regs.scr().write(|w| w.set_cwutf(Calrf::CLEAR)); + + // Check RM for EXTI and/or NVIC section, "Event event input mapping" or "EXTI interrupt/event mapping" or something similar, + // there is a table for every "Event input" / "EXTI Line". + // If you find the EXTI line related to "RTC wakeup" marks as "Configurable" (not "Direct"), + // then write 1 to related field of Pending Register, to clean it's pending state. + #[cfg(any(exti_v1, stm32h7, stm32wb))] + crate::pac::EXTI + .pr(0) + .modify(|w| w.set_line(RTC::EXTI_WAKEUP_LINE, true)); + + ::WakeupInterrupt::unpend(); + }); + } + + self.stop_time.borrow(cs).take().map(|stop_time| instant - stop_time) + } + + pub(crate) fn enable_wakeup_line(&self) { + use crate::interrupt::typelevel::Interrupt; + use crate::pac::EXTI; + + ::WakeupInterrupt::unpend(); + unsafe { ::WakeupInterrupt::enable() }; + + EXTI.rtsr(0).modify(|w| w.set_line(RTC::EXTI_WAKEUP_LINE, true)); + EXTI.imr(0).modify(|w| w.set_line(RTC::EXTI_WAKEUP_LINE, true)); + } +} diff --git a/embassy-stm32/src/rtc/mod.rs b/embassy-stm32/src/rtc/mod.rs index 92a58ee9a..cb9c10676 100644 --- a/embassy-stm32/src/rtc/mod.rs +++ b/embassy-stm32/src/rtc/mod.rs @@ -1,6 +1,9 @@ //! Real Time Clock (RTC) mod datetime; +#[cfg(feature = "low-power")] +mod low_power; + #[cfg(feature = "low-power")] use core::cell::Cell; @@ -9,8 +12,6 @@ use embassy_sync::blocking_mutex::raw::CriticalSectionRawMutex; #[cfg(feature = "low-power")] use embassy_sync::blocking_mutex::Mutex; -#[cfg(not(rtc_v2f2))] -use self::datetime::RtcInstant; use self::datetime::{day_of_week_from_u8, day_of_week_to_u8}; pub use self::datetime::{DateTime, DayOfWeek, Error as DateTimeError}; use crate::pac::rtc::regs::{Dr, Tr}; @@ -32,60 +33,6 @@ use embassy_hal_internal::Peripheral; use crate::peripherals::RTC; -#[allow(dead_code)] -#[repr(u8)] -#[derive(Clone, Copy, Debug)] -pub(crate) enum WakeupPrescaler { - Div2 = 2, - Div4 = 4, - Div8 = 8, - Div16 = 16, -} - -#[cfg(any(stm32f4, stm32l0, stm32g4, stm32l5, stm32wb, stm32h5, stm32g0))] -impl From for crate::pac::rtc::vals::Wucksel { - fn from(val: WakeupPrescaler) -> Self { - use crate::pac::rtc::vals::Wucksel; - - match val { - WakeupPrescaler::Div2 => Wucksel::DIV2, - WakeupPrescaler::Div4 => Wucksel::DIV4, - WakeupPrescaler::Div8 => Wucksel::DIV8, - WakeupPrescaler::Div16 => Wucksel::DIV16, - } - } -} - -#[cfg(any(stm32f4, stm32l0, stm32g4, stm32l5, stm32wb, stm32h5, stm32g0))] -impl From for WakeupPrescaler { - fn from(val: crate::pac::rtc::vals::Wucksel) -> Self { - use crate::pac::rtc::vals::Wucksel; - - match val { - Wucksel::DIV2 => WakeupPrescaler::Div2, - Wucksel::DIV4 => WakeupPrescaler::Div4, - Wucksel::DIV8 => WakeupPrescaler::Div8, - Wucksel::DIV16 => WakeupPrescaler::Div16, - _ => unreachable!(), - } - } -} - -#[cfg(feature = "low-power")] -impl WakeupPrescaler { - pub fn compute_min(val: u32) -> Self { - *[ - WakeupPrescaler::Div2, - WakeupPrescaler::Div4, - WakeupPrescaler::Div8, - WakeupPrescaler::Div16, - ] - .iter() - .find(|psc| **psc as u32 > val) - .unwrap_or(&WakeupPrescaler::Div16) - } -} - /// Errors that can occur on methods on [RtcClock] #[non_exhaustive] #[derive(Clone, Debug, PartialEq, Eq)] @@ -106,15 +53,6 @@ pub struct RtcTimeProvider { } impl RtcTimeProvider { - #[cfg(not(rtc_v2f2))] - pub(crate) fn instant(&self) -> Result { - self.read(|_, tr, ss| { - let second = bcd2_to_byte((tr.st(), tr.su())); - - RtcInstant::from(second, ss).map_err(RtcError::InvalidDateTime) - }) - } - /// Return the current datetime. /// /// # Errors @@ -165,8 +103,7 @@ impl RtcTimeProvider { /// RTC driver. pub struct Rtc { #[cfg(feature = "low-power")] - stop_time: Mutex>>, - #[cfg(not(feature = "low-power"))] + stop_time: Mutex>>, _private: (), } @@ -210,7 +147,6 @@ impl Rtc { let mut this = Self { #[cfg(feature = "low-power")] stop_time: Mutex::const_new(CriticalSectionRawMutex::new(), Cell::new(None)), - #[cfg(not(feature = "low-power"))] _private: (), }; @@ -223,9 +159,8 @@ impl Rtc { // Wait for the clock to update after initialization #[cfg(not(rtc_v2f2))] { - let now = this.instant().unwrap(); - - while this.instant().unwrap().subsecond == now.subsecond {} + let now = this.time_provider().read(|_, _, ss| Ok(ss)).unwrap(); + while now == this.time_provider().read(|_, _, ss| Ok(ss)).unwrap() {} } this @@ -284,12 +219,6 @@ impl Rtc { Ok(()) } - #[cfg(not(rtc_v2f2))] - /// Return the current instant. - fn instant(&self) -> Result { - self.time_provider().instant() - } - /// Return the current datetime. /// /// # Errors @@ -330,119 +259,6 @@ impl Rtc { pub fn write_backup_register(&self, register: usize, value: u32) { RTC::write_backup_register(RTC::regs(), register, value) } - - #[cfg(feature = "low-power")] - /// start the wakeup alarm and with a duration that is as close to but less than - /// the requested duration, and record the instant the wakeup alarm was started - pub(crate) fn start_wakeup_alarm( - &self, - requested_duration: embassy_time::Duration, - cs: critical_section::CriticalSection, - ) { - use embassy_time::{Duration, TICK_HZ}; - - #[cfg(any(rtc_v3, rtc_v3u5, rtc_v3l5))] - use crate::pac::rtc::vals::Calrf; - - // Panic if the rcc mod knows we're not using low-power rtc - #[cfg(any(rcc_wb, rcc_f4, rcc_f410))] - unsafe { crate::rcc::get_freqs() }.rtc.unwrap(); - - let requested_duration = requested_duration.as_ticks().clamp(0, u32::MAX as u64); - let rtc_hz = Self::frequency().0 as u64; - let rtc_ticks = requested_duration * rtc_hz / TICK_HZ; - let prescaler = WakeupPrescaler::compute_min((rtc_ticks / u16::MAX as u64) as u32); - - // adjust the rtc ticks to the prescaler and subtract one rtc tick - let rtc_ticks = rtc_ticks / prescaler as u64; - let rtc_ticks = rtc_ticks.clamp(0, (u16::MAX - 1) as u64).saturating_sub(1) as u16; - - self.write(false, |regs| { - regs.cr().modify(|w| w.set_wute(false)); - - #[cfg(any( - rtc_v2f0, rtc_v2f2, rtc_v2f3, rtc_v2f4, rtc_v2f7, rtc_v2h7, rtc_v2l0, rtc_v2l1, rtc_v2l4, rtc_v2wb - ))] - { - regs.isr().modify(|w| w.set_wutf(false)); - while !regs.isr().read().wutwf() {} - } - - #[cfg(any(rtc_v3, rtc_v3u5, rtc_v3l5))] - { - regs.scr().write(|w| w.set_cwutf(Calrf::CLEAR)); - while !regs.icsr().read().wutwf() {} - } - - regs.cr().modify(|w| w.set_wucksel(prescaler.into())); - regs.wutr().write(|w| w.set_wut(rtc_ticks)); - regs.cr().modify(|w| w.set_wute(true)); - regs.cr().modify(|w| w.set_wutie(true)); - }); - - let instant = self.instant().unwrap(); - trace!( - "rtc: start wakeup alarm for {} ms (psc: {}, ticks: {}) at {}", - Duration::from_ticks(rtc_ticks as u64 * TICK_HZ * prescaler as u64 / rtc_hz).as_millis(), - prescaler as u32, - rtc_ticks, - instant, - ); - - assert!(self.stop_time.borrow(cs).replace(Some(instant)).is_none()) - } - - #[cfg(feature = "low-power")] - /// stop the wakeup alarm and return the time elapsed since `start_wakeup_alarm` - /// was called, otherwise none - pub(crate) fn stop_wakeup_alarm(&self, cs: critical_section::CriticalSection) -> Option { - use crate::interrupt::typelevel::Interrupt; - #[cfg(any(rtc_v3, rtc_v3u5, rtc_v3l5))] - use crate::pac::rtc::vals::Calrf; - - let instant = self.instant().unwrap(); - if RTC::regs().cr().read().wute() { - trace!("rtc: stop wakeup alarm at {}", instant); - - self.write(false, |regs| { - regs.cr().modify(|w| w.set_wutie(false)); - regs.cr().modify(|w| w.set_wute(false)); - - #[cfg(any( - rtc_v2f0, rtc_v2f2, rtc_v2f3, rtc_v2f4, rtc_v2f7, rtc_v2h7, rtc_v2l0, rtc_v2l1, rtc_v2l4, rtc_v2wb - ))] - regs.isr().modify(|w| w.set_wutf(false)); - - #[cfg(any(rtc_v3, rtc_v3u5, rtc_v3l5))] - regs.scr().write(|w| w.set_cwutf(Calrf::CLEAR)); - - // Check RM for EXTI and/or NVIC section, "Event event input mapping" or "EXTI interrupt/event mapping" or something similar, - // there is a table for every "Event input" / "EXTI Line". - // If you find the EXTI line related to "RTC wakeup" marks as "Configurable" (not "Direct"), - // then write 1 to related field of Pending Register, to clean it's pending state. - #[cfg(any(exti_v1, stm32h7, stm32wb))] - crate::pac::EXTI - .pr(0) - .modify(|w| w.set_line(RTC::EXTI_WAKEUP_LINE, true)); - - ::WakeupInterrupt::unpend(); - }); - } - - self.stop_time.borrow(cs).take().map(|stop_time| instant - stop_time) - } - - #[cfg(feature = "low-power")] - pub(crate) fn enable_wakeup_line(&self) { - use crate::interrupt::typelevel::Interrupt; - use crate::pac::EXTI; - - ::WakeupInterrupt::unpend(); - unsafe { ::WakeupInterrupt::enable() }; - - EXTI.rtsr(0).modify(|w| w.set_line(RTC::EXTI_WAKEUP_LINE, true)); - EXTI.imr(0).modify(|w| w.set_line(RTC::EXTI_WAKEUP_LINE, true)); - } } pub(crate) fn byte_to_bcd2(byte: u8) -> (u8, u8) { From 245c895d090b93582e23fc1573b244bdc5087d72 Mon Sep 17 00:00:00 2001 From: Corey Schuhen Date: Thu, 30 May 2024 21:23:12 +1000 Subject: [PATCH 427/581] Remove generics for BXCAN. --- embassy-stm32/src/can/bxcan/mod.rs | 296 +++++++++++++++-------- embassy-stm32/src/can/bxcan/registers.rs | 12 +- tests/stm32/src/bin/can.rs | 4 +- 3 files changed, 200 insertions(+), 112 deletions(-) diff --git a/embassy-stm32/src/can/bxcan/mod.rs b/embassy-stm32/src/can/bxcan/mod.rs index 0ac4cdab6..4f516c917 100644 --- a/embassy-stm32/src/can/bxcan/mod.rs +++ b/embassy-stm32/src/can/bxcan/mod.rs @@ -5,6 +5,7 @@ use core::future::poll_fn; use core::marker::PhantomData; use core::task::Poll; +use embassy_hal_internal::interrupt::InterruptExt; use embassy_hal_internal::{into_ref, PeripheralRef}; use embassy_sync::blocking_mutex::raw::CriticalSectionRawMutex; use embassy_sync::channel::Channel; @@ -154,7 +155,10 @@ impl Drop for CanConfig<'_, T> { /// CAN driver pub struct Can<'d, T: Instance> { - peri: PeripheralRef<'d, T>, + _peri: PeripheralRef<'d, T>, + instance: &'d crate::pac::can::Can, + info: &'static Info, + state: &'static State, } /// Error returned by `try_write` @@ -179,6 +183,8 @@ impl<'d, T: Instance> Can<'d, T> { + 'd, ) -> Self { into_ref!(peri, rx, tx); + let info = T::info(); + let regs = &T::info().regs; rx.set_as_af(rx.af_num(), AFType::Input); tx.set_as_af(tx.af_num(), AFType::OutputPushPull); @@ -186,7 +192,7 @@ impl<'d, T: Instance> Can<'d, T> { T::enable_and_reset(); { - T::regs().ier().write(|w| { + regs.0.ier().write(|w| { w.set_errie(true); w.set_fmpie(0, true); w.set_fmpie(1, true); @@ -197,7 +203,7 @@ impl<'d, T: Instance> Can<'d, T> { w.set_lecie(true); }); - T::regs().mcr().write(|w| { + regs.0.mcr().write(|w| { // Enable timestamps on rx messages w.set_ttcm(true); @@ -205,17 +211,14 @@ impl<'d, T: Instance> Can<'d, T> { } unsafe { - T::TXInterrupt::unpend(); - T::TXInterrupt::enable(); - - T::RX0Interrupt::unpend(); - T::RX0Interrupt::enable(); - - T::RX1Interrupt::unpend(); - T::RX1Interrupt::enable(); - - T::SCEInterrupt::unpend(); - T::SCEInterrupt::enable(); + info.tx_interrupt.unpend(); + info.tx_interrupt.enable(); + info.rx0_interrupt.unpend(); + info.rx0_interrupt.enable(); + info.rx1_interrupt.unpend(); + info.rx1_interrupt.enable(); + info.sce_interrupt.unpend(); + info.sce_interrupt.enable(); } rx.set_as_af(rx.af_num(), AFType::Input); @@ -223,7 +226,12 @@ impl<'d, T: Instance> Can<'d, T> { Registers(T::regs()).leave_init_mode(); - Self { peri } + Self { + _peri: peri, + instance: &T::info().regs.0, + info: T::info(), + state: T::state(), + } } /// Set CAN bit rate. @@ -265,12 +273,12 @@ impl<'d, T: Instance> Can<'d, T> { /// Waking the peripheral manually does not trigger a wake-up interrupt. /// This will wait until the peripheral has acknowledged it has awoken from sleep mode pub fn wakeup(&mut self) { - Registers(T::regs()).wakeup() + self.info.regs.wakeup() } /// Check if the peripheral is currently in sleep mode pub fn is_sleeping(&self) -> bool { - T::regs().msr().read().slak() + self.info.regs.0.msr().read().slak() } /// Put the peripheral in sleep mode @@ -282,11 +290,11 @@ impl<'d, T: Instance> Can<'d, T> { /// If the peripheral has automatic wakeup enabled, when a Start-of-Frame is detected /// the peripheral will automatically wake and receive the incoming message. pub async fn sleep(&mut self) { - T::regs().ier().modify(|i| i.set_slkie(true)); - T::regs().mcr().modify(|m| m.set_sleep(true)); + self.info.regs.0.ier().modify(|i| i.set_slkie(true)); + self.info.regs.0.mcr().modify(|m| m.set_sleep(true)); poll_fn(|cx| { - T::state().err_waker.register(cx.waker()); + self.state.err_waker.register(cx.waker()); if self.is_sleeping() { Poll::Ready(()) } else { @@ -295,7 +303,7 @@ impl<'d, T: Instance> Can<'d, T> { }) .await; - T::regs().ier().modify(|i| i.set_slkie(false)); + self.info.regs.0.ier().modify(|i| i.set_slkie(false)); } /// Enable FIFO scheduling of outgoing frames. @@ -337,7 +345,13 @@ impl<'d, T: Instance> Can<'d, T> { /// Waits for a specific transmit mailbox to become empty pub async fn flush(&self, mb: Mailbox) { - CanTx::::flush_inner(mb).await + CanTx { + _instance: &self.instance, + info: self.info, + state: self.state, + } + .flush_inner(mb) + .await; } /// Waits until any of the transmit mailboxes become empty @@ -347,12 +361,24 @@ impl<'d, T: Instance> Can<'d, T> { /// This will happen if FIFO scheduling of outgoing frames is not enabled, /// and a frame with equal priority is already queued for transmission. pub async fn flush_any(&self) { - CanTx::::flush_any_inner().await + CanTx { + _instance: &self.instance, + info: self.info, + state: self.state, + } + .flush_any_inner() + .await } /// Waits until all of the transmit mailboxes become empty pub async fn flush_all(&self) { - CanTx::::flush_all_inner().await + CanTx { + _instance: &self.instance, + info: self.info, + state: self.state, + } + .flush_all_inner() + .await } /// Attempts to abort the sending of a frame that is pending in a mailbox. @@ -363,12 +389,12 @@ impl<'d, T: Instance> Can<'d, T> { /// If there is a frame in the provided mailbox, and it is canceled successfully, this function /// returns `true`. pub fn abort(&mut self, mailbox: Mailbox) -> bool { - Registers(T::regs()).abort(mailbox) + self.info.regs.abort(mailbox) } /// Returns `true` if no frame is pending for transmission. pub fn is_transmitter_idle(&self) -> bool { - Registers(T::regs()).is_idle() + self.info.regs.is_idle() } /// Read a CAN frame. @@ -377,31 +403,35 @@ impl<'d, T: Instance> Can<'d, T> { /// /// Returns a tuple of the time the message was received and the message frame pub async fn read(&mut self) -> Result { - T::state().rx_mode.read::().await + self.state.rx_mode.read(self.info, self.state).await } /// Attempts to read a CAN frame without blocking. /// /// Returns [Err(TryReadError::Empty)] if there are no frames in the rx queue. pub fn try_read(&mut self) -> Result { - T::state().rx_mode.try_read::() + self.state.rx_mode.try_read(self.info) } /// Waits while receive queue is empty. pub async fn wait_not_empty(&mut self) { - T::state().rx_mode.wait_not_empty::().await + self.state.rx_mode.wait_not_empty(self.info, self.state).await } /// Split the CAN driver into transmit and receive halves. /// /// Useful for doing separate transmit/receive tasks. - pub fn split<'c>(&'c mut self) -> (CanTx<'d, T>, CanRx<'d, T>) { + pub fn split<'c>(&'c mut self) -> (CanTx<'d>, CanRx<'d>) { ( CanTx { - _peri: unsafe { self.peri.clone_unchecked() }, + _instance: &self.instance, + info: self.info, + state: self.state, }, CanRx { - peri: unsafe { self.peri.clone_unchecked() }, + instance: &self.instance, + info: self.info, + state: self.state, }, ) } @@ -411,7 +441,7 @@ impl<'d, T: Instance> Can<'d, T> { &'c mut self, txb: &'static mut TxBuf, rxb: &'static mut RxBuf, - ) -> BufferedCan<'d, T, TX_BUF_SIZE, RX_BUF_SIZE> { + ) -> BufferedCan<'d, TX_BUF_SIZE, RX_BUF_SIZE> { let (tx, rx) = self.split(); BufferedCan { tx: tx.buffered(txb), @@ -426,17 +456,17 @@ impl<'d, T: FilterOwner> Can<'d, T> { /// To modify filters of a slave peripheral, `modify_filters` has to be called on the master /// peripheral instead. pub fn modify_filters(&mut self) -> MasterFilters<'_, T> { - unsafe { MasterFilters::new(T::regs()) } + unsafe { MasterFilters::new(self.info.regs.0) } } } /// Buffered CAN driver. -pub struct BufferedCan<'d, T: Instance, const TX_BUF_SIZE: usize, const RX_BUF_SIZE: usize> { - tx: BufferedCanTx<'d, T, TX_BUF_SIZE>, - rx: BufferedCanRx<'d, T, RX_BUF_SIZE>, +pub struct BufferedCan<'d, const TX_BUF_SIZE: usize, const RX_BUF_SIZE: usize> { + tx: BufferedCanTx<'d, TX_BUF_SIZE>, + rx: BufferedCanRx<'d, RX_BUF_SIZE>, } -impl<'d, T: Instance, const TX_BUF_SIZE: usize, const RX_BUF_SIZE: usize> BufferedCan<'d, T, TX_BUF_SIZE, RX_BUF_SIZE> { +impl<'d, const TX_BUF_SIZE: usize, const RX_BUF_SIZE: usize> BufferedCan<'d, TX_BUF_SIZE, RX_BUF_SIZE> { /// Async write frame to TX buffer. pub async fn write(&mut self, frame: &Frame) { self.tx.write(frame).await @@ -471,18 +501,20 @@ impl<'d, T: Instance, const TX_BUF_SIZE: usize, const RX_BUF_SIZE: usize> Buffer } /// CAN driver, transmit half. -pub struct CanTx<'d, T: Instance> { - _peri: PeripheralRef<'d, T>, +pub struct CanTx<'d> { + _instance: &'d crate::pac::can::Can, + info: &'static Info, + state: &'static State, } -impl<'d, T: Instance> CanTx<'d, T> { +impl<'d> CanTx<'d> { /// Queues the message to be sent. /// /// If the TX queue is full, this will wait until there is space, therefore exerting backpressure. pub async fn write(&mut self, frame: &Frame) -> TransmitStatus { poll_fn(|cx| { - T::state().tx_mode.register(cx.waker()); - if let Ok(status) = Registers(T::regs()).transmit(frame) { + self.state.tx_mode.register(cx.waker()); + if let Ok(status) = self.info.regs.transmit(frame) { return Poll::Ready(status); } @@ -501,13 +533,13 @@ impl<'d, T: Instance> CanTx<'d, T> { /// This is done to work around a hardware limitation that could lead to out-of-order delivery /// of frames with the same priority. pub fn try_write(&mut self, frame: &Frame) -> Result { - Registers(T::regs()).transmit(frame).map_err(|_| TryWriteError::Full) + self.info.regs.transmit(frame).map_err(|_| TryWriteError::Full) } - async fn flush_inner(mb: Mailbox) { + async fn flush_inner(&self, mb: Mailbox) { poll_fn(|cx| { - T::state().tx_mode.register(cx.waker()); - if T::regs().tsr().read().tme(mb.index()) { + self.state.tx_mode.register(cx.waker()); + if self.info.regs.0.tsr().read().tme(mb.index()) { return Poll::Ready(()); } @@ -518,14 +550,14 @@ impl<'d, T: Instance> CanTx<'d, T> { /// Waits for a specific transmit mailbox to become empty pub async fn flush(&self, mb: Mailbox) { - Self::flush_inner(mb).await + self.flush_inner(mb).await } - async fn flush_any_inner() { + async fn flush_any_inner(&self) { poll_fn(|cx| { - T::state().tx_mode.register(cx.waker()); + self.state.tx_mode.register(cx.waker()); - let tsr = T::regs().tsr().read(); + let tsr = self.info.regs.0.tsr().read(); if tsr.tme(Mailbox::Mailbox0.index()) || tsr.tme(Mailbox::Mailbox1.index()) || tsr.tme(Mailbox::Mailbox2.index()) @@ -545,14 +577,14 @@ impl<'d, T: Instance> CanTx<'d, T> { /// This will happen if FIFO scheduling of outgoing frames is not enabled, /// and a frame with equal priority is already queued for transmission. pub async fn flush_any(&self) { - Self::flush_any_inner().await + self.flush_any_inner().await } - async fn flush_all_inner() { + async fn flush_all_inner(&self) { poll_fn(|cx| { - T::state().tx_mode.register(cx.waker()); + self.state.tx_mode.register(cx.waker()); - let tsr = T::regs().tsr().read(); + let tsr = self.info.regs.0.tsr().read(); if tsr.tme(Mailbox::Mailbox0.index()) && tsr.tme(Mailbox::Mailbox1.index()) && tsr.tme(Mailbox::Mailbox2.index()) @@ -567,7 +599,7 @@ impl<'d, T: Instance> CanTx<'d, T> { /// Waits until all of the transmit mailboxes become empty pub async fn flush_all(&self) { - Self::flush_all_inner().await + self.flush_all_inner().await } /// Attempts to abort the sending of a frame that is pending in a mailbox. @@ -578,20 +610,20 @@ impl<'d, T: Instance> CanTx<'d, T> { /// If there is a frame in the provided mailbox, and it is canceled successfully, this function /// returns `true`. pub fn abort(&mut self, mailbox: Mailbox) -> bool { - Registers(T::regs()).abort(mailbox) + self.info.regs.abort(mailbox) } /// Returns `true` if no frame is pending for transmission. pub fn is_idle(&self) -> bool { - Registers(T::regs()).is_idle() + self.info.regs.is_idle() } /// Return a buffered instance of driver. User must supply Buffers pub fn buffered( self, txb: &'static mut TxBuf, - ) -> BufferedCanTx<'d, T, TX_BUF_SIZE> { - BufferedCanTx::new(self, txb) + ) -> BufferedCanTx<'d, TX_BUF_SIZE> { + BufferedCanTx::new(self.info, self.state, self, txb) } } @@ -599,23 +631,35 @@ impl<'d, T: Instance> CanTx<'d, T> { pub type TxBuf = Channel; /// Buffered CAN driver, transmit half. -pub struct BufferedCanTx<'d, T: Instance, const TX_BUF_SIZE: usize> { - _tx: CanTx<'d, T>, +pub struct BufferedCanTx<'d, const TX_BUF_SIZE: usize> { + info: &'static Info, + state: &'static State, + _tx: CanTx<'d>, tx_buf: &'static TxBuf, } -impl<'d, T: Instance, const TX_BUF_SIZE: usize> BufferedCanTx<'d, T, TX_BUF_SIZE> { - fn new(_tx: CanTx<'d, T>, tx_buf: &'static TxBuf) -> Self { - Self { _tx, tx_buf }.setup() +impl<'d, const TX_BUF_SIZE: usize> BufferedCanTx<'d, TX_BUF_SIZE> { + fn new(info: &'static Info, state: &'static State, _tx: CanTx<'d>, tx_buf: &'static TxBuf) -> Self { + Self { + info, + state, + _tx, + tx_buf, + } + .setup() } fn setup(self) -> Self { // We don't want interrupts being processed while we change modes. - critical_section::with(|_| unsafe { + critical_section::with(|_| { let tx_inner = super::common::ClassicBufferedTxInner { tx_receiver: self.tx_buf.receiver().into(), }; - T::mut_state().tx_mode = TxMode::Buffered(tx_inner); + let state = self.state as *const State; + unsafe { + let mut_state = state as *mut State; + (*mut_state).tx_mode = TxMode::Buffered(tx_inner); + } }); self } @@ -623,60 +667,67 @@ impl<'d, T: Instance, const TX_BUF_SIZE: usize> BufferedCanTx<'d, T, TX_BUF_SIZE /// Async write frame to TX buffer. pub async fn write(&mut self, frame: &Frame) { self.tx_buf.send(*frame).await; - T::TXInterrupt::pend(); // Wake for Tx + let waker = self.info.tx_waker; + waker(); // Wake for Tx } /// Returns a sender that can be used for sending CAN frames. pub fn writer(&self) -> BufferedCanSender { BufferedCanSender { tx_buf: self.tx_buf.sender().into(), - waker: T::TXInterrupt::pend, + waker: self.info.tx_waker, } } } -impl<'d, T: Instance, const TX_BUF_SIZE: usize> Drop for BufferedCanTx<'d, T, TX_BUF_SIZE> { +impl<'d, const TX_BUF_SIZE: usize> Drop for BufferedCanTx<'d, TX_BUF_SIZE> { fn drop(&mut self) { - critical_section::with(|_| unsafe { - T::mut_state().tx_mode = TxMode::NonBuffered(embassy_sync::waitqueue::AtomicWaker::new()); + critical_section::with(|_| { + let state = self.state as *const State; + unsafe { + let mut_state = state as *mut State; + (*mut_state).tx_mode = TxMode::NonBuffered(embassy_sync::waitqueue::AtomicWaker::new()); + } }); } } /// CAN driver, receive half. #[allow(dead_code)] -pub struct CanRx<'d, T: Instance> { - peri: PeripheralRef<'d, T>, +pub struct CanRx<'d> { + instance: &'d crate::pac::can::Can, + info: &'static Info, + state: &'static State, } -impl<'d, T: Instance> CanRx<'d, T> { +impl<'d> CanRx<'d> { /// Read a CAN frame. /// /// If no CAN frame is in the RX buffer, this will wait until there is one. /// /// Returns a tuple of the time the message was received and the message frame pub async fn read(&mut self) -> Result { - T::state().rx_mode.read::().await + self.state.rx_mode.read(self.info, self.state).await } /// Attempts to read a CAN frame without blocking. /// /// Returns [Err(TryReadError::Empty)] if there are no frames in the rx queue. pub fn try_read(&mut self) -> Result { - T::state().rx_mode.try_read::() + self.state.rx_mode.try_read(self.info) } /// Waits while receive queue is empty. pub async fn wait_not_empty(&mut self) { - T::state().rx_mode.wait_not_empty::().await + self.state.rx_mode.wait_not_empty(self.info, self.state).await } /// Return a buffered instance of driver. User must supply Buffers pub fn buffered( self, rxb: &'static mut RxBuf, - ) -> BufferedCanRx<'d, T, RX_BUF_SIZE> { - BufferedCanRx::new(self, rxb) + ) -> BufferedCanRx<'d, RX_BUF_SIZE> { + BufferedCanRx::new(self.info, self.state, self, rxb) } } @@ -684,23 +735,35 @@ impl<'d, T: Instance> CanRx<'d, T> { pub type RxBuf = Channel, BUF_SIZE>; /// CAN driver, receive half in Buffered mode. -pub struct BufferedCanRx<'d, T: Instance, const RX_BUF_SIZE: usize> { - _rx: CanRx<'d, T>, +pub struct BufferedCanRx<'d, const RX_BUF_SIZE: usize> { + info: &'static Info, + state: &'static State, + _rx: CanRx<'d>, rx_buf: &'static RxBuf, } -impl<'d, T: Instance, const RX_BUF_SIZE: usize> BufferedCanRx<'d, T, RX_BUF_SIZE> { - fn new(_rx: CanRx<'d, T>, rx_buf: &'static RxBuf) -> Self { - BufferedCanRx { _rx, rx_buf }.setup() +impl<'d, const RX_BUF_SIZE: usize> BufferedCanRx<'d, RX_BUF_SIZE> { + fn new(info: &'static Info, state: &'static State, _rx: CanRx<'d>, rx_buf: &'static RxBuf) -> Self { + BufferedCanRx { + info, + state, + _rx, + rx_buf, + } + .setup() } fn setup(self) -> Self { // We don't want interrupts being processed while we change modes. - critical_section::with(|_| unsafe { + critical_section::with(|_| { let rx_inner = super::common::ClassicBufferedRxInner { rx_sender: self.rx_buf.sender().into(), }; - T::mut_state().rx_mode = RxMode::Buffered(rx_inner); + let state = self.state as *const State; + unsafe { + let mut_state = state as *mut State; + (*mut_state).rx_mode = RxMode::Buffered(rx_inner); + } }); self } @@ -714,7 +777,7 @@ impl<'d, T: Instance, const RX_BUF_SIZE: usize> BufferedCanRx<'d, T, RX_BUF_SIZE /// /// Returns [Err(TryReadError::Empty)] if there are no frames in the rx queue. pub fn try_read(&mut self) -> Result { - match &T::state().rx_mode { + match &self.state.rx_mode { RxMode::Buffered(_) => { if let Ok(result) = self.rx_buf.try_receive() { match result { @@ -722,7 +785,7 @@ impl<'d, T: Instance, const RX_BUF_SIZE: usize> BufferedCanRx<'d, T, RX_BUF_SIZE Err(e) => Err(TryReadError::BusError(e)), } } else { - if let Some(err) = Registers(T::regs()).curr_error() { + if let Some(err) = self.info.regs.curr_error() { return Err(TryReadError::BusError(err)); } else { Err(TryReadError::Empty) @@ -746,10 +809,14 @@ impl<'d, T: Instance, const RX_BUF_SIZE: usize> BufferedCanRx<'d, T, RX_BUF_SIZE } } -impl<'d, T: Instance, const RX_BUF_SIZE: usize> Drop for BufferedCanRx<'d, T, RX_BUF_SIZE> { +impl<'d, const RX_BUF_SIZE: usize> Drop for BufferedCanRx<'d, RX_BUF_SIZE> { fn drop(&mut self) { - critical_section::with(|_| unsafe { - T::mut_state().rx_mode = RxMode::NonBuffered(embassy_sync::waitqueue::AtomicWaker::new()); + critical_section::with(|_| { + let state = self.state as *const State; + unsafe { + let mut_state = state as *mut State; + (*mut_state).rx_mode = RxMode::NonBuffered(embassy_sync::waitqueue::AtomicWaker::new()); + } }); } } @@ -839,13 +906,13 @@ impl RxMode { } } - pub async fn read(&self) -> Result { + pub(crate) async fn read(&self, info: &Info, state: &State) -> Result { match self { Self::NonBuffered(waker) => { poll_fn(|cx| { - T::state().err_waker.register(cx.waker()); + state.err_waker.register(cx.waker()); waker.register(cx.waker()); - match self.try_read::() { + match self.try_read(info) { Ok(result) => Poll::Ready(Ok(result)), Err(TryReadError::Empty) => Poll::Pending, Err(TryReadError::BusError(be)) => Poll::Ready(Err(be)), @@ -858,17 +925,17 @@ impl RxMode { } } } - pub fn try_read(&self) -> Result { + pub(crate) fn try_read(&self, info: &Info) -> Result { match self { Self::NonBuffered(_) => { - let registers = Registers(T::regs()); + let registers = &info.regs; if let Some(msg) = registers.receive_fifo(RxFifo::Fifo0) { - T::regs().ier().write(|w| { + registers.0.ier().write(|w| { w.set_fmpie(0, true); }); Ok(msg) } else if let Some(msg) = registers.receive_fifo(RxFifo::Fifo1) { - T::regs().ier().write(|w| { + registers.0.ier().write(|w| { w.set_fmpie(1, true); }); Ok(msg) @@ -883,12 +950,12 @@ impl RxMode { } } } - pub async fn wait_not_empty(&self) { - match &T::state().rx_mode { + pub(crate) async fn wait_not_empty(&self, info: &Info, state: &State) { + match &state.rx_mode { Self::NonBuffered(waker) => { poll_fn(|cx| { waker.register(cx.waker()); - if Registers(T::regs()).receive_frame_available() { + if info.regs.receive_frame_available() { Poll::Ready(()) } else { Poll::Pending @@ -903,7 +970,7 @@ impl RxMode { } } -enum TxMode { +pub(crate) enum TxMode { NonBuffered(AtomicWaker), Buffered(super::common::ClassicBufferedTxInner), } @@ -943,7 +1010,7 @@ impl TxMode { } } -struct State { +pub(crate) struct State { pub(crate) rx_mode: RxMode, pub(crate) tx_mode: TxMode, pub err_waker: AtomicWaker, @@ -959,7 +1026,17 @@ impl State { } } +pub(crate) struct Info { + regs: Registers, + tx_interrupt: crate::interrupt::Interrupt, + rx0_interrupt: crate::interrupt::Interrupt, + rx1_interrupt: crate::interrupt::Interrupt, + sce_interrupt: crate::interrupt::Interrupt, + tx_waker: fn(), +} + trait SealedInstance { + fn info() -> &'static Info; fn regs() -> crate::pac::can::Can; fn state() -> &'static State; unsafe fn mut_state() -> &'static mut State; @@ -1012,6 +1089,17 @@ foreach_peripheral!( (can, $inst:ident) => { impl SealedInstance for peripherals::$inst { + fn info() -> &'static Info { + static INFO: Info = Info { + regs: Registers(crate::pac::$inst), + tx_interrupt: crate::_generated::peripheral_interrupts::$inst::TX::IRQ, + rx0_interrupt: crate::_generated::peripheral_interrupts::$inst::RX0::IRQ, + rx1_interrupt: crate::_generated::peripheral_interrupts::$inst::RX1::IRQ, + sce_interrupt: crate::_generated::peripheral_interrupts::$inst::SCE::IRQ, + tx_waker: crate::_generated::peripheral_interrupts::$inst::TX::pend, + }; + &INFO + } fn regs() -> crate::pac::can::Can { crate::pac::$inst } diff --git a/embassy-stm32/src/can/bxcan/registers.rs b/embassy-stm32/src/can/bxcan/registers.rs index ad27e0744..e7c7525d8 100644 --- a/embassy-stm32/src/can/bxcan/registers.rs +++ b/embassy-stm32/src/can/bxcan/registers.rs @@ -131,7 +131,7 @@ impl Registers { /// Note that this will not trigger [`Interrupt::Wakeup`], only reception of an incoming CAN /// frame will cause that interrupt. #[allow(dead_code)] - pub fn wakeup(&mut self) { + pub fn wakeup(&self) { self.0.mcr().modify(|reg| { reg.set_sleep(false); reg.set_inrq(false); @@ -216,7 +216,7 @@ impl Registers { /// If FIFO scheduling is enabled, frames are transmitted in the order that they are passed to this function. /// /// If all transmit mailboxes are full, this function returns [`nb::Error::WouldBlock`]. - pub fn transmit(&mut self, frame: &Frame) -> nb::Result { + pub fn transmit(&self, frame: &Frame) -> nb::Result { // Check if FIFO scheduling is enabled. let fifo_scheduling = self.0.mcr().read().txfp(); @@ -292,7 +292,7 @@ impl Registers { Ok(()) } - fn write_mailbox(&mut self, idx: usize, frame: &Frame) { + fn write_mailbox(&self, idx: usize, frame: &Frame) { debug_assert!(idx < 3); let mb = self.0.tx(idx); @@ -309,7 +309,7 @@ impl Registers { }); } - fn read_pending_mailbox(&mut self, idx: usize) -> Option { + fn read_pending_mailbox(&self, idx: usize) -> Option { if self.abort_by_index(idx) { debug_assert!(idx < 3); @@ -332,7 +332,7 @@ impl Registers { } /// Tries to abort a pending frame. Returns `true` when aborted. - fn abort_by_index(&mut self, idx: usize) -> bool { + fn abort_by_index(&self, idx: usize) -> bool { self.0.tsr().write(|reg| reg.set_abrq(idx, true)); // Wait for the abort request to be finished. @@ -351,7 +351,7 @@ impl Registers { /// /// If there is a frame in the provided mailbox, and it is canceled successfully, this function /// returns `true`. - pub fn abort(&mut self, mailbox: Mailbox) -> bool { + pub fn abort(&self, mailbox: Mailbox) -> bool { // If the mailbox is empty, the value of TXOKx depends on what happened with the previous // frame in that mailbox. Only call abort_by_index() if the mailbox is not empty. let tsr = self.0.tsr().read(); diff --git a/tests/stm32/src/bin/can.rs b/tests/stm32/src/bin/can.rs index 004b1a729..f63076512 100644 --- a/tests/stm32/src/bin/can.rs +++ b/tests/stm32/src/bin/can.rs @@ -19,8 +19,8 @@ mod can_common; use can_common::*; type Can<'d> = embassy_stm32::can::Can<'d, embassy_stm32::peripherals::CAN1>; -type CanTx<'d> = embassy_stm32::can::CanTx<'d, embassy_stm32::peripherals::CAN1>; -type CanRx<'d> = embassy_stm32::can::CanRx<'d, embassy_stm32::peripherals::CAN1>; +type CanTx<'d> = embassy_stm32::can::CanTx<'d>; +type CanRx<'d> = embassy_stm32::can::CanRx<'d>; bind_interrupts!(struct Irqs { CAN1_RX0 => Rx0InterruptHandler; From 7fd79857c339ccc55a4df606e25b432ada8f43a1 Mon Sep 17 00:00:00 2001 From: Corey Schuhen Date: Thu, 30 May 2024 22:00:02 +1000 Subject: [PATCH 428/581] Fix example. --- examples/stm32f7/src/bin/can.rs | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/examples/stm32f7/src/bin/can.rs b/examples/stm32f7/src/bin/can.rs index e32b4d3df..f4d6d8c19 100644 --- a/examples/stm32f7/src/bin/can.rs +++ b/examples/stm32f7/src/bin/can.rs @@ -24,7 +24,7 @@ bind_interrupts!(struct Irqs { }); #[embassy_executor::task] -pub async fn send_can_message(tx: &'static mut CanTx<'static, CAN3>) { +pub async fn send_can_message(tx: &'static mut CanTx<'static>) { loop { let frame = Frame::new_data(unwrap!(StandardId::new(0 as _)), &[0]).unwrap(); tx.write(&frame).await; @@ -62,7 +62,7 @@ async fn main(spawner: Spawner) { let (tx, mut rx) = can.split(); - static CAN_TX: StaticCell> = StaticCell::new(); + static CAN_TX: StaticCell> = StaticCell::new(); let tx = CAN_TX.init(tx); spawner.spawn(send_can_message(tx)).unwrap(); From 28f5f0babaa6348c08985f599353e34b48c887fb Mon Sep 17 00:00:00 2001 From: Mattis Kieffer Date: Thu, 30 May 2024 14:07:47 +0200 Subject: [PATCH 429/581] add dac buffer function --- embassy-stm32/src/opamp.rs | 26 ++++++++++++++++++++++++++ 1 file changed, 26 insertions(+) diff --git a/embassy-stm32/src/opamp.rs b/embassy-stm32/src/opamp.rs index 487902959..ca94a573d 100644 --- a/embassy-stm32/src/opamp.rs +++ b/embassy-stm32/src/opamp.rs @@ -110,6 +110,32 @@ impl<'d, T: Instance> OpAmp<'d, T> { OpAmpOutput { _inner: self } } + /// Configure the OpAmp as a buffer for the DAC it is connected to, + /// outputting to the provided output pin, and enable the opamp. + /// + /// The output pin is held within the returned [`OpAmpOutput`] struct, + /// preventing it being used elsewhere. The `OpAmpOutput` can then be + /// directly used as an ADC input. The opamp will be disabled when the + /// [`OpAmpOutput`] is dropped. + #[cfg(opamp_g4)] + pub fn buffer_dac( + &'d mut self, + out_pin: impl Peripheral

+ crate::gpio::Pin> + 'd, + ) -> OpAmpOutput<'d, T> { + into_ref!(out_pin); + out_pin.set_as_analog(); + + T::regs().csr().modify(|w| { + use crate::pac::opamp::vals::*; + + w.set_vm_sel(VmSel::OUTPUT); + w.set_vp_sel(VpSel::DAC3_CH1); + w.set_opaintoen(Opaintoen::OUTPUTPIN); + w.set_opampen(true); + }); + + OpAmpOutput { _inner: self } + } /// Configure the OpAmp as a buffer for the provided input pin, /// with the output only used internally, and enable the opamp. From b4a2f7fb70ac3f0b0d9226ab5ff5aab7a5bf8649 Mon Sep 17 00:00:00 2001 From: Corey Schuhen Date: Thu, 30 May 2024 22:10:46 +1000 Subject: [PATCH 430/581] Use phantom for lifetime holder instead of not used pointer to pointer. --- embassy-stm32/src/can/bxcan/mod.rs | 16 +++++++--------- 1 file changed, 7 insertions(+), 9 deletions(-) diff --git a/embassy-stm32/src/can/bxcan/mod.rs b/embassy-stm32/src/can/bxcan/mod.rs index 4f516c917..c242aea2b 100644 --- a/embassy-stm32/src/can/bxcan/mod.rs +++ b/embassy-stm32/src/can/bxcan/mod.rs @@ -156,7 +156,6 @@ impl Drop for CanConfig<'_, T> { /// CAN driver pub struct Can<'d, T: Instance> { _peri: PeripheralRef<'d, T>, - instance: &'d crate::pac::can::Can, info: &'static Info, state: &'static State, } @@ -228,7 +227,6 @@ impl<'d, T: Instance> Can<'d, T> { Self { _peri: peri, - instance: &T::info().regs.0, info: T::info(), state: T::state(), } @@ -346,7 +344,7 @@ impl<'d, T: Instance> Can<'d, T> { /// Waits for a specific transmit mailbox to become empty pub async fn flush(&self, mb: Mailbox) { CanTx { - _instance: &self.instance, + _phantom: PhantomData, info: self.info, state: self.state, } @@ -362,7 +360,7 @@ impl<'d, T: Instance> Can<'d, T> { /// and a frame with equal priority is already queued for transmission. pub async fn flush_any(&self) { CanTx { - _instance: &self.instance, + _phantom: PhantomData, info: self.info, state: self.state, } @@ -373,7 +371,7 @@ impl<'d, T: Instance> Can<'d, T> { /// Waits until all of the transmit mailboxes become empty pub async fn flush_all(&self) { CanTx { - _instance: &self.instance, + _phantom: PhantomData, info: self.info, state: self.state, } @@ -424,12 +422,12 @@ impl<'d, T: Instance> Can<'d, T> { pub fn split<'c>(&'c mut self) -> (CanTx<'d>, CanRx<'d>) { ( CanTx { - _instance: &self.instance, + _phantom: PhantomData, info: self.info, state: self.state, }, CanRx { - instance: &self.instance, + _phantom: PhantomData, info: self.info, state: self.state, }, @@ -502,7 +500,7 @@ impl<'d, const TX_BUF_SIZE: usize, const RX_BUF_SIZE: usize> BufferedCan<'d, TX_ /// CAN driver, transmit half. pub struct CanTx<'d> { - _instance: &'d crate::pac::can::Can, + _phantom: PhantomData<&'d ()>, info: &'static Info, state: &'static State, } @@ -695,7 +693,7 @@ impl<'d, const TX_BUF_SIZE: usize> Drop for BufferedCanTx<'d, TX_BUF_SIZE> { /// CAN driver, receive half. #[allow(dead_code)] pub struct CanRx<'d> { - instance: &'d crate::pac::can::Can, + _phantom: PhantomData<&'d ()>, info: &'static Info, state: &'static State, } From 368893c9cb1b192c9e0d45440cacb271d1039c29 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Jan=20=C5=A0pa=C4=8Dek?= Date: Sat, 25 May 2024 21:44:37 +0200 Subject: [PATCH 431/581] Emit cargo:rustc-check-cfg instructions from build.rs --- build_common.rs | 101 +++++++++++++++++ embassy-executor/build.rs | 31 +----- embassy-hal-internal/build.rs | 30 +---- embassy-nrf/src/qspi.rs | 2 +- embassy-stm32/Cargo.toml | 4 +- embassy-stm32/build.rs | 173 +++++++++++++++++------------ embassy-stm32/src/adc/mod.rs | 6 +- embassy-stm32/src/adc/v2.rs | 2 +- embassy-stm32/src/can/bxcan/mod.rs | 4 +- embassy-stm32/src/cryp/mod.rs | 4 +- embassy-stm32/src/dsihost.rs | 6 +- embassy-stm32/src/flash/mod.rs | 4 +- embassy-stm32/src/fmc.rs | 4 +- embassy-stm32/src/rcc/bd.rs | 6 +- embassy-stm32/src/rcc/f013.rs | 8 +- embassy-stm32/src/usb/usb.rs | 4 +- embassy-sync/build.rs | 32 +----- embassy-sync/src/lib.rs | 2 +- rust-toolchain-nightly.toml | 2 +- 19 files changed, 242 insertions(+), 183 deletions(-) create mode 100644 build_common.rs diff --git a/build_common.rs b/build_common.rs new file mode 100644 index 000000000..eda83f25d --- /dev/null +++ b/build_common.rs @@ -0,0 +1,101 @@ +use std::collections::HashSet; +use std::env; +use std::ffi::OsString; +use std::process::Command; + +/// Helper for emitting cargo instruction for enabling configs (`cargo:rustc-cfg=X`) and declaring +/// them (`cargo:rust-check-cfg=cfg(X)`). +#[derive(Debug)] +pub struct CfgSet { + enabled: HashSet, + declared: HashSet, + emit_declared: bool, +} + +impl CfgSet { + pub fn new() -> Self { + Self { + enabled: HashSet::new(), + declared: HashSet::new(), + emit_declared: is_rustc_nightly(), + } + } + + /// Enable a config, which can then be used in `#[cfg(...)]` for conditional compilation. + /// + /// All configs that can potentially be enabled should be unconditionally declared using + /// [`Self::declare()`]. + pub fn enable(&mut self, cfg: impl AsRef) { + if self.enabled.insert(cfg.as_ref().to_owned()) { + println!("cargo:rustc-cfg={}", cfg.as_ref()); + } + } + + pub fn enable_all(&mut self, cfgs: &[impl AsRef]) { + for cfg in cfgs.iter() { + self.enable(cfg.as_ref()); + } + } + + /// Declare a valid config for conditional compilation, without enabling it. + /// + /// This enables rustc to check that the configs in `#[cfg(...)]` attributes are valid. + pub fn declare(&mut self, cfg: impl AsRef) { + if self.declared.insert(cfg.as_ref().to_owned()) && self.emit_declared { + println!("cargo:rustc-check-cfg=cfg({})", cfg.as_ref()); + } + } + + pub fn declare_all(&mut self, cfgs: &[impl AsRef]) { + for cfg in cfgs.iter() { + self.declare(cfg.as_ref()); + } + } + + pub fn set(&mut self, cfg: impl Into, enable: bool) { + let cfg = cfg.into(); + if enable { + self.enable(cfg.clone()); + } + self.declare(cfg); + } +} + +fn is_rustc_nightly() -> bool { + let rustc = env::var_os("RUSTC").unwrap_or_else(|| OsString::from("rustc")); + + let output = Command::new(rustc) + .arg("--version") + .output() + .expect("failed to run `rustc --version`"); + + String::from_utf8_lossy(&output.stdout).contains("nightly") +} + +/// Sets configs that describe the target platform. +pub fn set_target_cfgs(cfgs: &mut CfgSet) { + let target = env::var("TARGET").unwrap(); + + if target.starts_with("thumbv6m-") { + cfgs.enable_all(&["cortex_m", "armv6m"]); + } else if target.starts_with("thumbv7m-") { + cfgs.enable_all(&["cortex_m", "armv7m"]); + } else if target.starts_with("thumbv7em-") { + cfgs.enable_all(&["cortex_m", "armv7m", "armv7em"]); + } else if target.starts_with("thumbv8m.base") { + cfgs.enable_all(&["cortex_m", "armv8m", "armv8m_base"]); + } else if target.starts_with("thumbv8m.main") { + cfgs.enable_all(&["cortex_m", "armv8m", "armv8m_main"]); + } + cfgs.declare_all(&[ + "cortex_m", + "armv6m", + "armv7m", + "armv7em", + "armv8m", + "armv8m_base", + "armv8m_main", + ]); + + cfgs.set("has_fpu", target.ends_with("-eabihf")); +} diff --git a/embassy-executor/build.rs b/embassy-executor/build.rs index 07f31e3fb..8af8ccaf3 100644 --- a/embassy-executor/build.rs +++ b/embassy-executor/build.rs @@ -3,6 +3,9 @@ use std::fmt::Write; use std::path::PathBuf; use std::{env, fs}; +#[path = "../build_common.rs"] +mod common; + static CONFIGS: &[(&str, usize)] = &[ // BEGIN AUTOGENERATED CONFIG FEATURES // Generated by gen_config.py. DO NOT EDIT. @@ -91,30 +94,6 @@ fn main() { let out_file = out_dir.join("config.rs").to_string_lossy().to_string(); fs::write(out_file, data).unwrap(); - // cortex-m targets - let target = env::var("TARGET").unwrap(); - - if target.starts_with("thumbv6m-") { - println!("cargo:rustc-cfg=cortex_m"); - println!("cargo:rustc-cfg=armv6m"); - } else if target.starts_with("thumbv7m-") { - println!("cargo:rustc-cfg=cortex_m"); - println!("cargo:rustc-cfg=armv7m"); - } else if target.starts_with("thumbv7em-") { - println!("cargo:rustc-cfg=cortex_m"); - println!("cargo:rustc-cfg=armv7m"); - println!("cargo:rustc-cfg=armv7em"); // (not currently used) - } else if target.starts_with("thumbv8m.base") { - println!("cargo:rustc-cfg=cortex_m"); - println!("cargo:rustc-cfg=armv8m"); - println!("cargo:rustc-cfg=armv8m_base"); - } else if target.starts_with("thumbv8m.main") { - println!("cargo:rustc-cfg=cortex_m"); - println!("cargo:rustc-cfg=armv8m"); - println!("cargo:rustc-cfg=armv8m_main"); - } - - if target.ends_with("-eabihf") { - println!("cargo:rustc-cfg=has_fpu"); - } + let mut rustc_cfgs = common::CfgSet::new(); + common::set_target_cfgs(&mut rustc_cfgs); } diff --git a/embassy-hal-internal/build.rs b/embassy-hal-internal/build.rs index 6fe82b44f..2649f5d37 100644 --- a/embassy-hal-internal/build.rs +++ b/embassy-hal-internal/build.rs @@ -1,29 +1,7 @@ -use std::env; +#[path = "../build_common.rs"] +mod common; fn main() { - let target = env::var("TARGET").unwrap(); - - if target.starts_with("thumbv6m-") { - println!("cargo:rustc-cfg=cortex_m"); - println!("cargo:rustc-cfg=armv6m"); - } else if target.starts_with("thumbv7m-") { - println!("cargo:rustc-cfg=cortex_m"); - println!("cargo:rustc-cfg=armv7m"); - } else if target.starts_with("thumbv7em-") { - println!("cargo:rustc-cfg=cortex_m"); - println!("cargo:rustc-cfg=armv7m"); - println!("cargo:rustc-cfg=armv7em"); // (not currently used) - } else if target.starts_with("thumbv8m.base") { - println!("cargo:rustc-cfg=cortex_m"); - println!("cargo:rustc-cfg=armv8m"); - println!("cargo:rustc-cfg=armv8m_base"); - } else if target.starts_with("thumbv8m.main") { - println!("cargo:rustc-cfg=cortex_m"); - println!("cargo:rustc-cfg=armv8m"); - println!("cargo:rustc-cfg=armv8m_main"); - } - - if target.ends_with("-eabihf") { - println!("cargo:rustc-cfg=has_fpu"); - } + let mut cfgs = common::CfgSet::new(); + common::set_target_cfgs(&mut cfgs); } diff --git a/embassy-nrf/src/qspi.rs b/embassy-nrf/src/qspi.rs index 060fe72cd..d40096edc 100755 --- a/embassy-nrf/src/qspi.rs +++ b/embassy-nrf/src/qspi.rs @@ -166,7 +166,7 @@ impl<'d, T: Instance> Qspi<'d, T> { $pin.conf().write(|w| { w.dir().output(); w.drive().h0h1(); - #[cfg(feature = "_nrf5340-s")] + #[cfg(all(feature = "_nrf5340", feature = "_s"))] w.mcusel().peripheral(); w }); diff --git a/embassy-stm32/Cargo.toml b/embassy-stm32/Cargo.toml index 4f0d7356d..6a1dfec26 100644 --- a/embassy-stm32/Cargo.toml +++ b/embassy-stm32/Cargo.toml @@ -72,7 +72,7 @@ rand_core = "0.6.3" sdio-host = "0.5.0" critical-section = "1.1" #stm32-metapac = { version = "15" } -stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-ad633a3e266151ea4d8fad630031a075ee02ab34" } +stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-59b1f65bd109c3ef35782e6c44062208d0ef3d0e" } vcell = "0.1.3" nb = "1.0.0" @@ -97,7 +97,7 @@ proc-macro2 = "1.0.36" quote = "1.0.15" #stm32-metapac = { version = "15", default-features = false, features = ["metadata"]} -stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-ad633a3e266151ea4d8fad630031a075ee02ab34", default-features = false, features = ["metadata"]} +stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-59b1f65bd109c3ef35782e6c44062208d0ef3d0e", default-features = false, features = ["metadata"] } [features] default = ["rt"] diff --git a/embassy-stm32/build.rs b/embassy-stm32/build.rs index 6c524ced6..c7b2ea63a 100644 --- a/embassy-stm32/build.rs +++ b/embassy-stm32/build.rs @@ -9,35 +9,16 @@ use proc_macro2::{Ident, TokenStream}; use quote::{format_ident, quote}; use stm32_metapac::metadata::ir::BitOffset; use stm32_metapac::metadata::{ - MemoryRegionKind, PeripheralRccKernelClock, PeripheralRccRegister, PeripheralRegisters, StopMode, METADATA, + MemoryRegionKind, PeripheralRccKernelClock, PeripheralRccRegister, PeripheralRegisters, StopMode, ALL_CHIPS, + ALL_PERIPHERAL_VERSIONS, METADATA, }; +#[path = "../build_common.rs"] +mod common; + fn main() { - let target = env::var("TARGET").unwrap(); - - if target.starts_with("thumbv6m-") { - println!("cargo:rustc-cfg=cortex_m"); - println!("cargo:rustc-cfg=armv6m"); - } else if target.starts_with("thumbv7m-") { - println!("cargo:rustc-cfg=cortex_m"); - println!("cargo:rustc-cfg=armv7m"); - } else if target.starts_with("thumbv7em-") { - println!("cargo:rustc-cfg=cortex_m"); - println!("cargo:rustc-cfg=armv7m"); - println!("cargo:rustc-cfg=armv7em"); // (not currently used) - } else if target.starts_with("thumbv8m.base") { - println!("cargo:rustc-cfg=cortex_m"); - println!("cargo:rustc-cfg=armv8m"); - println!("cargo:rustc-cfg=armv8m_base"); - } else if target.starts_with("thumbv8m.main") { - println!("cargo:rustc-cfg=cortex_m"); - println!("cargo:rustc-cfg=armv8m"); - println!("cargo:rustc-cfg=armv8m_main"); - } - - if target.ends_with("-eabihf") { - println!("cargo:rustc-cfg=has_fpu"); - } + let mut cfgs = common::CfgSet::new(); + common::set_target_cfgs(&mut cfgs); let chip_name = match env::vars() .map(|(a, _)| a) @@ -56,8 +37,15 @@ fn main() { for p in METADATA.peripherals { if let Some(r) = &p.registers { - println!("cargo:rustc-cfg={}", r.kind); - println!("cargo:rustc-cfg={}_{}", r.kind, r.version); + cfgs.enable(r.kind); + cfgs.enable(format!("{}_{}", r.kind, r.version)); + } + } + + for &(kind, versions) in ALL_PERIPHERAL_VERSIONS.iter() { + cfgs.declare(kind); + for &version in versions.iter() { + cfgs.declare(format!("{}_{}", kind, version)); } } @@ -67,7 +55,13 @@ fn main() { let mut singletons: Vec = Vec::new(); for p in METADATA.peripherals { if let Some(r) = &p.registers { - println!("cargo:rustc-cfg=peri_{}", p.name.to_ascii_lowercase()); + if r.kind == "adccommon" || r.kind == "sai" || r.kind == "ucpd" { + // TODO: should we emit this for all peripherals? if so, we will need a list of all + // possible peripherals across all chips, so that we can declare the configs + // (replacing the hard-coded list of `peri_*` cfgs below) + cfgs.enable(format!("peri_{}", p.name.to_ascii_lowercase())); + } + match r.kind { // Generate singletons per pin, not per port "gpio" => { @@ -87,7 +81,7 @@ fn main() { if pin.signal.starts_with("MCO") { let name = pin.signal.replace('_', "").to_string(); if !singletons.contains(&name) { - println!("cargo:rustc-cfg={}", name.to_ascii_lowercase()); + cfgs.enable(name.to_ascii_lowercase()); singletons.push(name); } } @@ -106,6 +100,20 @@ fn main() { } } + cfgs.declare_all(&[ + "peri_adc1_common", + "peri_adc3_common", + "peri_adc12_common", + "peri_adc34_common", + "peri_sai1", + "peri_sai2", + "peri_sai3", + "peri_sai4", + "peri_ucpd1", + "peri_ucpd2", + ]); + cfgs.declare_all(&["mco", "mco1", "mco2"]); + // One singleton per EXTI line for pin_num in 0..16 { singletons.push(format!("EXTI{}", pin_num)); @@ -221,7 +229,13 @@ fn main() { }; if !time_driver_singleton.is_empty() { - println!("cargo:rustc-cfg=time_driver_{}", time_driver_singleton.to_lowercase()); + cfgs.enable(format!("time_driver_{}", time_driver_singleton.to_lowercase())); + } + for tim in [ + "tim1", "tim2", "tim3", "tim4", "tim5", "tim8", "tim9", "tim12", "tim15", "tim20", "tim21", "tim22", "tim23", + "tim24", + ] { + cfgs.declare(format!("time_driver_{}", tim)); } // ======== @@ -1593,54 +1607,65 @@ fn main() { rustfmt(&out_file); // ======== - // Multicore + // Configs for multicore and for targeting groups of chips - let mut s = chip_name.split('_'); - let mut chip_name: String = s.next().unwrap().to_string(); - let core_name = if let Some(c) = s.next() { - if !c.starts_with("CM") { - chip_name.push('_'); - chip_name.push_str(c); + fn get_chip_cfgs(chip_name: &str) -> Vec { + let mut cfgs = Vec::new(); + + // Multicore + + let mut s = chip_name.split('_'); + let mut chip_name: String = s.next().unwrap().to_string(); + let core_name = if let Some(c) = s.next() { + if !c.starts_with("CM") { + chip_name.push('_'); + chip_name.push_str(c); + None + } else { + Some(c) + } + } else { None - } else { - Some(c) - } - } else { - None - }; + }; - if let Some(core) = core_name { - println!("cargo:rustc-cfg={}_{}", &chip_name[..chip_name.len() - 2], core); + if let Some(core) = core_name { + cfgs.push(format!("{}_{}", &chip_name[..chip_name.len() - 2], core)); + } + + // Configs for targeting groups of chips + if &chip_name[..8] == "stm32wba" { + cfgs.push(chip_name[..8].to_owned()); // stm32wba + cfgs.push(chip_name[..10].to_owned()); // stm32wba52 + cfgs.push(format!("package_{}", &chip_name[10..11])); + cfgs.push(format!("flashsize_{}", &chip_name[11..12])); + } else { + if &chip_name[..8] == "stm32h7r" || &chip_name[..8] == "stm32h7s" { + cfgs.push("stm32h7rs".to_owned()); + } else { + cfgs.push(chip_name[..7].to_owned()); // stm32f4 + } + cfgs.push(chip_name[..9].to_owned()); // stm32f429 + cfgs.push(format!("{}x", &chip_name[..8])); // stm32f42x + cfgs.push(format!("{}x{}", &chip_name[..7], &chip_name[8..9])); // stm32f4x9 + cfgs.push(format!("package_{}", &chip_name[9..10])); + cfgs.push(format!("flashsize_{}", &chip_name[10..11])); + } + + // Mark the L4+ chips as they have many differences to regular L4. + if &chip_name[..7] == "stm32l4" { + if "pqrs".contains(&chip_name[7..8]) { + cfgs.push("stm32l4_plus".to_owned()); + } else { + cfgs.push("stm32l4_nonplus".to_owned()); + } + } + + cfgs } - // ======= - // Features for targeting groups of chips - - if &chip_name[..8] == "stm32wba" { - println!("cargo:rustc-cfg={}", &chip_name[..8]); // stm32wba - println!("cargo:rustc-cfg={}", &chip_name[..10]); // stm32wba52 - println!("cargo:rustc-cfg=package_{}", &chip_name[10..11]); - println!("cargo:rustc-cfg=flashsize_{}", &chip_name[11..12]); - } else { - if &chip_name[..8] == "stm32h7r" || &chip_name[..8] == "stm32h7s" { - println!("cargo:rustc-cfg=stm32h7rs"); - } else { - println!("cargo:rustc-cfg={}", &chip_name[..7]); // stm32f4 - } - println!("cargo:rustc-cfg={}", &chip_name[..9]); // stm32f429 - println!("cargo:rustc-cfg={}x", &chip_name[..8]); // stm32f42x - println!("cargo:rustc-cfg={}x{}", &chip_name[..7], &chip_name[8..9]); // stm32f4x9 - println!("cargo:rustc-cfg=package_{}", &chip_name[9..10]); - println!("cargo:rustc-cfg=flashsize_{}", &chip_name[10..11]); - } - - // Mark the L4+ chips as they have many differences to regular L4. - if &chip_name[..7] == "stm32l4" { - if "pqrs".contains(&chip_name[7..8]) { - println!("cargo:rustc-cfg=stm32l4_plus"); - } else { - println!("cargo:rustc-cfg=stm32l4_nonplus"); - } + cfgs.enable_all(&get_chip_cfgs(&chip_name)); + for &chip_name in ALL_CHIPS.iter() { + cfgs.declare_all(&get_chip_cfgs(&chip_name.to_ascii_lowercase())); } println!("cargo:rerun-if-changed=build.rs"); diff --git a/embassy-stm32/src/adc/mod.rs b/embassy-stm32/src/adc/mod.rs index 040ee9c53..0c22a7dae 100644 --- a/embassy-stm32/src/adc/mod.rs +++ b/embassy-stm32/src/adc/mod.rs @@ -71,9 +71,9 @@ pub(crate) trait SealedAdcChannel { /// Performs a busy-wait delay for a specified number of microseconds. #[allow(unused)] pub(crate) fn blocking_delay_us(us: u32) { - #[cfg(time)] - embassy_time::block_for(embassy_time::Duration::from_micros(us)); - #[cfg(not(time))] + #[cfg(feature = "time")] + embassy_time::block_for(embassy_time::Duration::from_micros(us as u64)); + #[cfg(not(feature = "time"))] { let freq = unsafe { crate::rcc::get_freqs() }.sys.unwrap().0 as u64; let us = us as u64; diff --git a/embassy-stm32/src/adc/v2.rs b/embassy-stm32/src/adc/v2.rs index 77e8bb56f..e3175dff5 100644 --- a/embassy-stm32/src/adc/v2.rs +++ b/embassy-stm32/src/adc/v2.rs @@ -31,7 +31,7 @@ impl AdcChannel for Temperature {} impl super::SealedAdcChannel for Temperature { fn channel(&self) -> u8 { cfg_if::cfg_if! { - if #[cfg(any(stm32f2, stm32f40, stm32f41))] { + if #[cfg(any(stm32f2, stm32f40x, stm32f41x))] { 16 } else { 18 diff --git a/embassy-stm32/src/can/bxcan/mod.rs b/embassy-stm32/src/can/bxcan/mod.rs index 69e20e909..9f7df1e71 100644 --- a/embassy-stm32/src/can/bxcan/mod.rs +++ b/embassy-stm32/src/can/bxcan/mod.rs @@ -1132,8 +1132,8 @@ foreach_peripheral!( (can, CAN1) => { cfg_if::cfg_if! { if #[cfg(all( - any(stm32l4, stm32f72, stm32f73), - not(any(stm32l49, stm32l4a)) + any(stm32l4, stm32f72x, stm32f73x), + not(any(stm32l49x, stm32l4ax)) ))] { // Most L4 devices and some F7 devices use the name "CAN1" // even if there is no "CAN2" peripheral. diff --git a/embassy-stm32/src/cryp/mod.rs b/embassy-stm32/src/cryp/mod.rs index ad118ef6e..8d600c73c 100644 --- a/embassy-stm32/src/cryp/mod.rs +++ b/embassy-stm32/src/cryp/mod.rs @@ -744,7 +744,7 @@ impl<'c, const KEY_SIZE: usize, const TAG_SIZE: usize, const IV_SIZE: usize> Aes } else { aad_header[0] = 0xFF; aad_header[1] = 0xFE; - let aad_len_bytes: [u8; 4] = aad_len.to_be_bytes(); + let aad_len_bytes: [u8; 4] = (aad_len as u32).to_be_bytes(); aad_header[2] = aad_len_bytes[0]; aad_header[3] = aad_len_bytes[1]; aad_header[4] = aad_len_bytes[2]; @@ -765,7 +765,7 @@ impl<'c, const KEY_SIZE: usize, const TAG_SIZE: usize, const IV_SIZE: usize> Aes block0[0] |= ((((TAG_SIZE as u8) - 2) >> 1) & 0x07) << 3; block0[0] |= ((15 - (iv.len() as u8)) - 1) & 0x07; block0[1..1 + iv.len()].copy_from_slice(iv); - let payload_len_bytes: [u8; 4] = payload_len.to_be_bytes(); + let payload_len_bytes: [u8; 4] = (payload_len as u32).to_be_bytes(); if iv.len() <= 11 { block0[12] = payload_len_bytes[0]; } else if payload_len_bytes[0] > 0 { diff --git a/embassy-stm32/src/dsihost.rs b/embassy-stm32/src/dsihost.rs index dc58bca92..e1fb3b0b0 100644 --- a/embassy-stm32/src/dsihost.rs +++ b/embassy-stm32/src/dsihost.rs @@ -11,9 +11,9 @@ use crate::{peripherals, Peripheral}; /// Performs a busy-wait delay for a specified number of microseconds. pub fn blocking_delay_ms(ms: u32) { - #[cfg(time)] - embassy_time::block_for(embassy_time::Duration::from_millis(ms)); - #[cfg(not(time))] + #[cfg(feature = "time")] + embassy_time::block_for(embassy_time::Duration::from_millis(ms as u64)); + #[cfg(not(feature = "time"))] cortex_m::asm::delay(unsafe { crate::rcc::get_freqs() }.sys.unwrap().0 / 1_000 * ms); } diff --git a/embassy-stm32/src/flash/mod.rs b/embassy-stm32/src/flash/mod.rs index 8c6ca2471..ce2d1a04c 100644 --- a/embassy-stm32/src/flash/mod.rs +++ b/embassy-stm32/src/flash/mod.rs @@ -96,7 +96,7 @@ pub enum FlashBank { #[cfg_attr(any(flash_f1, flash_f3), path = "f1f3.rs")] #[cfg_attr(flash_f4, path = "f4.rs")] #[cfg_attr(flash_f7, path = "f7.rs")] -#[cfg_attr(any(flash_g0, flash_g4), path = "g.rs")] +#[cfg_attr(any(flash_g0, flash_g4c2, flash_g4c3, flash_g4c4), path = "g.rs")] #[cfg_attr(flash_h7, path = "h7.rs")] #[cfg_attr(flash_h7ab, path = "h7.rs")] #[cfg_attr(flash_u5, path = "u5.rs")] @@ -105,7 +105,7 @@ pub enum FlashBank { #[cfg_attr( not(any( flash_l0, flash_l1, flash_l4, flash_wl, flash_wb, flash_f0, flash_f1, flash_f3, flash_f4, flash_f7, flash_g0, - flash_g4, flash_h7, flash_h7ab, flash_u5, flash_h50, flash_u0 + flash_g4c2, flash_g4c3, flash_g4c4, flash_h7, flash_h7ab, flash_u5, flash_h50, flash_u0 )), path = "other.rs" )] diff --git a/embassy-stm32/src/fmc.rs b/embassy-stm32/src/fmc.rs index 0df64f711..82d8089f4 100644 --- a/embassy-stm32/src/fmc.rs +++ b/embassy-stm32/src/fmc.rs @@ -35,7 +35,7 @@ where // fmc v1 and v2 does not have the fmcen bit // fsmc v1, v2 and v3 does not have the fmcen bit // This is a "not" because it is expected that all future versions have this bit - #[cfg(not(any(fmc_v1x3, fmc_v2x1, fsmc_v1x0, fsmc_v1x3, fsmc_v2x3, fsmc_v3x1, fmc_v4)))] + #[cfg(not(any(fmc_v1x3, fmc_v2x1, fsmc_v1x0, fsmc_v1x3, fmc_v4)))] T::REGS.bcr1().modify(|r| r.set_fmcen(true)); #[cfg(any(fmc_v4))] T::REGS.nor_psram().bcr1().modify(|r| r.set_fmcen(true)); @@ -61,7 +61,7 @@ where // fmc v1 and v2 does not have the fmcen bit // fsmc v1, v2 and v3 does not have the fmcen bit // This is a "not" because it is expected that all future versions have this bit - #[cfg(not(any(fmc_v1x3, fmc_v2x1, fsmc_v1x0, fsmc_v1x3, fsmc_v2x3, fsmc_v3x1, fmc_v4)))] + #[cfg(not(any(fmc_v1x3, fmc_v2x1, fsmc_v1x0, fsmc_v1x3, fmc_v4)))] T::REGS.bcr1().modify(|r| r.set_fmcen(true)); #[cfg(any(fmc_v4))] T::REGS.nor_psram().bcr1().modify(|r| r.set_fmcen(true)); diff --git a/embassy-stm32/src/rcc/bd.rs b/embassy-stm32/src/rcc/bd.rs index f3ac4fdbe..4e9c18594 100644 --- a/embassy-stm32/src/rcc/bd.rs +++ b/embassy-stm32/src/rcc/bd.rs @@ -33,7 +33,7 @@ pub enum LseDrive { } // All families but these have the LSEDRV register -#[cfg(not(any(rcc_f1, rcc_f1cl, rcc_f100, rcc_f2, rcc_f4, rcc_f400, rcc_f410, rcc_l1)))] +#[cfg(not(any(rcc_f1, rcc_f1cl, rcc_f100, rcc_f2, rcc_f4, rcc_f410, rcc_l1)))] impl From for crate::pac::rcc::vals::Lsedrv { fn from(value: LseDrive) -> Self { use crate::pac::rcc::vals::Lsedrv; @@ -186,7 +186,7 @@ impl LsConfig { } ok &= reg.lseon() == lse_en; ok &= reg.lsebyp() == lse_byp; - #[cfg(not(any(rcc_f1, rcc_f1cl, rcc_f100, rcc_f2, rcc_f4, rcc_f400, rcc_f410, rcc_l1)))] + #[cfg(not(any(rcc_f1, rcc_f1cl, rcc_f100, rcc_f2, rcc_f4, rcc_f410, rcc_l1)))] if let Some(lse_drv) = lse_drv { ok &= reg.lsedrv() == lse_drv.into(); } @@ -224,7 +224,7 @@ impl LsConfig { if lse_en { bdcr().modify(|w| { - #[cfg(not(any(rcc_f1, rcc_f1cl, rcc_f100, rcc_f2, rcc_f4, rcc_f400, rcc_f410, rcc_l1)))] + #[cfg(not(any(rcc_f1, rcc_f1cl, rcc_f100, rcc_f2, rcc_f4, rcc_f410, rcc_l1)))] if let Some(lse_drv) = lse_drv { w.set_lsedrv(lse_drv.into()); } diff --git a/embassy-stm32/src/rcc/f013.rs b/embassy-stm32/src/rcc/f013.rs index 1c951a22b..63dc27bdd 100644 --- a/embassy-stm32/src/rcc/f013.rs +++ b/embassy-stm32/src/rcc/f013.rs @@ -95,7 +95,7 @@ pub struct Config { #[cfg(all(stm32f3, not(rcc_f37)))] pub adc: AdcClockSource, - #[cfg(all(stm32f3, not(rcc_f37), adc3_common))] + #[cfg(all(stm32f3, not(rcc_f37), any(peri_adc3_common, peri_adc34_common)))] pub adc34: AdcClockSource, /// Per-peripheral kernel clock selection muxes @@ -125,7 +125,7 @@ impl Default for Config { #[cfg(all(stm32f3, not(rcc_f37)))] adc: AdcClockSource::Hclk(AdcHclkPrescaler::Div1), - #[cfg(all(stm32f3, not(rcc_f37), adc3_common))] + #[cfg(all(stm32f3, not(rcc_f37), any(peri_adc3_common, peri_adc34_common)))] adc34: AdcClockSource::Hclk(AdcHclkPrescaler::Div1), mux: Default::default(), @@ -339,7 +339,7 @@ pub(crate) unsafe fn init(config: Config) { } }; - #[cfg(all(stm32f3, not(rcc_f37), adc3_common))] + #[cfg(all(stm32f3, not(rcc_f37), any(peri_adc3_common, peri_adc34_common)))] let adc34 = { #[cfg(peri_adc3_common)] let common = crate::pac::ADC3_COMMON; @@ -404,7 +404,7 @@ pub(crate) unsafe fn init(config: Config) { hclk1: Some(hclk), #[cfg(all(stm32f3, not(rcc_f37)))] adc: Some(adc), - #[cfg(all(stm32f3, not(rcc_f37), adc3_common))] + #[cfg(all(stm32f3, not(rcc_f37), any(peri_adc3_common, peri_adc34_common)))] adc34: Some(adc34), rtc: rtc, hsi48: hsi48, diff --git a/embassy-stm32/src/usb/usb.rs b/embassy-stm32/src/usb/usb.rs index 81a2d2623..b6c88ac9a 100644 --- a/embassy-stm32/src/usb/usb.rs +++ b/embassy-stm32/src/usb/usb.rs @@ -267,9 +267,9 @@ impl<'d, T: Instance> Driver<'d, T> { w.set_fres(true); }); - #[cfg(time)] + #[cfg(feature = "time")] embassy_time::block_for(embassy_time::Duration::from_millis(100)); - #[cfg(not(time))] + #[cfg(not(feature = "time"))] cortex_m::asm::delay(unsafe { crate::rcc::get_freqs() }.sys.unwrap().0 / 10); #[cfg(not(usb_v4))] diff --git a/embassy-sync/build.rs b/embassy-sync/build.rs index afd76dad1..2649f5d37 100644 --- a/embassy-sync/build.rs +++ b/embassy-sync/build.rs @@ -1,31 +1,7 @@ -use std::env; +#[path = "../build_common.rs"] +mod common; fn main() { - println!("cargo:rerun-if-changed=build.rs"); - - let target = env::var("TARGET").unwrap(); - - if target.starts_with("thumbv6m-") { - println!("cargo:rustc-cfg=cortex_m"); - println!("cargo:rustc-cfg=armv6m"); - } else if target.starts_with("thumbv7m-") { - println!("cargo:rustc-cfg=cortex_m"); - println!("cargo:rustc-cfg=armv7m"); - } else if target.starts_with("thumbv7em-") { - println!("cargo:rustc-cfg=cortex_m"); - println!("cargo:rustc-cfg=armv7m"); - println!("cargo:rustc-cfg=armv7em"); // (not currently used) - } else if target.starts_with("thumbv8m.base") { - println!("cargo:rustc-cfg=cortex_m"); - println!("cargo:rustc-cfg=armv8m"); - println!("cargo:rustc-cfg=armv8m_base"); - } else if target.starts_with("thumbv8m.main") { - println!("cargo:rustc-cfg=cortex_m"); - println!("cargo:rustc-cfg=armv8m"); - println!("cargo:rustc-cfg=armv8m_main"); - } - - if target.ends_with("-eabihf") { - println!("cargo:rustc-cfg=has_fpu"); - } + let mut cfgs = common::CfgSet::new(); + common::set_target_cfgs(&mut cfgs); } diff --git a/embassy-sync/src/lib.rs b/embassy-sync/src/lib.rs index 1873483f9..a5eee8d02 100644 --- a/embassy-sync/src/lib.rs +++ b/embassy-sync/src/lib.rs @@ -1,4 +1,4 @@ -#![cfg_attr(not(any(feature = "std", feature = "wasm")), no_std)] +#![cfg_attr(not(feature = "std"), no_std)] #![allow(async_fn_in_trait)] #![allow(clippy::new_without_default)] #![doc = include_str!("../README.md")] diff --git a/rust-toolchain-nightly.toml b/rust-toolchain-nightly.toml index ac160b995..2143c1b2d 100644 --- a/rust-toolchain-nightly.toml +++ b/rust-toolchain-nightly.toml @@ -1,5 +1,5 @@ [toolchain] -channel = "nightly-2024-04-14" +channel = "nightly-2024-05-20" components = [ "rust-src", "rustfmt", "llvm-tools", "miri" ] targets = [ "thumbv7em-none-eabi", From 6eaa25934226ee5ff2038a34e6d32b5d69559c1d Mon Sep 17 00:00:00 2001 From: "Andres O. Vela" Date: Thu, 30 May 2024 22:16:56 +0200 Subject: [PATCH 432/581] embassy-time: add timestamp features --- embassy-time/Cargo.toml | 10 +++++++++- embassy-time/src/lib.rs | 17 ++++++++++++++++- 2 files changed, 25 insertions(+), 2 deletions(-) diff --git a/embassy-time/Cargo.toml b/embassy-time/Cargo.toml index ca7ad2d09..ce3f3d8c2 100644 --- a/embassy-time/Cargo.toml +++ b/embassy-time/Cargo.toml @@ -27,9 +27,17 @@ features = ["defmt", "std"] std = ["tick-hz-1_000_000", "critical-section/std"] wasm = ["dep:wasm-bindgen", "dep:js-sys", "dep:wasm-timer", "tick-hz-1_000_000"] -## Display a timestamp of the number of seconds since startup next to defmt log messages +## Display the time since startup next to defmt log messages. +## At most 1 `defmt-timestamp-uptime-*` feature can be used. +## `defmt-timestamp-uptime` is provided for backwards compatibility (provides the same format as `uptime-us`). ## To use this you must have a time driver provided. defmt-timestamp-uptime = ["defmt"] +defmt-timestamp-uptime-s = ["defmt"] +defmt-timestamp-uptime-ms = ["defmt"] +defmt-timestamp-uptime-us = ["defmt"] +defmt-timestamp-uptime-ts = ["defmt"] +defmt-timestamp-uptime-tms = ["defmt"] +defmt-timestamp-uptime-tus = ["defmt"] ## Create a `MockDriver` that can be manually advanced for testing purposes. mock-driver = ["tick-hz-1_000_000"] diff --git a/embassy-time/src/lib.rs b/embassy-time/src/lib.rs index 3c8575ee9..24ee51be7 100644 --- a/embassy-time/src/lib.rs +++ b/embassy-time/src/lib.rs @@ -46,5 +46,20 @@ pub(crate) const GCD_1K: u64 = gcd(TICK_HZ, 1_000); pub(crate) const GCD_1M: u64 = gcd(TICK_HZ, 1_000_000); pub(crate) const GCD_1G: u64 = gcd(TICK_HZ, 1_000_000_000); -#[cfg(feature = "defmt-timestamp-uptime")] +#[cfg(feature = "defmt-timestamp-uptime-s")] +defmt::timestamp! {"{=u64}", Instant::now().as_secs() } + +#[cfg(feature = "defmt-timestamp-uptime-ms")] +defmt::timestamp! {"{=u64:ms}", Instant::now().as_millis() } + +#[cfg(any(feature = "defmt-timestamp-uptime", feature = "defmt-timestamp-uptime-us"))] defmt::timestamp! {"{=u64:us}", Instant::now().as_micros() } + +#[cfg(feature = "defmt-timestamp-uptime-ts")] +defmt::timestamp! {"{=u64:ts}", Instant::now().as_secs() } + +#[cfg(feature = "defmt-timestamp-uptime-tms")] +defmt::timestamp! {"{=u64:tms}", Instant::now().as_millis() } + +#[cfg(feature = "defmt-timestamp-uptime-tus")] +defmt::timestamp! {"{=u64:tus}", Instant::now().as_micros() } From 84707af5d7f3e62caafed06c416cf12fa82e4664 Mon Sep 17 00:00:00 2001 From: Bruno Bousquet <21108660+brunob45@users.noreply.github.com> Date: Thu, 30 May 2024 17:43:38 -0400 Subject: [PATCH 433/581] create functions in inner to handle register modification --- embassy-stm32/src/timer/input_capture.rs | 21 ++++-------- embassy-stm32/src/timer/low_level.rs | 14 ++++++++ embassy-stm32/src/timer/pwm_input.rs | 42 +++++++----------------- 3 files changed, 31 insertions(+), 46 deletions(-) diff --git a/embassy-stm32/src/timer/input_capture.rs b/embassy-stm32/src/timer/input_capture.rs index b3434ae63..8d1a77867 100644 --- a/embassy-stm32/src/timer/input_capture.rs +++ b/embassy-stm32/src/timer/input_capture.rs @@ -7,7 +7,7 @@ use core::task::{Context, Poll}; use embassy_hal_internal::{into_ref, PeripheralRef}; -use super::low_level::{CountingMode, InputCaptureMode, InputTISelection, Timer}; +use super::low_level::{CountingMode, FilterValue, InputCaptureMode, InputTISelection, Timer}; use super::{ CaptureCompareInterruptHandler, Channel, Channel1Pin, Channel2Pin, Channel3Pin, Channel4Pin, GeneralInstance4Channel, @@ -40,11 +40,9 @@ macro_rules! channel_impl { #[doc = concat!("Create a new ", stringify!($channel), " capture pin instance.")] pub fn $new_chx(pin: impl Peripheral

> + 'd, pull_type: Pull) -> Self { into_ref!(pin); - critical_section::with(|_| { - pin.set_as_af_pull(pin.af_num(), AFType::Input, pull_type); - #[cfg(gpio_v2)] - pin.set_speed(crate::gpio::Speed::VeryHigh); - }); + + pin.set_as_af_pull(pin.af_num(), AFType::Input, pull_type); + CapturePin { _pin: pin.map_into(), phantom: PhantomData, @@ -130,8 +128,6 @@ impl<'d, T: GeneralInstance4Channel> InputCapture<'d, T> { } fn new_future(&self, channel: Channel, mode: InputCaptureMode, tisel: InputTISelection) -> InputCaptureFuture { - use stm32_metapac::timer::vals::FilterValue; - // Configuration steps from ST RM0390 (STM32F446) chapter 17.3.5 // or ST RM0008 (STM32F103) chapter 15.3.5 Input capture mode self.inner.set_input_ti_selection(channel, tisel); @@ -184,11 +180,6 @@ impl<'d, T: GeneralInstance4Channel> InputCapture<'d, T> { } } -/// Convert pointer to TIM instance to TimGp16 object -fn regs_gp16(ptr: *mut ()) -> crate::pac::timer::TimGp16 { - unsafe { crate::pac::timer::TimGp16::from_ptr(ptr) } -} - #[must_use = "futures do nothing unless you `.await` or poll them"] struct InputCaptureFuture { channel: Channel, @@ -198,7 +189,7 @@ struct InputCaptureFuture { impl Drop for InputCaptureFuture { fn drop(&mut self) { critical_section::with(|_| { - let regs = regs_gp16(T::regs()); + let regs = unsafe { crate::pac::timer::TimGp16::from_ptr(T::regs()) }; // disable interrupt enable regs.dier().modify(|w| w.set_ccie(self.channel.index(), false)); @@ -212,7 +203,7 @@ impl Future for InputCaptureFuture { fn poll(self: Pin<&mut Self>, cx: &mut Context<'_>) -> Poll { T::state().cc_waker[self.channel.index()].register(cx.waker()); - let regs = regs_gp16(T::regs()); + let regs = unsafe { crate::pac::timer::TimGp16::from_ptr(T::regs()) }; let dier = regs.dier().read(); if !dier.ccie(self.channel.index()) { diff --git a/embassy-stm32/src/timer/low_level.rs b/embassy-stm32/src/timer/low_level.rs index 141e96894..8482fad7b 100644 --- a/embassy-stm32/src/timer/low_level.rs +++ b/embassy-stm32/src/timer/low_level.rs @@ -12,6 +12,10 @@ use super::*; use crate::pac::timer::vals; use crate::time::Hertz; +pub use stm32_metapac::timer::vals::FilterValue; +pub use stm32_metapac::timer::vals::Sms as SlaveMode; +pub use stm32_metapac::timer::vals::Ts as TriggerSource; + /// Input capture mode. #[derive(Clone, Copy)] pub enum InputCaptureMode { @@ -588,6 +592,16 @@ impl<'d, T: GeneralInstance4Channel> Timer<'d, T> { pub fn set_cc_dma_enable_state(&self, channel: Channel, ccde: bool) { self.regs_gp16().dier().modify(|w| w.set_ccde(channel.index(), ccde)) } + + /// Set Timer Slave Mode + pub fn set_slave_mode(&self, sms: SlaveMode) { + self.regs_gp16().smcr().modify(|r| r.set_sms(sms)); + } + + /// Set Timer Trigger Source + pub fn set_trigger_source(&self, ts: TriggerSource) { + self.regs_gp16().smcr().modify(|r| r.set_ts(ts)); + } } #[cfg(not(stm32l0))] diff --git a/embassy-stm32/src/timer/pwm_input.rs b/embassy-stm32/src/timer/pwm_input.rs index 7bcb7802a..dcf098a78 100644 --- a/embassy-stm32/src/timer/pwm_input.rs +++ b/embassy-stm32/src/timer/pwm_input.rs @@ -2,7 +2,7 @@ use embassy_hal_internal::into_ref; -use super::low_level::{CountingMode, InputCaptureMode, InputTISelection, Timer}; +use super::low_level::{CountingMode, InputCaptureMode, InputTISelection, SlaveMode, Timer, TriggerSource}; use super::{Channel, Channel1Pin, Channel2Pin, GeneralInstance4Channel}; use crate::gpio::{AFType, Pull}; use crate::time::Hertz; @@ -14,11 +14,6 @@ pub struct PwmInput<'d, T: GeneralInstance4Channel> { inner: Timer<'d, T>, } -/// Convert pointer to TIM instance to TimGp16 object -fn regs_gp16(ptr: *mut ()) -> crate::pac::timer::TimGp16 { - unsafe { crate::pac::timer::TimGp16::from_ptr(ptr) } -} - impl<'d, T: GeneralInstance4Channel> PwmInput<'d, T> { /// Create a new PWM input driver. pub fn new( @@ -28,11 +23,8 @@ impl<'d, T: GeneralInstance4Channel> PwmInput<'d, T> { freq: Hertz, ) -> Self { into_ref!(pin); - critical_section::with(|_| { - pin.set_as_af_pull(pin.af_num(), AFType::Input, pull_type); - #[cfg(gpio_v2)] - pin.set_speed(crate::gpio::Speed::VeryHigh); - }); + + pin.set_as_af_pull(pin.af_num(), AFType::Input, pull_type); Self::new_inner(tim, freq, Channel::Ch1, Channel::Ch2) } @@ -45,18 +37,13 @@ impl<'d, T: GeneralInstance4Channel> PwmInput<'d, T> { freq: Hertz, ) -> Self { into_ref!(pin); - critical_section::with(|_| { - pin.set_as_af_pull(pin.af_num(), AFType::Input, pull_type); - #[cfg(gpio_v2)] - pin.set_speed(crate::gpio::Speed::VeryHigh); - }); + + pin.set_as_af_pull(pin.af_num(), AFType::Input, pull_type); Self::new_inner(tim, freq, Channel::Ch2, Channel::Ch1) } fn new_inner(tim: impl Peripheral

+ 'd, freq: Hertz, ch1: Channel, ch2: Channel) -> Self { - use stm32_metapac::timer::vals::{Sms, Ts}; - let mut inner = Timer::new(tim); inner.set_counting_mode(CountingMode::EdgeAlignedUp); @@ -72,21 +59,14 @@ impl<'d, T: GeneralInstance4Channel> PwmInput<'d, T> { inner.set_input_ti_selection(ch2, InputTISelection::Alternate); inner.set_input_capture_mode(ch2, InputCaptureMode::Falling); - let regs = regs_gp16(T::regs()); - regs.smcr().modify(|r| { - // Select the valid trigger input: write the TS bits to 101 in the TIMx_SMCR register - // (TI1FP1 selected). - r.set_ts(match ch1 { - Channel::Ch1 => Ts::TI1FP1, - Channel::Ch2 => Ts::TI2FP2, - _ => panic!("Invalid channel for PWM input"), - }); - - // Configure the slave mode controller in reset mode: write the SMS bits to 100 in the - // TIMx_SMCR register. - r.set_sms(Sms::RESET_MODE); + inner.set_trigger_source(match ch1 { + Channel::Ch1 => TriggerSource::TI1FP1, + Channel::Ch2 => TriggerSource::TI2FP2, + _ => panic!("Invalid channel for PWM input"), }); + inner.set_slave_mode(SlaveMode::RESET_MODE); + // Must call the `enable` function after Self { channel: ch1, inner } From 4d307b5a7763a2d38de201bdef787bee07afe022 Mon Sep 17 00:00:00 2001 From: Bruno Bousquet <21108660+brunob45@users.noreply.github.com> Date: Thu, 30 May 2024 17:49:20 -0400 Subject: [PATCH 434/581] undo changes in input_capture --- embassy-stm32/src/timer/input_capture.rs | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/embassy-stm32/src/timer/input_capture.rs b/embassy-stm32/src/timer/input_capture.rs index 8d1a77867..0258d4077 100644 --- a/embassy-stm32/src/timer/input_capture.rs +++ b/embassy-stm32/src/timer/input_capture.rs @@ -78,18 +78,18 @@ impl<'d, T: GeneralInstance4Channel> InputCapture<'d, T> { } fn new_inner(tim: impl Peripheral

+ 'd, freq: Hertz, counting_mode: CountingMode) -> Self { - let mut inner = Timer::new(tim); + let mut this = Self { inner: Timer::new(tim) }; - inner.set_counting_mode(counting_mode); - inner.set_tick_freq(freq); - inner.enable_outputs(); // Required for advanced timers, see GeneralInstance4Channel for details - inner.start(); + this.inner.set_counting_mode(counting_mode); + this.inner.set_tick_freq(freq); + this.inner.enable_outputs(); // Required for advanced timers, see GeneralInstance4Channel for details + this.inner.start(); // enable NVIC interrupt T::CaptureCompareInterrupt::unpend(); unsafe { T::CaptureCompareInterrupt::enable() }; - Self { inner } + this } /// Enable the given channel. From 713d84f7789570c069c4880c1225bed4dc2bc3ae Mon Sep 17 00:00:00 2001 From: Bruno Bousquet <21108660+brunob45@users.noreply.github.com> Date: Thu, 30 May 2024 17:51:48 -0400 Subject: [PATCH 435/581] fix fmt --- embassy-stm32/src/timer/low_level.rs | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/embassy-stm32/src/timer/low_level.rs b/embassy-stm32/src/timer/low_level.rs index 8482fad7b..a53acc1d5 100644 --- a/embassy-stm32/src/timer/low_level.rs +++ b/embassy-stm32/src/timer/low_level.rs @@ -12,9 +12,7 @@ use super::*; use crate::pac::timer::vals; use crate::time::Hertz; -pub use stm32_metapac::timer::vals::FilterValue; -pub use stm32_metapac::timer::vals::Sms as SlaveMode; -pub use stm32_metapac::timer::vals::Ts as TriggerSource; +pub use stm32_metapac::timer::vals::{FilterValue, Sms as SlaveMode, Ts as TriggerSource}; /// Input capture mode. #[derive(Clone, Copy)] From 83b5797b8da1433568f0a584c7e5eb15ed25785e Mon Sep 17 00:00:00 2001 From: Bruno Bousquet <21108660+brunob45@users.noreply.github.com> Date: Thu, 30 May 2024 17:53:38 -0400 Subject: [PATCH 436/581] fix fmt (again) --- embassy-stm32/src/timer/low_level.rs | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/embassy-stm32/src/timer/low_level.rs b/embassy-stm32/src/timer/low_level.rs index a53acc1d5..be1692fc2 100644 --- a/embassy-stm32/src/timer/low_level.rs +++ b/embassy-stm32/src/timer/low_level.rs @@ -8,12 +8,13 @@ use embassy_hal_internal::{into_ref, Peripheral, PeripheralRef}; +// Re-export useful enums +pub use stm32_metapac::timer::vals::{FilterValue, Sms as SlaveMode, Ts as TriggerSource}; + use super::*; use crate::pac::timer::vals; use crate::time::Hertz; -pub use stm32_metapac::timer::vals::{FilterValue, Sms as SlaveMode, Ts as TriggerSource}; - /// Input capture mode. #[derive(Clone, Copy)] pub enum InputCaptureMode { From 7d869192571c0e49da425afbdc37433b8a820786 Mon Sep 17 00:00:00 2001 From: Bruno Bousquet <21108660+brunob45@users.noreply.github.com> Date: Thu, 30 May 2024 17:54:49 -0400 Subject: [PATCH 437/581] rust fmt really does not want blank space there --- embassy-stm32/src/timer/low_level.rs | 1 - 1 file changed, 1 deletion(-) diff --git a/embassy-stm32/src/timer/low_level.rs b/embassy-stm32/src/timer/low_level.rs index be1692fc2..300ea812c 100644 --- a/embassy-stm32/src/timer/low_level.rs +++ b/embassy-stm32/src/timer/low_level.rs @@ -7,7 +7,6 @@ //! The available functionality depends on the timer type. use embassy_hal_internal::{into_ref, Peripheral, PeripheralRef}; - // Re-export useful enums pub use stm32_metapac::timer::vals::{FilterValue, Sms as SlaveMode, Ts as TriggerSource}; From bfb380e8ca8c220036739e6046df79ac784d935b Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Jan=20=C5=A0pa=C4=8Dek?= Date: Thu, 30 May 2024 19:59:06 +0200 Subject: [PATCH 438/581] Copy build_common.rs into each crate, to make cargo publish happy --- embassy-executor/build.rs | 2 +- .../build_common.rs | 8 ++ embassy-hal-internal/build.rs | 2 +- embassy-hal-internal/build_common.rs | 109 ++++++++++++++++++ embassy-stm32/build.rs | 2 +- embassy-stm32/build_common.rs | 109 ++++++++++++++++++ embassy-sync/build.rs | 2 +- embassy-sync/build_common.rs | 109 ++++++++++++++++++ 8 files changed, 339 insertions(+), 4 deletions(-) rename build_common.rs => embassy-executor/build_common.rs (86%) create mode 100644 embassy-hal-internal/build_common.rs create mode 100644 embassy-stm32/build_common.rs create mode 100644 embassy-sync/build_common.rs diff --git a/embassy-executor/build.rs b/embassy-executor/build.rs index 8af8ccaf3..8a41d7503 100644 --- a/embassy-executor/build.rs +++ b/embassy-executor/build.rs @@ -3,7 +3,7 @@ use std::fmt::Write; use std::path::PathBuf; use std::{env, fs}; -#[path = "../build_common.rs"] +#[path = "./build_common.rs"] mod common; static CONFIGS: &[(&str, usize)] = &[ diff --git a/build_common.rs b/embassy-executor/build_common.rs similarity index 86% rename from build_common.rs rename to embassy-executor/build_common.rs index eda83f25d..2c65f8529 100644 --- a/build_common.rs +++ b/embassy-executor/build_common.rs @@ -1,3 +1,11 @@ +// NOTE: this file is copy-pasted between several Embassy crates, because there is no +// straightforward way to share this code: +// - it cannot be placed into the root of the repo and linked from each build.rs using `#[path = +// "../build_common.rs"]`, because `cargo publish` requires that all files published with a crate +// reside in the crate's directory, +// - it cannot be symlinked from `embassy-xxx/build_common.rs` to `../build_common.rs`, because +// symlinks don't work on Windows. + use std::collections::HashSet; use std::env; use std::ffi::OsString; diff --git a/embassy-hal-internal/build.rs b/embassy-hal-internal/build.rs index 2649f5d37..ecd2c0c9f 100644 --- a/embassy-hal-internal/build.rs +++ b/embassy-hal-internal/build.rs @@ -1,4 +1,4 @@ -#[path = "../build_common.rs"] +#[path = "./build_common.rs"] mod common; fn main() { diff --git a/embassy-hal-internal/build_common.rs b/embassy-hal-internal/build_common.rs new file mode 100644 index 000000000..2c65f8529 --- /dev/null +++ b/embassy-hal-internal/build_common.rs @@ -0,0 +1,109 @@ +// NOTE: this file is copy-pasted between several Embassy crates, because there is no +// straightforward way to share this code: +// - it cannot be placed into the root of the repo and linked from each build.rs using `#[path = +// "../build_common.rs"]`, because `cargo publish` requires that all files published with a crate +// reside in the crate's directory, +// - it cannot be symlinked from `embassy-xxx/build_common.rs` to `../build_common.rs`, because +// symlinks don't work on Windows. + +use std::collections::HashSet; +use std::env; +use std::ffi::OsString; +use std::process::Command; + +/// Helper for emitting cargo instruction for enabling configs (`cargo:rustc-cfg=X`) and declaring +/// them (`cargo:rust-check-cfg=cfg(X)`). +#[derive(Debug)] +pub struct CfgSet { + enabled: HashSet, + declared: HashSet, + emit_declared: bool, +} + +impl CfgSet { + pub fn new() -> Self { + Self { + enabled: HashSet::new(), + declared: HashSet::new(), + emit_declared: is_rustc_nightly(), + } + } + + /// Enable a config, which can then be used in `#[cfg(...)]` for conditional compilation. + /// + /// All configs that can potentially be enabled should be unconditionally declared using + /// [`Self::declare()`]. + pub fn enable(&mut self, cfg: impl AsRef) { + if self.enabled.insert(cfg.as_ref().to_owned()) { + println!("cargo:rustc-cfg={}", cfg.as_ref()); + } + } + + pub fn enable_all(&mut self, cfgs: &[impl AsRef]) { + for cfg in cfgs.iter() { + self.enable(cfg.as_ref()); + } + } + + /// Declare a valid config for conditional compilation, without enabling it. + /// + /// This enables rustc to check that the configs in `#[cfg(...)]` attributes are valid. + pub fn declare(&mut self, cfg: impl AsRef) { + if self.declared.insert(cfg.as_ref().to_owned()) && self.emit_declared { + println!("cargo:rustc-check-cfg=cfg({})", cfg.as_ref()); + } + } + + pub fn declare_all(&mut self, cfgs: &[impl AsRef]) { + for cfg in cfgs.iter() { + self.declare(cfg.as_ref()); + } + } + + pub fn set(&mut self, cfg: impl Into, enable: bool) { + let cfg = cfg.into(); + if enable { + self.enable(cfg.clone()); + } + self.declare(cfg); + } +} + +fn is_rustc_nightly() -> bool { + let rustc = env::var_os("RUSTC").unwrap_or_else(|| OsString::from("rustc")); + + let output = Command::new(rustc) + .arg("--version") + .output() + .expect("failed to run `rustc --version`"); + + String::from_utf8_lossy(&output.stdout).contains("nightly") +} + +/// Sets configs that describe the target platform. +pub fn set_target_cfgs(cfgs: &mut CfgSet) { + let target = env::var("TARGET").unwrap(); + + if target.starts_with("thumbv6m-") { + cfgs.enable_all(&["cortex_m", "armv6m"]); + } else if target.starts_with("thumbv7m-") { + cfgs.enable_all(&["cortex_m", "armv7m"]); + } else if target.starts_with("thumbv7em-") { + cfgs.enable_all(&["cortex_m", "armv7m", "armv7em"]); + } else if target.starts_with("thumbv8m.base") { + cfgs.enable_all(&["cortex_m", "armv8m", "armv8m_base"]); + } else if target.starts_with("thumbv8m.main") { + cfgs.enable_all(&["cortex_m", "armv8m", "armv8m_main"]); + } + cfgs.declare_all(&[ + "cortex_m", + "armv6m", + "armv7m", + "armv7em", + "armv8m", + "armv8m_base", + "armv8m_main", + ]); + + cfgs.set("has_fpu", target.ends_with("-eabihf")); +} diff --git a/embassy-stm32/build.rs b/embassy-stm32/build.rs index c7b2ea63a..6aedcc228 100644 --- a/embassy-stm32/build.rs +++ b/embassy-stm32/build.rs @@ -13,7 +13,7 @@ use stm32_metapac::metadata::{ ALL_PERIPHERAL_VERSIONS, METADATA, }; -#[path = "../build_common.rs"] +#[path = "./build_common.rs"] mod common; fn main() { diff --git a/embassy-stm32/build_common.rs b/embassy-stm32/build_common.rs new file mode 100644 index 000000000..2c65f8529 --- /dev/null +++ b/embassy-stm32/build_common.rs @@ -0,0 +1,109 @@ +// NOTE: this file is copy-pasted between several Embassy crates, because there is no +// straightforward way to share this code: +// - it cannot be placed into the root of the repo and linked from each build.rs using `#[path = +// "../build_common.rs"]`, because `cargo publish` requires that all files published with a crate +// reside in the crate's directory, +// - it cannot be symlinked from `embassy-xxx/build_common.rs` to `../build_common.rs`, because +// symlinks don't work on Windows. + +use std::collections::HashSet; +use std::env; +use std::ffi::OsString; +use std::process::Command; + +/// Helper for emitting cargo instruction for enabling configs (`cargo:rustc-cfg=X`) and declaring +/// them (`cargo:rust-check-cfg=cfg(X)`). +#[derive(Debug)] +pub struct CfgSet { + enabled: HashSet, + declared: HashSet, + emit_declared: bool, +} + +impl CfgSet { + pub fn new() -> Self { + Self { + enabled: HashSet::new(), + declared: HashSet::new(), + emit_declared: is_rustc_nightly(), + } + } + + /// Enable a config, which can then be used in `#[cfg(...)]` for conditional compilation. + /// + /// All configs that can potentially be enabled should be unconditionally declared using + /// [`Self::declare()`]. + pub fn enable(&mut self, cfg: impl AsRef) { + if self.enabled.insert(cfg.as_ref().to_owned()) { + println!("cargo:rustc-cfg={}", cfg.as_ref()); + } + } + + pub fn enable_all(&mut self, cfgs: &[impl AsRef]) { + for cfg in cfgs.iter() { + self.enable(cfg.as_ref()); + } + } + + /// Declare a valid config for conditional compilation, without enabling it. + /// + /// This enables rustc to check that the configs in `#[cfg(...)]` attributes are valid. + pub fn declare(&mut self, cfg: impl AsRef) { + if self.declared.insert(cfg.as_ref().to_owned()) && self.emit_declared { + println!("cargo:rustc-check-cfg=cfg({})", cfg.as_ref()); + } + } + + pub fn declare_all(&mut self, cfgs: &[impl AsRef]) { + for cfg in cfgs.iter() { + self.declare(cfg.as_ref()); + } + } + + pub fn set(&mut self, cfg: impl Into, enable: bool) { + let cfg = cfg.into(); + if enable { + self.enable(cfg.clone()); + } + self.declare(cfg); + } +} + +fn is_rustc_nightly() -> bool { + let rustc = env::var_os("RUSTC").unwrap_or_else(|| OsString::from("rustc")); + + let output = Command::new(rustc) + .arg("--version") + .output() + .expect("failed to run `rustc --version`"); + + String::from_utf8_lossy(&output.stdout).contains("nightly") +} + +/// Sets configs that describe the target platform. +pub fn set_target_cfgs(cfgs: &mut CfgSet) { + let target = env::var("TARGET").unwrap(); + + if target.starts_with("thumbv6m-") { + cfgs.enable_all(&["cortex_m", "armv6m"]); + } else if target.starts_with("thumbv7m-") { + cfgs.enable_all(&["cortex_m", "armv7m"]); + } else if target.starts_with("thumbv7em-") { + cfgs.enable_all(&["cortex_m", "armv7m", "armv7em"]); + } else if target.starts_with("thumbv8m.base") { + cfgs.enable_all(&["cortex_m", "armv8m", "armv8m_base"]); + } else if target.starts_with("thumbv8m.main") { + cfgs.enable_all(&["cortex_m", "armv8m", "armv8m_main"]); + } + cfgs.declare_all(&[ + "cortex_m", + "armv6m", + "armv7m", + "armv7em", + "armv8m", + "armv8m_base", + "armv8m_main", + ]); + + cfgs.set("has_fpu", target.ends_with("-eabihf")); +} diff --git a/embassy-sync/build.rs b/embassy-sync/build.rs index 2649f5d37..ecd2c0c9f 100644 --- a/embassy-sync/build.rs +++ b/embassy-sync/build.rs @@ -1,4 +1,4 @@ -#[path = "../build_common.rs"] +#[path = "./build_common.rs"] mod common; fn main() { diff --git a/embassy-sync/build_common.rs b/embassy-sync/build_common.rs new file mode 100644 index 000000000..2c65f8529 --- /dev/null +++ b/embassy-sync/build_common.rs @@ -0,0 +1,109 @@ +// NOTE: this file is copy-pasted between several Embassy crates, because there is no +// straightforward way to share this code: +// - it cannot be placed into the root of the repo and linked from each build.rs using `#[path = +// "../build_common.rs"]`, because `cargo publish` requires that all files published with a crate +// reside in the crate's directory, +// - it cannot be symlinked from `embassy-xxx/build_common.rs` to `../build_common.rs`, because +// symlinks don't work on Windows. + +use std::collections::HashSet; +use std::env; +use std::ffi::OsString; +use std::process::Command; + +/// Helper for emitting cargo instruction for enabling configs (`cargo:rustc-cfg=X`) and declaring +/// them (`cargo:rust-check-cfg=cfg(X)`). +#[derive(Debug)] +pub struct CfgSet { + enabled: HashSet, + declared: HashSet, + emit_declared: bool, +} + +impl CfgSet { + pub fn new() -> Self { + Self { + enabled: HashSet::new(), + declared: HashSet::new(), + emit_declared: is_rustc_nightly(), + } + } + + /// Enable a config, which can then be used in `#[cfg(...)]` for conditional compilation. + /// + /// All configs that can potentially be enabled should be unconditionally declared using + /// [`Self::declare()`]. + pub fn enable(&mut self, cfg: impl AsRef) { + if self.enabled.insert(cfg.as_ref().to_owned()) { + println!("cargo:rustc-cfg={}", cfg.as_ref()); + } + } + + pub fn enable_all(&mut self, cfgs: &[impl AsRef]) { + for cfg in cfgs.iter() { + self.enable(cfg.as_ref()); + } + } + + /// Declare a valid config for conditional compilation, without enabling it. + /// + /// This enables rustc to check that the configs in `#[cfg(...)]` attributes are valid. + pub fn declare(&mut self, cfg: impl AsRef) { + if self.declared.insert(cfg.as_ref().to_owned()) && self.emit_declared { + println!("cargo:rustc-check-cfg=cfg({})", cfg.as_ref()); + } + } + + pub fn declare_all(&mut self, cfgs: &[impl AsRef]) { + for cfg in cfgs.iter() { + self.declare(cfg.as_ref()); + } + } + + pub fn set(&mut self, cfg: impl Into, enable: bool) { + let cfg = cfg.into(); + if enable { + self.enable(cfg.clone()); + } + self.declare(cfg); + } +} + +fn is_rustc_nightly() -> bool { + let rustc = env::var_os("RUSTC").unwrap_or_else(|| OsString::from("rustc")); + + let output = Command::new(rustc) + .arg("--version") + .output() + .expect("failed to run `rustc --version`"); + + String::from_utf8_lossy(&output.stdout).contains("nightly") +} + +/// Sets configs that describe the target platform. +pub fn set_target_cfgs(cfgs: &mut CfgSet) { + let target = env::var("TARGET").unwrap(); + + if target.starts_with("thumbv6m-") { + cfgs.enable_all(&["cortex_m", "armv6m"]); + } else if target.starts_with("thumbv7m-") { + cfgs.enable_all(&["cortex_m", "armv7m"]); + } else if target.starts_with("thumbv7em-") { + cfgs.enable_all(&["cortex_m", "armv7m", "armv7em"]); + } else if target.starts_with("thumbv8m.base") { + cfgs.enable_all(&["cortex_m", "armv8m", "armv8m_base"]); + } else if target.starts_with("thumbv8m.main") { + cfgs.enable_all(&["cortex_m", "armv8m", "armv8m_main"]); + } + cfgs.declare_all(&[ + "cortex_m", + "armv6m", + "armv7m", + "armv7em", + "armv8m", + "armv8m_base", + "armv8m_main", + ]); + + cfgs.set("has_fpu", target.ends_with("-eabihf")); +} From 999a2ad829d05b2a34797cf43d625d09bd796a58 Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Fri, 31 May 2024 21:41:42 +0200 Subject: [PATCH 439/581] Fix all check-cfg errors in the entire repo. the main ci.sh now passes if running with nightly. --- embassy-boot-nrf/Cargo.toml | 1 + embassy-boot-rp/Cargo.toml | 2 -- embassy-boot-rp/build.rs | 1 + embassy-boot-stm32/Cargo.toml | 2 -- embassy-boot-stm32/build.rs | 1 + embassy-net-adin1110/Cargo.toml | 1 - embassy-net-adin1110/src/lib.rs | 2 +- embassy-stm32-wpan/Cargo.toml | 2 ++ embassy-usb-dfu/Cargo.toml | 4 +++- examples/boot/application/nrf/Cargo.toml | 7 +++++++ examples/boot/application/stm32f3/Cargo.toml | 1 + examples/boot/application/stm32f3/src/bin/a.rs | 2 +- examples/boot/application/stm32f3/src/bin/b.rs | 2 +- examples/boot/application/stm32f7/Cargo.toml | 1 + examples/boot/application/stm32f7/src/bin/a.rs | 2 +- examples/boot/application/stm32f7/src/bin/b.rs | 2 +- examples/boot/application/stm32h7/Cargo.toml | 1 + examples/boot/application/stm32h7/src/bin/a.rs | 2 +- examples/boot/application/stm32h7/src/bin/b.rs | 2 +- examples/boot/application/stm32l0/Cargo.toml | 1 + examples/boot/application/stm32l0/src/bin/a.rs | 2 +- examples/boot/application/stm32l0/src/bin/b.rs | 2 +- examples/boot/application/stm32l1/Cargo.toml | 1 + examples/boot/application/stm32l1/src/bin/a.rs | 2 +- examples/boot/application/stm32l1/src/bin/b.rs | 2 +- examples/boot/application/stm32l4/Cargo.toml | 1 + examples/boot/application/stm32l4/src/bin/a.rs | 2 +- examples/boot/application/stm32l4/src/bin/b.rs | 2 +- examples/boot/application/stm32wb-dfu/src/main.rs | 2 +- examples/boot/application/stm32wl/Cargo.toml | 1 + examples/boot/application/stm32wl/src/bin/a.rs | 2 +- examples/boot/application/stm32wl/src/bin/b.rs | 2 +- examples/boot/bootloader/nrf/Cargo.toml | 2 +- examples/boot/bootloader/rp/Cargo.toml | 2 +- examples/boot/bootloader/stm32-dual-bank/Cargo.toml | 3 +-- examples/boot/bootloader/stm32/Cargo.toml | 2 +- examples/boot/bootloader/stm32wb-dfu/Cargo.toml | 2 +- tests/stm32/src/bin/fdcan.rs | 2 +- 38 files changed, 44 insertions(+), 29 deletions(-) diff --git a/embassy-boot-nrf/Cargo.toml b/embassy-boot-nrf/Cargo.toml index e6bb27043..86bfc21f4 100644 --- a/embassy-boot-nrf/Cargo.toml +++ b/embassy-boot-nrf/Cargo.toml @@ -22,6 +22,7 @@ target = "thumbv7em-none-eabi" [dependencies] defmt = { version = "0.3", optional = true } +log = { version = "0.4.17", optional = true } embassy-sync = { version = "0.6.0", path = "../embassy-sync" } embassy-nrf = { version = "0.1.0", path = "../embassy-nrf", default-features = false } diff --git a/embassy-boot-rp/Cargo.toml b/embassy-boot-rp/Cargo.toml index 0bd8abf4c..de2ae3780 100644 --- a/embassy-boot-rp/Cargo.toml +++ b/embassy-boot-rp/Cargo.toml @@ -21,7 +21,6 @@ target = "thumbv6m-none-eabi" [dependencies] defmt = { version = "0.3", optional = true } -defmt-rtt = { version = "0.4", optional = true } log = { version = "0.4", optional = true } embassy-sync = { version = "0.6.0", path = "../embassy-sync" } @@ -46,7 +45,6 @@ log = [ "embassy-boot/log", "embassy-rp/log", ] -debug = ["defmt-rtt"] [profile.dev] debug = 2 diff --git a/embassy-boot-rp/build.rs b/embassy-boot-rp/build.rs index 2cbc7ef5e..bfaee3503 100644 --- a/embassy-boot-rp/build.rs +++ b/embassy-boot-rp/build.rs @@ -5,4 +5,5 @@ fn main() { if target.starts_with("thumbv6m-") { println!("cargo:rustc-cfg=armv6m"); } + println!("cargo:rustc-check-cfg=cfg(armv6m)"); } diff --git a/embassy-boot-stm32/Cargo.toml b/embassy-boot-stm32/Cargo.toml index a3661f6cb..d4525a6de 100644 --- a/embassy-boot-stm32/Cargo.toml +++ b/embassy-boot-stm32/Cargo.toml @@ -22,7 +22,6 @@ target = "thumbv7em-none-eabi" [dependencies] defmt = { version = "0.3", optional = true } -defmt-rtt = { version = "0.4", optional = true } log = { version = "0.4", optional = true } embassy-sync = { version = "0.6.0", path = "../embassy-sync" } @@ -37,7 +36,6 @@ cfg-if = "1.0.0" [features] defmt = ["dep:defmt", "embassy-boot/defmt", "embassy-stm32/defmt"] log = ["dep:log", "embassy-boot/log", "embassy-stm32/log"] -debug = ["defmt-rtt"] [profile.dev] debug = 2 diff --git a/embassy-boot-stm32/build.rs b/embassy-boot-stm32/build.rs index 2cbc7ef5e..bfaee3503 100644 --- a/embassy-boot-stm32/build.rs +++ b/embassy-boot-stm32/build.rs @@ -5,4 +5,5 @@ fn main() { if target.starts_with("thumbv6m-") { println!("cargo:rustc-cfg=armv6m"); } + println!("cargo:rustc-check-cfg=cfg(armv6m)"); } diff --git a/embassy-net-adin1110/Cargo.toml b/embassy-net-adin1110/Cargo.toml index 97579a467..4a856fac3 100644 --- a/embassy-net-adin1110/Cargo.toml +++ b/embassy-net-adin1110/Cargo.toml @@ -29,7 +29,6 @@ critical-section = { version = "1.1.2", features = ["std"] } futures-test = "0.3.28" [features] -default = [ ] defmt = [ "dep:defmt", "embedded-hal-1/defmt-03" ] log = ["dep:log"] diff --git a/embassy-net-adin1110/src/lib.rs b/embassy-net-adin1110/src/lib.rs index d98e98422..7f1c772e2 100644 --- a/embassy-net-adin1110/src/lib.rs +++ b/embassy-net-adin1110/src/lib.rs @@ -1,6 +1,6 @@ +#![cfg_attr(not(test), no_std)] #![deny(clippy::pedantic)] #![allow(async_fn_in_trait)] -#![cfg_attr(not(any(test, feature = "std")), no_std)] #![allow(clippy::module_name_repetitions)] #![allow(clippy::missing_errors_doc)] #![allow(clippy::missing_panics_doc)] diff --git a/embassy-stm32-wpan/Cargo.toml b/embassy-stm32-wpan/Cargo.toml index 11a0adab2..9c81a71f7 100644 --- a/embassy-stm32-wpan/Cargo.toml +++ b/embassy-stm32-wpan/Cargo.toml @@ -28,6 +28,8 @@ embassy-embedded-hal = { version = "0.1.0", path = "../embassy-embedded-hal" } embassy-net-driver = { version = "0.2.0", path = "../embassy-net-driver", optional=true } defmt = { version = "0.3", optional = true } +log = { version = "0.4.17", optional = true } + cortex-m = "0.7.6" heapless = "0.8" aligned = "0.4.1" diff --git a/embassy-usb-dfu/Cargo.toml b/embassy-usb-dfu/Cargo.toml index 267e412c0..ca87bcb62 100644 --- a/embassy-usb-dfu/Cargo.toml +++ b/embassy-usb-dfu/Cargo.toml @@ -26,9 +26,11 @@ flavors = [ features = ["defmt", "cortex-m", "dfu"] [dependencies] +defmt = { version = "0.3.5", optional = true } +log = { version = "0.4.17", optional = true } + bitflags = "2.4.1" cortex-m = { version = "0.7.7", features = ["inline-asm"], optional = true } -defmt = { version = "0.3.5", optional = true } embassy-boot = { version = "0.2.0", path = "../embassy-boot" } embassy-futures = { version = "0.1.1", path = "../embassy-futures" } embassy-sync = { version = "0.6.0", path = "../embassy-sync" } diff --git a/examples/boot/application/nrf/Cargo.toml b/examples/boot/application/nrf/Cargo.toml index f0a710335..cf34bb7cf 100644 --- a/examples/boot/application/nrf/Cargo.toml +++ b/examples/boot/application/nrf/Cargo.toml @@ -25,3 +25,10 @@ cortex-m-rt = "0.7.0" ed25519-dalek = ["embassy-boot/ed25519-dalek"] ed25519-salty = ["embassy-boot/ed25519-salty"] skip-include = [] +defmt = [ + "dep:defmt", + "dep:defmt-rtt", + "embassy-nrf/defmt", + "embassy-boot-nrf/defmt", + "embassy-sync/defmt", +] diff --git a/examples/boot/application/stm32f3/Cargo.toml b/examples/boot/application/stm32f3/Cargo.toml index fe1a6f5b1..9b79b01ce 100644 --- a/examples/boot/application/stm32f3/Cargo.toml +++ b/examples/boot/application/stm32f3/Cargo.toml @@ -23,6 +23,7 @@ cortex-m-rt = "0.7.0" [features] defmt = [ "dep:defmt", + "dep:defmt-rtt", "embassy-stm32/defmt", "embassy-boot-stm32/defmt", "embassy-sync/defmt", diff --git a/examples/boot/application/stm32f3/src/bin/a.rs b/examples/boot/application/stm32f3/src/bin/a.rs index 8858ae3da..b608b2e01 100644 --- a/examples/boot/application/stm32f3/src/bin/a.rs +++ b/examples/boot/application/stm32f3/src/bin/a.rs @@ -1,7 +1,7 @@ #![no_std] #![no_main] -#[cfg(feature = "defmt-rtt")] +#[cfg(feature = "defmt")] use defmt_rtt::*; use embassy_boot_stm32::{AlignedBuffer, FirmwareUpdater, FirmwareUpdaterConfig}; use embassy_embedded_hal::adapter::BlockingAsync; diff --git a/examples/boot/application/stm32f3/src/bin/b.rs b/examples/boot/application/stm32f3/src/bin/b.rs index 22ba82d5e..b1a505631 100644 --- a/examples/boot/application/stm32f3/src/bin/b.rs +++ b/examples/boot/application/stm32f3/src/bin/b.rs @@ -1,7 +1,7 @@ #![no_std] #![no_main] -#[cfg(feature = "defmt-rtt")] +#[cfg(feature = "defmt")] use defmt_rtt::*; use embassy_executor::Spawner; use embassy_stm32::gpio::{Level, Output, Speed}; diff --git a/examples/boot/application/stm32f7/Cargo.toml b/examples/boot/application/stm32f7/Cargo.toml index 37e362824..0167dfb76 100644 --- a/examples/boot/application/stm32f7/Cargo.toml +++ b/examples/boot/application/stm32f7/Cargo.toml @@ -24,6 +24,7 @@ cortex-m-rt = "0.7.0" [features] defmt = [ "dep:defmt", + "dep:defmt-rtt", "embassy-stm32/defmt", "embassy-boot-stm32/defmt", "embassy-sync/defmt", diff --git a/examples/boot/application/stm32f7/src/bin/a.rs b/examples/boot/application/stm32f7/src/bin/a.rs index d3df11fe4..172b4c235 100644 --- a/examples/boot/application/stm32f7/src/bin/a.rs +++ b/examples/boot/application/stm32f7/src/bin/a.rs @@ -3,7 +3,7 @@ use core::cell::RefCell; -#[cfg(feature = "defmt-rtt")] +#[cfg(feature = "defmt")] use defmt_rtt::*; use embassy_boot_stm32::{AlignedBuffer, BlockingFirmwareUpdater, FirmwareUpdaterConfig}; use embassy_executor::Spawner; diff --git a/examples/boot/application/stm32f7/src/bin/b.rs b/examples/boot/application/stm32f7/src/bin/b.rs index 190477204..6bc9c9ab8 100644 --- a/examples/boot/application/stm32f7/src/bin/b.rs +++ b/examples/boot/application/stm32f7/src/bin/b.rs @@ -1,7 +1,7 @@ #![no_std] #![no_main] -#[cfg(feature = "defmt-rtt")] +#[cfg(feature = "defmt")] use defmt_rtt::*; use embassy_executor::Spawner; use embassy_stm32::gpio::{Level, Output, Speed}; diff --git a/examples/boot/application/stm32h7/Cargo.toml b/examples/boot/application/stm32h7/Cargo.toml index 52cd0b546..61643d485 100644 --- a/examples/boot/application/stm32h7/Cargo.toml +++ b/examples/boot/application/stm32h7/Cargo.toml @@ -24,6 +24,7 @@ cortex-m-rt = "0.7.0" [features] defmt = [ "dep:defmt", + "dep:defmt-rtt", "embassy-stm32/defmt", "embassy-boot-stm32/defmt", "embassy-sync/defmt", diff --git a/examples/boot/application/stm32h7/src/bin/a.rs b/examples/boot/application/stm32h7/src/bin/a.rs index f61ac1f71..c1b1a267a 100644 --- a/examples/boot/application/stm32h7/src/bin/a.rs +++ b/examples/boot/application/stm32h7/src/bin/a.rs @@ -3,7 +3,7 @@ use core::cell::RefCell; -#[cfg(feature = "defmt-rtt")] +#[cfg(feature = "defmt")] use defmt_rtt::*; use embassy_boot_stm32::{AlignedBuffer, BlockingFirmwareUpdater, FirmwareUpdaterConfig}; use embassy_executor::Spawner; diff --git a/examples/boot/application/stm32h7/src/bin/b.rs b/examples/boot/application/stm32h7/src/bin/b.rs index 5f3f35207..13bdae1f1 100644 --- a/examples/boot/application/stm32h7/src/bin/b.rs +++ b/examples/boot/application/stm32h7/src/bin/b.rs @@ -1,7 +1,7 @@ #![no_std] #![no_main] -#[cfg(feature = "defmt-rtt")] +#[cfg(feature = "defmt")] use defmt_rtt::*; use embassy_executor::Spawner; use embassy_stm32::gpio::{Level, Output, Speed}; diff --git a/examples/boot/application/stm32l0/Cargo.toml b/examples/boot/application/stm32l0/Cargo.toml index 0f3cbe654..2990089ac 100644 --- a/examples/boot/application/stm32l0/Cargo.toml +++ b/examples/boot/application/stm32l0/Cargo.toml @@ -23,6 +23,7 @@ cortex-m-rt = "0.7.0" [features] defmt = [ "dep:defmt", + "dep:defmt-rtt", "embassy-stm32/defmt", "embassy-boot-stm32/defmt", "embassy-sync/defmt", diff --git a/examples/boot/application/stm32l0/src/bin/a.rs b/examples/boot/application/stm32l0/src/bin/a.rs index f066c1139..dcc10e5c6 100644 --- a/examples/boot/application/stm32l0/src/bin/a.rs +++ b/examples/boot/application/stm32l0/src/bin/a.rs @@ -1,7 +1,7 @@ #![no_std] #![no_main] -#[cfg(feature = "defmt-rtt")] +#[cfg(feature = "defmt")] use defmt_rtt::*; use embassy_boot_stm32::{AlignedBuffer, FirmwareUpdater, FirmwareUpdaterConfig}; use embassy_embedded_hal::adapter::BlockingAsync; diff --git a/examples/boot/application/stm32l0/src/bin/b.rs b/examples/boot/application/stm32l0/src/bin/b.rs index 6bf00f41a..a59c6f540 100644 --- a/examples/boot/application/stm32l0/src/bin/b.rs +++ b/examples/boot/application/stm32l0/src/bin/b.rs @@ -1,7 +1,7 @@ #![no_std] #![no_main] -#[cfg(feature = "defmt-rtt")] +#[cfg(feature = "defmt")] use defmt_rtt::*; use embassy_executor::Spawner; use embassy_stm32::gpio::{Level, Output, Speed}; diff --git a/examples/boot/application/stm32l1/Cargo.toml b/examples/boot/application/stm32l1/Cargo.toml index 3e964df9c..c07d71591 100644 --- a/examples/boot/application/stm32l1/Cargo.toml +++ b/examples/boot/application/stm32l1/Cargo.toml @@ -23,6 +23,7 @@ cortex-m-rt = "0.7.0" [features] defmt = [ "dep:defmt", + "dep:defmt-rtt", "embassy-stm32/defmt", "embassy-boot-stm32/defmt", "embassy-sync/defmt", diff --git a/examples/boot/application/stm32l1/src/bin/a.rs b/examples/boot/application/stm32l1/src/bin/a.rs index f066c1139..dcc10e5c6 100644 --- a/examples/boot/application/stm32l1/src/bin/a.rs +++ b/examples/boot/application/stm32l1/src/bin/a.rs @@ -1,7 +1,7 @@ #![no_std] #![no_main] -#[cfg(feature = "defmt-rtt")] +#[cfg(feature = "defmt")] use defmt_rtt::*; use embassy_boot_stm32::{AlignedBuffer, FirmwareUpdater, FirmwareUpdaterConfig}; use embassy_embedded_hal::adapter::BlockingAsync; diff --git a/examples/boot/application/stm32l1/src/bin/b.rs b/examples/boot/application/stm32l1/src/bin/b.rs index 6bf00f41a..a59c6f540 100644 --- a/examples/boot/application/stm32l1/src/bin/b.rs +++ b/examples/boot/application/stm32l1/src/bin/b.rs @@ -1,7 +1,7 @@ #![no_std] #![no_main] -#[cfg(feature = "defmt-rtt")] +#[cfg(feature = "defmt")] use defmt_rtt::*; use embassy_executor::Spawner; use embassy_stm32::gpio::{Level, Output, Speed}; diff --git a/examples/boot/application/stm32l4/Cargo.toml b/examples/boot/application/stm32l4/Cargo.toml index b154403ac..72b937ca7 100644 --- a/examples/boot/application/stm32l4/Cargo.toml +++ b/examples/boot/application/stm32l4/Cargo.toml @@ -23,6 +23,7 @@ cortex-m-rt = "0.7.0" [features] defmt = [ "dep:defmt", + "dep:defmt-rtt", "embassy-stm32/defmt", "embassy-boot-stm32/defmt", "embassy-sync/defmt", diff --git a/examples/boot/application/stm32l4/src/bin/a.rs b/examples/boot/application/stm32l4/src/bin/a.rs index a0079ee33..7f8015c04 100644 --- a/examples/boot/application/stm32l4/src/bin/a.rs +++ b/examples/boot/application/stm32l4/src/bin/a.rs @@ -1,7 +1,7 @@ #![no_std] #![no_main] -#[cfg(feature = "defmt-rtt")] +#[cfg(feature = "defmt")] use defmt_rtt::*; use embassy_boot_stm32::{AlignedBuffer, FirmwareUpdater, FirmwareUpdaterConfig}; use embassy_embedded_hal::adapter::BlockingAsync; diff --git a/examples/boot/application/stm32l4/src/bin/b.rs b/examples/boot/application/stm32l4/src/bin/b.rs index 22ba82d5e..b1a505631 100644 --- a/examples/boot/application/stm32l4/src/bin/b.rs +++ b/examples/boot/application/stm32l4/src/bin/b.rs @@ -1,7 +1,7 @@ #![no_std] #![no_main] -#[cfg(feature = "defmt-rtt")] +#[cfg(feature = "defmt")] use defmt_rtt::*; use embassy_executor::Spawner; use embassy_stm32::gpio::{Level, Output, Speed}; diff --git a/examples/boot/application/stm32wb-dfu/src/main.rs b/examples/boot/application/stm32wb-dfu/src/main.rs index 929d6802c..0ab99ff90 100644 --- a/examples/boot/application/stm32wb-dfu/src/main.rs +++ b/examples/boot/application/stm32wb-dfu/src/main.rs @@ -3,7 +3,7 @@ use core::cell::RefCell; -#[cfg(feature = "defmt-rtt")] +#[cfg(feature = "defmt")] use defmt_rtt::*; use embassy_boot_stm32::{AlignedBuffer, BlockingFirmwareState, FirmwareUpdaterConfig}; use embassy_executor::Spawner; diff --git a/examples/boot/application/stm32wl/Cargo.toml b/examples/boot/application/stm32wl/Cargo.toml index 93ead617c..a5160b797 100644 --- a/examples/boot/application/stm32wl/Cargo.toml +++ b/examples/boot/application/stm32wl/Cargo.toml @@ -23,6 +23,7 @@ cortex-m-rt = "0.7.0" [features] defmt = [ "dep:defmt", + "dep:defmt-rtt", "embassy-stm32/defmt", "embassy-boot-stm32/defmt", "embassy-sync/defmt", diff --git a/examples/boot/application/stm32wl/src/bin/a.rs b/examples/boot/application/stm32wl/src/bin/a.rs index 2fb16bdc4..9f4f0b238 100644 --- a/examples/boot/application/stm32wl/src/bin/a.rs +++ b/examples/boot/application/stm32wl/src/bin/a.rs @@ -1,7 +1,7 @@ #![no_std] #![no_main] -#[cfg(feature = "defmt-rtt")] +#[cfg(feature = "defmt")] use defmt_rtt::*; use embassy_boot_stm32::{AlignedBuffer, FirmwareUpdater, FirmwareUpdaterConfig}; use embassy_embedded_hal::adapter::BlockingAsync; diff --git a/examples/boot/application/stm32wl/src/bin/b.rs b/examples/boot/application/stm32wl/src/bin/b.rs index 8dd15d8cd..e954d8b91 100644 --- a/examples/boot/application/stm32wl/src/bin/b.rs +++ b/examples/boot/application/stm32wl/src/bin/b.rs @@ -1,7 +1,7 @@ #![no_std] #![no_main] -#[cfg(feature = "defmt-rtt")] +#[cfg(feature = "defmt")] use defmt_rtt::*; use embassy_executor::Spawner; use embassy_stm32::gpio::{Level, Output, Speed}; diff --git a/examples/boot/bootloader/nrf/Cargo.toml b/examples/boot/bootloader/nrf/Cargo.toml index 980149bea..9d5d51a13 100644 --- a/examples/boot/bootloader/nrf/Cargo.toml +++ b/examples/boot/bootloader/nrf/Cargo.toml @@ -19,13 +19,13 @@ cfg-if = "1.0.0" [features] defmt = [ "dep:defmt", + "dep:defmt-rtt", "embassy-boot-nrf/defmt", "embassy-nrf/defmt", ] softdevice = [ "embassy-boot-nrf/softdevice", ] -debug = ["defmt-rtt", "defmt"] [profile.dev] debug = 2 diff --git a/examples/boot/bootloader/rp/Cargo.toml b/examples/boot/bootloader/rp/Cargo.toml index 7eec3df1b..c15c980ca 100644 --- a/examples/boot/bootloader/rp/Cargo.toml +++ b/examples/boot/bootloader/rp/Cargo.toml @@ -23,10 +23,10 @@ cfg-if = "1.0.0" [features] defmt = [ "dep:defmt", + "dep:defmt-rtt", "embassy-boot-rp/defmt", "embassy-rp/defmt", ] -debug = ["defmt-rtt", "defmt"] [profile.release] debug = true diff --git a/examples/boot/bootloader/stm32-dual-bank/Cargo.toml b/examples/boot/bootloader/stm32-dual-bank/Cargo.toml index 55adf84d7..b91b05412 100644 --- a/examples/boot/bootloader/stm32-dual-bank/Cargo.toml +++ b/examples/boot/bootloader/stm32-dual-bank/Cargo.toml @@ -22,8 +22,7 @@ embedded-storage-async = "0.4.0" cfg-if = "1.0.0" [features] -defmt = ["dep:defmt", "embassy-boot-stm32/defmt", "embassy-stm32/defmt"] -debug = ["defmt-rtt", "defmt"] +defmt = ["dep:defmt", "dep:defmt-rtt", "embassy-boot-stm32/defmt", "embassy-stm32/defmt"] [profile.dev] debug = 2 diff --git a/examples/boot/bootloader/stm32/Cargo.toml b/examples/boot/bootloader/stm32/Cargo.toml index ef2b99404..541186949 100644 --- a/examples/boot/bootloader/stm32/Cargo.toml +++ b/examples/boot/bootloader/stm32/Cargo.toml @@ -21,10 +21,10 @@ cfg-if = "1.0.0" [features] defmt = [ "dep:defmt", + "dep:defmt-rtt", "embassy-boot-stm32/defmt", "embassy-stm32/defmt", ] -debug = ["defmt-rtt", "defmt"] [profile.dev] debug = 2 diff --git a/examples/boot/bootloader/stm32wb-dfu/Cargo.toml b/examples/boot/bootloader/stm32wb-dfu/Cargo.toml index 93b5d8b34..9950ed7b6 100644 --- a/examples/boot/bootloader/stm32wb-dfu/Cargo.toml +++ b/examples/boot/bootloader/stm32wb-dfu/Cargo.toml @@ -24,12 +24,12 @@ embassy-futures = { version = "0.1.1", path = "../../../../embassy-futures" } [features] defmt = [ "dep:defmt", + "dep:defmt-rtt", "embassy-boot-stm32/defmt", "embassy-stm32/defmt", "embassy-usb/defmt", "embassy-usb-dfu/defmt" ] -debug = ["defmt-rtt", "defmt"] [profile.dev] debug = 2 diff --git a/tests/stm32/src/bin/fdcan.rs b/tests/stm32/src/bin/fdcan.rs index 8534f92e8..8a397f661 100644 --- a/tests/stm32/src/bin/fdcan.rs +++ b/tests/stm32/src/bin/fdcan.rs @@ -92,7 +92,7 @@ fn options() -> (Config, TestOptions) { ) } -#[cfg(any(feature = "stm32g491re", feature = "stm32g431cb"))] +#[cfg(any(feature = "stm32g491re"))] fn options() -> (Config, TestOptions) { info!("G4 config"); ( From da197b60165b74d05c3d12b046b5cfda0b9cb126 Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Fri, 31 May 2024 21:43:03 +0200 Subject: [PATCH 440/581] stm32/spi: fix spiv1 rxonly hanging. --- embassy-stm32/src/spi/mod.rs | 7 +-- tests/stm32/build.rs | 1 + tests/stm32/src/bin/spi_dma.rs | 97 ++++++++++++++-------------------- 3 files changed, 45 insertions(+), 60 deletions(-) diff --git a/embassy-stm32/src/spi/mod.rs b/embassy-stm32/src/spi/mod.rs index af8e3fc30..3729ed8de 100644 --- a/embassy-stm32/src/spi/mod.rs +++ b/embassy-stm32/src/spi/mod.rs @@ -148,9 +148,10 @@ impl<'d, M: PeriMode> Spi<'d, M> { w.set_ssm(true); w.set_crcen(false); w.set_bidimode(vals::Bidimode::UNIDIRECTIONAL); - if mosi.is_none() { - w.set_rxonly(vals::Rxonly::OUTPUTDISABLED); - } + // we're doing "fake rxonly", by actually writing one + // byte to TXDR for each byte we want to receive. if we + // set OUTPUTDISABLED here, this hangs. + w.set_rxonly(vals::Rxonly::FULLDUPLEX); w.set_dff(::CONFIG) }); } diff --git a/tests/stm32/build.rs b/tests/stm32/build.rs index 176adff62..675115568 100644 --- a/tests/stm32/build.rs +++ b/tests/stm32/build.rs @@ -14,6 +14,7 @@ fn main() -> Result<(), Box> { feature = "stm32c031c6", feature = "stm32wb55rg", feature = "stm32l073rz", + feature = "stm32h503rb", // wrong ram size in stm32-data feature = "stm32wl55jc", feature = "stm32u5a5zj", diff --git a/tests/stm32/src/bin/spi_dma.rs b/tests/stm32/src/bin/spi_dma.rs index 30e679f2a..92f741af5 100644 --- a/tests/stm32/src/bin/spi_dma.rs +++ b/tests/stm32/src/bin/spi_dma.rs @@ -6,34 +6,32 @@ mod common; use common::*; use defmt::assert_eq; use embassy_executor::Spawner; +use embassy_stm32::gpio::{Level, Output, Speed}; use embassy_stm32::spi::{self, Spi}; use embassy_stm32::time::Hertz; -use embassy_stm32::{into_ref, Peripheral as _}; #[embassy_executor::main] async fn main(_spawner: Spawner) { let p = embassy_stm32::init(config()); info!("Hello World!"); - let spi_peri = peri!(p, SPI); - let sck = peri!(p, SPI_SCK); - let mosi = peri!(p, SPI_MOSI); - let miso = peri!(p, SPI_MISO); - let tx_dma = peri!(p, SPI_TX_DMA); - let rx_dma = peri!(p, SPI_RX_DMA); - - into_ref!(spi_peri, sck, mosi, miso, tx_dma, rx_dma); + let mut spi_peri = peri!(p, SPI); + let mut sck = peri!(p, SPI_SCK); + let mut mosi = peri!(p, SPI_MOSI); + let mut miso = peri!(p, SPI_MISO); + let mut tx_dma = peri!(p, SPI_TX_DMA); + let mut rx_dma = peri!(p, SPI_RX_DMA); let mut spi_config = spi::Config::default(); spi_config.frequency = Hertz(1_000_000); let mut spi = Spi::new( - spi_peri.reborrow(), - sck.reborrow(), // Arduino D13 - mosi.reborrow(), // Arduino D11 - miso.reborrow(), // Arduino D12 - tx_dma.reborrow(), - rx_dma.reborrow(), + &mut spi_peri, + &mut sck, // Arduino D13 + &mut mosi, // Arduino D11 + &mut miso, // Arduino D12 + &mut tx_dma, + &mut rx_dma, spi_config, ); @@ -85,51 +83,36 @@ async fn main(_spawner: Spawner) { core::mem::drop(spi); // test rx-only configuration + let mut spi = Spi::new_rxonly( + &mut spi_peri, + &mut sck, + &mut miso, + // SPIv1/f1 requires txdma even if rxonly. + #[cfg(not(any( + feature = "stm32h503rb", + feature = "stm32h563zi", + feature = "stm32h753zi", + feature = "stm32h755zi", + feature = "stm32h7a3zi", + feature = "stm32h7s3l8", + feature = "stm32u585ai", + feature = "stm32u5a5zj", + feature = "stm32wba52cg", + )))] + &mut tx_dma, + &mut rx_dma, + spi_config, + ); - // stm32f207zg - spi_v1 - // stm32f103c8 - spi_f1 - // stm32g491re - spi_v2 - // stm32h753zi - spi_v3 - // stm32h563zi - spi_v4 - // stm32wba52cg - spi_v5 + let mut mosi = Output::new(&mut mosi, Level::Low, Speed::VeryHigh); - #[cfg(any(stm32f207zg, stm32f103c8, stm32g491re, stm32h753zi, stm32h563zi, stm32wba52cg))] - { - let mut spi = { - #[cfg(stm32f207zg, stm32f103c8, stm32g491re)] - { - Spi::new_rxonly( - spi_peri.reborrow(), - sck.reborrow(), - miso.reborrow(), - tx_dma.reborrow(), - rx_dma.reborrow(), - spi_config, - ) - } - #[cfg(stm32h753zi, stm32h563zi, stm32wba52cg)] - { - Spi::new_rxonly( - spi_peri.reborrow(), - sck.reborrow(), - miso.reborrow(), - rx_dma.reborrow(), - spi_config, - ) - } - }; + mosi.set_high(); + spi.read(&mut buf).await.unwrap(); + assert_eq!(buf, [0xff; 9]); - use embassy_stm32::gpio; - let mut mosi = gpio::Output::new(mosi.reborrow(), gpio::Level::Low, gpio::Speed::Low); - - mosi.set_high(); - spi.read(&mut buf).await.unwrap(); - assert_eq!(buf, [0xff; 9]); - - mosi.set_low(); - spi.read(&mut buf).await.unwrap(); - assert_eq!(buf, [0x00; 9]); - }; + mosi.set_low(); + spi.read(&mut buf).await.unwrap(); + assert_eq!(buf, [0x00; 9]); info!("Test OK"); cortex_m::asm::bkpt(); From f594ddceecbf00022f1b76bec030fd32c0e03178 Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Fri, 31 May 2024 21:49:33 +0200 Subject: [PATCH 441/581] stm32/spi: add blocking rxonly test. --- tests/stm32/src/bin/spi.rs | 32 +++++++++++++++++++++++++------- 1 file changed, 25 insertions(+), 7 deletions(-) diff --git a/tests/stm32/src/bin/spi.rs b/tests/stm32/src/bin/spi.rs index c1576bfeb..a0ca5284d 100644 --- a/tests/stm32/src/bin/spi.rs +++ b/tests/stm32/src/bin/spi.rs @@ -6,6 +6,7 @@ mod common; use common::*; use defmt::assert_eq; use embassy_executor::Spawner; +use embassy_stm32::gpio::{Level, Output, Speed}; use embassy_stm32::spi::{self, Spi}; use embassy_stm32::time::Hertz; @@ -14,18 +15,19 @@ async fn main(_spawner: Spawner) { let p = embassy_stm32::init(config()); info!("Hello World!"); - let spi = peri!(p, SPI); - let sck = peri!(p, SPI_SCK); - let mosi = peri!(p, SPI_MOSI); - let miso = peri!(p, SPI_MISO); + let mut spi_peri = peri!(p, SPI); + let mut sck = peri!(p, SPI_SCK); + let mut mosi = peri!(p, SPI_MOSI); + let mut miso = peri!(p, SPI_MISO); let mut spi_config = spi::Config::default(); spi_config.frequency = Hertz(1_000_000); let mut spi = Spi::new_blocking( - spi, sck, // Arduino D13 - mosi, // Arduino D11 - miso, // Arduino D12 + &mut spi_peri, + &mut sck, // Arduino D13 + &mut mosi, // Arduino D11 + &mut miso, // Arduino D12 spi_config, ); @@ -66,6 +68,22 @@ async fn main(_spawner: Spawner) { defmt::assert!(!embassy_stm32::pac::RCC.apb2enr().read().spi1en()); } + #[cfg(not(feature = "stm32f429zi"))] + core::mem::drop(spi); + + // test rx-only configuration + let mut spi = Spi::new_blocking_rxonly(&mut spi_peri, &mut sck, &mut miso, spi_config); + + let mut mosi = Output::new(&mut mosi, Level::Low, Speed::VeryHigh); + + mosi.set_high(); + spi.blocking_read(&mut buf).unwrap(); + assert_eq!(buf, [0xff; 9]); + + mosi.set_low(); + spi.blocking_read(&mut buf).unwrap(); + assert_eq!(buf, [0x00; 9]); + info!("Test OK"); cortex_m::asm::bkpt(); } From 339dd859686caee4ed55ed1f3cba0320e085db39 Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Fri, 31 May 2024 22:16:30 +0200 Subject: [PATCH 442/581] stm32/spi: restrict txonly_nosck to SPIv1, it hangs in other versions. --- embassy-stm32/src/spi/mod.rs | 2 + examples/stm32g0/src/bin/spi_neopixel.rs | 2 +- tests/stm32/Cargo.toml | 30 +++++++------ tests/stm32/src/bin/spi.rs | 50 +++++++++++++++------ tests/stm32/src/bin/spi_dma.rs | 56 +++++++++++++++++------- 5 files changed, 94 insertions(+), 46 deletions(-) diff --git a/embassy-stm32/src/spi/mod.rs b/embassy-stm32/src/spi/mod.rs index 3729ed8de..5d6277c33 100644 --- a/embassy-stm32/src/spi/mod.rs +++ b/embassy-stm32/src/spi/mod.rs @@ -465,6 +465,7 @@ impl<'d> Spi<'d, Blocking> { /// Create a new SPI driver, in TX-only mode, without SCK pin. /// /// This can be useful for bit-banging non-SPI protocols. + #[cfg(any(spi_v1, spi_f1))] // no SCK pin causes it to hang on spiv2+ for unknown reasons. pub fn new_blocking_txonly_nosck( peri: impl Peripheral

+ 'd, mosi: impl Peripheral

> + 'd, @@ -549,6 +550,7 @@ impl<'d> Spi<'d, Async> { /// Create a new SPI driver, in TX-only mode, without SCK pin. /// /// This can be useful for bit-banging non-SPI protocols. + #[cfg(any(spi_v1, spi_f1))] // no SCK pin causes it to hang on spiv2+ for unknown reasons. pub fn new_txonly_nosck( peri: impl Peripheral

+ 'd, mosi: impl Peripheral

> + 'd, diff --git a/examples/stm32g0/src/bin/spi_neopixel.rs b/examples/stm32g0/src/bin/spi_neopixel.rs index 2deee271d..edcae74f7 100644 --- a/examples/stm32g0/src/bin/spi_neopixel.rs +++ b/examples/stm32g0/src/bin/spi_neopixel.rs @@ -76,7 +76,7 @@ async fn main(_spawner: Spawner) { let mut config = Config::default(); config.frequency = Hertz(4_000_000); - let mut spi = Spi::new_txonly_nosck(p.SPI1, p.PB5, p.DMA1_CH3, config); + let mut spi = Spi::new_txonly(p.SPI1, p.PB3, p.PB5, p.DMA1_CH3, config); // SCK is unused. let mut neopixels = Ws2812::new(); diff --git a/tests/stm32/Cargo.toml b/tests/stm32/Cargo.toml index f6d1d98eb..de390ee38 100644 --- a/tests/stm32/Cargo.toml +++ b/tests/stm32/Cargo.toml @@ -7,34 +7,36 @@ autobins = false [features] stm32c031c6 = ["embassy-stm32/stm32c031c6", "cm0", "not-gpdma"] -stm32f103c8 = ["embassy-stm32/stm32f103c8", "not-gpdma"] -stm32f207zg = ["embassy-stm32/stm32f207zg", "chrono", "not-gpdma", "eth", "rng"] +stm32f103c8 = ["embassy-stm32/stm32f103c8", "spi-v1", "not-gpdma"] +stm32f207zg = ["embassy-stm32/stm32f207zg", "spi-v1", "chrono", "not-gpdma", "eth", "rng"] stm32f303ze = ["embassy-stm32/stm32f303ze", "chrono", "not-gpdma"] -stm32f429zi = ["embassy-stm32/stm32f429zi", "chrono", "eth", "stop", "can", "not-gpdma", "dac", "rng"] -stm32f446re = ["embassy-stm32/stm32f446re", "chrono", "stop", "can", "not-gpdma", "dac", "sdmmc"] +stm32f429zi = ["embassy-stm32/stm32f429zi", "spi-v1", "chrono", "eth", "stop", "can", "not-gpdma", "dac", "rng"] +stm32f446re = ["embassy-stm32/stm32f446re", "spi-v1", "chrono", "stop", "can", "not-gpdma", "dac", "sdmmc"] stm32f767zi = ["embassy-stm32/stm32f767zi", "chrono", "not-gpdma", "eth", "rng"] stm32g071rb = ["embassy-stm32/stm32g071rb", "cm0", "not-gpdma", "dac", "ucpd"] stm32g491re = ["embassy-stm32/stm32g491re", "chrono", "stop", "not-gpdma", "rng", "fdcan", "cordic"] -stm32h563zi = ["embassy-stm32/stm32h563zi", "chrono", "eth", "rng", "fdcan", "hash", "cordic", "stop"] -stm32h753zi = ["embassy-stm32/stm32h753zi", "chrono", "not-gpdma", "eth", "rng", "fdcan", "hash", "cryp"] -stm32h755zi = ["embassy-stm32/stm32h755zi-cm7", "chrono", "not-gpdma", "eth", "dac", "rng", "fdcan", "hash", "cryp"] -stm32h7a3zi = ["embassy-stm32/stm32h7a3zi", "not-gpdma", "rng", "fdcan"] +stm32h563zi = ["embassy-stm32/stm32h563zi", "spi-v345", "chrono", "eth", "rng", "fdcan", "hash", "cordic", "stop"] +stm32h753zi = ["embassy-stm32/stm32h753zi", "spi-v345", "chrono", "not-gpdma", "eth", "rng", "fdcan", "hash", "cryp"] +stm32h755zi = ["embassy-stm32/stm32h755zi-cm7", "spi-v345", "chrono", "not-gpdma", "eth", "dac", "rng", "fdcan", "hash", "cryp"] +stm32h7a3zi = ["embassy-stm32/stm32h7a3zi", "spi-v345", "not-gpdma", "rng", "fdcan"] stm32l073rz = ["embassy-stm32/stm32l073rz", "cm0", "not-gpdma", "rng"] -stm32l152re = ["embassy-stm32/stm32l152re", "chrono", "not-gpdma"] +stm32l152re = ["embassy-stm32/stm32l152re", "spi-v1", "chrono", "not-gpdma"] stm32l496zg = ["embassy-stm32/stm32l496zg", "not-gpdma", "rng"] stm32l4a6zg = ["embassy-stm32/stm32l4a6zg", "chrono", "not-gpdma", "rng", "hash"] stm32l4r5zi = ["embassy-stm32/stm32l4r5zi", "chrono", "not-gpdma", "rng"] stm32l552ze = ["embassy-stm32/stm32l552ze", "not-gpdma", "rng", "hash"] -stm32u585ai = ["embassy-stm32/stm32u585ai", "chrono", "rng", "hash", "cordic"] -stm32u5a5zj = ["embassy-stm32/stm32u5a5zj", "chrono", "rng", "hash"] # FIXME: cordic test cause it crash +stm32u585ai = ["embassy-stm32/stm32u585ai", "spi-v345", "chrono", "rng", "hash", "cordic"] +stm32u5a5zj = ["embassy-stm32/stm32u5a5zj", "spi-v345", "chrono", "rng", "hash"] # FIXME: cordic test cause it crash stm32wb55rg = ["embassy-stm32/stm32wb55rg", "chrono", "not-gpdma", "ble", "mac" , "rng"] -stm32wba52cg = ["embassy-stm32/stm32wba52cg", "chrono", "rng", "hash"] +stm32wba52cg = ["embassy-stm32/stm32wba52cg", "spi-v345", "chrono", "rng", "hash"] stm32wl55jc = ["embassy-stm32/stm32wl55jc-cm4", "not-gpdma", "rng", "chrono"] stm32f091rc = ["embassy-stm32/stm32f091rc", "cm0", "not-gpdma", "chrono"] -stm32h503rb = ["embassy-stm32/stm32h503rb", "rng", "stop"] -stm32h7s3l8 = ["embassy-stm32/stm32h7s3l8", "rng", "cordic", "hash"] # TODO: fdcan crashes, cryp dma hangs. +stm32h503rb = ["embassy-stm32/stm32h503rb", "spi-v345", "rng", "stop"] +stm32h7s3l8 = ["embassy-stm32/stm32h7s3l8", "spi-v345", "rng", "cordic", "hash"] # TODO: fdcan crashes, cryp dma hangs. stm32u083rc = ["embassy-stm32/stm32u083rc", "cm0", "rng", "chrono"] +spi-v1 = [] +spi-v345 = [] cryp = [] hash = [] eth = ["embassy-executor/task-arena-size-16384"] diff --git a/tests/stm32/src/bin/spi.rs b/tests/stm32/src/bin/spi.rs index a0ca5284d..0d670b7c1 100644 --- a/tests/stm32/src/bin/spi.rs +++ b/tests/stm32/src/bin/spi.rs @@ -62,27 +62,49 @@ async fn main(_spawner: Spawner) { // Assert the RCC bit gets disabled on drop. #[cfg(feature = "stm32f429zi")] - { - defmt::assert!(embassy_stm32::pac::RCC.apb2enr().read().spi1en()); - drop(spi); - defmt::assert!(!embassy_stm32::pac::RCC.apb2enr().read().spi1en()); - } - - #[cfg(not(feature = "stm32f429zi"))] - core::mem::drop(spi); + defmt::assert!(embassy_stm32::pac::RCC.apb2enr().read().spi1en()); + drop(spi); + #[cfg(feature = "stm32f429zi")] + defmt::assert!(!embassy_stm32::pac::RCC.apb2enr().read().spi1en()); // test rx-only configuration let mut spi = Spi::new_blocking_rxonly(&mut spi_peri, &mut sck, &mut miso, spi_config); - - let mut mosi = Output::new(&mut mosi, Level::Low, Speed::VeryHigh); - - mosi.set_high(); + let mut mosi_out = Output::new(&mut mosi, Level::Low, Speed::VeryHigh); + mosi_out.set_high(); spi.blocking_read(&mut buf).unwrap(); assert_eq!(buf, [0xff; 9]); - - mosi.set_low(); + mosi_out.set_low(); spi.blocking_read(&mut buf).unwrap(); assert_eq!(buf, [0x00; 9]); + drop(mosi_out); + drop(spi); + + // Test tx-only. Just check it doesn't hang, not much else we can do without using SPI slave. + let mut spi = Spi::new_blocking_txonly(&mut spi_peri, &mut sck, &mut mosi, spi_config); + spi.blocking_transfer(&mut buf, &data).unwrap(); + spi.blocking_transfer_in_place(&mut buf).unwrap(); + spi.blocking_write(&buf).unwrap(); + spi.blocking_read(&mut buf).unwrap(); + spi.blocking_transfer::(&mut [], &[]).unwrap(); + spi.blocking_transfer_in_place::(&mut []).unwrap(); + spi.blocking_read::(&mut []).unwrap(); + spi.blocking_write::(&[]).unwrap(); + drop(spi); + + // Test tx-only nosck. + #[cfg(feature = "spi-v1")] + { + let mut spi = Spi::new_blocking_txonly_nosck(&mut spi_peri, &mut mosi, spi_config); + spi.blocking_transfer(&mut buf, &data).unwrap(); + spi.blocking_transfer_in_place(&mut buf).unwrap(); + spi.blocking_write(&buf).unwrap(); + spi.blocking_read(&mut buf).unwrap(); + spi.blocking_transfer::(&mut [], &[]).unwrap(); + spi.blocking_transfer_in_place::(&mut []).unwrap(); + spi.blocking_read::(&mut []).unwrap(); + spi.blocking_write::(&[]).unwrap(); + drop(spi); + } info!("Test OK"); cortex_m::asm::bkpt(); diff --git a/tests/stm32/src/bin/spi_dma.rs b/tests/stm32/src/bin/spi_dma.rs index 92f741af5..0cd3690ec 100644 --- a/tests/stm32/src/bin/spi_dma.rs +++ b/tests/stm32/src/bin/spi_dma.rs @@ -88,31 +88,53 @@ async fn main(_spawner: Spawner) { &mut sck, &mut miso, // SPIv1/f1 requires txdma even if rxonly. - #[cfg(not(any( - feature = "stm32h503rb", - feature = "stm32h563zi", - feature = "stm32h753zi", - feature = "stm32h755zi", - feature = "stm32h7a3zi", - feature = "stm32h7s3l8", - feature = "stm32u585ai", - feature = "stm32u5a5zj", - feature = "stm32wba52cg", - )))] + #[cfg(not(feature = "spi-v345"))] &mut tx_dma, &mut rx_dma, spi_config, ); - - let mut mosi = Output::new(&mut mosi, Level::Low, Speed::VeryHigh); - - mosi.set_high(); + let mut mosi_out = Output::new(&mut mosi, Level::Low, Speed::VeryHigh); + mosi_out.set_high(); spi.read(&mut buf).await.unwrap(); assert_eq!(buf, [0xff; 9]); - - mosi.set_low(); + spi.blocking_read(&mut buf).unwrap(); + assert_eq!(buf, [0xff; 9]); + spi.read(&mut buf).await.unwrap(); + assert_eq!(buf, [0xff; 9]); + spi.read(&mut buf).await.unwrap(); + assert_eq!(buf, [0xff; 9]); + spi.blocking_read(&mut buf).unwrap(); + assert_eq!(buf, [0xff; 9]); + spi.blocking_read(&mut buf).unwrap(); + assert_eq!(buf, [0xff; 9]); + mosi_out.set_low(); spi.read(&mut buf).await.unwrap(); assert_eq!(buf, [0x00; 9]); + drop(mosi_out); + drop(spi); + + // Test tx-only. Just check it doesn't hang, not much else we can do without using SPI slave. + let mut spi = Spi::new_txonly(&mut spi_peri, &mut sck, &mut mosi, &mut tx_dma, spi_config); + spi.blocking_write(&buf).unwrap(); + spi.write(&buf).await.unwrap(); + spi.blocking_write(&buf).unwrap(); + spi.blocking_write(&buf).unwrap(); + spi.write(&buf).await.unwrap(); + spi.write(&buf).await.unwrap(); + drop(spi); + + // Test tx-only nosck. + #[cfg(feature = "spi-v1")] + { + let mut spi = Spi::new_txonly_nosck(&mut spi_peri, &mut mosi, &mut tx_dma, spi_config); + spi.blocking_write(&buf).unwrap(); + spi.write(&buf).await.unwrap(); + spi.blocking_write(&buf).unwrap(); + spi.blocking_write(&buf).unwrap(); + spi.write(&buf).await.unwrap(); + spi.write(&buf).await.unwrap(); + drop(spi); + } info!("Test OK"); cortex_m::asm::bkpt(); From 8a1658ab0e946b1fb6e91a9b22e92a51b78704ec Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Fri, 31 May 2024 22:19:17 +0200 Subject: [PATCH 443/581] stm32/spi: test zero-length transfers in more cases. --- tests/stm32/src/bin/spi.rs | 2 ++ tests/stm32/src/bin/spi_dma.rs | 12 +++++++++++- 2 files changed, 13 insertions(+), 1 deletion(-) diff --git a/tests/stm32/src/bin/spi.rs b/tests/stm32/src/bin/spi.rs index 0d670b7c1..8be3b1a7c 100644 --- a/tests/stm32/src/bin/spi.rs +++ b/tests/stm32/src/bin/spi.rs @@ -76,6 +76,8 @@ async fn main(_spawner: Spawner) { mosi_out.set_low(); spi.blocking_read(&mut buf).unwrap(); assert_eq!(buf, [0x00; 9]); + spi.blocking_read::(&mut []).unwrap(); + spi.blocking_read::(&mut []).unwrap(); drop(mosi_out); drop(spi); diff --git a/tests/stm32/src/bin/spi_dma.rs b/tests/stm32/src/bin/spi_dma.rs index 0cd3690ec..a8001a111 100644 --- a/tests/stm32/src/bin/spi_dma.rs +++ b/tests/stm32/src/bin/spi_dma.rs @@ -63,8 +63,12 @@ async fn main(_spawner: Spawner) { spi.transfer_in_place::(&mut []).await.unwrap(); spi.read::(&mut []).await.unwrap(); spi.write::(&[]).await.unwrap(); + spi.blocking_transfer::(&mut [], &[]).unwrap(); + spi.blocking_transfer_in_place::(&mut []).unwrap(); + spi.blocking_read::(&mut []).unwrap(); + spi.blocking_write::(&[]).unwrap(); - // === Check mixing blocking with async. + // Check mixing blocking with async. spi.blocking_transfer(&mut buf, &data).unwrap(); assert_eq!(buf, data); spi.transfer(&mut buf, &data).await.unwrap(); @@ -110,6 +114,8 @@ async fn main(_spawner: Spawner) { mosi_out.set_low(); spi.read(&mut buf).await.unwrap(); assert_eq!(buf, [0x00; 9]); + spi.read::(&mut []).await.unwrap(); + spi.blocking_read::(&mut []).unwrap(); drop(mosi_out); drop(spi); @@ -121,6 +127,8 @@ async fn main(_spawner: Spawner) { spi.blocking_write(&buf).unwrap(); spi.write(&buf).await.unwrap(); spi.write(&buf).await.unwrap(); + spi.write::(&[]).await.unwrap(); + spi.blocking_write::(&[]).unwrap(); drop(spi); // Test tx-only nosck. @@ -133,6 +141,8 @@ async fn main(_spawner: Spawner) { spi.blocking_write(&buf).unwrap(); spi.write(&buf).await.unwrap(); spi.write(&buf).await.unwrap(); + spi.write::(&[]).await.unwrap(); + spi.blocking_write::(&[]).unwrap(); drop(spi); } From ca3c15658dfb75945506c15070fd0deeb1583aa3 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Jan=20=C5=A0pa=C4=8Dek?= Date: Sun, 26 May 2024 15:33:29 +0200 Subject: [PATCH 444/581] stm32/spi: move init code to function that's not generic in T --- embassy-stm32/src/spi/mod.rs | 39 ++++++++++++++++++------------------ 1 file changed, 20 insertions(+), 19 deletions(-) diff --git a/embassy-stm32/src/spi/mod.rs b/embassy-stm32/src/spi/mod.rs index 5d6277c33..fb8e79ad8 100644 --- a/embassy-stm32/src/spi/mod.rs +++ b/embassy-stm32/src/spi/mod.rs @@ -13,7 +13,7 @@ use crate::dma::{slice_ptr_parts, word, ChannelAndRequest}; use crate::gpio::{AFType, AnyPin, Pull, SealedPin as _, Speed}; use crate::mode::{Async, Blocking, Mode as PeriMode}; use crate::pac::spi::{regs, vals, Spi as Regs}; -use crate::rcc::{self, RccInfo, SealedRccPeripheral}; +use crate::rcc::{RccInfo, SealedRccPeripheral}; use crate::time::Hertz; use crate::Peripheral; @@ -120,17 +120,30 @@ impl<'d, M: PeriMode> Spi<'d, M> { rx_dma: Option>, config: Config, ) -> Self { - let regs = T::info().regs; - let kernel_clock = T::frequency(); - let br = compute_baud_rate(kernel_clock, config.frequency); + let mut this = Self { + info: T::info(), + kernel_clock: T::frequency(), + sck, + mosi, + miso, + tx_dma, + rx_dma, + current_word_size: ::CONFIG, + _phantom: PhantomData, + }; + this.enable_and_init(config); + this + } + fn enable_and_init(&mut self, config: Config) { + let br = compute_baud_rate(self.kernel_clock, config.frequency); let cpha = config.raw_phase(); let cpol = config.raw_polarity(); - let lsbfirst = config.raw_byte_order(); - rcc::enable_and_reset::(); + self.info.rcc.enable_and_reset(); + let regs = self.info.regs; #[cfg(any(spi_v1, spi_f1))] { regs.cr2().modify(|w| { @@ -209,18 +222,6 @@ impl<'d, M: PeriMode> Spi<'d, M> { w.set_spe(true); }); } - - Self { - info: T::info(), - kernel_clock, - sck, - mosi, - miso, - tx_dma, - rx_dma, - current_word_size: ::CONFIG, - _phantom: PhantomData, - } } /// Reconfigures it with the supplied config. @@ -578,7 +579,7 @@ impl<'d> Spi<'d, Async> { // see RM0453 rev 1 section 7.2.13 page 291 // The SUBGHZSPI_SCK frequency is obtained by PCLK3 divided by two. // The SUBGHZSPI_SCK clock maximum speed must not exceed 16 MHz. - let pclk3_freq = ::frequency().0; + let pclk3_freq = ::frequency().0; let freq = Hertz(core::cmp::min(pclk3_freq / 2, 16_000_000)); let mut config = Config::default(); config.mode = MODE_0; From 41711195e305e45caec3ff8316688a6b6d6af955 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Jan=20=C5=A0pa=C4=8Dek?= Date: Sun, 26 May 2024 15:40:42 +0200 Subject: [PATCH 445/581] stm32/i2c: use new_pin! macro --- embassy-stm32/src/i2c/mod.rs | 89 +++++++++++++++++++++++------------- embassy-stm32/src/i2c/v1.rs | 6 --- embassy-stm32/src/i2c/v2.rs | 6 --- 3 files changed, 58 insertions(+), 43 deletions(-) diff --git a/embassy-stm32/src/i2c/mod.rs b/embassy-stm32/src/i2c/mod.rs index 0bf57ef8a..6d12af2cc 100644 --- a/embassy-stm32/src/i2c/mod.rs +++ b/embassy-stm32/src/i2c/mod.rs @@ -9,16 +9,16 @@ use core::future::Future; use core::iter; use core::marker::PhantomData; -use embassy_hal_internal::{into_ref, Peripheral}; +use embassy_hal_internal::{Peripheral, PeripheralRef}; use embassy_sync::waitqueue::AtomicWaker; #[cfg(feature = "time")] use embassy_time::{Duration, Instant}; use crate::dma::ChannelAndRequest; -use crate::gpio::{AFType, Pull}; +use crate::gpio::{AFType, AnyPin, Pull, SealedPin as _, Speed}; use crate::interrupt::typelevel::Interrupt; use crate::mode::{Async, Blocking, Mode}; -use crate::rcc::{self, RccInfo, SealedRccPeripheral}; +use crate::rcc::{RccInfo, SealedRccPeripheral}; use crate::time::Hertz; use crate::{interrupt, peripherals}; @@ -72,11 +72,29 @@ impl Default for Config { } } +impl Config { + fn scl_pull_mode(&self) -> Pull { + match self.scl_pullup { + true => Pull::Up, + false => Pull::Down, + } + } + + fn sda_pull_mode(&self) -> Pull { + match self.sda_pullup { + true => Pull::Up, + false => Pull::Down, + } + } +} + /// I2C driver. pub struct I2c<'d, M: Mode> { info: &'static Info, state: &'static State, kernel_clock: Hertz, + scl: Option>, + sda: Option>, tx_dma: Option>, rx_dma: Option>, #[cfg(feature = "time")] @@ -98,7 +116,15 @@ impl<'d> I2c<'d, Async> { freq: Hertz, config: Config, ) -> Self { - Self::new_inner(peri, scl, sda, new_dma!(tx_dma), new_dma!(rx_dma), freq, config) + Self::new_inner( + peri, + new_pin!(scl, AFType::OutputOpenDrain, Speed::Medium, config.scl_pull_mode()), + new_pin!(sda, AFType::OutputOpenDrain, Speed::Medium, config.sda_pull_mode()), + new_dma!(tx_dma), + new_dma!(rx_dma), + freq, + config, + ) } } @@ -111,7 +137,15 @@ impl<'d> I2c<'d, Blocking> { freq: Hertz, config: Config, ) -> Self { - Self::new_inner(peri, scl, sda, None, None, freq, config) + Self::new_inner( + peri, + new_pin!(scl, AFType::OutputOpenDrain, Speed::Medium, config.scl_pull_mode()), + new_pin!(sda, AFType::OutputOpenDrain, Speed::Medium, config.sda_pull_mode()), + None, + None, + freq, + config, + ) } } @@ -119,34 +153,13 @@ impl<'d, M: Mode> I2c<'d, M> { /// Create a new I2C driver. fn new_inner( _peri: impl Peripheral

+ 'd, - scl: impl Peripheral

> + 'd, - sda: impl Peripheral

> + 'd, + scl: Option>, + sda: Option>, tx_dma: Option>, rx_dma: Option>, freq: Hertz, config: Config, ) -> Self { - into_ref!(scl, sda); - - rcc::enable_and_reset::(); - - scl.set_as_af_pull( - scl.af_num(), - AFType::OutputOpenDrain, - match config.scl_pullup { - true => Pull::Up, - false => Pull::None, - }, - ); - sda.set_as_af_pull( - sda.af_num(), - AFType::OutputOpenDrain, - match config.sda_pullup { - true => Pull::Up, - false => Pull::None, - }, - ); - unsafe { T::EventInterrupt::enable() }; unsafe { T::ErrorInterrupt::enable() }; @@ -154,18 +167,23 @@ impl<'d, M: Mode> I2c<'d, M> { info: T::info(), state: T::state(), kernel_clock: T::frequency(), + scl, + sda, tx_dma, rx_dma, #[cfg(feature = "time")] timeout: config.timeout, _phantom: PhantomData, }; - - this.init(freq, config); - + this.enable_and_init(freq, config); this } + fn enable_and_init(&mut self, freq: Hertz, config: Config) { + self.info.rcc.enable_and_reset(); + self.init(freq, config); + } + fn timeout(&self) -> Timeout { Timeout { #[cfg(feature = "time")] @@ -174,6 +192,15 @@ impl<'d, M: Mode> I2c<'d, M> { } } +impl<'d, M: Mode> Drop for I2c<'d, M> { + fn drop(&mut self) { + self.scl.as_ref().map(|x| x.set_as_disconnected()); + self.sda.as_ref().map(|x| x.set_as_disconnected()); + + self.info.rcc.disable() + } +} + #[derive(Copy, Clone)] struct Timeout { #[cfg(feature = "time")] diff --git a/embassy-stm32/src/i2c/v1.rs b/embassy-stm32/src/i2c/v1.rs index 0e2bd2e40..28026f83c 100644 --- a/embassy-stm32/src/i2c/v1.rs +++ b/embassy-stm32/src/i2c/v1.rs @@ -700,12 +700,6 @@ impl<'d> I2c<'d, Async> { } } -impl<'d, M: PeriMode> Drop for I2c<'d, M> { - fn drop(&mut self) { - self.info.rcc.disable() - } -} - enum Mode { Fast, Standard, diff --git a/embassy-stm32/src/i2c/v2.rs b/embassy-stm32/src/i2c/v2.rs index 193f29733..80163c287 100644 --- a/embassy-stm32/src/i2c/v2.rs +++ b/embassy-stm32/src/i2c/v2.rs @@ -671,12 +671,6 @@ impl<'d> I2c<'d, Async> { } } -impl<'d, M: Mode> Drop for I2c<'d, M> { - fn drop(&mut self) { - self.info.rcc.disable(); - } -} - /// I2C Stop Configuration /// /// Peripheral options for generating the STOP condition From ade27b7f212f9548816e5ae21826a230c2345574 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Jan=20=C5=A0pa=C4=8Dek?= Date: Sun, 26 May 2024 16:21:11 +0200 Subject: [PATCH 446/581] stm32/usart: disconnect pins of RingBufferedUartRx on drop --- embassy-stm32/src/usart/ringbuffered.rs | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/embassy-stm32/src/usart/ringbuffered.rs b/embassy-stm32/src/usart/ringbuffered.rs index f3a88b93f..8cf75933a 100644 --- a/embassy-stm32/src/usart/ringbuffered.rs +++ b/embassy-stm32/src/usart/ringbuffered.rs @@ -4,10 +4,12 @@ use core::sync::atomic::{compiler_fence, Ordering}; use core::task::Poll; use embassy_embedded_hal::SetConfig; +use embassy_hal_internal::PeripheralRef; use futures_util::future::{select, Either}; use super::{clear_interrupt_flags, rdr, reconfigure, sr, Config, ConfigError, Error, Info, State, UartRx}; use crate::dma::ReadableRingBuffer; +use crate::gpio::{AnyPin, SealedPin as _}; use crate::mode::Async; use crate::time::Hertz; use crate::usart::{Regs, Sr}; @@ -19,6 +21,8 @@ pub struct RingBufferedUartRx<'d> { info: &'static Info, state: &'static State, kernel_clock: Hertz, + rx: Option>, + rts: Option>, ring_buf: ReadableRingBuffer<'d, u8>, } @@ -49,6 +53,8 @@ impl<'d> UartRx<'d, Async> { let state = self.state; let kernel_clock = self.kernel_clock; let ring_buf = unsafe { ReadableRingBuffer::new(rx_dma, request, rdr(info.regs), dma_buf, opts) }; + let rx = unsafe { self.rx.as_ref().map(|x| x.clone_unchecked()) }; + let rts = unsafe { self.rts.as_ref().map(|x| x.clone_unchecked()) }; // Don't disable the clock mem::forget(self); @@ -57,6 +63,8 @@ impl<'d> UartRx<'d, Async> { info, state, kernel_clock, + rx, + rts, ring_buf, } } @@ -221,6 +229,8 @@ impl<'d> RingBufferedUartRx<'d> { impl Drop for RingBufferedUartRx<'_> { fn drop(&mut self) { self.teardown_uart(); + self.rx.as_ref().map(|x| x.set_as_disconnected()); + self.rts.as_ref().map(|x| x.set_as_disconnected()); super::drop_tx_rx(self.info, self.state); } } From 44e4a2c9e9c1e5824acb68673c8f6b4b98d1ea07 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Jan=20=C5=A0pa=C4=8Dek?= Date: Sun, 26 May 2024 16:37:26 +0200 Subject: [PATCH 447/581] stm32/buffered-usart: use new_pin! and disconnect pins on drop --- embassy-stm32/src/usart/buffered.rs | 102 +++++++++++++++++----------- embassy-stm32/src/usart/mod.rs | 5 +- 2 files changed, 65 insertions(+), 42 deletions(-) diff --git a/embassy-stm32/src/usart/buffered.rs b/embassy-stm32/src/usart/buffered.rs index eacf95002..2c19e16db 100644 --- a/embassy-stm32/src/usart/buffered.rs +++ b/embassy-stm32/src/usart/buffered.rs @@ -6,7 +6,7 @@ use core::task::Poll; use embassy_embedded_hal::SetConfig; use embassy_hal_internal::atomic_ring_buffer::RingBuffer; -use embassy_hal_internal::{into_ref, Peripheral}; +use embassy_hal_internal::{Peripheral, PeripheralRef}; use embassy_sync::waitqueue::AtomicWaker; #[cfg(not(any(usart_v1, usart_v2)))] @@ -15,7 +15,7 @@ use super::{ clear_interrupt_flags, configure, rdr, reconfigure, sr, tdr, Config, ConfigError, CtsPin, Error, Info, Instance, Regs, RtsPin, RxPin, TxPin, }; -use crate::gpio::AFType; +use crate::gpio::{AFType, AnyPin, SealedPin as _}; use crate::interrupt::typelevel::Interrupt as _; use crate::interrupt::{self, InterruptExt}; use crate::rcc; @@ -156,7 +156,9 @@ pub struct BufferedUartTx<'d> { info: &'static Info, state: &'static State, kernel_clock: Hertz, - _phantom: PhantomData<&'d mut ()>, + tx: Option>, + cts: Option>, + de: Option>, } /// Rx-only buffered UART @@ -166,7 +168,8 @@ pub struct BufferedUartRx<'d> { info: &'static Info, state: &'static State, kernel_clock: Hertz, - _phantom: PhantomData<&'d mut ()>, + rx: Option>, + rts: Option>, } impl<'d> SetConfig for BufferedUart<'d> { @@ -207,9 +210,17 @@ impl<'d> BufferedUart<'d> { rx_buffer: &'d mut [u8], config: Config, ) -> Result { - rcc::enable_and_reset::(); - - Self::new_inner(peri, rx, tx, tx_buffer, rx_buffer, config) + Self::new_inner( + peri, + new_pin!(rx, AFType::Input), + new_pin!(tx, AFType::OutputPushPull), + None, + None, + None, + tx_buffer, + rx_buffer, + config, + ) } /// Create a new bidirectional buffered UART driver with request-to-send and clear-to-send pins @@ -224,18 +235,17 @@ impl<'d> BufferedUart<'d> { rx_buffer: &'d mut [u8], config: Config, ) -> Result { - into_ref!(cts, rts); - - rcc::enable_and_reset::(); - - rts.set_as_af(rts.af_num(), AFType::OutputPushPull); - cts.set_as_af(cts.af_num(), AFType::Input); - T::info().regs.cr3().write(|w| { - w.set_rtse(true); - w.set_ctse(true); - }); - - Self::new_inner(peri, rx, tx, tx_buffer, rx_buffer, config) + Self::new_inner( + peri, + new_pin!(rx, AFType::Input), + new_pin!(tx, AFType::OutputPushPull), + new_pin!(rts, AFType::OutputPushPull), + new_pin!(cts, AFType::Input), + None, + tx_buffer, + rx_buffer, + config, + ) } /// Create a new bidirectional buffered UART driver with a driver-enable pin @@ -250,27 +260,31 @@ impl<'d> BufferedUart<'d> { rx_buffer: &'d mut [u8], config: Config, ) -> Result { - into_ref!(de); - - rcc::enable_and_reset::(); - - de.set_as_af(de.af_num(), AFType::OutputPushPull); - T::info().regs.cr3().write(|w| { - w.set_dem(true); - }); - - Self::new_inner(peri, rx, tx, tx_buffer, rx_buffer, config) + Self::new_inner( + peri, + new_pin!(rx, AFType::Input), + new_pin!(tx, AFType::OutputPushPull), + None, + None, + new_pin!(de, AFType::OutputPushPull), + tx_buffer, + rx_buffer, + config, + ) } fn new_inner( _peri: impl Peripheral

+ 'd, - rx: impl Peripheral

> + 'd, - tx: impl Peripheral

> + 'd, + rx: Option>, + tx: Option>, + rts: Option>, + cts: Option>, + de: Option>, tx_buffer: &'d mut [u8], rx_buffer: &'d mut [u8], config: Config, ) -> Result { - into_ref!(_peri, rx, tx); + rcc::enable_and_reset::(); let info = T::info(); let state = T::buffered_state(); @@ -280,13 +294,15 @@ impl<'d> BufferedUart<'d> { let len = rx_buffer.len(); unsafe { state.rx_buf.init(rx_buffer.as_mut_ptr(), len) }; - let r = info.regs; - rx.set_as_af(rx.af_num(), AFType::Input); - tx.set_as_af(tx.af_num(), AFType::OutputPushPull); - + info.regs.cr3().write(|w| { + w.set_rtse(rts.is_some()); + w.set_ctse(cts.is_some()); + #[cfg(not(any(usart_v1, usart_v2)))] + w.set_dem(de.is_some()); + }); configure(info, kernel_clock, &config, true, true)?; - r.cr1().modify(|w| { + info.regs.cr1().modify(|w| { w.set_rxneie(true); w.set_idleie(true); }); @@ -301,13 +317,16 @@ impl<'d> BufferedUart<'d> { info, state, kernel_clock, - _phantom: PhantomData, + rx, + rts, }, tx: BufferedUartTx { info, state, kernel_clock, - _phantom: PhantomData, + tx, + cts, + de, }, }) } @@ -516,6 +535,8 @@ impl<'d> Drop for BufferedUartRx<'d> { } } + self.rx.as_ref().map(|x| x.set_as_disconnected()); + self.rts.as_ref().map(|x| x.set_as_disconnected()); drop_tx_rx(self.info, state); } } @@ -533,6 +554,9 @@ impl<'d> Drop for BufferedUartTx<'d> { } } + self.tx.as_ref().map(|x| x.set_as_disconnected()); + self.cts.as_ref().map(|x| x.set_as_disconnected()); + self.de.as_ref().map(|x| x.set_as_disconnected()); drop_tx_rx(self.info, state); } } diff --git a/embassy-stm32/src/usart/mod.rs b/embassy-stm32/src/usart/mod.rs index 2a39c6301..6ef80c54f 100644 --- a/embassy-stm32/src/usart/mod.rs +++ b/embassy-stm32/src/usart/mod.rs @@ -14,7 +14,7 @@ use embassy_sync::waitqueue::AtomicWaker; use futures_util::future::{select, Either}; use crate::dma::ChannelAndRequest; -use crate::gpio::{AFType, AnyPin, SealedPin}; +use crate::gpio::{AFType, AnyPin, SealedPin as _}; use crate::interrupt::typelevel::Interrupt as _; use crate::interrupt::{self, Interrupt, InterruptExt}; use crate::mode::{Async, Blocking, Mode}; @@ -1233,9 +1233,8 @@ impl<'d, M: Mode> Uart<'d, M> { let info = T::info(); let state = T::state(); let kernel_clock = T::frequency(); - let r = info.regs; - r.cr3().write(|w| { + info.regs.cr3().write(|w| { w.set_rtse(rts.is_some()); w.set_ctse(cts.is_some()); #[cfg(not(any(usart_v1, usart_v2)))] From 664e4a5c032d2291beedf1ead706f5d17b8178da Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Jan=20=C5=A0pa=C4=8Dek?= Date: Sun, 26 May 2024 16:55:07 +0200 Subject: [PATCH 448/581] stm32/usart: move init code to function that's not generic in T --- embassy-stm32/src/usart/buffered.rs | 68 +++++++++------ embassy-stm32/src/usart/mod.rs | 130 ++++++++++++++++------------ 2 files changed, 113 insertions(+), 85 deletions(-) diff --git a/embassy-stm32/src/usart/buffered.rs b/embassy-stm32/src/usart/buffered.rs index 2c19e16db..09d020a7b 100644 --- a/embassy-stm32/src/usart/buffered.rs +++ b/embassy-stm32/src/usart/buffered.rs @@ -16,9 +16,7 @@ use super::{ Regs, RtsPin, RxPin, TxPin, }; use crate::gpio::{AFType, AnyPin, SealedPin as _}; -use crate::interrupt::typelevel::Interrupt as _; use crate::interrupt::{self, InterruptExt}; -use crate::rcc; use crate::time::Hertz; /// Interrupt handler. @@ -284,35 +282,11 @@ impl<'d> BufferedUart<'d> { rx_buffer: &'d mut [u8], config: Config, ) -> Result { - rcc::enable_and_reset::(); - let info = T::info(); let state = T::buffered_state(); let kernel_clock = T::frequency(); - let len = tx_buffer.len(); - unsafe { state.tx_buf.init(tx_buffer.as_mut_ptr(), len) }; - let len = rx_buffer.len(); - unsafe { state.rx_buf.init(rx_buffer.as_mut_ptr(), len) }; - info.regs.cr3().write(|w| { - w.set_rtse(rts.is_some()); - w.set_ctse(cts.is_some()); - #[cfg(not(any(usart_v1, usart_v2)))] - w.set_dem(de.is_some()); - }); - configure(info, kernel_clock, &config, true, true)?; - - info.regs.cr1().modify(|w| { - w.set_rxneie(true); - w.set_idleie(true); - }); - - T::Interrupt::unpend(); - unsafe { T::Interrupt::enable() }; - - state.tx_rx_refcount.store(2, Ordering::Relaxed); - - Ok(Self { + let mut this = Self { rx: BufferedUartRx { info, state, @@ -328,7 +302,45 @@ impl<'d> BufferedUart<'d> { cts, de, }, - }) + }; + this.enable_and_configure(tx_buffer, rx_buffer, &config)?; + Ok(this) + } + + fn enable_and_configure( + &mut self, + tx_buffer: &'d mut [u8], + rx_buffer: &'d mut [u8], + config: &Config, + ) -> Result<(), ConfigError> { + let info = self.rx.info; + let state = self.rx.state; + + info.rcc.enable_and_reset(); + + let len = tx_buffer.len(); + unsafe { state.tx_buf.init(tx_buffer.as_mut_ptr(), len) }; + let len = rx_buffer.len(); + unsafe { state.rx_buf.init(rx_buffer.as_mut_ptr(), len) }; + + info.regs.cr3().write(|w| { + w.set_rtse(self.rx.rts.is_some()); + w.set_ctse(self.tx.cts.is_some()); + #[cfg(not(any(usart_v1, usart_v2)))] + w.set_dem(self.tx.de.is_some()); + }); + configure(info, self.rx.kernel_clock, &config, true, true)?; + + info.regs.cr1().modify(|w| { + w.set_rxneie(true); + w.set_idleie(true); + }); + + info.interrupt.unpend(); + unsafe { info.interrupt.enable() }; + + state.tx_rx_refcount.store(2, Ordering::Relaxed); + Ok(()) } /// Split the driver into a Tx and Rx part (useful for sending to separate tasks) diff --git a/embassy-stm32/src/usart/mod.rs b/embassy-stm32/src/usart/mod.rs index 6ef80c54f..df5121f67 100644 --- a/embassy-stm32/src/usart/mod.rs +++ b/embassy-stm32/src/usart/mod.rs @@ -28,7 +28,7 @@ use crate::pac::usart::Lpuart as Regs; #[cfg(any(usart_v1, usart_v2))] use crate::pac::usart::Usart as Regs; use crate::pac::usart::{regs, vals}; -use crate::rcc::{self, RccInfo, SealedRccPeripheral}; +use crate::rcc::{RccInfo, SealedRccPeripheral}; use crate::time::Hertz; use crate::Peripheral; @@ -429,29 +429,33 @@ impl<'d, M: Mode> UartTx<'d, M> { tx_dma: Option>, config: Config, ) -> Result { - rcc::enable_and_reset::(); - - let info = T::info(); - let state = T::state(); - let kernel_clock = T::frequency(); - let r = info.regs; - r.cr3().modify(|w| { - w.set_ctse(cts.is_some()); - }); - configure(info, kernel_clock, &config, false, true)?; - - state.tx_rx_refcount.store(1, Ordering::Relaxed); - - Ok(Self { - info, - state, - kernel_clock, + let mut this = Self { + info: T::info(), + state: T::state(), + kernel_clock: T::frequency(), tx, cts, de: None, tx_dma, _phantom: PhantomData, - }) + }; + this.enable_and_configure(&config)?; + Ok(this) + } + + fn enable_and_configure(&mut self, config: &Config) -> Result<(), ConfigError> { + let info = self.info; + let state = self.state; + + info.rcc.enable_and_reset(); + + info.regs.cr3().modify(|w| { + w.set_ctse(self.cts.is_some()); + }); + configure(info, self.kernel_clock, config, false, true)?; + + state.tx_rx_refcount.store(1, Ordering::Relaxed); + Ok(()) } /// Reconfigure the driver @@ -775,34 +779,38 @@ impl<'d, M: Mode> UartRx<'d, M> { rx_dma: Option>, config: Config, ) -> Result { - rcc::enable_and_reset::(); - - let info = T::info(); - let state = T::state(); - let kernel_clock = T::frequency(); - let r = info.regs; - r.cr3().write(|w| { - w.set_rtse(rts.is_some()); - }); - configure(info, kernel_clock, &config, true, false)?; - - T::Interrupt::unpend(); - unsafe { T::Interrupt::enable() }; - - state.tx_rx_refcount.store(1, Ordering::Relaxed); - - Ok(Self { + let mut this = Self { _phantom: PhantomData, - info, - state, - kernel_clock, + info: T::info(), + state: T::state(), + kernel_clock: T::frequency(), rx, rts, rx_dma, detect_previous_overrun: config.detect_previous_overrun, #[cfg(any(usart_v1, usart_v2))] buffered_sr: stm32_metapac::usart::regs::Sr(0), - }) + }; + this.enable_and_configure(&config)?; + Ok(this) + } + + fn enable_and_configure(&mut self, config: &Config) -> Result<(), ConfigError> { + let info = self.info; + let state = self.state; + + info.rcc.enable_and_reset(); + + info.regs.cr3().write(|w| { + w.set_rtse(self.rts.is_some()); + }); + configure(info, self.kernel_clock, &config, true, false)?; + + info.interrupt.unpend(); + unsafe { info.interrupt.enable() }; + + state.tx_rx_refcount.store(1, Ordering::Relaxed); + Ok(()) } /// Reconfigure the driver @@ -1228,26 +1236,11 @@ impl<'d, M: Mode> Uart<'d, M> { rx_dma: Option>, config: Config, ) -> Result { - rcc::enable_and_reset::(); - let info = T::info(); let state = T::state(); let kernel_clock = T::frequency(); - info.regs.cr3().write(|w| { - w.set_rtse(rts.is_some()); - w.set_ctse(cts.is_some()); - #[cfg(not(any(usart_v1, usart_v2)))] - w.set_dem(de.is_some()); - }); - configure(info, kernel_clock, &config, true, true)?; - - T::Interrupt::unpend(); - unsafe { T::Interrupt::enable() }; - - state.tx_rx_refcount.store(2, Ordering::Relaxed); - - Ok(Self { + let mut this = Self { tx: UartTx { _phantom: PhantomData, info, @@ -1270,7 +1263,30 @@ impl<'d, M: Mode> Uart<'d, M> { #[cfg(any(usart_v1, usart_v2))] buffered_sr: stm32_metapac::usart::regs::Sr(0), }, - }) + }; + this.enable_and_configure(&config)?; + Ok(this) + } + + fn enable_and_configure(&mut self, config: &Config) -> Result<(), ConfigError> { + let info = self.rx.info; + let state = self.rx.state; + + info.rcc.enable_and_reset(); + + info.regs.cr3().write(|w| { + w.set_rtse(self.rx.rts.is_some()); + w.set_ctse(self.tx.cts.is_some()); + #[cfg(not(any(usart_v1, usart_v2)))] + w.set_dem(self.tx.de.is_some()); + }); + configure(info, self.rx.kernel_clock, config, true, true)?; + + info.interrupt.unpend(); + unsafe { info.interrupt.enable() }; + + state.tx_rx_refcount.store(2, Ordering::Relaxed); + Ok(()) } /// Perform a blocking write From 367a22cc0eef61f05061aaadc714990723c25940 Mon Sep 17 00:00:00 2001 From: Corey Schuhen Date: Sun, 2 Jun 2024 19:40:25 +1000 Subject: [PATCH 449/581] Remove more BXCAN generics. --- embassy-stm32/src/can/bxcan/filter.rs | 70 ++++++++++--------- embassy-stm32/src/can/bxcan/mod.rs | 85 +++++++++++++++--------- embassy-stm32/src/can/bxcan/registers.rs | 12 ++-- tests/stm32/src/bin/can.rs | 6 +- tests/stm32/src/bin/can_common.rs | 4 +- tests/stm32/src/bin/fdcan.rs | 4 -- 6 files changed, 99 insertions(+), 82 deletions(-) diff --git a/embassy-stm32/src/can/bxcan/filter.rs b/embassy-stm32/src/can/bxcan/filter.rs index 9940c7f50..167c6c572 100644 --- a/embassy-stm32/src/can/bxcan/filter.rs +++ b/embassy-stm32/src/can/bxcan/filter.rs @@ -2,7 +2,7 @@ use core::marker::PhantomData; -use super::{ExtendedId, Fifo, FilterOwner, Id, Instance, MasterInstance, StandardId}; +use super::{ExtendedId, Fifo, Id, StandardId}; const F32_RTR: u32 = 0b010; // set the RTR bit to match remote frames const F32_IDE: u32 = 0b100; // set the IDE bit to match extended identifiers @@ -210,24 +210,24 @@ impl From for BankConfig { } /// Interface to the filter banks of a CAN peripheral. -pub struct MasterFilters<'a, I: FilterOwner> { +pub struct MasterFilters<'a> { /// Number of assigned filter banks. /// /// On chips with splittable filter banks, this value can be dynamic. bank_count: u8, - _can: PhantomData<&'a mut I>, - canregs: crate::pac::can::Can, + _phantom: PhantomData<&'a ()>, + info: &'static crate::can::Info, } // NOTE: This type mutably borrows the CAN instance and has unique access to the registers while it // exists. -impl MasterFilters<'_, I> { - pub(crate) unsafe fn new(canregs: crate::pac::can::Can) -> Self { +impl MasterFilters<'_> { + pub(crate) unsafe fn new(info: &'static crate::can::Info) -> Self { // Enable initialization mode. - canregs.fmr().modify(|reg| reg.set_finit(true)); + info.regs.0.fmr().modify(|reg| reg.set_finit(true)); // Read the filter split value. - let bank_count = canregs.fmr().read().can2sb(); + let bank_count = info.regs.0.fmr().read().can2sb(); // (Reset value of CAN2SB is 0x0E, 14, which, in devices with 14 filter banks, assigns all // of them to the master peripheral, and in devices with 28, assigns them 50/50 to @@ -235,8 +235,8 @@ impl MasterFilters<'_, I> { Self { bank_count, - _can: PhantomData, - canregs, + _phantom: PhantomData, + info, } } @@ -244,7 +244,7 @@ impl MasterFilters<'_, I> { FilterBanks { start_idx: 0, bank_count: self.bank_count, - canregs: self.canregs, + info: self.info, } } @@ -291,49 +291,49 @@ impl MasterFilters<'_, I> { } } -impl MasterFilters<'_, I> { +impl MasterFilters<'_> { /// Sets the index at which the filter banks owned by the slave peripheral start. pub fn set_split(&mut self, split_index: u8) -> &mut Self { - assert!(split_index <= I::NUM_FILTER_BANKS); - self.canregs.fmr().modify(|reg| reg.set_can2sb(split_index)); + assert!(split_index <= self.info.num_filter_banks); + self.info.regs.0.fmr().modify(|reg| reg.set_can2sb(split_index)); self.bank_count = split_index; self } /// Accesses the filters assigned to the slave peripheral. - pub fn slave_filters(&mut self) -> SlaveFilters<'_, I> { + pub fn slave_filters(&mut self) -> SlaveFilters<'_> { // NB: This mutably borrows `self`, so it has full access to the filter bank registers. SlaveFilters { start_idx: self.bank_count, - bank_count: I::NUM_FILTER_BANKS - self.bank_count, - _can: PhantomData, - canregs: self.canregs, + bank_count: self.info.num_filter_banks - self.bank_count, + _phantom: PhantomData, + info: self.info, } } } -impl Drop for MasterFilters<'_, I> { +impl Drop for MasterFilters<'_> { #[inline] fn drop(&mut self) { // Leave initialization mode. - self.canregs.fmr().modify(|regs| regs.set_finit(false)); + self.info.regs.0.fmr().modify(|regs| regs.set_finit(false)); } } /// Interface to the filter banks assigned to a slave peripheral. -pub struct SlaveFilters<'a, I: Instance> { +pub struct SlaveFilters<'a> { start_idx: u8, bank_count: u8, - _can: PhantomData<&'a mut I>, - canregs: crate::pac::can::Can, + _phantom: PhantomData<&'a ()>, + info: &'static crate::can::Info, } -impl SlaveFilters<'_, I> { +impl SlaveFilters<'_> { fn banks_imm(&self) -> FilterBanks { FilterBanks { start_idx: self.start_idx, bank_count: self.bank_count, - canregs: self.canregs, + info: self.info, } } @@ -377,14 +377,14 @@ impl SlaveFilters<'_, I> { struct FilterBanks { start_idx: u8, bank_count: u8, - canregs: crate::pac::can::Can, + info: &'static crate::can::Info, } impl FilterBanks { fn clear(&mut self) { let mask = filter_bitmask(self.start_idx, self.bank_count); - self.canregs.fa1r().modify(|reg| { + self.info.regs.0.fa1r().modify(|reg| { for i in 0..28usize { if (0x01u32 << i) & mask != 0 { reg.set_fact(i, false); @@ -399,7 +399,11 @@ impl FilterBanks { fn disable(&mut self, index: u8) { self.assert_bank_index(index); - self.canregs.fa1r().modify(|reg| reg.set_fact(index as usize, false)) + self.info + .regs + .0 + .fa1r() + .modify(|reg| reg.set_fact(index as usize, false)) } fn enable(&mut self, index: u8, fifo: Fifo, config: BankConfig) { @@ -407,11 +411,11 @@ impl FilterBanks { // Configure mode. let mode = matches!(config, BankConfig::List16(_) | BankConfig::List32(_)); - self.canregs.fm1r().modify(|reg| reg.set_fbm(index as usize, mode)); + self.info.regs.0.fm1r().modify(|reg| reg.set_fbm(index as usize, mode)); // Configure scale. let scale = matches!(config, BankConfig::List32(_) | BankConfig::Mask32(_)); - self.canregs.fs1r().modify(|reg| reg.set_fsc(index as usize, scale)); + self.info.regs.0.fs1r().modify(|reg| reg.set_fsc(index as usize, scale)); // Configure filter register. let (fxr1, fxr2); @@ -433,12 +437,12 @@ impl FilterBanks { fxr2 = a.mask; } }; - let bank = self.canregs.fb(index as usize); + let bank = self.info.regs.0.fb(index as usize); bank.fr1().write(|w| w.0 = fxr1); bank.fr2().write(|w| w.0 = fxr2); // Assign to the right FIFO - self.canregs.ffa1r().modify(|reg| { + self.info.regs.0.ffa1r().modify(|reg| { reg.set_ffa( index as usize, match fifo { @@ -449,7 +453,7 @@ impl FilterBanks { }); // Set active. - self.canregs.fa1r().modify(|reg| reg.set_fact(index as usize, true)) + self.info.regs.0.fa1r().modify(|reg| reg.set_fact(index as usize, true)) } } diff --git a/embassy-stm32/src/can/bxcan/mod.rs b/embassy-stm32/src/can/bxcan/mod.rs index 9f7df1e71..53b94b9e2 100644 --- a/embassy-stm32/src/can/bxcan/mod.rs +++ b/embassy-stm32/src/can/bxcan/mod.rs @@ -6,7 +6,7 @@ use core::marker::PhantomData; use core::task::Poll; use embassy_hal_internal::interrupt::InterruptExt; -use embassy_hal_internal::{into_ref, PeripheralRef}; +use embassy_hal_internal::into_ref; use embassy_sync::blocking_mutex::raw::CriticalSectionRawMutex; use embassy_sync::channel::Channel; use embassy_sync::waitqueue::AtomicWaker; @@ -91,11 +91,13 @@ impl interrupt::typelevel::Handler for SceInterrup } /// Configuration proxy returned by [`Can::modify_config`]. -pub struct CanConfig<'a, T: Instance> { - can: PhantomData<&'a mut T>, +pub struct CanConfig<'a> { + phantom: PhantomData<&'a ()>, + info: &'static Info, + periph_clock: crate::time::Hertz, } -impl CanConfig<'_, T> { +impl CanConfig<'_> { /// Configures the bit timings. /// /// You can use to calculate the `btr` parameter. Enter @@ -109,7 +111,7 @@ impl CanConfig<'_, T> { /// Then copy the `CAN_BUS_TIME` register value from the table and pass it as the `btr` /// parameter to this method. pub fn set_bit_timing(self, bt: crate::can::util::NominalBitTiming) -> Self { - Registers(T::regs()).set_bit_timing(bt); + self.info.regs.set_bit_timing(bt); self } @@ -117,20 +119,20 @@ impl CanConfig<'_, T> { /// /// This is a helper that internally calls `set_bit_timing()`[Self::set_bit_timing]. pub fn set_bitrate(self, bitrate: u32) -> Self { - let bit_timing = util::calc_can_timings(T::frequency(), bitrate).unwrap(); + let bit_timing = util::calc_can_timings(self.periph_clock, bitrate).unwrap(); self.set_bit_timing(bit_timing) } /// Enables or disables loopback mode: Internally connects the TX and RX /// signals together. pub fn set_loopback(self, enabled: bool) -> Self { - Registers(T::regs()).set_loopback(enabled); + self.info.regs.set_loopback(enabled); self } /// Enables or disables silent mode: Disconnects the TX signal from the pin. pub fn set_silent(self, enabled: bool) -> Self { - Registers(T::regs()).set_silent(enabled); + self.info.regs.set_silent(enabled); self } @@ -141,23 +143,24 @@ impl CanConfig<'_, T> { /// /// Automatic retransmission is enabled by default. pub fn set_automatic_retransmit(self, enabled: bool) -> Self { - Registers(T::regs()).set_automatic_retransmit(enabled); + self.info.regs.set_automatic_retransmit(enabled); self } } -impl Drop for CanConfig<'_, T> { +impl Drop for CanConfig<'_> { #[inline] fn drop(&mut self) { - Registers(T::regs()).leave_init_mode(); + self.info.regs.leave_init_mode(); } } /// CAN driver -pub struct Can<'d, T: Instance> { - _peri: PeripheralRef<'d, T>, +pub struct Can<'d> { + phantom: PhantomData<&'d ()>, info: &'static Info, state: &'static State, + periph_clock: crate::time::Hertz, } /// Error returned by `try_write` @@ -168,11 +171,11 @@ pub enum TryWriteError { Full, } -impl<'d, T: Instance> Can<'d, T> { +impl<'d> Can<'d> { /// Creates a new Bxcan instance, keeping the peripheral in sleep mode. /// You must call [Can::enable_non_blocking] to use the peripheral. - pub fn new( - peri: impl Peripheral

+ 'd, + pub fn new( + _peri: impl Peripheral

+ 'd, rx: impl Peripheral

> + 'd, tx: impl Peripheral

> + 'd, _irqs: impl interrupt::typelevel::Binding> @@ -181,7 +184,7 @@ impl<'d, T: Instance> Can<'d, T> { + interrupt::typelevel::Binding> + 'd, ) -> Self { - into_ref!(peri, rx, tx); + into_ref!(_peri, rx, tx); let info = T::info(); let regs = &T::info().regs; @@ -226,15 +229,16 @@ impl<'d, T: Instance> Can<'d, T> { Registers(T::regs()).leave_init_mode(); Self { - _peri: peri, + phantom: PhantomData, info: T::info(), state: T::state(), + periph_clock: T::frequency(), } } /// Set CAN bit rate. pub fn set_bitrate(&mut self, bitrate: u32) { - let bit_timing = util::calc_can_timings(T::frequency(), bitrate).unwrap(); + let bit_timing = util::calc_can_timings(self.periph_clock, bitrate).unwrap(); self.modify_config().set_bit_timing(bit_timing); } @@ -242,10 +246,14 @@ impl<'d, T: Instance> Can<'d, T> { /// /// Calling this method will enter initialization mode. You must enable the peripheral /// again afterwards with [`enable`](Self::enable). - pub fn modify_config(&mut self) -> CanConfig<'_, T> { - Registers(T::regs()).enter_init_mode(); + pub fn modify_config(&mut self) -> CanConfig<'_> { + self.info.regs.enter_init_mode(); - CanConfig { can: PhantomData } + CanConfig { + phantom: self.phantom, + info: self.info, + periph_clock: self.periph_clock, + } } /// Enables the peripheral and synchronizes with the bus. @@ -253,7 +261,7 @@ impl<'d, T: Instance> Can<'d, T> { /// This will wait for 11 consecutive recessive bits (bus idle state). /// Contrary to enable method from bxcan library, this will not freeze the executor while waiting. pub async fn enable(&mut self) { - while Registers(T::regs()).enable_non_blocking().is_err() { + while self.info.regs.enable_non_blocking().is_err() { // SCE interrupt is only generated for entering sleep mode, but not leaving. // Yield to allow other tasks to execute while can bus is initializing. embassy_futures::yield_now().await; @@ -263,7 +271,7 @@ impl<'d, T: Instance> Can<'d, T> { /// Enables or disables the peripheral from automatically wakeup when a SOF is detected on the bus /// while the peripheral is in sleep mode pub fn set_automatic_wakeup(&mut self, enabled: bool) { - Registers(T::regs()).set_automatic_wakeup(enabled); + self.info.regs.set_automatic_wakeup(enabled); } /// Manually wake the peripheral from sleep mode. @@ -313,12 +321,12 @@ impl<'d, T: Instance> Can<'d, T> { /// /// FIFO scheduling is disabled by default. pub fn set_tx_fifo_scheduling(&mut self, enabled: bool) { - Registers(T::regs()).set_tx_fifo_scheduling(enabled) + self.info.regs.set_tx_fifo_scheduling(enabled) } /// Checks if FIFO scheduling of outgoing frames is enabled. pub fn tx_fifo_scheduling_enabled(&self) -> bool { - Registers(T::regs()).tx_fifo_scheduling_enabled() + self.info.regs.tx_fifo_scheduling_enabled() } /// Queues the message to be sent. @@ -448,13 +456,13 @@ impl<'d, T: Instance> Can<'d, T> { } } -impl<'d, T: FilterOwner> Can<'d, T> { +impl<'d> Can<'d> { /// Accesses the filter banks owned by this CAN peripheral. /// /// To modify filters of a slave peripheral, `modify_filters` has to be called on the master /// peripheral instead. - pub fn modify_filters(&mut self) -> MasterFilters<'_, T> { - unsafe { MasterFilters::new(self.info.regs.0) } + pub fn modify_filters(&mut self) -> MasterFilters<'_> { + unsafe { MasterFilters::new(self.info) } } } @@ -819,12 +827,14 @@ impl<'d, const RX_BUF_SIZE: usize> Drop for BufferedCanRx<'d, RX_BUF_SIZE> { } } -impl<'d, T: Instance> Drop for Can<'d, T> { +impl Drop for Can<'_> { fn drop(&mut self) { // Cannot call `free()` because it moves the instance. // Manually reset the peripheral. - T::regs().mcr().write(|w| w.set_reset(true)); - rcc::disable::(); + self.info.regs.0.mcr().write(|w| w.set_reset(true)); + self.info.regs.enter_init_mode(); + self.info.regs.leave_init_mode(); + //rcc::disable::(); } } @@ -1031,6 +1041,11 @@ pub(crate) struct Info { rx1_interrupt: crate::interrupt::Interrupt, sce_interrupt: crate::interrupt::Interrupt, tx_waker: fn(), + + /// The total number of filter banks available to the instance. + /// + /// This is usually either 14 or 28, and should be specified in the chip's reference manual or datasheet. + num_filter_banks: u8, } trait SealedInstance { @@ -1095,6 +1110,7 @@ foreach_peripheral!( rx1_interrupt: crate::_generated::peripheral_interrupts::$inst::RX1::IRQ, sce_interrupt: crate::_generated::peripheral_interrupts::$inst::SCE::IRQ, tx_waker: crate::_generated::peripheral_interrupts::$inst::TX::pend, + num_filter_banks: peripherals::$inst::NUM_FILTER_BANKS, }; &INFO } @@ -1148,6 +1164,11 @@ foreach_peripheral!( } } }; + (can, CAN2) => { + unsafe impl FilterOwner for peripherals::CAN2 { + const NUM_FILTER_BANKS: u8 = 0; + } + }; (can, CAN3) => { unsafe impl FilterOwner for peripherals::CAN3 { const NUM_FILTER_BANKS: u8 = 14; diff --git a/embassy-stm32/src/can/bxcan/registers.rs b/embassy-stm32/src/can/bxcan/registers.rs index e7c7525d8..5f3d70e25 100644 --- a/embassy-stm32/src/can/bxcan/registers.rs +++ b/embassy-stm32/src/can/bxcan/registers.rs @@ -11,7 +11,7 @@ use crate::can::frame::{Envelope, Frame, Header}; pub(crate) struct Registers(pub crate::pac::can::Can); impl Registers { - pub fn enter_init_mode(&mut self) { + pub fn enter_init_mode(&self) { self.0.mcr().modify(|reg| { reg.set_sleep(false); reg.set_inrq(true); @@ -25,7 +25,7 @@ impl Registers { } // Leaves initialization mode, enters sleep mode. - pub fn leave_init_mode(&mut self) { + pub fn leave_init_mode(&self) { self.0.mcr().modify(|reg| { reg.set_sleep(true); reg.set_inrq(false); @@ -38,7 +38,7 @@ impl Registers { } } - pub fn set_bit_timing(&mut self, bt: crate::can::util::NominalBitTiming) { + pub fn set_bit_timing(&self, bt: crate::can::util::NominalBitTiming) { let prescaler = u16::from(bt.prescaler) & 0x1FF; let seg1 = u8::from(bt.seg1); let seg2 = u8::from(bt.seg2) & 0x7F; @@ -84,7 +84,7 @@ impl Registers { /// receive the frame. If enabled, [`Interrupt::Wakeup`] will also be triggered by the incoming /// frame. #[allow(dead_code)] - pub fn set_automatic_wakeup(&mut self, enabled: bool) { + pub fn set_automatic_wakeup(&self, enabled: bool) { self.0.mcr().modify(|reg| reg.set_awum(enabled)); } @@ -96,7 +96,7 @@ impl Registers { /// If this returns [`WouldBlock`][nb::Error::WouldBlock], the peripheral will enable itself /// in the background. The peripheral is enabled and ready to use when this method returns /// successfully. - pub fn enable_non_blocking(&mut self) -> nb::Result<(), Infallible> { + pub fn enable_non_blocking(&self) -> nb::Result<(), Infallible> { let msr = self.0.msr().read(); if msr.slak() { self.0.mcr().modify(|reg| { @@ -186,7 +186,7 @@ impl Registers { /// If this is enabled, mailboxes are scheduled based on the time when the transmit request bit of the mailbox was set. /// /// If this is disabled, mailboxes are scheduled based on the priority of the frame in the mailbox. - pub fn set_tx_fifo_scheduling(&mut self, enabled: bool) { + pub fn set_tx_fifo_scheduling(&self, enabled: bool) { self.0.mcr().modify(|w| w.set_txfp(enabled)) } diff --git a/tests/stm32/src/bin/can.rs b/tests/stm32/src/bin/can.rs index f63076512..ba8a33e34 100644 --- a/tests/stm32/src/bin/can.rs +++ b/tests/stm32/src/bin/can.rs @@ -18,10 +18,6 @@ use {defmt_rtt as _, panic_probe as _}; mod can_common; use can_common::*; -type Can<'d> = embassy_stm32::can::Can<'d, embassy_stm32::peripherals::CAN1>; -type CanTx<'d> = embassy_stm32::can::CanTx<'d>; -type CanRx<'d> = embassy_stm32::can::CanRx<'d>; - bind_interrupts!(struct Irqs { CAN1_RX0 => Rx0InterruptHandler; CAN1_RX1 => Rx1InterruptHandler; @@ -50,7 +46,7 @@ async fn main(_spawner: Spawner) { let rx_pin = Input::new(&mut rx, Pull::Up); core::mem::forget(rx_pin); - let mut can = Can::new(can, rx, tx, Irqs); + let mut can = embassy_stm32::can::Can::new(can, rx, tx, Irqs); info!("Configuring can..."); diff --git a/tests/stm32/src/bin/can_common.rs b/tests/stm32/src/bin/can_common.rs index fbfbcdc21..4e1740ad5 100644 --- a/tests/stm32/src/bin/can_common.rs +++ b/tests/stm32/src/bin/can_common.rs @@ -8,7 +8,7 @@ pub struct TestOptions { pub max_buffered: u8, } -pub async fn run_can_tests<'d>(can: &mut crate::Can<'d>, options: &TestOptions) { +pub async fn run_can_tests<'d>(can: &mut can::Can<'d>, options: &TestOptions) { //pub async fn run_can_tests<'d, T: can::Instance>(can: &mut can::Can<'d, T>, options: &TestOptions) { let mut i: u8 = 0; loop { @@ -80,7 +80,7 @@ pub async fn run_can_tests<'d>(can: &mut crate::Can<'d>, options: &TestOptions) } } -pub async fn run_split_can_tests<'d>(tx: &mut crate::CanTx<'d>, rx: &mut crate::CanRx<'d>, options: &TestOptions) { +pub async fn run_split_can_tests<'d>(tx: &mut can::CanTx<'d>, rx: &mut can::CanRx<'d>, options: &TestOptions) { for i in 0..options.max_buffered { // Try filling up the RX FIFO0 buffers //let tx_frame = if 0 != (i & 0x01) { diff --git a/tests/stm32/src/bin/fdcan.rs b/tests/stm32/src/bin/fdcan.rs index 8a397f661..bc2b7edd4 100644 --- a/tests/stm32/src/bin/fdcan.rs +++ b/tests/stm32/src/bin/fdcan.rs @@ -15,10 +15,6 @@ use {defmt_rtt as _, panic_probe as _}; mod can_common; use can_common::*; -type Can<'d> = can::Can<'d>; -type CanTx<'d> = can::CanTx<'d>; -type CanRx<'d> = can::CanRx<'d>; - bind_interrupts!(struct Irqs2 { FDCAN2_IT0 => can::IT0InterruptHandler; FDCAN2_IT1 => can::IT1InterruptHandler; From 58ef2594e511bd5147aae504b8ff723152ab1d1b Mon Sep 17 00:00:00 2001 From: Corey Schuhen Date: Sun, 2 Jun 2024 20:16:57 +1000 Subject: [PATCH 450/581] Fix F7 example. --- examples/stm32f7/src/bin/can.rs | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/examples/stm32f7/src/bin/can.rs b/examples/stm32f7/src/bin/can.rs index f4d6d8c19..a82e335a9 100644 --- a/examples/stm32f7/src/bin/can.rs +++ b/examples/stm32f7/src/bin/can.rs @@ -45,7 +45,7 @@ async fn main(spawner: Spawner) { let rx_pin = Input::new(&mut p.PA15, Pull::Up); core::mem::forget(rx_pin); - static CAN: StaticCell> = StaticCell::new(); + static CAN: StaticCell> = StaticCell::new(); let can = CAN.init(Can::new(p.CAN3, p.PA8, p.PA15, Irqs)); can.modify_filters().enable_bank(0, Fifo::Fifo0, Mask32::accept_all()); From 900b1048606989bd3c8aba69b1488611d15ed64d Mon Sep 17 00:00:00 2001 From: Corey Schuhen Date: Sun, 2 Jun 2024 21:45:35 +1000 Subject: [PATCH 451/581] Remove generic argument from CanBuilder. --- embassy-stm32/src/can/fd/peripheral.rs | 53 +++++++++++++------------- embassy-stm32/src/can/fdcan.rs | 50 ++++++++++-------------- 2 files changed, 46 insertions(+), 57 deletions(-) diff --git a/embassy-stm32/src/can/fd/peripheral.rs b/embassy-stm32/src/can/fd/peripheral.rs index 7321ab230..07e3dddad 100644 --- a/embassy-stm32/src/can/fd/peripheral.rs +++ b/embassy-stm32/src/can/fd/peripheral.rs @@ -73,7 +73,6 @@ impl Registers { pub fn put_tx_frame(&self, bufidx: usize, header: &Header, buffer: &[u8]) { let mailbox = self.tx_buffer_element(bufidx); - mailbox.reset(); put_tx_header(mailbox, header); put_tx_data(mailbox, &buffer[..header.len() as usize]); @@ -245,12 +244,12 @@ impl Registers { } #[inline] - fn reset_msg_ram(&mut self) { + fn reset_msg_ram(&self) { self.msg_ram_mut().reset(); } #[inline] - fn enter_init_mode(&mut self) { + fn enter_init_mode(&self) { self.regs.cccr().modify(|w| w.set_init(true)); while false == self.regs.cccr().read().init() {} self.regs.cccr().modify(|w| w.set_cce(true)); @@ -259,7 +258,7 @@ impl Registers { /// Enables or disables loopback mode: Internally connects the TX and RX /// signals together. #[inline] - fn set_loopback_mode(&mut self, mode: LoopbackMode) { + fn set_loopback_mode(&self, mode: LoopbackMode) { let (test, mon, lbck) = match mode { LoopbackMode::None => (false, false, false), LoopbackMode::Internal => (true, true, true), @@ -274,34 +273,34 @@ impl Registers { /// Enables or disables silent mode: Disconnects the TX signal from the pin. #[inline] - fn set_bus_monitoring_mode(&mut self, enabled: bool) { + fn set_bus_monitoring_mode(&self, enabled: bool) { self.regs.cccr().modify(|w| w.set_mon(enabled)); } #[inline] - fn set_restricted_operations(&mut self, enabled: bool) { + fn set_restricted_operations(&self, enabled: bool) { self.regs.cccr().modify(|w| w.set_asm(enabled)); } #[inline] - fn set_normal_operations(&mut self, _enabled: bool) { + fn set_normal_operations(&self, _enabled: bool) { self.set_loopback_mode(LoopbackMode::None); } #[inline] - fn set_test_mode(&mut self, enabled: bool) { + fn set_test_mode(&self, enabled: bool) { self.regs.cccr().modify(|w| w.set_test(enabled)); } #[inline] - fn set_power_down_mode(&mut self, enabled: bool) { + fn set_power_down_mode(&self, enabled: bool) { self.regs.cccr().modify(|w| w.set_csr(enabled)); while self.regs.cccr().read().csa() != enabled {} } /// Moves out of PoweredDownMode and into ConfigMode #[inline] - pub fn into_config_mode(mut self, _config: FdCanConfig) { + pub fn into_config_mode(self, _config: FdCanConfig) { self.set_power_down_mode(false); self.enter_init_mode(); self.reset_msg_ram(); @@ -328,7 +327,7 @@ impl Registers { /// Applies the settings of a new FdCanConfig See [`FdCanConfig`] #[inline] - pub fn apply_config(&mut self, config: FdCanConfig) { + pub fn apply_config(&self, config: FdCanConfig) { self.set_tx_buffer_mode(config.tx_buffer_mode); // set standard filters list size to 28 @@ -389,7 +388,7 @@ impl Registers { } #[inline] - fn leave_init_mode(&mut self, config: FdCanConfig) { + fn leave_init_mode(&self, config: FdCanConfig) { self.apply_config(config); self.regs.cccr().modify(|w| w.set_cce(false)); @@ -399,7 +398,7 @@ impl Registers { /// Moves out of ConfigMode and into specified mode #[inline] - pub fn into_mode(mut self, config: FdCanConfig, mode: crate::can::_version::OperatingMode) { + pub fn into_mode(&self, config: FdCanConfig, mode: crate::can::_version::OperatingMode) { match mode { crate::can::OperatingMode::InternalLoopbackMode => self.set_loopback_mode(LoopbackMode::Internal), crate::can::OperatingMode::ExternalLoopbackMode => self.set_loopback_mode(LoopbackMode::External), @@ -423,7 +422,7 @@ impl Registers { /// Then copy the `CAN_BUS_TIME` register value from the table and pass it as the `btr` /// parameter to this method. #[inline] - pub fn set_nominal_bit_timing(&mut self, btr: NominalBitTiming) { + pub fn set_nominal_bit_timing(&self, btr: NominalBitTiming) { self.regs.nbtp().write(|w| { w.set_nbrp(btr.nbrp() - 1); w.set_ntseg1(btr.ntseg1() - 1); @@ -435,7 +434,7 @@ impl Registers { /// Configures the data bit timings for the FdCan Variable Bitrates. /// This is not used when frame_transmit is set to anything other than AllowFdCanAndBRS. #[inline] - pub fn set_data_bit_timing(&mut self, btr: DataBitTiming) { + pub fn set_data_bit_timing(&self, btr: DataBitTiming) { self.regs.dbtp().write(|w| { w.set_dbrp(btr.dbrp() - 1); w.set_dtseg1(btr.dtseg1() - 1); @@ -451,39 +450,39 @@ impl Registers { /// /// Automatic retransmission is enabled by default. #[inline] - pub fn set_automatic_retransmit(&mut self, enabled: bool) { + pub fn set_automatic_retransmit(&self, enabled: bool) { self.regs.cccr().modify(|w| w.set_dar(!enabled)); } /// Configures the transmit pause feature. See /// [`FdCanConfig::set_transmit_pause`] #[inline] - pub fn set_transmit_pause(&mut self, enabled: bool) { + pub fn set_transmit_pause(&self, enabled: bool) { self.regs.cccr().modify(|w| w.set_txp(!enabled)); } /// Configures non-iso mode. See [`FdCanConfig::set_non_iso_mode`] #[inline] - pub fn set_non_iso_mode(&mut self, enabled: bool) { + pub fn set_non_iso_mode(&self, enabled: bool) { self.regs.cccr().modify(|w| w.set_niso(enabled)); } /// Configures edge filtering. See [`FdCanConfig::set_edge_filtering`] #[inline] - pub fn set_edge_filtering(&mut self, enabled: bool) { + pub fn set_edge_filtering(&self, enabled: bool) { self.regs.cccr().modify(|w| w.set_efbi(enabled)); } /// Configures TX Buffer Mode #[inline] - pub fn set_tx_buffer_mode(&mut self, tbm: TxBufferMode) { + pub fn set_tx_buffer_mode(&self, tbm: TxBufferMode) { self.regs.txbc().write(|w| w.set_tfqm(tbm.into())); } /// Configures frame transmission mode. See /// [`FdCanConfig::set_frame_transmit`] #[inline] - pub fn set_frame_transmit(&mut self, fts: FrameTransmissionConfig) { + pub fn set_frame_transmit(&self, fts: FrameTransmissionConfig) { let (fdoe, brse) = match fts { FrameTransmissionConfig::ClassicCanOnly => (false, false), FrameTransmissionConfig::AllowFdCan => (true, false), @@ -501,14 +500,14 @@ impl Registers { /// Sets the protocol exception handling on/off #[inline] - pub fn set_protocol_exception_handling(&mut self, enabled: bool) { + pub fn set_protocol_exception_handling(&self, enabled: bool) { self.regs.cccr().modify(|w| w.set_pxhd(!enabled)); } /// Configures and resets the timestamp counter #[inline] #[allow(unused)] - pub fn set_timestamp_counter_source(&mut self, select: TimestampSource) { + pub fn set_timestamp_counter_source(&self, select: TimestampSource) { #[cfg(can_fdcan_h7)] let (tcp, tss) = match select { TimestampSource::None => (0, 0), @@ -532,7 +531,7 @@ impl Registers { #[cfg(not(can_fdcan_h7))] /// Configures the global filter settings #[inline] - pub fn set_global_filter(&mut self, filter: GlobalFilter) { + pub fn set_global_filter(&self, filter: GlobalFilter) { let anfs = match filter.handle_standard_frames { crate::can::fd::config::NonMatchingFilter::IntoRxFifo0 => stm32_metapac::can::vals::Anfs::ACCEPT_FIFO_0, crate::can::fd::config::NonMatchingFilter::IntoRxFifo1 => stm32_metapac::can::vals::Anfs::ACCEPT_FIFO_1, @@ -555,7 +554,7 @@ impl Registers { #[cfg(can_fdcan_h7)] /// Configures the global filter settings #[inline] - pub fn set_global_filter(&mut self, filter: GlobalFilter) { + pub fn set_global_filter(&self, filter: GlobalFilter) { let anfs = match filter.handle_standard_frames { crate::can::fd::config::NonMatchingFilter::IntoRxFifo0 => 0, crate::can::fd::config::NonMatchingFilter::IntoRxFifo1 => 1, @@ -577,10 +576,10 @@ impl Registers { } #[cfg(not(can_fdcan_h7))] - fn configure_msg_ram(&mut self) {} + fn configure_msg_ram(&self) {} #[cfg(can_fdcan_h7)] - fn configure_msg_ram(&mut self) { + fn configure_msg_ram(&self) { let r = self.regs; use crate::can::fd::message_ram::*; diff --git a/embassy-stm32/src/can/fdcan.rs b/embassy-stm32/src/can/fdcan.rs index a838d0412..f3ad718ae 100644 --- a/embassy-stm32/src/can/fdcan.rs +++ b/embassy-stm32/src/can/fdcan.rs @@ -141,13 +141,16 @@ pub enum OperatingMode { //TestMode, } -fn calc_ns_per_timer_tick(mode: crate::can::fd::config::FrameTransmissionConfig) -> u64 { +fn calc_ns_per_timer_tick( + info: &'static Info, + freq: crate::time::Hertz, + mode: crate::can::fd::config::FrameTransmissionConfig, +) -> u64 { match mode { // Use timestamp from Rx FIFO to adjust timestamp reported to user crate::can::fd::config::FrameTransmissionConfig::ClassicCanOnly => { - let freq = T::frequency(); - let prescale: u64 = ({ T::registers().regs.nbtp().read().nbrp() } + 1) as u64 - * ({ T::registers().regs.tscc().read().tcp() } + 1) as u64; + let prescale: u64 = ({ info.regs.regs.nbtp().read().nbrp() } + 1) as u64 + * ({ info.regs.regs.tscc().read().tcp() } + 1) as u64; 1_000_000_000 as u64 / (freq.0 as u64 * prescale) } // For VBR this is too hard because the FDCAN timer switches clock rate you need to configure to use @@ -158,28 +161,28 @@ fn calc_ns_per_timer_tick(mode: crate::can::fd::config::FrameTransm /// FDCAN Configuration instance instance /// Create instance of this first -pub struct CanConfigurator<'d, T: Instance> { +pub struct CanConfigurator<'d> { + _phantom: PhantomData<&'d ()>, config: crate::can::fd::config::FdCanConfig, info: &'static Info, state: &'static State, /// Reference to internals. - _instance: FdcanInstance<'d, T>, properties: Properties, periph_clock: crate::time::Hertz, } -impl<'d, T: Instance> CanConfigurator<'d, T> { +impl<'d> CanConfigurator<'d> { /// Creates a new Fdcan instance, keeping the peripheral in sleep mode. /// You must call [Fdcan::enable_non_blocking] to use the peripheral. - pub fn new( - peri: impl Peripheral

+ 'd, + pub fn new( + _peri: impl Peripheral

+ 'd, rx: impl Peripheral

> + 'd, tx: impl Peripheral

> + 'd, _irqs: impl interrupt::typelevel::Binding> + interrupt::typelevel::Binding> + 'd, - ) -> CanConfigurator<'d, T> { - into_ref!(peri, rx, tx); + ) -> CanConfigurator<'d> { + into_ref!(_peri, rx, tx); rx.set_as_af(rx.af_num(), AFType::Input); tx.set_as_af(tx.af_num(), AFType::OutputPushPull); @@ -201,10 +204,10 @@ impl<'d, T: Instance> CanConfigurator<'d, T> { T::IT1Interrupt::enable(); } Self { + _phantom: PhantomData, config, info: T::info(), state: T::state(), - _instance: FdcanInstance(peri), properties: Properties::new(T::info()), periph_clock: T::frequency(), } @@ -255,7 +258,7 @@ impl<'d, T: Instance> CanConfigurator<'d, T> { /// Start in mode. pub fn start(self, mode: OperatingMode) -> Can<'d> { - let ns_per_timer_tick = calc_ns_per_timer_tick::(self.config.frame_transmit); + let ns_per_timer_tick = calc_ns_per_timer_tick(self.info, self.periph_clock, self.config.frame_transmit); critical_section::with(|_| { let state = self.state as *const State; unsafe { @@ -263,15 +266,14 @@ impl<'d, T: Instance> CanConfigurator<'d, T> { (*mut_state).ns_per_timer_tick = ns_per_timer_tick; } }); - T::registers().into_mode(self.config, mode); + self.info.regs.into_mode(self.config, mode); Can { _phantom: PhantomData, config: self.config, info: self.info, state: self.state, - instance: T::info().regs.regs, _mode: mode, - properties: Properties::new(T::info()), + properties: Properties::new(self.info), } } @@ -297,7 +299,6 @@ pub struct Can<'d> { config: crate::can::fd::config::FdCanConfig, info: &'static Info, state: &'static State, - instance: crate::pac::can::Fdcan, _mode: OperatingMode, properties: Properties, } @@ -360,14 +361,12 @@ impl<'d> Can<'d> { info: self.info, state: self.state, config: self.config, - _instance: self.instance, _mode: self._mode, }, CanRx { _phantom: PhantomData, info: self.info, state: self.state, - _instance: self.instance, _mode: self._mode, }, self.properties, @@ -380,7 +379,6 @@ impl<'d> Can<'d> { config: tx.config, info: tx.info, state: tx.state, - instance: tx._instance, _mode: rx._mode, properties: Properties::new(tx.info), } @@ -392,7 +390,7 @@ impl<'d> Can<'d> { tx_buf: &'static mut TxBuf, rxb: &'static mut RxBuf, ) -> BufferedCan<'d, TX_BUF_SIZE, RX_BUF_SIZE> { - BufferedCan::new(self.info, self.state, self.info.regs.regs, self._mode, tx_buf, rxb) + BufferedCan::new(self.info, self.state, self._mode, tx_buf, rxb) } /// Return a buffered instance of driver with CAN FD support. User must supply Buffers @@ -401,7 +399,7 @@ impl<'d> Can<'d> { tx_buf: &'static mut TxFdBuf, rxb: &'static mut RxFdBuf, ) -> BufferedCanFd<'d, TX_BUF_SIZE, RX_BUF_SIZE> { - BufferedCanFd::new(self.info, self.state, self.info.regs.regs, self._mode, tx_buf, rxb) + BufferedCanFd::new(self.info, self.state, self._mode, tx_buf, rxb) } } @@ -416,7 +414,6 @@ pub struct BufferedCan<'d, const TX_BUF_SIZE: usize, const RX_BUF_SIZE: usize> { _phantom: PhantomData<&'d ()>, info: &'static Info, state: &'static State, - _instance: crate::pac::can::Fdcan, _mode: OperatingMode, tx_buf: &'static TxBuf, rx_buf: &'static RxBuf, @@ -427,7 +424,6 @@ impl<'c, 'd, const TX_BUF_SIZE: usize, const RX_BUF_SIZE: usize> BufferedCan<'d, fn new( info: &'static Info, state: &'static State, - _instance: crate::pac::can::Fdcan, _mode: OperatingMode, tx_buf: &'static TxBuf, rx_buf: &'static RxBuf, @@ -436,7 +432,6 @@ impl<'c, 'd, const TX_BUF_SIZE: usize, const RX_BUF_SIZE: usize> BufferedCan<'d, _phantom: PhantomData, info, state, - _instance, _mode, tx_buf, rx_buf, @@ -549,7 +544,6 @@ pub struct BufferedCanFd<'d, const TX_BUF_SIZE: usize, const RX_BUF_SIZE: usize> _phantom: PhantomData<&'d ()>, info: &'static Info, state: &'static State, - _instance: crate::pac::can::Fdcan, _mode: OperatingMode, tx_buf: &'static TxFdBuf, rx_buf: &'static RxFdBuf, @@ -560,7 +554,6 @@ impl<'c, 'd, const TX_BUF_SIZE: usize, const RX_BUF_SIZE: usize> BufferedCanFd<' fn new( info: &'static Info, state: &'static State, - _instance: crate::pac::can::Fdcan, _mode: OperatingMode, tx_buf: &'static TxFdBuf, rx_buf: &'static RxFdBuf, @@ -569,7 +562,6 @@ impl<'c, 'd, const TX_BUF_SIZE: usize, const RX_BUF_SIZE: usize> BufferedCanFd<' _phantom: PhantomData, info, state, - _instance, _mode, tx_buf, rx_buf, @@ -646,7 +638,6 @@ pub struct CanRx<'d> { _phantom: PhantomData<&'d ()>, info: &'static Info, state: &'static State, - _instance: crate::pac::can::Fdcan, _mode: OperatingMode, } @@ -668,7 +659,6 @@ pub struct CanTx<'d> { info: &'static Info, state: &'static State, config: crate::can::fd::config::FdCanConfig, - _instance: crate::pac::can::Fdcan, _mode: OperatingMode, } From 348c87fc2fb640e5a27bb85dd9a8edd0c8ff3b0e Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Mon, 3 Jun 2024 00:57:53 +0200 Subject: [PATCH 452/581] stm32/spi: fix blocking_write on nosck spi. Fixes #2902. --- embassy-stm32/src/spi/mod.rs | 66 +++++++++++++++++++++++++++++----- tests/stm32/src/bin/spi.rs | 18 +++------- tests/stm32/src/bin/spi_dma.rs | 23 ++++++------ 3 files changed, 72 insertions(+), 35 deletions(-) diff --git a/embassy-stm32/src/spi/mod.rs b/embassy-stm32/src/spi/mod.rs index 5d6277c33..720e80e0d 100644 --- a/embassy-stm32/src/spi/mod.rs +++ b/embassy-stm32/src/spi/mod.rs @@ -351,17 +351,46 @@ impl<'d, M: PeriMode> Spi<'d, M> { /// Blocking write. pub fn blocking_write(&mut self, words: &[W]) -> Result<(), Error> { + // needed in v3+ to avoid overrun causing the SPI RX state machine to get stuck...? + #[cfg(any(spi_v3, spi_v4, spi_v5))] + self.info.regs.cr1().modify(|w| w.set_spe(false)); self.info.regs.cr1().modify(|w| w.set_spe(true)); flush_rx_fifo(self.info.regs); self.set_word_size(W::CONFIG); for word in words.iter() { - let _ = transfer_word(self.info.regs, *word)?; + // this cannot use `transfer_word` because on SPIv2 and higher, + // the SPI RX state machine hangs if no physical pin is connected to the SCK AF. + // This is the case when the SPI has been created with `new_(blocking_?)txonly_nosck`. + // See https://github.com/embassy-rs/embassy/issues/2902 + // This is not documented as an errata by ST, and I've been unable to find anything online... + #[cfg(not(any(spi_v1, spi_f1)))] + write_word(self.info.regs, *word)?; + + // if we're doing tx only, after writing the last byte to FIFO we have to wait + // until it's actually sent. On SPIv1 you're supposed to use the BSY flag for this + // but apparently it's broken, it clears too soon. Workaround is to wait for RXNE: + // when it gets set you know the transfer is done, even if you don't care about rx. + // Luckily this doesn't affect SPIv2+. + // See http://efton.sk/STM32/gotcha/g68.html + // ST doesn't seem to document this in errata sheets (?) + #[cfg(any(spi_v1, spi_f1))] + transfer_word(self.info.regs, *word)?; } + + // wait until last word is transmitted. (except on v1, see above) + #[cfg(not(any(spi_v1, spi_f1, spi_v2)))] + while !self.info.regs.sr().read().txc() {} + #[cfg(spi_v2)] + while self.info.regs.sr().read().bsy() {} + Ok(()) } /// Blocking read. pub fn blocking_read(&mut self, words: &mut [W]) -> Result<(), Error> { + // needed in v3+ to avoid overrun causing the SPI RX state machine to get stuck...? + #[cfg(any(spi_v3, spi_v4, spi_v5))] + self.info.regs.cr1().modify(|w| w.set_spe(false)); self.info.regs.cr1().modify(|w| w.set_spe(true)); flush_rx_fifo(self.info.regs); self.set_word_size(W::CONFIG); @@ -375,6 +404,9 @@ impl<'d, M: PeriMode> Spi<'d, M> { /// /// This writes the contents of `data` on MOSI, and puts the received data on MISO in `data`, at the same time. pub fn blocking_transfer_in_place(&mut self, words: &mut [W]) -> Result<(), Error> { + // needed in v3+ to avoid overrun causing the SPI RX state machine to get stuck...? + #[cfg(any(spi_v3, spi_v4, spi_v5))] + self.info.regs.cr1().modify(|w| w.set_spe(false)); self.info.regs.cr1().modify(|w| w.set_spe(true)); flush_rx_fifo(self.info.regs); self.set_word_size(W::CONFIG); @@ -391,6 +423,9 @@ impl<'d, M: PeriMode> Spi<'d, M> { /// The transfer runs for `max(read.len(), write.len())` bytes. If `read` is shorter extra bytes are ignored. /// If `write` is shorter it is padded with zero bytes. pub fn blocking_transfer(&mut self, read: &mut [W], write: &[W]) -> Result<(), Error> { + // needed in v3+ to avoid overrun causing the SPI RX state machine to get stuck...? + #[cfg(any(spi_v3, spi_v4, spi_v5))] + self.info.regs.cr1().modify(|w| w.set_spe(false)); self.info.regs.cr1().modify(|w| w.set_spe(true)); flush_rx_fifo(self.info.regs); self.set_word_size(W::CONFIG); @@ -465,7 +500,6 @@ impl<'d> Spi<'d, Blocking> { /// Create a new SPI driver, in TX-only mode, without SCK pin. /// /// This can be useful for bit-banging non-SPI protocols. - #[cfg(any(spi_v1, spi_f1))] // no SCK pin causes it to hang on spiv2+ for unknown reasons. pub fn new_blocking_txonly_nosck( peri: impl Peripheral

+ 'd, mosi: impl Peripheral

> + 'd, @@ -550,7 +584,6 @@ impl<'d> Spi<'d, Async> { /// Create a new SPI driver, in TX-only mode, without SCK pin. /// /// This can be useful for bit-banging non-SPI protocols. - #[cfg(any(spi_v1, spi_f1))] // no SCK pin causes it to hang on spiv2+ for unknown reasons. pub fn new_txonly_nosck( peri: impl Peripheral

+ 'd, mosi: impl Peripheral

> + 'd, @@ -900,8 +933,8 @@ impl RegsExt for Regs { } } -fn check_error_flags(sr: regs::Sr) -> Result<(), Error> { - if sr.ovr() { +fn check_error_flags(sr: regs::Sr, ovr: bool) -> Result<(), Error> { + if sr.ovr() && ovr { return Err(Error::Overrun); } #[cfg(not(any(spi_f1, spi_v3, spi_v4, spi_v5)))] @@ -927,11 +960,11 @@ fn check_error_flags(sr: regs::Sr) -> Result<(), Error> { Ok(()) } -fn spin_until_tx_ready(regs: Regs) -> Result<(), Error> { +fn spin_until_tx_ready(regs: Regs, ovr: bool) -> Result<(), Error> { loop { let sr = regs.sr().read(); - check_error_flags(sr)?; + check_error_flags(sr, ovr)?; #[cfg(not(any(spi_v3, spi_v4, spi_v5)))] if sr.txe() { @@ -948,7 +981,7 @@ fn spin_until_rx_ready(regs: Regs) -> Result<(), Error> { loop { let sr = regs.sr().read(); - check_error_flags(sr)?; + check_error_flags(sr, true)?; #[cfg(not(any(spi_v3, spi_v4, spi_v5)))] if sr.rxne() { @@ -1032,7 +1065,7 @@ fn finish_dma(regs: Regs) { } fn transfer_word(regs: Regs, tx_word: W) -> Result { - spin_until_tx_ready(regs)?; + spin_until_tx_ready(regs, true)?; unsafe { ptr::write_volatile(regs.tx_ptr(), tx_word); @@ -1047,6 +1080,21 @@ fn transfer_word(regs: Regs, tx_word: W) -> Result { Ok(rx_word) } +#[allow(unused)] // unused in SPIv1 +fn write_word(regs: Regs, tx_word: W) -> Result<(), Error> { + // for write, we intentionally ignore the rx fifo, which will cause + // overrun errors that we have to ignore. + spin_until_tx_ready(regs, false)?; + + unsafe { + ptr::write_volatile(regs.tx_ptr(), tx_word); + + #[cfg(any(spi_v3, spi_v4, spi_v5))] + regs.cr1().modify(|reg| reg.set_cstart(true)); + } + Ok(()) +} + // Note: It is not possible to impl these traits generically in embedded-hal 0.2 due to a conflict with // some marker traits. For details, see https://github.com/rust-embedded/embedded-hal/pull/289 macro_rules! impl_blocking { diff --git a/tests/stm32/src/bin/spi.rs b/tests/stm32/src/bin/spi.rs index 8be3b1a7c..0ffd0f653 100644 --- a/tests/stm32/src/bin/spi.rs +++ b/tests/stm32/src/bin/spi.rs @@ -94,19 +94,11 @@ async fn main(_spawner: Spawner) { drop(spi); // Test tx-only nosck. - #[cfg(feature = "spi-v1")] - { - let mut spi = Spi::new_blocking_txonly_nosck(&mut spi_peri, &mut mosi, spi_config); - spi.blocking_transfer(&mut buf, &data).unwrap(); - spi.blocking_transfer_in_place(&mut buf).unwrap(); - spi.blocking_write(&buf).unwrap(); - spi.blocking_read(&mut buf).unwrap(); - spi.blocking_transfer::(&mut [], &[]).unwrap(); - spi.blocking_transfer_in_place::(&mut []).unwrap(); - spi.blocking_read::(&mut []).unwrap(); - spi.blocking_write::(&[]).unwrap(); - drop(spi); - } + let mut spi = Spi::new_blocking_txonly_nosck(&mut spi_peri, &mut mosi, spi_config); + spi.blocking_write(&buf).unwrap(); + spi.blocking_write::(&[]).unwrap(); + spi.blocking_write(&buf).unwrap(); + drop(spi); info!("Test OK"); cortex_m::asm::bkpt(); diff --git a/tests/stm32/src/bin/spi_dma.rs b/tests/stm32/src/bin/spi_dma.rs index a8001a111..fd26d3f71 100644 --- a/tests/stm32/src/bin/spi_dma.rs +++ b/tests/stm32/src/bin/spi_dma.rs @@ -132,19 +132,16 @@ async fn main(_spawner: Spawner) { drop(spi); // Test tx-only nosck. - #[cfg(feature = "spi-v1")] - { - let mut spi = Spi::new_txonly_nosck(&mut spi_peri, &mut mosi, &mut tx_dma, spi_config); - spi.blocking_write(&buf).unwrap(); - spi.write(&buf).await.unwrap(); - spi.blocking_write(&buf).unwrap(); - spi.blocking_write(&buf).unwrap(); - spi.write(&buf).await.unwrap(); - spi.write(&buf).await.unwrap(); - spi.write::(&[]).await.unwrap(); - spi.blocking_write::(&[]).unwrap(); - drop(spi); - } + let mut spi = Spi::new_txonly_nosck(&mut spi_peri, &mut mosi, &mut tx_dma, spi_config); + spi.blocking_write(&buf).unwrap(); + spi.write(&buf).await.unwrap(); + spi.blocking_write(&buf).unwrap(); + spi.blocking_write(&buf).unwrap(); + spi.write(&buf).await.unwrap(); + spi.write(&buf).await.unwrap(); + spi.write::(&[]).await.unwrap(); + spi.blocking_write::(&[]).unwrap(); + drop(spi); info!("Test OK"); cortex_m::asm::bkpt(); From d2045be9f322be29fc3ac3240e11dd4a6b34e784 Mon Sep 17 00:00:00 2001 From: Ulf Lilleengen Date: Mon, 3 Jun 2024 08:45:05 +0200 Subject: [PATCH 453/581] fix broken links to embassy book --- docs/pages/faq.adoc | 2 +- docs/pages/getting_started.adoc | 2 +- embassy-boot/README.md | 2 +- examples/stm32f4/src/bin/usb_ethernet.rs | 2 +- examples/stm32f4/src/bin/usb_hid_keyboard.rs | 2 +- examples/stm32f4/src/bin/usb_hid_mouse.rs | 2 +- examples/stm32f4/src/bin/usb_raw.rs | 2 +- examples/stm32f4/src/bin/usb_serial.rs | 2 +- examples/stm32f7/src/bin/usb_serial.rs | 2 +- examples/stm32h7/src/bin/usb_serial.rs | 2 +- examples/stm32l4/src/bin/usb_serial.rs | 2 +- 11 files changed, 11 insertions(+), 11 deletions(-) diff --git a/docs/pages/faq.adoc b/docs/pages/faq.adoc index bb088dfb6..a2f56a539 100644 --- a/docs/pages/faq.adoc +++ b/docs/pages/faq.adoc @@ -299,7 +299,7 @@ You can add a section to your `Cargo.toml` file like this, you'll need to patch Using `patch` will replace all direct AND indirect dependencies. -See the link:https://embassy.dev/book/dev/new_project.html#_cargo_toml[new project docs] for more details on this approach. +See the link:https://embassy.dev/book/#_starting_a_new_project[new project docs] for more details on this approach. [source,toml] ---- diff --git a/docs/pages/getting_started.adoc b/docs/pages/getting_started.adoc index 465059922..77275a857 100644 --- a/docs/pages/getting_started.adoc +++ b/docs/pages/getting_started.adoc @@ -131,7 +131,7 @@ If you’re using a raspberry pi pico-w, make sure you’re running `+cargo run If you’re using an rp2040 debug probe (e.g. the pico probe) and are having issues after running `probe-rs info`, unplug and reconnect the probe, letting it power cycle. Running `probe-rs info` is link:https://github.com/probe-rs/probe-rs/issues/1849[known to put the pico probe into an unusable state]. -If you’re still having problems, check the link:https://embassy.dev/book/dev/faq.html[FAQ], or ask for help in the link:https://matrix.to/#/#embassy-rs:matrix.org[Embassy Chat Room]. +If you’re still having problems, check the link:https://embassy.dev/book/#_frequently_asked_questions[FAQ], or ask for help in the link:https://matrix.to/#/#embassy-rs:matrix.org[Embassy Chat Room]. == What's next? diff --git a/embassy-boot/README.md b/embassy-boot/README.md index 812c43524..c893c83e1 100644 --- a/embassy-boot/README.md +++ b/embassy-boot/README.md @@ -24,7 +24,7 @@ For any partition, the following preconditions are required: The linker scripts for the application and bootloader look similar, but the FLASH region must point to the BOOTLOADER partition for the bootloader, and the ACTIVE partition for the application. -For more details on the bootloader, see [the documentation](https://embassy.dev/book/dev/bootloader.html). +For more details on the bootloader, see [the documentation](https://embassy.dev/book/#_bootloader). ## Hardware support diff --git a/examples/stm32f4/src/bin/usb_ethernet.rs b/examples/stm32f4/src/bin/usb_ethernet.rs index 19ae16e8b..b398c35da 100644 --- a/examples/stm32f4/src/bin/usb_ethernet.rs +++ b/examples/stm32f4/src/bin/usb_ethernet.rs @@ -43,7 +43,7 @@ bind_interrupts!(struct Irqs { // If you are trying this and your USB device doesn't connect, the most // common issues are the RCC config and vbus_detection // -// See https://embassy.dev/book/dev/faq.html#_the_usb_examples_are_not_working_on_my_board_is_there_anything_else_i_need_to_configure +// See https://embassy.dev/book/#_the_usb_examples_are_not_working_on_my_board_is_there_anything_else_i_need_to_configure // for more information. #[embassy_executor::main] async fn main(spawner: Spawner) { diff --git a/examples/stm32f4/src/bin/usb_hid_keyboard.rs b/examples/stm32f4/src/bin/usb_hid_keyboard.rs index 537ff63ea..1270995c4 100644 --- a/examples/stm32f4/src/bin/usb_hid_keyboard.rs +++ b/examples/stm32f4/src/bin/usb_hid_keyboard.rs @@ -24,7 +24,7 @@ bind_interrupts!(struct Irqs { // If you are trying this and your USB device doesn't connect, the most // common issues are the RCC config and vbus_detection // -// See https://embassy.dev/book/dev/faq.html#_the_usb_examples_are_not_working_on_my_board_is_there_anything_else_i_need_to_configure +// See https://embassy.dev/book/#_the_usb_examples_are_not_working_on_my_board_is_there_anything_else_i_need_to_configure // for more information. #[embassy_executor::main] async fn main(_spawner: Spawner) { diff --git a/examples/stm32f4/src/bin/usb_hid_mouse.rs b/examples/stm32f4/src/bin/usb_hid_mouse.rs index df4b7426c..45136f965 100644 --- a/examples/stm32f4/src/bin/usb_hid_mouse.rs +++ b/examples/stm32f4/src/bin/usb_hid_mouse.rs @@ -21,7 +21,7 @@ bind_interrupts!(struct Irqs { // If you are trying this and your USB device doesn't connect, the most // common issues are the RCC config and vbus_detection // -// See https://embassy.dev/book/dev/faq.html#_the_usb_examples_are_not_working_on_my_board_is_there_anything_else_i_need_to_configure +// See https://embassy.dev/book/#_the_usb_examples_are_not_working_on_my_board_is_there_anything_else_i_need_to_configure // for more information. #[embassy_executor::main] async fn main(_spawner: Spawner) { diff --git a/examples/stm32f4/src/bin/usb_raw.rs b/examples/stm32f4/src/bin/usb_raw.rs index 1452e7c5f..b2d706208 100644 --- a/examples/stm32f4/src/bin/usb_raw.rs +++ b/examples/stm32f4/src/bin/usb_raw.rs @@ -72,7 +72,7 @@ bind_interrupts!(struct Irqs { // If you are trying this and your USB device doesn't connect, the most // common issues are the RCC config and vbus_detection // -// See https://embassy.dev/book/dev/faq.html#_the_usb_examples_are_not_working_on_my_board_is_there_anything_else_i_need_to_configure +// See https://embassy.dev/book/#_the_usb_examples_are_not_working_on_my_board_is_there_anything_else_i_need_to_configure // for more information. #[embassy_executor::main] async fn main(_spawner: Spawner) { diff --git a/examples/stm32f4/src/bin/usb_serial.rs b/examples/stm32f4/src/bin/usb_serial.rs index b2bd390b6..328b5effe 100644 --- a/examples/stm32f4/src/bin/usb_serial.rs +++ b/examples/stm32f4/src/bin/usb_serial.rs @@ -19,7 +19,7 @@ bind_interrupts!(struct Irqs { // If you are trying this and your USB device doesn't connect, the most // common issues are the RCC config and vbus_detection // -// See https://embassy.dev/book/dev/faq.html#_the_usb_examples_are_not_working_on_my_board_is_there_anything_else_i_need_to_configure +// See https://embassy.dev/book/#_the_usb_examples_are_not_working_on_my_board_is_there_anything_else_i_need_to_configure // for more information. #[embassy_executor::main] async fn main(_spawner: Spawner) { diff --git a/examples/stm32f7/src/bin/usb_serial.rs b/examples/stm32f7/src/bin/usb_serial.rs index 0e5cc7c5c..1906b28ed 100644 --- a/examples/stm32f7/src/bin/usb_serial.rs +++ b/examples/stm32f7/src/bin/usb_serial.rs @@ -19,7 +19,7 @@ bind_interrupts!(struct Irqs { // If you are trying this and your USB device doesn't connect, the most // common issues are the RCC config and vbus_detection // -// See https://embassy.dev/book/dev/faq.html#_the_usb_examples_are_not_working_on_my_board_is_there_anything_else_i_need_to_configure +// See https://embassy.dev/book/#_the_usb_examples_are_not_working_on_my_board_is_there_anything_else_i_need_to_configure // for more information. #[embassy_executor::main] async fn main(_spawner: Spawner) { diff --git a/examples/stm32h7/src/bin/usb_serial.rs b/examples/stm32h7/src/bin/usb_serial.rs index 1c50fc1c8..65ae597d4 100644 --- a/examples/stm32h7/src/bin/usb_serial.rs +++ b/examples/stm32h7/src/bin/usb_serial.rs @@ -18,7 +18,7 @@ bind_interrupts!(struct Irqs { // If you are trying this and your USB device doesn't connect, the most // common issues are the RCC config and vbus_detection // -// See https://embassy.dev/book/dev/faq.html#_the_usb_examples_are_not_working_on_my_board_is_there_anything_else_i_need_to_configure +// See https://embassy.dev/book/#_the_usb_examples_are_not_working_on_my_board_is_there_anything_else_i_need_to_configure // for more information. #[embassy_executor::main] async fn main(_spawner: Spawner) { diff --git a/examples/stm32l4/src/bin/usb_serial.rs b/examples/stm32l4/src/bin/usb_serial.rs index ed9671d0f..c3b1211d8 100644 --- a/examples/stm32l4/src/bin/usb_serial.rs +++ b/examples/stm32l4/src/bin/usb_serial.rs @@ -19,7 +19,7 @@ bind_interrupts!(struct Irqs { // If you are trying this and your USB device doesn't connect, the most // common issues are the RCC config and vbus_detection // -// See https://embassy.dev/book/dev/faq.html#_the_usb_examples_are_not_working_on_my_board_is_there_anything_else_i_need_to_configure +// See https://embassy.dev/book/#_the_usb_examples_are_not_working_on_my_board_is_there_anything_else_i_need_to_configure // for more information. #[embassy_executor::main] async fn main(_spawner: Spawner) { From f3703ff6bfed6f8342b49cfd9a65d543d1c99c27 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Jan=20=C5=A0pa=C4=8Dek?= Date: Mon, 3 Jun 2024 20:12:33 +0200 Subject: [PATCH 454/581] stm32/usart: set refcount even if initialization failed --- embassy-stm32/src/usart/buffered.rs | 2 +- embassy-stm32/src/usart/mod.rs | 6 +++--- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/embassy-stm32/src/usart/buffered.rs b/embassy-stm32/src/usart/buffered.rs index 09d020a7b..fd79e035e 100644 --- a/embassy-stm32/src/usart/buffered.rs +++ b/embassy-stm32/src/usart/buffered.rs @@ -315,6 +315,7 @@ impl<'d> BufferedUart<'d> { ) -> Result<(), ConfigError> { let info = self.rx.info; let state = self.rx.state; + state.tx_rx_refcount.store(2, Ordering::Relaxed); info.rcc.enable_and_reset(); @@ -339,7 +340,6 @@ impl<'d> BufferedUart<'d> { info.interrupt.unpend(); unsafe { info.interrupt.enable() }; - state.tx_rx_refcount.store(2, Ordering::Relaxed); Ok(()) } diff --git a/embassy-stm32/src/usart/mod.rs b/embassy-stm32/src/usart/mod.rs index df5121f67..53321391a 100644 --- a/embassy-stm32/src/usart/mod.rs +++ b/embassy-stm32/src/usart/mod.rs @@ -446,6 +446,7 @@ impl<'d, M: Mode> UartTx<'d, M> { fn enable_and_configure(&mut self, config: &Config) -> Result<(), ConfigError> { let info = self.info; let state = self.state; + state.tx_rx_refcount.store(1, Ordering::Relaxed); info.rcc.enable_and_reset(); @@ -454,7 +455,6 @@ impl<'d, M: Mode> UartTx<'d, M> { }); configure(info, self.kernel_clock, config, false, true)?; - state.tx_rx_refcount.store(1, Ordering::Relaxed); Ok(()) } @@ -798,6 +798,7 @@ impl<'d, M: Mode> UartRx<'d, M> { fn enable_and_configure(&mut self, config: &Config) -> Result<(), ConfigError> { let info = self.info; let state = self.state; + state.tx_rx_refcount.store(1, Ordering::Relaxed); info.rcc.enable_and_reset(); @@ -809,7 +810,6 @@ impl<'d, M: Mode> UartRx<'d, M> { info.interrupt.unpend(); unsafe { info.interrupt.enable() }; - state.tx_rx_refcount.store(1, Ordering::Relaxed); Ok(()) } @@ -1271,6 +1271,7 @@ impl<'d, M: Mode> Uart<'d, M> { fn enable_and_configure(&mut self, config: &Config) -> Result<(), ConfigError> { let info = self.rx.info; let state = self.rx.state; + state.tx_rx_refcount.store(2, Ordering::Relaxed); info.rcc.enable_and_reset(); @@ -1285,7 +1286,6 @@ impl<'d, M: Mode> Uart<'d, M> { info.interrupt.unpend(); unsafe { info.interrupt.enable() }; - state.tx_rx_refcount.store(2, Ordering::Relaxed); Ok(()) } From 03d8f99aa57d71c27745972f2bcd9ba3450bd8c3 Mon Sep 17 00:00:00 2001 From: kalkyl Date: Tue, 4 Jun 2024 00:38:51 +0200 Subject: [PATCH 455/581] rp: Add zerocopy channel example --- examples/rp/src/bin/zerocopy.rs | 90 +++++++++++++++++++++++++++++++++ 1 file changed, 90 insertions(+) create mode 100644 examples/rp/src/bin/zerocopy.rs diff --git a/examples/rp/src/bin/zerocopy.rs b/examples/rp/src/bin/zerocopy.rs new file mode 100644 index 000000000..b5bd11512 --- /dev/null +++ b/examples/rp/src/bin/zerocopy.rs @@ -0,0 +1,90 @@ +#![no_std] +#![no_main] + +use defmt::*; +use embassy_executor::Spawner; +use embassy_rp::adc::{self, Adc, Async, Config, InterruptHandler}; +use embassy_rp::bind_interrupts; +use embassy_rp::gpio::Pull; +use embassy_rp::peripherals::DMA_CH0; +use embassy_sync::blocking_mutex::raw::NoopRawMutex; +use embassy_sync::zerocopy_channel::{Channel, Receiver, Sender}; +use embassy_time::{Duration, Ticker, Timer}; +use portable_atomic::{AtomicU16, Ordering}; +use static_cell::StaticCell; +use {defmt_rtt as _, panic_probe as _}; + +type SampleBuffer = [u16; 512]; + +bind_interrupts!(struct Irqs { + ADC_IRQ_FIFO => InterruptHandler; +}); + +const BLOCK_SIZE: usize = 512; +const NUM_BLOCKS: usize = 2; +static MAX: AtomicU16 = AtomicU16::new(0); + +struct AdcParts { + adc: Adc<'static, Async>, + pin: adc::Channel<'static>, + dma: DMA_CH0, +} + +#[embassy_executor::main] +async fn main(spawner: Spawner) { + let p = embassy_rp::init(Default::default()); + info!("Here we go!"); + + let adc_parts = AdcParts { + adc: Adc::new(p.ADC, Irqs, Config::default()), + pin: adc::Channel::new_pin(p.PIN_29, Pull::None), + dma: p.DMA_CH0, + }; + + static BUF: StaticCell<[SampleBuffer; NUM_BLOCKS]> = StaticCell::new(); + let buf = BUF.init([[0; BLOCK_SIZE]; NUM_BLOCKS]); + + static CHANNEL: StaticCell> = StaticCell::new(); + let channel = CHANNEL.init(Channel::new(buf)); + let (sender, receiver) = channel.split(); + + spawner.must_spawn(consumer(receiver)); + spawner.must_spawn(producer(sender, adc_parts)); + + let mut ticker = Ticker::every(Duration::from_secs(1)); + loop { + ticker.next().await; + let max = MAX.load(Ordering::Relaxed); + info!("latest block's max value: {:?}", max); + } +} + +#[embassy_executor::task] +async fn producer(mut sender: Sender<'static, NoopRawMutex, SampleBuffer>, mut adc: AdcParts) { + loop { + // Obtain a free buffer from the channel + let buf = sender.send().await; + + // Fill it with data + adc.adc.read_many(&mut adc.pin, buf, 1, &mut adc.dma).await.unwrap(); + + // Notify the channel that the buffer is now ready to be received + sender.send_done(); + } +} + +#[embassy_executor::task] +async fn consumer(mut receiver: Receiver<'static, NoopRawMutex, SampleBuffer>) { + loop { + // Receive a buffer from the channel + let buf = receiver.receive().await; + + // Simulate using the data, while the producer is filling up the next buffer + Timer::after_micros(1000).await; + let max = buf.iter().max().unwrap(); + MAX.store(*max, Ordering::Relaxed); + + // Notify the channel that the buffer is now ready to be reused + receiver.receive_done(); + } +} From 874d5f7c65f2af21e4666bf92800d304c2d9e01d Mon Sep 17 00:00:00 2001 From: kalkyl Date: Tue, 4 Jun 2024 00:53:51 +0200 Subject: [PATCH 456/581] core atomic --- examples/rp/src/bin/zerocopy.rs | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/examples/rp/src/bin/zerocopy.rs b/examples/rp/src/bin/zerocopy.rs index b5bd11512..730a3ae0c 100644 --- a/examples/rp/src/bin/zerocopy.rs +++ b/examples/rp/src/bin/zerocopy.rs @@ -1,6 +1,8 @@ #![no_std] #![no_main] +use core::sync::atomic::{AtomicU16, Ordering}; + use defmt::*; use embassy_executor::Spawner; use embassy_rp::adc::{self, Adc, Async, Config, InterruptHandler}; @@ -10,7 +12,6 @@ use embassy_rp::peripherals::DMA_CH0; use embassy_sync::blocking_mutex::raw::NoopRawMutex; use embassy_sync::zerocopy_channel::{Channel, Receiver, Sender}; use embassy_time::{Duration, Ticker, Timer}; -use portable_atomic::{AtomicU16, Ordering}; use static_cell::StaticCell; use {defmt_rtt as _, panic_probe as _}; From f9d8c68fc8ed490e72e61b74d2b3b26bbbd0434c Mon Sep 17 00:00:00 2001 From: kalkyl Date: Tue, 4 Jun 2024 01:20:19 +0200 Subject: [PATCH 457/581] Add description --- examples/rp/src/bin/zerocopy.rs | 3 +++ 1 file changed, 3 insertions(+) diff --git a/examples/rp/src/bin/zerocopy.rs b/examples/rp/src/bin/zerocopy.rs index 730a3ae0c..39f03c8e4 100644 --- a/examples/rp/src/bin/zerocopy.rs +++ b/examples/rp/src/bin/zerocopy.rs @@ -1,3 +1,6 @@ +//! This example shows how to use `zerocopy_channel` from `embassy_sync` for +//! sending large values between two tasks without copying. +//! The example also shows how to use the RP2040 ADC with DMA. #![no_std] #![no_main] From 30918c355b5777715f9d5c8019ce8a8dd1f69715 Mon Sep 17 00:00:00 2001 From: Ulf Lilleengen Date: Tue, 4 Jun 2024 08:57:16 +0200 Subject: [PATCH 458/581] prepare for embassy-time 0.3.1 release --- cyw43/Cargo.toml | 2 +- docs/examples/basic/Cargo.toml | 2 +- embassy-boot-rp/Cargo.toml | 2 +- embassy-embedded-hal/Cargo.toml | 2 +- embassy-net-adin1110/Cargo.toml | 2 +- embassy-net-enc28j60/Cargo.toml | 2 +- embassy-net-esp-hosted/Cargo.toml | 2 +- embassy-net-wiznet/Cargo.toml | 2 +- embassy-net/Cargo.toml | 2 +- embassy-nrf/Cargo.toml | 2 +- embassy-rp/Cargo.toml | 2 +- embassy-stm32-wpan/Cargo.toml | 2 +- embassy-stm32/Cargo.toml | 2 +- embassy-time/CHANGELOG.md | 9 +++++++++ embassy-time/Cargo.toml | 2 +- embassy-usb-dfu/Cargo.toml | 2 +- examples/boot/application/nrf/Cargo.toml | 2 +- examples/boot/application/rp/Cargo.toml | 2 +- examples/boot/application/stm32f3/Cargo.toml | 2 +- examples/boot/application/stm32f7/Cargo.toml | 2 +- examples/boot/application/stm32h7/Cargo.toml | 2 +- examples/boot/application/stm32l0/Cargo.toml | 2 +- examples/boot/application/stm32l1/Cargo.toml | 2 +- examples/boot/application/stm32l4/Cargo.toml | 2 +- examples/boot/application/stm32wb-dfu/Cargo.toml | 2 +- examples/boot/application/stm32wl/Cargo.toml | 2 +- examples/nrf-rtos-trace/Cargo.toml | 2 +- examples/nrf51/Cargo.toml | 2 +- examples/nrf52810/Cargo.toml | 2 +- examples/nrf52840-rtic/Cargo.toml | 2 +- examples/nrf52840/Cargo.toml | 2 +- examples/nrf5340/Cargo.toml | 2 +- examples/nrf9160/Cargo.toml | 2 +- examples/rp/Cargo.toml | 2 +- examples/std/Cargo.toml | 2 +- examples/stm32c0/Cargo.toml | 2 +- examples/stm32f0/Cargo.toml | 2 +- examples/stm32f1/Cargo.toml | 2 +- examples/stm32f2/Cargo.toml | 2 +- examples/stm32f3/Cargo.toml | 2 +- examples/stm32f334/Cargo.toml | 2 +- examples/stm32f4/Cargo.toml | 2 +- examples/stm32f469/Cargo.toml | 2 +- examples/stm32f7/Cargo.toml | 2 +- examples/stm32g0/Cargo.toml | 2 +- examples/stm32g4/Cargo.toml | 2 +- examples/stm32h5/Cargo.toml | 2 +- examples/stm32h7/Cargo.toml | 2 +- examples/stm32h7rs/Cargo.toml | 2 +- examples/stm32l0/Cargo.toml | 2 +- examples/stm32l1/Cargo.toml | 2 +- examples/stm32l4/Cargo.toml | 2 +- examples/stm32l5/Cargo.toml | 2 +- examples/stm32u0/Cargo.toml | 2 +- examples/stm32u5/Cargo.toml | 2 +- examples/stm32wb/Cargo.toml | 2 +- examples/stm32wba/Cargo.toml | 2 +- examples/stm32wl/Cargo.toml | 2 +- examples/wasm/Cargo.toml | 2 +- tests/nrf51422/Cargo.toml | 2 +- tests/nrf52840/Cargo.toml | 2 +- tests/perf-client/Cargo.toml | 2 +- tests/riscv32/Cargo.toml | 2 +- tests/rp/Cargo.toml | 2 +- tests/stm32/Cargo.toml | 2 +- 65 files changed, 73 insertions(+), 64 deletions(-) diff --git a/cyw43/Cargo.toml b/cyw43/Cargo.toml index 7d060c9c8..c613698c1 100644 --- a/cyw43/Cargo.toml +++ b/cyw43/Cargo.toml @@ -17,7 +17,7 @@ log = ["dep:log"] firmware-logs = [] [dependencies] -embassy-time = { version = "0.3.0", path = "../embassy-time"} +embassy-time = { version = "0.3.1", path = "../embassy-time"} embassy-sync = { version = "0.6.0", path = "../embassy-sync"} embassy-futures = { version = "0.1.0", path = "../embassy-futures"} embassy-net-driver-channel = { version = "0.2.0", path = "../embassy-net-driver-channel"} diff --git a/docs/examples/basic/Cargo.toml b/docs/examples/basic/Cargo.toml index d86d4a809..e82165032 100644 --- a/docs/examples/basic/Cargo.toml +++ b/docs/examples/basic/Cargo.toml @@ -7,7 +7,7 @@ license = "MIT OR Apache-2.0" [dependencies] embassy-executor = { version = "0.5.0", path = "../../../embassy-executor", features = ["defmt", "integrated-timers", "arch-cortex-m", "executor-thread"] } -embassy-time = { version = "0.3.0", path = "../../../embassy-time", features = ["defmt"] } +embassy-time = { version = "0.3.1", path = "../../../embassy-time", features = ["defmt"] } embassy-nrf = { version = "0.1.0", path = "../../../embassy-nrf", features = ["defmt", "nrf52840", "time-driver-rtc1", "gpiote"] } defmt = "0.3" diff --git a/embassy-boot-rp/Cargo.toml b/embassy-boot-rp/Cargo.toml index de2ae3780..23a8bb549 100644 --- a/embassy-boot-rp/Cargo.toml +++ b/embassy-boot-rp/Cargo.toml @@ -26,7 +26,7 @@ log = { version = "0.4", optional = true } embassy-sync = { version = "0.6.0", path = "../embassy-sync" } embassy-rp = { version = "0.1.0", path = "../embassy-rp", default-features = false } embassy-boot = { version = "0.2.0", path = "../embassy-boot" } -embassy-time = { version = "0.3.0", path = "../embassy-time" } +embassy-time = { version = "0.3.1", path = "../embassy-time" } cortex-m = { version = "0.7.6" } cortex-m-rt = { version = "0.7" } diff --git a/embassy-embedded-hal/Cargo.toml b/embassy-embedded-hal/Cargo.toml index 1602e802c..905439fe7 100644 --- a/embassy-embedded-hal/Cargo.toml +++ b/embassy-embedded-hal/Cargo.toml @@ -29,7 +29,7 @@ default = ["time"] [dependencies] embassy-futures = { version = "0.1.0", path = "../embassy-futures" } embassy-sync = { version = "0.6.0", path = "../embassy-sync" } -embassy-time = { version = "0.3.0", path = "../embassy-time", optional = true } +embassy-time = { version = "0.3.1", path = "../embassy-time", optional = true } embedded-hal-02 = { package = "embedded-hal", version = "0.2.6", features = [ "unproven", ] } diff --git a/embassy-net-adin1110/Cargo.toml b/embassy-net-adin1110/Cargo.toml index 4a856fac3..e75f76b16 100644 --- a/embassy-net-adin1110/Cargo.toml +++ b/embassy-net-adin1110/Cargo.toml @@ -17,7 +17,7 @@ embedded-hal-1 = { package = "embedded-hal", version = "1.0" } embedded-hal-async = { version = "1.0" } embedded-hal-bus = { version = "0.1", features = ["async"] } embassy-net-driver-channel = { version = "0.2.0", path = "../embassy-net-driver-channel" } -embassy-time = { version = "0.3.0", path = "../embassy-time" } +embassy-time = { version = "0.3.1", path = "../embassy-time" } embassy-futures = { version = "0.1.0", path = "../embassy-futures" } bitfield = "0.14.0" diff --git a/embassy-net-enc28j60/Cargo.toml b/embassy-net-enc28j60/Cargo.toml index 23bd3da7e..dd7aa031d 100644 --- a/embassy-net-enc28j60/Cargo.toml +++ b/embassy-net-enc28j60/Cargo.toml @@ -13,7 +13,7 @@ documentation = "https://docs.embassy.dev/embassy-net-enc28j60" embedded-hal = { version = "1.0" } embedded-hal-async = { version = "1.0" } embassy-net-driver = { version = "0.2.0", path = "../embassy-net-driver" } -embassy-time = { version = "0.3.0", path = "../embassy-time" } +embassy-time = { version = "0.3.1", path = "../embassy-time" } embassy-futures = { version = "0.1.0", path = "../embassy-futures" } defmt = { version = "0.3", optional = true } diff --git a/embassy-net-esp-hosted/Cargo.toml b/embassy-net-esp-hosted/Cargo.toml index 337c749b6..24b7d0806 100644 --- a/embassy-net-esp-hosted/Cargo.toml +++ b/embassy-net-esp-hosted/Cargo.toml @@ -17,7 +17,7 @@ log = [ "dep:log" ] defmt = { version = "0.3", optional = true } log = { version = "0.4.14", optional = true } -embassy-time = { version = "0.3.0", path = "../embassy-time" } +embassy-time = { version = "0.3.1", path = "../embassy-time" } embassy-sync = { version = "0.6.0", path = "../embassy-sync"} embassy-futures = { version = "0.1.0", path = "../embassy-futures"} embassy-net-driver-channel = { version = "0.2.0", path = "../embassy-net-driver-channel"} diff --git a/embassy-net-wiznet/Cargo.toml b/embassy-net-wiznet/Cargo.toml index f87bf2bd0..b6ce20325 100644 --- a/embassy-net-wiznet/Cargo.toml +++ b/embassy-net-wiznet/Cargo.toml @@ -13,7 +13,7 @@ documentation = "https://docs.embassy.dev/embassy-net-wiznet" embedded-hal = { version = "1.0" } embedded-hal-async = { version = "1.0" } embassy-net-driver-channel = { version = "0.2.0", path = "../embassy-net-driver-channel" } -embassy-time = { version = "0.3.0", path = "../embassy-time" } +embassy-time = { version = "0.3.1", path = "../embassy-time" } embassy-futures = { version = "0.1.0", path = "../embassy-futures" } defmt = { version = "0.3", optional = true } diff --git a/embassy-net/Cargo.toml b/embassy-net/Cargo.toml index 8c2daebf1..15b97af47 100644 --- a/embassy-net/Cargo.toml +++ b/embassy-net/Cargo.toml @@ -72,7 +72,7 @@ smoltcp = { version = "0.11.0", default-features = false, features = [ ] } embassy-net-driver = { version = "0.2.0", path = "../embassy-net-driver" } -embassy-time = { version = "0.3.0", path = "../embassy-time" } +embassy-time = { version = "0.3.1", path = "../embassy-time" } embassy-sync = { version = "0.6.0", path = "../embassy-sync" } embedded-io-async = { version = "0.6.1" } diff --git a/embassy-nrf/Cargo.toml b/embassy-nrf/Cargo.toml index bdf9ec8f5..02c3bfbbe 100644 --- a/embassy-nrf/Cargo.toml +++ b/embassy-nrf/Cargo.toml @@ -125,7 +125,7 @@ _nrf52832_anomaly_109 = [] [dependencies] embassy-time-driver = { version = "0.1", path = "../embassy-time-driver", optional = true } -embassy-time = { version = "0.3.0", path = "../embassy-time", optional = true } +embassy-time = { version = "0.3.1", path = "../embassy-time", optional = true } embassy-sync = { version = "0.6.0", path = "../embassy-sync" } embassy-hal-internal = {version = "0.1.0", path = "../embassy-hal-internal", features = ["cortex-m", "prio-bits-3"] } embassy-embedded-hal = {version = "0.1.0", path = "../embassy-embedded-hal" } diff --git a/embassy-rp/Cargo.toml b/embassy-rp/Cargo.toml index 48f7ad138..3ba6fe2e7 100644 --- a/embassy-rp/Cargo.toml +++ b/embassy-rp/Cargo.toml @@ -83,7 +83,7 @@ boot2-w25x10cl = [] [dependencies] embassy-sync = { version = "0.6.0", path = "../embassy-sync" } embassy-time-driver = { version = "0.1", path = "../embassy-time-driver", optional = true } -embassy-time = { version = "0.3.0", path = "../embassy-time" } +embassy-time = { version = "0.3.1", path = "../embassy-time" } embassy-futures = { version = "0.1.0", path = "../embassy-futures" } embassy-hal-internal = {version = "0.1.0", path = "../embassy-hal-internal", features = ["cortex-m", "prio-bits-2"] } embassy-embedded-hal = {version = "0.1.0", path = "../embassy-embedded-hal" } diff --git a/embassy-stm32-wpan/Cargo.toml b/embassy-stm32-wpan/Cargo.toml index 9c81a71f7..307b948c1 100644 --- a/embassy-stm32-wpan/Cargo.toml +++ b/embassy-stm32-wpan/Cargo.toml @@ -21,7 +21,7 @@ features = ["stm32wb55rg"] [dependencies] embassy-stm32 = { version = "0.1.0", path = "../embassy-stm32" } embassy-sync = { version = "0.6.0", path = "../embassy-sync" } -embassy-time = { version = "0.3.0", path = "../embassy-time", optional = true } +embassy-time = { version = "0.3.1", path = "../embassy-time", optional = true } embassy-futures = { version = "0.1.0", path = "../embassy-futures" } embassy-hal-internal = { version = "0.1.0", path = "../embassy-hal-internal" } embassy-embedded-hal = { version = "0.1.0", path = "../embassy-embedded-hal" } diff --git a/embassy-stm32/Cargo.toml b/embassy-stm32/Cargo.toml index 6a1dfec26..40b7559fd 100644 --- a/embassy-stm32/Cargo.toml +++ b/embassy-stm32/Cargo.toml @@ -43,7 +43,7 @@ rustdoc-args = ["--cfg", "docsrs"] [dependencies] embassy-sync = { version = "0.6.0", path = "../embassy-sync" } -embassy-time = { version = "0.3.0", path = "../embassy-time", optional = true } +embassy-time = { version = "0.3.1", path = "../embassy-time", optional = true } embassy-time-driver = { version = "0.1", path = "../embassy-time-driver", optional = true } embassy-futures = { version = "0.1.0", path = "../embassy-futures" } embassy-hal-internal = {version = "0.1.0", path = "../embassy-hal-internal", features = ["cortex-m", "prio-bits-4"] } diff --git a/embassy-time/CHANGELOG.md b/embassy-time/CHANGELOG.md index df093949f..75e17fd63 100644 --- a/embassy-time/CHANGELOG.md +++ b/embassy-time/CHANGELOG.md @@ -5,6 +5,15 @@ All notable changes to this project will be documented in this file. The format is based on [Keep a Changelog](https://keepachangelog.com/en/1.0.0/), and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0.html). +## Unreleased + +## 0.4.0 - 2024-01-11 + +- Add with\_deadline convenience function and example +- Implement Clone for Delay +- Make Ticker::next Send+Sync +- Add timestamp features + ## 0.3.0 - 2024-01-11 - Update `embedded-hal-async` to `1.0.0` diff --git a/embassy-time/Cargo.toml b/embassy-time/Cargo.toml index ce3f3d8c2..5d5bd8b23 100644 --- a/embassy-time/Cargo.toml +++ b/embassy-time/Cargo.toml @@ -1,6 +1,6 @@ [package] name = "embassy-time" -version = "0.3.0" +version = "0.3.1" edition = "2021" description = "Instant and Duration for embedded no-std systems, with async timer support" repository = "https://github.com/embassy-rs/embassy" diff --git a/embassy-usb-dfu/Cargo.toml b/embassy-usb-dfu/Cargo.toml index ca87bcb62..968fbec74 100644 --- a/embassy-usb-dfu/Cargo.toml +++ b/embassy-usb-dfu/Cargo.toml @@ -34,7 +34,7 @@ cortex-m = { version = "0.7.7", features = ["inline-asm"], optional = true } embassy-boot = { version = "0.2.0", path = "../embassy-boot" } embassy-futures = { version = "0.1.1", path = "../embassy-futures" } embassy-sync = { version = "0.6.0", path = "../embassy-sync" } -embassy-time = { version = "0.3.0", path = "../embassy-time" } +embassy-time = { version = "0.3.1", path = "../embassy-time" } embassy-usb = { version = "0.2.0", path = "../embassy-usb", default-features = false } embedded-storage = { version = "0.3.1" } esp32c3-hal = { version = "0.13.0", optional = true, default-features = false } diff --git a/examples/boot/application/nrf/Cargo.toml b/examples/boot/application/nrf/Cargo.toml index cf34bb7cf..dbbe0fddc 100644 --- a/examples/boot/application/nrf/Cargo.toml +++ b/examples/boot/application/nrf/Cargo.toml @@ -7,7 +7,7 @@ license = "MIT OR Apache-2.0" [dependencies] embassy-sync = { version = "0.6.0", path = "../../../../embassy-sync" } embassy-executor = { version = "0.5.0", path = "../../../../embassy-executor", features = ["task-arena-size-16384", "arch-cortex-m", "executor-thread", "integrated-timers", "arch-cortex-m", "executor-thread"] } -embassy-time = { version = "0.3.0", path = "../../../../embassy-time", features = [] } +embassy-time = { version = "0.3.1", path = "../../../../embassy-time", features = [] } embassy-nrf = { version = "0.1.0", path = "../../../../embassy-nrf", features = ["time-driver-rtc1", "gpiote", ] } embassy-boot = { version = "0.2.0", path = "../../../../embassy-boot", features = [] } embassy-boot-nrf = { version = "0.2.0", path = "../../../../embassy-boot-nrf", features = [] } diff --git a/examples/boot/application/rp/Cargo.toml b/examples/boot/application/rp/Cargo.toml index 2ddcbffee..d4341e8f6 100644 --- a/examples/boot/application/rp/Cargo.toml +++ b/examples/boot/application/rp/Cargo.toml @@ -7,7 +7,7 @@ license = "MIT OR Apache-2.0" [dependencies] embassy-sync = { version = "0.6.0", path = "../../../../embassy-sync" } embassy-executor = { version = "0.5.0", path = "../../../../embassy-executor", features = ["task-arena-size-16384", "arch-cortex-m", "executor-thread", "integrated-timers", "arch-cortex-m", "executor-thread"] } -embassy-time = { version = "0.3.0", path = "../../../../embassy-time", features = [] } +embassy-time = { version = "0.3.1", path = "../../../../embassy-time", features = [] } embassy-rp = { version = "0.1.0", path = "../../../../embassy-rp", features = ["time-driver", ] } embassy-boot-rp = { version = "0.2.0", path = "../../../../embassy-boot-rp", features = [] } embassy-embedded-hal = { version = "0.1.0", path = "../../../../embassy-embedded-hal" } diff --git a/examples/boot/application/stm32f3/Cargo.toml b/examples/boot/application/stm32f3/Cargo.toml index 9b79b01ce..c203ffc9f 100644 --- a/examples/boot/application/stm32f3/Cargo.toml +++ b/examples/boot/application/stm32f3/Cargo.toml @@ -7,7 +7,7 @@ license = "MIT OR Apache-2.0" [dependencies] embassy-sync = { version = "0.6.0", path = "../../../../embassy-sync" } embassy-executor = { version = "0.5.0", path = "../../../../embassy-executor", features = ["task-arena-size-8192", "arch-cortex-m", "executor-thread", "integrated-timers"] } -embassy-time = { version = "0.3.0", path = "../../../../embassy-time", features = [ "tick-hz-32_768"] } +embassy-time = { version = "0.3.1", path = "../../../../embassy-time", features = [ "tick-hz-32_768"] } embassy-stm32 = { version = "0.1.0", path = "../../../../embassy-stm32", features = ["stm32f303re", "time-driver-any", "exti"] } embassy-boot-stm32 = { version = "0.2.0", path = "../../../../embassy-boot-stm32" } embassy-embedded-hal = { version = "0.1.0", path = "../../../../embassy-embedded-hal" } diff --git a/examples/boot/application/stm32f7/Cargo.toml b/examples/boot/application/stm32f7/Cargo.toml index 0167dfb76..ed13eab65 100644 --- a/examples/boot/application/stm32f7/Cargo.toml +++ b/examples/boot/application/stm32f7/Cargo.toml @@ -7,7 +7,7 @@ license = "MIT OR Apache-2.0" [dependencies] embassy-sync = { version = "0.6.0", path = "../../../../embassy-sync" } embassy-executor = { version = "0.5.0", path = "../../../../embassy-executor", features = ["task-arena-size-8192", "arch-cortex-m", "executor-thread", "integrated-timers"] } -embassy-time = { version = "0.3.0", path = "../../../../embassy-time", features = [ "tick-hz-32_768"] } +embassy-time = { version = "0.3.1", path = "../../../../embassy-time", features = [ "tick-hz-32_768"] } embassy-stm32 = { version = "0.1.0", path = "../../../../embassy-stm32", features = ["stm32f767zi", "time-driver-any", "exti"] } embassy-boot-stm32 = { version = "0.2.0", path = "../../../../embassy-boot-stm32", features = [] } embassy-embedded-hal = { version = "0.1.0", path = "../../../../embassy-embedded-hal" } diff --git a/examples/boot/application/stm32h7/Cargo.toml b/examples/boot/application/stm32h7/Cargo.toml index 61643d485..f25e9815d 100644 --- a/examples/boot/application/stm32h7/Cargo.toml +++ b/examples/boot/application/stm32h7/Cargo.toml @@ -7,7 +7,7 @@ license = "MIT OR Apache-2.0" [dependencies] embassy-sync = { version = "0.6.0", path = "../../../../embassy-sync" } embassy-executor = { version = "0.5.0", path = "../../../../embassy-executor", features = ["task-arena-size-8192", "arch-cortex-m", "executor-thread", "integrated-timers"] } -embassy-time = { version = "0.3.0", path = "../../../../embassy-time", features = [ "tick-hz-32_768"] } +embassy-time = { version = "0.3.1", path = "../../../../embassy-time", features = [ "tick-hz-32_768"] } embassy-stm32 = { version = "0.1.0", path = "../../../../embassy-stm32", features = ["stm32h743zi", "time-driver-any", "exti"] } embassy-boot-stm32 = { version = "0.2.0", path = "../../../../embassy-boot-stm32", features = [] } embassy-embedded-hal = { version = "0.1.0", path = "../../../../embassy-embedded-hal" } diff --git a/examples/boot/application/stm32l0/Cargo.toml b/examples/boot/application/stm32l0/Cargo.toml index 2990089ac..c1a47dfe4 100644 --- a/examples/boot/application/stm32l0/Cargo.toml +++ b/examples/boot/application/stm32l0/Cargo.toml @@ -7,7 +7,7 @@ license = "MIT OR Apache-2.0" [dependencies] embassy-sync = { version = "0.6.0", path = "../../../../embassy-sync" } embassy-executor = { version = "0.5.0", path = "../../../../embassy-executor", features = ["task-arena-size-8192", "arch-cortex-m", "executor-thread", "integrated-timers"] } -embassy-time = { version = "0.3.0", path = "../../../../embassy-time", features = [ "tick-hz-32_768"] } +embassy-time = { version = "0.3.1", path = "../../../../embassy-time", features = [ "tick-hz-32_768"] } embassy-stm32 = { version = "0.1.0", path = "../../../../embassy-stm32", features = ["stm32l072cz", "time-driver-any", "exti", "memory-x"] } embassy-boot-stm32 = { version = "0.2.0", path = "../../../../embassy-boot-stm32", features = [] } embassy-embedded-hal = { version = "0.1.0", path = "../../../../embassy-embedded-hal" } diff --git a/examples/boot/application/stm32l1/Cargo.toml b/examples/boot/application/stm32l1/Cargo.toml index c07d71591..1e83d3113 100644 --- a/examples/boot/application/stm32l1/Cargo.toml +++ b/examples/boot/application/stm32l1/Cargo.toml @@ -7,7 +7,7 @@ license = "MIT OR Apache-2.0" [dependencies] embassy-sync = { version = "0.6.0", path = "../../../../embassy-sync" } embassy-executor = { version = "0.5.0", path = "../../../../embassy-executor", features = ["task-arena-size-8192", "arch-cortex-m", "executor-thread", "integrated-timers"] } -embassy-time = { version = "0.3.0", path = "../../../../embassy-time", features = [ "tick-hz-32_768"] } +embassy-time = { version = "0.3.1", path = "../../../../embassy-time", features = [ "tick-hz-32_768"] } embassy-stm32 = { version = "0.1.0", path = "../../../../embassy-stm32", features = ["stm32l151cb-a", "time-driver-any", "exti"] } embassy-boot-stm32 = { version = "0.2.0", path = "../../../../embassy-boot-stm32", features = [] } embassy-embedded-hal = { version = "0.1.0", path = "../../../../embassy-embedded-hal" } diff --git a/examples/boot/application/stm32l4/Cargo.toml b/examples/boot/application/stm32l4/Cargo.toml index 72b937ca7..bca292681 100644 --- a/examples/boot/application/stm32l4/Cargo.toml +++ b/examples/boot/application/stm32l4/Cargo.toml @@ -7,7 +7,7 @@ license = "MIT OR Apache-2.0" [dependencies] embassy-sync = { version = "0.6.0", path = "../../../../embassy-sync" } embassy-executor = { version = "0.5.0", path = "../../../../embassy-executor", features = ["task-arena-size-8192", "arch-cortex-m", "executor-thread", "integrated-timers"] } -embassy-time = { version = "0.3.0", path = "../../../../embassy-time", features = [ "tick-hz-32_768"] } +embassy-time = { version = "0.3.1", path = "../../../../embassy-time", features = [ "tick-hz-32_768"] } embassy-stm32 = { version = "0.1.0", path = "../../../../embassy-stm32", features = ["stm32l475vg", "time-driver-any", "exti"] } embassy-boot-stm32 = { version = "0.2.0", path = "../../../../embassy-boot-stm32", features = [] } embassy-embedded-hal = { version = "0.1.0", path = "../../../../embassy-embedded-hal" } diff --git a/examples/boot/application/stm32wb-dfu/Cargo.toml b/examples/boot/application/stm32wb-dfu/Cargo.toml index bb83ae049..0484e6ceb 100644 --- a/examples/boot/application/stm32wb-dfu/Cargo.toml +++ b/examples/boot/application/stm32wb-dfu/Cargo.toml @@ -7,7 +7,7 @@ license = "MIT OR Apache-2.0" [dependencies] embassy-sync = { version = "0.6.0", path = "../../../../embassy-sync" } embassy-executor = { version = "0.5.0", path = "../../../../embassy-executor", features = ["task-arena-size-8192", "arch-cortex-m", "executor-thread", "integrated-timers"] } -embassy-time = { version = "0.3.0", path = "../../../../embassy-time", features = [ "tick-hz-32_768"] } +embassy-time = { version = "0.3.1", path = "../../../../embassy-time", features = [ "tick-hz-32_768"] } embassy-stm32 = { version = "0.1.0", path = "../../../../embassy-stm32", features = ["stm32wb55rg", "time-driver-any", "exti"] } embassy-boot-stm32 = { version = "0.2.0", path = "../../../../embassy-boot-stm32", features = [] } embassy-embedded-hal = { version = "0.1.0", path = "../../../../embassy-embedded-hal" } diff --git a/examples/boot/application/stm32wl/Cargo.toml b/examples/boot/application/stm32wl/Cargo.toml index a5160b797..b785a1968 100644 --- a/examples/boot/application/stm32wl/Cargo.toml +++ b/examples/boot/application/stm32wl/Cargo.toml @@ -7,7 +7,7 @@ license = "MIT OR Apache-2.0" [dependencies] embassy-sync = { version = "0.6.0", path = "../../../../embassy-sync" } embassy-executor = { version = "0.5.0", path = "../../../../embassy-executor", features = ["task-arena-size-8192", "arch-cortex-m", "executor-thread", "integrated-timers"] } -embassy-time = { version = "0.3.0", path = "../../../../embassy-time", features = [ "tick-hz-32_768"] } +embassy-time = { version = "0.3.1", path = "../../../../embassy-time", features = [ "tick-hz-32_768"] } embassy-stm32 = { version = "0.1.0", path = "../../../../embassy-stm32", features = ["stm32wl55jc-cm4", "time-driver-any", "exti"] } embassy-boot-stm32 = { version = "0.2.0", path = "../../../../embassy-boot-stm32", features = [] } embassy-embedded-hal = { version = "0.1.0", path = "../../../../embassy-embedded-hal" } diff --git a/examples/nrf-rtos-trace/Cargo.toml b/examples/nrf-rtos-trace/Cargo.toml index 147bb40dc..70a89bb30 100644 --- a/examples/nrf-rtos-trace/Cargo.toml +++ b/examples/nrf-rtos-trace/Cargo.toml @@ -17,7 +17,7 @@ log = [ [dependencies] embassy-sync = { version = "0.6.0", path = "../../embassy-sync" } embassy-executor = { version = "0.5.0", path = "../../embassy-executor", features = ["arch-cortex-m", "executor-thread", "rtos-trace", "integrated-timers"] } -embassy-time = { version = "0.3.0", path = "../../embassy-time" } +embassy-time = { version = "0.3.1", path = "../../embassy-time" } embassy-nrf = { version = "0.1.0", path = "../../embassy-nrf", features = ["nrf52840", "time-driver-rtc1", "gpiote", "unstable-pac"] } cortex-m = { version = "0.7.6", features = ["inline-asm", "critical-section-single-core"] } diff --git a/examples/nrf51/Cargo.toml b/examples/nrf51/Cargo.toml index 06c3d20cb..c52256d8e 100644 --- a/examples/nrf51/Cargo.toml +++ b/examples/nrf51/Cargo.toml @@ -6,7 +6,7 @@ license = "MIT OR Apache-2.0" [dependencies] embassy-executor = { version = "0.5.0", path = "../../embassy-executor", features = ["task-arena-size-4096", "arch-cortex-m", "executor-thread", "executor-interrupt", "defmt", "integrated-timers"] } -embassy-time = { version = "0.3.0", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime"] } +embassy-time = { version = "0.3.1", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime"] } embassy-nrf = { version = "0.1.0", path = "../../embassy-nrf", features = ["defmt", "nrf51", "gpiote", "time-driver-rtc1", "unstable-pac", "time", "rt"] } defmt = "0.3" diff --git a/examples/nrf52810/Cargo.toml b/examples/nrf52810/Cargo.toml index faec9a263..2031b253f 100644 --- a/examples/nrf52810/Cargo.toml +++ b/examples/nrf52810/Cargo.toml @@ -8,7 +8,7 @@ license = "MIT OR Apache-2.0" embassy-futures = { version = "0.1.0", path = "../../embassy-futures" } embassy-sync = { version = "0.6.0", path = "../../embassy-sync", features = ["defmt"] } embassy-executor = { version = "0.5.0", path = "../../embassy-executor", features = ["task-arena-size-8192", "arch-cortex-m", "executor-thread", "executor-interrupt", "defmt", "integrated-timers"] } -embassy-time = { version = "0.3.0", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime"] } +embassy-time = { version = "0.3.1", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime"] } embassy-nrf = { version = "0.1.0", path = "../../embassy-nrf", features = ["defmt", "nrf52810", "time-driver-rtc1", "gpiote", "unstable-pac", "time"] } defmt = "0.3" diff --git a/examples/nrf52840-rtic/Cargo.toml b/examples/nrf52840-rtic/Cargo.toml index 041c779a5..731cee843 100644 --- a/examples/nrf52840-rtic/Cargo.toml +++ b/examples/nrf52840-rtic/Cargo.toml @@ -9,7 +9,7 @@ rtic = { version = "2", features = ["thumbv7-backend"] } embassy-futures = { version = "0.1.0", path = "../../embassy-futures" } embassy-sync = { version = "0.6.0", path = "../../embassy-sync", features = ["defmt"] } -embassy-time = { version = "0.3.0", path = "../../embassy-time", features = [ "defmt", "defmt-timestamp-uptime", "generic-queue"] } +embassy-time = { version = "0.3.1", path = "../../embassy-time", features = [ "defmt", "defmt-timestamp-uptime", "generic-queue"] } embassy-nrf = { version = "0.1.0", path = "../../embassy-nrf", features = [ "defmt", "nrf52840", "time-driver-rtc1", "gpiote", "unstable-pac", "time"] } defmt = "0.3" diff --git a/examples/nrf52840/Cargo.toml b/examples/nrf52840/Cargo.toml index 79d9e4e1a..000857821 100644 --- a/examples/nrf52840/Cargo.toml +++ b/examples/nrf52840/Cargo.toml @@ -8,7 +8,7 @@ license = "MIT OR Apache-2.0" embassy-futures = { version = "0.1.0", path = "../../embassy-futures" } embassy-sync = { version = "0.6.0", path = "../../embassy-sync", features = ["defmt"] } embassy-executor = { version = "0.5.0", path = "../../embassy-executor", features = ["task-arena-size-32768", "arch-cortex-m", "executor-thread", "executor-interrupt", "defmt", "integrated-timers"] } -embassy-time = { version = "0.3.0", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime"] } +embassy-time = { version = "0.3.1", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime"] } embassy-nrf = { version = "0.1.0", path = "../../embassy-nrf", features = ["defmt", "nrf52840", "time-driver-rtc1", "gpiote", "unstable-pac", "time"] } embassy-net = { version = "0.4.0", path = "../../embassy-net", features = ["defmt", "tcp", "dhcpv4", "medium-ethernet"] } embassy-usb = { version = "0.2.0", path = "../../embassy-usb", features = ["defmt"] } diff --git a/examples/nrf5340/Cargo.toml b/examples/nrf5340/Cargo.toml index e560a3dbb..02f6190f0 100644 --- a/examples/nrf5340/Cargo.toml +++ b/examples/nrf5340/Cargo.toml @@ -8,7 +8,7 @@ license = "MIT OR Apache-2.0" embassy-futures = { version = "0.1.0", path = "../../embassy-futures" } embassy-sync = { version = "0.6.0", path = "../../embassy-sync", features = ["defmt"] } embassy-executor = { version = "0.5.0", path = "../../embassy-executor", features = ["task-arena-size-32768", "arch-cortex-m", "executor-thread", "defmt", "integrated-timers"] } -embassy-time = { version = "0.3.0", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime"] } +embassy-time = { version = "0.3.1", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime"] } embassy-nrf = { version = "0.1.0", path = "../../embassy-nrf", features = ["defmt", "nrf5340-app-s", "time-driver-rtc1", "gpiote", "unstable-pac"] } embassy-net = { version = "0.4.0", path = "../../embassy-net", features = ["defmt", "tcp", "dhcpv4", "medium-ethernet"] } embassy-usb = { version = "0.2.0", path = "../../embassy-usb", features = ["defmt"] } diff --git a/examples/nrf9160/Cargo.toml b/examples/nrf9160/Cargo.toml index af2385960..2ff692b24 100644 --- a/examples/nrf9160/Cargo.toml +++ b/examples/nrf9160/Cargo.toml @@ -6,7 +6,7 @@ license = "MIT OR Apache-2.0" [dependencies] embassy-executor = { version = "0.5.0", path = "../../embassy-executor", features = ["task-arena-size-32768", "arch-cortex-m", "executor-thread", "executor-interrupt", "defmt", "integrated-timers"] } -embassy-time = { version = "0.3.0", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime"] } +embassy-time = { version = "0.3.1", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime"] } embassy-nrf = { version = "0.1.0", path = "../../embassy-nrf", features = ["defmt", "nrf9160-s", "time-driver-rtc1", "gpiote", "unstable-pac", "time"] } defmt = "0.3" diff --git a/examples/rp/Cargo.toml b/examples/rp/Cargo.toml index 726df29cb..bb91969bc 100644 --- a/examples/rp/Cargo.toml +++ b/examples/rp/Cargo.toml @@ -9,7 +9,7 @@ license = "MIT OR Apache-2.0" embassy-embedded-hal = { version = "0.1.0", path = "../../embassy-embedded-hal", features = ["defmt"] } embassy-sync = { version = "0.6.0", path = "../../embassy-sync", features = ["defmt"] } embassy-executor = { version = "0.5.0", path = "../../embassy-executor", features = ["task-arena-size-32768", "arch-cortex-m", "executor-thread", "executor-interrupt", "defmt", "integrated-timers"] } -embassy-time = { version = "0.3.0", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime"] } +embassy-time = { version = "0.3.1", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime"] } embassy-rp = { version = "0.1.0", path = "../../embassy-rp", features = ["defmt", "unstable-pac", "time-driver", "critical-section-impl"] } embassy-usb = { version = "0.2.0", path = "../../embassy-usb", features = ["defmt"] } embassy-net = { version = "0.4.0", path = "../../embassy-net", features = ["defmt", "tcp", "udp", "raw", "dhcpv4", "medium-ethernet"] } diff --git a/examples/std/Cargo.toml b/examples/std/Cargo.toml index 77c479d3b..58ea894f3 100644 --- a/examples/std/Cargo.toml +++ b/examples/std/Cargo.toml @@ -7,7 +7,7 @@ license = "MIT OR Apache-2.0" [dependencies] embassy-sync = { version = "0.6.0", path = "../../embassy-sync", features = ["log"] } embassy-executor = { version = "0.5.0", path = "../../embassy-executor", features = ["task-arena-size-32768", "arch-std", "executor-thread", "log", "integrated-timers"] } -embassy-time = { version = "0.3.0", path = "../../embassy-time", features = ["log", "std", ] } +embassy-time = { version = "0.3.1", path = "../../embassy-time", features = ["log", "std", ] } embassy-net = { version = "0.4.0", path = "../../embassy-net", features=[ "std", "log", "medium-ethernet", "medium-ip", "tcp", "udp", "dns", "dhcpv4", "proto-ipv6"] } embassy-net-tuntap = { version = "0.1.0", path = "../../embassy-net-tuntap" } embassy-net-ppp = { version = "0.1.0", path = "../../embassy-net-ppp", features = ["log"]} diff --git a/examples/stm32c0/Cargo.toml b/examples/stm32c0/Cargo.toml index 6fdcdce5f..331046a80 100644 --- a/examples/stm32c0/Cargo.toml +++ b/examples/stm32c0/Cargo.toml @@ -9,7 +9,7 @@ license = "MIT OR Apache-2.0" embassy-stm32 = { version = "0.1.0", path = "../../embassy-stm32", features = [ "defmt", "time-driver-any", "stm32c031c6", "memory-x", "unstable-pac", "exti"] } embassy-sync = { version = "0.6.0", path = "../../embassy-sync", features = ["defmt"] } embassy-executor = { version = "0.5.0", path = "../../embassy-executor", features = ["arch-cortex-m", "executor-thread", "defmt", "integrated-timers"] } -embassy-time = { version = "0.3.0", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime", "tick-hz-32_768"] } +embassy-time = { version = "0.3.1", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime", "tick-hz-32_768"] } defmt = "0.3" defmt-rtt = "0.4" diff --git a/examples/stm32f0/Cargo.toml b/examples/stm32f0/Cargo.toml index 5b648e58a..15fb55ca7 100644 --- a/examples/stm32f0/Cargo.toml +++ b/examples/stm32f0/Cargo.toml @@ -14,7 +14,7 @@ defmt-rtt = "0.4" panic-probe = { version = "0.3", features = ["print-defmt"] } embassy-sync = { version = "0.6.0", path = "../../embassy-sync", features = ["defmt"] } embassy-executor = { version = "0.5.0", path = "../../embassy-executor", features = ["arch-cortex-m", "executor-thread", "executor-interrupt", "defmt", "integrated-timers"] } -embassy-time = { version = "0.3.0", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime", "tick-hz-32_768"] } +embassy-time = { version = "0.3.1", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime", "tick-hz-32_768"] } static_cell = "2" portable-atomic = { version = "1.5", features = ["unsafe-assume-single-core"] } diff --git a/examples/stm32f1/Cargo.toml b/examples/stm32f1/Cargo.toml index 51723ac6d..38b615795 100644 --- a/examples/stm32f1/Cargo.toml +++ b/examples/stm32f1/Cargo.toml @@ -9,7 +9,7 @@ license = "MIT OR Apache-2.0" embassy-stm32 = { version = "0.1.0", path = "../../embassy-stm32", features = [ "defmt", "stm32f103c8", "unstable-pac", "memory-x", "time-driver-any" ] } embassy-sync = { version = "0.6.0", path = "../../embassy-sync", features = ["defmt"] } embassy-executor = { version = "0.5.0", path = "../../embassy-executor", features = ["arch-cortex-m", "executor-thread", "defmt", "integrated-timers"] } -embassy-time = { version = "0.3.0", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime", "tick-hz-32_768"] } +embassy-time = { version = "0.3.1", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime", "tick-hz-32_768"] } embassy-usb = { version = "0.2.0", path = "../../embassy-usb", features = ["defmt"] } embassy-futures = { version = "0.1.0", path = "../../embassy-futures" } diff --git a/examples/stm32f2/Cargo.toml b/examples/stm32f2/Cargo.toml index 5d07b0e04..ec9b54920 100644 --- a/examples/stm32f2/Cargo.toml +++ b/examples/stm32f2/Cargo.toml @@ -9,7 +9,7 @@ license = "MIT OR Apache-2.0" embassy-stm32 = { version = "0.1.0", path = "../../embassy-stm32", features = [ "defmt", "stm32f207zg", "unstable-pac", "memory-x", "time-driver-any", "exti"] } embassy-sync = { version = "0.6.0", path = "../../embassy-sync", features = ["defmt"] } embassy-executor = { version = "0.5.0", path = "../../embassy-executor", features = ["arch-cortex-m", "executor-thread", "defmt", "integrated-timers"] } -embassy-time = { version = "0.3.0", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime", "tick-hz-32_768"] } +embassy-time = { version = "0.3.1", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime", "tick-hz-32_768"] } defmt = "0.3" defmt-rtt = "0.4" diff --git a/examples/stm32f3/Cargo.toml b/examples/stm32f3/Cargo.toml index 848a6b331..62c0fed16 100644 --- a/examples/stm32f3/Cargo.toml +++ b/examples/stm32f3/Cargo.toml @@ -9,7 +9,7 @@ license = "MIT OR Apache-2.0" embassy-stm32 = { version = "0.1.0", path = "../../embassy-stm32", features = [ "defmt", "stm32f303ze", "unstable-pac", "memory-x", "time-driver-any", "exti"] } embassy-sync = { version = "0.6.0", path = "../../embassy-sync", features = ["defmt"] } embassy-executor = { version = "0.5.0", path = "../../embassy-executor", features = ["arch-cortex-m", "executor-thread", "executor-interrupt", "defmt", "integrated-timers"] } -embassy-time = { version = "0.3.0", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime", "tick-hz-32_768"] } +embassy-time = { version = "0.3.1", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime", "tick-hz-32_768"] } embassy-usb = { version = "0.2.0", path = "../../embassy-usb", features = ["defmt"] } embassy-futures = { version = "0.1.0", path = "../../embassy-futures" } diff --git a/examples/stm32f334/Cargo.toml b/examples/stm32f334/Cargo.toml index 50046de56..84c44a7b7 100644 --- a/examples/stm32f334/Cargo.toml +++ b/examples/stm32f334/Cargo.toml @@ -7,7 +7,7 @@ license = "MIT OR Apache-2.0" [dependencies] embassy-sync = { version = "0.6.0", path = "../../embassy-sync", features = ["defmt"] } embassy-executor = { version = "0.5.0", path = "../../embassy-executor", features = ["arch-cortex-m", "executor-thread", "executor-interrupt", "defmt", "integrated-timers"] } -embassy-time = { version = "0.3.0", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime", "tick-hz-32_768"] } +embassy-time = { version = "0.3.1", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime", "tick-hz-32_768"] } embassy-stm32 = { version = "0.1.0", path = "../../embassy-stm32", features = [ "defmt", "stm32f334r8", "unstable-pac", "memory-x", "time-driver-any", "exti"] } embassy-usb = { version = "0.2.0", path = "../../embassy-usb", features = ["defmt"] } embassy-futures = { version = "0.1.0", path = "../../embassy-futures" } diff --git a/examples/stm32f4/Cargo.toml b/examples/stm32f4/Cargo.toml index 52b7ce9e8..ecc1afe78 100644 --- a/examples/stm32f4/Cargo.toml +++ b/examples/stm32f4/Cargo.toml @@ -9,7 +9,7 @@ license = "MIT OR Apache-2.0" embassy-stm32 = { version = "0.1.0", path = "../../embassy-stm32", features = ["defmt", "stm32f429zi", "unstable-pac", "memory-x", "time-driver-any", "exti", "chrono"] } embassy-sync = { version = "0.6.0", path = "../../embassy-sync", features = ["defmt"] } embassy-executor = { version = "0.5.0", path = "../../embassy-executor", features = ["task-arena-size-32768", "arch-cortex-m", "executor-thread", "executor-interrupt", "defmt", "integrated-timers"] } -embassy-time = { version = "0.3.0", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime", "tick-hz-32_768"] } +embassy-time = { version = "0.3.1", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime", "tick-hz-32_768"] } embassy-usb = { version = "0.2.0", path = "../../embassy-usb", features = ["defmt" ] } embassy-net = { version = "0.4.0", path = "../../embassy-net", features = ["defmt", "tcp", "dhcpv4", "medium-ethernet", ] } embassy-futures = { version = "0.1.0", path = "../../embassy-futures" } diff --git a/examples/stm32f469/Cargo.toml b/examples/stm32f469/Cargo.toml index 7718a46c1..634f13f4e 100644 --- a/examples/stm32f469/Cargo.toml +++ b/examples/stm32f469/Cargo.toml @@ -8,7 +8,7 @@ license = "MIT OR Apache-2.0" # Specific examples only for stm32f469 embassy-stm32 = { version = "0.1.0", path = "../../embassy-stm32", features = ["defmt", "stm32f469ni", "unstable-pac", "memory-x", "time-driver-any", "exti", "chrono"] } embassy-executor = { version = "0.5.0", path = "../../embassy-executor", features = ["task-arena-size-32768", "arch-cortex-m", "executor-thread", "executor-interrupt", "defmt", "integrated-timers"] } -embassy-time = { version = "0.3.0", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime", "tick-hz-32_768"] } +embassy-time = { version = "0.3.1", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime", "tick-hz-32_768"] } defmt = "0.3" defmt-rtt = "0.4" diff --git a/examples/stm32f7/Cargo.toml b/examples/stm32f7/Cargo.toml index b55c4e127..7fc7d6f42 100644 --- a/examples/stm32f7/Cargo.toml +++ b/examples/stm32f7/Cargo.toml @@ -9,7 +9,7 @@ license = "MIT OR Apache-2.0" embassy-stm32 = { version = "0.1.0", path = "../../embassy-stm32", features = ["defmt", "stm32f777zi", "memory-x", "unstable-pac", "time-driver-any", "exti"] } embassy-sync = { version = "0.6.0", path = "../../embassy-sync", features = ["defmt"] } embassy-executor = { version = "0.5.0", path = "../../embassy-executor", features = ["task-arena-size-32768", "arch-cortex-m", "executor-thread", "defmt", "integrated-timers"] } -embassy-time = { version = "0.3.0", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime", "tick-hz-32_768"] } +embassy-time = { version = "0.3.1", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime", "tick-hz-32_768"] } embassy-net = { version = "0.4.0", path = "../../embassy-net", features = ["defmt", "tcp", "dhcpv4", "medium-ethernet"] } embedded-io-async = { version = "0.6.1" } embassy-usb = { version = "0.2.0", path = "../../embassy-usb", features = ["defmt"] } diff --git a/examples/stm32g0/Cargo.toml b/examples/stm32g0/Cargo.toml index 122a996e5..15e58d5d1 100644 --- a/examples/stm32g0/Cargo.toml +++ b/examples/stm32g0/Cargo.toml @@ -9,7 +9,7 @@ license = "MIT OR Apache-2.0" embassy-stm32 = { version = "0.1.0", path = "../../embassy-stm32", features = [ "defmt", "time-driver-any", "stm32g0b1re", "memory-x", "unstable-pac", "exti"] } embassy-sync = { version = "0.6.0", path = "../../embassy-sync", features = ["defmt"] } embassy-executor = { version = "0.5.0", path = "../../embassy-executor", features = ["arch-cortex-m", "executor-thread", "defmt", "integrated-timers"] } -embassy-time = { version = "0.3.0", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime", "tick-hz-32_768"] } +embassy-time = { version = "0.3.1", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime", "tick-hz-32_768"] } embassy-usb = { version = "0.2.0", path = "../../embassy-usb", default-features = false, features = ["defmt"] } embassy-futures = { version = "0.1.0", path = "../../embassy-futures" } diff --git a/examples/stm32g4/Cargo.toml b/examples/stm32g4/Cargo.toml index 9a34ba19d..ac6010f5f 100644 --- a/examples/stm32g4/Cargo.toml +++ b/examples/stm32g4/Cargo.toml @@ -9,7 +9,7 @@ license = "MIT OR Apache-2.0" embassy-stm32 = { version = "0.1.0", path = "../../embassy-stm32", features = [ "defmt", "time-driver-any", "stm32g491re", "memory-x", "unstable-pac", "exti"] } embassy-sync = { version = "0.6.0", path = "../../embassy-sync", features = ["defmt"] } embassy-executor = { version = "0.5.0", path = "../../embassy-executor", features = ["arch-cortex-m", "executor-thread", "defmt", "integrated-timers"] } -embassy-time = { version = "0.3.0", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime", "tick-hz-32_768"] } +embassy-time = { version = "0.3.1", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime", "tick-hz-32_768"] } embassy-usb = { version = "0.2.0", path = "../../embassy-usb", features = ["defmt"] } embassy-futures = { version = "0.1.0", path = "../../embassy-futures" } usbd-hid = "0.7.0" diff --git a/examples/stm32h5/Cargo.toml b/examples/stm32h5/Cargo.toml index 87de9f3a4..59d3a9759 100644 --- a/examples/stm32h5/Cargo.toml +++ b/examples/stm32h5/Cargo.toml @@ -9,7 +9,7 @@ license = "MIT OR Apache-2.0" embassy-stm32 = { version = "0.1.0", path = "../../embassy-stm32", features = ["defmt", "stm32h563zi", "memory-x", "time-driver-any", "exti", "unstable-pac", "low-power"] } embassy-sync = { version = "0.6.0", path = "../../embassy-sync", features = ["defmt"] } embassy-executor = { version = "0.5.0", path = "../../embassy-executor", features = ["task-arena-size-32768", "arch-cortex-m", "executor-thread", "defmt", "integrated-timers"] } -embassy-time = { version = "0.3.0", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime", "tick-hz-32_768"] } +embassy-time = { version = "0.3.1", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime", "tick-hz-32_768"] } embassy-net = { version = "0.4.0", path = "../../embassy-net", features = ["defmt", "tcp", "dhcpv4", "medium-ethernet", "proto-ipv6"] } embassy-usb = { version = "0.2.0", path = "../../embassy-usb", features = ["defmt"] } embassy-futures = { version = "0.1.0", path = "../../embassy-futures" } diff --git a/examples/stm32h7/Cargo.toml b/examples/stm32h7/Cargo.toml index 14125f819..0584f3916 100644 --- a/examples/stm32h7/Cargo.toml +++ b/examples/stm32h7/Cargo.toml @@ -10,7 +10,7 @@ embassy-stm32 = { version = "0.1.0", path = "../../embassy-stm32", features = [" embassy-sync = { version = "0.6.0", path = "../../embassy-sync", features = ["defmt"] } embassy-embedded-hal = { version = "0.1.0", path = "../../embassy-embedded-hal" } embassy-executor = { version = "0.5.0", path = "../../embassy-executor", features = ["task-arena-size-32768", "arch-cortex-m", "executor-thread", "executor-interrupt", "defmt", "integrated-timers"] } -embassy-time = { version = "0.3.0", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime", "tick-hz-32_768"] } +embassy-time = { version = "0.3.1", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime", "tick-hz-32_768"] } embassy-net = { version = "0.4.0", path = "../../embassy-net", features = ["defmt", "tcp", "dhcpv4", "medium-ethernet", "proto-ipv6", "dns"] } embassy-usb = { version = "0.2.0", path = "../../embassy-usb", features = ["defmt"] } embassy-futures = { version = "0.1.0", path = "../../embassy-futures" } diff --git a/examples/stm32h7rs/Cargo.toml b/examples/stm32h7rs/Cargo.toml index f8c49f3d1..13d33320f 100644 --- a/examples/stm32h7rs/Cargo.toml +++ b/examples/stm32h7rs/Cargo.toml @@ -9,7 +9,7 @@ license = "MIT OR Apache-2.0" embassy-stm32 = { version = "0.1.0", path = "../../embassy-stm32", features = ["defmt", "stm32h7s3l8", "time-driver-tim2", "exti", "memory-x", "unstable-pac", "chrono"] } embassy-sync = { version = "0.6.0", path = "../../embassy-sync", features = ["defmt"] } embassy-executor = { version = "0.5.0", path = "../../embassy-executor", features = ["task-arena-size-32768", "arch-cortex-m", "executor-thread", "executor-interrupt", "defmt", "integrated-timers"] } -embassy-time = { version = "0.3.0", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime", "tick-hz-32_768"] } +embassy-time = { version = "0.3.1", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime", "tick-hz-32_768"] } embassy-net = { version = "0.4.0", path = "../../embassy-net", features = ["defmt", "tcp", "dhcpv4", "medium-ethernet", "proto-ipv6", "dns"] } embassy-usb = { version = "0.2.0", path = "../../embassy-usb", features = ["defmt"] } embassy-futures = { version = "0.1.0", path = "../../embassy-futures" } diff --git a/examples/stm32l0/Cargo.toml b/examples/stm32l0/Cargo.toml index b6de182e1..2c599e7a3 100644 --- a/examples/stm32l0/Cargo.toml +++ b/examples/stm32l0/Cargo.toml @@ -9,7 +9,7 @@ license = "MIT OR Apache-2.0" embassy-stm32 = { version = "0.1.0", path = "../../embassy-stm32", features = ["defmt", "stm32l072cz", "time-driver-any", "exti", "memory-x"] } embassy-sync = { version = "0.6.0", path = "../../embassy-sync", features = ["defmt"] } embassy-executor = { version = "0.5.0", path = "../../embassy-executor", features = ["arch-cortex-m", "executor-thread", "defmt", "integrated-timers"] } -embassy-time = { version = "0.3.0", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime", "tick-hz-32_768"] } +embassy-time = { version = "0.3.1", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime", "tick-hz-32_768"] } defmt = "0.3" defmt-rtt = "0.4" diff --git a/examples/stm32l1/Cargo.toml b/examples/stm32l1/Cargo.toml index 17887bc14..9e4ceac6a 100644 --- a/examples/stm32l1/Cargo.toml +++ b/examples/stm32l1/Cargo.toml @@ -7,7 +7,7 @@ license = "MIT OR Apache-2.0" [dependencies] embassy-sync = { version = "0.6.0", path = "../../embassy-sync", features = ["defmt"] } embassy-executor = { version = "0.5.0", path = "../../embassy-executor", features = ["arch-cortex-m", "executor-thread", "defmt", "integrated-timers"] } -embassy-time = { version = "0.3.0", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime", "tick-hz-32_768"] } +embassy-time = { version = "0.3.1", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime", "tick-hz-32_768"] } embassy-stm32 = { version = "0.1.0", path = "../../embassy-stm32", features = [ "defmt", "stm32l151cb-a", "time-driver-any", "memory-x"] } embassy-usb = { version = "0.2.0", path = "../../embassy-usb", features = ["defmt"] } embassy-futures = { version = "0.1.0", path = "../../embassy-futures" } diff --git a/examples/stm32l4/Cargo.toml b/examples/stm32l4/Cargo.toml index 37f09bbcc..de2b2bd4d 100644 --- a/examples/stm32l4/Cargo.toml +++ b/examples/stm32l4/Cargo.toml @@ -9,7 +9,7 @@ license = "MIT OR Apache-2.0" embassy-stm32 = { version = "0.1.0", path = "../../embassy-stm32", features = [ "defmt", "unstable-pac", "stm32l4s5qi", "memory-x", "time-driver-any", "exti", "chrono"] } embassy-sync = { version = "0.6.0", path = "../../embassy-sync", features = ["defmt"] } embassy-executor = { version = "0.5.0", path = "../../embassy-executor", features = ["task-arena-size-32768", "arch-cortex-m", "executor-thread", "defmt", "integrated-timers"] } -embassy-time = { version = "0.3.0", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime", "tick-hz-32_768", ] } +embassy-time = { version = "0.3.1", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime", "tick-hz-32_768", ] } embassy-embedded-hal = { version = "0.1.0", path = "../../embassy-embedded-hal" } embassy-usb = { version = "0.2.0", path = "../../embassy-usb", features = ["defmt"] } embassy-net-adin1110 = { version = "0.2.0", path = "../../embassy-net-adin1110" } diff --git a/examples/stm32l5/Cargo.toml b/examples/stm32l5/Cargo.toml index 910b8e6d1..e4a3c8e9c 100644 --- a/examples/stm32l5/Cargo.toml +++ b/examples/stm32l5/Cargo.toml @@ -9,7 +9,7 @@ license = "MIT OR Apache-2.0" embassy-stm32 = { version = "0.1.0", path = "../../embassy-stm32", features = [ "defmt", "unstable-pac", "stm32l552ze", "time-driver-any", "exti", "memory-x", "low-power"] } embassy-sync = { version = "0.6.0", path = "../../embassy-sync", features = ["defmt"] } embassy-executor = { version = "0.5.0", path = "../../embassy-executor", features = ["task-arena-size-32768", "arch-cortex-m", "executor-thread", "defmt", "integrated-timers"] } -embassy-time = { version = "0.3.0", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime", "tick-hz-32_768"] } +embassy-time = { version = "0.3.1", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime", "tick-hz-32_768"] } embassy-usb = { version = "0.2.0", path = "../../embassy-usb", features = ["defmt"] } embassy-net = { version = "0.4.0", path = "../../embassy-net", features = ["defmt", "tcp", "dhcpv4", "medium-ethernet"] } embassy-futures = { version = "0.1.0", path = "../../embassy-futures" } diff --git a/examples/stm32u0/Cargo.toml b/examples/stm32u0/Cargo.toml index e67856853..afeb4dc34 100644 --- a/examples/stm32u0/Cargo.toml +++ b/examples/stm32u0/Cargo.toml @@ -9,7 +9,7 @@ license = "MIT OR Apache-2.0" embassy-stm32 = { version = "0.1.0", path = "../../embassy-stm32", features = [ "defmt", "time-driver-any", "stm32u083rc", "memory-x", "unstable-pac", "exti", "chrono"] } embassy-sync = { version = "0.6.0", path = "../../embassy-sync", features = ["defmt"] } embassy-executor = { version = "0.5.0", path = "../../embassy-executor", features = ["arch-cortex-m", "executor-thread", "defmt", "integrated-timers"] } -embassy-time = { version = "0.3.0", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime", "tick-hz-32_768"] } +embassy-time = { version = "0.3.1", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime", "tick-hz-32_768"] } embassy-usb = { version = "0.2.0", path = "../../embassy-usb", default-features = false, features = ["defmt"] } embassy-futures = { version = "0.1.0", path = "../../embassy-futures" } diff --git a/examples/stm32u5/Cargo.toml b/examples/stm32u5/Cargo.toml index 24c9263a3..d0134b972 100644 --- a/examples/stm32u5/Cargo.toml +++ b/examples/stm32u5/Cargo.toml @@ -9,7 +9,7 @@ license = "MIT OR Apache-2.0" embassy-stm32 = { version = "0.1.0", path = "../../embassy-stm32", features = ["defmt", "unstable-pac", "stm32u585ai", "time-driver-any", "memory-x" ] } embassy-sync = { version = "0.6.0", path = "../../embassy-sync", features = ["defmt"] } embassy-executor = { version = "0.5.0", path = "../../embassy-executor", features = ["task-arena-size-32768", "arch-cortex-m", "executor-thread", "defmt", "integrated-timers"] } -embassy-time = { version = "0.3.0", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime", "tick-hz-32_768"] } +embassy-time = { version = "0.3.1", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime", "tick-hz-32_768"] } embassy-usb = { version = "0.2.0", path = "../../embassy-usb", features = ["defmt"] } embassy-futures = { version = "0.1.0", path = "../../embassy-futures" } diff --git a/examples/stm32wb/Cargo.toml b/examples/stm32wb/Cargo.toml index 92865b41c..c3a11b14b 100644 --- a/examples/stm32wb/Cargo.toml +++ b/examples/stm32wb/Cargo.toml @@ -10,7 +10,7 @@ embassy-stm32 = { version = "0.1.0", path = "../../embassy-stm32", features = [ embassy-stm32-wpan = { version = "0.1.0", path = "../../embassy-stm32-wpan", features = ["defmt", "stm32wb55rg"] } embassy-sync = { version = "0.6.0", path = "../../embassy-sync", features = ["defmt"] } embassy-executor = { version = "0.5.0", path = "../../embassy-executor", features = ["task-arena-size-32768", "arch-cortex-m", "executor-thread", "defmt", "integrated-timers"] } -embassy-time = { version = "0.3.0", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime", "tick-hz-32_768"] } +embassy-time = { version = "0.3.1", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime", "tick-hz-32_768"] } embassy-net = { version = "0.4.0", path = "../../embassy-net", features = ["defmt", "udp", "proto-ipv6", "medium-ieee802154", ], optional=true } defmt = "0.3" diff --git a/examples/stm32wba/Cargo.toml b/examples/stm32wba/Cargo.toml index 60f6e9201..dc788e15b 100644 --- a/examples/stm32wba/Cargo.toml +++ b/examples/stm32wba/Cargo.toml @@ -8,7 +8,7 @@ license = "MIT OR Apache-2.0" embassy-stm32 = { version = "0.1.0", path = "../../embassy-stm32", features = [ "defmt", "stm32wba52cg", "time-driver-any", "memory-x", "exti"] } embassy-sync = { version = "0.6.0", path = "../../embassy-sync", features = ["defmt"] } embassy-executor = { version = "0.5.0", path = "../../embassy-executor", features = ["task-arena-size-32768", "arch-cortex-m", "executor-thread", "defmt", "integrated-timers"] } -embassy-time = { version = "0.3.0", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime", "tick-hz-32_768"] } +embassy-time = { version = "0.3.1", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime", "tick-hz-32_768"] } embassy-net = { version = "0.4.0", path = "../../embassy-net", features = ["defmt", "udp", "proto-ipv6", "medium-ieee802154", ], optional=true } defmt = "0.3" diff --git a/examples/stm32wl/Cargo.toml b/examples/stm32wl/Cargo.toml index 29cd4d466..3ea7d0cbe 100644 --- a/examples/stm32wl/Cargo.toml +++ b/examples/stm32wl/Cargo.toml @@ -9,7 +9,7 @@ license = "MIT OR Apache-2.0" embassy-stm32 = { version = "0.1.0", path = "../../embassy-stm32", features = ["defmt", "stm32wl55jc-cm4", "time-driver-any", "memory-x", "unstable-pac", "exti", "chrono"] } embassy-sync = { version = "0.6.0", path = "../../embassy-sync", features = ["defmt"] } embassy-executor = { version = "0.5.0", path = "../../embassy-executor", features = ["task-arena-size-4096", "arch-cortex-m", "executor-thread", "defmt", "integrated-timers"] } -embassy-time = { version = "0.3.0", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime", "tick-hz-32_768"] } +embassy-time = { version = "0.3.1", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime", "tick-hz-32_768"] } embassy-embedded-hal = { version = "0.1.0", path = "../../embassy-embedded-hal" } defmt = "0.3" diff --git a/examples/wasm/Cargo.toml b/examples/wasm/Cargo.toml index e7840d52e..9d7acc175 100644 --- a/examples/wasm/Cargo.toml +++ b/examples/wasm/Cargo.toml @@ -10,7 +10,7 @@ crate-type = ["cdylib"] [dependencies] embassy-sync = { version = "0.6.0", path = "../../embassy-sync", features = ["log"] } embassy-executor = { version = "0.5.0", path = "../../embassy-executor", features = ["arch-wasm", "executor-thread", "log", "integrated-timers"] } -embassy-time = { version = "0.3.0", path = "../../embassy-time", features = ["log", "wasm", ] } +embassy-time = { version = "0.3.1", path = "../../embassy-time", features = ["log", "wasm", ] } wasm-logger = "0.2.0" wasm-bindgen = "0.2" diff --git a/tests/nrf51422/Cargo.toml b/tests/nrf51422/Cargo.toml index 70de9d321..8bfcc2922 100644 --- a/tests/nrf51422/Cargo.toml +++ b/tests/nrf51422/Cargo.toml @@ -10,7 +10,7 @@ teleprobe-meta = "1" embassy-futures = { version = "0.1.0", path = "../../embassy-futures" } embassy-sync = { version = "0.6.0", path = "../../embassy-sync", features = ["defmt", ] } embassy-executor = { version = "0.5.0", path = "../../embassy-executor", features = ["arch-cortex-m", "executor-thread", "defmt", "task-arena-size-128", "integrated-timers"] } -embassy-time = { version = "0.3.0", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime"] } +embassy-time = { version = "0.3.1", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime"] } embassy-nrf = { version = "0.1.0", path = "../../embassy-nrf", features = ["defmt", "nrf51", "time-driver-rtc1", "unstable-pac", "time", "gpiote"] } embedded-io-async = { version = "0.6.1", features = ["defmt-03"] } embedded-hal-async = { version = "1.0" } diff --git a/tests/nrf52840/Cargo.toml b/tests/nrf52840/Cargo.toml index 4b89ec569..1670b92ad 100644 --- a/tests/nrf52840/Cargo.toml +++ b/tests/nrf52840/Cargo.toml @@ -10,7 +10,7 @@ teleprobe-meta = "1" embassy-futures = { version = "0.1.0", path = "../../embassy-futures" } embassy-sync = { version = "0.6.0", path = "../../embassy-sync", features = ["defmt", ] } embassy-executor = { version = "0.5.0", path = "../../embassy-executor", features = ["arch-cortex-m", "executor-thread", "defmt", "task-arena-size-16384", "integrated-timers"] } -embassy-time = { version = "0.3.0", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime"] } +embassy-time = { version = "0.3.1", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime"] } embassy-nrf = { version = "0.1.0", path = "../../embassy-nrf", features = ["defmt", "nrf52840", "time-driver-rtc1", "gpiote", "unstable-pac"] } embedded-io-async = { version = "0.6.1", features = ["defmt-03"] } embassy-net = { version = "0.4.0", path = "../../embassy-net", features = ["defmt", "tcp", "dhcpv4", "medium-ethernet", ] } diff --git a/tests/perf-client/Cargo.toml b/tests/perf-client/Cargo.toml index a347608b3..6ecc2d5e1 100644 --- a/tests/perf-client/Cargo.toml +++ b/tests/perf-client/Cargo.toml @@ -5,6 +5,6 @@ edition = "2021" [dependencies] embassy-net = { version = "0.4.0", path = "../../embassy-net", features = ["defmt", "tcp", "dhcpv4"] } -embassy-time = { version = "0.3.0", path = "../../embassy-time", features = ["defmt", ] } +embassy-time = { version = "0.3.1", path = "../../embassy-time", features = ["defmt", ] } embassy-futures = { version = "0.1.0", path = "../../embassy-futures" } defmt = "0.3.0" diff --git a/tests/riscv32/Cargo.toml b/tests/riscv32/Cargo.toml index 909f9a72c..4f1d3e5c6 100644 --- a/tests/riscv32/Cargo.toml +++ b/tests/riscv32/Cargo.toml @@ -8,7 +8,7 @@ license = "MIT OR Apache-2.0" critical-section = { version = "1.1.1", features = ["restore-state-bool"] } embassy-sync = { version = "0.6.0", path = "../../embassy-sync" } embassy-executor = { version = "0.5.0", path = "../../embassy-executor", features = ["arch-riscv32", "executor-thread"] } -embassy-time = { version = "0.3.0", path = "../../embassy-time" } +embassy-time = { version = "0.3.1", path = "../../embassy-time" } embassy-futures = { version = "0.1.0", path = "../../embassy-futures" } riscv-rt = "0.12.2" diff --git a/tests/rp/Cargo.toml b/tests/rp/Cargo.toml index b7eee92e8..45050ee0e 100644 --- a/tests/rp/Cargo.toml +++ b/tests/rp/Cargo.toml @@ -9,7 +9,7 @@ teleprobe-meta = "1.1" embassy-sync = { version = "0.6.0", path = "../../embassy-sync", features = ["defmt"] } embassy-executor = { version = "0.5.0", path = "../../embassy-executor", features = ["task-arena-size-32768", "arch-cortex-m", "executor-thread", "defmt", "integrated-timers"] } -embassy-time = { version = "0.3.0", path = "../../embassy-time", features = ["defmt", ] } +embassy-time = { version = "0.3.1", path = "../../embassy-time", features = ["defmt", ] } embassy-rp = { version = "0.1.0", path = "../../embassy-rp", features = [ "defmt", "unstable-pac", "time-driver", "critical-section-impl", "intrinsics", "rom-v2-intrinsics", "run-from-ram"] } embassy-futures = { version = "0.1.0", path = "../../embassy-futures" } embassy-net = { version = "0.4.0", path = "../../embassy-net", features = ["defmt", "tcp", "udp", "dhcpv4", "medium-ethernet"] } diff --git a/tests/stm32/Cargo.toml b/tests/stm32/Cargo.toml index de390ee38..f94814e70 100644 --- a/tests/stm32/Cargo.toml +++ b/tests/stm32/Cargo.toml @@ -61,7 +61,7 @@ teleprobe-meta = "1" embassy-sync = { version = "0.6.0", path = "../../embassy-sync", features = ["defmt"] } embassy-executor = { version = "0.5.0", path = "../../embassy-executor", features = ["arch-cortex-m", "executor-thread", "defmt", "integrated-timers"] } -embassy-time = { version = "0.3.0", path = "../../embassy-time", features = ["defmt", "tick-hz-131_072", "defmt-timestamp-uptime"] } +embassy-time = { version = "0.3.1", path = "../../embassy-time", features = ["defmt", "tick-hz-131_072", "defmt-timestamp-uptime"] } embassy-stm32 = { version = "0.1.0", path = "../../embassy-stm32", features = [ "defmt", "unstable-pac", "memory-x", "time-driver-any"] } embassy-futures = { version = "0.1.0", path = "../../embassy-futures" } embassy-stm32-wpan = { version = "0.1.0", path = "../../embassy-stm32-wpan", optional = true, features = ["defmt", "stm32wb55rg", "ble"] } From 4ebd8af96f2ad89c0167249a187894dc8d656412 Mon Sep 17 00:00:00 2001 From: Ulf Lilleengen Date: Tue, 4 Jun 2024 09:19:07 +0200 Subject: [PATCH 459/581] add convenience script to bump dependency version --- release/bump-dependency.sh | 11 +++++++++++ 1 file changed, 11 insertions(+) create mode 100755 release/bump-dependency.sh diff --git a/release/bump-dependency.sh b/release/bump-dependency.sh new file mode 100755 index 000000000..07511d229 --- /dev/null +++ b/release/bump-dependency.sh @@ -0,0 +1,11 @@ +#!/usr/bin/env bash +# A helper script to bump version dependencies of a crate to a particular version. It does +# not bump the version of the crate itself, only its entries in dependency lists. +# +# Usage (from the embassy repo folder): ./release/bump-dependency.sh embassy-time 0.4.0 +# +# As a sanity check, after running this script, grep for old versions. +# +CRATE=$1 +TARGET_VER=$2 +find . -name "Cargo.toml" | xargs sed -rie "s/($CRATE = \{.*version = \")[0-9]+.[0-9]+.?[0-9]*(\".*)/\1$TARGET_VER\2/g" From a516dbd5e27e73d4e2c245d8903c57d97186cbaa Mon Sep 17 00:00:00 2001 From: Gustav Toft Date: Wed, 5 Jun 2024 08:14:35 +0200 Subject: [PATCH 460/581] CYW43: Add function to close existing soft AP --- cyw43/src/control.rs | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/cyw43/src/control.rs b/cyw43/src/control.rs index cd890c982..0a8cb9c8c 100644 --- a/cyw43/src/control.rs +++ b/cyw43/src/control.rs @@ -393,6 +393,23 @@ impl<'a> Control<'a> { self.set_iovar_u32x2("bss", 0, 1).await; // bss = BSS_UP } + pub async fn close_ap(&mut self) { + // Stop AP + self.set_iovar_u32x2("bss", 0, 0).await; // bss = BSS_DOWN + + // Turn off AP mode + self.ioctl_set_u32(IOCTL_CMD_SET_AP, 0, 0).await; + + // Temporarily set wifi down + self.down().await; + + // Turn on APSTA mode + self.set_iovar_u32("apsta", 1).await; + + // Set wifi up again + self.up().await; + } + /// Add specified address to the list of hardware addresses the device /// listens on. The address must be a Group address (I/G bit set). Up /// to 10 addresses are supported by the firmware. Returns the number of From 36107996185fdb7b4db2b2f2bc927033cf6d4e41 Mon Sep 17 00:00:00 2001 From: Gustav Toft Date: Wed, 5 Jun 2024 08:33:55 +0200 Subject: [PATCH 461/581] Added docs. --- cyw43/src/control.rs | 1 + 1 file changed, 1 insertion(+) diff --git a/cyw43/src/control.rs b/cyw43/src/control.rs index 0a8cb9c8c..8944865c1 100644 --- a/cyw43/src/control.rs +++ b/cyw43/src/control.rs @@ -393,6 +393,7 @@ impl<'a> Control<'a> { self.set_iovar_u32x2("bss", 0, 1).await; // bss = BSS_UP } + /// Closes access point. pub async fn close_ap(&mut self) { // Stop AP self.set_iovar_u32x2("bss", 0, 0).await; // bss = BSS_DOWN From bf36bec9bb85caea613687ab9e0c1652f414b95c Mon Sep 17 00:00:00 2001 From: kalkyl Date: Wed, 5 Jun 2024 09:42:08 +0200 Subject: [PATCH 462/581] rp: Add multichannel ADC --- embassy-rp/src/adc.rs | 71 +++++++++++++++++++++++++++++++--- examples/rp/src/bin/adc_dma.rs | 54 ++++++++++++++++++++++++++ tests/rp/src/bin/adc.rs | 13 +++++++ 3 files changed, 133 insertions(+), 5 deletions(-) create mode 100644 examples/rp/src/bin/adc_dma.rs diff --git a/embassy-rp/src/adc.rs b/embassy-rp/src/adc.rs index 101c5b71f..be453d08e 100644 --- a/embassy-rp/src/adc.rs +++ b/embassy-rp/src/adc.rs @@ -221,16 +221,26 @@ impl<'d> Adc<'d, Async> { async fn read_many_inner( &mut self, - ch: &mut Channel<'_>, + channels: impl Iterator, buf: &mut [W], fcs_err: bool, div: u16, dma: impl Peripheral

, ) -> Result<(), Error> { + let mut rrobin = 0_u8; + for c in channels { + rrobin |= 1 << c; + } + let first_ch = rrobin.trailing_zeros() as u8; + if rrobin.count_ones() == 1 { + rrobin = 0; + } + let r = Self::regs(); // clear previous errors and set channel r.cs().modify(|w| { - w.set_ainsel(ch.channel()); + w.set_ainsel(first_ch); + w.set_rrobin(rrobin); w.set_err_sticky(true); // clear previous errors w.set_start_many(false); }); @@ -283,7 +293,49 @@ impl<'d> Adc<'d, Async> { } } + /// Sample multiple values from multiple channels using DMA. + /// Samples are stored in an interleaved fashion inside the buffer. + /// `div` is the integer part of the clock divider and can be calculated with `floor(48MHz / sample_rate * num_channels - 1)` + /// Any `div` value of less than 96 will have the same effect as setting it to 0 + #[inline] + pub async fn read_many_multichannel( + &mut self, + ch: &mut [Channel<'_>], + buf: &mut [S], + div: u16, + dma: impl Peripheral

, + ) -> Result<(), Error> { + self.read_many_inner(ch.iter().map(|c| c.channel()), buf, false, div, dma) + .await + } + + /// Sample multiple values from multiple channels using DMA, with errors inlined in samples. + /// Samples are stored in an interleaved fashion inside the buffer. + /// `div` is the integer part of the clock divider and can be calculated with `floor(48MHz / sample_rate * num_channels - 1)` + /// Any `div` value of less than 96 will have the same effect as setting it to 0 + #[inline] + pub async fn read_many_multichannel_raw( + &mut self, + ch: &mut [Channel<'_>], + buf: &mut [Sample], + div: u16, + dma: impl Peripheral

, + ) { + // errors are reported in individual samples + let _ = self + .read_many_inner( + ch.iter().map(|c| c.channel()), + unsafe { mem::transmute::<_, &mut [u16]>(buf) }, + true, + div, + dma, + ) + .await; + } + /// Sample multiple values from a channel using DMA. + /// `div` is the integer part of the clock divider and can be calculated with `floor(48MHz / sample_rate - 1)` + /// Any `div` value of less than 96 will have the same effect as setting it to 0 #[inline] pub async fn read_many( &mut self, @@ -292,10 +344,13 @@ impl<'d> Adc<'d, Async> { div: u16, dma: impl Peripheral

, ) -> Result<(), Error> { - self.read_many_inner(ch, buf, false, div, dma).await + self.read_many_inner([ch.channel()].into_iter(), buf, false, div, dma) + .await } - /// Sample multiple values from a channel using DMA with errors inlined in samples. + /// Sample multiple values from a channel using DMA, with errors inlined in samples. + /// `div` is the integer part of the clock divider and can be calculated with `floor(48MHz / sample_rate - 1)` + /// Any `div` value of less than 96 will have the same effect as setting it to 0 #[inline] pub async fn read_many_raw( &mut self, @@ -306,7 +361,13 @@ impl<'d> Adc<'d, Async> { ) { // errors are reported in individual samples let _ = self - .read_many_inner(ch, unsafe { mem::transmute::<_, &mut [u16]>(buf) }, true, div, dma) + .read_many_inner( + [ch.channel()].into_iter(), + unsafe { mem::transmute::<_, &mut [u16]>(buf) }, + true, + div, + dma, + ) .await; } } diff --git a/examples/rp/src/bin/adc_dma.rs b/examples/rp/src/bin/adc_dma.rs new file mode 100644 index 000000000..f755cf5bf --- /dev/null +++ b/examples/rp/src/bin/adc_dma.rs @@ -0,0 +1,54 @@ +//! This example shows how to use the RP2040 ADC with DMA, both single- and multichannel reads. +//! For multichannel, the samples are interleaved in the buffer: +//! `[ch1, ch2, ch3, ch4, ch1, ch2, ch3, ch4, ...]` +#![no_std] +#![no_main] + +use defmt::*; +use embassy_executor::Spawner; +use embassy_rp::adc::{Adc, Channel, Config, InterruptHandler}; +use embassy_rp::bind_interrupts; +use embassy_rp::gpio::Pull; +use embassy_time::{Duration, Ticker}; +use {defmt_rtt as _, panic_probe as _}; + +bind_interrupts!(struct Irqs { + ADC_IRQ_FIFO => InterruptHandler; +}); + +#[embassy_executor::main] +async fn main(_spawner: Spawner) { + let p = embassy_rp::init(Default::default()); + info!("Here we go!"); + + let mut adc = Adc::new(p.ADC, Irqs, Config::default()); + let mut dma = p.DMA_CH0; + let mut pin = Channel::new_pin(p.PIN_26, Pull::Up); + let mut pins = [ + Channel::new_pin(p.PIN_27, Pull::Down), + Channel::new_pin(p.PIN_28, Pull::None), + Channel::new_pin(p.PIN_29, Pull::Up), + Channel::new_temp_sensor(p.ADC_TEMP_SENSOR), + ]; + + const BLOCK_SIZE: usize = 100; + const NUM_CHANNELS: usize = 4; + let mut ticker = Ticker::every(Duration::from_secs(1)); + loop { + // Read 100 samples from a single channel + let mut buf = [0_u16; BLOCK_SIZE]; + let div = 479; // 100kHz sample rate (48Mhz / 100kHz - 1) + adc.read_many(&mut pin, &mut buf, div, &mut dma).await.unwrap(); + info!("single: {:?} ...etc", buf[..8]); + + // Read 100 samples from 4 channels interleaved + let mut buf = [0_u16; { BLOCK_SIZE * NUM_CHANNELS }]; + let div = 119; // 100kHz sample rate (48Mhz / 100kHz * 4ch - 1) + adc.read_many_multichannel(&mut pins, &mut buf, div, &mut dma) + .await + .unwrap(); + info!("multi: {:?} ...etc", buf[..NUM_CHANNELS * 2]); + + ticker.next().await; + } +} diff --git a/tests/rp/src/bin/adc.rs b/tests/rp/src/bin/adc.rs index 29eda95bf..0f13e626f 100644 --- a/tests/rp/src/bin/adc.rs +++ b/tests/rp/src/bin/adc.rs @@ -130,6 +130,19 @@ async fn main(_spawner: Spawner) { defmt::assert!(temp.iter().all(|t| *t > 0.0)); defmt::assert!(temp.iter().all(|t| *t < 60.0)); } + { + let mut multi = [0u16; 2]; + let mut channels = [ + Channel::new_pin(&mut p.PIN_29, Pull::Up), + Channel::new_temp_sensor(&mut p.ADC_TEMP_SENSOR), + ]; + adc.read_many_multichannel(&mut channels, &mut multi, 1, &mut p.DMA_CH0) + .await + .unwrap(); + defmt::assert!(multi[0] > 3_000); + let temp = convert_to_celsius(multi[1]); + defmt::assert!(temp > 0.0 && temp < 60.0); + } info!("Test OK"); cortex_m::asm::bkpt(); From 673d11f49fd6b24f611f668cdc8e19be50d785df Mon Sep 17 00:00:00 2001 From: Philip Reimer Date: Wed, 5 Jun 2024 15:28:18 -0600 Subject: [PATCH 463/581] add send_queue and recv_queue --- embassy-net/src/tcp.rs | 32 ++++++++++++++++++++++++++++++++ 1 file changed, 32 insertions(+) diff --git a/embassy-net/src/tcp.rs b/embassy-net/src/tcp.rs index 9dfbba32b..906102bbf 100644 --- a/embassy-net/src/tcp.rs +++ b/embassy-net/src/tcp.rs @@ -98,6 +98,13 @@ impl<'a> TcpReader<'a> { pub fn recv_capacity(&self) -> usize { self.io.recv_capacity() } + + /// Return the amount of octets queued in the receive buffer. This value can be larger than + /// the slice read by the next `recv` or `peek` call because it includes all queued octets, + /// and not only the octets that may be returned as a contiguous slice. + pub fn recv_queue(&self) -> usize { + self.io.recv_queue() + } } impl<'a> TcpWriter<'a> { @@ -132,6 +139,11 @@ impl<'a> TcpWriter<'a> { pub fn send_capacity(&self) -> usize { self.io.send_capacity() } + + /// Return the amount of octets queued in the transmit buffer. + pub fn send_queue(&self) -> usize { + self.io.send_queue() + } } impl<'a> TcpSocket<'a> { @@ -163,6 +175,18 @@ impl<'a> TcpSocket<'a> { self.io.send_capacity() } + /// Return the amount of octets queued in the transmit buffer. + pub fn send_queue(&self) -> usize { + self.io.send_queue() + } + + /// Return the amount of octets queued in the receive buffer. This value can be larger than + /// the slice read by the next `recv` or `peek` call because it includes all queued octets, + /// and not only the octets that may be returned as a contiguous slice. + pub fn recv_queue(&self) -> usize { + self.io.recv_queue() + } + /// Call `f` with the largest contiguous slice of octets in the transmit buffer, /// and enqueue the amount of elements returned by `f`. /// @@ -519,6 +543,14 @@ impl<'d> TcpIo<'d> { fn send_capacity(&self) -> usize { self.with(|s, _| s.send_capacity()) } + + fn send_queue(&self) -> usize { + self.with(|s, _| s.send_queue()) + } + + fn recv_queue(&self) -> usize { + self.with(|s, _| s.recv_queue()) + } } mod embedded_io_impls { From 3e85fb4f52678740d8fd2dc53ad4f5f3979028cc Mon Sep 17 00:00:00 2001 From: Jesse Stuart Date: Wed, 5 Jun 2024 20:22:48 -0400 Subject: [PATCH 464/581] embassy-sync: remove T: Send for Signal --- embassy-sync/src/signal.rs | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/embassy-sync/src/signal.rs b/embassy-sync/src/signal.rs index 520f1a896..a0f4b5a74 100644 --- a/embassy-sync/src/signal.rs +++ b/embassy-sync/src/signal.rs @@ -65,7 +65,7 @@ where } } -impl Signal +impl Signal where M: RawMutex, { From 871fe3a5493961e81ec41ddc8f000f32b0549e71 Mon Sep 17 00:00:00 2001 From: dvdsk Date: Thu, 6 Jun 2024 23:19:07 +0200 Subject: [PATCH 465/581] Add Clone and Copy to Error types None of them are `non-exaustative`, they are all small enough to be copy (I estimate none are larger than 4 bytes). --- embassy-rp/src/i2c.rs | 4 ++-- embassy-rp/src/i2c_slave.rs | 2 +- embassy-rp/src/rtc/datetime_chrono.rs | 2 +- embassy-rp/src/rtc/datetime_no_deps.rs | 2 +- embassy-stm32/src/dsihost.rs | 2 +- embassy-stm32/src/i2c/mod.rs | 2 +- embassy-stm32/src/rng.rs | 2 +- embassy-stm32/src/sai/mod.rs | 2 +- embassy-stm32/src/spi/mod.rs | 2 +- embassy-stm32/src/tsc/mod.rs | 2 +- embassy-sync/src/pubsub/mod.rs | 2 +- 11 files changed, 12 insertions(+), 12 deletions(-) diff --git a/embassy-rp/src/i2c.rs b/embassy-rp/src/i2c.rs index 256875b4a..10ccca674 100644 --- a/embassy-rp/src/i2c.rs +++ b/embassy-rp/src/i2c.rs @@ -12,7 +12,7 @@ use crate::interrupt::typelevel::{Binding, Interrupt}; use crate::{interrupt, pac, peripherals, Peripheral}; /// I2C error abort reason -#[derive(Debug, PartialEq, Eq)] +#[derive(Debug, PartialEq, Eq, Clone, Copy)] #[cfg_attr(feature = "defmt", derive(defmt::Format))] pub enum AbortReason { /// A bus operation was not acknowledged, e.g. due to the addressed device @@ -28,7 +28,7 @@ pub enum AbortReason { } /// I2C error -#[derive(Debug, PartialEq, Eq)] +#[derive(Debug, PartialEq, Eq, Clone, Copy)] #[cfg_attr(feature = "defmt", derive(defmt::Format))] pub enum Error { /// I2C abort with error diff --git a/embassy-rp/src/i2c_slave.rs b/embassy-rp/src/i2c_slave.rs index e2d4fbac0..c46a55d2e 100644 --- a/embassy-rp/src/i2c_slave.rs +++ b/embassy-rp/src/i2c_slave.rs @@ -13,7 +13,7 @@ use crate::interrupt::typelevel::{Binding, Interrupt}; use crate::{pac, Peripheral}; /// I2C error -#[derive(Debug, PartialEq, Eq)] +#[derive(Debug, PartialEq, Eq, Clone, Copy)] #[cfg_attr(feature = "defmt", derive(defmt::Format))] #[non_exhaustive] pub enum Error { diff --git a/embassy-rp/src/rtc/datetime_chrono.rs b/embassy-rp/src/rtc/datetime_chrono.rs index b3c78dd47..2818e46af 100644 --- a/embassy-rp/src/rtc/datetime_chrono.rs +++ b/embassy-rp/src/rtc/datetime_chrono.rs @@ -10,7 +10,7 @@ pub type DayOfWeek = chrono::Weekday; /// Errors regarding the [`DateTime`] and [`DateTimeFilter`] structs. /// /// [`DateTimeFilter`]: struct.DateTimeFilter.html -#[derive(Clone, Debug, PartialEq, Eq)] +#[derive(Clone, Copy, Debug, PartialEq, Eq)] pub enum Error { /// The [DateTime] has an invalid year. The year must be between 0 and 4095. InvalidYear, diff --git a/embassy-rp/src/rtc/datetime_no_deps.rs b/embassy-rp/src/rtc/datetime_no_deps.rs index ea899c339..5de00e6b4 100644 --- a/embassy-rp/src/rtc/datetime_no_deps.rs +++ b/embassy-rp/src/rtc/datetime_no_deps.rs @@ -3,7 +3,7 @@ use crate::pac::rtc::regs::{Rtc0, Rtc1, Setup0, Setup1}; /// Errors regarding the [`DateTime`] and [`DateTimeFilter`] structs. /// /// [`DateTimeFilter`]: struct.DateTimeFilter.html -#[derive(Clone, Debug, PartialEq, Eq)] +#[derive(Clone, Copy, Debug, PartialEq, Eq)] pub enum Error { /// The [DateTime] contains an invalid year value. Must be between `0..=4095`. InvalidYear, diff --git a/embassy-stm32/src/dsihost.rs b/embassy-stm32/src/dsihost.rs index e1fb3b0b0..7be51ba6d 100644 --- a/embassy-stm32/src/dsihost.rs +++ b/embassy-stm32/src/dsihost.rs @@ -388,7 +388,7 @@ impl<'d, T: Instance> DsiHost<'d, T> { /// Possible Error Types for DSI HOST #[non_exhaustive] -#[derive(Debug)] +#[derive(Debug, PartialEq, Eq, Clone, Copy)] pub enum Error { /// Waiting for FIFO empty flag timed out FifoTimeout, diff --git a/embassy-stm32/src/i2c/mod.rs b/embassy-stm32/src/i2c/mod.rs index 6d12af2cc..f43cb4567 100644 --- a/embassy-stm32/src/i2c/mod.rs +++ b/embassy-stm32/src/i2c/mod.rs @@ -23,7 +23,7 @@ use crate::time::Hertz; use crate::{interrupt, peripherals}; /// I2C error. -#[derive(Debug, PartialEq, Eq)] +#[derive(Debug, PartialEq, Eq, Copy, Clone)] #[cfg_attr(feature = "defmt", derive(defmt::Format))] pub enum Error { /// Bus error diff --git a/embassy-stm32/src/rng.rs b/embassy-stm32/src/rng.rs index 94491c32f..6f4c81c8a 100644 --- a/embassy-stm32/src/rng.rs +++ b/embassy-stm32/src/rng.rs @@ -15,7 +15,7 @@ use crate::{interrupt, pac, peripherals, rcc, Peripheral}; static RNG_WAKER: AtomicWaker = AtomicWaker::new(); /// RNG error -#[derive(Debug, PartialEq, Eq)] +#[derive(Debug, PartialEq, Eq, Clone, Copy)] #[cfg_attr(feature = "defmt", derive(defmt::Format))] pub enum Error { /// Seed error. diff --git a/embassy-stm32/src/sai/mod.rs b/embassy-stm32/src/sai/mod.rs index 3faecdc33..87bde12eb 100644 --- a/embassy-stm32/src/sai/mod.rs +++ b/embassy-stm32/src/sai/mod.rs @@ -15,7 +15,7 @@ use crate::rcc::{self, RccPeripheral}; use crate::{peripherals, Peripheral}; /// SAI error -#[derive(Debug, PartialEq, Eq)] +#[derive(Debug, PartialEq, Eq, Clone, Copy)] #[cfg_attr(feature = "defmt", derive(defmt::Format))] pub enum Error { /// `write` called on a SAI in receive mode. diff --git a/embassy-stm32/src/spi/mod.rs b/embassy-stm32/src/spi/mod.rs index 4eaf7777f..03c908db8 100644 --- a/embassy-stm32/src/spi/mod.rs +++ b/embassy-stm32/src/spi/mod.rs @@ -18,7 +18,7 @@ use crate::time::Hertz; use crate::Peripheral; /// SPI error. -#[derive(Debug, PartialEq, Eq)] +#[derive(Debug, PartialEq, Eq, Clone, Copy)] #[cfg_attr(feature = "defmt", derive(defmt::Format))] pub enum Error { /// Invalid framing. diff --git a/embassy-stm32/src/tsc/mod.rs b/embassy-stm32/src/tsc/mod.rs index 045d6317c..8cab3a24c 100644 --- a/embassy-stm32/src/tsc/mod.rs +++ b/embassy-stm32/src/tsc/mod.rs @@ -83,7 +83,7 @@ const TSC_NUM_GROUPS: u32 = 7; const TSC_NUM_GROUPS: u32 = 8; /// Error type defined for TSC -#[derive(Debug)] +#[derive(Debug, Clone, Copy)] #[cfg_attr(feature = "defmt", derive(defmt::Format))] pub enum Error { /// Test error for TSC diff --git a/embassy-sync/src/pubsub/mod.rs b/embassy-sync/src/pubsub/mod.rs index 66c9b0017..a97eb7d5b 100644 --- a/embassy-sync/src/pubsub/mod.rs +++ b/embassy-sync/src/pubsub/mod.rs @@ -434,7 +434,7 @@ impl PubSubSta } /// Error type for the [PubSubChannel] -#[derive(Debug, PartialEq, Eq, Clone)] +#[derive(Debug, PartialEq, Eq, Clone, Copy)] #[cfg_attr(feature = "defmt", derive(defmt::Format))] pub enum Error { /// All subscriber slots are used. To add another subscriber, first another subscriber must be dropped or From 72c2b06520a2e25e180df6d89d5b3b39a8380f0c Mon Sep 17 00:00:00 2001 From: dvdsk Date: Fri, 7 Jun 2024 23:06:30 +0200 Subject: [PATCH 466/581] Explain the const params N_RX & N_TX in the docs of State On chips with a low amount of ram it's easy to run out of ram. When looking at the current docs for the State struct it is not easy to see that these params can cause a lot of ram usage. --- embassy-net-wiznet/src/lib.rs | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/embassy-net-wiznet/src/lib.rs b/embassy-net-wiznet/src/lib.rs index da70d22bd..545b2a2e4 100644 --- a/embassy-net-wiznet/src/lib.rs +++ b/embassy-net-wiznet/src/lib.rs @@ -17,12 +17,22 @@ use embedded_hal_async::spi::SpiDevice; use crate::chip::Chip; use crate::device::WiznetDevice; +// If you change this update the docs of State const MTU: usize = 1514; /// Type alias for the embassy-net driver. pub type Device<'d> = embassy_net_driver_channel::Device<'d, MTU>; /// Internal state for the embassy-net integration. +/// +/// The two generic arguments `N_RX` and `N_TX` set the size of the receive and +/// send packet queue. With a the ethernet MTU of _1514_ this takes up `N_RX + +/// NTX * 1514` bytes. While setting these both to 1 is the minimum this might +/// hurt performance as a packet can not be received while processing another. +/// +/// # Warning +/// On devices with a small amount of ram (think ~64k) watch out with the size +/// of there parameters. They will quickly use too much RAM. pub struct State { ch_state: ch::State, } From 1812ccd276a6c277e7c99191c0aa5ce3d1c90e84 Mon Sep 17 00:00:00 2001 From: dvdsk Date: Fri, 7 Jun 2024 23:46:59 +0200 Subject: [PATCH 467/581] Adds an example for using the w5500 with an stm32f4 This example takes into account the lower memory on the stm32f4. That should prevent anyone wanting to use the w5500 on any stm from adapting the w5500 example for the rp which uses a lot more RAM. --- examples/stm32f4/Cargo.toml | 2 + examples/stm32f4/src/bin/eth_w5500.rs | 139 ++++++++++++++++++++++++++ 2 files changed, 141 insertions(+) create mode 100644 examples/stm32f4/src/bin/eth_w5500.rs diff --git a/examples/stm32f4/Cargo.toml b/examples/stm32f4/Cargo.toml index 52b7ce9e8..11cb4cb3c 100644 --- a/examples/stm32f4/Cargo.toml +++ b/examples/stm32f4/Cargo.toml @@ -12,6 +12,7 @@ embassy-executor = { version = "0.5.0", path = "../../embassy-executor", feature embassy-time = { version = "0.3.0", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime", "tick-hz-32_768"] } embassy-usb = { version = "0.2.0", path = "../../embassy-usb", features = ["defmt" ] } embassy-net = { version = "0.4.0", path = "../../embassy-net", features = ["defmt", "tcp", "dhcpv4", "medium-ethernet", ] } +embassy-net-wiznet = { version = "0.1.0", path = "../../embassy-net-wiznet", features = ["defmt"] } embassy-futures = { version = "0.1.0", path = "../../embassy-futures" } defmt = "0.3" @@ -20,6 +21,7 @@ defmt-rtt = "0.4" cortex-m = { version = "0.7.6", features = ["inline-asm", "critical-section-single-core"] } cortex-m-rt = "0.7.0" embedded-hal = "0.2.6" +embedded-hal-bus = { version = "0.2", features = ["async"] } embedded-io = { version = "0.6.0" } embedded-io-async = { version = "0.6.1" } panic-probe = { version = "0.3", features = ["print-defmt"] } diff --git a/examples/stm32f4/src/bin/eth_w5500.rs b/examples/stm32f4/src/bin/eth_w5500.rs new file mode 100644 index 000000000..827e74c51 --- /dev/null +++ b/examples/stm32f4/src/bin/eth_w5500.rs @@ -0,0 +1,139 @@ +#![no_std] +#![no_main] + +use defmt::*; +use embassy_executor::Spawner; +use embassy_net::tcp::TcpSocket; +use embassy_net::{Ipv4Address, Stack, StackResources}; +use embassy_net_wiznet::{chip::W5500, Device, Runner, State}; +use embassy_stm32::gpio::{Level, Output, Pull, Speed}; +use embassy_stm32::exti::ExtiInput; +use embassy_stm32::rng::Rng; +use embassy_stm32::spi::Spi; +use embassy_stm32::mode::Async; +use embassy_stm32::time::Hertz; +use embassy_stm32::{bind_interrupts, peripherals, rng, spi, Config}; +use embassy_time::{Timer, Delay}; +use embedded_io_async::Write; +use embedded_hal_bus::spi::ExclusiveDevice; +use static_cell::StaticCell; +use {defmt_rtt as _, panic_probe as _}; + +bind_interrupts!(struct Irqs { + HASH_RNG => rng::InterruptHandler; +}); + +type EthernetSPI = ExclusiveDevice, Output<'static>, Delay>; +#[embassy_executor::task] +async fn ethernet_task( + runner: Runner<'static, W5500, EthernetSPI, ExtiInput<'static>, Output<'static>>, +) -> ! { + runner.run().await +} + +#[embassy_executor::task] +async fn net_task(stack: &'static Stack>) -> ! { + stack.run().await +} + +#[embassy_executor::main] +async fn main(spawner: Spawner) -> ! { + let mut config = Config::default(); + { + use embassy_stm32::rcc::*; + config.rcc.hse = Some(Hse { + freq: Hertz(8_000_000), + mode: HseMode::Bypass, + }); + config.rcc.pll_src = PllSource::HSE; + config.rcc.pll = Some(Pll { + prediv: PllPreDiv::DIV4, + mul: PllMul::MUL180, + divp: Some(PllPDiv::DIV2), // 8mhz / 4 * 180 / 2 = 180Mhz. + divq: None, + divr: None, + }); + config.rcc.ahb_pre = AHBPrescaler::DIV1; + config.rcc.apb1_pre = APBPrescaler::DIV4; + config.rcc.apb2_pre = APBPrescaler::DIV2; + config.rcc.sys = Sysclk::PLL1_P; + } + let p = embassy_stm32::init(config); + + info!("Hello World!"); + + // Generate random seed + let mut rng = Rng::new(p.RNG, Irqs); + let mut seed = [0; 8]; + unwrap!(rng.async_fill_bytes(&mut seed).await); + let seed = u64::from_le_bytes(seed); + + let mut spi_cfg = spi::Config::default(); + spi_cfg.frequency = Hertz(50_000_000); // up to 50m works + let (miso, mosi, clk) = (p.PA6, p.PA7, p.PA5); + let spi = Spi::new(p.SPI1, clk, mosi, miso, p.DMA2_CH3, p.DMA2_CH0, spi_cfg); + let cs = Output::new(p.PA4, Level::High, Speed::VeryHigh); + let spi = unwrap!(ExclusiveDevice::new(spi, cs, Delay)); + + let w5500_int = ExtiInput::new(p.PB0, p.EXTI0, Pull::Up); + let w5500_reset = Output::new(p.PB1, Level::High, Speed::VeryHigh); + + let mac_addr = [0x02, 234, 3, 4, 82, 231]; + static STATE: StaticCell> = StaticCell::new(); + let state = STATE.init(State::<2, 2>::new()); + let (device, runner) = embassy_net_wiznet::new(mac_addr, state, spi, w5500_int, w5500_reset).await; + unwrap!(spawner.spawn(ethernet_task(runner))); + + let config = embassy_net::Config::dhcpv4(Default::default()); + //let config = embassy_net::Config::ipv4_static(embassy_net::StaticConfigV4 { + // address: Ipv4Cidr::new(Ipv4Address::new(10, 42, 0, 61), 24), + // dns_servers: Vec::new(), + // gateway: Some(Ipv4Address::new(10, 42, 0, 1)), + //}); + + static STACK: StaticCell> = StaticCell::new(); + static RESOURCES: StaticCell> = StaticCell::new(); + let stack = &*STACK.init(Stack::new( + device, + config, + RESOURCES.init(StackResources::<2>::new()), + seed, + )); + + // Launch network task + unwrap!(spawner.spawn(net_task(stack))); + + // Ensure DHCP configuration is up before trying connect + stack.wait_config_up().await; + + info!("Network task initialized"); + + // Then we can use it! + let mut rx_buffer = [0; 1024]; + let mut tx_buffer = [0; 1024]; + + loop { + let mut socket = TcpSocket::new(stack, &mut rx_buffer, &mut tx_buffer); + + socket.set_timeout(Some(embassy_time::Duration::from_secs(10))); + + let remote_endpoint = (Ipv4Address::new(10, 42, 0, 1), 8000); + info!("connecting..."); + let r = socket.connect(remote_endpoint).await; + if let Err(e) = r { + info!("connect error: {:?}", e); + Timer::after_secs(1).await; + continue; + } + info!("connected!"); + let buf = [0; 1024]; + loop { + let r = socket.write_all(&buf).await; + if let Err(e) = r { + info!("write error: {:?}", e); + break; + } + Timer::after_secs(1).await; + } + } +} From ab31a02e17b812a965842c1b14dc44b96a57932a Mon Sep 17 00:00:00 2001 From: dvdsk Date: Sat, 8 Jun 2024 00:30:52 +0200 Subject: [PATCH 468/581] cargo fmt --- embassy-net-wiznet/src/lib.rs | 2 +- examples/stm32f4/src/bin/eth_w5500.rs | 15 +++++++-------- 2 files changed, 8 insertions(+), 9 deletions(-) diff --git a/embassy-net-wiznet/src/lib.rs b/embassy-net-wiznet/src/lib.rs index 545b2a2e4..90102196a 100644 --- a/embassy-net-wiznet/src/lib.rs +++ b/embassy-net-wiznet/src/lib.rs @@ -29,7 +29,7 @@ pub type Device<'d> = embassy_net_driver_channel::Device<'d, MTU>; /// send packet queue. With a the ethernet MTU of _1514_ this takes up `N_RX + /// NTX * 1514` bytes. While setting these both to 1 is the minimum this might /// hurt performance as a packet can not be received while processing another. -/// +/// /// # Warning /// On devices with a small amount of ram (think ~64k) watch out with the size /// of there parameters. They will quickly use too much RAM. diff --git a/examples/stm32f4/src/bin/eth_w5500.rs b/examples/stm32f4/src/bin/eth_w5500.rs index 827e74c51..c51111110 100644 --- a/examples/stm32f4/src/bin/eth_w5500.rs +++ b/examples/stm32f4/src/bin/eth_w5500.rs @@ -5,17 +5,18 @@ use defmt::*; use embassy_executor::Spawner; use embassy_net::tcp::TcpSocket; use embassy_net::{Ipv4Address, Stack, StackResources}; -use embassy_net_wiznet::{chip::W5500, Device, Runner, State}; -use embassy_stm32::gpio::{Level, Output, Pull, Speed}; +use embassy_net_wiznet::chip::W5500; +use embassy_net_wiznet::{Device, Runner, State}; use embassy_stm32::exti::ExtiInput; +use embassy_stm32::gpio::{Level, Output, Pull, Speed}; +use embassy_stm32::mode::Async; use embassy_stm32::rng::Rng; use embassy_stm32::spi::Spi; -use embassy_stm32::mode::Async; use embassy_stm32::time::Hertz; use embassy_stm32::{bind_interrupts, peripherals, rng, spi, Config}; -use embassy_time::{Timer, Delay}; -use embedded_io_async::Write; +use embassy_time::{Delay, Timer}; use embedded_hal_bus::spi::ExclusiveDevice; +use embedded_io_async::Write; use static_cell::StaticCell; use {defmt_rtt as _, panic_probe as _}; @@ -25,9 +26,7 @@ bind_interrupts!(struct Irqs { type EthernetSPI = ExclusiveDevice, Output<'static>, Delay>; #[embassy_executor::task] -async fn ethernet_task( - runner: Runner<'static, W5500, EthernetSPI, ExtiInput<'static>, Output<'static>>, -) -> ! { +async fn ethernet_task(runner: Runner<'static, W5500, EthernetSPI, ExtiInput<'static>, Output<'static>>) -> ! { runner.run().await } From 3f45ec6ead2551b5f6c30ea7c718de26d126fbda Mon Sep 17 00:00:00 2001 From: zjp Date: Sun, 9 Jun 2024 11:39:47 +0800 Subject: [PATCH 469/581] use nightly waker_getters APIs Since https://github.com/rust-lang/rust/issues/96992 has stalled, to prevent potential unsoundness caused by transmuting to &WakerHack, we can use nightly waker_getters APIs by gating it behind nightly feature in embassy-executor without waiting for it to be stablized. --- embassy-executor/src/lib.rs | 1 + embassy-executor/src/raw/waker.rs | 25 +++++++++++++++++++++++++ 2 files changed, 26 insertions(+) diff --git a/embassy-executor/src/lib.rs b/embassy-executor/src/lib.rs index 6a2e493a2..553ed76d3 100644 --- a/embassy-executor/src/lib.rs +++ b/embassy-executor/src/lib.rs @@ -1,4 +1,5 @@ #![cfg_attr(not(any(feature = "arch-std", feature = "arch-wasm")), no_std)] +#![cfg_attr(feature = "nightly", feature(waker_getters))] #![allow(clippy::new_without_default)] #![doc = include_str!("../README.md")] #![warn(missing_docs)] diff --git a/embassy-executor/src/raw/waker.rs b/embassy-executor/src/raw/waker.rs index 522853e34..fe64456e1 100644 --- a/embassy-executor/src/raw/waker.rs +++ b/embassy-executor/src/raw/waker.rs @@ -32,6 +32,7 @@ pub(crate) unsafe fn from_task(p: TaskRef) -> Waker { /// # Panics /// /// Panics if the waker is not created by the Embassy executor. +#[cfg(not(feature = "nightly"))] pub fn task_from_waker(waker: &Waker) -> TaskRef { // safety: OK because WakerHack has the same layout as Waker. // This is not really guaranteed because the structs are `repr(Rust)`, it is @@ -46,7 +47,31 @@ pub fn task_from_waker(waker: &Waker) -> TaskRef { unsafe { TaskRef::from_ptr(hack.data as *const TaskHeader) } } +#[cfg(not(feature = "nightly"))] struct WakerHack { data: *const (), vtable: &'static RawWakerVTable, } + +/// Get a task pointer from a waker. +/// +/// This can be used as an optimization in wait queues to store task pointers +/// (1 word) instead of full Wakers (2 words). This saves a bit of RAM and helps +/// avoid dynamic dispatch. +/// +/// You can use the returned task pointer to wake the task with [`wake_task`](super::wake_task). +/// +/// # Panics +/// +/// Panics if the waker is not created by the Embassy executor. +#[cfg(feature = "nightly")] +pub fn task_from_waker(waker: &Waker) -> TaskRef { + let raw_waker = waker.as_raw(); + + if raw_waker.vtable() != &VTABLE { + panic!("Found waker not created by the Embassy executor. `embassy_time::Timer` only works with the Embassy executor.") + } + + // safety: our wakers are always created with `TaskRef::as_ptr` + unsafe { TaskRef::from_ptr(raw_waker.data() as *const TaskHeader) } +} From 6b9470be2c3551863387ea5395d605dd8a853132 Mon Sep 17 00:00:00 2001 From: zjp Date: Sun, 9 Jun 2024 11:50:32 +0800 Subject: [PATCH 470/581] fix warning on unused import --- embassy-executor/src/raw/waker.rs | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/embassy-executor/src/raw/waker.rs b/embassy-executor/src/raw/waker.rs index fe64456e1..421ec301e 100644 --- a/embassy-executor/src/raw/waker.rs +++ b/embassy-executor/src/raw/waker.rs @@ -1,4 +1,3 @@ -use core::mem; use core::task::{RawWaker, RawWakerVTable, Waker}; use super::{wake_task, TaskHeader, TaskRef}; @@ -38,7 +37,7 @@ pub fn task_from_waker(waker: &Waker) -> TaskRef { // This is not really guaranteed because the structs are `repr(Rust)`, it is // indeed the case in the current implementation. // TODO use waker_getters when stable. https://github.com/rust-lang/rust/issues/96992 - let hack: &WakerHack = unsafe { mem::transmute(waker) }; + let hack: &WakerHack = unsafe { core::mem::transmute(waker) }; if hack.vtable != &VTABLE { panic!("Found waker not created by the Embassy executor. `embassy_time::Timer` only works with the Embassy executor.") } From 268430bd9fc70bef9f4038f5f05b51eb1668a1fd Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Krzysztof=20Kr=C3=B3lczyk?= Date: Mon, 10 Jun 2024 11:25:23 +0200 Subject: [PATCH 471/581] stm32/docs: correct typos, links MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Krzysztof Królczyk --- docs/pages/getting_started.adoc | 5 ++++- embassy-boot-stm32/Cargo.toml | 2 +- embassy-stm32/README.md | 2 +- 3 files changed, 6 insertions(+), 3 deletions(-) diff --git a/docs/pages/getting_started.adoc b/docs/pages/getting_started.adoc index 77275a857..017409018 100644 --- a/docs/pages/getting_started.adoc +++ b/docs/pages/getting_started.adoc @@ -131,7 +131,10 @@ If you’re using a raspberry pi pico-w, make sure you’re running `+cargo run If you’re using an rp2040 debug probe (e.g. the pico probe) and are having issues after running `probe-rs info`, unplug and reconnect the probe, letting it power cycle. Running `probe-rs info` is link:https://github.com/probe-rs/probe-rs/issues/1849[known to put the pico probe into an unusable state]. -If you’re still having problems, check the link:https://embassy.dev/book/#_frequently_asked_questions[FAQ], or ask for help in the link:https://matrix.to/#/#embassy-rs:matrix.org[Embassy Chat Room]. +:embassy-dev-faq-link-with-hash: https://embassy.dev/book/#_frequently_asked_questions +:embassy-matrix-channel: https://matrix.to/#/#embassy-rs:matrix.org + +If you’re still having problems, check the {embassy-dev-faq-link-with-hash}[FAQ], or ask for help in the {embassy-matrix-channel}[Embassy Chat Room]. == What's next? diff --git a/embassy-boot-stm32/Cargo.toml b/embassy-boot-stm32/Cargo.toml index d4525a6de..52ad1b463 100644 --- a/embassy-boot-stm32/Cargo.toml +++ b/embassy-boot-stm32/Cargo.toml @@ -13,7 +13,7 @@ categories = [ ] [package.metadata.embassy_docs] -src_base = "https://github.com/embassy-rs/embassy/blob/embassy-boot-nrf-v$VERSION/embassy-boot-stm32/src/" +src_base = "https://github.com/embassy-rs/embassy/blob/embassy-boot-stm32-v$VERSION/embassy-boot-stm32/src/" src_base_git = "https://github.com/embassy-rs/embassy/blob/$COMMIT/embassy-boot-stm32/src/" features = ["embassy-stm32/stm32f429zi"] target = "thumbv7em-none-eabi" diff --git a/embassy-stm32/README.md b/embassy-stm32/README.md index e9ae455a4..445366f8d 100644 --- a/embassy-stm32/README.md +++ b/embassy-stm32/README.md @@ -35,4 +35,4 @@ This crate can run on any executor. Optionally, some features requiring [`embassy-time`](https://crates.io/crates/embassy-time) can be activated with the `time` feature. If you enable it, you must link an `embassy-time` driver in your project. -The `low-power` feature integrates specifically with `embassy-executor`, it can't be ued on other executors for now. +The `low-power` feature integrates specifically with `embassy-executor`, it can't be used on other executors for now. From 453aa58b7f9496faa699dd3bb88cb31e80fad1ad Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Krzysztof=20Kr=C3=B3lczyk?= Date: Mon, 10 Jun 2024 11:50:20 +0200 Subject: [PATCH 472/581] stm32/boot: update linker file in example MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Krzysztof Królczyk --- examples/boot/bootloader/stm32/memory.x | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/examples/boot/bootloader/stm32/memory.x b/examples/boot/bootloader/stm32/memory.x index b6f185ef7..198290520 100644 --- a/examples/boot/bootloader/stm32/memory.x +++ b/examples/boot/bootloader/stm32/memory.x @@ -2,7 +2,7 @@ MEMORY { /* NOTE 1 K = 1 KiBi = 1024 bytes */ FLASH : ORIGIN = 0x08000000, LENGTH = 24K - BOOTLOADER_STATE : ORIGIN = 0x08006000, LENGTH = 4K + BOOTLOADER_STATE : ORIGIN = 0x08006000, LENGTH = 8K ACTIVE : ORIGIN = 0x08008000, LENGTH = 32K DFU : ORIGIN = 0x08010000, LENGTH = 36K RAM (rwx) : ORIGIN = 0x20000000, LENGTH = 16K From 7f3805437c412f7aa1b820b9cd48879428067e46 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Aur=C3=A9lien=20Jacobs?= Date: Tue, 11 Jun 2024 11:20:06 +0200 Subject: [PATCH 473/581] dns: properly handle AddrType::Either in get_host_by_name() --- embassy-net/src/dns.rs | 23 +++++++++++++++++++---- 1 file changed, 19 insertions(+), 4 deletions(-) diff --git a/embassy-net/src/dns.rs b/embassy-net/src/dns.rs index a1151d5e4..8ccfa4e4f 100644 --- a/embassy-net/src/dns.rs +++ b/embassy-net/src/dns.rs @@ -84,11 +84,26 @@ where addr_type: embedded_nal_async::AddrType, ) -> Result { use embedded_nal_async::{AddrType, IpAddr}; - let qtype = match addr_type { - AddrType::IPv6 => DnsQueryType::Aaaa, - _ => DnsQueryType::A, + let (qtype, secondary_qtype) = match addr_type { + AddrType::IPv4 => (DnsQueryType::A, None), + AddrType::IPv6 => (DnsQueryType::Aaaa, None), + AddrType::Either => { + #[cfg(not(feature = "proto-ipv6"))] + let v6_first = false; + #[cfg(feature = "proto-ipv6")] + let v6_first = self.stack.config_v6().is_some(); + match v6_first { + true => (DnsQueryType::Aaaa, Some(DnsQueryType::A)), + false => (DnsQueryType::A, Some(DnsQueryType::Aaaa)), + } + } }; - let addrs = self.query(host, qtype).await?; + let mut addrs = self.query(host, qtype).await?; + if addrs.is_empty() { + if let Some(qtype) = secondary_qtype { + addrs = self.query(host, qtype).await? + } + } if let Some(first) = addrs.get(0) { Ok(match first { #[cfg(feature = "proto-ipv4")] From d08639f6434b47c2208301d733c554e567c45706 Mon Sep 17 00:00:00 2001 From: Mikkel <31762830+mikkelens@users.noreply.github.com> Date: Wed, 12 Jun 2024 14:56:21 +0200 Subject: [PATCH 474/581] Add missing word "pin" in rp pwm documentation It is confusing to read without. The corrected line reads like its 'b' pin counterpart (few lines below). --- embassy-rp/src/pwm.rs | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/embassy-rp/src/pwm.rs b/embassy-rp/src/pwm.rs index 20b5c4d58..c35e76587 100644 --- a/embassy-rp/src/pwm.rs +++ b/embassy-rp/src/pwm.rs @@ -129,7 +129,7 @@ impl<'d> Pwm<'d> { Self::new_inner(slice.number(), None, None, Pull::None, config, Divmode::DIV) } - /// Create PWM driver with a single 'a' as output. + /// Create PWM driver with a single 'a' pin as output. #[inline] pub fn new_output_a( slice: impl Peripheral

+ 'd, From 8b0cfde9a6c42ae45463eea42d4749bf919e3ffc Mon Sep 17 00:00:00 2001 From: Daniel Philipp <95503587+Duesentrieb71@users.noreply.github.com> Date: Wed, 12 Jun 2024 19:40:28 +0200 Subject: [PATCH 475/581] =?UTF-8?q?Clarified=20comments=20about=20the=20co?= =?UTF-8?q?rtex=5Fm::asm::delay=20functionality=20in=20al=E2=80=A6=20(#306?= =?UTF-8?q?4)?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit * Clarified comments about the cortex_m::asm::delay functionality in all multiprio.rs examples * fixed formatting * Changed to using embassy_time::block_for() * removed my formatting scripts * specify embassy_time::Duration --- examples/nrf52840/src/bin/multiprio.rs | 4 ++-- examples/rp/src/bin/multiprio.rs | 4 ++-- examples/stm32f0/src/bin/multiprio.rs | 4 ++-- examples/stm32f3/src/bin/multiprio.rs | 4 ++-- examples/stm32f4/src/bin/multiprio.rs | 4 ++-- examples/stm32h7/src/bin/multiprio.rs | 4 ++-- examples/stm32h7rs/src/bin/multiprio.rs | 4 ++-- 7 files changed, 14 insertions(+), 14 deletions(-) diff --git a/examples/nrf52840/src/bin/multiprio.rs b/examples/nrf52840/src/bin/multiprio.rs index b634d8569..797be93a7 100644 --- a/examples/nrf52840/src/bin/multiprio.rs +++ b/examples/nrf52840/src/bin/multiprio.rs @@ -80,7 +80,7 @@ async fn run_med() { info!(" [med] Starting long computation"); // Spin-wait to simulate a long CPU computation - cortex_m::asm::delay(32_000_000); // ~1 second + embassy_time::block_for(embassy_time::Duration::from_secs(1)); // ~1 second let end = Instant::now(); let ms = end.duration_since(start).as_ticks() / 33; @@ -97,7 +97,7 @@ async fn run_low() { info!("[low] Starting long computation"); // Spin-wait to simulate a long CPU computation - cortex_m::asm::delay(64_000_000); // ~2 seconds + embassy_time::block_for(embassy_time::Duration::from_secs(2)); // ~2 seconds let end = Instant::now(); let ms = end.duration_since(start).as_ticks() / 33; diff --git a/examples/rp/src/bin/multiprio.rs b/examples/rp/src/bin/multiprio.rs index 26b80c11d..2b397f97d 100644 --- a/examples/rp/src/bin/multiprio.rs +++ b/examples/rp/src/bin/multiprio.rs @@ -80,7 +80,7 @@ async fn run_med() { info!(" [med] Starting long computation"); // Spin-wait to simulate a long CPU computation - cortex_m::asm::delay(125_000_000); // ~1 second + embassy_time::block_for(embassy_time::Duration::from_secs(1)); // ~1 second let end = Instant::now(); let ms = end.duration_since(start).as_ticks() * 1000 / TICK_HZ; @@ -97,7 +97,7 @@ async fn run_low() { info!("[low] Starting long computation"); // Spin-wait to simulate a long CPU computation - cortex_m::asm::delay(250_000_000); // ~2 seconds + embassy_time::block_for(embassy_time::Duration::from_secs(2)); // ~2 seconds let end = Instant::now(); let ms = end.duration_since(start).as_ticks() * 1000 / TICK_HZ; diff --git a/examples/stm32f0/src/bin/multiprio.rs b/examples/stm32f0/src/bin/multiprio.rs index 1c3f3991a..84e4077ef 100644 --- a/examples/stm32f0/src/bin/multiprio.rs +++ b/examples/stm32f0/src/bin/multiprio.rs @@ -80,7 +80,7 @@ async fn run_med() { info!(" [med] Starting long computation"); // Spin-wait to simulate a long CPU computation - cortex_m::asm::delay(8_000_000); // ~1 second + embassy_time::block_for(embassy_time::Duration::from_secs(1)); // ~1 second let end = Instant::now(); let ms = end.duration_since(start).as_ticks() / 33; @@ -97,7 +97,7 @@ async fn run_low() { info!("[low] Starting long computation"); // Spin-wait to simulate a long CPU computation - cortex_m::asm::delay(16_000_000); // ~2 seconds + embassy_time::block_for(embassy_time::Duration::from_secs(2)); // ~2 seconds let end = Instant::now(); let ms = end.duration_since(start).as_ticks() / 33; diff --git a/examples/stm32f3/src/bin/multiprio.rs b/examples/stm32f3/src/bin/multiprio.rs index 87830b416..b4620888f 100644 --- a/examples/stm32f3/src/bin/multiprio.rs +++ b/examples/stm32f3/src/bin/multiprio.rs @@ -80,7 +80,7 @@ async fn run_med() { info!(" [med] Starting long computation"); // Spin-wait to simulate a long CPU computation - cortex_m::asm::delay(8_000_000); // ~1 second + embassy_time::block_for(embassy_time::Duration::from_secs(1)); // ~1 second let end = Instant::now(); let ms = end.duration_since(start).as_ticks() / 33; @@ -97,7 +97,7 @@ async fn run_low() { info!("[low] Starting long computation"); // Spin-wait to simulate a long CPU computation - cortex_m::asm::delay(16_000_000); // ~2 seconds + embassy_time::block_for(embassy_time::Duration::from_secs(2)); // ~2 seconds let end = Instant::now(); let ms = end.duration_since(start).as_ticks() / 33; diff --git a/examples/stm32f4/src/bin/multiprio.rs b/examples/stm32f4/src/bin/multiprio.rs index 87830b416..b4620888f 100644 --- a/examples/stm32f4/src/bin/multiprio.rs +++ b/examples/stm32f4/src/bin/multiprio.rs @@ -80,7 +80,7 @@ async fn run_med() { info!(" [med] Starting long computation"); // Spin-wait to simulate a long CPU computation - cortex_m::asm::delay(8_000_000); // ~1 second + embassy_time::block_for(embassy_time::Duration::from_secs(1)); // ~1 second let end = Instant::now(); let ms = end.duration_since(start).as_ticks() / 33; @@ -97,7 +97,7 @@ async fn run_low() { info!("[low] Starting long computation"); // Spin-wait to simulate a long CPU computation - cortex_m::asm::delay(16_000_000); // ~2 seconds + embassy_time::block_for(embassy_time::Duration::from_secs(2)); // ~2 seconds let end = Instant::now(); let ms = end.duration_since(start).as_ticks() / 33; diff --git a/examples/stm32h7/src/bin/multiprio.rs b/examples/stm32h7/src/bin/multiprio.rs index fcbb6c653..b4620888f 100644 --- a/examples/stm32h7/src/bin/multiprio.rs +++ b/examples/stm32h7/src/bin/multiprio.rs @@ -80,7 +80,7 @@ async fn run_med() { info!(" [med] Starting long computation"); // Spin-wait to simulate a long CPU computation - cortex_m::asm::delay(128_000_000); // ~1 second + embassy_time::block_for(embassy_time::Duration::from_secs(1)); // ~1 second let end = Instant::now(); let ms = end.duration_since(start).as_ticks() / 33; @@ -97,7 +97,7 @@ async fn run_low() { info!("[low] Starting long computation"); // Spin-wait to simulate a long CPU computation - cortex_m::asm::delay(256_000_000); // ~2 seconds + embassy_time::block_for(embassy_time::Duration::from_secs(2)); // ~2 seconds let end = Instant::now(); let ms = end.duration_since(start).as_ticks() / 33; diff --git a/examples/stm32h7rs/src/bin/multiprio.rs b/examples/stm32h7rs/src/bin/multiprio.rs index fcbb6c653..b4620888f 100644 --- a/examples/stm32h7rs/src/bin/multiprio.rs +++ b/examples/stm32h7rs/src/bin/multiprio.rs @@ -80,7 +80,7 @@ async fn run_med() { info!(" [med] Starting long computation"); // Spin-wait to simulate a long CPU computation - cortex_m::asm::delay(128_000_000); // ~1 second + embassy_time::block_for(embassy_time::Duration::from_secs(1)); // ~1 second let end = Instant::now(); let ms = end.duration_since(start).as_ticks() / 33; @@ -97,7 +97,7 @@ async fn run_low() { info!("[low] Starting long computation"); // Spin-wait to simulate a long CPU computation - cortex_m::asm::delay(256_000_000); // ~2 seconds + embassy_time::block_for(embassy_time::Duration::from_secs(2)); // ~2 seconds let end = Instant::now(); let ms = end.duration_since(start).as_ticks() / 33; From 72029ca0c6407cff3aefb8c08e48d96adcbb57e0 Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Wed, 12 Jun 2024 21:39:39 +0200 Subject: [PATCH 476/581] stm32: update stm32-metapac, fixes memory.x for many families. --- embassy-stm32/Cargo.toml | 4 ++-- tests/stm32/build.rs | 12 ++++-------- 2 files changed, 6 insertions(+), 10 deletions(-) diff --git a/embassy-stm32/Cargo.toml b/embassy-stm32/Cargo.toml index 40b7559fd..d06d8af03 100644 --- a/embassy-stm32/Cargo.toml +++ b/embassy-stm32/Cargo.toml @@ -72,7 +72,7 @@ rand_core = "0.6.3" sdio-host = "0.5.0" critical-section = "1.1" #stm32-metapac = { version = "15" } -stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-59b1f65bd109c3ef35782e6c44062208d0ef3d0e" } +stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-cdd0f8e7cb79cbd126e2480f1b747fb01c901910" } vcell = "0.1.3" nb = "1.0.0" @@ -97,7 +97,7 @@ proc-macro2 = "1.0.36" quote = "1.0.15" #stm32-metapac = { version = "15", default-features = false, features = ["metadata"]} -stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-59b1f65bd109c3ef35782e6c44062208d0ef3d0e", default-features = false, features = ["metadata"] } +stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-cdd0f8e7cb79cbd126e2480f1b747fb01c901910", default-features = false, features = ["metadata"] } [features] default = ["rt"] diff --git a/tests/stm32/build.rs b/tests/stm32/build.rs index 675115568..722671bf1 100644 --- a/tests/stm32/build.rs +++ b/tests/stm32/build.rs @@ -10,14 +10,10 @@ fn main() -> Result<(), Box> { if cfg!(any( // too little RAM to run from RAM. - feature = "stm32f103c8", - feature = "stm32c031c6", - feature = "stm32wb55rg", - feature = "stm32l073rz", - feature = "stm32h503rb", - // wrong ram size in stm32-data - feature = "stm32wl55jc", - feature = "stm32u5a5zj", + feature = "stm32f103c8", // 20 kb + feature = "stm32c031c6", // 6 kb + feature = "stm32l073rz", // 20 kb + feature = "stm32h503rb", // 32 kb // no VTOR, so interrupts can't work when running from RAM feature = "stm32f091rc", )) { From b780df5f76adaf68d041d13820c455d4bf7eed96 Mon Sep 17 00:00:00 2001 From: zjp Date: Thu, 13 Jun 2024 07:33:40 +0800 Subject: [PATCH 477/581] put cfg code inside task_from_waker function --- embassy-executor/src/raw/waker.rs | 62 +++++++++++++------------------ 1 file changed, 26 insertions(+), 36 deletions(-) diff --git a/embassy-executor/src/raw/waker.rs b/embassy-executor/src/raw/waker.rs index 421ec301e..75641c257 100644 --- a/embassy-executor/src/raw/waker.rs +++ b/embassy-executor/src/raw/waker.rs @@ -31,46 +31,36 @@ pub(crate) unsafe fn from_task(p: TaskRef) -> Waker { /// # Panics /// /// Panics if the waker is not created by the Embassy executor. -#[cfg(not(feature = "nightly"))] pub fn task_from_waker(waker: &Waker) -> TaskRef { - // safety: OK because WakerHack has the same layout as Waker. - // This is not really guaranteed because the structs are `repr(Rust)`, it is - // indeed the case in the current implementation. - // TODO use waker_getters when stable. https://github.com/rust-lang/rust/issues/96992 - let hack: &WakerHack = unsafe { core::mem::transmute(waker) }; - if hack.vtable != &VTABLE { - panic!("Found waker not created by the Embassy executor. `embassy_time::Timer` only works with the Embassy executor.") + #[cfg(not(feature = "nightly"))] + { + struct WakerHack { + data: *const (), + vtable: &'static RawWakerVTable, + } + + // safety: OK because WakerHack has the same layout as Waker. + // This is not really guaranteed because the structs are `repr(Rust)`, it is + // indeed the case in the current implementation. + // TODO use waker_getters when stable. https://github.com/rust-lang/rust/issues/96992 + let hack: &WakerHack = unsafe { core::mem::transmute(waker) }; + if hack.vtable != &VTABLE { + panic!("Found waker not created by the Embassy executor. `embassy_time::Timer` only works with the Embassy executor.") + } + + // safety: our wakers are always created with `TaskRef::as_ptr` + unsafe { TaskRef::from_ptr(hack.data as *const TaskHeader) } } - // safety: our wakers are always created with `TaskRef::as_ptr` - unsafe { TaskRef::from_ptr(hack.data as *const TaskHeader) } -} + #[cfg(feature = "nightly")] + { + let raw_waker = waker.as_raw(); -#[cfg(not(feature = "nightly"))] -struct WakerHack { - data: *const (), - vtable: &'static RawWakerVTable, -} + if raw_waker.vtable() != &VTABLE { + panic!("Found waker not created by the Embassy executor. `embassy_time::Timer` only works with the Embassy executor.") + } -/// Get a task pointer from a waker. -/// -/// This can be used as an optimization in wait queues to store task pointers -/// (1 word) instead of full Wakers (2 words). This saves a bit of RAM and helps -/// avoid dynamic dispatch. -/// -/// You can use the returned task pointer to wake the task with [`wake_task`](super::wake_task). -/// -/// # Panics -/// -/// Panics if the waker is not created by the Embassy executor. -#[cfg(feature = "nightly")] -pub fn task_from_waker(waker: &Waker) -> TaskRef { - let raw_waker = waker.as_raw(); - - if raw_waker.vtable() != &VTABLE { - panic!("Found waker not created by the Embassy executor. `embassy_time::Timer` only works with the Embassy executor.") + // safety: our wakers are always created with `TaskRef::as_ptr` + unsafe { TaskRef::from_ptr(raw_waker.data() as *const TaskHeader) } } - - // safety: our wakers are always created with `TaskRef::as_ptr` - unsafe { TaskRef::from_ptr(raw_waker.data() as *const TaskHeader) } } From dd6a873447c35224b405d6bf94512b7be4dbb3b4 Mon Sep 17 00:00:00 2001 From: zjp Date: Thu, 13 Jun 2024 07:59:28 +0800 Subject: [PATCH 478/581] minimize cfg code in task_from_waker --- embassy-executor/src/raw/waker.rs | 49 +++++++++++++++---------------- 1 file changed, 23 insertions(+), 26 deletions(-) diff --git a/embassy-executor/src/raw/waker.rs b/embassy-executor/src/raw/waker.rs index 75641c257..8d3910a25 100644 --- a/embassy-executor/src/raw/waker.rs +++ b/embassy-executor/src/raw/waker.rs @@ -32,35 +32,32 @@ pub(crate) unsafe fn from_task(p: TaskRef) -> Waker { /// /// Panics if the waker is not created by the Embassy executor. pub fn task_from_waker(waker: &Waker) -> TaskRef { - #[cfg(not(feature = "nightly"))] - { - struct WakerHack { - data: *const (), - vtable: &'static RawWakerVTable, + let (vtable, data) = { + #[cfg(not(feature = "nightly"))] + { + struct WakerHack { + data: *const (), + vtable: &'static RawWakerVTable, + } + + // safety: OK because WakerHack has the same layout as Waker. + // This is not really guaranteed because the structs are `repr(Rust)`, it is + // indeed the case in the current implementation. + // TODO use waker_getters when stable. https://github.com/rust-lang/rust/issues/96992 + let hack: &WakerHack = unsafe { core::mem::transmute(waker) }; + (hack.vtable, hack.data) } - // safety: OK because WakerHack has the same layout as Waker. - // This is not really guaranteed because the structs are `repr(Rust)`, it is - // indeed the case in the current implementation. - // TODO use waker_getters when stable. https://github.com/rust-lang/rust/issues/96992 - let hack: &WakerHack = unsafe { core::mem::transmute(waker) }; - if hack.vtable != &VTABLE { - panic!("Found waker not created by the Embassy executor. `embassy_time::Timer` only works with the Embassy executor.") + #[cfg(feature = "nightly")] + { + let raw_waker = waker.as_raw(); + (raw_waker.vtable(), raw_waker.data()) } + }; - // safety: our wakers are always created with `TaskRef::as_ptr` - unsafe { TaskRef::from_ptr(hack.data as *const TaskHeader) } - } - - #[cfg(feature = "nightly")] - { - let raw_waker = waker.as_raw(); - - if raw_waker.vtable() != &VTABLE { - panic!("Found waker not created by the Embassy executor. `embassy_time::Timer` only works with the Embassy executor.") - } - - // safety: our wakers are always created with `TaskRef::as_ptr` - unsafe { TaskRef::from_ptr(raw_waker.data() as *const TaskHeader) } + if vtable != &VTABLE { + panic!("Found waker not created by the Embassy executor. `embassy_time::Timer` only works with the Embassy executor.") } + // safety: our wakers are always created with `TaskRef::as_ptr` + unsafe { TaskRef::from_ptr(data as *const TaskHeader) } } From 54fa33cbaefa7b934aa600238cbc808ecf0b5f5b Mon Sep 17 00:00:00 2001 From: Karun Date: Thu, 13 Jun 2024 13:36:05 -0400 Subject: [PATCH 479/581] Add example for touch sensitive controller --- examples/stm32u5/src/bin/tsc.rs | 89 +++++++++++++++++++++++++++++++++ 1 file changed, 89 insertions(+) create mode 100644 examples/stm32u5/src/bin/tsc.rs diff --git a/examples/stm32u5/src/bin/tsc.rs b/examples/stm32u5/src/bin/tsc.rs new file mode 100644 index 000000000..f5593d1c4 --- /dev/null +++ b/examples/stm32u5/src/bin/tsc.rs @@ -0,0 +1,89 @@ +#![no_std] +#![no_main] + +use defmt::*; +use embassy_stm32::tsc::{self, *}; +use embassy_time::Timer; +use {defmt_rtt as _, panic_probe as _}; + +#[cortex_m_rt::exception] +unsafe fn HardFault(_: &cortex_m_rt::ExceptionFrame) -> ! { + cortex_m::peripheral::SCB::sys_reset(); +} + +#[embassy_executor::main] +async fn main(_spawner: embassy_executor::Spawner) { + let device_config = embassy_stm32::Config::default(); + let context = embassy_stm32::init(device_config); + + let config = tsc::Config { + ct_pulse_high_length: ChargeTransferPulseCycle::_2, + ct_pulse_low_length: ChargeTransferPulseCycle::_2, + spread_spectrum: false, + spread_spectrum_deviation: SSDeviation::new(2).unwrap(), + spread_spectrum_prescaler: false, + pulse_generator_prescaler: PGPrescalerDivider::_4, + max_count_value: MaxCount::_8191, + io_default_mode: false, + synchro_pin_polarity: false, + acquisition_mode: false, + max_count_interrupt: false, + channel_ios: TscIOPin::Group2Io2 | TscIOPin::Group7Io3, + shield_ios: TscIOPin::Group1Io3.into(), + sampling_ios: TscIOPin::Group1Io2 | TscIOPin::Group2Io1 | TscIOPin::Group7Io2, + }; + + let mut g1: PinGroup = PinGroup::new(); + g1.set_io2(context.PB13, PinType::Sample); + g1.set_io3(context.PB14, PinType::Shield); + + let mut g2: PinGroup = PinGroup::new(); + g2.set_io1(context.PB4, PinType::Sample); + g2.set_io2(context.PB5, PinType::Channel); + + let mut g7: PinGroup = PinGroup::new(); + g7.set_io2(context.PE3, PinType::Sample); + g7.set_io3(context.PE4, PinType::Channel); + + let mut touch_controller = tsc::Tsc::new( + context.TSC, + Some(g1), + Some(g2), + None, + None, + None, + None, + Some(g7), + None, + config, + ); + + touch_controller.discharge_io(true); + Timer::after_millis(1).await; + + touch_controller.start(); + + let mut group_two_val = 0; + let mut group_seven_val = 0; + info!("Starting touch_controller interface"); + loop { + touch_controller.poll_for_acquisition(); + touch_controller.discharge_io(true); + Timer::after_millis(1).await; + + if touch_controller.group_get_status(Group::Two) == GroupStatus::Complete { + group_two_val = touch_controller.group_get_value(Group::Two); + } + + if touch_controller.group_get_status(Group::Seven) == GroupStatus::Complete { + group_seven_val = touch_controller.group_get_value(Group::Seven); + } + + info!( + "Group Two value: {}, Group Seven value: {},", + group_two_val, group_seven_val + ); + + touch_controller.start(); + } +} From 4d9115b3fb17f441a3280dd7913e682157ca1dac Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Thu, 13 Jun 2024 20:40:04 +0200 Subject: [PATCH 480/581] Update stable to Rust 1.79. --- ci-nightly.sh | 1 - ci.sh | 6 ++++++ embassy-executor/build_common.rs | 4 ++++ embassy-hal-internal/build_common.rs | 4 ++++ embassy-stm32/build_common.rs | 4 ++++ embassy-sync/build_common.rs | 4 ++++ rust-toolchain.toml | 2 +- 7 files changed, 23 insertions(+), 2 deletions(-) diff --git a/ci-nightly.sh b/ci-nightly.sh index 46b19c5b7..bdb364f53 100755 --- a/ci-nightly.sh +++ b/ci-nightly.sh @@ -30,4 +30,3 @@ cargo batch \ cargo build --release --manifest-path embassy-executor/Cargo.toml --target avr-unknown-gnu-atmega328 -Z build-std=core,alloc --features nightly,arch-avr,avr-device/atmega328p cargo build --release --manifest-path embassy-executor/Cargo.toml --target avr-unknown-gnu-atmega328 -Z build-std=core,alloc --features nightly,arch-avr,integrated-timers,avr-device/atmega328p - diff --git a/ci.sh b/ci.sh index ee2f320b5..36a6dea30 100755 --- a/ci.sh +++ b/ci.sh @@ -2,6 +2,12 @@ set -eo pipefail +# check-cfg is stable on rustc 1.79 but not cargo 1.79. +# however, our cargo-batch is currently based on cargo 1.80, which does support check-cfg. +# so, force build.rs scripts to emit check-cfg commands. +# when 1.80 hits stable we can make build.rs unconditionally emit check-cfg and remove all this. +export EMBASSY_FORCE_CHECK_CFG=1 + export RUSTFLAGS=-Dwarnings export DEFMT_LOG=trace,embassy_hal_internal=debug,embassy_net_esp_hosted=debug,cyw43=info,cyw43_pio=info,smoltcp=info if [[ -z "${CARGO_TARGET_DIR}" ]]; then diff --git a/embassy-executor/build_common.rs b/embassy-executor/build_common.rs index 2c65f8529..0487eb3c5 100644 --- a/embassy-executor/build_common.rs +++ b/embassy-executor/build_common.rs @@ -70,6 +70,10 @@ impl CfgSet { } fn is_rustc_nightly() -> bool { + if env::var_os("EMBASSY_FORCE_CHECK_CFG").is_some() { + return true; + } + let rustc = env::var_os("RUSTC").unwrap_or_else(|| OsString::from("rustc")); let output = Command::new(rustc) diff --git a/embassy-hal-internal/build_common.rs b/embassy-hal-internal/build_common.rs index 2c65f8529..0487eb3c5 100644 --- a/embassy-hal-internal/build_common.rs +++ b/embassy-hal-internal/build_common.rs @@ -70,6 +70,10 @@ impl CfgSet { } fn is_rustc_nightly() -> bool { + if env::var_os("EMBASSY_FORCE_CHECK_CFG").is_some() { + return true; + } + let rustc = env::var_os("RUSTC").unwrap_or_else(|| OsString::from("rustc")); let output = Command::new(rustc) diff --git a/embassy-stm32/build_common.rs b/embassy-stm32/build_common.rs index 2c65f8529..0487eb3c5 100644 --- a/embassy-stm32/build_common.rs +++ b/embassy-stm32/build_common.rs @@ -70,6 +70,10 @@ impl CfgSet { } fn is_rustc_nightly() -> bool { + if env::var_os("EMBASSY_FORCE_CHECK_CFG").is_some() { + return true; + } + let rustc = env::var_os("RUSTC").unwrap_or_else(|| OsString::from("rustc")); let output = Command::new(rustc) diff --git a/embassy-sync/build_common.rs b/embassy-sync/build_common.rs index 2c65f8529..0487eb3c5 100644 --- a/embassy-sync/build_common.rs +++ b/embassy-sync/build_common.rs @@ -70,6 +70,10 @@ impl CfgSet { } fn is_rustc_nightly() -> bool { + if env::var_os("EMBASSY_FORCE_CHECK_CFG").is_some() { + return true; + } + let rustc = env::var_os("RUSTC").unwrap_or_else(|| OsString::from("rustc")); let output = Command::new(rustc) diff --git a/rust-toolchain.toml b/rust-toolchain.toml index 57185e217..037fc5c6a 100644 --- a/rust-toolchain.toml +++ b/rust-toolchain.toml @@ -1,5 +1,5 @@ [toolchain] -channel = "1.78" +channel = "1.79" components = [ "rust-src", "rustfmt", "llvm-tools" ] targets = [ "thumbv7em-none-eabi", From 7ad76f5f603078e7be300ae6fb08c6f6bf23f6c5 Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Thu, 13 Jun 2024 20:41:08 +0200 Subject: [PATCH 481/581] Use raw slices .len() method instead of unsafe hacks. Stabilized in 1.79. --- embassy-nrf/src/i2s.rs | 7 +++---- embassy-nrf/src/spim.rs | 12 +++++------ embassy-nrf/src/spis.rs | 16 +++++++------- embassy-nrf/src/util.rs | 35 +++++++------------------------ embassy-rp/src/dma.rs | 29 +++++++------------------ embassy-rp/src/spi.rs | 15 ++++++------- embassy-stm32/src/dma/dma_bdma.rs | 16 ++++++-------- embassy-stm32/src/dma/gpdma.rs | 16 ++++++-------- embassy-stm32/src/dma/mod.rs | 13 ------------ embassy-stm32/src/spi/mod.rs | 8 +++---- 10 files changed, 51 insertions(+), 116 deletions(-) diff --git a/embassy-nrf/src/i2s.rs b/embassy-nrf/src/i2s.rs index 966271ed9..5f565a9b7 100644 --- a/embassy-nrf/src/i2s.rs +++ b/embassy-nrf/src/i2s.rs @@ -16,7 +16,7 @@ use embassy_sync::waitqueue::AtomicWaker; use crate::gpio::{AnyPin, Pin as GpioPin}; use crate::interrupt::typelevel::Interrupt; use crate::pac::i2s::RegisterBlock; -use crate::util::{slice_in_ram_or, slice_ptr_parts}; +use crate::util::slice_in_ram_or; use crate::{interrupt, Peripheral, EASY_DMA_SIZE}; /// Type alias for `MultiBuffering` with 2 buffers. @@ -1028,9 +1028,8 @@ impl Device { } fn validated_dma_parts(buffer_ptr: *const [S]) -> Result<(u32, u32), Error> { - let (ptr, len) = slice_ptr_parts(buffer_ptr); - let ptr = ptr as u32; - let bytes_len = len * size_of::(); + let ptr = buffer_ptr as *const S as u32; + let bytes_len = buffer_ptr.len() * size_of::(); let maxcnt = (bytes_len / size_of::()) as u32; trace!("PTR={}, MAXCNT={}", ptr, maxcnt); diff --git a/embassy-nrf/src/spim.rs b/embassy-nrf/src/spim.rs index 373f22642..52660711a 100644 --- a/embassy-nrf/src/spim.rs +++ b/embassy-nrf/src/spim.rs @@ -19,7 +19,7 @@ pub use pac::spim0::frequency::FREQUENCY_A as Frequency; use crate::chip::{EASY_DMA_SIZE, FORCE_COPY_BUFFER_SIZE}; use crate::gpio::{self, convert_drive, AnyPin, OutputDrive, Pin as GpioPin, PselBits, SealedPin as _}; use crate::interrupt::typelevel::Interrupt; -use crate::util::{slice_in_ram_or, slice_ptr_len, slice_ptr_parts, slice_ptr_parts_mut}; +use crate::util::slice_in_ram_or; use crate::{interrupt, pac, Peripheral}; /// SPIM error @@ -240,14 +240,12 @@ impl<'d, T: Instance> Spim<'d, T> { } // Set up the DMA read. - let (ptr, len) = slice_ptr_parts_mut(rx); - let (rx_ptr, rx_len) = xfer_params(ptr as _, len as _, offset, length); + let (rx_ptr, rx_len) = xfer_params(rx as *mut u8 as _, rx.len() as _, offset, length); r.rxd.ptr.write(|w| unsafe { w.ptr().bits(rx_ptr) }); r.rxd.maxcnt.write(|w| unsafe { w.maxcnt().bits(rx_len as _) }); // Set up the DMA write. - let (ptr, len) = slice_ptr_parts(tx); - let (tx_ptr, tx_len) = xfer_params(ptr as _, len as _, offset, length); + let (tx_ptr, tx_len) = xfer_params(tx as *const u8 as _, tx.len() as _, offset, length); r.txd.ptr.write(|w| unsafe { w.ptr().bits(tx_ptr) }); r.txd.maxcnt.write(|w| unsafe { w.maxcnt().bits(tx_len as _) }); @@ -302,7 +300,7 @@ impl<'d, T: Instance> Spim<'d, T> { // NOTE: RAM slice check for rx is not necessary, as a mutable // slice can only be built from data located in RAM. - let xfer_len = core::cmp::max(slice_ptr_len(rx), slice_ptr_len(tx)); + let xfer_len = core::cmp::max(rx.len(), tx.len()); for offset in (0..xfer_len).step_by(EASY_DMA_SIZE) { let length = core::cmp::min(xfer_len - offset, EASY_DMA_SIZE); self.blocking_inner_from_ram_chunk(rx, tx, offset, length); @@ -356,7 +354,7 @@ impl<'d, T: Instance> Spim<'d, T> { // NOTE: RAM slice check for rx is not necessary, as a mutable // slice can only be built from data located in RAM. - let xfer_len = core::cmp::max(slice_ptr_len(rx), slice_ptr_len(tx)); + let xfer_len = core::cmp::max(rx.len(), tx.len()); for offset in (0..xfer_len).step_by(EASY_DMA_SIZE) { let length = core::cmp::min(xfer_len - offset, EASY_DMA_SIZE); self.async_inner_from_ram_chunk(rx, tx, offset, length).await; diff --git a/embassy-nrf/src/spis.rs b/embassy-nrf/src/spis.rs index 47bbeaf77..e98b34369 100644 --- a/embassy-nrf/src/spis.rs +++ b/embassy-nrf/src/spis.rs @@ -15,7 +15,7 @@ pub use pac::spis0::config::ORDER_A as BitOrder; use crate::chip::{EASY_DMA_SIZE, FORCE_COPY_BUFFER_SIZE}; use crate::gpio::{self, AnyPin, Pin as GpioPin, SealedPin as _}; use crate::interrupt::typelevel::Interrupt; -use crate::util::{slice_in_ram_or, slice_ptr_parts, slice_ptr_parts_mut}; +use crate::util::slice_in_ram_or; use crate::{interrupt, pac, Peripheral}; /// SPIS error @@ -226,20 +226,18 @@ impl<'d, T: Instance> Spis<'d, T> { let r = T::regs(); // Set up the DMA write. - let (ptr, len) = slice_ptr_parts(tx); - if len > EASY_DMA_SIZE { + if tx.len() > EASY_DMA_SIZE { return Err(Error::TxBufferTooLong); } - r.txd.ptr.write(|w| unsafe { w.ptr().bits(ptr as _) }); - r.txd.maxcnt.write(|w| unsafe { w.maxcnt().bits(len as _) }); + r.txd.ptr.write(|w| unsafe { w.ptr().bits(tx as *const u8 as _) }); + r.txd.maxcnt.write(|w| unsafe { w.maxcnt().bits(tx.len() as _) }); // Set up the DMA read. - let (ptr, len) = slice_ptr_parts_mut(rx); - if len > EASY_DMA_SIZE { + if rx.len() > EASY_DMA_SIZE { return Err(Error::RxBufferTooLong); } - r.rxd.ptr.write(|w| unsafe { w.ptr().bits(ptr as _) }); - r.rxd.maxcnt.write(|w| unsafe { w.maxcnt().bits(len as _) }); + r.rxd.ptr.write(|w| unsafe { w.ptr().bits(rx as *mut u8 as _) }); + r.rxd.maxcnt.write(|w| unsafe { w.maxcnt().bits(rx.len() as _) }); // Reset end event. r.events_end.reset(); diff --git a/embassy-nrf/src/util.rs b/embassy-nrf/src/util.rs index 13aba7dec..78f71719f 100644 --- a/embassy-nrf/src/util.rs +++ b/embassy-nrf/src/util.rs @@ -1,42 +1,21 @@ #![allow(dead_code)] -use core::mem; const SRAM_LOWER: usize = 0x2000_0000; const SRAM_UPPER: usize = 0x3000_0000; -// #![feature(const_slice_ptr_len)] -// https://github.com/rust-lang/rust/issues/71146 -pub(crate) fn slice_ptr_len(ptr: *const [T]) -> usize { - use core::ptr::NonNull; - let ptr = ptr.cast_mut(); - if let Some(ptr) = NonNull::new(ptr) { - ptr.len() - } else { - // We know ptr is null, so we know ptr.wrapping_byte_add(1) is not null. - NonNull::new(ptr.wrapping_byte_add(1)).unwrap().len() - } -} - -// TODO: replace transmutes with core::ptr::metadata once it's stable -pub(crate) fn slice_ptr_parts(slice: *const [T]) -> (*const T, usize) { - unsafe { mem::transmute(slice) } -} - -pub(crate) fn slice_ptr_parts_mut(slice: *mut [T]) -> (*mut T, usize) { - unsafe { mem::transmute(slice) } -} - /// Does this slice reside entirely within RAM? pub(crate) fn slice_in_ram(slice: *const [T]) -> bool { - let (ptr, len) = slice_ptr_parts(slice); - let ptr = ptr as usize; - ptr >= SRAM_LOWER && (ptr + len * core::mem::size_of::()) < SRAM_UPPER + if slice.is_empty() { + return true; + } + + let ptr = slice as *const T as usize; + ptr >= SRAM_LOWER && (ptr + slice.len() * core::mem::size_of::()) < SRAM_UPPER } /// Return an error if slice is not in RAM. Skips check if slice is zero-length. pub(crate) fn slice_in_ram_or(slice: *const [T], err: E) -> Result<(), E> { - let (_, len) = slice_ptr_parts(slice); - if len == 0 || slice_in_ram(slice) { + if slice_in_ram(slice) { Ok(()) } else { Err(err) diff --git a/embassy-rp/src/dma.rs b/embassy-rp/src/dma.rs index e6374a86c..8c04b43a1 100644 --- a/embassy-rp/src/dma.rs +++ b/embassy-rp/src/dma.rs @@ -47,12 +47,11 @@ pub unsafe fn read<'a, C: Channel, W: Word>( to: *mut [W], dreq: u8, ) -> Transfer<'a, C> { - let (to_ptr, len) = crate::dma::slice_ptr_parts(to); copy_inner( ch, from as *const u32, - to_ptr as *mut u32, - len, + to as *mut W as *mut u32, + to.len(), W::size(), false, true, @@ -69,12 +68,11 @@ pub unsafe fn write<'a, C: Channel, W: Word>( to: *mut W, dreq: u8, ) -> Transfer<'a, C> { - let (from_ptr, len) = crate::dma::slice_ptr_parts(from); copy_inner( ch, - from_ptr as *const u32, + from as *const W as *const u32, to as *mut u32, - len, + from.len(), W::size(), true, false, @@ -114,13 +112,13 @@ pub unsafe fn copy<'a, C: Channel, W: Word>( from: &[W], to: &mut [W], ) -> Transfer<'a, C> { - let (from_ptr, from_len) = crate::dma::slice_ptr_parts(from); - let (to_ptr, to_len) = crate::dma::slice_ptr_parts_mut(to); + let from_len = from.len(); + let to_len = to.len(); assert_eq!(from_len, to_len); copy_inner( ch, - from_ptr as *const u32, - to_ptr as *mut u32, + from.as_ptr() as *const u32, + to.as_mut_ptr() as *mut u32, from_len, W::size(), true, @@ -287,17 +285,6 @@ macro_rules! channel { }; } -// TODO: replace transmutes with core::ptr::metadata once it's stable -#[allow(unused)] -pub(crate) fn slice_ptr_parts(slice: *const [T]) -> (usize, usize) { - unsafe { core::mem::transmute(slice) } -} - -#[allow(unused)] -pub(crate) fn slice_ptr_parts_mut(slice: *mut [T]) -> (usize, usize) { - unsafe { core::mem::transmute(slice) } -} - channel!(DMA_CH0, 0); channel!(DMA_CH1, 1); channel!(DMA_CH2, 2); diff --git a/embassy-rp/src/spi.rs b/embassy-rp/src/spi.rs index ef4c644ae..1617c144c 100644 --- a/embassy-rp/src/spi.rs +++ b/embassy-rp/src/spi.rs @@ -394,17 +394,14 @@ impl<'d, T: Instance> Spi<'d, T, Async> { self.transfer_inner(words, words).await } - async fn transfer_inner(&mut self, rx_ptr: *mut [u8], tx_ptr: *const [u8]) -> Result<(), Error> { - let (_, tx_len) = crate::dma::slice_ptr_parts(tx_ptr); - let (_, rx_len) = crate::dma::slice_ptr_parts_mut(rx_ptr); - + async fn transfer_inner(&mut self, rx: *mut [u8], tx: *const [u8]) -> Result<(), Error> { // Start RX first. Transfer starts when TX starts, if RX // is not started yet we might lose bytes. let rx_ch = self.rx_dma.as_mut().unwrap(); let rx_transfer = unsafe { // If we don't assign future to a variable, the data register pointer // is held across an await and makes the future non-Send. - crate::dma::read(rx_ch, self.inner.regs().dr().as_ptr() as *const _, rx_ptr, T::RX_DREQ) + crate::dma::read(rx_ch, self.inner.regs().dr().as_ptr() as *const _, rx, T::RX_DREQ) }; let mut tx_ch = self.tx_dma.as_mut().unwrap(); @@ -413,10 +410,10 @@ impl<'d, T: Instance> Spi<'d, T, Async> { let tx_transfer = async { let p = self.inner.regs(); unsafe { - crate::dma::write(&mut tx_ch, tx_ptr, p.dr().as_ptr() as *mut _, T::TX_DREQ).await; + crate::dma::write(&mut tx_ch, tx, p.dr().as_ptr() as *mut _, T::TX_DREQ).await; - if rx_len > tx_len { - let write_bytes_len = rx_len - tx_len; + if rx.len() > tx.len() { + let write_bytes_len = rx.len() - tx.len(); // write dummy data // this will disable incrementation of the buffers crate::dma::write_repeated(tx_ch, p.dr().as_ptr() as *mut u8, write_bytes_len, T::TX_DREQ).await @@ -426,7 +423,7 @@ impl<'d, T: Instance> Spi<'d, T, Async> { join(tx_transfer, rx_transfer).await; // if tx > rx we should clear any overflow of the FIFO SPI buffer - if tx_len > rx_len { + if tx.len() > rx.len() { let p = self.inner.regs(); while p.sr().read().bsy() {} diff --git a/embassy-stm32/src/dma/dma_bdma.rs b/embassy-stm32/src/dma/dma_bdma.rs index a6344cf06..a462e317f 100644 --- a/embassy-stm32/src/dma/dma_bdma.rs +++ b/embassy-stm32/src/dma/dma_bdma.rs @@ -565,16 +565,13 @@ impl<'a> Transfer<'a> { ) -> Self { into_ref!(channel); - let (ptr, len) = super::slice_ptr_parts_mut(buf); - assert!(len > 0 && len <= 0xFFFF); - Self::new_inner( channel.map_into(), request, Dir::PeripheralToMemory, peri_addr as *const u32, - ptr as *mut u32, - len, + buf as *mut W as *mut u32, + buf.len(), true, W::size(), options, @@ -602,16 +599,13 @@ impl<'a> Transfer<'a> { ) -> Self { into_ref!(channel); - let (ptr, len) = super::slice_ptr_parts(buf); - assert!(len > 0 && len <= 0xFFFF); - Self::new_inner( channel.map_into(), request, Dir::MemoryToPeripheral, peri_addr as *const u32, - ptr as *mut u32, - len, + buf as *const W as *mut u32, + buf.len(), true, W::size(), options, @@ -653,6 +647,8 @@ impl<'a> Transfer<'a> { data_size: WordSize, options: TransferOptions, ) -> Self { + assert!(mem_len > 0 && mem_len <= 0xFFFF); + channel.configure( _request, dir, peri_addr, mem_addr, mem_len, incr_mem, data_size, options, ); diff --git a/embassy-stm32/src/dma/gpdma.rs b/embassy-stm32/src/dma/gpdma.rs index a3717e67b..13d5d15be 100644 --- a/embassy-stm32/src/dma/gpdma.rs +++ b/embassy-stm32/src/dma/gpdma.rs @@ -125,16 +125,13 @@ impl<'a> Transfer<'a> { ) -> Self { into_ref!(channel); - let (ptr, len) = super::slice_ptr_parts_mut(buf); - assert!(len > 0 && len <= 0xFFFF); - Self::new_inner( channel.map_into(), request, Dir::PeripheralToMemory, peri_addr as *const u32, - ptr as *mut u32, - len, + buf as *mut W as *mut u32, + buf.len(), true, W::size(), options, @@ -162,16 +159,13 @@ impl<'a> Transfer<'a> { ) -> Self { into_ref!(channel); - let (ptr, len) = super::slice_ptr_parts(buf); - assert!(len > 0 && len <= 0xFFFF); - Self::new_inner( channel.map_into(), request, Dir::MemoryToPeripheral, peri_addr as *const u32, - ptr as *mut u32, - len, + buf as *const W as *mut u32, + buf.len(), true, W::size(), options, @@ -213,6 +207,8 @@ impl<'a> Transfer<'a> { data_size: WordSize, _options: TransferOptions, ) -> Self { + assert!(mem_len > 0 && mem_len <= 0xFFFF); + let info = channel.info(); let ch = info.dma.ch(info.num); diff --git a/embassy-stm32/src/dma/mod.rs b/embassy-stm32/src/dma/mod.rs index 3f5687a62..66c4aa53c 100644 --- a/embassy-stm32/src/dma/mod.rs +++ b/embassy-stm32/src/dma/mod.rs @@ -22,8 +22,6 @@ pub(crate) use util::*; pub(crate) mod ringbuffer; pub mod word; -use core::mem; - use embassy_hal_internal::{impl_peripheral, Peripheral}; use crate::interrupt; @@ -121,17 +119,6 @@ pub struct NoDma; impl_peripheral!(NoDma); -// TODO: replace transmutes with core::ptr::metadata once it's stable -#[allow(unused)] -pub(crate) fn slice_ptr_parts(slice: *const [T]) -> (usize, usize) { - unsafe { mem::transmute(slice) } -} - -#[allow(unused)] -pub(crate) fn slice_ptr_parts_mut(slice: *mut [T]) -> (usize, usize) { - unsafe { mem::transmute(slice) } -} - // safety: must be called only once at startup pub(crate) unsafe fn init( cs: critical_section::CriticalSection, diff --git a/embassy-stm32/src/spi/mod.rs b/embassy-stm32/src/spi/mod.rs index 03c908db8..2e5f82dcb 100644 --- a/embassy-stm32/src/spi/mod.rs +++ b/embassy-stm32/src/spi/mod.rs @@ -9,7 +9,7 @@ use embassy_futures::join::join; use embassy_hal_internal::PeripheralRef; pub use embedded_hal_02::spi::{Mode, Phase, Polarity, MODE_0, MODE_1, MODE_2, MODE_3}; -use crate::dma::{slice_ptr_parts, word, ChannelAndRequest}; +use crate::dma::{word, ChannelAndRequest}; use crate::gpio::{AFType, AnyPin, Pull, SealedPin as _, Speed}; use crate::mode::{Async, Blocking, Mode as PeriMode}; use crate::pac::spi::{regs, vals, Spi as Regs}; @@ -798,10 +798,8 @@ impl<'d> Spi<'d, Async> { } async fn transfer_inner(&mut self, read: *mut [W], write: *const [W]) -> Result<(), Error> { - let (_, rx_len) = slice_ptr_parts(read); - let (_, tx_len) = slice_ptr_parts(write); - assert_eq!(rx_len, tx_len); - if rx_len == 0 { + assert_eq!(read.len(), write.len()); + if read.len() == 0 { return Ok(()); } From 597b5d63379e42bad42f626b6bd409c55936a438 Mon Sep 17 00:00:00 2001 From: rafael Date: Thu, 13 Jun 2024 22:47:24 +0200 Subject: [PATCH 482/581] probe-rs download 43439A0.bin --format bin --chip RP2040 --base-address 0x10100000 yields: Error: --format has been renamed to --binary-format. Please use --binary-format bin instead of --format bin --- examples/rp/src/bin/wifi_ap_tcp_server.rs | 4 ++-- examples/rp/src/bin/wifi_blinky.rs | 4 ++-- examples/rp/src/bin/wifi_scan.rs | 4 ++-- examples/rp/src/bin/wifi_tcp_server.rs | 4 ++-- tests/rp/src/bin/cyw43-perf.rs | 4 ++-- 5 files changed, 10 insertions(+), 10 deletions(-) diff --git a/examples/rp/src/bin/wifi_ap_tcp_server.rs b/examples/rp/src/bin/wifi_ap_tcp_server.rs index b60852359..dd0ca61a4 100644 --- a/examples/rp/src/bin/wifi_ap_tcp_server.rs +++ b/examples/rp/src/bin/wifi_ap_tcp_server.rs @@ -46,8 +46,8 @@ async fn main(spawner: Spawner) { // To make flashing faster for development, you may want to flash the firmwares independently // at hardcoded addresses, instead of baking them into the program with `include_bytes!`: - // probe-rs download 43439A0.bin --format bin --chip RP2040 --base-address 0x10100000 - // probe-rs download 43439A0_clm.bin --format bin --chip RP2040 --base-address 0x10140000 + // probe-rs download 43439A0.bin ---binary-format --chip RP2040 --base-address 0x10100000 + // probe-rs download 43439A0_clm.bin ---binary-format --chip RP2040 --base-address 0x10140000 //let fw = unsafe { core::slice::from_raw_parts(0x10100000 as *const u8, 230321) }; //let clm = unsafe { core::slice::from_raw_parts(0x10140000 as *const u8, 4752) }; diff --git a/examples/rp/src/bin/wifi_blinky.rs b/examples/rp/src/bin/wifi_blinky.rs index 18eefe41f..7af6c8c5f 100644 --- a/examples/rp/src/bin/wifi_blinky.rs +++ b/examples/rp/src/bin/wifi_blinky.rs @@ -33,8 +33,8 @@ async fn main(spawner: Spawner) { // To make flashing faster for development, you may want to flash the firmwares independently // at hardcoded addresses, instead of baking them into the program with `include_bytes!`: - // probe-rs download 43439A0.bin --format bin --chip RP2040 --base-address 0x10100000 - // probe-rs download 43439A0_clm.bin --format bin --chip RP2040 --base-address 0x10140000 + // probe-rs download 43439A0.bin ---binary-format --chip RP2040 --base-address 0x10100000 + // probe-rs download 43439A0_clm.bin ---binary-format --chip RP2040 --base-address 0x10140000 //let fw = unsafe { core::slice::from_raw_parts(0x10100000 as *const u8, 230321) }; //let clm = unsafe { core::slice::from_raw_parts(0x10140000 as *const u8, 4752) }; diff --git a/examples/rp/src/bin/wifi_scan.rs b/examples/rp/src/bin/wifi_scan.rs index e0f85a6b0..41ad7492f 100644 --- a/examples/rp/src/bin/wifi_scan.rs +++ b/examples/rp/src/bin/wifi_scan.rs @@ -43,8 +43,8 @@ async fn main(spawner: Spawner) { // To make flashing faster for development, you may want to flash the firmwares independently // at hardcoded addresses, instead of baking them into the program with `include_bytes!`: - // probe-rs download 43439A0.bin --format bin --chip RP2040 --base-address 0x10100000 - // probe-rs download 43439A0_clm.bin --format bin --chip RP2040 --base-address 0x10140000 + // probe-rs download 43439A0.bin ---binary-format --chip RP2040 --base-address 0x10100000 + // probe-rs download 43439A0_clm.bin ---binary-format --chip RP2040 --base-address 0x10140000 //let fw = unsafe { core::slice::from_raw_parts(0x10100000 as *const u8, 230321) }; //let clm = unsafe { core::slice::from_raw_parts(0x10140000 as *const u8, 4752) }; diff --git a/examples/rp/src/bin/wifi_tcp_server.rs b/examples/rp/src/bin/wifi_tcp_server.rs index f1afc4a00..272978efc 100644 --- a/examples/rp/src/bin/wifi_tcp_server.rs +++ b/examples/rp/src/bin/wifi_tcp_server.rs @@ -49,8 +49,8 @@ async fn main(spawner: Spawner) { // To make flashing faster for development, you may want to flash the firmwares independently // at hardcoded addresses, instead of baking them into the program with `include_bytes!`: - // probe-rs download 43439A0.bin --format bin --chip RP2040 --base-address 0x10100000 - // probe-rs download 43439A0_clm.bin --format bin --chip RP2040 --base-address 0x10140000 + // probe-rs download 43439A0.bin ---binary-format --chip RP2040 --base-address 0x10100000 + // probe-rs download 43439A0_clm.bin ---binary-format --chip RP2040 --base-address 0x10140000 //let fw = unsafe { core::slice::from_raw_parts(0x10100000 as *const u8, 230321) }; //let clm = unsafe { core::slice::from_raw_parts(0x10140000 as *const u8, 4752) }; diff --git a/tests/rp/src/bin/cyw43-perf.rs b/tests/rp/src/bin/cyw43-perf.rs index b46ae670a..4b0c7f7b9 100644 --- a/tests/rp/src/bin/cyw43-perf.rs +++ b/tests/rp/src/bin/cyw43-perf.rs @@ -45,8 +45,8 @@ async fn main(spawner: Spawner) { } // cyw43 firmware needs to be flashed manually: - // probe-rs download 43439A0.bin --format bin --chip RP2040 --base-address 0x101b0000 - // probe-rs download 43439A0_clm.bin --format bin --chip RP2040 --base-address 0x101f8000 + // probe-rs download 43439A0.bin ---binary-format --chip RP2040 --base-address 0x101b0000 + // probe-rs download 43439A0_clm.bin ---binary-format --chip RP2040 --base-address 0x101f8000 let fw = unsafe { core::slice::from_raw_parts(0x101b0000 as *const u8, 230321) }; let clm = unsafe { core::slice::from_raw_parts(0x101f8000 as *const u8, 4752) }; From 8ec2e193e283657ebe9d29361b2b32ff253633a1 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Aur=C3=A9lien=20Jacobs?= Date: Fri, 14 Jun 2024 17:42:56 +0200 Subject: [PATCH 483/581] implement with_timeout()/with_deadline() method style call on Future --- embassy-time/src/lib.rs | 2 +- embassy-time/src/timer.rs | 30 ++++++++++++++++++++++++++++++ 2 files changed, 31 insertions(+), 1 deletion(-) diff --git a/embassy-time/src/lib.rs b/embassy-time/src/lib.rs index 24ee51be7..8d0648ce5 100644 --- a/embassy-time/src/lib.rs +++ b/embassy-time/src/lib.rs @@ -32,7 +32,7 @@ pub use delay::{block_for, Delay}; pub use duration::Duration; pub use embassy_time_driver::TICK_HZ; pub use instant::Instant; -pub use timer::{with_deadline, with_timeout, Ticker, TimeoutError, Timer}; +pub use timer::{with_deadline, with_timeout, Ticker, TimeoutError, Timer, WithTimeout}; const fn gcd(a: u64, b: u64) -> u64 { if b == 0 { diff --git a/embassy-time/src/timer.rs b/embassy-time/src/timer.rs index bc39d8bc7..4d7194b20 100644 --- a/embassy-time/src/timer.rs +++ b/embassy-time/src/timer.rs @@ -37,6 +37,36 @@ pub async fn with_deadline(at: Instant, fut: F) -> Result Result; + + /// Runs a given future with a deadline time. + /// + /// If the future completes before the deadline, its output is returned. Otherwise, on timeout, + /// work on the future is stopped (`poll` is no longer called), the future is dropped and `Err(TimeoutError)` is returned. + async fn with_deadline(self, at: Instant) -> Result; +} + +impl WithTimeout for F { + type Output = F::Output; + + async fn with_timeout(self, timeout: Duration) -> Result { + with_timeout(timeout, self).await + } + + async fn with_deadline(self, at: Instant) -> Result { + with_deadline(at, self).await + } +} + /// A future that completes at a specified [Instant](struct.Instant.html). #[must_use = "futures do nothing unless you `.await` or poll them"] pub struct Timer { From b64b555bbfb6021c5e100e46ddcc226ea3116542 Mon Sep 17 00:00:00 2001 From: Eekle <96976531+Eekle@users.noreply.github.com> Date: Fri, 14 Jun 2024 18:58:01 +0200 Subject: [PATCH 484/581] Update stm32 to latest generated data --- embassy-stm32/Cargo.toml | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/embassy-stm32/Cargo.toml b/embassy-stm32/Cargo.toml index d06d8af03..f7f4ce6eb 100644 --- a/embassy-stm32/Cargo.toml +++ b/embassy-stm32/Cargo.toml @@ -72,7 +72,7 @@ rand_core = "0.6.3" sdio-host = "0.5.0" critical-section = "1.1" #stm32-metapac = { version = "15" } -stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-cdd0f8e7cb79cbd126e2480f1b747fb01c901910" } +stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-6bd87f176a6c125dca4aa73328d1179a67601039" } vcell = "0.1.3" nb = "1.0.0" @@ -97,7 +97,7 @@ proc-macro2 = "1.0.36" quote = "1.0.15" #stm32-metapac = { version = "15", default-features = false, features = ["metadata"]} -stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-cdd0f8e7cb79cbd126e2480f1b747fb01c901910", default-features = false, features = ["metadata"] } +stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-6bd87f176a6c125dca4aa73328d1179a67601039", default-features = false, features = ["metadata"] } [features] default = ["rt"] From a8581e242b165cdfce8518d2ba87a1cf572e80e6 Mon Sep 17 00:00:00 2001 From: rafael Date: Fri, 14 Jun 2024 21:43:12 +0200 Subject: [PATCH 485/581] typo: was missing "bin" --- examples/rp/src/bin/wifi_ap_tcp_server.rs | 4 ++-- examples/rp/src/bin/wifi_blinky.rs | 4 ++-- examples/rp/src/bin/wifi_scan.rs | 4 ++-- examples/rp/src/bin/wifi_tcp_server.rs | 4 ++-- 4 files changed, 8 insertions(+), 8 deletions(-) diff --git a/examples/rp/src/bin/wifi_ap_tcp_server.rs b/examples/rp/src/bin/wifi_ap_tcp_server.rs index dd0ca61a4..8bf60ca48 100644 --- a/examples/rp/src/bin/wifi_ap_tcp_server.rs +++ b/examples/rp/src/bin/wifi_ap_tcp_server.rs @@ -46,8 +46,8 @@ async fn main(spawner: Spawner) { // To make flashing faster for development, you may want to flash the firmwares independently // at hardcoded addresses, instead of baking them into the program with `include_bytes!`: - // probe-rs download 43439A0.bin ---binary-format --chip RP2040 --base-address 0x10100000 - // probe-rs download 43439A0_clm.bin ---binary-format --chip RP2040 --base-address 0x10140000 + // probe-rs download 43439A0.bin ---binary-format bin --chip RP2040 --base-address 0x10100000 + // probe-rs download 43439A0_clm.bin ---binary-format bin --chip RP2040 --base-address 0x10140000 //let fw = unsafe { core::slice::from_raw_parts(0x10100000 as *const u8, 230321) }; //let clm = unsafe { core::slice::from_raw_parts(0x10140000 as *const u8, 4752) }; diff --git a/examples/rp/src/bin/wifi_blinky.rs b/examples/rp/src/bin/wifi_blinky.rs index 7af6c8c5f..7c0f9eef8 100644 --- a/examples/rp/src/bin/wifi_blinky.rs +++ b/examples/rp/src/bin/wifi_blinky.rs @@ -33,8 +33,8 @@ async fn main(spawner: Spawner) { // To make flashing faster for development, you may want to flash the firmwares independently // at hardcoded addresses, instead of baking them into the program with `include_bytes!`: - // probe-rs download 43439A0.bin ---binary-format --chip RP2040 --base-address 0x10100000 - // probe-rs download 43439A0_clm.bin ---binary-format --chip RP2040 --base-address 0x10140000 + // probe-rs download 43439A0.bin ---binary-format bin --chip RP2040 --base-address 0x10100000 + // probe-rs download 43439A0_clm.bin ---binary-format bin --chip RP2040 --base-address 0x10140000 //let fw = unsafe { core::slice::from_raw_parts(0x10100000 as *const u8, 230321) }; //let clm = unsafe { core::slice::from_raw_parts(0x10140000 as *const u8, 4752) }; diff --git a/examples/rp/src/bin/wifi_scan.rs b/examples/rp/src/bin/wifi_scan.rs index 41ad7492f..1e535e266 100644 --- a/examples/rp/src/bin/wifi_scan.rs +++ b/examples/rp/src/bin/wifi_scan.rs @@ -43,8 +43,8 @@ async fn main(spawner: Spawner) { // To make flashing faster for development, you may want to flash the firmwares independently // at hardcoded addresses, instead of baking them into the program with `include_bytes!`: - // probe-rs download 43439A0.bin ---binary-format --chip RP2040 --base-address 0x10100000 - // probe-rs download 43439A0_clm.bin ---binary-format --chip RP2040 --base-address 0x10140000 + // probe-rs download 43439A0.bin ---binary-format bin --chip RP2040 --base-address 0x10100000 + // probe-rs download 43439A0_clm.bin ---binary-format bin --chip RP2040 --base-address 0x10140000 //let fw = unsafe { core::slice::from_raw_parts(0x10100000 as *const u8, 230321) }; //let clm = unsafe { core::slice::from_raw_parts(0x10140000 as *const u8, 4752) }; diff --git a/examples/rp/src/bin/wifi_tcp_server.rs b/examples/rp/src/bin/wifi_tcp_server.rs index 272978efc..4246115f9 100644 --- a/examples/rp/src/bin/wifi_tcp_server.rs +++ b/examples/rp/src/bin/wifi_tcp_server.rs @@ -49,8 +49,8 @@ async fn main(spawner: Spawner) { // To make flashing faster for development, you may want to flash the firmwares independently // at hardcoded addresses, instead of baking them into the program with `include_bytes!`: - // probe-rs download 43439A0.bin ---binary-format --chip RP2040 --base-address 0x10100000 - // probe-rs download 43439A0_clm.bin ---binary-format --chip RP2040 --base-address 0x10140000 + // probe-rs download 43439A0.bin ---binary-format bin --chip RP2040 --base-address 0x10100000 + // probe-rs download 43439A0_clm.bin ---binary-format bin --chip RP2040 --base-address 0x10140000 //let fw = unsafe { core::slice::from_raw_parts(0x10100000 as *const u8, 230321) }; //let clm = unsafe { core::slice::from_raw_parts(0x10140000 as *const u8, 4752) }; From 3cf94958c63ce672e569de9456808dbfce4d00f9 Mon Sep 17 00:00:00 2001 From: Mark Szente Date: Sat, 15 Jun 2024 14:21:15 +0200 Subject: [PATCH 486/581] Add Format derive --- embassy-stm32/src/dsihost.rs | 1 + 1 file changed, 1 insertion(+) diff --git a/embassy-stm32/src/dsihost.rs b/embassy-stm32/src/dsihost.rs index 7be51ba6d..c59ee3f2d 100644 --- a/embassy-stm32/src/dsihost.rs +++ b/embassy-stm32/src/dsihost.rs @@ -389,6 +389,7 @@ impl<'d, T: Instance> DsiHost<'d, T> { /// Possible Error Types for DSI HOST #[non_exhaustive] #[derive(Debug, PartialEq, Eq, Clone, Copy)] +#[cfg_attr(feature = "defmt", derive(defmt::Format))] pub enum Error { /// Waiting for FIFO empty flag timed out FifoTimeout, From 8b903e88736a2cb8906d216a4e7a291b670968b3 Mon Sep 17 00:00:00 2001 From: rafael Date: Sat, 15 Jun 2024 14:39:41 +0200 Subject: [PATCH 487/581] --binary-format bin in rp examples --- examples/rp/src/bin/wifi_ap_tcp_server.rs | 4 ++-- examples/rp/src/bin/wifi_blinky.rs | 4 ++-- examples/rp/src/bin/wifi_scan.rs | 4 ++-- examples/rp/src/bin/wifi_tcp_server.rs | 4 ++-- tests/rp/src/bin/cyw43-perf.rs | 4 ++-- 5 files changed, 10 insertions(+), 10 deletions(-) diff --git a/examples/rp/src/bin/wifi_ap_tcp_server.rs b/examples/rp/src/bin/wifi_ap_tcp_server.rs index 8bf60ca48..69ce4e8be 100644 --- a/examples/rp/src/bin/wifi_ap_tcp_server.rs +++ b/examples/rp/src/bin/wifi_ap_tcp_server.rs @@ -46,8 +46,8 @@ async fn main(spawner: Spawner) { // To make flashing faster for development, you may want to flash the firmwares independently // at hardcoded addresses, instead of baking them into the program with `include_bytes!`: - // probe-rs download 43439A0.bin ---binary-format bin --chip RP2040 --base-address 0x10100000 - // probe-rs download 43439A0_clm.bin ---binary-format bin --chip RP2040 --base-address 0x10140000 + // probe-rs download 43439A0.bin --binary-format bin --chip RP2040 --base-address 0x10100000 + // probe-rs download 43439A0_clm.bin --binary-format bin --chip RP2040 --base-address 0x10140000 //let fw = unsafe { core::slice::from_raw_parts(0x10100000 as *const u8, 230321) }; //let clm = unsafe { core::slice::from_raw_parts(0x10140000 as *const u8, 4752) }; diff --git a/examples/rp/src/bin/wifi_blinky.rs b/examples/rp/src/bin/wifi_blinky.rs index 7c0f9eef8..471349639 100644 --- a/examples/rp/src/bin/wifi_blinky.rs +++ b/examples/rp/src/bin/wifi_blinky.rs @@ -33,8 +33,8 @@ async fn main(spawner: Spawner) { // To make flashing faster for development, you may want to flash the firmwares independently // at hardcoded addresses, instead of baking them into the program with `include_bytes!`: - // probe-rs download 43439A0.bin ---binary-format bin --chip RP2040 --base-address 0x10100000 - // probe-rs download 43439A0_clm.bin ---binary-format bin --chip RP2040 --base-address 0x10140000 + // probe-rs download 43439A0.bin --binary-format bin --chip RP2040 --base-address 0x10100000 + // probe-rs download 43439A0_clm.bin --binary-format bin --chip RP2040 --base-address 0x10140000 //let fw = unsafe { core::slice::from_raw_parts(0x10100000 as *const u8, 230321) }; //let clm = unsafe { core::slice::from_raw_parts(0x10140000 as *const u8, 4752) }; diff --git a/examples/rp/src/bin/wifi_scan.rs b/examples/rp/src/bin/wifi_scan.rs index 1e535e266..5f4c848a2 100644 --- a/examples/rp/src/bin/wifi_scan.rs +++ b/examples/rp/src/bin/wifi_scan.rs @@ -43,8 +43,8 @@ async fn main(spawner: Spawner) { // To make flashing faster for development, you may want to flash the firmwares independently // at hardcoded addresses, instead of baking them into the program with `include_bytes!`: - // probe-rs download 43439A0.bin ---binary-format bin --chip RP2040 --base-address 0x10100000 - // probe-rs download 43439A0_clm.bin ---binary-format bin --chip RP2040 --base-address 0x10140000 + // probe-rs download 43439A0.bin --binary-format bin --chip RP2040 --base-address 0x10100000 + // probe-rs download 43439A0_clm.bin --binary-format bin --chip RP2040 --base-address 0x10140000 //let fw = unsafe { core::slice::from_raw_parts(0x10100000 as *const u8, 230321) }; //let clm = unsafe { core::slice::from_raw_parts(0x10140000 as *const u8, 4752) }; diff --git a/examples/rp/src/bin/wifi_tcp_server.rs b/examples/rp/src/bin/wifi_tcp_server.rs index 4246115f9..bbb531807 100644 --- a/examples/rp/src/bin/wifi_tcp_server.rs +++ b/examples/rp/src/bin/wifi_tcp_server.rs @@ -49,8 +49,8 @@ async fn main(spawner: Spawner) { // To make flashing faster for development, you may want to flash the firmwares independently // at hardcoded addresses, instead of baking them into the program with `include_bytes!`: - // probe-rs download 43439A0.bin ---binary-format bin --chip RP2040 --base-address 0x10100000 - // probe-rs download 43439A0_clm.bin ---binary-format bin --chip RP2040 --base-address 0x10140000 + // probe-rs download 43439A0.bin --binary-format bin --chip RP2040 --base-address 0x10100000 + // probe-rs download 43439A0_clm.bin --binary-format bin --chip RP2040 --base-address 0x10140000 //let fw = unsafe { core::slice::from_raw_parts(0x10100000 as *const u8, 230321) }; //let clm = unsafe { core::slice::from_raw_parts(0x10140000 as *const u8, 4752) }; diff --git a/tests/rp/src/bin/cyw43-perf.rs b/tests/rp/src/bin/cyw43-perf.rs index 4b0c7f7b9..53c84e711 100644 --- a/tests/rp/src/bin/cyw43-perf.rs +++ b/tests/rp/src/bin/cyw43-perf.rs @@ -45,8 +45,8 @@ async fn main(spawner: Spawner) { } // cyw43 firmware needs to be flashed manually: - // probe-rs download 43439A0.bin ---binary-format --chip RP2040 --base-address 0x101b0000 - // probe-rs download 43439A0_clm.bin ---binary-format --chip RP2040 --base-address 0x101f8000 + // probe-rs download 43439A0.bin --binary-format bin --chip RP2040 --base-address 0x101b0000 + // probe-rs download 43439A0_clm.bin --binary-format bin --chip RP2040 --base-address 0x101f8000 let fw = unsafe { core::slice::from_raw_parts(0x101b0000 as *const u8, 230321) }; let clm = unsafe { core::slice::from_raw_parts(0x101f8000 as *const u8, 4752) }; From 84cbf1d198d035471965232e89b4650c54edcfb1 Mon Sep 17 00:00:00 2001 From: Sjoerd Simons Date: Sat, 15 Jun 2024 16:38:07 +0200 Subject: [PATCH 488/581] [UCPD] Don't disable ucpd rx after each reception When disabling the UCPD RX after every reception it's relatively easy to drop packets. This seems to happen in particular with GoodCRC packets which can be sent very quickly by a receiver. To avoid this enable reception as soon as the pd phy get split out (preparing for packet processing) and only disable again when the pd phy gets dropped. --- embassy-stm32/src/ucpd.rs | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/embassy-stm32/src/ucpd.rs b/embassy-stm32/src/ucpd.rs index 89e2f5d49..cbec85ff3 100644 --- a/embassy-stm32/src/ucpd.rs +++ b/embassy-stm32/src/ucpd.rs @@ -169,6 +169,9 @@ impl<'d, T: Instance> Ucpd<'d, T> { // Enable hard reset receive interrupt. r.imr().modify(|w| w.set_rxhrstdetie(true)); + // Enable PD packet reception + r.cr().modify(|w| w.set_phyrxen(true)); + // Both parts must be dropped before the peripheral can be disabled. T::state().drop_not_ready.store(true, Ordering::Relaxed); @@ -319,6 +322,7 @@ pub struct PdPhy<'d, T: Instance> { impl<'d, T: Instance> Drop for PdPhy<'d, T> { fn drop(&mut self) { + T::REGS.cr().modify(|w| w.set_phyrxen(false)); // Check if the Type-C part was dropped already. let drop_not_ready = &T::state().drop_not_ready; if drop_not_ready.load(Ordering::Relaxed) { @@ -350,9 +354,7 @@ impl<'d, T: Instance> PdPhy<'d, T> { w.set_rxmsgendcf(true); }); - r.cr().modify(|w| w.set_phyrxen(true)); let _on_drop = OnDrop::new(|| { - r.cr().modify(|w| w.set_phyrxen(false)); Self::enable_rx_interrupt(false); }); From 9e8035cfb922d1b85f020e31bee2d3f815ba6f28 Mon Sep 17 00:00:00 2001 From: Sjoerd Simons Date: Sun, 16 Jun 2024 11:00:56 +0200 Subject: [PATCH 489/581] [USPD] clear interrupt flags right after reception Clearing the interrupt flags at beginning of reception will masks overruns and cause corrupted packets to be received. Instead clear the flags right after disabling the interrupt/after reception, so overruns on the next receive can be caught. Tested by forcing overruns due to explicit sleeps Signed-off-by: Sjoerd Simons --- embassy-stm32/src/ucpd.rs | 13 ++++++------- 1 file changed, 6 insertions(+), 7 deletions(-) diff --git a/embassy-stm32/src/ucpd.rs b/embassy-stm32/src/ucpd.rs index cbec85ff3..40aea75cb 100644 --- a/embassy-stm32/src/ucpd.rs +++ b/embassy-stm32/src/ucpd.rs @@ -347,15 +347,14 @@ impl<'d, T: Instance> PdPhy<'d, T> { .read(r.rxdr().as_ptr() as *mut u8, buf, TransferOptions::default()) }; - // Clear interrupt flags (possibly set from last receive). - r.icr().write(|w| { - w.set_rxorddetcf(true); - w.set_rxovrcf(true); - w.set_rxmsgendcf(true); - }); - let _on_drop = OnDrop::new(|| { Self::enable_rx_interrupt(false); + // Clear interrupt flags + r.icr().write(|w| { + w.set_rxorddetcf(true); + w.set_rxovrcf(true); + w.set_rxmsgendcf(true); + }); }); poll_fn(|cx| { From 94007ce6e0fc59e374902eadcc31616e56068e43 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Jan=20=C5=A0pa=C4=8Dek?= Date: Sat, 1 Jun 2024 18:16:40 +0200 Subject: [PATCH 490/581] stm32/gpio: refactor AfType --- embassy-stm32/src/can/bxcan/mod.rs | 10 +- embassy-stm32/src/can/fdcan.rs | 10 +- embassy-stm32/src/dcmi.rs | 5 +- embassy-stm32/src/dsihost.rs | 5 +- embassy-stm32/src/eth/v1/mod.rs | 12 +- embassy-stm32/src/eth/v2/mod.rs | 6 +- embassy-stm32/src/fmc.rs | 5 +- embassy-stm32/src/gpio.rs | 492 ++++++++++-------- embassy-stm32/src/hrtim/mod.rs | 16 +- embassy-stm32/src/i2c/mod.rs | 50 +- embassy-stm32/src/i2s.rs | 21 +- embassy-stm32/src/ltdc.rs | 5 +- embassy-stm32/src/macros.rs | 18 +- embassy-stm32/src/ospi/mod.rs | 168 +++--- embassy-stm32/src/qspi/mod.rs | 62 ++- embassy-stm32/src/rcc/mco.rs | 5 +- embassy-stm32/src/sai/mod.rs | 20 +- embassy-stm32/src/sdmmc/mod.rs | 69 +-- embassy-stm32/src/spi/mod.rs | 54 +- embassy-stm32/src/timer/complementary_pwm.rs | 7 +- embassy-stm32/src/timer/input_capture.rs | 8 +- embassy-stm32/src/timer/pwm_input.rs | 10 +- embassy-stm32/src/timer/qei.rs | 6 +- embassy-stm32/src/timer/simple_pwm.rs | 6 +- embassy-stm32/src/tsc/mod.rs | 54 +- embassy-stm32/src/usart/buffered.rs | 20 +- embassy-stm32/src/usart/mod.rs | 75 +-- embassy-stm32/src/usb/otg.rs | 10 +- embassy-stm32/src/usb/usb.rs | 5 +- .../stm32h7/src/bin/low_level_timer_api.rs | 10 +- tests/stm32/src/bin/gpio.rs | 4 +- 31 files changed, 667 insertions(+), 581 deletions(-) diff --git a/embassy-stm32/src/can/bxcan/mod.rs b/embassy-stm32/src/can/bxcan/mod.rs index 53b94b9e2..278c93ff4 100644 --- a/embassy-stm32/src/can/bxcan/mod.rs +++ b/embassy-stm32/src/can/bxcan/mod.rs @@ -18,7 +18,7 @@ pub use super::common::{BufferedCanReceiver, BufferedCanSender}; use super::frame::{Envelope, Frame}; use super::util; use crate::can::enums::{BusError, TryReadError}; -use crate::gpio::AFType; +use crate::gpio::{AfType, OutputType, Pull, Speed}; use crate::interrupt::typelevel::Interrupt; use crate::rcc::{self, RccPeripheral}; use crate::{interrupt, peripherals, Peripheral}; @@ -188,8 +188,8 @@ impl<'d> Can<'d> { let info = T::info(); let regs = &T::info().regs; - rx.set_as_af(rx.af_num(), AFType::Input); - tx.set_as_af(tx.af_num(), AFType::OutputPushPull); + rx.set_as_af(rx.af_num(), AfType::input(Pull::None)); + tx.set_as_af(tx.af_num(), AfType::output(OutputType::PushPull, Speed::VeryHigh)); rcc::enable_and_reset::(); @@ -223,8 +223,8 @@ impl<'d> Can<'d> { info.sce_interrupt.enable(); } - rx.set_as_af(rx.af_num(), AFType::Input); - tx.set_as_af(tx.af_num(), AFType::OutputPushPull); + rx.set_as_af(rx.af_num(), AfType::input(Pull::None)); + tx.set_as_af(tx.af_num(), AfType::output(OutputType::PushPull, Speed::VeryHigh)); Registers(T::regs()).leave_init_mode(); diff --git a/embassy-stm32/src/can/fdcan.rs b/embassy-stm32/src/can/fdcan.rs index f3ad718ae..c549313f3 100644 --- a/embassy-stm32/src/can/fdcan.rs +++ b/embassy-stm32/src/can/fdcan.rs @@ -10,7 +10,7 @@ use embassy_sync::channel::{Channel, DynamicReceiver, DynamicSender}; use embassy_sync::waitqueue::AtomicWaker; use crate::can::fd::peripheral::Registers; -use crate::gpio::AFType; +use crate::gpio::{AfType, OutputType, Pull, Speed}; use crate::interrupt::typelevel::Interrupt; use crate::rcc::{self, RccPeripheral}; use crate::{interrupt, peripherals, Peripheral}; @@ -184,8 +184,8 @@ impl<'d> CanConfigurator<'d> { ) -> CanConfigurator<'d> { into_ref!(_peri, rx, tx); - rx.set_as_af(rx.af_num(), AFType::Input); - tx.set_as_af(tx.af_num(), AFType::OutputPushPull); + rx.set_as_af(rx.af_num(), AfType::input(Pull::None)); + tx.set_as_af(tx.af_num(), AfType::output(OutputType::PushPull, Speed::VeryHigh)); rcc::enable_and_reset::(); @@ -193,8 +193,8 @@ impl<'d> CanConfigurator<'d> { config.timestamp_source = TimestampSource::Prescaler(TimestampPrescaler::_1); T::registers().into_config_mode(config); - rx.set_as_af(rx.af_num(), AFType::Input); - tx.set_as_af(tx.af_num(), AFType::OutputPushPull); + rx.set_as_af(rx.af_num(), AfType::input(Pull::None)); + tx.set_as_af(tx.af_num(), AfType::output(OutputType::PushPull, Speed::VeryHigh)); unsafe { T::IT0Interrupt::unpend(); // Not unsafe diff --git a/embassy-stm32/src/dcmi.rs b/embassy-stm32/src/dcmi.rs index 858ae49ca..4ba4e824e 100644 --- a/embassy-stm32/src/dcmi.rs +++ b/embassy-stm32/src/dcmi.rs @@ -7,7 +7,7 @@ use embassy_hal_internal::{into_ref, PeripheralRef}; use embassy_sync::waitqueue::AtomicWaker; use crate::dma::Transfer; -use crate::gpio::{AFType, Speed}; +use crate::gpio::{AfType, Pull}; use crate::interrupt::typelevel::Interrupt; use crate::{interrupt, rcc, Peripheral}; @@ -109,8 +109,7 @@ macro_rules! config_pins { into_ref!($($pin),*); critical_section::with(|_| { $( - $pin.set_as_af($pin.af_num(), AFType::Input); - $pin.set_speed(Speed::VeryHigh); + $pin.set_as_af($pin.af_num(), AfType::input(Pull::None)); )* }) }; diff --git a/embassy-stm32/src/dsihost.rs b/embassy-stm32/src/dsihost.rs index c59ee3f2d..51f124542 100644 --- a/embassy-stm32/src/dsihost.rs +++ b/embassy-stm32/src/dsihost.rs @@ -5,7 +5,7 @@ use core::marker::PhantomData; use embassy_hal_internal::{into_ref, PeripheralRef}; //use crate::gpio::{AnyPin, SealedPin}; -use crate::gpio::{AFType, AnyPin, Pull, Speed}; +use crate::gpio::{AfType, AnyPin, OutputType, Speed}; use crate::rcc::{self, RccPeripheral}; use crate::{peripherals, Peripheral}; @@ -80,8 +80,7 @@ impl<'d, T: Instance> DsiHost<'d, T> { rcc::enable_and_reset::(); // Set Tearing Enable pin according to CubeMx example - te.set_as_af_pull(te.af_num(), AFType::OutputPushPull, Pull::None); - te.set_speed(Speed::Low); + te.set_as_af(te.af_num(), AfType::output(OutputType::PushPull, Speed::Low)); /* T::regs().wcr().modify(|w| { w.set_dsien(true); diff --git a/embassy-stm32/src/eth/v1/mod.rs b/embassy-stm32/src/eth/v1/mod.rs index 6f0174def..cce75ece7 100644 --- a/embassy-stm32/src/eth/v1/mod.rs +++ b/embassy-stm32/src/eth/v1/mod.rs @@ -12,7 +12,9 @@ use stm32_metapac::eth::vals::{Apcs, Cr, Dm, DmaomrSr, Fes, Ftf, Ifg, MbProgress pub(crate) use self::rx_desc::{RDes, RDesRing}; pub(crate) use self::tx_desc::{TDes, TDesRing}; use super::*; -use crate::gpio::{AFType, AnyPin, SealedPin}; +#[cfg(eth_v1a)] +use crate::gpio::Pull; +use crate::gpio::{AfType, AnyPin, OutputType, SealedPin, Speed}; use crate::interrupt::InterruptExt; #[cfg(eth_v1a)] use crate::pac::AFIO; @@ -61,7 +63,7 @@ macro_rules! config_in_pins { critical_section::with(|_| { $( // TODO properly create a set_as_input function - $pin.set_as_af($pin.af_num(), AFType::Input); + $pin.set_as_af($pin.af_num(), AfType::input(Pull::None)); )* }) } @@ -72,8 +74,7 @@ macro_rules! config_af_pins { ($($pin:ident),*) => { critical_section::with(|_| { $( - // We are lucky here, this configures to max speed (50MHz) - $pin.set_as_af($pin.af_num(), AFType::OutputPushPull); + $pin.set_as_af($pin.af_num(), AfType::output(OutputType::PushPull, Speed::VeryHigh)); )* }) }; @@ -84,8 +85,7 @@ macro_rules! config_pins { ($($pin:ident),*) => { critical_section::with(|_| { $( - $pin.set_as_af($pin.af_num(), AFType::OutputPushPull); - $pin.set_speed(crate::gpio::Speed::VeryHigh); + $pin.set_as_af($pin.af_num(), AfType::output(OutputType::PushPull, Speed::VeryHigh)); )* }) }; diff --git a/embassy-stm32/src/eth/v2/mod.rs b/embassy-stm32/src/eth/v2/mod.rs index a19aa42cf..b26f08cd9 100644 --- a/embassy-stm32/src/eth/v2/mod.rs +++ b/embassy-stm32/src/eth/v2/mod.rs @@ -8,7 +8,7 @@ use stm32_metapac::syscfg::vals::EthSelPhy; pub(crate) use self::descriptors::{RDes, RDesRing, TDes, TDesRing}; use super::*; -use crate::gpio::{AFType, AnyPin, SealedPin as _, Speed}; +use crate::gpio::{AfType, AnyPin, OutputType, SealedPin as _, Speed}; use crate::interrupt::InterruptExt; use crate::pac::ETH; use crate::rcc::SealedRccPeripheral; @@ -56,8 +56,8 @@ macro_rules! config_pins { ($($pin:ident),*) => { critical_section::with(|_| { $( - $pin.set_as_af($pin.af_num(), AFType::OutputPushPull); - $pin.set_speed(Speed::VeryHigh); + // TODO: shouldn't some pins be configured as inputs? + $pin.set_as_af($pin.af_num(), AfType::output(OutputType::PushPull, Speed::VeryHigh)); )* }) }; diff --git a/embassy-stm32/src/fmc.rs b/embassy-stm32/src/fmc.rs index 82d8089f4..7aea466e8 100644 --- a/embassy-stm32/src/fmc.rs +++ b/embassy-stm32/src/fmc.rs @@ -3,7 +3,7 @@ use core::marker::PhantomData; use embassy_hal_internal::into_ref; -use crate::gpio::{AFType, Pull, Speed}; +use crate::gpio::{AfType, OutputType, Pull, Speed}; use crate::{rcc, Peripheral}; /// FMC driver @@ -76,8 +76,7 @@ macro_rules! config_pins { ($($pin:ident),*) => { into_ref!($($pin),*); $( - $pin.set_as_af_pull($pin.af_num(), AFType::OutputPushPull, Pull::Up); - $pin.set_speed(Speed::VeryHigh); + $pin.set_as_af($pin.af_num(), AfType::output_pull(OutputType::PushPull, Speed::VeryHigh, Pull::Up)); )* }; } diff --git a/embassy-stm32/src/gpio.rs b/embassy-stm32/src/gpio.rs index de08127cf..86bc226a9 100644 --- a/embassy-stm32/src/gpio.rs +++ b/embassy-stm32/src/gpio.rs @@ -32,7 +32,9 @@ impl<'d> Flex<'d> { } /// Put the pin into input mode. - #[inline] + /// + /// The internal weak pull-up and pull-down resistors will be enabled according to `pull`. + #[inline(never)] pub fn set_as_input(&mut self, pull: Pull) { critical_section::with(|_| { let r = self.pin.block(); @@ -51,35 +53,35 @@ impl<'d> Flex<'d> { Pull::None => vals::CnfIn::FLOATING, }; - let crlh = if n < 8 { 0 } else { 1 }; - r.cr(crlh).modify(|w| { + r.cr(n / 8).modify(|w| { w.set_mode(n % 8, vals::Mode::INPUT); w.set_cnf_in(n % 8, cnf); }); } #[cfg(gpio_v2)] { - r.pupdr().modify(|w| w.set_pupdr(n, pull.into())); + r.pupdr().modify(|w| w.set_pupdr(n, pull.to_pupdr())); r.otyper().modify(|w| w.set_ot(n, vals::Ot::PUSHPULL)); r.moder().modify(|w| w.set_moder(n, vals::Moder::INPUT)); } }); } - /// Put the pin into output mode. + /// Put the pin into push-pull output mode. /// /// The pin level will be whatever was set before (or low by default). If you want it to begin /// at a specific level, call `set_high`/`set_low` on the pin first. - #[inline] + /// + /// The internal weak pull-up and pull-down resistors will be disabled. + #[inline(never)] pub fn set_as_output(&mut self, speed: Speed) { critical_section::with(|_| { let r = self.pin.block(); let n = self.pin.pin() as usize; #[cfg(gpio_v1)] { - let crlh = if n < 8 { 0 } else { 1 }; - r.cr(crlh).modify(|w| { - w.set_mode(n % 8, speed.into()); + r.cr(n / 8).modify(|w| { + w.set_mode(n % 8, speed.to_mode()); w.set_cnf_out(n % 8, vals::CnfOut::PUSHPULL); }); } @@ -87,44 +89,50 @@ impl<'d> Flex<'d> { { r.pupdr().modify(|w| w.set_pupdr(n, vals::Pupdr::FLOATING)); r.otyper().modify(|w| w.set_ot(n, vals::Ot::PUSHPULL)); - self.pin.set_speed(speed); + r.ospeedr().modify(|w| w.set_ospeedr(n, speed.to_ospeedr())); r.moder().modify(|w| w.set_moder(n, vals::Moder::OUTPUT)); } }); } - /// Put the pin into input + output mode. + /// Put the pin into input + open-drain output mode. /// - /// This is commonly used for "open drain" mode. - /// the hardware will drive the line low if you set it to low, and will leave it floating if you set + /// The hardware will drive the line low if you set it to low, and will leave it floating if you set /// it to high, in which case you can read the input to figure out whether another device /// is driving the line low. /// /// The pin level will be whatever was set before (or low by default). If you want it to begin /// at a specific level, call `set_high`/`set_low` on the pin first. - #[inline] - pub fn set_as_input_output(&mut self, speed: Speed, pull: Pull) { + /// + /// The internal weak pull-up and pull-down resistors will be disabled. + #[inline(never)] + pub fn set_as_input_output(&mut self, speed: Speed) { + #[cfg(gpio_v1)] critical_section::with(|_| { let r = self.pin.block(); let n = self.pin.pin() as usize; - #[cfg(gpio_v1)] - { - let crlh = if n < 8 { 0 } else { 1 }; - match pull { - Pull::Up => r.bsrr().write(|w| w.set_bs(n, true)), - Pull::Down => r.bsrr().write(|w| w.set_br(n, true)), - Pull::None => {} - } - r.cr(crlh).modify(|w| w.set_mode(n % 8, speed.into())); - r.cr(crlh).modify(|w| w.set_cnf_out(n % 8, vals::CnfOut::OPENDRAIN)); - } - #[cfg(gpio_v2)] - { - r.pupdr().modify(|w| w.set_pupdr(n, pull.into())); - r.otyper().modify(|w| w.set_ot(n, vals::Ot::OPENDRAIN)); - self.pin.set_speed(speed); - r.moder().modify(|w| w.set_moder(n, vals::Moder::OUTPUT)); - } + r.cr(n / 8).modify(|w| w.set_mode(n % 8, speed.to_mode())); + r.cr(n / 8).modify(|w| w.set_cnf_out(n % 8, vals::CnfOut::OPENDRAIN)); + }); + + #[cfg(gpio_v2)] + self.set_as_input_output_pull(speed, Pull::None); + } + + /// Put the pin into input + open-drain output mode with internal pullup or pulldown. + /// + /// This works like [`Self::set_as_input_output()`], but it also allows to enable the internal + /// weak pull-up or pull-down resistors. + #[inline(never)] + #[cfg(gpio_v2)] + pub fn set_as_input_output_pull(&mut self, speed: Speed, pull: Pull) { + critical_section::with(|_| { + let r = self.pin.block(); + let n = self.pin.pin() as usize; + r.pupdr().modify(|w| w.set_pupdr(n, pull.to_pupdr())); + r.otyper().modify(|w| w.set_ot(n, vals::Ot::OPENDRAIN)); + r.ospeedr().modify(|w| w.set_ospeedr(n, speed.to_ospeedr())); + r.moder().modify(|w| w.set_moder(n, vals::Moder::OUTPUT)); }); } @@ -134,18 +142,18 @@ impl<'d> Flex<'d> { /// as the mode change is handled by the driver. #[inline] pub fn set_as_analog(&mut self) { + // TODO: does this also need a critical section, like other methods? self.pin.set_as_analog(); } /// Put the pin into AF mode, unchecked. /// - /// This puts the pin into the AF mode, with the requested number, pull and speed. This is + /// This puts the pin into the AF mode, with the requested number and AF type. This is /// completely unchecked, it can attach the pin to literally any peripheral, so use with care. #[inline] - pub fn set_as_af_unchecked(&mut self, af_num: u8, af_type: AFType, pull: Pull, speed: Speed) { + pub fn set_as_af_unchecked(&mut self, af_num: u8, af_type: AfType) { critical_section::with(|_| { - self.pin.set_as_af_pull(af_num, af_type, pull); - self.pin.set_speed(speed); + self.pin.set_as_af(af_num, af_type); }); } @@ -223,21 +231,7 @@ impl<'d> Drop for Flex<'d> { #[inline] fn drop(&mut self) { critical_section::with(|_| { - let r = self.pin.block(); - let n = self.pin.pin() as usize; - #[cfg(gpio_v1)] - { - let crlh = if n < 8 { 0 } else { 1 }; - r.cr(crlh).modify(|w| { - w.set_mode(n % 8, vals::Mode::INPUT); - w.set_cnf_in(n % 8, vals::CnfIn::FLOATING); - }); - } - #[cfg(gpio_v2)] - { - r.pupdr().modify(|w| w.set_pupdr(n, vals::Pupdr::FLOATING)); - r.moder().modify(|w| w.set_moder(n, vals::Moder::INPUT)); - } + self.pin.set_as_disconnected(); }); } } @@ -254,57 +248,56 @@ pub enum Pull { Down, } -#[cfg(gpio_v2)] -impl From for vals::Pupdr { - fn from(pull: Pull) -> Self { - use Pull::*; - - match pull { - None => vals::Pupdr::FLOATING, - Up => vals::Pupdr::PULLUP, - Down => vals::Pupdr::PULLDOWN, +impl Pull { + #[cfg(gpio_v2)] + const fn to_pupdr(self) -> vals::Pupdr { + match self { + Pull::None => vals::Pupdr::FLOATING, + Pull::Up => vals::Pupdr::PULLUP, + Pull::Down => vals::Pupdr::PULLDOWN, } } } -/// Speed settings +/// Speed setting for an output. /// -/// These vary depending on the chip, check the reference manual or datasheet for details. -#[allow(missing_docs)] +/// These vary depending on the chip, check the reference manual and datasheet ("I/O port +/// characteristics") for details. #[derive(Debug, Copy, Clone)] #[cfg_attr(feature = "defmt", derive(defmt::Format))] pub enum Speed { + #[cfg_attr(gpio_v1, doc = "Output speed OUTPUT2MHZ")] + #[cfg_attr(gpio_v2, doc = "Output speed 00")] Low, + #[cfg_attr(gpio_v1, doc = "Output speed OUTPUT10MHZ")] + #[cfg_attr(gpio_v2, doc = "Output speed 01")] Medium, - #[cfg(not(any(syscfg_f0, gpio_v1)))] + #[cfg_attr(gpio_v2, doc = "Output speed 10")] + #[cfg(not(any(gpio_v1, syscfg_f0)))] High, + #[cfg_attr(gpio_v1, doc = "Output speed OUTPUT50MHZ")] + #[cfg_attr(gpio_v2, doc = "Output speed 10")] VeryHigh, } -#[cfg(gpio_v1)] -impl From for vals::Mode { - fn from(speed: Speed) -> Self { - use Speed::*; - - match speed { - Low => vals::Mode::OUTPUT2MHZ, - Medium => vals::Mode::OUTPUT10MHZ, - VeryHigh => vals::Mode::OUTPUT50MHZ, +impl Speed { + #[cfg(gpio_v1)] + const fn to_mode(self) -> vals::Mode { + match self { + Speed::Low => vals::Mode::OUTPUT2MHZ, + Speed::Medium => vals::Mode::OUTPUT10MHZ, + Speed::VeryHigh => vals::Mode::OUTPUT50MHZ, } } -} -#[cfg(gpio_v2)] -impl From for vals::Ospeedr { - fn from(speed: Speed) -> Self { - use Speed::*; - - match speed { - Low => vals::Ospeedr::LOWSPEED, - Medium => vals::Ospeedr::MEDIUMSPEED, + #[cfg(gpio_v2)] + const fn to_ospeedr(self: Speed) -> vals::Ospeedr { + match self { + Speed::Low => vals::Ospeedr::LOWSPEED, + Speed::Medium => vals::Ospeedr::MEDIUMSPEED, #[cfg(not(syscfg_f0))] - High => vals::Ospeedr::HIGHSPEED, - VeryHigh => vals::Ospeedr::VERYHIGHSPEED, + Speed::High => vals::Ospeedr::HIGHSPEED, + Speed::VeryHigh => vals::Ospeedr::VERYHIGHSPEED, } } } @@ -445,17 +438,29 @@ pub struct OutputOpenDrain<'d> { } impl<'d> OutputOpenDrain<'d> { - /// Create a new GPIO open drain output driver for a [Pin] with the provided [Level] and [Speed], [Pull] configuration. + /// Create a new GPIO open drain output driver for a [Pin] with the provided [Level] and [Speed]. #[inline] - pub fn new(pin: impl Peripheral

+ 'd, initial_output: Level, speed: Speed, pull: Pull) -> Self { + pub fn new(pin: impl Peripheral

+ 'd, initial_output: Level, speed: Speed) -> Self { let mut pin = Flex::new(pin); - match initial_output { Level::High => pin.set_high(), Level::Low => pin.set_low(), } + pin.set_as_input_output(speed); + Self { pin } + } - pin.set_as_input_output(speed, pull); + /// Create a new GPIO open drain output driver for a [Pin] with the provided [Level], [Speed] + /// and [Pull]. + #[inline] + #[cfg(gpio_v2)] + pub fn new_pull(pin: impl Peripheral

+ 'd, initial_output: Level, speed: Speed, pull: Pull) -> Self { + let mut pin = Flex::new(pin); + match initial_output { + Level::High => pin.set_high(), + Level::Low => pin.set_low(), + } + pin.set_as_input_output_pull(speed, pull); Self { pin } } @@ -521,6 +526,8 @@ impl<'d> OutputOpenDrain<'d> { } /// GPIO output type +#[derive(Debug, Copy, Clone)] +#[cfg_attr(feature = "defmt", derive(defmt::Format))] pub enum OutputType { /// Drive the pin both high or low. PushPull, @@ -528,25 +535,170 @@ pub enum OutputType { OpenDrain, } -impl From for AFType { - fn from(value: OutputType) -> Self { - match value { - OutputType::OpenDrain => AFType::OutputOpenDrain, - OutputType::PushPull => AFType::OutputPushPull, +impl OutputType { + #[cfg(gpio_v1)] + const fn to_cnf_out(self) -> vals::CnfOut { + match self { + OutputType::PushPull => vals::CnfOut::ALTPUSHPULL, + OutputType::OpenDrain => vals::CnfOut::ALTOPENDRAIN, + } + } + + #[cfg(gpio_v2)] + const fn to_ot(self) -> vals::Ot { + match self { + OutputType::PushPull => vals::Ot::PUSHPULL, + OutputType::OpenDrain => vals::Ot::OPENDRAIN, } } } -/// Alternate function type settings -#[derive(Debug, Copy, Clone)] -#[cfg_attr(feature = "defmt", derive(defmt::Format))] -pub enum AFType { - /// Input - Input, - /// Output, drive the pin both high or low. - OutputPushPull, - /// Output, drive the pin low, or don't drive it at all if the output level is high. - OutputOpenDrain, +/// Alternate function type settings. +#[derive(Copy, Clone)] +#[cfg(gpio_v1)] +pub struct AfType { + mode: vals::Mode, + cnf: u8, + pull: Pull, +} + +#[cfg(gpio_v1)] +impl AfType { + /// Input with optional pullup or pulldown. + pub const fn input(pull: Pull) -> Self { + let cnf_in = match pull { + Pull::Up | Pull::Down => vals::CnfIn::PULL, + Pull::None => vals::CnfIn::FLOATING, + }; + Self { + mode: vals::Mode::INPUT, + cnf: cnf_in.to_bits(), + pull, + } + } + + /// Output with output type and speed and no pull-up or pull-down. + pub const fn output(output_type: OutputType, speed: Speed) -> Self { + Self { + mode: speed.to_mode(), + cnf: output_type.to_cnf_out().to_bits(), + pull: Pull::None, + } + } +} + +#[inline(never)] +#[cfg(gpio_v1)] +fn set_as_af(pin_port: u8, _af_num: u8, af_type: AfType) { + let pin = unsafe { AnyPin::steal(pin_port) }; + let r = pin.block(); + let n = pin._pin() as usize; + + r.cr(n / 8).modify(|w| { + w.set_mode(n % 8, af_type.mode); + // note that we are writing the CNF field, which is exposed as both `cnf_in` and `cnf_out` + // in the PAC. the choice of `cnf_in` instead of `cnf_out` in this code is arbitrary and + // does not affect the result. + w.set_cnf_in(n % 8, vals::CnfIn::from_bits(af_type.cnf)); + }); + + match af_type.pull { + Pull::Up => r.bsrr().write(|w| w.set_bs(n, true)), + Pull::Down => r.bsrr().write(|w| w.set_br(n, true)), + Pull::None => {} + } +} + +/// Alternate function type settings. +#[derive(Copy, Clone)] +#[cfg(gpio_v2)] +pub struct AfType { + pupdr: vals::Pupdr, + ot: vals::Ot, + ospeedr: vals::Ospeedr, +} + +#[cfg(gpio_v2)] +impl AfType { + /// Input with optional pullup or pulldown. + pub const fn input(pull: Pull) -> Self { + Self { + pupdr: pull.to_pupdr(), + ot: vals::Ot::PUSHPULL, + ospeedr: vals::Ospeedr::LOWSPEED, + } + } + + /// Output with output type and speed and no pull-up or pull-down. + pub const fn output(output_type: OutputType, speed: Speed) -> Self { + Self::output_pull(output_type, speed, Pull::None) + } + + /// Output with output type, speed and pull-up or pull-down; + pub const fn output_pull(output_type: OutputType, speed: Speed, pull: Pull) -> Self { + Self { + pupdr: pull.to_pupdr(), + ot: output_type.to_ot(), + ospeedr: speed.to_ospeedr(), + } + } +} + +#[inline(never)] +#[cfg(gpio_v2)] +fn set_as_af(pin_port: u8, af_num: u8, af_type: AfType) { + let pin = unsafe { AnyPin::steal(pin_port) }; + let r = pin.block(); + let n = pin._pin() as usize; + + r.afr(n / 8).modify(|w| w.set_afr(n % 8, af_num)); + r.pupdr().modify(|w| w.set_pupdr(n, af_type.pupdr)); + r.otyper().modify(|w| w.set_ot(n, af_type.ot)); + r.ospeedr().modify(|w| w.set_ospeedr(n, af_type.ospeedr)); + r.moder().modify(|w| w.set_moder(n, vals::Moder::ALTERNATE)); +} + +#[inline(never)] +fn set_as_analog(pin_port: u8) { + let pin = unsafe { AnyPin::steal(pin_port) }; + let r = pin.block(); + let n = pin._pin() as usize; + + #[cfg(gpio_v1)] + r.cr(n / 8).modify(|w| { + w.set_mode(n % 8, vals::Mode::INPUT); + w.set_cnf_in(n % 8, vals::CnfIn::ANALOG); + }); + + #[cfg(gpio_v2)] + r.moder().modify(|w| w.set_moder(n, vals::Moder::ANALOG)); +} + +#[inline(never)] +fn get_pull(pin_port: u8) -> Pull { + let pin = unsafe { AnyPin::steal(pin_port) }; + let r = pin.block(); + let n = pin._pin() as usize; + + #[cfg(gpio_v1)] + return match r.cr(n / 8).read().mode(n % 8) { + vals::Mode::INPUT => match r.cr(n / 8).read().cnf_in(n % 8) { + vals::CnfIn::PULL => match r.odr().read().odr(n) { + vals::Odr::LOW => Pull::Down, + vals::Odr::HIGH => Pull::Up, + }, + _ => Pull::None, + }, + _ => Pull::None, + }; + + #[cfg(gpio_v2)] + return match r.pupdr().read().pupdr(n) { + vals::Pupdr::FLOATING => Pull::None, + vals::Pupdr::PULLDOWN => Pull::Down, + vals::Pupdr::PULLUP => Pull::Up, + vals::Pupdr::_RESERVED_3 => Pull::None, + }; } pub(crate) trait SealedPin { @@ -556,6 +708,7 @@ pub(crate) trait SealedPin { fn _pin(&self) -> u8 { self.pin_port() % 16 } + #[inline] fn _port(&self) -> u8 { self.pin_port() / 16 @@ -581,146 +734,31 @@ pub(crate) trait SealedPin { } #[inline] - fn set_as_af(&self, af_num: u8, af_type: AFType) { - self.set_as_af_pull(af_num, af_type, Pull::None); - } - - #[cfg(gpio_v1)] - #[inline] - fn set_as_af_pull(&self, _af_num: u8, af_type: AFType, pull: Pull) { - // F1 uses the AFIO register for remapping. - // For now, this is not implemented, so af_num is ignored - // _af_num should be zero here, since it is not set by stm32-data - let r = self.block(); - let n = self._pin() as usize; - let crlh = if n < 8 { 0 } else { 1 }; - match af_type { - AFType::Input => { - let cnf = match pull { - Pull::Up => { - r.bsrr().write(|w| w.set_bs(n, true)); - vals::CnfIn::PULL - } - Pull::Down => { - r.bsrr().write(|w| w.set_br(n, true)); - vals::CnfIn::PULL - } - Pull::None => vals::CnfIn::FLOATING, - }; - - r.cr(crlh).modify(|w| { - w.set_mode(n % 8, vals::Mode::INPUT); - w.set_cnf_in(n % 8, cnf); - }); - } - AFType::OutputPushPull => { - r.cr(crlh).modify(|w| { - w.set_mode(n % 8, vals::Mode::OUTPUT50MHZ); - w.set_cnf_out(n % 8, vals::CnfOut::ALTPUSHPULL); - }); - } - AFType::OutputOpenDrain => { - r.cr(crlh).modify(|w| { - w.set_mode(n % 8, vals::Mode::OUTPUT50MHZ); - w.set_cnf_out(n % 8, vals::CnfOut::ALTOPENDRAIN); - }); - } - } - } - - #[cfg(gpio_v2)] - #[inline] - fn set_as_af_pull(&self, af_num: u8, af_type: AFType, pull: Pull) { - let pin = self._pin() as usize; - let block = self.block(); - block.afr(pin / 8).modify(|w| w.set_afr(pin % 8, af_num)); - match af_type { - AFType::Input => {} - AFType::OutputPushPull => block.otyper().modify(|w| w.set_ot(pin, vals::Ot::PUSHPULL)), - AFType::OutputOpenDrain => block.otyper().modify(|w| w.set_ot(pin, vals::Ot::OPENDRAIN)), - } - block.pupdr().modify(|w| w.set_pupdr(pin, pull.into())); - - block.moder().modify(|w| w.set_moder(pin, vals::Moder::ALTERNATE)); + fn set_as_af(&self, af_num: u8, af_type: AfType) { + set_as_af(self.pin_port(), af_num, af_type) } #[inline] fn set_as_analog(&self) { - let pin = self._pin() as usize; - let block = self.block(); - #[cfg(gpio_v1)] - { - let crlh = if pin < 8 { 0 } else { 1 }; - block.cr(crlh).modify(|w| { - w.set_mode(pin % 8, vals::Mode::INPUT); - w.set_cnf_in(pin % 8, vals::CnfIn::ANALOG); - }); - } - #[cfg(gpio_v2)] - block.moder().modify(|w| w.set_moder(pin, vals::Moder::ANALOG)); + set_as_analog(self.pin_port()); } /// Set the pin as "disconnected", ie doing nothing and consuming the lowest /// amount of power possible. /// - /// This is currently the same as set_as_analog but is semantically different really. - /// Drivers should set_as_disconnected pins when dropped. + /// This is currently the same as [`Self::set_as_analog()`] but is semantically different + /// really. Drivers should `set_as_disconnected()` pins when dropped. + /// + /// Note that this also disables the internal weak pull-up and pull-down resistors. #[inline] fn set_as_disconnected(&self) { self.set_as_analog(); } - /// Sets the speed of the output pin. - /// - /// This should never be called for AFType::Input on the STM32F1 series, since MODE and - /// CNF bits are not independent. If the CNF bits are altered afterwards as well, this - /// will put the pin into output mode. - #[inline] - fn set_speed(&self, speed: Speed) { - let pin = self._pin() as usize; - - #[cfg(gpio_v1)] - { - let crlh = if pin < 8 { 0 } else { 1 }; - self.block().cr(crlh).modify(|w| { - w.set_mode(pin % 8, speed.into()); - }); - } - - #[cfg(gpio_v2)] - self.block().ospeedr().modify(|w| w.set_ospeedr(pin, speed.into())); - } - /// Get the pull-up configuration. #[inline] fn pull(&self) -> Pull { - critical_section::with(|_| { - let r = self.block(); - let n = self._pin() as usize; - #[cfg(gpio_v1)] - { - let crlh = if n < 8 { 0 } else { 1 }; - match r.cr(crlh).read().mode(n % 8) { - vals::Mode::INPUT => match r.cr(crlh).read().cnf_in(n % 8) { - vals::CnfIn::PULL => match r.odr().read().odr(n) { - vals::Odr::LOW => Pull::Down, - vals::Odr::HIGH => Pull::Up, - }, - _ => Pull::None, - }, - _ => Pull::None, - } - } - #[cfg(gpio_v2)] - { - match r.pupdr().read().pupdr(n) { - vals::Pupdr::FLOATING => Pull::None, - vals::Pupdr::PULLDOWN => Pull::Down, - vals::Pupdr::PULLUP => Pull::Up, - vals::Pupdr::_RESERVED_3 => Pull::None, - } - } - }) + critical_section::with(|_| get_pull(self.pin_port())) } } diff --git a/embassy-stm32/src/hrtim/mod.rs b/embassy-stm32/src/hrtim/mod.rs index c9d5bff17..13343fc2a 100644 --- a/embassy-stm32/src/hrtim/mod.rs +++ b/embassy-stm32/src/hrtim/mod.rs @@ -7,7 +7,7 @@ use core::marker::PhantomData; use embassy_hal_internal::{into_ref, PeripheralRef}; pub use traits::Instance; -use crate::gpio::{AFType, AnyPin}; +use crate::gpio::{AfType, AnyPin, OutputType, Speed}; use crate::time::Hertz; use crate::{rcc, Peripheral}; @@ -80,9 +80,10 @@ macro_rules! advanced_channel_impl { into_ref!(pin); critical_section::with(|_| { pin.set_low(); - pin.set_as_af(pin.af_num(), AFType::OutputPushPull); - #[cfg(gpio_v2)] - pin.set_speed(crate::gpio::Speed::VeryHigh); + pin.set_as_af( + pin.af_num(), + AfType::output(OutputType::PushPull, Speed::VeryHigh), + ); }); PwmPin { _pin: pin.map_into(), @@ -97,9 +98,10 @@ macro_rules! advanced_channel_impl { into_ref!(pin); critical_section::with(|_| { pin.set_low(); - pin.set_as_af(pin.af_num(), AFType::OutputPushPull); - #[cfg(gpio_v2)] - pin.set_speed(crate::gpio::Speed::VeryHigh); + pin.set_as_af( + pin.af_num(), + AfType::output(OutputType::PushPull, Speed::VeryHigh), + ); }); ComplementaryPwmPin { _pin: pin.map_into(), diff --git a/embassy-stm32/src/i2c/mod.rs b/embassy-stm32/src/i2c/mod.rs index f43cb4567..739e960b9 100644 --- a/embassy-stm32/src/i2c/mod.rs +++ b/embassy-stm32/src/i2c/mod.rs @@ -15,7 +15,9 @@ use embassy_sync::waitqueue::AtomicWaker; use embassy_time::{Duration, Instant}; use crate::dma::ChannelAndRequest; -use crate::gpio::{AFType, AnyPin, Pull, SealedPin as _, Speed}; +#[cfg(gpio_v2)] +use crate::gpio::Pull; +use crate::gpio::{AfType, AnyPin, OutputType, SealedPin as _, Speed}; use crate::interrupt::typelevel::Interrupt; use crate::mode::{Async, Blocking, Mode}; use crate::rcc::{RccInfo, SealedRccPeripheral}; @@ -50,11 +52,13 @@ pub struct Config { /// /// Using external pullup resistors is recommended for I2C. If you do /// have external pullups you should not enable this. + #[cfg(gpio_v2)] pub sda_pullup: bool, /// Enable internal pullup on SCL. /// /// Using external pullup resistors is recommended for I2C. If you do /// have external pullups you should not enable this. + #[cfg(gpio_v2)] pub scl_pullup: bool, /// Timeout. #[cfg(feature = "time")] @@ -64,7 +68,9 @@ pub struct Config { impl Default for Config { fn default() -> Self { Self { + #[cfg(gpio_v2)] sda_pullup: false, + #[cfg(gpio_v2)] scl_pullup: false, #[cfg(feature = "time")] timeout: embassy_time::Duration::from_millis(1000), @@ -73,18 +79,32 @@ impl Default for Config { } impl Config { - fn scl_pull_mode(&self) -> Pull { - match self.scl_pullup { - true => Pull::Up, - false => Pull::Down, - } + fn scl_af(&self) -> AfType { + #[cfg(gpio_v1)] + return AfType::output(OutputType::OpenDrain, Speed::Medium); + #[cfg(gpio_v2)] + return AfType::output_pull( + OutputType::OpenDrain, + Speed::Medium, + match self.scl_pullup { + true => Pull::Up, + false => Pull::Down, + }, + ); } - fn sda_pull_mode(&self) -> Pull { - match self.sda_pullup { - true => Pull::Up, - false => Pull::Down, - } + fn sda_af(&self) -> AfType { + #[cfg(gpio_v1)] + return AfType::output(OutputType::OpenDrain, Speed::Medium); + #[cfg(gpio_v2)] + return AfType::output_pull( + OutputType::OpenDrain, + Speed::Medium, + match self.sda_pullup { + true => Pull::Up, + false => Pull::Down, + }, + ); } } @@ -118,8 +138,8 @@ impl<'d> I2c<'d, Async> { ) -> Self { Self::new_inner( peri, - new_pin!(scl, AFType::OutputOpenDrain, Speed::Medium, config.scl_pull_mode()), - new_pin!(sda, AFType::OutputOpenDrain, Speed::Medium, config.sda_pull_mode()), + new_pin!(scl, config.scl_af()), + new_pin!(sda, config.sda_af()), new_dma!(tx_dma), new_dma!(rx_dma), freq, @@ -139,8 +159,8 @@ impl<'d> I2c<'d, Blocking> { ) -> Self { Self::new_inner( peri, - new_pin!(scl, AFType::OutputOpenDrain, Speed::Medium, config.scl_pull_mode()), - new_pin!(sda, AFType::OutputOpenDrain, Speed::Medium, config.sda_pull_mode()), + new_pin!(scl, config.scl_af()), + new_pin!(sda, config.sda_af()), None, None, freq, diff --git a/embassy-stm32/src/i2s.rs b/embassy-stm32/src/i2s.rs index f893dd235..094de2461 100644 --- a/embassy-stm32/src/i2s.rs +++ b/embassy-stm32/src/i2s.rs @@ -3,7 +3,7 @@ use embassy_hal_internal::into_ref; use crate::dma::ChannelAndRequest; -use crate::gpio::{AFType, AnyPin, SealedPin, Speed}; +use crate::gpio::{AfType, AnyPin, OutputType, SealedPin, Speed}; use crate::mode::Async; use crate::pac::spi::vals; use crate::spi::{Config as SpiConfig, *}; @@ -180,7 +180,7 @@ impl<'d> I2S<'d> { into_ref!(sd); Self::new_inner( peri, - new_pin!(sd, AFType::OutputPushPull, Speed::VeryHigh), + new_pin!(sd, AfType::output(OutputType::PushPull, Speed::VeryHigh)), None, ws, ck, @@ -209,7 +209,7 @@ impl<'d> I2S<'d> { Self::new_inner( peri, None, - new_pin!(sd, AFType::OutputPushPull, Speed::VeryHigh), + new_pin!(sd, AfType::output(OutputType::PushPull, Speed::VeryHigh)), ws, ck, mck, @@ -244,8 +244,8 @@ impl<'d> I2S<'d> { into_ref!(txsd, rxsd); Self::new_inner( peri, - new_pin!(txsd, AFType::OutputPushPull, Speed::VeryHigh), - new_pin!(rxsd, AFType::OutputPushPull, Speed::VeryHigh), + new_pin!(txsd, AfType::output(OutputType::PushPull, Speed::VeryHigh)), + new_pin!(rxsd, AfType::output(OutputType::PushPull, Speed::VeryHigh)), ws, ck, mck, @@ -292,14 +292,9 @@ impl<'d> I2S<'d> { ) -> Self { into_ref!(ws, ck, mck); - ws.set_as_af(ws.af_num(), AFType::OutputPushPull); - ws.set_speed(Speed::VeryHigh); - - ck.set_as_af(ck.af_num(), AFType::OutputPushPull); - ck.set_speed(Speed::VeryHigh); - - mck.set_as_af(mck.af_num(), AFType::OutputPushPull); - mck.set_speed(Speed::VeryHigh); + ws.set_as_af(ws.af_num(), AfType::output(OutputType::PushPull, Speed::VeryHigh)); + ck.set_as_af(ck.af_num(), AfType::output(OutputType::PushPull, Speed::VeryHigh)); + mck.set_as_af(mck.af_num(), AfType::output(OutputType::PushPull, Speed::VeryHigh)); let mut spi_cfg = SpiConfig::default(); spi_cfg.frequency = freq; diff --git a/embassy-stm32/src/ltdc.rs b/embassy-stm32/src/ltdc.rs index c262e7a0c..481d77843 100644 --- a/embassy-stm32/src/ltdc.rs +++ b/embassy-stm32/src/ltdc.rs @@ -62,11 +62,10 @@ impl<'d, T: Instance> Ltdc<'d, T> { rcc::enable_and_reset::(); - //new_pin!(clk, AFType::OutputPushPull, Speed::VeryHigh, Pull::None); + //new_pin!(clk, AfType::output(OutputType::PushPull, Speed::VeryHigh)); // Set Tearing Enable pin according to CubeMx example - //te.set_as_af_pull(te.af_num(), AFType::OutputPushPull, Pull::None); - //te.set_speed(Speed::Low); + //te.set_as_af_pull(te.af_num(), AfType::output(OutputType::PushPull, Speed::Low)); /* T::regs().wcr().modify(|w| { w.set_dsien(true); diff --git a/embassy-stm32/src/macros.rs b/embassy-stm32/src/macros.rs index dcd25cbe9..ae53deb08 100644 --- a/embassy-stm32/src/macros.rs +++ b/embassy-stm32/src/macros.rs @@ -97,23 +97,9 @@ macro_rules! new_dma { } macro_rules! new_pin { - ($name:ident, $aftype:expr) => {{ - new_pin!($name, $aftype, crate::gpio::Speed::Medium, crate::gpio::Pull::None) - }}; - ($name:ident, $aftype:expr, $speed:expr) => { - new_pin!($name, $aftype, $speed, crate::gpio::Pull::None) - }; - ($name:ident, $aftype:expr, $speed:expr, $pull:expr) => {{ + ($name:ident, $af_type:expr) => {{ let pin = $name.into_ref(); - pin.set_as_af_pull(pin.af_num(), $aftype, $pull); - // Do not call set_speed on AFType::Input, as MODE and CNF bits are not independent - // for gpio_v1 - match $aftype { - crate::gpio::AFType::Input => {} - _ => { - pin.set_speed($speed); - } - }; + pin.set_as_af(pin.af_num(), $af_type); Some(pin.map_into()) }}; } diff --git a/embassy-stm32/src/ospi/mod.rs b/embassy-stm32/src/ospi/mod.rs index 882781cce..f6eb0d17c 100644 --- a/embassy-stm32/src/ospi/mod.rs +++ b/embassy-stm32/src/ospi/mod.rs @@ -13,7 +13,7 @@ pub use enums::*; use stm32_metapac::octospi::vals::{PhaseMode, SizeInBits}; use crate::dma::{word, ChannelAndRequest}; -use crate::gpio::{AFType, AnyPin, Pull, SealedPin as _, Speed}; +use crate::gpio::{AfType, AnyPin, OutputType, Pull, SealedPin as _, Speed}; use crate::mode::{Async, Blocking, Mode as PeriMode}; use crate::pac::octospi::{vals, Octospi as Regs}; use crate::rcc::{self, RccPeripheral}; @@ -548,16 +548,19 @@ impl<'d, T: Instance> Ospi<'d, T, Blocking> { ) -> Self { Self::new_inner( peri, - new_pin!(d0, AFType::OutputPushPull, Speed::VeryHigh), - new_pin!(d1, AFType::Input, Speed::VeryHigh), + new_pin!(d0, AfType::output(OutputType::PushPull, Speed::VeryHigh)), + new_pin!(d1, AfType::input(Pull::None)), None, None, None, None, None, None, - new_pin!(sck, AFType::OutputPushPull, Speed::VeryHigh), - new_pin!(nss, AFType::OutputPushPull, Speed::VeryHigh, Pull::Up), + new_pin!(sck, AfType::output(OutputType::PushPull, Speed::VeryHigh)), + new_pin!( + nss, + AfType::output_pull(OutputType::PushPull, Speed::VeryHigh, Pull::Up) + ), None, None, config, @@ -577,16 +580,19 @@ impl<'d, T: Instance> Ospi<'d, T, Blocking> { ) -> Self { Self::new_inner( peri, - new_pin!(d0, AFType::OutputPushPull, Speed::VeryHigh), - new_pin!(d1, AFType::OutputPushPull, Speed::VeryHigh), + new_pin!(d0, AfType::output(OutputType::PushPull, Speed::VeryHigh)), + new_pin!(d1, AfType::output(OutputType::PushPull, Speed::VeryHigh)), None, None, None, None, None, None, - new_pin!(sck, AFType::OutputPushPull, Speed::VeryHigh), - new_pin!(nss, AFType::OutputPushPull, Speed::VeryHigh, Pull::Up), + new_pin!(sck, AfType::output(OutputType::PushPull, Speed::VeryHigh)), + new_pin!( + nss, + AfType::output_pull(OutputType::PushPull, Speed::VeryHigh, Pull::Up) + ), None, None, config, @@ -608,16 +614,19 @@ impl<'d, T: Instance> Ospi<'d, T, Blocking> { ) -> Self { Self::new_inner( peri, - new_pin!(d0, AFType::OutputPushPull, Speed::VeryHigh), - new_pin!(d1, AFType::OutputPushPull, Speed::VeryHigh), - new_pin!(d2, AFType::OutputPushPull, Speed::VeryHigh), - new_pin!(d3, AFType::OutputPushPull, Speed::VeryHigh), + new_pin!(d0, AfType::output(OutputType::PushPull, Speed::VeryHigh)), + new_pin!(d1, AfType::output(OutputType::PushPull, Speed::VeryHigh)), + new_pin!(d2, AfType::output(OutputType::PushPull, Speed::VeryHigh)), + new_pin!(d3, AfType::output(OutputType::PushPull, Speed::VeryHigh)), None, None, None, None, - new_pin!(sck, AFType::OutputPushPull, Speed::VeryHigh), - new_pin!(nss, AFType::OutputPushPull, Speed::VeryHigh, Pull::Up), + new_pin!(sck, AfType::output(OutputType::PushPull, Speed::VeryHigh)), + new_pin!( + nss, + AfType::output_pull(OutputType::PushPull, Speed::VeryHigh, Pull::Up) + ), None, None, config, @@ -643,16 +652,19 @@ impl<'d, T: Instance> Ospi<'d, T, Blocking> { ) -> Self { Self::new_inner( peri, - new_pin!(d0, AFType::OutputPushPull, Speed::VeryHigh), - new_pin!(d1, AFType::OutputPushPull, Speed::VeryHigh), - new_pin!(d2, AFType::OutputPushPull, Speed::VeryHigh), - new_pin!(d3, AFType::OutputPushPull, Speed::VeryHigh), - new_pin!(d4, AFType::OutputPushPull, Speed::VeryHigh), - new_pin!(d5, AFType::OutputPushPull, Speed::VeryHigh), - new_pin!(d6, AFType::OutputPushPull, Speed::VeryHigh), - new_pin!(d7, AFType::OutputPushPull, Speed::VeryHigh), - new_pin!(sck, AFType::OutputPushPull, Speed::VeryHigh), - new_pin!(nss, AFType::OutputPushPull, Speed::VeryHigh, Pull::Up), + new_pin!(d0, AfType::output(OutputType::PushPull, Speed::VeryHigh)), + new_pin!(d1, AfType::output(OutputType::PushPull, Speed::VeryHigh)), + new_pin!(d2, AfType::output(OutputType::PushPull, Speed::VeryHigh)), + new_pin!(d3, AfType::output(OutputType::PushPull, Speed::VeryHigh)), + new_pin!(d4, AfType::output(OutputType::PushPull, Speed::VeryHigh)), + new_pin!(d5, AfType::output(OutputType::PushPull, Speed::VeryHigh)), + new_pin!(d6, AfType::output(OutputType::PushPull, Speed::VeryHigh)), + new_pin!(d7, AfType::output(OutputType::PushPull, Speed::VeryHigh)), + new_pin!(sck, AfType::output(OutputType::PushPull, Speed::VeryHigh)), + new_pin!( + nss, + AfType::output_pull(OutputType::PushPull, Speed::VeryHigh, Pull::Up) + ), None, None, config, @@ -678,16 +690,19 @@ impl<'d, T: Instance> Ospi<'d, T, Blocking> { ) -> Self { Self::new_inner( peri, - new_pin!(d0, AFType::OutputPushPull, Speed::VeryHigh), - new_pin!(d1, AFType::OutputPushPull, Speed::VeryHigh), - new_pin!(d2, AFType::OutputPushPull, Speed::VeryHigh), - new_pin!(d3, AFType::OutputPushPull, Speed::VeryHigh), - new_pin!(d4, AFType::OutputPushPull, Speed::VeryHigh), - new_pin!(d5, AFType::OutputPushPull, Speed::VeryHigh), - new_pin!(d6, AFType::OutputPushPull, Speed::VeryHigh), - new_pin!(d7, AFType::OutputPushPull, Speed::VeryHigh), - new_pin!(sck, AFType::OutputPushPull, Speed::VeryHigh), - new_pin!(nss, AFType::OutputPushPull, Speed::VeryHigh, Pull::Up), + new_pin!(d0, AfType::output(OutputType::PushPull, Speed::VeryHigh)), + new_pin!(d1, AfType::output(OutputType::PushPull, Speed::VeryHigh)), + new_pin!(d2, AfType::output(OutputType::PushPull, Speed::VeryHigh)), + new_pin!(d3, AfType::output(OutputType::PushPull, Speed::VeryHigh)), + new_pin!(d4, AfType::output(OutputType::PushPull, Speed::VeryHigh)), + new_pin!(d5, AfType::output(OutputType::PushPull, Speed::VeryHigh)), + new_pin!(d6, AfType::output(OutputType::PushPull, Speed::VeryHigh)), + new_pin!(d7, AfType::output(OutputType::PushPull, Speed::VeryHigh)), + new_pin!(sck, AfType::output(OutputType::PushPull, Speed::VeryHigh)), + new_pin!( + nss, + AfType::output_pull(OutputType::PushPull, Speed::VeryHigh, Pull::Up) + ), None, None, config, @@ -710,16 +725,19 @@ impl<'d, T: Instance> Ospi<'d, T, Async> { ) -> Self { Self::new_inner( peri, - new_pin!(d0, AFType::OutputPushPull, Speed::VeryHigh), - new_pin!(d1, AFType::Input, Speed::VeryHigh), + new_pin!(d0, AfType::output(OutputType::PushPull, Speed::VeryHigh)), + new_pin!(d1, AfType::input(Pull::None)), None, None, None, None, None, None, - new_pin!(sck, AFType::OutputPushPull, Speed::VeryHigh), - new_pin!(nss, AFType::OutputPushPull, Speed::VeryHigh, Pull::Up), + new_pin!(sck, AfType::output(OutputType::PushPull, Speed::VeryHigh)), + new_pin!( + nss, + AfType::output_pull(OutputType::PushPull, Speed::VeryHigh, Pull::Up) + ), None, new_dma!(dma), config, @@ -740,16 +758,19 @@ impl<'d, T: Instance> Ospi<'d, T, Async> { ) -> Self { Self::new_inner( peri, - new_pin!(d0, AFType::OutputPushPull, Speed::VeryHigh), - new_pin!(d1, AFType::OutputPushPull, Speed::VeryHigh), + new_pin!(d0, AfType::output(OutputType::PushPull, Speed::VeryHigh)), + new_pin!(d1, AfType::output(OutputType::PushPull, Speed::VeryHigh)), None, None, None, None, None, None, - new_pin!(sck, AFType::OutputPushPull, Speed::VeryHigh), - new_pin!(nss, AFType::OutputPushPull, Speed::VeryHigh, Pull::Up), + new_pin!(sck, AfType::output(OutputType::PushPull, Speed::VeryHigh)), + new_pin!( + nss, + AfType::output_pull(OutputType::PushPull, Speed::VeryHigh, Pull::Up) + ), None, new_dma!(dma), config, @@ -772,16 +793,19 @@ impl<'d, T: Instance> Ospi<'d, T, Async> { ) -> Self { Self::new_inner( peri, - new_pin!(d0, AFType::OutputPushPull, Speed::VeryHigh), - new_pin!(d1, AFType::OutputPushPull, Speed::VeryHigh), - new_pin!(d2, AFType::OutputPushPull, Speed::VeryHigh), - new_pin!(d3, AFType::OutputPushPull, Speed::VeryHigh), + new_pin!(d0, AfType::output(OutputType::PushPull, Speed::VeryHigh)), + new_pin!(d1, AfType::output(OutputType::PushPull, Speed::VeryHigh)), + new_pin!(d2, AfType::output(OutputType::PushPull, Speed::VeryHigh)), + new_pin!(d3, AfType::output(OutputType::PushPull, Speed::VeryHigh)), None, None, None, None, - new_pin!(sck, AFType::OutputPushPull, Speed::VeryHigh), - new_pin!(nss, AFType::OutputPushPull, Speed::VeryHigh, Pull::Up), + new_pin!(sck, AfType::output(OutputType::PushPull, Speed::VeryHigh)), + new_pin!( + nss, + AfType::output_pull(OutputType::PushPull, Speed::VeryHigh, Pull::Up) + ), None, new_dma!(dma), config, @@ -808,16 +832,19 @@ impl<'d, T: Instance> Ospi<'d, T, Async> { ) -> Self { Self::new_inner( peri, - new_pin!(d0, AFType::OutputPushPull, Speed::VeryHigh), - new_pin!(d1, AFType::OutputPushPull, Speed::VeryHigh), - new_pin!(d2, AFType::OutputPushPull, Speed::VeryHigh), - new_pin!(d3, AFType::OutputPushPull, Speed::VeryHigh), - new_pin!(d4, AFType::OutputPushPull, Speed::VeryHigh), - new_pin!(d5, AFType::OutputPushPull, Speed::VeryHigh), - new_pin!(d6, AFType::OutputPushPull, Speed::VeryHigh), - new_pin!(d7, AFType::OutputPushPull, Speed::VeryHigh), - new_pin!(sck, AFType::OutputPushPull, Speed::VeryHigh), - new_pin!(nss, AFType::OutputPushPull, Speed::VeryHigh, Pull::Up), + new_pin!(d0, AfType::output(OutputType::PushPull, Speed::VeryHigh)), + new_pin!(d1, AfType::output(OutputType::PushPull, Speed::VeryHigh)), + new_pin!(d2, AfType::output(OutputType::PushPull, Speed::VeryHigh)), + new_pin!(d3, AfType::output(OutputType::PushPull, Speed::VeryHigh)), + new_pin!(d4, AfType::output(OutputType::PushPull, Speed::VeryHigh)), + new_pin!(d5, AfType::output(OutputType::PushPull, Speed::VeryHigh)), + new_pin!(d6, AfType::output(OutputType::PushPull, Speed::VeryHigh)), + new_pin!(d7, AfType::output(OutputType::PushPull, Speed::VeryHigh)), + new_pin!(sck, AfType::output(OutputType::PushPull, Speed::VeryHigh)), + new_pin!( + nss, + AfType::output_pull(OutputType::PushPull, Speed::VeryHigh, Pull::Up) + ), None, new_dma!(dma), config, @@ -844,16 +871,19 @@ impl<'d, T: Instance> Ospi<'d, T, Async> { ) -> Self { Self::new_inner( peri, - new_pin!(d0, AFType::OutputPushPull, Speed::VeryHigh), - new_pin!(d1, AFType::OutputPushPull, Speed::VeryHigh), - new_pin!(d2, AFType::OutputPushPull, Speed::VeryHigh), - new_pin!(d3, AFType::OutputPushPull, Speed::VeryHigh), - new_pin!(d4, AFType::OutputPushPull, Speed::VeryHigh), - new_pin!(d5, AFType::OutputPushPull, Speed::VeryHigh), - new_pin!(d6, AFType::OutputPushPull, Speed::VeryHigh), - new_pin!(d7, AFType::OutputPushPull, Speed::VeryHigh), - new_pin!(sck, AFType::OutputPushPull, Speed::VeryHigh), - new_pin!(nss, AFType::OutputPushPull, Speed::VeryHigh, Pull::Up), + new_pin!(d0, AfType::output(OutputType::PushPull, Speed::VeryHigh)), + new_pin!(d1, AfType::output(OutputType::PushPull, Speed::VeryHigh)), + new_pin!(d2, AfType::output(OutputType::PushPull, Speed::VeryHigh)), + new_pin!(d3, AfType::output(OutputType::PushPull, Speed::VeryHigh)), + new_pin!(d4, AfType::output(OutputType::PushPull, Speed::VeryHigh)), + new_pin!(d5, AfType::output(OutputType::PushPull, Speed::VeryHigh)), + new_pin!(d6, AfType::output(OutputType::PushPull, Speed::VeryHigh)), + new_pin!(d7, AfType::output(OutputType::PushPull, Speed::VeryHigh)), + new_pin!(sck, AfType::output(OutputType::PushPull, Speed::VeryHigh)), + new_pin!( + nss, + AfType::output_pull(OutputType::PushPull, Speed::VeryHigh, Pull::Up) + ), None, new_dma!(dma), config, diff --git a/embassy-stm32/src/qspi/mod.rs b/embassy-stm32/src/qspi/mod.rs index 06c8f4812..308947e99 100644 --- a/embassy-stm32/src/qspi/mod.rs +++ b/embassy-stm32/src/qspi/mod.rs @@ -10,7 +10,7 @@ use embassy_hal_internal::{into_ref, PeripheralRef}; use enums::*; use crate::dma::ChannelAndRequest; -use crate::gpio::{AFType, AnyPin, Pull, Speed}; +use crate::gpio::{AfType, AnyPin, OutputType, Pull, Speed}; use crate::mode::{Async, Blocking, Mode as PeriMode}; use crate::pac::quadspi::Quadspi as Regs; use crate::rcc::{self, RccPeripheral}; @@ -248,12 +248,15 @@ impl<'d, T: Instance> Qspi<'d, T, Blocking> { ) -> Self { Self::new_inner( peri, - new_pin!(d0, AFType::OutputPushPull, Speed::VeryHigh), - new_pin!(d1, AFType::OutputPushPull, Speed::VeryHigh), - new_pin!(d2, AFType::OutputPushPull, Speed::VeryHigh), - new_pin!(d3, AFType::OutputPushPull, Speed::VeryHigh), - new_pin!(sck, AFType::OutputPushPull, Speed::VeryHigh), - new_pin!(nss, AFType::OutputPushPull, Speed::VeryHigh, Pull::Up), + new_pin!(d0, AfType::output(OutputType::PushPull, Speed::VeryHigh)), + new_pin!(d1, AfType::output(OutputType::PushPull, Speed::VeryHigh)), + new_pin!(d2, AfType::output(OutputType::PushPull, Speed::VeryHigh)), + new_pin!(d3, AfType::output(OutputType::PushPull, Speed::VeryHigh)), + new_pin!(sck, AfType::output(OutputType::PushPull, Speed::VeryHigh)), + new_pin!( + nss, + AfType::output_pull(OutputType::PushPull, Speed::VeryHigh, Pull::Up) + ), None, config, FlashSelection::Flash1, @@ -273,12 +276,15 @@ impl<'d, T: Instance> Qspi<'d, T, Blocking> { ) -> Self { Self::new_inner( peri, - new_pin!(d0, AFType::OutputPushPull, Speed::VeryHigh), - new_pin!(d1, AFType::OutputPushPull, Speed::VeryHigh), - new_pin!(d2, AFType::OutputPushPull, Speed::VeryHigh), - new_pin!(d3, AFType::OutputPushPull, Speed::VeryHigh), - new_pin!(sck, AFType::OutputPushPull, Speed::VeryHigh), - new_pin!(nss, AFType::OutputPushPull, Speed::VeryHigh, Pull::Up), + new_pin!(d0, AfType::output(OutputType::PushPull, Speed::VeryHigh)), + new_pin!(d1, AfType::output(OutputType::PushPull, Speed::VeryHigh)), + new_pin!(d2, AfType::output(OutputType::PushPull, Speed::VeryHigh)), + new_pin!(d3, AfType::output(OutputType::PushPull, Speed::VeryHigh)), + new_pin!(sck, AfType::output(OutputType::PushPull, Speed::VeryHigh)), + new_pin!( + nss, + AfType::output_pull(OutputType::PushPull, Speed::VeryHigh, Pull::Up) + ), None, config, FlashSelection::Flash2, @@ -301,12 +307,15 @@ impl<'d, T: Instance> Qspi<'d, T, Async> { ) -> Self { Self::new_inner( peri, - new_pin!(d0, AFType::OutputPushPull, Speed::VeryHigh), - new_pin!(d1, AFType::OutputPushPull, Speed::VeryHigh), - new_pin!(d2, AFType::OutputPushPull, Speed::VeryHigh), - new_pin!(d3, AFType::OutputPushPull, Speed::VeryHigh), - new_pin!(sck, AFType::OutputPushPull, Speed::VeryHigh), - new_pin!(nss, AFType::OutputPushPull, Speed::VeryHigh, Pull::Up), + new_pin!(d0, AfType::output(OutputType::PushPull, Speed::VeryHigh)), + new_pin!(d1, AfType::output(OutputType::PushPull, Speed::VeryHigh)), + new_pin!(d2, AfType::output(OutputType::PushPull, Speed::VeryHigh)), + new_pin!(d3, AfType::output(OutputType::PushPull, Speed::VeryHigh)), + new_pin!(sck, AfType::output(OutputType::PushPull, Speed::VeryHigh)), + new_pin!( + nss, + AfType::output_pull(OutputType::PushPull, Speed::VeryHigh, Pull::Up) + ), new_dma!(dma), config, FlashSelection::Flash1, @@ -327,12 +336,15 @@ impl<'d, T: Instance> Qspi<'d, T, Async> { ) -> Self { Self::new_inner( peri, - new_pin!(d0, AFType::OutputPushPull, Speed::VeryHigh), - new_pin!(d1, AFType::OutputPushPull, Speed::VeryHigh), - new_pin!(d2, AFType::OutputPushPull, Speed::VeryHigh), - new_pin!(d3, AFType::OutputPushPull, Speed::VeryHigh), - new_pin!(sck, AFType::OutputPushPull, Speed::VeryHigh), - new_pin!(nss, AFType::OutputPushPull, Speed::VeryHigh, Pull::Up), + new_pin!(d0, AfType::output(OutputType::PushPull, Speed::VeryHigh)), + new_pin!(d1, AfType::output(OutputType::PushPull, Speed::VeryHigh)), + new_pin!(d2, AfType::output(OutputType::PushPull, Speed::VeryHigh)), + new_pin!(d3, AfType::output(OutputType::PushPull, Speed::VeryHigh)), + new_pin!(sck, AfType::output(OutputType::PushPull, Speed::VeryHigh)), + new_pin!( + nss, + AfType::output_pull(OutputType::PushPull, Speed::VeryHigh, Pull::Up) + ), new_dma!(dma), config, FlashSelection::Flash2, diff --git a/embassy-stm32/src/rcc/mco.rs b/embassy-stm32/src/rcc/mco.rs index 40e963466..d1ce14c86 100644 --- a/embassy-stm32/src/rcc/mco.rs +++ b/embassy-stm32/src/rcc/mco.rs @@ -2,7 +2,7 @@ use core::marker::PhantomData; use embassy_hal_internal::into_ref; -use crate::gpio::{AFType, Speed}; +use crate::gpio::{AfType, OutputType, Speed}; #[cfg(not(any(stm32f1, rcc_f0v1, rcc_f3v1, rcc_f37)))] pub use crate::pac::rcc::vals::Mcopre as McoPrescaler; #[cfg(not(any( @@ -101,8 +101,7 @@ impl<'d, T: McoInstance> Mco<'d, T> { critical_section::with(|_| unsafe { T::_apply_clock_settings(source, prescaler); - pin.set_as_af(pin.af_num(), AFType::OutputPushPull); - pin.set_speed(Speed::VeryHigh); + pin.set_as_af(pin.af_num(), AfType::output(OutputType::PushPull, Speed::VeryHigh)); }); Self { phantom: PhantomData } diff --git a/embassy-stm32/src/sai/mod.rs b/embassy-stm32/src/sai/mod.rs index 87bde12eb..c48d81b5f 100644 --- a/embassy-stm32/src/sai/mod.rs +++ b/embassy-stm32/src/sai/mod.rs @@ -9,7 +9,7 @@ use embassy_hal_internal::{into_ref, PeripheralRef}; pub use crate::dma::word; #[cfg(not(gpdma))] use crate::dma::{ringbuffer, Channel, ReadableRingBuffer, Request, TransferOptions, WritableRingBuffer}; -use crate::gpio::{AFType, AnyPin, SealedPin as _}; +use crate::gpio::{AfType, AnyPin, OutputType, Pull, SealedPin as _, Speed}; use crate::pac::sai::{vals, Sai as Regs}; use crate::rcc::{self, RccPeripheral}; use crate::{peripherals, Peripheral}; @@ -656,17 +656,17 @@ fn dr(w: crate::pac::sai::Sai, sub_block: WhichSubBlock) -> *mut } // return the type for (sd, sck) -fn get_af_types(mode: Mode, tx_rx: TxRx) -> (AFType, AFType) { +fn get_af_types(mode: Mode, tx_rx: TxRx) -> (AfType, AfType) { ( //sd is defined by tx/rx mode match tx_rx { - TxRx::Transmitter => AFType::OutputPushPull, - TxRx::Receiver => AFType::Input, + TxRx::Transmitter => AfType::output(OutputType::PushPull, Speed::VeryHigh), + TxRx::Receiver => AfType::input(Pull::None), }, //clocks (mclk, sck and fs) are defined by master/slave match mode { - Mode::Master => AFType::OutputPushPull, - Mode::Slave => AFType::Input, + Mode::Master => AfType::output(OutputType::PushPull, Speed::VeryHigh), + Mode::Slave => AfType::input(Pull::None), }, ) } @@ -768,9 +768,7 @@ impl<'d, T: Instance, W: word::Word> Sai<'d, T, W> { into_ref!(mclk); let (_sd_af_type, ck_af_type) = get_af_types(config.mode, config.tx_rx); - mclk.set_as_af(mclk.af_num(), ck_af_type); - mclk.set_speed(crate::gpio::Speed::VeryHigh); if config.master_clock_divider == MasterClockDivider::MasterClockDisabled { config.master_clock_divider = MasterClockDivider::Div1; @@ -796,12 +794,8 @@ impl<'d, T: Instance, W: word::Word> Sai<'d, T, W> { let (sd_af_type, ck_af_type) = get_af_types(config.mode, config.tx_rx); sd.set_as_af(sd.af_num(), sd_af_type); - sd.set_speed(crate::gpio::Speed::VeryHigh); - sck.set_as_af(sck.af_num(), ck_af_type); - sck.set_speed(crate::gpio::Speed::VeryHigh); fs.set_as_af(fs.af_num(), ck_af_type); - fs.set_speed(crate::gpio::Speed::VeryHigh); let sub_block = S::WHICH; let request = dma.request(); @@ -834,9 +828,7 @@ impl<'d, T: Instance, W: word::Word> Sai<'d, T, W> { into_ref!(dma, peri, sd); let (sd_af_type, _ck_af_type) = get_af_types(config.mode, config.tx_rx); - sd.set_as_af(sd.af_num(), sd_af_type); - sd.set_speed(crate::gpio::Speed::VeryHigh); let sub_block = S::WHICH; let request = dma.request(); diff --git a/embassy-stm32/src/sdmmc/mod.rs b/embassy-stm32/src/sdmmc/mod.rs index 9c14837e1..ee5539518 100644 --- a/embassy-stm32/src/sdmmc/mod.rs +++ b/embassy-stm32/src/sdmmc/mod.rs @@ -13,7 +13,9 @@ use embassy_sync::waitqueue::AtomicWaker; use sdio_host::{BusWidth, CardCapacity, CardStatus, CurrentState, SDStatus, CID, CSD, OCR, SCR}; use crate::dma::NoDma; -use crate::gpio::{AFType, AnyPin, Pull, SealedPin, Speed}; +#[cfg(gpio_v2)] +use crate::gpio::Pull; +use crate::gpio::{AfType, AnyPin, OutputType, SealedPin, Speed}; use crate::interrupt::typelevel::Interrupt; use crate::pac::sdmmc::Sdmmc as RegBlock; use crate::rcc::{self, RccPeripheral}; @@ -292,6 +294,13 @@ pub struct Sdmmc<'d, T: Instance, Dma: SdmmcDma = NoDma> { card: Option, } +const CLK_AF: AfType = AfType::output(OutputType::PushPull, Speed::VeryHigh); +#[cfg(gpio_v1)] +const CMD_AF: AfType = AfType::output(OutputType::PushPull, Speed::VeryHigh); +#[cfg(gpio_v2)] +const CMD_AF: AfType = AfType::output_pull(OutputType::PushPull, Speed::VeryHigh, Pull::Up); +const DATA_AF: AfType = CMD_AF; + #[cfg(sdmmc_v1)] impl<'d, T: Instance, Dma: SdmmcDma> Sdmmc<'d, T, Dma> { /// Create a new SDMMC driver, with 1 data lane. @@ -307,13 +316,9 @@ impl<'d, T: Instance, Dma: SdmmcDma> Sdmmc<'d, T, Dma> { into_ref!(clk, cmd, d0); critical_section::with(|_| { - clk.set_as_af_pull(clk.af_num(), AFType::OutputPushPull, Pull::None); - cmd.set_as_af_pull(cmd.af_num(), AFType::OutputPushPull, Pull::Up); - d0.set_as_af_pull(d0.af_num(), AFType::OutputPushPull, Pull::Up); - - clk.set_speed(Speed::VeryHigh); - cmd.set_speed(Speed::VeryHigh); - d0.set_speed(Speed::VeryHigh); + clk.set_as_af(clk.af_num(), CLK_AF); + cmd.set_as_af(cmd.af_num(), CMD_AF); + d0.set_as_af(d0.af_num(), DATA_AF); }); Self::new_inner( @@ -345,19 +350,12 @@ impl<'d, T: Instance, Dma: SdmmcDma> Sdmmc<'d, T, Dma> { into_ref!(clk, cmd, d0, d1, d2, d3); critical_section::with(|_| { - clk.set_as_af_pull(clk.af_num(), AFType::OutputPushPull, Pull::None); - cmd.set_as_af_pull(cmd.af_num(), AFType::OutputPushPull, Pull::Up); - d0.set_as_af_pull(d0.af_num(), AFType::OutputPushPull, Pull::Up); - d1.set_as_af_pull(d1.af_num(), AFType::OutputPushPull, Pull::Up); - d2.set_as_af_pull(d2.af_num(), AFType::OutputPushPull, Pull::Up); - d3.set_as_af_pull(d3.af_num(), AFType::OutputPushPull, Pull::Up); - - clk.set_speed(Speed::VeryHigh); - cmd.set_speed(Speed::VeryHigh); - d0.set_speed(Speed::VeryHigh); - d1.set_speed(Speed::VeryHigh); - d2.set_speed(Speed::VeryHigh); - d3.set_speed(Speed::VeryHigh); + clk.set_as_af(clk.af_num(), CLK_AF); + cmd.set_as_af(cmd.af_num(), CMD_AF); + d0.set_as_af(d0.af_num(), DATA_AF); + d1.set_as_af(d1.af_num(), DATA_AF); + d2.set_as_af(d2.af_num(), DATA_AF); + d3.set_as_af(d3.af_num(), DATA_AF); }); Self::new_inner( @@ -388,13 +386,9 @@ impl<'d, T: Instance> Sdmmc<'d, T, NoDma> { into_ref!(clk, cmd, d0); critical_section::with(|_| { - clk.set_as_af_pull(clk.af_num(), AFType::OutputPushPull, Pull::None); - cmd.set_as_af_pull(cmd.af_num(), AFType::OutputPushPull, Pull::Up); - d0.set_as_af_pull(d0.af_num(), AFType::OutputPushPull, Pull::Up); - - clk.set_speed(Speed::VeryHigh); - cmd.set_speed(Speed::VeryHigh); - d0.set_speed(Speed::VeryHigh); + clk.set_as_af(clk.af_num(), CLK_AF); + cmd.set_as_af(cmd.af_num(), CMD_AF); + d0.set_as_af(d0.af_num(), DATA_AF); }); Self::new_inner( @@ -425,19 +419,12 @@ impl<'d, T: Instance> Sdmmc<'d, T, NoDma> { into_ref!(clk, cmd, d0, d1, d2, d3); critical_section::with(|_| { - clk.set_as_af_pull(clk.af_num(), AFType::OutputPushPull, Pull::None); - cmd.set_as_af_pull(cmd.af_num(), AFType::OutputPushPull, Pull::Up); - d0.set_as_af_pull(d0.af_num(), AFType::OutputPushPull, Pull::Up); - d1.set_as_af_pull(d1.af_num(), AFType::OutputPushPull, Pull::Up); - d2.set_as_af_pull(d2.af_num(), AFType::OutputPushPull, Pull::Up); - d3.set_as_af_pull(d3.af_num(), AFType::OutputPushPull, Pull::Up); - - clk.set_speed(Speed::VeryHigh); - cmd.set_speed(Speed::VeryHigh); - d0.set_speed(Speed::VeryHigh); - d1.set_speed(Speed::VeryHigh); - d2.set_speed(Speed::VeryHigh); - d3.set_speed(Speed::VeryHigh); + clk.set_as_af(clk.af_num(), CLK_AF); + cmd.set_as_af(cmd.af_num(), CMD_AF); + d0.set_as_af(d0.af_num(), DATA_AF); + d1.set_as_af(d1.af_num(), DATA_AF); + d2.set_as_af(d2.af_num(), DATA_AF); + d3.set_as_af(d3.af_num(), DATA_AF); }); Self::new_inner( diff --git a/embassy-stm32/src/spi/mod.rs b/embassy-stm32/src/spi/mod.rs index 2e5f82dcb..656676d9f 100644 --- a/embassy-stm32/src/spi/mod.rs +++ b/embassy-stm32/src/spi/mod.rs @@ -10,7 +10,7 @@ use embassy_hal_internal::PeripheralRef; pub use embedded_hal_02::spi::{Mode, Phase, Polarity, MODE_0, MODE_1, MODE_2, MODE_3}; use crate::dma::{word, ChannelAndRequest}; -use crate::gpio::{AFType, AnyPin, Pull, SealedPin as _, Speed}; +use crate::gpio::{AfType, AnyPin, OutputType, Pull, SealedPin as _, Speed}; use crate::mode::{Async, Blocking, Mode as PeriMode}; use crate::pac::spi::{regs, vals, Spi as Regs}; use crate::rcc::{RccInfo, SealedRccPeripheral}; @@ -90,11 +90,21 @@ impl Config { } } - fn sck_pull_mode(&self) -> Pull { - match self.mode.polarity { - Polarity::IdleLow => Pull::Down, - Polarity::IdleHigh => Pull::Up, - } + #[cfg(gpio_v1)] + fn sck_af(&self) -> AfType { + AfType::output(OutputType::PushPull, Speed::VeryHigh) + } + + #[cfg(gpio_v2)] + fn sck_af(&self) -> AfType { + AfType::output_pull( + OutputType::PushPull, + Speed::VeryHigh, + match self.mode.polarity { + Polarity::IdleLow => Pull::Down, + Polarity::IdleHigh => Pull::Up, + }, + ) } } /// SPI driver. @@ -453,9 +463,9 @@ impl<'d> Spi<'d, Blocking> { ) -> Self { Self::new_inner( peri, - new_pin!(sck, AFType::OutputPushPull, Speed::VeryHigh, config.sck_pull_mode()), - new_pin!(mosi, AFType::OutputPushPull, Speed::VeryHigh), - new_pin!(miso, AFType::Input, Speed::VeryHigh, config.miso_pull), + new_pin!(sck, config.sck_af()), + new_pin!(mosi, AfType::output(OutputType::PushPull, Speed::VeryHigh)), + new_pin!(miso, AfType::input(config.miso_pull)), None, None, config, @@ -471,9 +481,9 @@ impl<'d> Spi<'d, Blocking> { ) -> Self { Self::new_inner( peri, - new_pin!(sck, AFType::OutputPushPull, Speed::VeryHigh, config.sck_pull_mode()), + new_pin!(sck, config.sck_af()), None, - new_pin!(miso, AFType::Input, Speed::VeryHigh, config.miso_pull), + new_pin!(miso, AfType::input(config.miso_pull)), None, None, config, @@ -489,8 +499,8 @@ impl<'d> Spi<'d, Blocking> { ) -> Self { Self::new_inner( peri, - new_pin!(sck, AFType::OutputPushPull, Speed::VeryHigh, config.sck_pull_mode()), - new_pin!(mosi, AFType::OutputPushPull, Speed::VeryHigh), + new_pin!(sck, config.sck_af()), + new_pin!(mosi, AfType::output(OutputType::PushPull, Speed::VeryHigh)), None, None, None, @@ -509,7 +519,7 @@ impl<'d> Spi<'d, Blocking> { Self::new_inner( peri, None, - new_pin!(mosi, AFType::OutputPushPull, Speed::VeryHigh), + new_pin!(mosi, AfType::output(OutputType::PushPull, Speed::VeryHigh)), None, None, None, @@ -531,9 +541,9 @@ impl<'d> Spi<'d, Async> { ) -> Self { Self::new_inner( peri, - new_pin!(sck, AFType::OutputPushPull, Speed::VeryHigh, config.sck_pull_mode()), - new_pin!(mosi, AFType::OutputPushPull, Speed::VeryHigh), - new_pin!(miso, AFType::Input, Speed::VeryHigh), + new_pin!(sck, config.sck_af()), + new_pin!(mosi, AfType::output(OutputType::PushPull, Speed::VeryHigh)), + new_pin!(miso, AfType::input(config.miso_pull)), new_dma!(tx_dma), new_dma!(rx_dma), config, @@ -551,9 +561,9 @@ impl<'d> Spi<'d, Async> { ) -> Self { Self::new_inner( peri, - new_pin!(sck, AFType::OutputPushPull, Speed::VeryHigh, config.sck_pull_mode()), + new_pin!(sck, config.sck_af()), None, - new_pin!(miso, AFType::Input, Speed::VeryHigh), + new_pin!(miso, AfType::input(config.miso_pull)), #[cfg(any(spi_v1, spi_f1, spi_v2))] new_dma!(tx_dma), #[cfg(any(spi_v3, spi_v4, spi_v5))] @@ -573,8 +583,8 @@ impl<'d> Spi<'d, Async> { ) -> Self { Self::new_inner( peri, - new_pin!(sck, AFType::OutputPushPull, Speed::VeryHigh, config.sck_pull_mode()), - new_pin!(mosi, AFType::OutputPushPull, Speed::VeryHigh), + new_pin!(sck, config.sck_af()), + new_pin!(mosi, AfType::output(OutputType::PushPull, Speed::VeryHigh)), None, new_dma!(tx_dma), None, @@ -594,7 +604,7 @@ impl<'d> Spi<'d, Async> { Self::new_inner( peri, None, - new_pin!(mosi, AFType::OutputPushPull, Speed::VeryHigh), + new_pin!(mosi, AfType::output(OutputType::PushPull, Speed::VeryHigh)), None, new_dma!(tx_dma), None, diff --git a/embassy-stm32/src/timer/complementary_pwm.rs b/embassy-stm32/src/timer/complementary_pwm.rs index a892646cf..46ccbf3df 100644 --- a/embassy-stm32/src/timer/complementary_pwm.rs +++ b/embassy-stm32/src/timer/complementary_pwm.rs @@ -32,9 +32,10 @@ macro_rules! complementary_channel_impl { into_ref!(pin); critical_section::with(|_| { pin.set_low(); - pin.set_as_af(pin.af_num(), output_type.into()); - #[cfg(gpio_v2)] - pin.set_speed(crate::gpio::Speed::VeryHigh); + pin.set_as_af( + pin.af_num(), + crate::gpio::AfType::output(output_type, crate::gpio::Speed::VeryHigh), + ); }); ComplementaryPwmPin { _pin: pin.map_into(), diff --git a/embassy-stm32/src/timer/input_capture.rs b/embassy-stm32/src/timer/input_capture.rs index 0258d4077..341ac2c04 100644 --- a/embassy-stm32/src/timer/input_capture.rs +++ b/embassy-stm32/src/timer/input_capture.rs @@ -12,7 +12,7 @@ use super::{ CaptureCompareInterruptHandler, Channel, Channel1Pin, Channel2Pin, Channel3Pin, Channel4Pin, GeneralInstance4Channel, }; -use crate::gpio::{AFType, AnyPin, Pull}; +use crate::gpio::{AfType, AnyPin, Pull}; use crate::interrupt::typelevel::{Binding, Interrupt}; use crate::time::Hertz; use crate::Peripheral; @@ -38,11 +38,9 @@ macro_rules! channel_impl { ($new_chx:ident, $channel:ident, $pin_trait:ident) => { impl<'d, T: GeneralInstance4Channel> CapturePin<'d, T, $channel> { #[doc = concat!("Create a new ", stringify!($channel), " capture pin instance.")] - pub fn $new_chx(pin: impl Peripheral

> + 'd, pull_type: Pull) -> Self { + pub fn $new_chx(pin: impl Peripheral

> + 'd, pull: Pull) -> Self { into_ref!(pin); - - pin.set_as_af_pull(pin.af_num(), AFType::Input, pull_type); - + pin.set_as_af(pin.af_num(), AfType::input(pull)); CapturePin { _pin: pin.map_into(), phantom: PhantomData, diff --git a/embassy-stm32/src/timer/pwm_input.rs b/embassy-stm32/src/timer/pwm_input.rs index dcf098a78..e3eb6042a 100644 --- a/embassy-stm32/src/timer/pwm_input.rs +++ b/embassy-stm32/src/timer/pwm_input.rs @@ -4,7 +4,7 @@ use embassy_hal_internal::into_ref; use super::low_level::{CountingMode, InputCaptureMode, InputTISelection, SlaveMode, Timer, TriggerSource}; use super::{Channel, Channel1Pin, Channel2Pin, GeneralInstance4Channel}; -use crate::gpio::{AFType, Pull}; +use crate::gpio::{AfType, Pull}; use crate::time::Hertz; use crate::Peripheral; @@ -19,12 +19,12 @@ impl<'d, T: GeneralInstance4Channel> PwmInput<'d, T> { pub fn new( tim: impl Peripheral

+ 'd, pin: impl Peripheral

> + 'd, - pull_type: Pull, + pull: Pull, freq: Hertz, ) -> Self { into_ref!(pin); - pin.set_as_af_pull(pin.af_num(), AFType::Input, pull_type); + pin.set_as_af(pin.af_num(), AfType::input(pull)); Self::new_inner(tim, freq, Channel::Ch1, Channel::Ch2) } @@ -33,12 +33,12 @@ impl<'d, T: GeneralInstance4Channel> PwmInput<'d, T> { pub fn new_alt( tim: impl Peripheral

+ 'd, pin: impl Peripheral

> + 'd, - pull_type: Pull, + pull: Pull, freq: Hertz, ) -> Self { into_ref!(pin); - pin.set_as_af_pull(pin.af_num(), AFType::Input, pull_type); + pin.set_as_af(pin.af_num(), AfType::input(pull)); Self::new_inner(tim, freq, Channel::Ch2, Channel::Ch1) } diff --git a/embassy-stm32/src/timer/qei.rs b/embassy-stm32/src/timer/qei.rs index ab9879be6..fc5835414 100644 --- a/embassy-stm32/src/timer/qei.rs +++ b/embassy-stm32/src/timer/qei.rs @@ -7,7 +7,7 @@ use stm32_metapac::timer::vals; use super::low_level::Timer; use super::{Channel1Pin, Channel2Pin, GeneralInstance4Channel}; -use crate::gpio::{AFType, AnyPin}; +use crate::gpio::{AfType, AnyPin, Pull}; use crate::Peripheral; /// Counting direction @@ -37,9 +37,7 @@ macro_rules! channel_impl { into_ref!(pin); critical_section::with(|_| { pin.set_low(); - pin.set_as_af(pin.af_num(), AFType::Input); - #[cfg(gpio_v2)] - pin.set_speed(crate::gpio::Speed::VeryHigh); + pin.set_as_af(pin.af_num(), AfType::input(Pull::None)); }); QeiPin { _pin: pin.map_into(), diff --git a/embassy-stm32/src/timer/simple_pwm.rs b/embassy-stm32/src/timer/simple_pwm.rs index b54e9a0d6..b7771bd64 100644 --- a/embassy-stm32/src/timer/simple_pwm.rs +++ b/embassy-stm32/src/timer/simple_pwm.rs @@ -6,7 +6,7 @@ use embassy_hal_internal::{into_ref, PeripheralRef}; use super::low_level::{CountingMode, OutputCompareMode, OutputPolarity, Timer}; use super::{Channel, Channel1Pin, Channel2Pin, Channel3Pin, Channel4Pin, GeneralInstance4Channel}; -use crate::gpio::{AnyPin, OutputType}; +use crate::gpio::{AfType, AnyPin, OutputType, Speed}; use crate::time::Hertz; use crate::Peripheral; @@ -35,9 +35,7 @@ macro_rules! channel_impl { into_ref!(pin); critical_section::with(|_| { pin.set_low(); - pin.set_as_af(pin.af_num(), output_type.into()); - #[cfg(gpio_v2)] - pin.set_speed(crate::gpio::Speed::VeryHigh); + pin.set_as_af(pin.af_num(), AfType::output(output_type, Speed::VeryHigh)); }); PwmPin { _pin: pin.map_into(), diff --git a/embassy-stm32/src/tsc/mod.rs b/embassy-stm32/src/tsc/mod.rs index 8cab3a24c..8ba208ce7 100644 --- a/embassy-stm32/src/tsc/mod.rs +++ b/embassy-stm32/src/tsc/mod.rs @@ -70,7 +70,7 @@ use core::marker::PhantomData; use embassy_hal_internal::{into_ref, PeripheralRef}; pub use enums::*; -use crate::gpio::{AFType, AnyPin}; +use crate::gpio::{AfType, AnyPin, OutputType, Speed}; use crate::pac::tsc::Tsc as Regs; use crate::rcc::{self, RccPeripheral}; use crate::{peripherals, Peripheral}; @@ -371,11 +371,14 @@ macro_rules! group_impl { pin.set_low(); pin.set_as_af( pin.af_num(), - match role { - PinType::Channel => AFType::OutputPushPull, - PinType::Sample => AFType::OutputOpenDrain, - PinType::Shield => AFType::OutputPushPull, - }, + AfType::output( + match role { + PinType::Channel => OutputType::PushPull, + PinType::Sample => OutputType::OpenDrain, + PinType::Shield => OutputType::PushPull, + }, + Speed::VeryHigh, + ), ); self.d1 = Some(TscPin { _pin: pin.map_into(), @@ -392,11 +395,14 @@ macro_rules! group_impl { pin.set_low(); pin.set_as_af( pin.af_num(), - match role { - PinType::Channel => AFType::OutputPushPull, - PinType::Sample => AFType::OutputOpenDrain, - PinType::Shield => AFType::OutputPushPull, - }, + AfType::output( + match role { + PinType::Channel => OutputType::PushPull, + PinType::Sample => OutputType::OpenDrain, + PinType::Shield => OutputType::PushPull, + }, + Speed::VeryHigh, + ), ); self.d2 = Some(TscPin { _pin: pin.map_into(), @@ -413,11 +419,14 @@ macro_rules! group_impl { pin.set_low(); pin.set_as_af( pin.af_num(), - match role { - PinType::Channel => AFType::OutputPushPull, - PinType::Sample => AFType::OutputOpenDrain, - PinType::Shield => AFType::OutputPushPull, - }, + AfType::output( + match role { + PinType::Channel => OutputType::PushPull, + PinType::Sample => OutputType::OpenDrain, + PinType::Shield => OutputType::PushPull, + }, + Speed::VeryHigh, + ), ); self.d3 = Some(TscPin { _pin: pin.map_into(), @@ -434,11 +443,14 @@ macro_rules! group_impl { pin.set_low(); pin.set_as_af( pin.af_num(), - match role { - PinType::Channel => AFType::OutputPushPull, - PinType::Sample => AFType::OutputOpenDrain, - PinType::Shield => AFType::OutputPushPull, - }, + AfType::output( + match role { + PinType::Channel => OutputType::PushPull, + PinType::Sample => OutputType::OpenDrain, + PinType::Shield => OutputType::PushPull, + }, + Speed::VeryHigh, + ), ); self.d4 = Some(TscPin { _pin: pin.map_into(), diff --git a/embassy-stm32/src/usart/buffered.rs b/embassy-stm32/src/usart/buffered.rs index fd79e035e..33bc009a8 100644 --- a/embassy-stm32/src/usart/buffered.rs +++ b/embassy-stm32/src/usart/buffered.rs @@ -15,7 +15,7 @@ use super::{ clear_interrupt_flags, configure, rdr, reconfigure, sr, tdr, Config, ConfigError, CtsPin, Error, Info, Instance, Regs, RtsPin, RxPin, TxPin, }; -use crate::gpio::{AFType, AnyPin, SealedPin as _}; +use crate::gpio::{AfType, AnyPin, OutputType, Pull, SealedPin as _, Speed}; use crate::interrupt::{self, InterruptExt}; use crate::time::Hertz; @@ -210,8 +210,8 @@ impl<'d> BufferedUart<'d> { ) -> Result { Self::new_inner( peri, - new_pin!(rx, AFType::Input), - new_pin!(tx, AFType::OutputPushPull), + new_pin!(rx, AfType::input(Pull::None)), + new_pin!(tx, AfType::output(OutputType::PushPull, Speed::Medium)), None, None, None, @@ -235,10 +235,10 @@ impl<'d> BufferedUart<'d> { ) -> Result { Self::new_inner( peri, - new_pin!(rx, AFType::Input), - new_pin!(tx, AFType::OutputPushPull), - new_pin!(rts, AFType::OutputPushPull), - new_pin!(cts, AFType::Input), + new_pin!(rx, AfType::input(Pull::None)), + new_pin!(tx, AfType::output(OutputType::PushPull, Speed::Medium)), + new_pin!(rts, AfType::output(OutputType::PushPull, Speed::Medium)), + new_pin!(cts, AfType::input(Pull::None)), None, tx_buffer, rx_buffer, @@ -260,11 +260,11 @@ impl<'d> BufferedUart<'d> { ) -> Result { Self::new_inner( peri, - new_pin!(rx, AFType::Input), - new_pin!(tx, AFType::OutputPushPull), + new_pin!(rx, AfType::input(Pull::None)), + new_pin!(tx, AfType::output(OutputType::PushPull, Speed::Medium)), None, None, - new_pin!(de, AFType::OutputPushPull), + new_pin!(de, AfType::output(OutputType::PushPull, Speed::Medium)), tx_buffer, rx_buffer, config, diff --git a/embassy-stm32/src/usart/mod.rs b/embassy-stm32/src/usart/mod.rs index 53321391a..5754f783e 100644 --- a/embassy-stm32/src/usart/mod.rs +++ b/embassy-stm32/src/usart/mod.rs @@ -14,7 +14,7 @@ use embassy_sync::waitqueue::AtomicWaker; use futures_util::future::{select, Either}; use crate::dma::ChannelAndRequest; -use crate::gpio::{AFType, AnyPin, SealedPin as _}; +use crate::gpio::{AfType, AnyPin, OutputType, Pull, SealedPin as _, Speed}; use crate::interrupt::typelevel::Interrupt as _; use crate::interrupt::{self, Interrupt, InterruptExt}; use crate::mode::{Async, Blocking, Mode}; @@ -159,11 +159,11 @@ pub struct Config { #[cfg(any(usart_v3, usart_v4))] pub swap_rx_tx: bool, - /// Set this to true to invert TX pin signal values (VDD =0/mark, Gnd = 1/idle). + /// Set this to true to invert TX pin signal values (VDD = 0/mark, Gnd = 1/idle). #[cfg(any(usart_v3, usart_v4))] pub invert_tx: bool, - /// Set this to true to invert RX pin signal values (VDD =0/mark, Gnd = 1/idle). + /// Set this to true to invert RX pin signal values (VDD = 0/mark, Gnd = 1/idle). #[cfg(any(usart_v3, usart_v4))] pub invert_rx: bool, @@ -172,19 +172,20 @@ pub struct Config { } impl Config { - fn tx_af(&self) -> AFType { + fn tx_af(&self) -> AfType { #[cfg(any(usart_v3, usart_v4))] if self.swap_rx_tx { - return AFType::Input; + return AfType::input(Pull::None); }; - AFType::OutputPushPull + AfType::output(OutputType::PushPull, Speed::Medium) } - fn rx_af(&self) -> AFType { + + fn rx_af(&self) -> AfType { #[cfg(any(usart_v3, usart_v4))] if self.swap_rx_tx { - return AFType::OutputPushPull; + return AfType::output(OutputType::PushPull, Speed::Medium); }; - AFType::Input + AfType::input(Pull::None) } } @@ -342,7 +343,7 @@ impl<'d> UartTx<'d, Async> { ) -> Result { Self::new_inner( peri, - new_pin!(tx, AFType::OutputPushPull), + new_pin!(tx, AfType::output(OutputType::PushPull, Speed::Medium)), None, new_dma!(tx_dma), config, @@ -359,8 +360,8 @@ impl<'d> UartTx<'d, Async> { ) -> Result { Self::new_inner( peri, - new_pin!(tx, AFType::OutputPushPull), - new_pin!(cts, AFType::Input), + new_pin!(tx, AfType::output(OutputType::PushPull, Speed::Medium)), + new_pin!(cts, AfType::input(Pull::None)), new_dma!(tx_dma), config, ) @@ -401,7 +402,13 @@ impl<'d> UartTx<'d, Blocking> { tx: impl Peripheral

> + 'd, config: Config, ) -> Result { - Self::new_inner(peri, new_pin!(tx, AFType::OutputPushPull), None, None, config) + Self::new_inner( + peri, + new_pin!(tx, AfType::output(OutputType::PushPull, Speed::Medium)), + None, + None, + config, + ) } /// Create a new blocking tx-only UART with a clear-to-send pin @@ -413,8 +420,8 @@ impl<'d> UartTx<'d, Blocking> { ) -> Result { Self::new_inner( peri, - new_pin!(tx, AFType::OutputPushPull), - new_pin!(cts, AFType::Input), + new_pin!(tx, AfType::output(OutputType::PushPull, Speed::Medium)), + new_pin!(cts, AfType::input(Pull::None)), None, config, ) @@ -508,7 +515,13 @@ impl<'d> UartRx<'d, Async> { rx_dma: impl Peripheral

> + 'd, config: Config, ) -> Result { - Self::new_inner(peri, new_pin!(rx, AFType::Input), None, new_dma!(rx_dma), config) + Self::new_inner( + peri, + new_pin!(rx, AfType::input(Pull::None)), + None, + new_dma!(rx_dma), + config, + ) } /// Create a new rx-only UART with a request-to-send pin @@ -522,8 +535,8 @@ impl<'d> UartRx<'d, Async> { ) -> Result { Self::new_inner( peri, - new_pin!(rx, AFType::Input), - new_pin!(rts, AFType::OutputPushPull), + new_pin!(rx, AfType::input(Pull::None)), + new_pin!(rts, AfType::output(OutputType::PushPull, Speed::Medium)), new_dma!(rx_dma), config, ) @@ -751,7 +764,7 @@ impl<'d> UartRx<'d, Blocking> { rx: impl Peripheral

> + 'd, config: Config, ) -> Result { - Self::new_inner(peri, new_pin!(rx, AFType::Input), None, None, config) + Self::new_inner(peri, new_pin!(rx, AfType::input(Pull::None)), None, None, config) } /// Create a new rx-only UART with a request-to-send pin @@ -763,8 +776,8 @@ impl<'d> UartRx<'d, Blocking> { ) -> Result { Self::new_inner( peri, - new_pin!(rx, AFType::Input), - new_pin!(rts, AFType::OutputPushPull), + new_pin!(rx, AfType::input(Pull::None)), + new_pin!(rts, AfType::output(OutputType::PushPull, Speed::Medium)), None, config, ) @@ -968,8 +981,8 @@ impl<'d> Uart<'d, Async> { peri, new_pin!(rx, config.rx_af()), new_pin!(tx, config.tx_af()), - new_pin!(rts, AFType::OutputPushPull), - new_pin!(cts, AFType::Input), + new_pin!(rts, AfType::output(OutputType::PushPull, Speed::Medium)), + new_pin!(cts, AfType::input(Pull::None)), None, new_dma!(tx_dma), new_dma!(rx_dma), @@ -995,7 +1008,7 @@ impl<'d> Uart<'d, Async> { new_pin!(tx, config.tx_af()), None, None, - new_pin!(de, AFType::OutputPushPull), + new_pin!(de, AfType::output(OutputType::PushPull, Speed::Medium)), new_dma!(tx_dma), new_dma!(rx_dma), config, @@ -1030,7 +1043,7 @@ impl<'d> Uart<'d, Async> { Self::new_inner( peri, None, - new_pin!(tx, AFType::OutputPushPull), + new_pin!(tx, AfType::output(OutputType::PushPull, Speed::Medium)), None, None, None, @@ -1066,7 +1079,7 @@ impl<'d> Uart<'d, Async> { peri, None, None, - new_pin!(rx, AFType::OutputPushPull), + new_pin!(rx, AfType::output(OutputType::PushPull, Speed::Medium)), None, None, new_dma!(tx_dma), @@ -1125,8 +1138,8 @@ impl<'d> Uart<'d, Blocking> { peri, new_pin!(rx, config.rx_af()), new_pin!(tx, config.tx_af()), - new_pin!(rts, AFType::OutputPushPull), - new_pin!(cts, AFType::Input), + new_pin!(rts, AfType::output(OutputType::PushPull, Speed::Medium)), + new_pin!(cts, AfType::input(Pull::None)), None, None, None, @@ -1149,7 +1162,7 @@ impl<'d> Uart<'d, Blocking> { new_pin!(tx, config.tx_af()), None, None, - new_pin!(de, AFType::OutputPushPull), + new_pin!(de, AfType::output(OutputType::PushPull, Speed::Medium)), None, None, config, @@ -1181,7 +1194,7 @@ impl<'d> Uart<'d, Blocking> { Self::new_inner( peri, None, - new_pin!(tx, AFType::OutputPushPull), + new_pin!(tx, AfType::output(OutputType::PushPull, Speed::Medium)), None, None, None, @@ -1214,7 +1227,7 @@ impl<'d> Uart<'d, Blocking> { peri, None, None, - new_pin!(rx, AFType::OutputPushPull), + new_pin!(rx, AfType::output(OutputType::PushPull, Speed::Medium)), None, None, None, diff --git a/embassy-stm32/src/usb/otg.rs b/embassy-stm32/src/usb/otg.rs index e5131250a..8ee8dcc36 100644 --- a/embassy-stm32/src/usb/otg.rs +++ b/embassy-stm32/src/usb/otg.rs @@ -10,7 +10,7 @@ use embassy_usb_synopsys_otg::{ PhyType, State, }; -use crate::gpio::AFType; +use crate::gpio::{AfType, OutputType, Speed}; use crate::interrupt; use crate::interrupt::typelevel::Interrupt; use crate::rcc::{self, RccPeripheral}; @@ -39,9 +39,7 @@ macro_rules! config_ulpi_pins { into_ref!($($pin),*); critical_section::with(|_| { $( - $pin.set_as_af($pin.af_num(), AFType::OutputPushPull); - #[cfg(gpio_v2)] - $pin.set_speed(crate::gpio::Speed::VeryHigh); + $pin.set_as_af($pin.af_num(), AfType::output(OutputType::PushPull, Speed::VeryHigh)); )* }) }; @@ -77,8 +75,8 @@ impl<'d, T: Instance> Driver<'d, T> { ) -> Self { into_ref!(dp, dm); - dp.set_as_af(dp.af_num(), AFType::OutputPushPull); - dm.set_as_af(dm.af_num(), AFType::OutputPushPull); + dp.set_as_af(dp.af_num(), AfType::output(OutputType::PushPull, Speed::VeryHigh)); + dm.set_as_af(dm.af_num(), AfType::output(OutputType::PushPull, Speed::VeryHigh)); let regs = T::regs(); diff --git a/embassy-stm32/src/usb/usb.rs b/embassy-stm32/src/usb/usb.rs index b6c88ac9a..1d9d19a73 100644 --- a/embassy-stm32/src/usb/usb.rs +++ b/embassy-stm32/src/usb/usb.rs @@ -277,8 +277,9 @@ impl<'d, T: Instance> Driver<'d, T> { #[cfg(not(stm32l1))] { - dp.set_as_af(dp.af_num(), crate::gpio::AFType::OutputPushPull); - dm.set_as_af(dm.af_num(), crate::gpio::AFType::OutputPushPull); + use crate::gpio::{AfType, OutputType, Speed}; + dp.set_as_af(dp.af_num(), AfType::output(OutputType::PushPull, Speed::VeryHigh)); + dm.set_as_af(dm.af_num(), AfType::output(OutputType::PushPull, Speed::VeryHigh)); } #[cfg(stm32l1)] let _ = (dp, dm); // suppress "unused" warnings. diff --git a/examples/stm32h7/src/bin/low_level_timer_api.rs b/examples/stm32h7/src/bin/low_level_timer_api.rs index a95b44b74..b796996ea 100644 --- a/examples/stm32h7/src/bin/low_level_timer_api.rs +++ b/examples/stm32h7/src/bin/low_level_timer_api.rs @@ -3,7 +3,7 @@ use defmt::*; use embassy_executor::Spawner; -use embassy_stm32::gpio::{AFType, Flex, Pull, Speed}; +use embassy_stm32::gpio::{AfType, Flex, OutputType, Speed}; use embassy_stm32::time::{khz, Hertz}; use embassy_stm32::timer::low_level::{OutputCompareMode, Timer as LLTimer}; use embassy_stm32::timer::{Channel, Channel1Pin, Channel2Pin, Channel3Pin, Channel4Pin, GeneralInstance32bit4Channel}; @@ -83,10 +83,10 @@ impl<'d, T: GeneralInstance32bit4Channel> SimplePwm32<'d, T> { let mut ch2 = Flex::new(ch2); let mut ch3 = Flex::new(ch3); let mut ch4 = Flex::new(ch4); - ch1.set_as_af_unchecked(af1, AFType::OutputPushPull, Pull::None, Speed::VeryHigh); - ch2.set_as_af_unchecked(af2, AFType::OutputPushPull, Pull::None, Speed::VeryHigh); - ch3.set_as_af_unchecked(af3, AFType::OutputPushPull, Pull::None, Speed::VeryHigh); - ch4.set_as_af_unchecked(af4, AFType::OutputPushPull, Pull::None, Speed::VeryHigh); + ch1.set_as_af_unchecked(af1, AfType::output(OutputType::PushPull, Speed::VeryHigh)); + ch2.set_as_af_unchecked(af2, AfType::output(OutputType::PushPull, Speed::VeryHigh)); + ch3.set_as_af_unchecked(af3, AfType::output(OutputType::PushPull, Speed::VeryHigh)); + ch4.set_as_af_unchecked(af4, AfType::output(OutputType::PushPull, Speed::VeryHigh)); let mut this = Self { tim: LLTimer::new(tim), diff --git a/tests/stm32/src/bin/gpio.rs b/tests/stm32/src/bin/gpio.rs index dfa299ab5..1d1018c5c 100644 --- a/tests/stm32/src/bin/gpio.rs +++ b/tests/stm32/src/bin/gpio.rs @@ -112,7 +112,7 @@ async fn main(_spawner: Spawner) { let b = Input::new(&mut b, Pull::Down); // no pull, the status is undefined - let mut a = OutputOpenDrain::new(&mut a, Level::Low, Speed::Low, Pull::None); + let mut a = OutputOpenDrain::new(&mut a, Level::Low, Speed::Low); delay(); assert!(b.is_low()); a.set_high(); // High-Z output @@ -203,7 +203,7 @@ async fn main(_spawner: Spawner) { let mut a = Flex::new(&mut a); a.set_low(); - a.set_as_input_output(Speed::Low, Pull::None); + a.set_as_input_output(Speed::Low); delay(); assert!(b.is_low()); a.set_high(); // High-Z output From 6a4ac5bd60693307721aa82c26909ffd05e2b193 Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Mon, 17 Jun 2024 01:38:57 +0200 Subject: [PATCH 491/581] Add collapse_debuginfo to fmt.rs macros. This makes location info in defmt logs point to the code calling the macro, instead of always to fmt.rs as before. Fix works with nightlies starting with today's, and stable 1.81+. --- cyw43/src/fmt.rs | 17 +++++++++++++++++ embassy-boot-nrf/src/fmt.rs | 17 +++++++++++++++++ embassy-boot-rp/src/fmt.rs | 17 +++++++++++++++++ embassy-boot-stm32/src/fmt.rs | 17 +++++++++++++++++ embassy-boot/src/fmt.rs | 17 +++++++++++++++++ embassy-executor/src/fmt.rs | 17 +++++++++++++++++ embassy-futures/src/fmt.rs | 17 +++++++++++++++++ embassy-hal-internal/src/fmt.rs | 17 +++++++++++++++++ embassy-net-adin1110/src/fmt.rs | 17 +++++++++++++++++ embassy-net-driver-channel/src/fmt.rs | 17 +++++++++++++++++ embassy-net-enc28j60/src/fmt.rs | 17 +++++++++++++++++ embassy-net-esp-hosted/src/fmt.rs | 17 +++++++++++++++++ embassy-net-ppp/src/fmt.rs | 17 +++++++++++++++++ embassy-net/src/fmt.rs | 17 +++++++++++++++++ embassy-nrf/src/fmt.rs | 17 +++++++++++++++++ embassy-rp/src/fmt.rs | 17 +++++++++++++++++ embassy-stm32-wpan/src/fmt.rs | 17 +++++++++++++++++ embassy-stm32/src/fmt.rs | 17 +++++++++++++++++ embassy-sync/src/fmt.rs | 17 +++++++++++++++++ embassy-time/src/fmt.rs | 17 +++++++++++++++++ embassy-usb-dfu/src/fmt.rs | 17 +++++++++++++++++ embassy-usb-synopsys-otg/src/fmt.rs | 17 +++++++++++++++++ embassy-usb/src/fmt.rs | 17 +++++++++++++++++ 23 files changed, 391 insertions(+) diff --git a/cyw43/src/fmt.rs b/cyw43/src/fmt.rs index 2ac42c557..35b929fde 100644 --- a/cyw43/src/fmt.rs +++ b/cyw43/src/fmt.rs @@ -6,6 +6,7 @@ use core::fmt::{Debug, Display, LowerHex}; #[cfg(all(feature = "defmt", feature = "log"))] compile_error!("You may not enable both `defmt` and `log` features."); +#[collapse_debuginfo(yes)] macro_rules! assert { ($($x:tt)*) => { { @@ -17,6 +18,7 @@ macro_rules! assert { }; } +#[collapse_debuginfo(yes)] macro_rules! assert_eq { ($($x:tt)*) => { { @@ -28,6 +30,7 @@ macro_rules! assert_eq { }; } +#[collapse_debuginfo(yes)] macro_rules! assert_ne { ($($x:tt)*) => { { @@ -39,6 +42,7 @@ macro_rules! assert_ne { }; } +#[collapse_debuginfo(yes)] macro_rules! debug_assert { ($($x:tt)*) => { { @@ -50,6 +54,7 @@ macro_rules! debug_assert { }; } +#[collapse_debuginfo(yes)] macro_rules! debug_assert_eq { ($($x:tt)*) => { { @@ -61,6 +66,7 @@ macro_rules! debug_assert_eq { }; } +#[collapse_debuginfo(yes)] macro_rules! debug_assert_ne { ($($x:tt)*) => { { @@ -72,6 +78,7 @@ macro_rules! debug_assert_ne { }; } +#[collapse_debuginfo(yes)] macro_rules! todo { ($($x:tt)*) => { { @@ -84,6 +91,7 @@ macro_rules! todo { } #[cfg(not(feature = "defmt"))] +#[collapse_debuginfo(yes)] macro_rules! unreachable { ($($x:tt)*) => { ::core::unreachable!($($x)*) @@ -91,12 +99,14 @@ macro_rules! unreachable { } #[cfg(feature = "defmt")] +#[collapse_debuginfo(yes)] macro_rules! unreachable { ($($x:tt)*) => { ::defmt::unreachable!($($x)*) }; } +#[collapse_debuginfo(yes)] macro_rules! panic { ($($x:tt)*) => { { @@ -108,6 +118,7 @@ macro_rules! panic { }; } +#[collapse_debuginfo(yes)] macro_rules! trace { ($s:literal $(, $x:expr)* $(,)?) => { { @@ -121,6 +132,7 @@ macro_rules! trace { }; } +#[collapse_debuginfo(yes)] macro_rules! debug { ($s:literal $(, $x:expr)* $(,)?) => { { @@ -134,6 +146,7 @@ macro_rules! debug { }; } +#[collapse_debuginfo(yes)] macro_rules! info { ($s:literal $(, $x:expr)* $(,)?) => { { @@ -147,6 +160,7 @@ macro_rules! info { }; } +#[collapse_debuginfo(yes)] macro_rules! warn { ($s:literal $(, $x:expr)* $(,)?) => { { @@ -160,6 +174,7 @@ macro_rules! warn { }; } +#[collapse_debuginfo(yes)] macro_rules! error { ($s:literal $(, $x:expr)* $(,)?) => { { @@ -174,6 +189,7 @@ macro_rules! error { } #[cfg(feature = "defmt")] +#[collapse_debuginfo(yes)] macro_rules! unwrap { ($($x:tt)*) => { ::defmt::unwrap!($($x)*) @@ -181,6 +197,7 @@ macro_rules! unwrap { } #[cfg(not(feature = "defmt"))] +#[collapse_debuginfo(yes)] macro_rules! unwrap { ($arg:expr) => { match $crate::fmt::Try::into_result($arg) { diff --git a/embassy-boot-nrf/src/fmt.rs b/embassy-boot-nrf/src/fmt.rs index 2ac42c557..35b929fde 100644 --- a/embassy-boot-nrf/src/fmt.rs +++ b/embassy-boot-nrf/src/fmt.rs @@ -6,6 +6,7 @@ use core::fmt::{Debug, Display, LowerHex}; #[cfg(all(feature = "defmt", feature = "log"))] compile_error!("You may not enable both `defmt` and `log` features."); +#[collapse_debuginfo(yes)] macro_rules! assert { ($($x:tt)*) => { { @@ -17,6 +18,7 @@ macro_rules! assert { }; } +#[collapse_debuginfo(yes)] macro_rules! assert_eq { ($($x:tt)*) => { { @@ -28,6 +30,7 @@ macro_rules! assert_eq { }; } +#[collapse_debuginfo(yes)] macro_rules! assert_ne { ($($x:tt)*) => { { @@ -39,6 +42,7 @@ macro_rules! assert_ne { }; } +#[collapse_debuginfo(yes)] macro_rules! debug_assert { ($($x:tt)*) => { { @@ -50,6 +54,7 @@ macro_rules! debug_assert { }; } +#[collapse_debuginfo(yes)] macro_rules! debug_assert_eq { ($($x:tt)*) => { { @@ -61,6 +66,7 @@ macro_rules! debug_assert_eq { }; } +#[collapse_debuginfo(yes)] macro_rules! debug_assert_ne { ($($x:tt)*) => { { @@ -72,6 +78,7 @@ macro_rules! debug_assert_ne { }; } +#[collapse_debuginfo(yes)] macro_rules! todo { ($($x:tt)*) => { { @@ -84,6 +91,7 @@ macro_rules! todo { } #[cfg(not(feature = "defmt"))] +#[collapse_debuginfo(yes)] macro_rules! unreachable { ($($x:tt)*) => { ::core::unreachable!($($x)*) @@ -91,12 +99,14 @@ macro_rules! unreachable { } #[cfg(feature = "defmt")] +#[collapse_debuginfo(yes)] macro_rules! unreachable { ($($x:tt)*) => { ::defmt::unreachable!($($x)*) }; } +#[collapse_debuginfo(yes)] macro_rules! panic { ($($x:tt)*) => { { @@ -108,6 +118,7 @@ macro_rules! panic { }; } +#[collapse_debuginfo(yes)] macro_rules! trace { ($s:literal $(, $x:expr)* $(,)?) => { { @@ -121,6 +132,7 @@ macro_rules! trace { }; } +#[collapse_debuginfo(yes)] macro_rules! debug { ($s:literal $(, $x:expr)* $(,)?) => { { @@ -134,6 +146,7 @@ macro_rules! debug { }; } +#[collapse_debuginfo(yes)] macro_rules! info { ($s:literal $(, $x:expr)* $(,)?) => { { @@ -147,6 +160,7 @@ macro_rules! info { }; } +#[collapse_debuginfo(yes)] macro_rules! warn { ($s:literal $(, $x:expr)* $(,)?) => { { @@ -160,6 +174,7 @@ macro_rules! warn { }; } +#[collapse_debuginfo(yes)] macro_rules! error { ($s:literal $(, $x:expr)* $(,)?) => { { @@ -174,6 +189,7 @@ macro_rules! error { } #[cfg(feature = "defmt")] +#[collapse_debuginfo(yes)] macro_rules! unwrap { ($($x:tt)*) => { ::defmt::unwrap!($($x)*) @@ -181,6 +197,7 @@ macro_rules! unwrap { } #[cfg(not(feature = "defmt"))] +#[collapse_debuginfo(yes)] macro_rules! unwrap { ($arg:expr) => { match $crate::fmt::Try::into_result($arg) { diff --git a/embassy-boot-rp/src/fmt.rs b/embassy-boot-rp/src/fmt.rs index 2ac42c557..35b929fde 100644 --- a/embassy-boot-rp/src/fmt.rs +++ b/embassy-boot-rp/src/fmt.rs @@ -6,6 +6,7 @@ use core::fmt::{Debug, Display, LowerHex}; #[cfg(all(feature = "defmt", feature = "log"))] compile_error!("You may not enable both `defmt` and `log` features."); +#[collapse_debuginfo(yes)] macro_rules! assert { ($($x:tt)*) => { { @@ -17,6 +18,7 @@ macro_rules! assert { }; } +#[collapse_debuginfo(yes)] macro_rules! assert_eq { ($($x:tt)*) => { { @@ -28,6 +30,7 @@ macro_rules! assert_eq { }; } +#[collapse_debuginfo(yes)] macro_rules! assert_ne { ($($x:tt)*) => { { @@ -39,6 +42,7 @@ macro_rules! assert_ne { }; } +#[collapse_debuginfo(yes)] macro_rules! debug_assert { ($($x:tt)*) => { { @@ -50,6 +54,7 @@ macro_rules! debug_assert { }; } +#[collapse_debuginfo(yes)] macro_rules! debug_assert_eq { ($($x:tt)*) => { { @@ -61,6 +66,7 @@ macro_rules! debug_assert_eq { }; } +#[collapse_debuginfo(yes)] macro_rules! debug_assert_ne { ($($x:tt)*) => { { @@ -72,6 +78,7 @@ macro_rules! debug_assert_ne { }; } +#[collapse_debuginfo(yes)] macro_rules! todo { ($($x:tt)*) => { { @@ -84,6 +91,7 @@ macro_rules! todo { } #[cfg(not(feature = "defmt"))] +#[collapse_debuginfo(yes)] macro_rules! unreachable { ($($x:tt)*) => { ::core::unreachable!($($x)*) @@ -91,12 +99,14 @@ macro_rules! unreachable { } #[cfg(feature = "defmt")] +#[collapse_debuginfo(yes)] macro_rules! unreachable { ($($x:tt)*) => { ::defmt::unreachable!($($x)*) }; } +#[collapse_debuginfo(yes)] macro_rules! panic { ($($x:tt)*) => { { @@ -108,6 +118,7 @@ macro_rules! panic { }; } +#[collapse_debuginfo(yes)] macro_rules! trace { ($s:literal $(, $x:expr)* $(,)?) => { { @@ -121,6 +132,7 @@ macro_rules! trace { }; } +#[collapse_debuginfo(yes)] macro_rules! debug { ($s:literal $(, $x:expr)* $(,)?) => { { @@ -134,6 +146,7 @@ macro_rules! debug { }; } +#[collapse_debuginfo(yes)] macro_rules! info { ($s:literal $(, $x:expr)* $(,)?) => { { @@ -147,6 +160,7 @@ macro_rules! info { }; } +#[collapse_debuginfo(yes)] macro_rules! warn { ($s:literal $(, $x:expr)* $(,)?) => { { @@ -160,6 +174,7 @@ macro_rules! warn { }; } +#[collapse_debuginfo(yes)] macro_rules! error { ($s:literal $(, $x:expr)* $(,)?) => { { @@ -174,6 +189,7 @@ macro_rules! error { } #[cfg(feature = "defmt")] +#[collapse_debuginfo(yes)] macro_rules! unwrap { ($($x:tt)*) => { ::defmt::unwrap!($($x)*) @@ -181,6 +197,7 @@ macro_rules! unwrap { } #[cfg(not(feature = "defmt"))] +#[collapse_debuginfo(yes)] macro_rules! unwrap { ($arg:expr) => { match $crate::fmt::Try::into_result($arg) { diff --git a/embassy-boot-stm32/src/fmt.rs b/embassy-boot-stm32/src/fmt.rs index 2ac42c557..35b929fde 100644 --- a/embassy-boot-stm32/src/fmt.rs +++ b/embassy-boot-stm32/src/fmt.rs @@ -6,6 +6,7 @@ use core::fmt::{Debug, Display, LowerHex}; #[cfg(all(feature = "defmt", feature = "log"))] compile_error!("You may not enable both `defmt` and `log` features."); +#[collapse_debuginfo(yes)] macro_rules! assert { ($($x:tt)*) => { { @@ -17,6 +18,7 @@ macro_rules! assert { }; } +#[collapse_debuginfo(yes)] macro_rules! assert_eq { ($($x:tt)*) => { { @@ -28,6 +30,7 @@ macro_rules! assert_eq { }; } +#[collapse_debuginfo(yes)] macro_rules! assert_ne { ($($x:tt)*) => { { @@ -39,6 +42,7 @@ macro_rules! assert_ne { }; } +#[collapse_debuginfo(yes)] macro_rules! debug_assert { ($($x:tt)*) => { { @@ -50,6 +54,7 @@ macro_rules! debug_assert { }; } +#[collapse_debuginfo(yes)] macro_rules! debug_assert_eq { ($($x:tt)*) => { { @@ -61,6 +66,7 @@ macro_rules! debug_assert_eq { }; } +#[collapse_debuginfo(yes)] macro_rules! debug_assert_ne { ($($x:tt)*) => { { @@ -72,6 +78,7 @@ macro_rules! debug_assert_ne { }; } +#[collapse_debuginfo(yes)] macro_rules! todo { ($($x:tt)*) => { { @@ -84,6 +91,7 @@ macro_rules! todo { } #[cfg(not(feature = "defmt"))] +#[collapse_debuginfo(yes)] macro_rules! unreachable { ($($x:tt)*) => { ::core::unreachable!($($x)*) @@ -91,12 +99,14 @@ macro_rules! unreachable { } #[cfg(feature = "defmt")] +#[collapse_debuginfo(yes)] macro_rules! unreachable { ($($x:tt)*) => { ::defmt::unreachable!($($x)*) }; } +#[collapse_debuginfo(yes)] macro_rules! panic { ($($x:tt)*) => { { @@ -108,6 +118,7 @@ macro_rules! panic { }; } +#[collapse_debuginfo(yes)] macro_rules! trace { ($s:literal $(, $x:expr)* $(,)?) => { { @@ -121,6 +132,7 @@ macro_rules! trace { }; } +#[collapse_debuginfo(yes)] macro_rules! debug { ($s:literal $(, $x:expr)* $(,)?) => { { @@ -134,6 +146,7 @@ macro_rules! debug { }; } +#[collapse_debuginfo(yes)] macro_rules! info { ($s:literal $(, $x:expr)* $(,)?) => { { @@ -147,6 +160,7 @@ macro_rules! info { }; } +#[collapse_debuginfo(yes)] macro_rules! warn { ($s:literal $(, $x:expr)* $(,)?) => { { @@ -160,6 +174,7 @@ macro_rules! warn { }; } +#[collapse_debuginfo(yes)] macro_rules! error { ($s:literal $(, $x:expr)* $(,)?) => { { @@ -174,6 +189,7 @@ macro_rules! error { } #[cfg(feature = "defmt")] +#[collapse_debuginfo(yes)] macro_rules! unwrap { ($($x:tt)*) => { ::defmt::unwrap!($($x)*) @@ -181,6 +197,7 @@ macro_rules! unwrap { } #[cfg(not(feature = "defmt"))] +#[collapse_debuginfo(yes)] macro_rules! unwrap { ($arg:expr) => { match $crate::fmt::Try::into_result($arg) { diff --git a/embassy-boot/src/fmt.rs b/embassy-boot/src/fmt.rs index 2ac42c557..35b929fde 100644 --- a/embassy-boot/src/fmt.rs +++ b/embassy-boot/src/fmt.rs @@ -6,6 +6,7 @@ use core::fmt::{Debug, Display, LowerHex}; #[cfg(all(feature = "defmt", feature = "log"))] compile_error!("You may not enable both `defmt` and `log` features."); +#[collapse_debuginfo(yes)] macro_rules! assert { ($($x:tt)*) => { { @@ -17,6 +18,7 @@ macro_rules! assert { }; } +#[collapse_debuginfo(yes)] macro_rules! assert_eq { ($($x:tt)*) => { { @@ -28,6 +30,7 @@ macro_rules! assert_eq { }; } +#[collapse_debuginfo(yes)] macro_rules! assert_ne { ($($x:tt)*) => { { @@ -39,6 +42,7 @@ macro_rules! assert_ne { }; } +#[collapse_debuginfo(yes)] macro_rules! debug_assert { ($($x:tt)*) => { { @@ -50,6 +54,7 @@ macro_rules! debug_assert { }; } +#[collapse_debuginfo(yes)] macro_rules! debug_assert_eq { ($($x:tt)*) => { { @@ -61,6 +66,7 @@ macro_rules! debug_assert_eq { }; } +#[collapse_debuginfo(yes)] macro_rules! debug_assert_ne { ($($x:tt)*) => { { @@ -72,6 +78,7 @@ macro_rules! debug_assert_ne { }; } +#[collapse_debuginfo(yes)] macro_rules! todo { ($($x:tt)*) => { { @@ -84,6 +91,7 @@ macro_rules! todo { } #[cfg(not(feature = "defmt"))] +#[collapse_debuginfo(yes)] macro_rules! unreachable { ($($x:tt)*) => { ::core::unreachable!($($x)*) @@ -91,12 +99,14 @@ macro_rules! unreachable { } #[cfg(feature = "defmt")] +#[collapse_debuginfo(yes)] macro_rules! unreachable { ($($x:tt)*) => { ::defmt::unreachable!($($x)*) }; } +#[collapse_debuginfo(yes)] macro_rules! panic { ($($x:tt)*) => { { @@ -108,6 +118,7 @@ macro_rules! panic { }; } +#[collapse_debuginfo(yes)] macro_rules! trace { ($s:literal $(, $x:expr)* $(,)?) => { { @@ -121,6 +132,7 @@ macro_rules! trace { }; } +#[collapse_debuginfo(yes)] macro_rules! debug { ($s:literal $(, $x:expr)* $(,)?) => { { @@ -134,6 +146,7 @@ macro_rules! debug { }; } +#[collapse_debuginfo(yes)] macro_rules! info { ($s:literal $(, $x:expr)* $(,)?) => { { @@ -147,6 +160,7 @@ macro_rules! info { }; } +#[collapse_debuginfo(yes)] macro_rules! warn { ($s:literal $(, $x:expr)* $(,)?) => { { @@ -160,6 +174,7 @@ macro_rules! warn { }; } +#[collapse_debuginfo(yes)] macro_rules! error { ($s:literal $(, $x:expr)* $(,)?) => { { @@ -174,6 +189,7 @@ macro_rules! error { } #[cfg(feature = "defmt")] +#[collapse_debuginfo(yes)] macro_rules! unwrap { ($($x:tt)*) => { ::defmt::unwrap!($($x)*) @@ -181,6 +197,7 @@ macro_rules! unwrap { } #[cfg(not(feature = "defmt"))] +#[collapse_debuginfo(yes)] macro_rules! unwrap { ($arg:expr) => { match $crate::fmt::Try::into_result($arg) { diff --git a/embassy-executor/src/fmt.rs b/embassy-executor/src/fmt.rs index 2ac42c557..35b929fde 100644 --- a/embassy-executor/src/fmt.rs +++ b/embassy-executor/src/fmt.rs @@ -6,6 +6,7 @@ use core::fmt::{Debug, Display, LowerHex}; #[cfg(all(feature = "defmt", feature = "log"))] compile_error!("You may not enable both `defmt` and `log` features."); +#[collapse_debuginfo(yes)] macro_rules! assert { ($($x:tt)*) => { { @@ -17,6 +18,7 @@ macro_rules! assert { }; } +#[collapse_debuginfo(yes)] macro_rules! assert_eq { ($($x:tt)*) => { { @@ -28,6 +30,7 @@ macro_rules! assert_eq { }; } +#[collapse_debuginfo(yes)] macro_rules! assert_ne { ($($x:tt)*) => { { @@ -39,6 +42,7 @@ macro_rules! assert_ne { }; } +#[collapse_debuginfo(yes)] macro_rules! debug_assert { ($($x:tt)*) => { { @@ -50,6 +54,7 @@ macro_rules! debug_assert { }; } +#[collapse_debuginfo(yes)] macro_rules! debug_assert_eq { ($($x:tt)*) => { { @@ -61,6 +66,7 @@ macro_rules! debug_assert_eq { }; } +#[collapse_debuginfo(yes)] macro_rules! debug_assert_ne { ($($x:tt)*) => { { @@ -72,6 +78,7 @@ macro_rules! debug_assert_ne { }; } +#[collapse_debuginfo(yes)] macro_rules! todo { ($($x:tt)*) => { { @@ -84,6 +91,7 @@ macro_rules! todo { } #[cfg(not(feature = "defmt"))] +#[collapse_debuginfo(yes)] macro_rules! unreachable { ($($x:tt)*) => { ::core::unreachable!($($x)*) @@ -91,12 +99,14 @@ macro_rules! unreachable { } #[cfg(feature = "defmt")] +#[collapse_debuginfo(yes)] macro_rules! unreachable { ($($x:tt)*) => { ::defmt::unreachable!($($x)*) }; } +#[collapse_debuginfo(yes)] macro_rules! panic { ($($x:tt)*) => { { @@ -108,6 +118,7 @@ macro_rules! panic { }; } +#[collapse_debuginfo(yes)] macro_rules! trace { ($s:literal $(, $x:expr)* $(,)?) => { { @@ -121,6 +132,7 @@ macro_rules! trace { }; } +#[collapse_debuginfo(yes)] macro_rules! debug { ($s:literal $(, $x:expr)* $(,)?) => { { @@ -134,6 +146,7 @@ macro_rules! debug { }; } +#[collapse_debuginfo(yes)] macro_rules! info { ($s:literal $(, $x:expr)* $(,)?) => { { @@ -147,6 +160,7 @@ macro_rules! info { }; } +#[collapse_debuginfo(yes)] macro_rules! warn { ($s:literal $(, $x:expr)* $(,)?) => { { @@ -160,6 +174,7 @@ macro_rules! warn { }; } +#[collapse_debuginfo(yes)] macro_rules! error { ($s:literal $(, $x:expr)* $(,)?) => { { @@ -174,6 +189,7 @@ macro_rules! error { } #[cfg(feature = "defmt")] +#[collapse_debuginfo(yes)] macro_rules! unwrap { ($($x:tt)*) => { ::defmt::unwrap!($($x)*) @@ -181,6 +197,7 @@ macro_rules! unwrap { } #[cfg(not(feature = "defmt"))] +#[collapse_debuginfo(yes)] macro_rules! unwrap { ($arg:expr) => { match $crate::fmt::Try::into_result($arg) { diff --git a/embassy-futures/src/fmt.rs b/embassy-futures/src/fmt.rs index 2ac42c557..35b929fde 100644 --- a/embassy-futures/src/fmt.rs +++ b/embassy-futures/src/fmt.rs @@ -6,6 +6,7 @@ use core::fmt::{Debug, Display, LowerHex}; #[cfg(all(feature = "defmt", feature = "log"))] compile_error!("You may not enable both `defmt` and `log` features."); +#[collapse_debuginfo(yes)] macro_rules! assert { ($($x:tt)*) => { { @@ -17,6 +18,7 @@ macro_rules! assert { }; } +#[collapse_debuginfo(yes)] macro_rules! assert_eq { ($($x:tt)*) => { { @@ -28,6 +30,7 @@ macro_rules! assert_eq { }; } +#[collapse_debuginfo(yes)] macro_rules! assert_ne { ($($x:tt)*) => { { @@ -39,6 +42,7 @@ macro_rules! assert_ne { }; } +#[collapse_debuginfo(yes)] macro_rules! debug_assert { ($($x:tt)*) => { { @@ -50,6 +54,7 @@ macro_rules! debug_assert { }; } +#[collapse_debuginfo(yes)] macro_rules! debug_assert_eq { ($($x:tt)*) => { { @@ -61,6 +66,7 @@ macro_rules! debug_assert_eq { }; } +#[collapse_debuginfo(yes)] macro_rules! debug_assert_ne { ($($x:tt)*) => { { @@ -72,6 +78,7 @@ macro_rules! debug_assert_ne { }; } +#[collapse_debuginfo(yes)] macro_rules! todo { ($($x:tt)*) => { { @@ -84,6 +91,7 @@ macro_rules! todo { } #[cfg(not(feature = "defmt"))] +#[collapse_debuginfo(yes)] macro_rules! unreachable { ($($x:tt)*) => { ::core::unreachable!($($x)*) @@ -91,12 +99,14 @@ macro_rules! unreachable { } #[cfg(feature = "defmt")] +#[collapse_debuginfo(yes)] macro_rules! unreachable { ($($x:tt)*) => { ::defmt::unreachable!($($x)*) }; } +#[collapse_debuginfo(yes)] macro_rules! panic { ($($x:tt)*) => { { @@ -108,6 +118,7 @@ macro_rules! panic { }; } +#[collapse_debuginfo(yes)] macro_rules! trace { ($s:literal $(, $x:expr)* $(,)?) => { { @@ -121,6 +132,7 @@ macro_rules! trace { }; } +#[collapse_debuginfo(yes)] macro_rules! debug { ($s:literal $(, $x:expr)* $(,)?) => { { @@ -134,6 +146,7 @@ macro_rules! debug { }; } +#[collapse_debuginfo(yes)] macro_rules! info { ($s:literal $(, $x:expr)* $(,)?) => { { @@ -147,6 +160,7 @@ macro_rules! info { }; } +#[collapse_debuginfo(yes)] macro_rules! warn { ($s:literal $(, $x:expr)* $(,)?) => { { @@ -160,6 +174,7 @@ macro_rules! warn { }; } +#[collapse_debuginfo(yes)] macro_rules! error { ($s:literal $(, $x:expr)* $(,)?) => { { @@ -174,6 +189,7 @@ macro_rules! error { } #[cfg(feature = "defmt")] +#[collapse_debuginfo(yes)] macro_rules! unwrap { ($($x:tt)*) => { ::defmt::unwrap!($($x)*) @@ -181,6 +197,7 @@ macro_rules! unwrap { } #[cfg(not(feature = "defmt"))] +#[collapse_debuginfo(yes)] macro_rules! unwrap { ($arg:expr) => { match $crate::fmt::Try::into_result($arg) { diff --git a/embassy-hal-internal/src/fmt.rs b/embassy-hal-internal/src/fmt.rs index 2ac42c557..35b929fde 100644 --- a/embassy-hal-internal/src/fmt.rs +++ b/embassy-hal-internal/src/fmt.rs @@ -6,6 +6,7 @@ use core::fmt::{Debug, Display, LowerHex}; #[cfg(all(feature = "defmt", feature = "log"))] compile_error!("You may not enable both `defmt` and `log` features."); +#[collapse_debuginfo(yes)] macro_rules! assert { ($($x:tt)*) => { { @@ -17,6 +18,7 @@ macro_rules! assert { }; } +#[collapse_debuginfo(yes)] macro_rules! assert_eq { ($($x:tt)*) => { { @@ -28,6 +30,7 @@ macro_rules! assert_eq { }; } +#[collapse_debuginfo(yes)] macro_rules! assert_ne { ($($x:tt)*) => { { @@ -39,6 +42,7 @@ macro_rules! assert_ne { }; } +#[collapse_debuginfo(yes)] macro_rules! debug_assert { ($($x:tt)*) => { { @@ -50,6 +54,7 @@ macro_rules! debug_assert { }; } +#[collapse_debuginfo(yes)] macro_rules! debug_assert_eq { ($($x:tt)*) => { { @@ -61,6 +66,7 @@ macro_rules! debug_assert_eq { }; } +#[collapse_debuginfo(yes)] macro_rules! debug_assert_ne { ($($x:tt)*) => { { @@ -72,6 +78,7 @@ macro_rules! debug_assert_ne { }; } +#[collapse_debuginfo(yes)] macro_rules! todo { ($($x:tt)*) => { { @@ -84,6 +91,7 @@ macro_rules! todo { } #[cfg(not(feature = "defmt"))] +#[collapse_debuginfo(yes)] macro_rules! unreachable { ($($x:tt)*) => { ::core::unreachable!($($x)*) @@ -91,12 +99,14 @@ macro_rules! unreachable { } #[cfg(feature = "defmt")] +#[collapse_debuginfo(yes)] macro_rules! unreachable { ($($x:tt)*) => { ::defmt::unreachable!($($x)*) }; } +#[collapse_debuginfo(yes)] macro_rules! panic { ($($x:tt)*) => { { @@ -108,6 +118,7 @@ macro_rules! panic { }; } +#[collapse_debuginfo(yes)] macro_rules! trace { ($s:literal $(, $x:expr)* $(,)?) => { { @@ -121,6 +132,7 @@ macro_rules! trace { }; } +#[collapse_debuginfo(yes)] macro_rules! debug { ($s:literal $(, $x:expr)* $(,)?) => { { @@ -134,6 +146,7 @@ macro_rules! debug { }; } +#[collapse_debuginfo(yes)] macro_rules! info { ($s:literal $(, $x:expr)* $(,)?) => { { @@ -147,6 +160,7 @@ macro_rules! info { }; } +#[collapse_debuginfo(yes)] macro_rules! warn { ($s:literal $(, $x:expr)* $(,)?) => { { @@ -160,6 +174,7 @@ macro_rules! warn { }; } +#[collapse_debuginfo(yes)] macro_rules! error { ($s:literal $(, $x:expr)* $(,)?) => { { @@ -174,6 +189,7 @@ macro_rules! error { } #[cfg(feature = "defmt")] +#[collapse_debuginfo(yes)] macro_rules! unwrap { ($($x:tt)*) => { ::defmt::unwrap!($($x)*) @@ -181,6 +197,7 @@ macro_rules! unwrap { } #[cfg(not(feature = "defmt"))] +#[collapse_debuginfo(yes)] macro_rules! unwrap { ($arg:expr) => { match $crate::fmt::Try::into_result($arg) { diff --git a/embassy-net-adin1110/src/fmt.rs b/embassy-net-adin1110/src/fmt.rs index 2ac42c557..35b929fde 100644 --- a/embassy-net-adin1110/src/fmt.rs +++ b/embassy-net-adin1110/src/fmt.rs @@ -6,6 +6,7 @@ use core::fmt::{Debug, Display, LowerHex}; #[cfg(all(feature = "defmt", feature = "log"))] compile_error!("You may not enable both `defmt` and `log` features."); +#[collapse_debuginfo(yes)] macro_rules! assert { ($($x:tt)*) => { { @@ -17,6 +18,7 @@ macro_rules! assert { }; } +#[collapse_debuginfo(yes)] macro_rules! assert_eq { ($($x:tt)*) => { { @@ -28,6 +30,7 @@ macro_rules! assert_eq { }; } +#[collapse_debuginfo(yes)] macro_rules! assert_ne { ($($x:tt)*) => { { @@ -39,6 +42,7 @@ macro_rules! assert_ne { }; } +#[collapse_debuginfo(yes)] macro_rules! debug_assert { ($($x:tt)*) => { { @@ -50,6 +54,7 @@ macro_rules! debug_assert { }; } +#[collapse_debuginfo(yes)] macro_rules! debug_assert_eq { ($($x:tt)*) => { { @@ -61,6 +66,7 @@ macro_rules! debug_assert_eq { }; } +#[collapse_debuginfo(yes)] macro_rules! debug_assert_ne { ($($x:tt)*) => { { @@ -72,6 +78,7 @@ macro_rules! debug_assert_ne { }; } +#[collapse_debuginfo(yes)] macro_rules! todo { ($($x:tt)*) => { { @@ -84,6 +91,7 @@ macro_rules! todo { } #[cfg(not(feature = "defmt"))] +#[collapse_debuginfo(yes)] macro_rules! unreachable { ($($x:tt)*) => { ::core::unreachable!($($x)*) @@ -91,12 +99,14 @@ macro_rules! unreachable { } #[cfg(feature = "defmt")] +#[collapse_debuginfo(yes)] macro_rules! unreachable { ($($x:tt)*) => { ::defmt::unreachable!($($x)*) }; } +#[collapse_debuginfo(yes)] macro_rules! panic { ($($x:tt)*) => { { @@ -108,6 +118,7 @@ macro_rules! panic { }; } +#[collapse_debuginfo(yes)] macro_rules! trace { ($s:literal $(, $x:expr)* $(,)?) => { { @@ -121,6 +132,7 @@ macro_rules! trace { }; } +#[collapse_debuginfo(yes)] macro_rules! debug { ($s:literal $(, $x:expr)* $(,)?) => { { @@ -134,6 +146,7 @@ macro_rules! debug { }; } +#[collapse_debuginfo(yes)] macro_rules! info { ($s:literal $(, $x:expr)* $(,)?) => { { @@ -147,6 +160,7 @@ macro_rules! info { }; } +#[collapse_debuginfo(yes)] macro_rules! warn { ($s:literal $(, $x:expr)* $(,)?) => { { @@ -160,6 +174,7 @@ macro_rules! warn { }; } +#[collapse_debuginfo(yes)] macro_rules! error { ($s:literal $(, $x:expr)* $(,)?) => { { @@ -174,6 +189,7 @@ macro_rules! error { } #[cfg(feature = "defmt")] +#[collapse_debuginfo(yes)] macro_rules! unwrap { ($($x:tt)*) => { ::defmt::unwrap!($($x)*) @@ -181,6 +197,7 @@ macro_rules! unwrap { } #[cfg(not(feature = "defmt"))] +#[collapse_debuginfo(yes)] macro_rules! unwrap { ($arg:expr) => { match $crate::fmt::Try::into_result($arg) { diff --git a/embassy-net-driver-channel/src/fmt.rs b/embassy-net-driver-channel/src/fmt.rs index 2ac42c557..35b929fde 100644 --- a/embassy-net-driver-channel/src/fmt.rs +++ b/embassy-net-driver-channel/src/fmt.rs @@ -6,6 +6,7 @@ use core::fmt::{Debug, Display, LowerHex}; #[cfg(all(feature = "defmt", feature = "log"))] compile_error!("You may not enable both `defmt` and `log` features."); +#[collapse_debuginfo(yes)] macro_rules! assert { ($($x:tt)*) => { { @@ -17,6 +18,7 @@ macro_rules! assert { }; } +#[collapse_debuginfo(yes)] macro_rules! assert_eq { ($($x:tt)*) => { { @@ -28,6 +30,7 @@ macro_rules! assert_eq { }; } +#[collapse_debuginfo(yes)] macro_rules! assert_ne { ($($x:tt)*) => { { @@ -39,6 +42,7 @@ macro_rules! assert_ne { }; } +#[collapse_debuginfo(yes)] macro_rules! debug_assert { ($($x:tt)*) => { { @@ -50,6 +54,7 @@ macro_rules! debug_assert { }; } +#[collapse_debuginfo(yes)] macro_rules! debug_assert_eq { ($($x:tt)*) => { { @@ -61,6 +66,7 @@ macro_rules! debug_assert_eq { }; } +#[collapse_debuginfo(yes)] macro_rules! debug_assert_ne { ($($x:tt)*) => { { @@ -72,6 +78,7 @@ macro_rules! debug_assert_ne { }; } +#[collapse_debuginfo(yes)] macro_rules! todo { ($($x:tt)*) => { { @@ -84,6 +91,7 @@ macro_rules! todo { } #[cfg(not(feature = "defmt"))] +#[collapse_debuginfo(yes)] macro_rules! unreachable { ($($x:tt)*) => { ::core::unreachable!($($x)*) @@ -91,12 +99,14 @@ macro_rules! unreachable { } #[cfg(feature = "defmt")] +#[collapse_debuginfo(yes)] macro_rules! unreachable { ($($x:tt)*) => { ::defmt::unreachable!($($x)*) }; } +#[collapse_debuginfo(yes)] macro_rules! panic { ($($x:tt)*) => { { @@ -108,6 +118,7 @@ macro_rules! panic { }; } +#[collapse_debuginfo(yes)] macro_rules! trace { ($s:literal $(, $x:expr)* $(,)?) => { { @@ -121,6 +132,7 @@ macro_rules! trace { }; } +#[collapse_debuginfo(yes)] macro_rules! debug { ($s:literal $(, $x:expr)* $(,)?) => { { @@ -134,6 +146,7 @@ macro_rules! debug { }; } +#[collapse_debuginfo(yes)] macro_rules! info { ($s:literal $(, $x:expr)* $(,)?) => { { @@ -147,6 +160,7 @@ macro_rules! info { }; } +#[collapse_debuginfo(yes)] macro_rules! warn { ($s:literal $(, $x:expr)* $(,)?) => { { @@ -160,6 +174,7 @@ macro_rules! warn { }; } +#[collapse_debuginfo(yes)] macro_rules! error { ($s:literal $(, $x:expr)* $(,)?) => { { @@ -174,6 +189,7 @@ macro_rules! error { } #[cfg(feature = "defmt")] +#[collapse_debuginfo(yes)] macro_rules! unwrap { ($($x:tt)*) => { ::defmt::unwrap!($($x)*) @@ -181,6 +197,7 @@ macro_rules! unwrap { } #[cfg(not(feature = "defmt"))] +#[collapse_debuginfo(yes)] macro_rules! unwrap { ($arg:expr) => { match $crate::fmt::Try::into_result($arg) { diff --git a/embassy-net-enc28j60/src/fmt.rs b/embassy-net-enc28j60/src/fmt.rs index 2ac42c557..35b929fde 100644 --- a/embassy-net-enc28j60/src/fmt.rs +++ b/embassy-net-enc28j60/src/fmt.rs @@ -6,6 +6,7 @@ use core::fmt::{Debug, Display, LowerHex}; #[cfg(all(feature = "defmt", feature = "log"))] compile_error!("You may not enable both `defmt` and `log` features."); +#[collapse_debuginfo(yes)] macro_rules! assert { ($($x:tt)*) => { { @@ -17,6 +18,7 @@ macro_rules! assert { }; } +#[collapse_debuginfo(yes)] macro_rules! assert_eq { ($($x:tt)*) => { { @@ -28,6 +30,7 @@ macro_rules! assert_eq { }; } +#[collapse_debuginfo(yes)] macro_rules! assert_ne { ($($x:tt)*) => { { @@ -39,6 +42,7 @@ macro_rules! assert_ne { }; } +#[collapse_debuginfo(yes)] macro_rules! debug_assert { ($($x:tt)*) => { { @@ -50,6 +54,7 @@ macro_rules! debug_assert { }; } +#[collapse_debuginfo(yes)] macro_rules! debug_assert_eq { ($($x:tt)*) => { { @@ -61,6 +66,7 @@ macro_rules! debug_assert_eq { }; } +#[collapse_debuginfo(yes)] macro_rules! debug_assert_ne { ($($x:tt)*) => { { @@ -72,6 +78,7 @@ macro_rules! debug_assert_ne { }; } +#[collapse_debuginfo(yes)] macro_rules! todo { ($($x:tt)*) => { { @@ -84,6 +91,7 @@ macro_rules! todo { } #[cfg(not(feature = "defmt"))] +#[collapse_debuginfo(yes)] macro_rules! unreachable { ($($x:tt)*) => { ::core::unreachable!($($x)*) @@ -91,12 +99,14 @@ macro_rules! unreachable { } #[cfg(feature = "defmt")] +#[collapse_debuginfo(yes)] macro_rules! unreachable { ($($x:tt)*) => { ::defmt::unreachable!($($x)*) }; } +#[collapse_debuginfo(yes)] macro_rules! panic { ($($x:tt)*) => { { @@ -108,6 +118,7 @@ macro_rules! panic { }; } +#[collapse_debuginfo(yes)] macro_rules! trace { ($s:literal $(, $x:expr)* $(,)?) => { { @@ -121,6 +132,7 @@ macro_rules! trace { }; } +#[collapse_debuginfo(yes)] macro_rules! debug { ($s:literal $(, $x:expr)* $(,)?) => { { @@ -134,6 +146,7 @@ macro_rules! debug { }; } +#[collapse_debuginfo(yes)] macro_rules! info { ($s:literal $(, $x:expr)* $(,)?) => { { @@ -147,6 +160,7 @@ macro_rules! info { }; } +#[collapse_debuginfo(yes)] macro_rules! warn { ($s:literal $(, $x:expr)* $(,)?) => { { @@ -160,6 +174,7 @@ macro_rules! warn { }; } +#[collapse_debuginfo(yes)] macro_rules! error { ($s:literal $(, $x:expr)* $(,)?) => { { @@ -174,6 +189,7 @@ macro_rules! error { } #[cfg(feature = "defmt")] +#[collapse_debuginfo(yes)] macro_rules! unwrap { ($($x:tt)*) => { ::defmt::unwrap!($($x)*) @@ -181,6 +197,7 @@ macro_rules! unwrap { } #[cfg(not(feature = "defmt"))] +#[collapse_debuginfo(yes)] macro_rules! unwrap { ($arg:expr) => { match $crate::fmt::Try::into_result($arg) { diff --git a/embassy-net-esp-hosted/src/fmt.rs b/embassy-net-esp-hosted/src/fmt.rs index 2ac42c557..35b929fde 100644 --- a/embassy-net-esp-hosted/src/fmt.rs +++ b/embassy-net-esp-hosted/src/fmt.rs @@ -6,6 +6,7 @@ use core::fmt::{Debug, Display, LowerHex}; #[cfg(all(feature = "defmt", feature = "log"))] compile_error!("You may not enable both `defmt` and `log` features."); +#[collapse_debuginfo(yes)] macro_rules! assert { ($($x:tt)*) => { { @@ -17,6 +18,7 @@ macro_rules! assert { }; } +#[collapse_debuginfo(yes)] macro_rules! assert_eq { ($($x:tt)*) => { { @@ -28,6 +30,7 @@ macro_rules! assert_eq { }; } +#[collapse_debuginfo(yes)] macro_rules! assert_ne { ($($x:tt)*) => { { @@ -39,6 +42,7 @@ macro_rules! assert_ne { }; } +#[collapse_debuginfo(yes)] macro_rules! debug_assert { ($($x:tt)*) => { { @@ -50,6 +54,7 @@ macro_rules! debug_assert { }; } +#[collapse_debuginfo(yes)] macro_rules! debug_assert_eq { ($($x:tt)*) => { { @@ -61,6 +66,7 @@ macro_rules! debug_assert_eq { }; } +#[collapse_debuginfo(yes)] macro_rules! debug_assert_ne { ($($x:tt)*) => { { @@ -72,6 +78,7 @@ macro_rules! debug_assert_ne { }; } +#[collapse_debuginfo(yes)] macro_rules! todo { ($($x:tt)*) => { { @@ -84,6 +91,7 @@ macro_rules! todo { } #[cfg(not(feature = "defmt"))] +#[collapse_debuginfo(yes)] macro_rules! unreachable { ($($x:tt)*) => { ::core::unreachable!($($x)*) @@ -91,12 +99,14 @@ macro_rules! unreachable { } #[cfg(feature = "defmt")] +#[collapse_debuginfo(yes)] macro_rules! unreachable { ($($x:tt)*) => { ::defmt::unreachable!($($x)*) }; } +#[collapse_debuginfo(yes)] macro_rules! panic { ($($x:tt)*) => { { @@ -108,6 +118,7 @@ macro_rules! panic { }; } +#[collapse_debuginfo(yes)] macro_rules! trace { ($s:literal $(, $x:expr)* $(,)?) => { { @@ -121,6 +132,7 @@ macro_rules! trace { }; } +#[collapse_debuginfo(yes)] macro_rules! debug { ($s:literal $(, $x:expr)* $(,)?) => { { @@ -134,6 +146,7 @@ macro_rules! debug { }; } +#[collapse_debuginfo(yes)] macro_rules! info { ($s:literal $(, $x:expr)* $(,)?) => { { @@ -147,6 +160,7 @@ macro_rules! info { }; } +#[collapse_debuginfo(yes)] macro_rules! warn { ($s:literal $(, $x:expr)* $(,)?) => { { @@ -160,6 +174,7 @@ macro_rules! warn { }; } +#[collapse_debuginfo(yes)] macro_rules! error { ($s:literal $(, $x:expr)* $(,)?) => { { @@ -174,6 +189,7 @@ macro_rules! error { } #[cfg(feature = "defmt")] +#[collapse_debuginfo(yes)] macro_rules! unwrap { ($($x:tt)*) => { ::defmt::unwrap!($($x)*) @@ -181,6 +197,7 @@ macro_rules! unwrap { } #[cfg(not(feature = "defmt"))] +#[collapse_debuginfo(yes)] macro_rules! unwrap { ($arg:expr) => { match $crate::fmt::Try::into_result($arg) { diff --git a/embassy-net-ppp/src/fmt.rs b/embassy-net-ppp/src/fmt.rs index 2ac42c557..35b929fde 100644 --- a/embassy-net-ppp/src/fmt.rs +++ b/embassy-net-ppp/src/fmt.rs @@ -6,6 +6,7 @@ use core::fmt::{Debug, Display, LowerHex}; #[cfg(all(feature = "defmt", feature = "log"))] compile_error!("You may not enable both `defmt` and `log` features."); +#[collapse_debuginfo(yes)] macro_rules! assert { ($($x:tt)*) => { { @@ -17,6 +18,7 @@ macro_rules! assert { }; } +#[collapse_debuginfo(yes)] macro_rules! assert_eq { ($($x:tt)*) => { { @@ -28,6 +30,7 @@ macro_rules! assert_eq { }; } +#[collapse_debuginfo(yes)] macro_rules! assert_ne { ($($x:tt)*) => { { @@ -39,6 +42,7 @@ macro_rules! assert_ne { }; } +#[collapse_debuginfo(yes)] macro_rules! debug_assert { ($($x:tt)*) => { { @@ -50,6 +54,7 @@ macro_rules! debug_assert { }; } +#[collapse_debuginfo(yes)] macro_rules! debug_assert_eq { ($($x:tt)*) => { { @@ -61,6 +66,7 @@ macro_rules! debug_assert_eq { }; } +#[collapse_debuginfo(yes)] macro_rules! debug_assert_ne { ($($x:tt)*) => { { @@ -72,6 +78,7 @@ macro_rules! debug_assert_ne { }; } +#[collapse_debuginfo(yes)] macro_rules! todo { ($($x:tt)*) => { { @@ -84,6 +91,7 @@ macro_rules! todo { } #[cfg(not(feature = "defmt"))] +#[collapse_debuginfo(yes)] macro_rules! unreachable { ($($x:tt)*) => { ::core::unreachable!($($x)*) @@ -91,12 +99,14 @@ macro_rules! unreachable { } #[cfg(feature = "defmt")] +#[collapse_debuginfo(yes)] macro_rules! unreachable { ($($x:tt)*) => { ::defmt::unreachable!($($x)*) }; } +#[collapse_debuginfo(yes)] macro_rules! panic { ($($x:tt)*) => { { @@ -108,6 +118,7 @@ macro_rules! panic { }; } +#[collapse_debuginfo(yes)] macro_rules! trace { ($s:literal $(, $x:expr)* $(,)?) => { { @@ -121,6 +132,7 @@ macro_rules! trace { }; } +#[collapse_debuginfo(yes)] macro_rules! debug { ($s:literal $(, $x:expr)* $(,)?) => { { @@ -134,6 +146,7 @@ macro_rules! debug { }; } +#[collapse_debuginfo(yes)] macro_rules! info { ($s:literal $(, $x:expr)* $(,)?) => { { @@ -147,6 +160,7 @@ macro_rules! info { }; } +#[collapse_debuginfo(yes)] macro_rules! warn { ($s:literal $(, $x:expr)* $(,)?) => { { @@ -160,6 +174,7 @@ macro_rules! warn { }; } +#[collapse_debuginfo(yes)] macro_rules! error { ($s:literal $(, $x:expr)* $(,)?) => { { @@ -174,6 +189,7 @@ macro_rules! error { } #[cfg(feature = "defmt")] +#[collapse_debuginfo(yes)] macro_rules! unwrap { ($($x:tt)*) => { ::defmt::unwrap!($($x)*) @@ -181,6 +197,7 @@ macro_rules! unwrap { } #[cfg(not(feature = "defmt"))] +#[collapse_debuginfo(yes)] macro_rules! unwrap { ($arg:expr) => { match $crate::fmt::Try::into_result($arg) { diff --git a/embassy-net/src/fmt.rs b/embassy-net/src/fmt.rs index 2ac42c557..35b929fde 100644 --- a/embassy-net/src/fmt.rs +++ b/embassy-net/src/fmt.rs @@ -6,6 +6,7 @@ use core::fmt::{Debug, Display, LowerHex}; #[cfg(all(feature = "defmt", feature = "log"))] compile_error!("You may not enable both `defmt` and `log` features."); +#[collapse_debuginfo(yes)] macro_rules! assert { ($($x:tt)*) => { { @@ -17,6 +18,7 @@ macro_rules! assert { }; } +#[collapse_debuginfo(yes)] macro_rules! assert_eq { ($($x:tt)*) => { { @@ -28,6 +30,7 @@ macro_rules! assert_eq { }; } +#[collapse_debuginfo(yes)] macro_rules! assert_ne { ($($x:tt)*) => { { @@ -39,6 +42,7 @@ macro_rules! assert_ne { }; } +#[collapse_debuginfo(yes)] macro_rules! debug_assert { ($($x:tt)*) => { { @@ -50,6 +54,7 @@ macro_rules! debug_assert { }; } +#[collapse_debuginfo(yes)] macro_rules! debug_assert_eq { ($($x:tt)*) => { { @@ -61,6 +66,7 @@ macro_rules! debug_assert_eq { }; } +#[collapse_debuginfo(yes)] macro_rules! debug_assert_ne { ($($x:tt)*) => { { @@ -72,6 +78,7 @@ macro_rules! debug_assert_ne { }; } +#[collapse_debuginfo(yes)] macro_rules! todo { ($($x:tt)*) => { { @@ -84,6 +91,7 @@ macro_rules! todo { } #[cfg(not(feature = "defmt"))] +#[collapse_debuginfo(yes)] macro_rules! unreachable { ($($x:tt)*) => { ::core::unreachable!($($x)*) @@ -91,12 +99,14 @@ macro_rules! unreachable { } #[cfg(feature = "defmt")] +#[collapse_debuginfo(yes)] macro_rules! unreachable { ($($x:tt)*) => { ::defmt::unreachable!($($x)*) }; } +#[collapse_debuginfo(yes)] macro_rules! panic { ($($x:tt)*) => { { @@ -108,6 +118,7 @@ macro_rules! panic { }; } +#[collapse_debuginfo(yes)] macro_rules! trace { ($s:literal $(, $x:expr)* $(,)?) => { { @@ -121,6 +132,7 @@ macro_rules! trace { }; } +#[collapse_debuginfo(yes)] macro_rules! debug { ($s:literal $(, $x:expr)* $(,)?) => { { @@ -134,6 +146,7 @@ macro_rules! debug { }; } +#[collapse_debuginfo(yes)] macro_rules! info { ($s:literal $(, $x:expr)* $(,)?) => { { @@ -147,6 +160,7 @@ macro_rules! info { }; } +#[collapse_debuginfo(yes)] macro_rules! warn { ($s:literal $(, $x:expr)* $(,)?) => { { @@ -160,6 +174,7 @@ macro_rules! warn { }; } +#[collapse_debuginfo(yes)] macro_rules! error { ($s:literal $(, $x:expr)* $(,)?) => { { @@ -174,6 +189,7 @@ macro_rules! error { } #[cfg(feature = "defmt")] +#[collapse_debuginfo(yes)] macro_rules! unwrap { ($($x:tt)*) => { ::defmt::unwrap!($($x)*) @@ -181,6 +197,7 @@ macro_rules! unwrap { } #[cfg(not(feature = "defmt"))] +#[collapse_debuginfo(yes)] macro_rules! unwrap { ($arg:expr) => { match $crate::fmt::Try::into_result($arg) { diff --git a/embassy-nrf/src/fmt.rs b/embassy-nrf/src/fmt.rs index 2ac42c557..35b929fde 100644 --- a/embassy-nrf/src/fmt.rs +++ b/embassy-nrf/src/fmt.rs @@ -6,6 +6,7 @@ use core::fmt::{Debug, Display, LowerHex}; #[cfg(all(feature = "defmt", feature = "log"))] compile_error!("You may not enable both `defmt` and `log` features."); +#[collapse_debuginfo(yes)] macro_rules! assert { ($($x:tt)*) => { { @@ -17,6 +18,7 @@ macro_rules! assert { }; } +#[collapse_debuginfo(yes)] macro_rules! assert_eq { ($($x:tt)*) => { { @@ -28,6 +30,7 @@ macro_rules! assert_eq { }; } +#[collapse_debuginfo(yes)] macro_rules! assert_ne { ($($x:tt)*) => { { @@ -39,6 +42,7 @@ macro_rules! assert_ne { }; } +#[collapse_debuginfo(yes)] macro_rules! debug_assert { ($($x:tt)*) => { { @@ -50,6 +54,7 @@ macro_rules! debug_assert { }; } +#[collapse_debuginfo(yes)] macro_rules! debug_assert_eq { ($($x:tt)*) => { { @@ -61,6 +66,7 @@ macro_rules! debug_assert_eq { }; } +#[collapse_debuginfo(yes)] macro_rules! debug_assert_ne { ($($x:tt)*) => { { @@ -72,6 +78,7 @@ macro_rules! debug_assert_ne { }; } +#[collapse_debuginfo(yes)] macro_rules! todo { ($($x:tt)*) => { { @@ -84,6 +91,7 @@ macro_rules! todo { } #[cfg(not(feature = "defmt"))] +#[collapse_debuginfo(yes)] macro_rules! unreachable { ($($x:tt)*) => { ::core::unreachable!($($x)*) @@ -91,12 +99,14 @@ macro_rules! unreachable { } #[cfg(feature = "defmt")] +#[collapse_debuginfo(yes)] macro_rules! unreachable { ($($x:tt)*) => { ::defmt::unreachable!($($x)*) }; } +#[collapse_debuginfo(yes)] macro_rules! panic { ($($x:tt)*) => { { @@ -108,6 +118,7 @@ macro_rules! panic { }; } +#[collapse_debuginfo(yes)] macro_rules! trace { ($s:literal $(, $x:expr)* $(,)?) => { { @@ -121,6 +132,7 @@ macro_rules! trace { }; } +#[collapse_debuginfo(yes)] macro_rules! debug { ($s:literal $(, $x:expr)* $(,)?) => { { @@ -134,6 +146,7 @@ macro_rules! debug { }; } +#[collapse_debuginfo(yes)] macro_rules! info { ($s:literal $(, $x:expr)* $(,)?) => { { @@ -147,6 +160,7 @@ macro_rules! info { }; } +#[collapse_debuginfo(yes)] macro_rules! warn { ($s:literal $(, $x:expr)* $(,)?) => { { @@ -160,6 +174,7 @@ macro_rules! warn { }; } +#[collapse_debuginfo(yes)] macro_rules! error { ($s:literal $(, $x:expr)* $(,)?) => { { @@ -174,6 +189,7 @@ macro_rules! error { } #[cfg(feature = "defmt")] +#[collapse_debuginfo(yes)] macro_rules! unwrap { ($($x:tt)*) => { ::defmt::unwrap!($($x)*) @@ -181,6 +197,7 @@ macro_rules! unwrap { } #[cfg(not(feature = "defmt"))] +#[collapse_debuginfo(yes)] macro_rules! unwrap { ($arg:expr) => { match $crate::fmt::Try::into_result($arg) { diff --git a/embassy-rp/src/fmt.rs b/embassy-rp/src/fmt.rs index 2ac42c557..35b929fde 100644 --- a/embassy-rp/src/fmt.rs +++ b/embassy-rp/src/fmt.rs @@ -6,6 +6,7 @@ use core::fmt::{Debug, Display, LowerHex}; #[cfg(all(feature = "defmt", feature = "log"))] compile_error!("You may not enable both `defmt` and `log` features."); +#[collapse_debuginfo(yes)] macro_rules! assert { ($($x:tt)*) => { { @@ -17,6 +18,7 @@ macro_rules! assert { }; } +#[collapse_debuginfo(yes)] macro_rules! assert_eq { ($($x:tt)*) => { { @@ -28,6 +30,7 @@ macro_rules! assert_eq { }; } +#[collapse_debuginfo(yes)] macro_rules! assert_ne { ($($x:tt)*) => { { @@ -39,6 +42,7 @@ macro_rules! assert_ne { }; } +#[collapse_debuginfo(yes)] macro_rules! debug_assert { ($($x:tt)*) => { { @@ -50,6 +54,7 @@ macro_rules! debug_assert { }; } +#[collapse_debuginfo(yes)] macro_rules! debug_assert_eq { ($($x:tt)*) => { { @@ -61,6 +66,7 @@ macro_rules! debug_assert_eq { }; } +#[collapse_debuginfo(yes)] macro_rules! debug_assert_ne { ($($x:tt)*) => { { @@ -72,6 +78,7 @@ macro_rules! debug_assert_ne { }; } +#[collapse_debuginfo(yes)] macro_rules! todo { ($($x:tt)*) => { { @@ -84,6 +91,7 @@ macro_rules! todo { } #[cfg(not(feature = "defmt"))] +#[collapse_debuginfo(yes)] macro_rules! unreachable { ($($x:tt)*) => { ::core::unreachable!($($x)*) @@ -91,12 +99,14 @@ macro_rules! unreachable { } #[cfg(feature = "defmt")] +#[collapse_debuginfo(yes)] macro_rules! unreachable { ($($x:tt)*) => { ::defmt::unreachable!($($x)*) }; } +#[collapse_debuginfo(yes)] macro_rules! panic { ($($x:tt)*) => { { @@ -108,6 +118,7 @@ macro_rules! panic { }; } +#[collapse_debuginfo(yes)] macro_rules! trace { ($s:literal $(, $x:expr)* $(,)?) => { { @@ -121,6 +132,7 @@ macro_rules! trace { }; } +#[collapse_debuginfo(yes)] macro_rules! debug { ($s:literal $(, $x:expr)* $(,)?) => { { @@ -134,6 +146,7 @@ macro_rules! debug { }; } +#[collapse_debuginfo(yes)] macro_rules! info { ($s:literal $(, $x:expr)* $(,)?) => { { @@ -147,6 +160,7 @@ macro_rules! info { }; } +#[collapse_debuginfo(yes)] macro_rules! warn { ($s:literal $(, $x:expr)* $(,)?) => { { @@ -160,6 +174,7 @@ macro_rules! warn { }; } +#[collapse_debuginfo(yes)] macro_rules! error { ($s:literal $(, $x:expr)* $(,)?) => { { @@ -174,6 +189,7 @@ macro_rules! error { } #[cfg(feature = "defmt")] +#[collapse_debuginfo(yes)] macro_rules! unwrap { ($($x:tt)*) => { ::defmt::unwrap!($($x)*) @@ -181,6 +197,7 @@ macro_rules! unwrap { } #[cfg(not(feature = "defmt"))] +#[collapse_debuginfo(yes)] macro_rules! unwrap { ($arg:expr) => { match $crate::fmt::Try::into_result($arg) { diff --git a/embassy-stm32-wpan/src/fmt.rs b/embassy-stm32-wpan/src/fmt.rs index 2ac42c557..35b929fde 100644 --- a/embassy-stm32-wpan/src/fmt.rs +++ b/embassy-stm32-wpan/src/fmt.rs @@ -6,6 +6,7 @@ use core::fmt::{Debug, Display, LowerHex}; #[cfg(all(feature = "defmt", feature = "log"))] compile_error!("You may not enable both `defmt` and `log` features."); +#[collapse_debuginfo(yes)] macro_rules! assert { ($($x:tt)*) => { { @@ -17,6 +18,7 @@ macro_rules! assert { }; } +#[collapse_debuginfo(yes)] macro_rules! assert_eq { ($($x:tt)*) => { { @@ -28,6 +30,7 @@ macro_rules! assert_eq { }; } +#[collapse_debuginfo(yes)] macro_rules! assert_ne { ($($x:tt)*) => { { @@ -39,6 +42,7 @@ macro_rules! assert_ne { }; } +#[collapse_debuginfo(yes)] macro_rules! debug_assert { ($($x:tt)*) => { { @@ -50,6 +54,7 @@ macro_rules! debug_assert { }; } +#[collapse_debuginfo(yes)] macro_rules! debug_assert_eq { ($($x:tt)*) => { { @@ -61,6 +66,7 @@ macro_rules! debug_assert_eq { }; } +#[collapse_debuginfo(yes)] macro_rules! debug_assert_ne { ($($x:tt)*) => { { @@ -72,6 +78,7 @@ macro_rules! debug_assert_ne { }; } +#[collapse_debuginfo(yes)] macro_rules! todo { ($($x:tt)*) => { { @@ -84,6 +91,7 @@ macro_rules! todo { } #[cfg(not(feature = "defmt"))] +#[collapse_debuginfo(yes)] macro_rules! unreachable { ($($x:tt)*) => { ::core::unreachable!($($x)*) @@ -91,12 +99,14 @@ macro_rules! unreachable { } #[cfg(feature = "defmt")] +#[collapse_debuginfo(yes)] macro_rules! unreachable { ($($x:tt)*) => { ::defmt::unreachable!($($x)*) }; } +#[collapse_debuginfo(yes)] macro_rules! panic { ($($x:tt)*) => { { @@ -108,6 +118,7 @@ macro_rules! panic { }; } +#[collapse_debuginfo(yes)] macro_rules! trace { ($s:literal $(, $x:expr)* $(,)?) => { { @@ -121,6 +132,7 @@ macro_rules! trace { }; } +#[collapse_debuginfo(yes)] macro_rules! debug { ($s:literal $(, $x:expr)* $(,)?) => { { @@ -134,6 +146,7 @@ macro_rules! debug { }; } +#[collapse_debuginfo(yes)] macro_rules! info { ($s:literal $(, $x:expr)* $(,)?) => { { @@ -147,6 +160,7 @@ macro_rules! info { }; } +#[collapse_debuginfo(yes)] macro_rules! warn { ($s:literal $(, $x:expr)* $(,)?) => { { @@ -160,6 +174,7 @@ macro_rules! warn { }; } +#[collapse_debuginfo(yes)] macro_rules! error { ($s:literal $(, $x:expr)* $(,)?) => { { @@ -174,6 +189,7 @@ macro_rules! error { } #[cfg(feature = "defmt")] +#[collapse_debuginfo(yes)] macro_rules! unwrap { ($($x:tt)*) => { ::defmt::unwrap!($($x)*) @@ -181,6 +197,7 @@ macro_rules! unwrap { } #[cfg(not(feature = "defmt"))] +#[collapse_debuginfo(yes)] macro_rules! unwrap { ($arg:expr) => { match $crate::fmt::Try::into_result($arg) { diff --git a/embassy-stm32/src/fmt.rs b/embassy-stm32/src/fmt.rs index 2ac42c557..35b929fde 100644 --- a/embassy-stm32/src/fmt.rs +++ b/embassy-stm32/src/fmt.rs @@ -6,6 +6,7 @@ use core::fmt::{Debug, Display, LowerHex}; #[cfg(all(feature = "defmt", feature = "log"))] compile_error!("You may not enable both `defmt` and `log` features."); +#[collapse_debuginfo(yes)] macro_rules! assert { ($($x:tt)*) => { { @@ -17,6 +18,7 @@ macro_rules! assert { }; } +#[collapse_debuginfo(yes)] macro_rules! assert_eq { ($($x:tt)*) => { { @@ -28,6 +30,7 @@ macro_rules! assert_eq { }; } +#[collapse_debuginfo(yes)] macro_rules! assert_ne { ($($x:tt)*) => { { @@ -39,6 +42,7 @@ macro_rules! assert_ne { }; } +#[collapse_debuginfo(yes)] macro_rules! debug_assert { ($($x:tt)*) => { { @@ -50,6 +54,7 @@ macro_rules! debug_assert { }; } +#[collapse_debuginfo(yes)] macro_rules! debug_assert_eq { ($($x:tt)*) => { { @@ -61,6 +66,7 @@ macro_rules! debug_assert_eq { }; } +#[collapse_debuginfo(yes)] macro_rules! debug_assert_ne { ($($x:tt)*) => { { @@ -72,6 +78,7 @@ macro_rules! debug_assert_ne { }; } +#[collapse_debuginfo(yes)] macro_rules! todo { ($($x:tt)*) => { { @@ -84,6 +91,7 @@ macro_rules! todo { } #[cfg(not(feature = "defmt"))] +#[collapse_debuginfo(yes)] macro_rules! unreachable { ($($x:tt)*) => { ::core::unreachable!($($x)*) @@ -91,12 +99,14 @@ macro_rules! unreachable { } #[cfg(feature = "defmt")] +#[collapse_debuginfo(yes)] macro_rules! unreachable { ($($x:tt)*) => { ::defmt::unreachable!($($x)*) }; } +#[collapse_debuginfo(yes)] macro_rules! panic { ($($x:tt)*) => { { @@ -108,6 +118,7 @@ macro_rules! panic { }; } +#[collapse_debuginfo(yes)] macro_rules! trace { ($s:literal $(, $x:expr)* $(,)?) => { { @@ -121,6 +132,7 @@ macro_rules! trace { }; } +#[collapse_debuginfo(yes)] macro_rules! debug { ($s:literal $(, $x:expr)* $(,)?) => { { @@ -134,6 +146,7 @@ macro_rules! debug { }; } +#[collapse_debuginfo(yes)] macro_rules! info { ($s:literal $(, $x:expr)* $(,)?) => { { @@ -147,6 +160,7 @@ macro_rules! info { }; } +#[collapse_debuginfo(yes)] macro_rules! warn { ($s:literal $(, $x:expr)* $(,)?) => { { @@ -160,6 +174,7 @@ macro_rules! warn { }; } +#[collapse_debuginfo(yes)] macro_rules! error { ($s:literal $(, $x:expr)* $(,)?) => { { @@ -174,6 +189,7 @@ macro_rules! error { } #[cfg(feature = "defmt")] +#[collapse_debuginfo(yes)] macro_rules! unwrap { ($($x:tt)*) => { ::defmt::unwrap!($($x)*) @@ -181,6 +197,7 @@ macro_rules! unwrap { } #[cfg(not(feature = "defmt"))] +#[collapse_debuginfo(yes)] macro_rules! unwrap { ($arg:expr) => { match $crate::fmt::Try::into_result($arg) { diff --git a/embassy-sync/src/fmt.rs b/embassy-sync/src/fmt.rs index 2ac42c557..35b929fde 100644 --- a/embassy-sync/src/fmt.rs +++ b/embassy-sync/src/fmt.rs @@ -6,6 +6,7 @@ use core::fmt::{Debug, Display, LowerHex}; #[cfg(all(feature = "defmt", feature = "log"))] compile_error!("You may not enable both `defmt` and `log` features."); +#[collapse_debuginfo(yes)] macro_rules! assert { ($($x:tt)*) => { { @@ -17,6 +18,7 @@ macro_rules! assert { }; } +#[collapse_debuginfo(yes)] macro_rules! assert_eq { ($($x:tt)*) => { { @@ -28,6 +30,7 @@ macro_rules! assert_eq { }; } +#[collapse_debuginfo(yes)] macro_rules! assert_ne { ($($x:tt)*) => { { @@ -39,6 +42,7 @@ macro_rules! assert_ne { }; } +#[collapse_debuginfo(yes)] macro_rules! debug_assert { ($($x:tt)*) => { { @@ -50,6 +54,7 @@ macro_rules! debug_assert { }; } +#[collapse_debuginfo(yes)] macro_rules! debug_assert_eq { ($($x:tt)*) => { { @@ -61,6 +66,7 @@ macro_rules! debug_assert_eq { }; } +#[collapse_debuginfo(yes)] macro_rules! debug_assert_ne { ($($x:tt)*) => { { @@ -72,6 +78,7 @@ macro_rules! debug_assert_ne { }; } +#[collapse_debuginfo(yes)] macro_rules! todo { ($($x:tt)*) => { { @@ -84,6 +91,7 @@ macro_rules! todo { } #[cfg(not(feature = "defmt"))] +#[collapse_debuginfo(yes)] macro_rules! unreachable { ($($x:tt)*) => { ::core::unreachable!($($x)*) @@ -91,12 +99,14 @@ macro_rules! unreachable { } #[cfg(feature = "defmt")] +#[collapse_debuginfo(yes)] macro_rules! unreachable { ($($x:tt)*) => { ::defmt::unreachable!($($x)*) }; } +#[collapse_debuginfo(yes)] macro_rules! panic { ($($x:tt)*) => { { @@ -108,6 +118,7 @@ macro_rules! panic { }; } +#[collapse_debuginfo(yes)] macro_rules! trace { ($s:literal $(, $x:expr)* $(,)?) => { { @@ -121,6 +132,7 @@ macro_rules! trace { }; } +#[collapse_debuginfo(yes)] macro_rules! debug { ($s:literal $(, $x:expr)* $(,)?) => { { @@ -134,6 +146,7 @@ macro_rules! debug { }; } +#[collapse_debuginfo(yes)] macro_rules! info { ($s:literal $(, $x:expr)* $(,)?) => { { @@ -147,6 +160,7 @@ macro_rules! info { }; } +#[collapse_debuginfo(yes)] macro_rules! warn { ($s:literal $(, $x:expr)* $(,)?) => { { @@ -160,6 +174,7 @@ macro_rules! warn { }; } +#[collapse_debuginfo(yes)] macro_rules! error { ($s:literal $(, $x:expr)* $(,)?) => { { @@ -174,6 +189,7 @@ macro_rules! error { } #[cfg(feature = "defmt")] +#[collapse_debuginfo(yes)] macro_rules! unwrap { ($($x:tt)*) => { ::defmt::unwrap!($($x)*) @@ -181,6 +197,7 @@ macro_rules! unwrap { } #[cfg(not(feature = "defmt"))] +#[collapse_debuginfo(yes)] macro_rules! unwrap { ($arg:expr) => { match $crate::fmt::Try::into_result($arg) { diff --git a/embassy-time/src/fmt.rs b/embassy-time/src/fmt.rs index 2ac42c557..35b929fde 100644 --- a/embassy-time/src/fmt.rs +++ b/embassy-time/src/fmt.rs @@ -6,6 +6,7 @@ use core::fmt::{Debug, Display, LowerHex}; #[cfg(all(feature = "defmt", feature = "log"))] compile_error!("You may not enable both `defmt` and `log` features."); +#[collapse_debuginfo(yes)] macro_rules! assert { ($($x:tt)*) => { { @@ -17,6 +18,7 @@ macro_rules! assert { }; } +#[collapse_debuginfo(yes)] macro_rules! assert_eq { ($($x:tt)*) => { { @@ -28,6 +30,7 @@ macro_rules! assert_eq { }; } +#[collapse_debuginfo(yes)] macro_rules! assert_ne { ($($x:tt)*) => { { @@ -39,6 +42,7 @@ macro_rules! assert_ne { }; } +#[collapse_debuginfo(yes)] macro_rules! debug_assert { ($($x:tt)*) => { { @@ -50,6 +54,7 @@ macro_rules! debug_assert { }; } +#[collapse_debuginfo(yes)] macro_rules! debug_assert_eq { ($($x:tt)*) => { { @@ -61,6 +66,7 @@ macro_rules! debug_assert_eq { }; } +#[collapse_debuginfo(yes)] macro_rules! debug_assert_ne { ($($x:tt)*) => { { @@ -72,6 +78,7 @@ macro_rules! debug_assert_ne { }; } +#[collapse_debuginfo(yes)] macro_rules! todo { ($($x:tt)*) => { { @@ -84,6 +91,7 @@ macro_rules! todo { } #[cfg(not(feature = "defmt"))] +#[collapse_debuginfo(yes)] macro_rules! unreachable { ($($x:tt)*) => { ::core::unreachable!($($x)*) @@ -91,12 +99,14 @@ macro_rules! unreachable { } #[cfg(feature = "defmt")] +#[collapse_debuginfo(yes)] macro_rules! unreachable { ($($x:tt)*) => { ::defmt::unreachable!($($x)*) }; } +#[collapse_debuginfo(yes)] macro_rules! panic { ($($x:tt)*) => { { @@ -108,6 +118,7 @@ macro_rules! panic { }; } +#[collapse_debuginfo(yes)] macro_rules! trace { ($s:literal $(, $x:expr)* $(,)?) => { { @@ -121,6 +132,7 @@ macro_rules! trace { }; } +#[collapse_debuginfo(yes)] macro_rules! debug { ($s:literal $(, $x:expr)* $(,)?) => { { @@ -134,6 +146,7 @@ macro_rules! debug { }; } +#[collapse_debuginfo(yes)] macro_rules! info { ($s:literal $(, $x:expr)* $(,)?) => { { @@ -147,6 +160,7 @@ macro_rules! info { }; } +#[collapse_debuginfo(yes)] macro_rules! warn { ($s:literal $(, $x:expr)* $(,)?) => { { @@ -160,6 +174,7 @@ macro_rules! warn { }; } +#[collapse_debuginfo(yes)] macro_rules! error { ($s:literal $(, $x:expr)* $(,)?) => { { @@ -174,6 +189,7 @@ macro_rules! error { } #[cfg(feature = "defmt")] +#[collapse_debuginfo(yes)] macro_rules! unwrap { ($($x:tt)*) => { ::defmt::unwrap!($($x)*) @@ -181,6 +197,7 @@ macro_rules! unwrap { } #[cfg(not(feature = "defmt"))] +#[collapse_debuginfo(yes)] macro_rules! unwrap { ($arg:expr) => { match $crate::fmt::Try::into_result($arg) { diff --git a/embassy-usb-dfu/src/fmt.rs b/embassy-usb-dfu/src/fmt.rs index 2ac42c557..35b929fde 100644 --- a/embassy-usb-dfu/src/fmt.rs +++ b/embassy-usb-dfu/src/fmt.rs @@ -6,6 +6,7 @@ use core::fmt::{Debug, Display, LowerHex}; #[cfg(all(feature = "defmt", feature = "log"))] compile_error!("You may not enable both `defmt` and `log` features."); +#[collapse_debuginfo(yes)] macro_rules! assert { ($($x:tt)*) => { { @@ -17,6 +18,7 @@ macro_rules! assert { }; } +#[collapse_debuginfo(yes)] macro_rules! assert_eq { ($($x:tt)*) => { { @@ -28,6 +30,7 @@ macro_rules! assert_eq { }; } +#[collapse_debuginfo(yes)] macro_rules! assert_ne { ($($x:tt)*) => { { @@ -39,6 +42,7 @@ macro_rules! assert_ne { }; } +#[collapse_debuginfo(yes)] macro_rules! debug_assert { ($($x:tt)*) => { { @@ -50,6 +54,7 @@ macro_rules! debug_assert { }; } +#[collapse_debuginfo(yes)] macro_rules! debug_assert_eq { ($($x:tt)*) => { { @@ -61,6 +66,7 @@ macro_rules! debug_assert_eq { }; } +#[collapse_debuginfo(yes)] macro_rules! debug_assert_ne { ($($x:tt)*) => { { @@ -72,6 +78,7 @@ macro_rules! debug_assert_ne { }; } +#[collapse_debuginfo(yes)] macro_rules! todo { ($($x:tt)*) => { { @@ -84,6 +91,7 @@ macro_rules! todo { } #[cfg(not(feature = "defmt"))] +#[collapse_debuginfo(yes)] macro_rules! unreachable { ($($x:tt)*) => { ::core::unreachable!($($x)*) @@ -91,12 +99,14 @@ macro_rules! unreachable { } #[cfg(feature = "defmt")] +#[collapse_debuginfo(yes)] macro_rules! unreachable { ($($x:tt)*) => { ::defmt::unreachable!($($x)*) }; } +#[collapse_debuginfo(yes)] macro_rules! panic { ($($x:tt)*) => { { @@ -108,6 +118,7 @@ macro_rules! panic { }; } +#[collapse_debuginfo(yes)] macro_rules! trace { ($s:literal $(, $x:expr)* $(,)?) => { { @@ -121,6 +132,7 @@ macro_rules! trace { }; } +#[collapse_debuginfo(yes)] macro_rules! debug { ($s:literal $(, $x:expr)* $(,)?) => { { @@ -134,6 +146,7 @@ macro_rules! debug { }; } +#[collapse_debuginfo(yes)] macro_rules! info { ($s:literal $(, $x:expr)* $(,)?) => { { @@ -147,6 +160,7 @@ macro_rules! info { }; } +#[collapse_debuginfo(yes)] macro_rules! warn { ($s:literal $(, $x:expr)* $(,)?) => { { @@ -160,6 +174,7 @@ macro_rules! warn { }; } +#[collapse_debuginfo(yes)] macro_rules! error { ($s:literal $(, $x:expr)* $(,)?) => { { @@ -174,6 +189,7 @@ macro_rules! error { } #[cfg(feature = "defmt")] +#[collapse_debuginfo(yes)] macro_rules! unwrap { ($($x:tt)*) => { ::defmt::unwrap!($($x)*) @@ -181,6 +197,7 @@ macro_rules! unwrap { } #[cfg(not(feature = "defmt"))] +#[collapse_debuginfo(yes)] macro_rules! unwrap { ($arg:expr) => { match $crate::fmt::Try::into_result($arg) { diff --git a/embassy-usb-synopsys-otg/src/fmt.rs b/embassy-usb-synopsys-otg/src/fmt.rs index 2ac42c557..35b929fde 100644 --- a/embassy-usb-synopsys-otg/src/fmt.rs +++ b/embassy-usb-synopsys-otg/src/fmt.rs @@ -6,6 +6,7 @@ use core::fmt::{Debug, Display, LowerHex}; #[cfg(all(feature = "defmt", feature = "log"))] compile_error!("You may not enable both `defmt` and `log` features."); +#[collapse_debuginfo(yes)] macro_rules! assert { ($($x:tt)*) => { { @@ -17,6 +18,7 @@ macro_rules! assert { }; } +#[collapse_debuginfo(yes)] macro_rules! assert_eq { ($($x:tt)*) => { { @@ -28,6 +30,7 @@ macro_rules! assert_eq { }; } +#[collapse_debuginfo(yes)] macro_rules! assert_ne { ($($x:tt)*) => { { @@ -39,6 +42,7 @@ macro_rules! assert_ne { }; } +#[collapse_debuginfo(yes)] macro_rules! debug_assert { ($($x:tt)*) => { { @@ -50,6 +54,7 @@ macro_rules! debug_assert { }; } +#[collapse_debuginfo(yes)] macro_rules! debug_assert_eq { ($($x:tt)*) => { { @@ -61,6 +66,7 @@ macro_rules! debug_assert_eq { }; } +#[collapse_debuginfo(yes)] macro_rules! debug_assert_ne { ($($x:tt)*) => { { @@ -72,6 +78,7 @@ macro_rules! debug_assert_ne { }; } +#[collapse_debuginfo(yes)] macro_rules! todo { ($($x:tt)*) => { { @@ -84,6 +91,7 @@ macro_rules! todo { } #[cfg(not(feature = "defmt"))] +#[collapse_debuginfo(yes)] macro_rules! unreachable { ($($x:tt)*) => { ::core::unreachable!($($x)*) @@ -91,12 +99,14 @@ macro_rules! unreachable { } #[cfg(feature = "defmt")] +#[collapse_debuginfo(yes)] macro_rules! unreachable { ($($x:tt)*) => { ::defmt::unreachable!($($x)*) }; } +#[collapse_debuginfo(yes)] macro_rules! panic { ($($x:tt)*) => { { @@ -108,6 +118,7 @@ macro_rules! panic { }; } +#[collapse_debuginfo(yes)] macro_rules! trace { ($s:literal $(, $x:expr)* $(,)?) => { { @@ -121,6 +132,7 @@ macro_rules! trace { }; } +#[collapse_debuginfo(yes)] macro_rules! debug { ($s:literal $(, $x:expr)* $(,)?) => { { @@ -134,6 +146,7 @@ macro_rules! debug { }; } +#[collapse_debuginfo(yes)] macro_rules! info { ($s:literal $(, $x:expr)* $(,)?) => { { @@ -147,6 +160,7 @@ macro_rules! info { }; } +#[collapse_debuginfo(yes)] macro_rules! warn { ($s:literal $(, $x:expr)* $(,)?) => { { @@ -160,6 +174,7 @@ macro_rules! warn { }; } +#[collapse_debuginfo(yes)] macro_rules! error { ($s:literal $(, $x:expr)* $(,)?) => { { @@ -174,6 +189,7 @@ macro_rules! error { } #[cfg(feature = "defmt")] +#[collapse_debuginfo(yes)] macro_rules! unwrap { ($($x:tt)*) => { ::defmt::unwrap!($($x)*) @@ -181,6 +197,7 @@ macro_rules! unwrap { } #[cfg(not(feature = "defmt"))] +#[collapse_debuginfo(yes)] macro_rules! unwrap { ($arg:expr) => { match $crate::fmt::Try::into_result($arg) { diff --git a/embassy-usb/src/fmt.rs b/embassy-usb/src/fmt.rs index 2ac42c557..35b929fde 100644 --- a/embassy-usb/src/fmt.rs +++ b/embassy-usb/src/fmt.rs @@ -6,6 +6,7 @@ use core::fmt::{Debug, Display, LowerHex}; #[cfg(all(feature = "defmt", feature = "log"))] compile_error!("You may not enable both `defmt` and `log` features."); +#[collapse_debuginfo(yes)] macro_rules! assert { ($($x:tt)*) => { { @@ -17,6 +18,7 @@ macro_rules! assert { }; } +#[collapse_debuginfo(yes)] macro_rules! assert_eq { ($($x:tt)*) => { { @@ -28,6 +30,7 @@ macro_rules! assert_eq { }; } +#[collapse_debuginfo(yes)] macro_rules! assert_ne { ($($x:tt)*) => { { @@ -39,6 +42,7 @@ macro_rules! assert_ne { }; } +#[collapse_debuginfo(yes)] macro_rules! debug_assert { ($($x:tt)*) => { { @@ -50,6 +54,7 @@ macro_rules! debug_assert { }; } +#[collapse_debuginfo(yes)] macro_rules! debug_assert_eq { ($($x:tt)*) => { { @@ -61,6 +66,7 @@ macro_rules! debug_assert_eq { }; } +#[collapse_debuginfo(yes)] macro_rules! debug_assert_ne { ($($x:tt)*) => { { @@ -72,6 +78,7 @@ macro_rules! debug_assert_ne { }; } +#[collapse_debuginfo(yes)] macro_rules! todo { ($($x:tt)*) => { { @@ -84,6 +91,7 @@ macro_rules! todo { } #[cfg(not(feature = "defmt"))] +#[collapse_debuginfo(yes)] macro_rules! unreachable { ($($x:tt)*) => { ::core::unreachable!($($x)*) @@ -91,12 +99,14 @@ macro_rules! unreachable { } #[cfg(feature = "defmt")] +#[collapse_debuginfo(yes)] macro_rules! unreachable { ($($x:tt)*) => { ::defmt::unreachable!($($x)*) }; } +#[collapse_debuginfo(yes)] macro_rules! panic { ($($x:tt)*) => { { @@ -108,6 +118,7 @@ macro_rules! panic { }; } +#[collapse_debuginfo(yes)] macro_rules! trace { ($s:literal $(, $x:expr)* $(,)?) => { { @@ -121,6 +132,7 @@ macro_rules! trace { }; } +#[collapse_debuginfo(yes)] macro_rules! debug { ($s:literal $(, $x:expr)* $(,)?) => { { @@ -134,6 +146,7 @@ macro_rules! debug { }; } +#[collapse_debuginfo(yes)] macro_rules! info { ($s:literal $(, $x:expr)* $(,)?) => { { @@ -147,6 +160,7 @@ macro_rules! info { }; } +#[collapse_debuginfo(yes)] macro_rules! warn { ($s:literal $(, $x:expr)* $(,)?) => { { @@ -160,6 +174,7 @@ macro_rules! warn { }; } +#[collapse_debuginfo(yes)] macro_rules! error { ($s:literal $(, $x:expr)* $(,)?) => { { @@ -174,6 +189,7 @@ macro_rules! error { } #[cfg(feature = "defmt")] +#[collapse_debuginfo(yes)] macro_rules! unwrap { ($($x:tt)*) => { ::defmt::unwrap!($($x)*) @@ -181,6 +197,7 @@ macro_rules! unwrap { } #[cfg(not(feature = "defmt"))] +#[collapse_debuginfo(yes)] macro_rules! unwrap { ($arg:expr) => { match $crate::fmt::Try::into_result($arg) { From 478cbc6a411e3a64c97772727a7331e0f44705ea Mon Sep 17 00:00:00 2001 From: Fan Jiang Date: Mon, 17 Jun 2024 14:09:53 -0400 Subject: [PATCH 492/581] Update Cargo.toml to latest `stm32-metapac` --- embassy-stm32/Cargo.toml | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/embassy-stm32/Cargo.toml b/embassy-stm32/Cargo.toml index f7f4ce6eb..77b517dba 100644 --- a/embassy-stm32/Cargo.toml +++ b/embassy-stm32/Cargo.toml @@ -72,7 +72,7 @@ rand_core = "0.6.3" sdio-host = "0.5.0" critical-section = "1.1" #stm32-metapac = { version = "15" } -stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-6bd87f176a6c125dca4aa73328d1179a67601039" } +stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-a8ab0a3421ed0ca4b282f54028a0a2decacd8631" } vcell = "0.1.3" nb = "1.0.0" @@ -97,7 +97,7 @@ proc-macro2 = "1.0.36" quote = "1.0.15" #stm32-metapac = { version = "15", default-features = false, features = ["metadata"]} -stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-6bd87f176a6c125dca4aa73328d1179a67601039", default-features = false, features = ["metadata"] } +stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-a8ab0a3421ed0ca4b282f54028a0a2decacd8631", default-features = false, features = ["metadata"] } [features] default = ["rt"] From bbe8d3d38a03c66b9c8e2bb70ae067f8ad674059 Mon Sep 17 00:00:00 2001 From: Chen Yuheng <1016867898@qq.com> Date: Tue, 18 Jun 2024 17:01:37 +0800 Subject: [PATCH 493/581] Add stm32g0 examples --- examples/stm32g0/Cargo.toml | 2 ++ examples/stm32g0/src/bin/adc.rs | 34 ++++++++++++++++++++++ examples/stm32g0/src/bin/rtc.rs | 31 ++++++++++++++++++++ examples/stm32g0/src/bin/usart.rs | 25 ++++++++++++++++ examples/stm32g0/src/bin/usart_buffered.rs | 34 ++++++++++++++++++++++ examples/stm32g0/src/bin/usart_dma.rs | 27 +++++++++++++++++ 6 files changed, 153 insertions(+) create mode 100644 examples/stm32g0/src/bin/adc.rs create mode 100644 examples/stm32g0/src/bin/rtc.rs create mode 100644 examples/stm32g0/src/bin/usart.rs create mode 100644 examples/stm32g0/src/bin/usart_buffered.rs create mode 100644 examples/stm32g0/src/bin/usart_dma.rs diff --git a/examples/stm32g0/Cargo.toml b/examples/stm32g0/Cargo.toml index 15e58d5d1..b9d710ca7 100644 --- a/examples/stm32g0/Cargo.toml +++ b/examples/stm32g0/Cargo.toml @@ -23,5 +23,7 @@ panic-probe = { version = "0.3", features = ["print-defmt"] } heapless = { version = "0.8", default-features = false } portable-atomic = { version = "1.5", features = ["unsafe-assume-single-core"] } +embedded-io-async = { version = "0.6.1" } + [profile.release] debug = 2 diff --git a/examples/stm32g0/src/bin/adc.rs b/examples/stm32g0/src/bin/adc.rs new file mode 100644 index 000000000..a35119e3d --- /dev/null +++ b/examples/stm32g0/src/bin/adc.rs @@ -0,0 +1,34 @@ +#![no_std] +#![no_main] + +use defmt::*; +use embassy_executor::Spawner; +use embassy_stm32::adc::{Adc, SampleTime}; +use embassy_time::Timer; +use {defmt_rtt as _, panic_probe as _}; + +#[embassy_executor::main] +async fn main(_spawner: Spawner) { + let p = embassy_stm32::init(Default::default()); + info!("Hello World!"); + + let mut adc = Adc::new(p.ADC1); + adc.set_sample_time(SampleTime::CYCLES79_5); + let mut pin = p.PA1; + + let mut vrefint = adc.enable_vrefint(); + let vrefint_sample = adc.read(&mut vrefint); + let convert_to_millivolts = |sample| { + // From https://www.st.com/resource/en/datasheet/stm32g031g8.pdf + // 6.3.3 Embedded internal reference voltage + const VREFINT_MV: u32 = 1212; // mV + + (u32::from(sample) * VREFINT_MV / u32::from(vrefint_sample)) as u16 + }; + + loop { + let v = adc.read(&mut pin); + info!("--> {} - {} mV", v, convert_to_millivolts(v)); + Timer::after_millis(100).await; + } +} diff --git a/examples/stm32g0/src/bin/rtc.rs b/examples/stm32g0/src/bin/rtc.rs new file mode 100644 index 000000000..c02c1ecd7 --- /dev/null +++ b/examples/stm32g0/src/bin/rtc.rs @@ -0,0 +1,31 @@ +#![no_std] +#![no_main] + +use defmt::*; +use embassy_executor::Spawner; +use embassy_stm32::rtc::{DateTime, DayOfWeek, Rtc, RtcConfig}; +use embassy_stm32::Config; +use embassy_time::Timer; +use {defmt_rtt as _, panic_probe as _}; + +#[embassy_executor::main] +async fn main(_spawner: Spawner) { + let config = Config::default(); + let p = embassy_stm32::init(config); + + info!("Hello World!"); + + let now = DateTime::from(2023, 6, 14, DayOfWeek::Friday, 15, 59, 10); + + let mut rtc = Rtc::new(p.RTC, RtcConfig::default()); + + rtc.set_datetime(now.unwrap()).expect("datetime not set"); + + loop { + let now: DateTime = rtc.now().unwrap().into(); + + info!("{}:{}:{}", now.hour(), now.minute(), now.second()); + + Timer::after_millis(1000).await; + } +} diff --git a/examples/stm32g0/src/bin/usart.rs b/examples/stm32g0/src/bin/usart.rs new file mode 100644 index 000000000..037a5c833 --- /dev/null +++ b/examples/stm32g0/src/bin/usart.rs @@ -0,0 +1,25 @@ +#![no_std] +#![no_main] + +use defmt::*; +use embassy_stm32::usart::{Config, Uart}; +use {defmt_rtt as _, panic_probe as _}; + +#[cortex_m_rt::entry] +fn main() -> ! { + info!("Hello World!"); + + let p = embassy_stm32::init(Default::default()); + + let config = Config::default(); + let mut usart = Uart::new_blocking(p.USART2, p.PA3, p.PA2, config).unwrap(); + + unwrap!(usart.blocking_write(b"Hello Embassy World!\r\n")); + info!("wrote Hello, starting echo"); + + let mut buf = [0u8; 1]; + loop { + unwrap!(usart.blocking_read(&mut buf)); + unwrap!(usart.blocking_write(&buf)); + } +} diff --git a/examples/stm32g0/src/bin/usart_buffered.rs b/examples/stm32g0/src/bin/usart_buffered.rs new file mode 100644 index 000000000..c097a0c5a --- /dev/null +++ b/examples/stm32g0/src/bin/usart_buffered.rs @@ -0,0 +1,34 @@ +#![no_std] +#![no_main] + +use defmt::*; +use embassy_executor::Spawner; +use embassy_stm32::usart::{BufferedUart, Config}; +use embassy_stm32::{bind_interrupts, peripherals, usart}; +use embedded_io_async::{Read, Write}; +use {defmt_rtt as _, panic_probe as _}; + +bind_interrupts!(struct Irqs { + USART1 => usart::BufferedInterruptHandler; +}); + +#[embassy_executor::main] +async fn main(_spawner: Spawner) { + let p = embassy_stm32::init(Default::default()); + info!("Hi!"); + + let mut config = Config::default(); + config.baudrate = 115200; + let mut tx_buf = [0u8; 256]; + let mut rx_buf = [0u8; 256]; + let mut usart = BufferedUart::new(p.USART1, Irqs, p.PB7, p.PB6, &mut tx_buf, &mut rx_buf, config).unwrap(); + + usart.write_all(b"Hello Embassy World!\r\n").await.unwrap(); + info!("wrote Hello, starting echo"); + + let mut buf = [0; 4]; + loop { + usart.read_exact(&mut buf[..]).await.unwrap(); + usart.write_all(&buf[..]).await.unwrap(); + } +} diff --git a/examples/stm32g0/src/bin/usart_dma.rs b/examples/stm32g0/src/bin/usart_dma.rs new file mode 100644 index 000000000..8212153ab --- /dev/null +++ b/examples/stm32g0/src/bin/usart_dma.rs @@ -0,0 +1,27 @@ +#![no_std] +#![no_main] + +use defmt::*; +use embassy_executor::Spawner; +use embassy_stm32::usart::{Config, Uart}; +use embassy_stm32::{bind_interrupts, peripherals, usart}; +use {defmt_rtt as _, panic_probe as _}; + +bind_interrupts!(struct Irqs { + USART1 => usart::InterruptHandler; +}); + +#[embassy_executor::main] +async fn main(_spawner: Spawner) { + let p = embassy_stm32::init(Default::default()); + let mut usart = Uart::new(p.USART1, p.PB7, p.PB6, Irqs, p.DMA1_CH2, p.DMA1_CH3, Config::default()).unwrap(); + + usart.write(b"Hello Embassy World!\r\n").await.unwrap(); + info!("wrote Hello, starting echo"); + + let mut buf = [0; 5]; + loop { + usart.read(&mut buf[..]).await.unwrap(); + usart.write(&buf[..]).await.unwrap(); + } +} From a44ee963ef65be41a9354b4e7e70b02d30fadd70 Mon Sep 17 00:00:00 2001 From: Ulf Lilleengen Date: Tue, 18 Jun 2024 13:00:28 +0200 Subject: [PATCH 494/581] add HAL and example for using nRF EGU peripheral --- embassy-nrf/src/chips/nrf52805.rs | 7 ++ embassy-nrf/src/chips/nrf52810.rs | 7 ++ embassy-nrf/src/chips/nrf52811.rs | 7 ++ embassy-nrf/src/chips/nrf52820.rs | 15 ++++ embassy-nrf/src/chips/nrf52832.rs | 15 ++++ embassy-nrf/src/chips/nrf52833.rs | 15 ++++ embassy-nrf/src/chips/nrf52840.rs | 15 ++++ embassy-nrf/src/chips/nrf5340_app.rs | 15 ++++ embassy-nrf/src/chips/nrf5340_net.rs | 5 ++ embassy-nrf/src/chips/nrf9160.rs | 15 ++++ embassy-nrf/src/egu.rs | 103 +++++++++++++++++++++++++++ embassy-nrf/src/lib.rs | 2 + examples/nrf52840/src/bin/egu.rs | 55 ++++++++++++++ 13 files changed, 276 insertions(+) create mode 100644 embassy-nrf/src/egu.rs create mode 100644 examples/nrf52840/src/bin/egu.rs diff --git a/embassy-nrf/src/chips/nrf52805.rs b/embassy-nrf/src/chips/nrf52805.rs index 14c3f9b1a..b51b0c93e 100644 --- a/embassy-nrf/src/chips/nrf52805.rs +++ b/embassy-nrf/src/chips/nrf52805.rs @@ -132,6 +132,10 @@ embassy_hal_internal::peripherals! { // Radio RADIO, + + // EGU + EGU0, + EGU1, } impl_uarte!(UARTE0, UARTE0, UARTE0_UART0); @@ -214,6 +218,9 @@ impl_saadc_input!(P0_05, ANALOG_INPUT3); impl_radio!(RADIO, RADIO, RADIO); +impl_egu!(EGU0, EGU0, SWI0_EGU0); +impl_egu!(EGU1, EGU1, SWI1_EGU1); + embassy_hal_internal::interrupt_mod!( POWER_CLOCK, RADIO, diff --git a/embassy-nrf/src/chips/nrf52810.rs b/embassy-nrf/src/chips/nrf52810.rs index c607586db..273098d9b 100644 --- a/embassy-nrf/src/chips/nrf52810.rs +++ b/embassy-nrf/src/chips/nrf52810.rs @@ -138,6 +138,10 @@ embassy_hal_internal::peripherals! { // Radio RADIO, + + // EGU + EGU0, + EGU1, } impl_uarte!(UARTE0, UARTE0, UARTE0_UART0); @@ -240,6 +244,9 @@ impl_saadc_input!(P0_31, ANALOG_INPUT7); impl_radio!(RADIO, RADIO, RADIO); +impl_egu!(EGU0, EGU0, SWI0_EGU0); +impl_egu!(EGU1, EGU1, SWI1_EGU1); + embassy_hal_internal::interrupt_mod!( POWER_CLOCK, RADIO, diff --git a/embassy-nrf/src/chips/nrf52811.rs b/embassy-nrf/src/chips/nrf52811.rs index 5f70365b4..9bce38636 100644 --- a/embassy-nrf/src/chips/nrf52811.rs +++ b/embassy-nrf/src/chips/nrf52811.rs @@ -138,6 +138,10 @@ embassy_hal_internal::peripherals! { // Radio RADIO, + + // EGU + EGU0, + EGU1, } impl_uarte!(UARTE0, UARTE0, UARTE0_UART0); @@ -242,6 +246,9 @@ impl_saadc_input!(P0_31, ANALOG_INPUT7); impl_radio!(RADIO, RADIO, RADIO); +impl_egu!(EGU0, EGU0, SWI0_EGU0); +impl_egu!(EGU1, EGU1, SWI1_EGU1); + embassy_hal_internal::interrupt_mod!( POWER_CLOCK, RADIO, diff --git a/embassy-nrf/src/chips/nrf52820.rs b/embassy-nrf/src/chips/nrf52820.rs index 82d097407..2acae2c8f 100644 --- a/embassy-nrf/src/chips/nrf52820.rs +++ b/embassy-nrf/src/chips/nrf52820.rs @@ -133,6 +133,14 @@ embassy_hal_internal::peripherals! { // Radio RADIO, + + // EGU + EGU0, + EGU1, + EGU2, + EGU3, + EGU4, + EGU5, } impl_usb!(USBD, USBD, USBD); @@ -229,6 +237,13 @@ impl_ppi_channel!(PPI_CH31, 31 => static); impl_radio!(RADIO, RADIO, RADIO); +impl_egu!(EGU0, EGU0, SWI0_EGU0); +impl_egu!(EGU1, EGU1, SWI1_EGU1); +impl_egu!(EGU2, EGU2, SWI2_EGU2); +impl_egu!(EGU3, EGU3, SWI3_EGU3); +impl_egu!(EGU4, EGU4, SWI4_EGU4); +impl_egu!(EGU5, EGU5, SWI5_EGU5); + embassy_hal_internal::interrupt_mod!( POWER_CLOCK, RADIO, diff --git a/embassy-nrf/src/chips/nrf52832.rs b/embassy-nrf/src/chips/nrf52832.rs index 67b32fe5f..94b373ab3 100644 --- a/embassy-nrf/src/chips/nrf52832.rs +++ b/embassy-nrf/src/chips/nrf52832.rs @@ -153,6 +153,14 @@ embassy_hal_internal::peripherals! { // Radio RADIO, + + // EGU + EGU0, + EGU1, + EGU2, + EGU3, + EGU4, + EGU5, } impl_uarte!(UARTE0, UARTE0, UARTE0_UART0); @@ -269,6 +277,13 @@ impl_i2s!(I2S, I2S, I2S); impl_radio!(RADIO, RADIO, RADIO); +impl_egu!(EGU0, EGU0, SWI0_EGU0); +impl_egu!(EGU1, EGU1, SWI1_EGU1); +impl_egu!(EGU2, EGU2, SWI2_EGU2); +impl_egu!(EGU3, EGU3, SWI3_EGU3); +impl_egu!(EGU4, EGU4, SWI4_EGU4); +impl_egu!(EGU5, EGU5, SWI5_EGU5); + embassy_hal_internal::interrupt_mod!( POWER_CLOCK, RADIO, diff --git a/embassy-nrf/src/chips/nrf52833.rs b/embassy-nrf/src/chips/nrf52833.rs index 20f14e2d6..09cde1ac1 100644 --- a/embassy-nrf/src/chips/nrf52833.rs +++ b/embassy-nrf/src/chips/nrf52833.rs @@ -173,6 +173,14 @@ embassy_hal_internal::peripherals! { // Radio RADIO, + + // EGU + EGU0, + EGU1, + EGU2, + EGU3, + EGU4, + EGU5, } impl_usb!(USBD, USBD, USBD); @@ -311,6 +319,13 @@ impl_i2s!(I2S, I2S, I2S); impl_radio!(RADIO, RADIO, RADIO); +impl_egu!(EGU0, EGU0, SWI0_EGU0); +impl_egu!(EGU1, EGU1, SWI1_EGU1); +impl_egu!(EGU2, EGU2, SWI2_EGU2); +impl_egu!(EGU3, EGU3, SWI3_EGU3); +impl_egu!(EGU4, EGU4, SWI4_EGU4); +impl_egu!(EGU5, EGU5, SWI5_EGU5); + embassy_hal_internal::interrupt_mod!( POWER_CLOCK, RADIO, diff --git a/embassy-nrf/src/chips/nrf52840.rs b/embassy-nrf/src/chips/nrf52840.rs index d3272b2e8..0f3d1b250 100644 --- a/embassy-nrf/src/chips/nrf52840.rs +++ b/embassy-nrf/src/chips/nrf52840.rs @@ -176,6 +176,14 @@ embassy_hal_internal::peripherals! { // Radio RADIO, + + // EGU + EGU0, + EGU1, + EGU2, + EGU3, + EGU4, + EGU5, } impl_usb!(USBD, USBD, USBD); @@ -316,6 +324,13 @@ impl_i2s!(I2S, I2S, I2S); impl_radio!(RADIO, RADIO, RADIO); +impl_egu!(EGU0, EGU0, SWI0_EGU0); +impl_egu!(EGU1, EGU1, SWI1_EGU1); +impl_egu!(EGU2, EGU2, SWI2_EGU2); +impl_egu!(EGU3, EGU3, SWI3_EGU3); +impl_egu!(EGU4, EGU4, SWI4_EGU4); +impl_egu!(EGU5, EGU5, SWI5_EGU5); + embassy_hal_internal::interrupt_mod!( POWER_CLOCK, RADIO, diff --git a/embassy-nrf/src/chips/nrf5340_app.rs b/embassy-nrf/src/chips/nrf5340_app.rs index 62c74bb6f..584f6e43c 100644 --- a/embassy-nrf/src/chips/nrf5340_app.rs +++ b/embassy-nrf/src/chips/nrf5340_app.rs @@ -380,6 +380,14 @@ embassy_hal_internal::peripherals! { P1_13, P1_14, P1_15, + + // EGU + EGU0, + EGU1, + EGU2, + EGU3, + EGU4, + EGU5, } impl_usb!(USBD, USBD, USBD); @@ -519,6 +527,13 @@ impl_saadc_input!(P0_18, ANALOG_INPUT5); impl_saadc_input!(P0_19, ANALOG_INPUT6); impl_saadc_input!(P0_20, ANALOG_INPUT7); +impl_egu!(EGU0, EGU0, EGU0); +impl_egu!(EGU1, EGU1, EGU1); +impl_egu!(EGU2, EGU2, EGU2); +impl_egu!(EGU3, EGU3, EGU3); +impl_egu!(EGU4, EGU4, EGU4); +impl_egu!(EGU5, EGU5, EGU5); + embassy_hal_internal::interrupt_mod!( FPU, CACHE, diff --git a/embassy-nrf/src/chips/nrf5340_net.rs b/embassy-nrf/src/chips/nrf5340_net.rs index 65e8f9653..d772c9a49 100644 --- a/embassy-nrf/src/chips/nrf5340_net.rs +++ b/embassy-nrf/src/chips/nrf5340_net.rs @@ -251,6 +251,9 @@ embassy_hal_internal::peripherals! { // Radio RADIO, + + // EGU + EGU0, } impl_uarte!(SERIAL0, UARTE0, SERIAL0); @@ -350,6 +353,8 @@ impl_ppi_channel!(PPI_CH31, 31 => configurable); impl_radio!(RADIO, RADIO, RADIO); +impl_egu!(EGU0, EGU0, EGU0); + embassy_hal_internal::interrupt_mod!( CLOCK_POWER, RADIO, diff --git a/embassy-nrf/src/chips/nrf9160.rs b/embassy-nrf/src/chips/nrf9160.rs index 8b1356ef8..8107ca175 100644 --- a/embassy-nrf/src/chips/nrf9160.rs +++ b/embassy-nrf/src/chips/nrf9160.rs @@ -283,6 +283,14 @@ embassy_hal_internal::peripherals! { // PDM PDM, + + // EGU + EGU0, + EGU1, + EGU2, + EGU3, + EGU4, + EGU5, } impl_uarte!(SERIAL0, UARTE0, UARTE0_SPIM0_SPIS0_TWIM0_TWIS0); @@ -380,6 +388,13 @@ impl_saadc_input!(P0_18, ANALOG_INPUT5); impl_saadc_input!(P0_19, ANALOG_INPUT6); impl_saadc_input!(P0_20, ANALOG_INPUT7); +impl_egu!(EGU0, EGU0, EGU0); +impl_egu!(EGU1, EGU1, EGU1); +impl_egu!(EGU2, EGU2, EGU2); +impl_egu!(EGU3, EGU3, EGU3); +impl_egu!(EGU4, EGU4, EGU4); +impl_egu!(EGU5, EGU5, EGU5); + embassy_hal_internal::interrupt_mod!( SPU, CLOCK_POWER, diff --git a/embassy-nrf/src/egu.rs b/embassy-nrf/src/egu.rs new file mode 100644 index 000000000..c0cde8330 --- /dev/null +++ b/embassy-nrf/src/egu.rs @@ -0,0 +1,103 @@ +//! EGU driver. +//! +//! The event generator driver provides a higher level API for task triggering +//! and events to use with PPI. + +#![macro_use] + +use core::marker::PhantomData; + +use embassy_hal_internal::into_ref; + +use crate::ppi::{Event, Task}; +use crate::{interrupt, pac, Peripheral, PeripheralRef}; + +/// An instance of the EGU. +pub struct Egu<'d, T: Instance> { + _p: PeripheralRef<'d, T>, +} + +impl<'d, T: Instance> Egu<'d, T> { + /// Create a new EGU instance. + pub fn new(_p: impl Peripheral

+ 'd) -> Self { + into_ref!(_p); + Self { _p } + } + + /// Get a handle to a trigger for the EGU. + pub fn trigger(&mut self, number: TriggerNumber) -> Trigger<'d, T> { + Trigger { + number, + _p: PhantomData, + } + } +} + +pub(crate) trait SealedInstance { + fn regs() -> &'static pac::egu0::RegisterBlock; +} + +/// Basic Egu instance. +#[allow(private_bounds)] +pub trait Instance: Peripheral

+ SealedInstance + 'static + Send { + /// Interrupt for this peripheral. + type Interrupt: interrupt::typelevel::Interrupt; +} + +macro_rules! impl_egu { + ($type:ident, $pac_type:ident, $irq:ident) => { + impl crate::egu::SealedInstance for peripherals::$type { + fn regs() -> &'static pac::egu0::RegisterBlock { + unsafe { &*pac::$pac_type::ptr() } + } + } + impl crate::egu::Instance for peripherals::$type { + type Interrupt = crate::interrupt::typelevel::$irq; + } + }; +} + +/// Represents a trigger within the EGU. +pub struct Trigger<'d, T: Instance> { + number: TriggerNumber, + _p: PhantomData<&'d T>, +} + +impl<'d, T: Instance> Trigger<'d, T> { + /// Get task for this trigger to use with PPI. + pub fn task(&self) -> Task<'d> { + let nr = self.number as usize; + let regs = T::regs(); + Task::from_reg(®s.tasks_trigger[nr]) + } + + /// Get event for this trigger to use with PPI. + pub fn event(&self) -> Event<'d> { + let nr = self.number as usize; + let regs = T::regs(); + Event::from_reg(®s.events_triggered[nr]) + } +} + +/// Represents a trigger within an EGU. +#[allow(missing_docs)] +#[derive(Clone, Copy, PartialEq)] +#[repr(u8)] +pub enum TriggerNumber { + Trigger0 = 0, + Trigger1 = 1, + Trigger2 = 2, + Trigger3 = 3, + Trigger4 = 4, + Trigger5 = 5, + Trigger6 = 6, + Trigger7 = 7, + Trigger8 = 8, + Trigger9 = 9, + Trigger10 = 10, + Trigger11 = 11, + Trigger12 = 12, + Trigger13 = 13, + Trigger14 = 14, + Trigger15 = 15, +} diff --git a/embassy-nrf/src/lib.rs b/embassy-nrf/src/lib.rs index 3457dd933..05b52f687 100644 --- a/embassy-nrf/src/lib.rs +++ b/embassy-nrf/src/lib.rs @@ -50,6 +50,8 @@ pub mod gpiote; #[cfg(not(any(feature = "_nrf9160", feature = "_nrf5340-app")))] pub mod radio; +#[cfg(not(feature = "nrf51"))] +pub mod egu; #[cfg(any(feature = "nrf52832", feature = "nrf52833", feature = "nrf52840"))] pub mod i2s; pub mod nvmc; diff --git a/examples/nrf52840/src/bin/egu.rs b/examples/nrf52840/src/bin/egu.rs new file mode 100644 index 000000000..df96f7e56 --- /dev/null +++ b/examples/nrf52840/src/bin/egu.rs @@ -0,0 +1,55 @@ +//! This example shows the use of the EGU peripheral combined with PPI. +//! +//! It chains events from button -> egu0-trigger0 -> egu0-trigger1 -> led +#![no_std] +#![no_main] + +use embassy_executor::Spawner; +use embassy_nrf::gpio::{Input, Level, Output, OutputDrive, Pull}; +use embassy_nrf::gpiote::{InputChannel, InputChannelPolarity, OutputChannel, OutputChannelPolarity}; +use embassy_nrf::peripherals::{PPI_CH0, PPI_CH1, PPI_CH2}; +use embassy_nrf::ppi::Ppi; +use embassy_nrf::egu::{Egu, TriggerNumber}; +use embassy_time::{Duration, Timer}; +use {defmt_rtt as _, panic_probe as _}; + +#[embassy_executor::main] +async fn main(_spawner: Spawner) { + let p = embassy_nrf::init(Default::default()); + + let led1 = Output::new(p.P0_13, Level::High, OutputDrive::Standard); + let btn1 = Input::new(p.P0_11, Pull::Up); + + let mut egu1 = Egu::new(p.EGU0); + let led1 = OutputChannel::new(p.GPIOTE_CH0, led1, OutputChannelPolarity::Toggle); + let btn1 = InputChannel::new(p.GPIOTE_CH1, btn1, InputChannelPolarity::LoToHi); + + let trigger0 = egu1.trigger(TriggerNumber::Trigger0); + let trigger1 = egu1.trigger(TriggerNumber::Trigger1); + + let mut ppi1: Ppi = Ppi::new_one_to_one( + p.PPI_CH0, + btn1.event_in(), + trigger0.task(), + ); + ppi1.enable(); + + let mut ppi2: Ppi = Ppi::new_one_to_one( + p.PPI_CH1, + trigger0.event(), + trigger1.task(), + ); + ppi2.enable(); + + let mut ppi3: Ppi = Ppi::new_one_to_one( + p.PPI_CH2, + trigger1.event(), + led1.task_out(), + ); + ppi3.enable(); + + defmt::info!("Push the button to toggle the LED"); + loop { + Timer::after(Duration::from_secs(60)).await; + } +} From 91476eea12998aa3a622710962e0d1b0f60819e1 Mon Sep 17 00:00:00 2001 From: Ulf Lilleengen Date: Tue, 18 Jun 2024 13:22:38 +0200 Subject: [PATCH 495/581] cargo fmt --- examples/nrf52840/src/bin/egu.rs | 20 ++++---------------- 1 file changed, 4 insertions(+), 16 deletions(-) diff --git a/examples/nrf52840/src/bin/egu.rs b/examples/nrf52840/src/bin/egu.rs index df96f7e56..8bf712697 100644 --- a/examples/nrf52840/src/bin/egu.rs +++ b/examples/nrf52840/src/bin/egu.rs @@ -5,11 +5,11 @@ #![no_main] use embassy_executor::Spawner; +use embassy_nrf::egu::{Egu, TriggerNumber}; use embassy_nrf::gpio::{Input, Level, Output, OutputDrive, Pull}; use embassy_nrf::gpiote::{InputChannel, InputChannelPolarity, OutputChannel, OutputChannelPolarity}; use embassy_nrf::peripherals::{PPI_CH0, PPI_CH1, PPI_CH2}; use embassy_nrf::ppi::Ppi; -use embassy_nrf::egu::{Egu, TriggerNumber}; use embassy_time::{Duration, Timer}; use {defmt_rtt as _, panic_probe as _}; @@ -27,25 +27,13 @@ async fn main(_spawner: Spawner) { let trigger0 = egu1.trigger(TriggerNumber::Trigger0); let trigger1 = egu1.trigger(TriggerNumber::Trigger1); - let mut ppi1: Ppi = Ppi::new_one_to_one( - p.PPI_CH0, - btn1.event_in(), - trigger0.task(), - ); + let mut ppi1: Ppi = Ppi::new_one_to_one(p.PPI_CH0, btn1.event_in(), trigger0.task()); ppi1.enable(); - let mut ppi2: Ppi = Ppi::new_one_to_one( - p.PPI_CH1, - trigger0.event(), - trigger1.task(), - ); + let mut ppi2: Ppi = Ppi::new_one_to_one(p.PPI_CH1, trigger0.event(), trigger1.task()); ppi2.enable(); - let mut ppi3: Ppi = Ppi::new_one_to_one( - p.PPI_CH2, - trigger1.event(), - led1.task_out(), - ); + let mut ppi3: Ppi = Ppi::new_one_to_one(p.PPI_CH2, trigger1.event(), led1.task_out()); ppi3.enable(); defmt::info!("Push the button to toggle the LED"); From bd6fad6b61a2ed72ec30bbc63481e6f56cc94ba2 Mon Sep 17 00:00:00 2001 From: Tobias Breitwieser Date: Tue, 18 Jun 2024 16:42:22 +0200 Subject: [PATCH 496/581] Update rust-toolchain-nightly.toml to compile with changes to fmt.rs --- rust-toolchain-nightly.toml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/rust-toolchain-nightly.toml b/rust-toolchain-nightly.toml index 2143c1b2d..d965d67dd 100644 --- a/rust-toolchain-nightly.toml +++ b/rust-toolchain-nightly.toml @@ -1,5 +1,5 @@ [toolchain] -channel = "nightly-2024-05-20" +channel = "nightly-2024-06-18" components = [ "rust-src", "rustfmt", "llvm-tools", "miri" ] targets = [ "thumbv7em-none-eabi", From 0579d248efc1ee78f039fbfabcf2e0272e32ee53 Mon Sep 17 00:00:00 2001 From: Chen Yuheng <1016867898@qq.com> Date: Wed, 19 Jun 2024 10:57:18 +0800 Subject: [PATCH 497/581] Add PWM examples for stm32g0 --- examples/stm32g0/src/bin/input_capture.rs | 67 +++++++++++++++++++ examples/stm32g0/src/bin/pwm_complementary.rs | 58 ++++++++++++++++ examples/stm32g0/src/bin/pwm_input.rs | 65 ++++++++++++++++++ 3 files changed, 190 insertions(+) create mode 100644 examples/stm32g0/src/bin/input_capture.rs create mode 100644 examples/stm32g0/src/bin/pwm_complementary.rs create mode 100644 examples/stm32g0/src/bin/pwm_input.rs diff --git a/examples/stm32g0/src/bin/input_capture.rs b/examples/stm32g0/src/bin/input_capture.rs new file mode 100644 index 000000000..69fdae96d --- /dev/null +++ b/examples/stm32g0/src/bin/input_capture.rs @@ -0,0 +1,67 @@ +//! Input capture example +//! +//! This example showcases how to use the input capture feature of the timer peripheral. +//! Connect PB1 and PA6 with a 1k Ohm resistor or Connect PB1 and PA8 with a 1k Ohm resistor +//! to see the output. +//! When connecting PB1 (software pwm) and PA6 the output is around 10000 (it will be a bit bigger, around 10040) +//! Output is 1000 when connecting PB1 (PWMOUT) and PA6. +//! +#![no_std] +#![no_main] + +use defmt::*; +use embassy_executor::Spawner; +use embassy_stm32::gpio::{Level, Output, OutputType, Pull, Speed}; +use embassy_stm32::time::khz; +use embassy_stm32::timer::input_capture::{CapturePin, InputCapture}; +use embassy_stm32::timer::simple_pwm::{PwmPin, SimplePwm}; +use embassy_stm32::timer::Channel; +use embassy_stm32::{bind_interrupts, peripherals, timer}; +use embassy_time::Timer; +use {defmt_rtt as _, panic_probe as _}; + +// Connect PB1 and PA6 with a 1k Ohm resistor + +#[embassy_executor::task] +async fn blinky(led: peripherals::PB1) { + let mut led = Output::new(led, Level::High, Speed::Low); + + loop { + led.set_high(); + Timer::after_millis(50).await; + + led.set_low(); + Timer::after_millis(50).await; + } +} + +bind_interrupts!(struct Irqs { + TIM2 => timer::CaptureCompareInterruptHandler; +}); + +#[embassy_executor::main] +async fn main(spawner: Spawner) { + let p = embassy_stm32::init(Default::default()); + info!("Hello World!"); + + unwrap!(spawner.spawn(blinky(p.PB1))); + + // Connect PB1 and PA8 with a 1k Ohm resistor + let ch1 = PwmPin::new_ch1(p.PA8, OutputType::PushPull); + let mut pwm = SimplePwm::new(p.TIM1, Some(ch1), None, None, None, khz(1), Default::default()); + pwm.enable(Channel::Ch1); + pwm.set_duty(Channel::Ch1, 50); + + let ch1 = CapturePin::new_ch1(p.PA0, Pull::None); + let mut ic = InputCapture::new(p.TIM2, Some(ch1), None, None, None, Irqs, khz(1000), Default::default()); + + let mut old_capture = 0; + + loop { + ic.wait_for_rising_edge(Channel::Ch1).await; + + let capture_value = ic.get_capture_value(Channel::Ch1); + info!("{}", capture_value - old_capture); + old_capture = capture_value; + } +} diff --git a/examples/stm32g0/src/bin/pwm_complementary.rs b/examples/stm32g0/src/bin/pwm_complementary.rs new file mode 100644 index 000000000..98305ae42 --- /dev/null +++ b/examples/stm32g0/src/bin/pwm_complementary.rs @@ -0,0 +1,58 @@ +//! PWM complementary example +//! +//! This example uses two complementary pwm outputs from TIM1 with different duty cycles +//! ___ ___ +//! |_________| |_________| PA8 +//! _________ _________ +//! ___| |___| | PA7 +//! _________ _________ +//! |___| |___| PB3 +//! ___ ___ +//! _________| |_________| | PB0 + +#![no_std] +#![no_main] + +use defmt::info; +use embassy_executor::Spawner; +use embassy_stm32::gpio::OutputType; +use embassy_stm32::time::khz; +use embassy_stm32::timer::complementary_pwm::{ComplementaryPwm, ComplementaryPwmPin}; +use embassy_stm32::timer::simple_pwm::PwmPin; +use embassy_stm32::timer::Channel; +use embassy_stm32::Config as PeripheralConfig; +use {defmt_rtt as _, panic_probe as _}; + +#[embassy_executor::main] +async fn main(_spawner: Spawner) { + let p = embassy_stm32::init(Default::default()); + + let ch1 = PwmPin::new_ch1(p.PA8, OutputType::PushPull); + let ch1n = ComplementaryPwmPin::new_ch1(p.PA7, OutputType::PushPull); + let ch2 = PwmPin::new_ch2(p.PB3, OutputType::PushPull); + let ch2n = ComplementaryPwmPin::new_ch2(p.PB0, OutputType::PushPull); + + let mut pwm = ComplementaryPwm::new( + p.TIM1, + Some(ch1), + Some(ch1n), + Some(ch2), + Some(ch2n), + None, + None, + None, + None, + khz(100), + Default::default(), + ); + + let max = pwm.get_max_duty(); + info!("Max duty: {}", max); + + pwm.set_duty(Channel::Ch1, max / 4); + pwm.enable(Channel::Ch1); + pwm.set_duty(Channel::Ch2, max * 3 / 4); + pwm.enable(Channel::Ch2); + + loop {} +} diff --git a/examples/stm32g0/src/bin/pwm_input.rs b/examples/stm32g0/src/bin/pwm_input.rs new file mode 100644 index 000000000..152ecda86 --- /dev/null +++ b/examples/stm32g0/src/bin/pwm_input.rs @@ -0,0 +1,65 @@ +//! PWM input example +//! +//! This program demonstrates how to capture the parameters of the input waveform (frequency, width and duty cycle) +//! Connect PB1 and PA6 with a 1k Ohm resistor or Connect PB1 and PA8 with a 1k Ohm resistor +//! to see the output. +//! + +#![no_std] +#![no_main] + +use defmt::*; +use embassy_executor::Spawner; +use embassy_stm32::gpio::{Level, Output, OutputType, Pull, Speed}; +use embassy_stm32::time::khz; +use embassy_stm32::timer::pwm_input::PwmInput; +use embassy_stm32::timer::simple_pwm::{PwmPin, SimplePwm}; +use embassy_stm32::timer::Channel; +use embassy_stm32::{bind_interrupts, peripherals, timer}; +use embassy_time::Timer; +use {defmt_rtt as _, panic_probe as _}; + +// Connect PB1 and PA6 with a 1k Ohm resistor +#[embassy_executor::task] +async fn blinky(led: peripherals::PB1) { + let mut led = Output::new(led, Level::High, Speed::Low); + + loop { + led.set_high(); + Timer::after_millis(50).await; + + led.set_low(); + Timer::after_millis(50).await; + } +} + +bind_interrupts!(struct Irqs { + TIM2 => timer::CaptureCompareInterruptHandler; +}); + +#[embassy_executor::main] +async fn main(spawner: Spawner) { + let p = embassy_stm32::init(Default::default()); + + unwrap!(spawner.spawn(blinky(p.PB1))); + // Connect PA8 and PA6 with a 1k Ohm resistor + let ch1 = PwmPin::new_ch1(p.PA8, OutputType::PushPull); + let mut pwm = SimplePwm::new(p.TIM1, Some(ch1), None, None, None, khz(1), Default::default()); + let max = pwm.get_max_duty(); + pwm.set_duty(Channel::Ch1, max / 4); + pwm.enable(Channel::Ch1); + + let mut pwm_input = PwmInput::new(p.TIM2, p.PA0, Pull::None, khz(1000)); + pwm_input.enable(); + + loop { + Timer::after_millis(500).await; + let period = pwm_input.get_period_ticks(); + let width = pwm_input.get_width_ticks(); + let duty_cycle = pwm_input.get_duty_cycle(); + info!( + "period ticks: {} width ticks: {} duty cycle: {}", + period, width, duty_cycle + ); + } +} From a3c6626f4058c6cde6c27dd559d0b4d2b7d746ac Mon Sep 17 00:00:00 2001 From: Chen Yuheng <1016867898@qq.com> Date: Wed, 19 Jun 2024 11:04:40 +0800 Subject: [PATCH 498/581] Update pwm_complementary.rs --- examples/stm32g0/src/bin/pwm_complementary.rs | 1 - 1 file changed, 1 deletion(-) diff --git a/examples/stm32g0/src/bin/pwm_complementary.rs b/examples/stm32g0/src/bin/pwm_complementary.rs index 98305ae42..97b163c40 100644 --- a/examples/stm32g0/src/bin/pwm_complementary.rs +++ b/examples/stm32g0/src/bin/pwm_complementary.rs @@ -20,7 +20,6 @@ use embassy_stm32::time::khz; use embassy_stm32::timer::complementary_pwm::{ComplementaryPwm, ComplementaryPwmPin}; use embassy_stm32::timer::simple_pwm::PwmPin; use embassy_stm32::timer::Channel; -use embassy_stm32::Config as PeripheralConfig; use {defmt_rtt as _, panic_probe as _}; #[embassy_executor::main] From c65ee20cdd7ce20b6dd3a2792dc048dbe87131f6 Mon Sep 17 00:00:00 2001 From: Romain Reignier Date: Thu, 20 Jun 2024 14:06:44 +0200 Subject: [PATCH 499/581] examples: stm32wb: remove comment about memory.x file File removed in commit https://github.com/embassy-rs/embassy/commit/c19967dcf24d5223de5fd9b390371dc24aeccc1d --- examples/stm32wb/src/bin/eddystone_beacon.rs | 1 - examples/stm32wb/src/bin/gatt_server.rs | 1 - examples/stm32wb/src/bin/mac_ffd.rs | 1 - examples/stm32wb/src/bin/mac_ffd_net.rs | 1 - examples/stm32wb/src/bin/mac_rfd.rs | 1 - examples/stm32wb/src/bin/tl_mbox.rs | 1 - examples/stm32wb/src/bin/tl_mbox_ble.rs | 1 - examples/stm32wb/src/bin/tl_mbox_mac.rs | 1 - 8 files changed, 8 deletions(-) diff --git a/examples/stm32wb/src/bin/eddystone_beacon.rs b/examples/stm32wb/src/bin/eddystone_beacon.rs index d3b3c15ca..3bd8b4a63 100644 --- a/examples/stm32wb/src/bin/eddystone_beacon.rs +++ b/examples/stm32wb/src/bin/eddystone_beacon.rs @@ -46,7 +46,6 @@ async fn main(_spawner: Spawner) { - Select that file, the memory address, "verify download", and then "Firmware Upgrade". - Select "Start Wireless Stack". - Disconnect from the device. - - In the examples folder for stm32wb, modify the memory.x file to match your target device. - Run this example. Note: extended stack versions are not supported at this time. Do not attempt to install a stack with "extended" in the name. diff --git a/examples/stm32wb/src/bin/gatt_server.rs b/examples/stm32wb/src/bin/gatt_server.rs index 3b50d6c31..1cc50e134 100644 --- a/examples/stm32wb/src/bin/gatt_server.rs +++ b/examples/stm32wb/src/bin/gatt_server.rs @@ -57,7 +57,6 @@ async fn main(_spawner: Spawner) { - Select that file, the memory address, "verify download", and then "Firmware Upgrade". - Select "Start Wireless Stack". - Disconnect from the device. - - In the examples folder for stm32wb, modify the memory.x file to match your target device. - Run this example. Note: extended stack versions are not supported at this time. Do not attempt to install a stack with "extended" in the name. diff --git a/examples/stm32wb/src/bin/mac_ffd.rs b/examples/stm32wb/src/bin/mac_ffd.rs index 5cd660543..d139aa61b 100644 --- a/examples/stm32wb/src/bin/mac_ffd.rs +++ b/examples/stm32wb/src/bin/mac_ffd.rs @@ -43,7 +43,6 @@ async fn main(spawner: Spawner) { - Select that file, the memory address, "verify download", and then "Firmware Upgrade". - Select "Start Wireless Stack". - Disconnect from the device. - - In the examples folder for stm32wb, modify the memory.x file to match your target device. - Run this example. Note: extended stack versions are not supported at this time. Do not attempt to install a stack with "extended" in the name. diff --git a/examples/stm32wb/src/bin/mac_ffd_net.rs b/examples/stm32wb/src/bin/mac_ffd_net.rs index 7a42bf577..6a97daf4d 100644 --- a/examples/stm32wb/src/bin/mac_ffd_net.rs +++ b/examples/stm32wb/src/bin/mac_ffd_net.rs @@ -49,7 +49,6 @@ async fn main(spawner: Spawner) { - Select that file, the memory address, "verify download", and then "Firmware Upgrade". - Select "Start Wireless Stack". - Disconnect from the device. - - In the examples folder for stm32wb, modify the memory.x file to match your target device. - Run this example. Note: extended stack versions are not supported at this time. Do not attempt to install a stack with "extended" in the name. diff --git a/examples/stm32wb/src/bin/mac_rfd.rs b/examples/stm32wb/src/bin/mac_rfd.rs index 7949211fb..9062bdcd2 100644 --- a/examples/stm32wb/src/bin/mac_rfd.rs +++ b/examples/stm32wb/src/bin/mac_rfd.rs @@ -45,7 +45,6 @@ async fn main(spawner: Spawner) { - Select that file, the memory address, "verify download", and then "Firmware Upgrade". - Select "Start Wireless Stack". - Disconnect from the device. - - In the examples folder for stm32wb, modify the memory.x file to match your target device. - Run this example. Note: extended stack versions are not supported at this time. Do not attempt to install a stack with "extended" in the name. diff --git a/examples/stm32wb/src/bin/tl_mbox.rs b/examples/stm32wb/src/bin/tl_mbox.rs index cb92d462d..4e7f2304d 100644 --- a/examples/stm32wb/src/bin/tl_mbox.rs +++ b/examples/stm32wb/src/bin/tl_mbox.rs @@ -35,7 +35,6 @@ async fn main(_spawner: Spawner) { - Select that file, the memory address, "verify download", and then "Firmware Upgrade". - Select "Start Wireless Stack". - Disconnect from the device. - - In the examples folder for stm32wb, modify the memory.x file to match your target device. - Run this example. Note: extended stack versions are not supported at this time. Do not attempt to install a stack with "extended" in the name. diff --git a/examples/stm32wb/src/bin/tl_mbox_ble.rs b/examples/stm32wb/src/bin/tl_mbox_ble.rs index 2599e1151..72a4c18e6 100644 --- a/examples/stm32wb/src/bin/tl_mbox_ble.rs +++ b/examples/stm32wb/src/bin/tl_mbox_ble.rs @@ -34,7 +34,6 @@ async fn main(_spawner: Spawner) { - Select that file, the memory address, "verify download", and then "Firmware Upgrade". - Select "Start Wireless Stack". - Disconnect from the device. - - In the examples folder for stm32wb, modify the memory.x file to match your target device. - Run this example. Note: extended stack versions are not supported at this time. Do not attempt to install a stack with "extended" in the name. diff --git a/examples/stm32wb/src/bin/tl_mbox_mac.rs b/examples/stm32wb/src/bin/tl_mbox_mac.rs index 5d868412a..9224e626d 100644 --- a/examples/stm32wb/src/bin/tl_mbox_mac.rs +++ b/examples/stm32wb/src/bin/tl_mbox_mac.rs @@ -40,7 +40,6 @@ async fn main(spawner: Spawner) { - Select that file, the memory address, "verify download", and then "Firmware Upgrade". - Select "Start Wireless Stack". - Disconnect from the device. - - In the examples folder for stm32wb, modify the memory.x file to match your target device. - Run this example. Note: extended stack versions are not supported at this time. Do not attempt to install a stack with "extended" in the name. From 4b0615957fe86218eb0529ef35e52305ab9e29c4 Mon Sep 17 00:00:00 2001 From: ROMemories <152802150+ROMemories@users.noreply.github.com> Date: Thu, 20 Jun 2024 12:09:30 +0000 Subject: [PATCH 500/581] docs(gpio): fix a typo regarding GPIO speed --- embassy-stm32/src/gpio.rs | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/embassy-stm32/src/gpio.rs b/embassy-stm32/src/gpio.rs index 86bc226a9..87519f51e 100644 --- a/embassy-stm32/src/gpio.rs +++ b/embassy-stm32/src/gpio.rs @@ -276,7 +276,7 @@ pub enum Speed { #[cfg(not(any(gpio_v1, syscfg_f0)))] High, #[cfg_attr(gpio_v1, doc = "Output speed OUTPUT50MHZ")] - #[cfg_attr(gpio_v2, doc = "Output speed 10")] + #[cfg_attr(gpio_v2, doc = "Output speed 11")] VeryHigh, } From 060d1f6e6f36b01e1f0ec4beb20499ac22d94b24 Mon Sep 17 00:00:00 2001 From: Jamie Bird Date: Fri, 21 Jun 2024 15:09:57 +0100 Subject: [PATCH 501/581] Fix: Ensure I2C bus is free before master-write operation The I2C master-write function was failing when executed immediately after an I2C read operation, requiring manual delays to function correctly. This fix introduces a check to ensure the I2C bus is free before initiating the write operation. According to the RM0399 manual for STM32H7 chips, the BUSY bit (Bit 15 in the I2C ISR register) indicates whether a communication is in progress on the bus. The BUSY bit is set by hardware when a START condition is detected and cleared when a STOP condition is detected or when PE = 0. This fix prevents the write operation from starting until the BUSY bit is cleared. --- embassy-stm32/src/i2c/v2.rs | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/embassy-stm32/src/i2c/v2.rs b/embassy-stm32/src/i2c/v2.rs index 80163c287..27381cd3c 100644 --- a/embassy-stm32/src/i2c/v2.rs +++ b/embassy-stm32/src/i2c/v2.rs @@ -109,6 +109,11 @@ impl<'d, M: Mode> I2c<'d, M> { timeout.check()?; } + // Wait for the bus to be free + while info.regs.isr().read().busy(){ + timeout.check()?; + }; + let reload = if reload { i2c::vals::Reload::NOTCOMPLETED } else { From 18ba56534bbff5fb00382e54aba8dbc32365e896 Mon Sep 17 00:00:00 2001 From: Jamie Bird Date: Fri, 21 Jun 2024 15:29:02 +0100 Subject: [PATCH 502/581] Fix Formatting Issues --- embassy-stm32/src/i2c/v2.rs | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/embassy-stm32/src/i2c/v2.rs b/embassy-stm32/src/i2c/v2.rs index 27381cd3c..8c8df79dd 100644 --- a/embassy-stm32/src/i2c/v2.rs +++ b/embassy-stm32/src/i2c/v2.rs @@ -110,9 +110,9 @@ impl<'d, M: Mode> I2c<'d, M> { } // Wait for the bus to be free - while info.regs.isr().read().busy(){ + while info.regs.isr().read().busy() { timeout.check()?; - }; + } let reload = if reload { i2c::vals::Reload::NOTCOMPLETED From e3891b09dc447f1e0df0cc286deecd0d36a3d7ba Mon Sep 17 00:00:00 2001 From: kalkyl Date: Sat, 22 Jun 2024 16:39:23 +0200 Subject: [PATCH 503/581] Add comment about internal api --- embassy-rp/src/adc.rs | 2 ++ 1 file changed, 2 insertions(+) diff --git a/embassy-rp/src/adc.rs b/embassy-rp/src/adc.rs index be453d08e..eb1cc9a66 100644 --- a/embassy-rp/src/adc.rs +++ b/embassy-rp/src/adc.rs @@ -219,6 +219,8 @@ impl<'d> Adc<'d, Async> { } } + // Note for refactoring: we don't require the actual Channels here, just the channel numbers. + // The public api is responsible for asserting ownership of the actual Channels. async fn read_many_inner( &mut self, channels: impl Iterator, From 0888183666df0df389453aeeb0c87d841ac50522 Mon Sep 17 00:00:00 2001 From: kalkyl Date: Sat, 22 Jun 2024 23:02:38 +0200 Subject: [PATCH 504/581] Change pin in HIL test --- tests/rp/src/bin/adc.rs | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tests/rp/src/bin/adc.rs b/tests/rp/src/bin/adc.rs index 0f13e626f..65c246472 100644 --- a/tests/rp/src/bin/adc.rs +++ b/tests/rp/src/bin/adc.rs @@ -133,7 +133,7 @@ async fn main(_spawner: Spawner) { { let mut multi = [0u16; 2]; let mut channels = [ - Channel::new_pin(&mut p.PIN_29, Pull::Up), + Channel::new_pin(&mut p.PIN_26, Pull::Up), Channel::new_temp_sensor(&mut p.ADC_TEMP_SENSOR), ]; adc.read_many_multichannel(&mut channels, &mut multi, 1, &mut p.DMA_CH0) From 00ff1409cd34744d7d5f42c6aa099f6088683d3d Mon Sep 17 00:00:00 2001 From: Alexandros Liarokapis Date: Tue, 18 Jun 2024 18:42:27 +0300 Subject: [PATCH 505/581] Enables half transfer ir when constructing a ReadableDmaRingBuffer The half transfer irq needs to be enabled in order for the hardware to notify the waker when the transfer is at half. This is needed to ensure no overuns occur when using `ReadableDmaRingBuffer`'s `read_exact`. Otherwise we are only notified when the DMA has completed its cycle and is on its way to start overwriting the data. The docs in the dma_bdma buf module also seem to imply that the half transfer irq must be enabled for proper operation. The only consumers of the `ReadableDmaRingBuffer` api are the sai module and the `RingBufferedUartRx`. The former enables the irq manually when constructing the transfer options while the latter does not. This may also be the cause for #1441. --- embassy-stm32/src/dma/dma_bdma.rs | 1 + 1 file changed, 1 insertion(+) diff --git a/embassy-stm32/src/dma/dma_bdma.rs b/embassy-stm32/src/dma/dma_bdma.rs index a462e317f..8a6aa53a0 100644 --- a/embassy-stm32/src/dma/dma_bdma.rs +++ b/embassy-stm32/src/dma/dma_bdma.rs @@ -904,6 +904,7 @@ impl<'a, W: Word> WritableRingBuffer<'a, W> { let data_size = W::size(); let buffer_ptr = buffer.as_mut_ptr(); + options.half_transfer_ir = true; options.complete_transfer_ir = true; options.circular = true; From 3883a5b2de75d60301307bffb64181f755c397aa Mon Sep 17 00:00:00 2001 From: Alexandros Liarokapis Date: Sun, 23 Jun 2024 12:43:24 +0300 Subject: [PATCH 506/581] Enables adc v4 averaging support. The Adc v4 peripheral includes a hardware oversampler. This PR adds an averaging interface that keeps most of the current interface backwards compatible while allowing for the common use-case of hardware-averaging. A more comprehensive oversampler interface may be exposed in the future. --- embassy-stm32/src/adc/v4.rs | 38 +++++++++++++++++++++++++++++++++++++ 1 file changed, 38 insertions(+) diff --git a/embassy-stm32/src/adc/v4.rs b/embassy-stm32/src/adc/v4.rs index 50db646fe..b15aebc10 100644 --- a/embassy-stm32/src/adc/v4.rs +++ b/embassy-stm32/src/adc/v4.rs @@ -126,6 +126,21 @@ impl Prescaler { } } +/// Number of samples used for averaging. +pub enum Averaging { + Disabled, + Samples2, + Samples4, + Samples8, + Samples16, + Samples32, + Samples64, + Samples128, + Samples256, + Samples512, + Samples1024, +} + impl<'d, T: Instance> Adc<'d, T> { /// Create a new ADC driver. pub fn new(adc: impl Peripheral

+ 'd) -> Self { @@ -252,6 +267,29 @@ impl<'d, T: Instance> Adc<'d, T> { T::regs().cfgr().modify(|reg| reg.set_res(resolution.into())); } + /// Set hardware averaging. + pub fn set_averaging(&mut self, averaging: Averaging) { + let (enable, samples, right_shift) = match averaging { + Averaging::Disabled => (false, 0, 0), + Averaging::Samples2 => (true, 1, 1), + Averaging::Samples4 => (true, 3, 2), + Averaging::Samples8 => (true, 7, 3), + Averaging::Samples16 => (true, 15, 4), + Averaging::Samples32 => (true, 31, 5), + Averaging::Samples64 => (true, 63, 6), + Averaging::Samples128 => (true, 127, 7), + Averaging::Samples256 => (true, 255, 8), + Averaging::Samples512 => (true, 511, 9), + Averaging::Samples1024 => (true, 1023, 10), + }; + + T::regs().cfgr2().modify(|reg| { + reg.set_rovse(enable); + reg.set_osvr(samples); + reg.set_ovss(right_shift); + }) + } + /// Perform a single conversion. fn convert(&mut self) -> u16 { T::regs().isr().modify(|reg| { From 2655426cd80b828593c8cd60930da3ebbd60e85c Mon Sep 17 00:00:00 2001 From: Eekle <96976531+Eekle@users.noreply.github.com> Date: Sun, 23 Jun 2024 16:43:12 +0200 Subject: [PATCH 507/581] Add async wait to TSC --- embassy-stm32/src/tsc/mod.rs | 139 ++++++++++++++++++++++---------- examples/stm32u5/src/bin/tsc.rs | 12 ++- 2 files changed, 107 insertions(+), 44 deletions(-) diff --git a/embassy-stm32/src/tsc/mod.rs b/embassy-stm32/src/tsc/mod.rs index 8ba208ce7..6497ff0ee 100644 --- a/embassy-stm32/src/tsc/mod.rs +++ b/embassy-stm32/src/tsc/mod.rs @@ -71,9 +71,13 @@ use embassy_hal_internal::{into_ref, PeripheralRef}; pub use enums::*; use crate::gpio::{AfType, AnyPin, OutputType, Speed}; -use crate::pac::tsc::Tsc as Regs; +use crate::interrupt; +use crate::interrupt::typelevel::Interrupt; use crate::rcc::{self, RccPeripheral}; use crate::{peripherals, Peripheral}; +use core::future::poll_fn; +use core::task::Poll; +use embassy_sync::waitqueue::AtomicWaker; #[cfg(tsc_v1)] const TSC_NUM_GROUPS: u32 = 6; @@ -90,6 +94,18 @@ pub enum Error { Test, } +/// TSC interrupt handler. +pub struct InterruptHandler { + _phantom: PhantomData, +} + +impl interrupt::typelevel::Handler for InterruptHandler { + unsafe fn on_interrupt() { + T::regs().ier().write(|w| w.set_eoaie(false)); + T::waker().wake(); + } +} + /// Pin type definition to control IO parameters pub enum PinType { /// Sensing channel pin connected to an electrode @@ -510,6 +526,7 @@ impl<'d, T: Instance> Tsc<'d, T> { /// Create new TSC driver pub fn new( peri: impl Peripheral

+ 'd, + _irq: impl interrupt::typelevel::Binding> + 'd, g1: Option>, g2: Option>, g3: Option>, @@ -663,7 +680,7 @@ impl<'d, T: Instance> Tsc<'d, T> { rcc::enable_and_reset::(); - T::REGS.cr().modify(|w| { + T::regs().cr().modify(|w| { w.set_tsce(true); w.set_ctph(config.ct_pulse_high_length.into()); w.set_ctpl(config.ct_pulse_low_length.into()); @@ -691,33 +708,39 @@ impl<'d, T: Instance> Tsc<'d, T> { // Set IO configuration // Disable Schmitt trigger hysteresis on all used TSC IOs - T::REGS + T::regs() .iohcr() .write(|w| w.0 = !(config.channel_ios | config.shield_ios | config.sampling_ios)); // Set channel and shield IOs - T::REGS.ioccr().write(|w| w.0 = config.channel_ios | config.shield_ios); + T::regs() + .ioccr() + .write(|w| w.0 = config.channel_ios | config.shield_ios); // Set sampling IOs - T::REGS.ioscr().write(|w| w.0 = config.sampling_ios); + T::regs().ioscr().write(|w| w.0 = config.sampling_ios); // Set the groups to be acquired - T::REGS + T::regs() .iogcsr() .write(|w| w.0 = Self::extract_groups(config.channel_ios)); // Disable interrupts - T::REGS.ier().modify(|w| { + T::regs().ier().modify(|w| { w.set_eoaie(false); w.set_mceie(false); }); // Clear flags - T::REGS.icr().modify(|w| { + T::regs().icr().modify(|w| { w.set_eoaic(true); w.set_mceic(true); }); + unsafe { + T::Interrupt::enable(); + } + Self { _peri: peri, _g1: g1, @@ -740,24 +763,24 @@ impl<'d, T: Instance> Tsc<'d, T> { self.state = State::Busy; // Disable interrupts - T::REGS.ier().modify(|w| { + T::regs().ier().modify(|w| { w.set_eoaie(false); w.set_mceie(false); }); // Clear flags - T::REGS.icr().modify(|w| { + T::regs().icr().modify(|w| { w.set_eoaic(true); w.set_mceic(true); }); // Set the touch sensing IOs not acquired to the default mode - T::REGS.cr().modify(|w| { + T::regs().cr().modify(|w| { w.set_iodef(self.config.io_default_mode); }); // Start the acquisition - T::REGS.cr().modify(|w| { + T::regs().cr().modify(|w| { w.set_start(true); }); } @@ -767,41 +790,41 @@ impl<'d, T: Instance> Tsc<'d, T> { self.state = State::Busy; // Enable interrupts - T::REGS.ier().modify(|w| { + T::regs().ier().modify(|w| { w.set_eoaie(true); w.set_mceie(self.config.max_count_interrupt); }); // Clear flags - T::REGS.icr().modify(|w| { + T::regs().icr().modify(|w| { w.set_eoaic(true); w.set_mceic(true); }); // Set the touch sensing IOs not acquired to the default mode - T::REGS.cr().modify(|w| { + T::regs().cr().modify(|w| { w.set_iodef(self.config.io_default_mode); }); // Start the acquisition - T::REGS.cr().modify(|w| { + T::regs().cr().modify(|w| { w.set_start(true); }); } /// Stop charge transfer acquisition pub fn stop(&mut self) { - T::REGS.cr().modify(|w| { + T::regs().cr().modify(|w| { w.set_start(false); }); // Set the touch sensing IOs in low power mode - T::REGS.cr().modify(|w| { + T::regs().cr().modify(|w| { w.set_iodef(false); }); // Clear flags - T::REGS.icr().modify(|w| { + T::regs().icr().modify(|w| { w.set_eoaic(true); w.set_mceic(true); }); @@ -811,23 +834,23 @@ impl<'d, T: Instance> Tsc<'d, T> { /// Stop charge transfer acquisition and clear interrupts pub fn stop_it(&mut self) { - T::REGS.cr().modify(|w| { + T::regs().cr().modify(|w| { w.set_start(false); }); // Set the touch sensing IOs in low power mode - T::REGS.cr().modify(|w| { + T::regs().cr().modify(|w| { w.set_iodef(false); }); // Disable interrupts - T::REGS.ier().modify(|w| { + T::regs().ier().modify(|w| { w.set_eoaie(false); w.set_mceie(false); }); // Clear flags - T::REGS.icr().modify(|w| { + T::regs().icr().modify(|w| { w.set_eoaic(true); w.set_mceic(true); }); @@ -840,11 +863,31 @@ impl<'d, T: Instance> Tsc<'d, T> { while self.get_state() == State::Busy {} } + /// Asyncronously wait for the end of an acquisition + pub async fn pend_for_acquisition(&mut self) { + poll_fn(|cx| match self.get_state() { + State::Busy => { + T::waker().register(cx.waker()); + T::regs().ier().write(|w| w.set_eoaie(true)); + if self.get_state() != State::Busy { + T::regs().ier().write(|w| w.set_eoaie(false)); + return Poll::Ready(()); + } + Poll::Pending + } + _ => { + T::regs().ier().write(|w| w.set_eoaie(false)); + Poll::Ready(()) + } + }) + .await; + } + /// Get current state of acquisition pub fn get_state(&mut self) -> State { if self.state == State::Busy { - if T::REGS.isr().read().eoaf() { - if T::REGS.isr().read().mcef() { + if T::regs().isr().read().eoaf() { + if T::regs().isr().read().mcef() { self.state = State::Error } else { self.state = State::Ready @@ -859,16 +902,16 @@ impl<'d, T: Instance> Tsc<'d, T> { // Status bits are set by hardware when the acquisition on the corresponding // enabled analog IO group is complete, cleared when new acquisition is started let status = match index { - Group::One => T::REGS.iogcsr().read().g1s(), - Group::Two => T::REGS.iogcsr().read().g2s(), - Group::Three => T::REGS.iogcsr().read().g3s(), - Group::Four => T::REGS.iogcsr().read().g4s(), - Group::Five => T::REGS.iogcsr().read().g5s(), - Group::Six => T::REGS.iogcsr().read().g6s(), + Group::One => T::regs().iogcsr().read().g1s(), + Group::Two => T::regs().iogcsr().read().g2s(), + Group::Three => T::regs().iogcsr().read().g3s(), + Group::Four => T::regs().iogcsr().read().g4s(), + Group::Five => T::regs().iogcsr().read().g5s(), + Group::Six => T::regs().iogcsr().read().g6s(), #[cfg(any(tsc_v2, tsc_v3))] - Group::Seven => T::REGS.iogcsr().read().g7s(), + Group::Seven => T::regs().iogcsr().read().g7s(), #[cfg(tsc_v3)] - Group::Eight => T::REGS.iogcsr().read().g8s(), + Group::Eight => T::regs().iogcsr().read().g8s(), }; match status { true => GroupStatus::Complete, @@ -878,13 +921,13 @@ impl<'d, T: Instance> Tsc<'d, T> { /// Get the count for the acquisiton, valid once group status is set pub fn group_get_value(&mut self, index: Group) -> u16 { - T::REGS.iogcr(index.into()).read().cnt() + T::regs().iogcr(index.into()).read().cnt() } /// Discharge the IOs for subsequent acquisition pub fn discharge_io(&mut self, status: bool) { // Set the touch sensing IOs in low power mode - T::REGS.cr().modify(|w| { + T::regs().cr().modify(|w| { w.set_iodef(!status); }); } @@ -897,20 +940,32 @@ impl<'d, T: Instance> Drop for Tsc<'d, T> { } pub(crate) trait SealedInstance { - const REGS: Regs; + fn regs() -> crate::pac::tsc::Tsc; + fn waker() -> &'static AtomicWaker; } /// TSC instance trait #[allow(private_bounds)] -pub trait Instance: Peripheral

+ SealedInstance + RccPeripheral {} +pub trait Instance: Peripheral

+ SealedInstance + RccPeripheral { + /// Interrupt for this TSC instance + type Interrupt: interrupt::typelevel::Interrupt; +} -foreach_peripheral!( - (tsc, $inst:ident) => { - impl SealedInstance for peripherals::$inst { - const REGS: Regs = crate::pac::$inst; +foreach_interrupt!( + ($inst:ident, tsc, TSC, GLOBAL, $irq:ident) => { + impl Instance for peripherals::$inst { + type Interrupt = crate::interrupt::typelevel::$irq; } - impl Instance for peripherals::$inst {} + impl SealedInstance for peripherals::$inst { + fn regs() -> crate::pac::tsc::Tsc { + crate::pac::$inst + } + fn waker() -> &'static AtomicWaker { + static WAKER: AtomicWaker = AtomicWaker::new(); + &WAKER + } + } }; ); diff --git a/examples/stm32u5/src/bin/tsc.rs b/examples/stm32u5/src/bin/tsc.rs index f5593d1c4..642bbeaca 100644 --- a/examples/stm32u5/src/bin/tsc.rs +++ b/examples/stm32u5/src/bin/tsc.rs @@ -2,10 +2,17 @@ #![no_main] use defmt::*; -use embassy_stm32::tsc::{self, *}; +use embassy_stm32::{ + bind_interrupts, + tsc::{self, *}, +}; use embassy_time::Timer; use {defmt_rtt as _, panic_probe as _}; +bind_interrupts!(struct Irqs { + TSC => InterruptHandler; +}); + #[cortex_m_rt::exception] unsafe fn HardFault(_: &cortex_m_rt::ExceptionFrame) -> ! { cortex_m::peripheral::SCB::sys_reset(); @@ -47,6 +54,7 @@ async fn main(_spawner: embassy_executor::Spawner) { let mut touch_controller = tsc::Tsc::new( context.TSC, + Irqs, Some(g1), Some(g2), None, @@ -67,7 +75,7 @@ async fn main(_spawner: embassy_executor::Spawner) { let mut group_seven_val = 0; info!("Starting touch_controller interface"); loop { - touch_controller.poll_for_acquisition(); + touch_controller.pend_for_acquisition().await; touch_controller.discharge_io(true); Timer::after_millis(1).await; From 7eb605d1165eaf4cdf90453d1ed2d6976dd514af Mon Sep 17 00:00:00 2001 From: Eekle <96976531+Eekle@users.noreply.github.com> Date: Sun, 23 Jun 2024 16:54:10 +0200 Subject: [PATCH 508/581] fmt --- embassy-stm32/src/tsc/mod.rs | 9 ++++----- examples/stm32u5/src/bin/tsc.rs | 6 ++---- 2 files changed, 6 insertions(+), 9 deletions(-) diff --git a/embassy-stm32/src/tsc/mod.rs b/embassy-stm32/src/tsc/mod.rs index 6497ff0ee..d5da2529f 100644 --- a/embassy-stm32/src/tsc/mod.rs +++ b/embassy-stm32/src/tsc/mod.rs @@ -65,19 +65,18 @@ /// Enums defined for peripheral parameters pub mod enums; +use core::future::poll_fn; use core::marker::PhantomData; +use core::task::Poll; use embassy_hal_internal::{into_ref, PeripheralRef}; +use embassy_sync::waitqueue::AtomicWaker; pub use enums::*; use crate::gpio::{AfType, AnyPin, OutputType, Speed}; -use crate::interrupt; use crate::interrupt::typelevel::Interrupt; use crate::rcc::{self, RccPeripheral}; -use crate::{peripherals, Peripheral}; -use core::future::poll_fn; -use core::task::Poll; -use embassy_sync::waitqueue::AtomicWaker; +use crate::{interrupt, peripherals, Peripheral}; #[cfg(tsc_v1)] const TSC_NUM_GROUPS: u32 = 6; diff --git a/examples/stm32u5/src/bin/tsc.rs b/examples/stm32u5/src/bin/tsc.rs index 642bbeaca..db85fb158 100644 --- a/examples/stm32u5/src/bin/tsc.rs +++ b/examples/stm32u5/src/bin/tsc.rs @@ -2,10 +2,8 @@ #![no_main] use defmt::*; -use embassy_stm32::{ - bind_interrupts, - tsc::{self, *}, -}; +use embassy_stm32::bind_interrupts; +use embassy_stm32::tsc::{self, *}; use embassy_time::Timer; use {defmt_rtt as _, panic_probe as _}; From b05217b3566e17cd10eb52c714aa53fc6d52dd91 Mon Sep 17 00:00:00 2001 From: rafael Date: Sun, 23 Jun 2024 23:04:47 +0200 Subject: [PATCH 509/581] add wifi_webrequest example --- examples/rp/Cargo.toml | 9 +- examples/rp/src/bin/wifi_webrequest.rs | 197 +++++++++++++++++++++++++ 2 files changed, 204 insertions(+), 2 deletions(-) create mode 100644 examples/rp/src/bin/wifi_webrequest.rs diff --git a/examples/rp/Cargo.toml b/examples/rp/Cargo.toml index bb91969bc..041506a50 100644 --- a/examples/rp/Cargo.toml +++ b/examples/rp/Cargo.toml @@ -8,11 +8,11 @@ license = "MIT OR Apache-2.0" [dependencies] embassy-embedded-hal = { version = "0.1.0", path = "../../embassy-embedded-hal", features = ["defmt"] } embassy-sync = { version = "0.6.0", path = "../../embassy-sync", features = ["defmt"] } -embassy-executor = { version = "0.5.0", path = "../../embassy-executor", features = ["task-arena-size-32768", "arch-cortex-m", "executor-thread", "executor-interrupt", "defmt", "integrated-timers"] } +embassy-executor = { version = "0.5.0", path = "../../embassy-executor", features = ["task-arena-size-98304", "arch-cortex-m", "executor-thread", "executor-interrupt", "defmt", "integrated-timers"] } embassy-time = { version = "0.3.1", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime"] } embassy-rp = { version = "0.1.0", path = "../../embassy-rp", features = ["defmt", "unstable-pac", "time-driver", "critical-section-impl"] } embassy-usb = { version = "0.2.0", path = "../../embassy-usb", features = ["defmt"] } -embassy-net = { version = "0.4.0", path = "../../embassy-net", features = ["defmt", "tcp", "udp", "raw", "dhcpv4", "medium-ethernet"] } +embassy-net = { version = "0.4.0", path = "../../embassy-net", features = ["defmt", "tcp", "udp", "raw", "dhcpv4", "medium-ethernet", "dns"] } embassy-net-wiznet = { version = "0.1.0", path = "../../embassy-net-wiznet", features = ["defmt"] } embassy-futures = { version = "0.1.0", path = "../../embassy-futures" } embassy-usb-logger = { version = "0.2.0", path = "../../embassy-usb-logger" } @@ -24,6 +24,11 @@ defmt-rtt = "0.4" fixed = "1.23.1" fixed-macro = "1.2" +# for web request example +reqwless = { version = "0.12.0", features = ["defmt"] } +serde = { version = "1.0.203", default-features = false, features = ["derive"] } +serde-json-core = "0.5.1" + #cortex-m = { version = "0.7.6", features = ["critical-section-single-core"] } cortex-m = { version = "0.7.6", features = ["inline-asm"] } cortex-m-rt = "0.7.0" diff --git a/examples/rp/src/bin/wifi_webrequest.rs b/examples/rp/src/bin/wifi_webrequest.rs new file mode 100644 index 000000000..350e11bf1 --- /dev/null +++ b/examples/rp/src/bin/wifi_webrequest.rs @@ -0,0 +1,197 @@ +//! This example uses the RP Pico W board Wifi chip (cyw43). +//! Connects to Wifi network and makes a web request to get the current time. + +#![no_std] +#![no_main] +#![allow(async_fn_in_trait)] + +use core::str::from_utf8; + +use serde::Deserialize; +use serde_json_core; + +use cyw43_pio::PioSpi; +use defmt::*; +use embassy_executor::Spawner; +use embassy_net::{Config, Stack, StackResources}; +use embassy_net::tcp::client::{TcpClientState, TcpClient}; +use embassy_net::dns::DnsSocket; +use embassy_rp::bind_interrupts; +use embassy_rp::gpio::{Level, Output}; +use embassy_rp::peripherals::{DMA_CH0, PIO0}; +use embassy_rp::pio::{InterruptHandler, Pio}; +use embassy_time::{Duration, Timer}; +use static_cell::StaticCell; +use reqwless::client::{HttpClient, TlsConfig, TlsVerify}; +use reqwless::request::Method; +use {defmt_rtt as _, panic_probe as _}; + +bind_interrupts!(struct Irqs { + PIO0_IRQ_0 => InterruptHandler; +}); + +const WIFI_NETWORK: &str = "ssid"; // change to your network SSID +const WIFI_PASSWORD: &str = "pwd"; // change to your network password + +#[embassy_executor::task] +async fn wifi_task(runner: cyw43::Runner<'static, Output<'static>, PioSpi<'static, PIO0, 0, DMA_CH0>>) -> ! { + runner.run().await +} + +#[embassy_executor::task] +async fn net_task(stack: &'static Stack>) -> ! { + stack.run().await +} + +#[embassy_executor::main] +async fn main(spawner: Spawner) { + info!("Hello World!"); + + let p = embassy_rp::init(Default::default()); + + let fw = include_bytes!("../../../../cyw43-firmware/43439A0.bin"); + let clm = include_bytes!("../../../../cyw43-firmware/43439A0_clm.bin"); + // To make flashing faster for development, you may want to flash the firmwares independently + // at hardcoded addresses, instead of baking them into the program with `include_bytes!`: + // probe-rs download 43439A0.bin --binary-format bin --chip RP2040 --base-address 0x10100000 + // probe-rs download 43439A0_clm.bin --binary-format bin --chip RP2040 --base-address 0x10140000 + // let fw = unsafe { core::slice::from_raw_parts(0x10100000 as *const u8, 230321) }; + // let clm = unsafe { core::slice::from_raw_parts(0x10140000 as *const u8, 4752) }; + + let pwr = Output::new(p.PIN_23, Level::Low); + let cs = Output::new(p.PIN_25, Level::High); + let mut pio = Pio::new(p.PIO0, Irqs); + let spi = PioSpi::new(&mut pio.common, pio.sm0, pio.irq0, cs, p.PIN_24, p.PIN_29, p.DMA_CH0); + + static STATE: StaticCell = StaticCell::new(); + let state = STATE.init(cyw43::State::new()); + let (net_device, mut control, runner) = cyw43::new(state, pwr, spi, fw).await; + unwrap!(spawner.spawn(wifi_task(runner))); + + control.init(clm).await; + control + .set_power_management(cyw43::PowerManagementMode::PowerSave) + .await; + + let config = Config::dhcpv4(Default::default()); + //let config = embassy_net::Config::ipv4_static(embassy_net::StaticConfigV4 { + // address: Ipv4Cidr::new(Ipv4Address::new(192, 168, 69, 2), 24), + // dns_servers: Vec::new(), + // gateway: Some(Ipv4Address::new(192, 168, 69, 1)), + //}); + + // Generate random seed + let seed = 0x0123_4567_89ab_cdef; // chosen by fair dice roll. guarenteed to be random. + + // Init network stack + static STACK: StaticCell>> = StaticCell::new(); + static RESOURCES: StaticCell> = StaticCell::new(); + let stack = &*STACK.init(Stack::new( + net_device, + config, + RESOURCES.init(StackResources::<5>::new()), + seed, + )); + + unwrap!(spawner.spawn(net_task(stack))); + + loop { + //control.join_open(WIFI_NETWORK).await; + match control.join_wpa2(WIFI_NETWORK, WIFI_PASSWORD).await { + Ok(_) => break, + Err(err) => { + info!("join failed with status={}", err.status); + } + } + } + + // Wait for DHCP, not necessary when using static IP + info!("waiting for DHCP..."); + while !stack.is_config_up() { + Timer::after_millis(100).await; + } + info!("DHCP is now up!"); + + info!("waiting for link up..."); + while !stack.is_link_up() { + Timer::after_millis(500).await; + } + info!("Link is up!"); + + info!("waiting for stack to be up..."); + stack.wait_config_up().await; + info!("Stack is up!"); + + // And now we can use it! + + + loop { + + let mut rx_buffer = [0; 8192]; + let mut tls_read_buffer = [0; 16640]; + let mut tls_write_buffer = [0; 16640]; + + let client_state = TcpClientState::<1, 1024, 1024>::new(); + let tcp_client = TcpClient::new(stack, &client_state); + let dns_client = DnsSocket::new(stack); + let tls_config = TlsConfig::new( + seed, + &mut tls_read_buffer, + &mut tls_write_buffer, + TlsVerify::None, + ); + + let mut http_client = HttpClient::new_with_tls(&tcp_client, &dns_client, tls_config); + let url = "https://worldtimeapi.org/api/timezone/Europe/Berlin"; + // let mut http_client = HttpClient::new(&tcp_client, &dns_client); // for non-TLS requests + // let url = "http://worldtimeapi.org/api/timezone/Europe/Berlin"; + + info!("connecting to {}", &url); + + let mut request = match http_client.request(Method::GET, &url).await { + Ok(req) => req, + Err(e) => { + error!("Failed to make HTTP request: {:?}", e); + return; // handle the error + } + }; + + let response = match request.send(&mut rx_buffer).await { + Ok(resp) => resp, + Err(_e) => { + error!("Failed to send HTTP request"); + return // handle the error; + } + }; + + let body = match from_utf8(response.body().read_to_end().await.unwrap()) { + Ok(b) => b, + Err(_e) => { + error!("Failed to read response body"); + return // handle the error + } + }; + info!("Response body: {:?}", &body); + + // parse the response body and update the RTC + + #[derive(Deserialize)] + struct ApiResponse<'a> { + datetime: &'a str, + // other fields as needed + } + + let bytes = body.as_bytes(); + match serde_json_core::de::from_slice::(bytes) { + Ok((output, _used)) => { + info!("Datetime: {:?}", output.datetime); + } + Err(_e) => { + error!("Failed to parse response body"); + return; // handle the error + } + } + + Timer::after(Duration::from_secs(5)).await; + } +} From b7dd04e3b1004619cffd4e405e1ed5339b008f22 Mon Sep 17 00:00:00 2001 From: Eli Hastings Date: Mon, 24 Jun 2024 10:59:43 +0100 Subject: [PATCH 510/581] Fix typo in README --- embassy-net/README.md | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/embassy-net/README.md b/embassy-net/README.md index ce59ea34a..6b7d46934 100644 --- a/embassy-net/README.md +++ b/embassy-net/README.md @@ -37,7 +37,7 @@ To add `embassy-net` support for new hardware (i.e. a new Ethernet or WiFi chip, an Ethernet/WiFi MCU peripheral), you have to implement the [`embassy-net-driver`](https://crates.io/crates/embassy-net-driver) traits. -Alternatively, [`embassy-net-driver-channel`](https://crates.io/crates/embassy-net-driver-channel) provides a higer-level API +Alternatively, [`embassy-net-driver-channel`](https://crates.io/crates/embassy-net-driver-channel) provides a higher-level API to construct a driver that processes packets in its own background task and communicates with the `embassy-net` task via packet queues for RX and TX. From 32e9867b4e23042fcbc4ec252c60b0af55cc59d7 Mon Sep 17 00:00:00 2001 From: rafael Date: Mon, 24 Jun 2024 20:51:31 +0200 Subject: [PATCH 511/581] need to bring down binary size or flashing will corrupt the device --- examples/rp/Cargo.toml | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/examples/rp/Cargo.toml b/examples/rp/Cargo.toml index 041506a50..0610be0a0 100644 --- a/examples/rp/Cargo.toml +++ b/examples/rp/Cargo.toml @@ -25,7 +25,7 @@ fixed = "1.23.1" fixed-macro = "1.2" # for web request example -reqwless = { version = "0.12.0", features = ["defmt"] } +reqwless = { git = "https://github.com/drogue-iot/reqwless", features = ["defmt",]} serde = { version = "1.0.203", default-features = false, features = ["derive"] } serde-json-core = "0.5.1" @@ -58,3 +58,7 @@ embedded-sdmmc = "0.7.0" [profile.release] debug = 2 + +[profile.dev] +lto = true +opt-level = "z" From 67e7532b4aa61fef52762861084a1a05944db4ea Mon Sep 17 00:00:00 2001 From: rafael Date: Mon, 24 Jun 2024 21:16:56 +0200 Subject: [PATCH 512/581] rustfmt --- examples/rp/src/bin/wifi_webrequest.rs | 25 +++++++++---------------- 1 file changed, 9 insertions(+), 16 deletions(-) diff --git a/examples/rp/src/bin/wifi_webrequest.rs b/examples/rp/src/bin/wifi_webrequest.rs index 350e11bf1..ae3b1e26c 100644 --- a/examples/rp/src/bin/wifi_webrequest.rs +++ b/examples/rp/src/bin/wifi_webrequest.rs @@ -13,17 +13,17 @@ use serde_json_core; use cyw43_pio::PioSpi; use defmt::*; use embassy_executor::Spawner; -use embassy_net::{Config, Stack, StackResources}; -use embassy_net::tcp::client::{TcpClientState, TcpClient}; use embassy_net::dns::DnsSocket; +use embassy_net::tcp::client::{TcpClient, TcpClientState}; +use embassy_net::{Config, Stack, StackResources}; use embassy_rp::bind_interrupts; use embassy_rp::gpio::{Level, Output}; use embassy_rp::peripherals::{DMA_CH0, PIO0}; use embassy_rp::pio::{InterruptHandler, Pio}; use embassy_time::{Duration, Timer}; -use static_cell::StaticCell; use reqwless::client::{HttpClient, TlsConfig, TlsVerify}; use reqwless::request::Method; +use static_cell::StaticCell; use {defmt_rtt as _, panic_probe as _}; bind_interrupts!(struct Irqs { @@ -124,9 +124,7 @@ async fn main(spawner: Spawner) { // And now we can use it! - loop { - let mut rx_buffer = [0; 8192]; let mut tls_read_buffer = [0; 16640]; let mut tls_write_buffer = [0; 16640]; @@ -134,17 +132,12 @@ async fn main(spawner: Spawner) { let client_state = TcpClientState::<1, 1024, 1024>::new(); let tcp_client = TcpClient::new(stack, &client_state); let dns_client = DnsSocket::new(stack); - let tls_config = TlsConfig::new( - seed, - &mut tls_read_buffer, - &mut tls_write_buffer, - TlsVerify::None, - ); - + let tls_config = TlsConfig::new(seed, &mut tls_read_buffer, &mut tls_write_buffer, TlsVerify::None); + let mut http_client = HttpClient::new_with_tls(&tcp_client, &dns_client, tls_config); let url = "https://worldtimeapi.org/api/timezone/Europe/Berlin"; // let mut http_client = HttpClient::new(&tcp_client, &dns_client); // for non-TLS requests - // let url = "http://worldtimeapi.org/api/timezone/Europe/Berlin"; + // let url = "http://worldtimeapi.org/api/timezone/Europe/Berlin"; info!("connecting to {}", &url); @@ -160,7 +153,7 @@ async fn main(spawner: Spawner) { Ok(resp) => resp, Err(_e) => { error!("Failed to send HTTP request"); - return // handle the error; + return; // handle the error; } }; @@ -168,13 +161,13 @@ async fn main(spawner: Spawner) { Ok(b) => b, Err(_e) => { error!("Failed to read response body"); - return // handle the error + return; // handle the error } }; info!("Response body: {:?}", &body); // parse the response body and update the RTC - + #[derive(Deserialize)] struct ApiResponse<'a> { datetime: &'a str, From d05817f89d1d5c0e663cda1710d2eaed4cc8fa53 Mon Sep 17 00:00:00 2001 From: rafael Date: Mon, 24 Jun 2024 21:33:42 +0200 Subject: [PATCH 513/581] rustfmt again --- examples/rp/src/bin/wifi_webrequest.rs | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/examples/rp/src/bin/wifi_webrequest.rs b/examples/rp/src/bin/wifi_webrequest.rs index ae3b1e26c..65b1af055 100644 --- a/examples/rp/src/bin/wifi_webrequest.rs +++ b/examples/rp/src/bin/wifi_webrequest.rs @@ -7,9 +7,6 @@ use core::str::from_utf8; -use serde::Deserialize; -use serde_json_core; - use cyw43_pio::PioSpi; use defmt::*; use embassy_executor::Spawner; @@ -23,8 +20,9 @@ use embassy_rp::pio::{InterruptHandler, Pio}; use embassy_time::{Duration, Timer}; use reqwless::client::{HttpClient, TlsConfig, TlsVerify}; use reqwless::request::Method; +use serde::Deserialize; use static_cell::StaticCell; -use {defmt_rtt as _, panic_probe as _}; +use {defmt_rtt as _, panic_probe as _, serde_json_core}; bind_interrupts!(struct Irqs { PIO0_IRQ_0 => InterruptHandler; From 6dae3c02c02ae25cd2fdb46673948a1c90b14944 Mon Sep 17 00:00:00 2001 From: rafael Date: Mon, 24 Jun 2024 22:08:59 +0200 Subject: [PATCH 514/581] comment the comments --- examples/rp/src/bin/wifi_webrequest.rs | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/examples/rp/src/bin/wifi_webrequest.rs b/examples/rp/src/bin/wifi_webrequest.rs index 65b1af055..50136da32 100644 --- a/examples/rp/src/bin/wifi_webrequest.rs +++ b/examples/rp/src/bin/wifi_webrequest.rs @@ -72,6 +72,7 @@ async fn main(spawner: Spawner) { .await; let config = Config::dhcpv4(Default::default()); + // Use static IP configuration instead of DHCP //let config = embassy_net::Config::ipv4_static(embassy_net::StaticConfigV4 { // address: Ipv4Cidr::new(Ipv4Address::new(192, 168, 69, 2), 24), // dns_servers: Vec::new(), @@ -94,7 +95,7 @@ async fn main(spawner: Spawner) { unwrap!(spawner.spawn(net_task(stack))); loop { - //control.join_open(WIFI_NETWORK).await; + //match control.join_open(WIFI_NETWORK).await { // for open networks match control.join_wpa2(WIFI_NETWORK, WIFI_PASSWORD).await { Ok(_) => break, Err(err) => { @@ -134,7 +135,8 @@ async fn main(spawner: Spawner) { let mut http_client = HttpClient::new_with_tls(&tcp_client, &dns_client, tls_config); let url = "https://worldtimeapi.org/api/timezone/Europe/Berlin"; - // let mut http_client = HttpClient::new(&tcp_client, &dns_client); // for non-TLS requests + // for non-TLS requests, use this instead: + // let mut http_client = HttpClient::new(&tcp_client, &dns_client); // let url = "http://worldtimeapi.org/api/timezone/Europe/Berlin"; info!("connecting to {}", &url); From b927c22ac0af570674315da9a8b77d3e7a7e10ea Mon Sep 17 00:00:00 2001 From: rafael Date: Mon, 24 Jun 2024 22:12:18 +0200 Subject: [PATCH 515/581] rustfmt --- examples/rp/src/bin/wifi_webrequest.rs | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/examples/rp/src/bin/wifi_webrequest.rs b/examples/rp/src/bin/wifi_webrequest.rs index 50136da32..e0c91df53 100644 --- a/examples/rp/src/bin/wifi_webrequest.rs +++ b/examples/rp/src/bin/wifi_webrequest.rs @@ -95,7 +95,7 @@ async fn main(spawner: Spawner) { unwrap!(spawner.spawn(net_task(stack))); loop { - //match control.join_open(WIFI_NETWORK).await { // for open networks + //match control.join_open(WIFI_NETWORK).await { // for open networks match control.join_wpa2(WIFI_NETWORK, WIFI_PASSWORD).await { Ok(_) => break, Err(err) => { @@ -136,7 +136,7 @@ async fn main(spawner: Spawner) { let mut http_client = HttpClient::new_with_tls(&tcp_client, &dns_client, tls_config); let url = "https://worldtimeapi.org/api/timezone/Europe/Berlin"; // for non-TLS requests, use this instead: - // let mut http_client = HttpClient::new(&tcp_client, &dns_client); + // let mut http_client = HttpClient::new(&tcp_client, &dns_client); // let url = "http://worldtimeapi.org/api/timezone/Europe/Berlin"; info!("connecting to {}", &url); From f64dd8228b7b8a570546ffa9b522ae85145cfdef Mon Sep 17 00:00:00 2001 From: seth Date: Mon, 24 Jun 2024 17:09:43 -0700 Subject: [PATCH 516/581] new PR, taking Dirbao's advice to make the DMA impl in a separate struct that consumes Adc to make RingBufferedAdc. Handling overrun similar to RingBufferedUart --- embassy-stm32/build.rs | 6 +- embassy-stm32/src/adc/mod.rs | 2 + embassy-stm32/src/adc/ringbuffered_v2.rs | 376 +++++++++++++++++++++++ embassy-stm32/src/adc/v2.rs | 3 + examples/stm32f4/src/bin/adc_dma.rs | 59 ++++ 5 files changed, 445 insertions(+), 1 deletion(-) create mode 100644 embassy-stm32/src/adc/ringbuffered_v2.rs create mode 100644 examples/stm32f4/src/bin/adc_dma.rs diff --git a/embassy-stm32/build.rs b/embassy-stm32/build.rs index 6aedcc228..24e2226a2 100644 --- a/embassy-stm32/build.rs +++ b/embassy-stm32/build.rs @@ -764,7 +764,7 @@ fn main() { #[rustfmt::skip] let signals: HashMap<_, _> = [ - // (kind, signal) => trait + // (kind, signal) => trait (("ucpd", "CC1"), quote!(crate::ucpd::Cc1Pin)), (("ucpd", "CC2"), quote!(crate::ucpd::Cc2Pin)), (("usart", "TX"), quote!(crate::usart::TxPin)), @@ -1178,6 +1178,10 @@ fn main() { let signals: HashMap<_, _> = [ // (kind, signal) => trait + (("adc", "ADC"), quote!(crate::adc::RxDma)), + (("adc", "ADC1"), quote!(crate::adc::RxDma)), + (("adc", "ADC2"), quote!(crate::adc::RxDma)), + (("adc", "ADC3"), quote!(crate::adc::RxDma)), (("ucpd", "RX"), quote!(crate::ucpd::RxDma)), (("ucpd", "TX"), quote!(crate::ucpd::TxDma)), (("usart", "RX"), quote!(crate::usart::RxDma)), diff --git a/embassy-stm32/src/adc/mod.rs b/embassy-stm32/src/adc/mod.rs index 0c22a7dae..7a7d7cd8e 100644 --- a/embassy-stm32/src/adc/mod.rs +++ b/embassy-stm32/src/adc/mod.rs @@ -28,6 +28,8 @@ pub use crate::pac::adc::vals::Res as Resolution; pub use crate::pac::adc::vals::SampleTime; use crate::peripherals; +dma_trait!(RxDma, Instance); + /// Analog to Digital driver. pub struct Adc<'d, T: Instance> { #[allow(unused)] diff --git a/embassy-stm32/src/adc/ringbuffered_v2.rs b/embassy-stm32/src/adc/ringbuffered_v2.rs new file mode 100644 index 000000000..e11311b9a --- /dev/null +++ b/embassy-stm32/src/adc/ringbuffered_v2.rs @@ -0,0 +1,376 @@ +use core::marker::PhantomData; +use core::mem; +use core::sync::atomic::{compiler_fence, Ordering}; + +use embassy_hal_internal::{into_ref, Peripheral}; +use stm32_metapac::adc::vals::SampleTime; + +use crate::adc::{Adc, AdcChannel, Instance, RxDma}; +use crate::dma::ringbuffer::OverrunError; +use crate::dma::{Priority, ReadableRingBuffer, TransferOptions}; +use crate::pac::adc::vals; +use crate::rcc; + +fn clear_interrupt_flags(r: crate::pac::adc::Adc) { + r.sr().modify(|regs| { + regs.set_eoc(false); + regs.set_ovr(false); + }); +} + +#[derive(PartialOrd, PartialEq, Debug, Clone, Copy)] +pub enum Sequence { + One, + Two, + Three, + Four, + Five, + Six, + Seven, + Eight, + Nine, + Ten, + Eleven, + Twelve, + Thirteen, + Fourteen, + Fifteen, + Sixteen, +} + +impl From for u8 { + fn from(s: Sequence) -> u8 { + match s { + Sequence::One => 0, + Sequence::Two => 1, + Sequence::Three => 2, + Sequence::Four => 3, + Sequence::Five => 4, + Sequence::Six => 5, + Sequence::Seven => 6, + Sequence::Eight => 7, + Sequence::Nine => 8, + Sequence::Ten => 9, + Sequence::Eleven => 10, + Sequence::Twelve => 11, + Sequence::Thirteen => 12, + Sequence::Fourteen => 13, + Sequence::Fifteen => 14, + Sequence::Sixteen => 15, + } + } +} + +impl From for Sequence { + fn from(val: u8) -> Self { + match val { + 0 => Sequence::One, + 1 => Sequence::Two, + 2 => Sequence::Three, + 3 => Sequence::Four, + 4 => Sequence::Five, + 5 => Sequence::Six, + 6 => Sequence::Seven, + 7 => Sequence::Eight, + 8 => Sequence::Nine, + 9 => Sequence::Ten, + 10 => Sequence::Eleven, + 11 => Sequence::Twelve, + 12 => Sequence::Thirteen, + 13 => Sequence::Fourteen, + 14 => Sequence::Fifteen, + 15 => Sequence::Sixteen, + _ => panic!("Invalid sequence number"), + } + } +} + +pub struct RingBufferedAdc<'d, T: Instance> { + _phantom: PhantomData, + ring_buf: ReadableRingBuffer<'d, u16>, +} + +impl<'d, T: Instance> Adc<'d, T> { + pub fn into_ring_buffered( + self, + dma: impl Peripheral

> + 'd, + dma_buf: &'d mut [u16], + ) -> RingBufferedAdc<'d, T> { + assert!(!dma_buf.is_empty() && dma_buf.len() <= 0xFFFF); + into_ref!(dma); + + let opts: crate::dma::TransferOptions = TransferOptions { + half_transfer_ir: true, + priority: Priority::VeryHigh, + ..Default::default() + }; + + // Safety: we forget the struct before this function returns. + let rx_src = T::regs().dr().as_ptr() as *mut u16; + let request = dma.request(); + + let ring_buf = unsafe { ReadableRingBuffer::new(dma, request, rx_src, dma_buf, opts) }; + + // Don't disable the clock + mem::forget(self); + + RingBufferedAdc { + _phantom: PhantomData, + ring_buf, + } + } +} + +impl<'d, T: Instance> RingBufferedAdc<'d, T> { + fn is_on() -> bool { + T::regs().cr2().read().adon() + } + + fn stop_adc() { + T::regs().cr2().modify(|reg| { + reg.set_adon(false); + }); + } + + fn start_adc() { + T::regs().cr2().modify(|reg| { + reg.set_adon(true); + }); + } + + /// Sets the channel sample time + /// + /// ## SAFETY: + /// - ADON == 0 i.e ADC must not be enabled when this is called. + unsafe fn set_channel_sample_time(ch: u8, sample_time: SampleTime) { + if ch <= 9 { + T::regs().smpr2().modify(|reg| reg.set_smp(ch as _, sample_time)); + } else { + T::regs().smpr1().modify(|reg| reg.set_smp((ch - 10) as _, sample_time)); + } + } + + fn set_channels_sample_time(&mut self, ch: &[u8], sample_time: SampleTime) { + let ch_iter = ch.iter(); + for idx in ch_iter { + unsafe { + Self::set_channel_sample_time(*idx, sample_time); + } + } + } + + pub fn set_sample_sequence( + &mut self, + sequence: Sequence, + channel: &mut impl AdcChannel, + sample_time: SampleTime, + ) { + let was_on = Self::is_on(); + if !was_on { + Self::start_adc(); + } + + //Check the sequence is long enough + T::regs().sqr1().modify(|r| { + let prev: Sequence = r.l().into(); + if prev < sequence { + let new_l: Sequence = sequence; + trace!("Setting sequence length from {:?} to {:?}", prev as u8, new_l as u8); + r.set_l(sequence.into()) + } else { + r.set_l(prev.into()) + } + }); + + //Set this GPIO as an analog input. + channel.setup(); + + //Set the channel in the right sequence field. + match sequence { + Sequence::One => T::regs().sqr3().modify(|w| w.set_sq(0, channel.channel())), + Sequence::Two => T::regs().sqr3().modify(|w| w.set_sq(1, channel.channel())), + Sequence::Three => T::regs().sqr3().modify(|w| w.set_sq(2, channel.channel())), + Sequence::Four => T::regs().sqr3().modify(|w| w.set_sq(3, channel.channel())), + Sequence::Five => T::regs().sqr3().modify(|w| w.set_sq(4, channel.channel())), + Sequence::Six => T::regs().sqr3().modify(|w| w.set_sq(5, channel.channel())), + Sequence::Seven => T::regs().sqr2().modify(|w| w.set_sq(6, channel.channel())), + Sequence::Eight => T::regs().sqr2().modify(|w| w.set_sq(7, channel.channel())), + Sequence::Nine => T::regs().sqr2().modify(|w| w.set_sq(8, channel.channel())), + Sequence::Ten => T::regs().sqr2().modify(|w| w.set_sq(9, channel.channel())), + Sequence::Eleven => T::regs().sqr2().modify(|w| w.set_sq(10, channel.channel())), + Sequence::Twelve => T::regs().sqr2().modify(|w| w.set_sq(11, channel.channel())), + Sequence::Thirteen => T::regs().sqr1().modify(|w| w.set_sq(12, channel.channel())), + Sequence::Fourteen => T::regs().sqr1().modify(|w| w.set_sq(13, channel.channel())), + Sequence::Fifteen => T::regs().sqr1().modify(|w| w.set_sq(14, channel.channel())), + Sequence::Sixteen => T::regs().sqr1().modify(|w| w.set_sq(15, channel.channel())), + }; + + if !was_on { + Self::stop_adc(); + } + + self.set_channels_sample_time(&[channel.channel()], sample_time); + + Self::start_adc(); + } + + pub fn start(&mut self) -> Result<(), OverrunError> { + self.ring_buf.clear(); + + self.setup_adc(); + + Ok(()) + } + + fn stop(&mut self, err: OverrunError) -> Result { + self.teardown_adc(); + Err(err) + } + + pub fn teardown_adc(&mut self) { + // Stop the DMA transfer + self.ring_buf.request_stop(); + + let r = T::regs(); + + // Stop ADC + r.cr2().modify(|reg| { + // Stop ADC + reg.set_swstart(false); + // Stop DMA + reg.set_dma(false); + }); + + r.cr1().modify(|w| { + // Disable interrupt for end of conversion + w.set_eocie(false); + // Disable interrupt for overrun + w.set_ovrie(false); + }); + + clear_interrupt_flags(r); + + compiler_fence(Ordering::SeqCst); + } + + fn setup_adc(&mut self) { + compiler_fence(Ordering::SeqCst); + + self.ring_buf.start(); + + let r = T::regs(); + + //Enable ADC + let was_on = Self::is_on(); + if !was_on { + r.cr2().modify(|reg| { + reg.set_adon(false); + reg.set_swstart(false); + }); + } + + // Clear all interrupts + r.sr().modify(|regs| { + regs.set_eoc(false); + regs.set_ovr(false); + regs.set_strt(false); + }); + + r.cr1().modify(|w| { + // Enable interrupt for end of conversion + w.set_eocie(true); + // Enable interrupt for overrun + w.set_ovrie(true); + // Scanning converisons of multiple channels + w.set_scan(true); + // Continuous conversion mode + w.set_discen(false); + }); + + r.cr2().modify(|w| { + // Enable DMA mode + w.set_dma(true); + // Enable continuous conversions + w.set_cont(vals::Cont::CONTINUOUS); + // DMA requests are issues as long as DMA=1 and data are converted. + w.set_dds(vals::Dds::CONTINUOUS); + // EOC flag is set at the end of each conversion. + w.set_eocs(vals::Eocs::EACHCONVERSION); + }); + + //Being ADC conversions + T::regs().cr2().modify(|reg| { + reg.set_adon(true); + reg.set_swstart(true); + }); + + super::blocking_delay_us(3); + } + + /// Read bytes that are readily available in the ring buffer. + /// If no bytes are currently available in the buffer the call waits until the some + /// bytes are available (at least one byte and at most half the buffer size) + /// + /// Background receive is started if `start()` has not been previously called. + /// + /// Receive in the background is terminated if an error is returned. + /// It must then manually be started again by calling `start()` or by re-calling `read()`. + pub async fn read(&mut self, buf: &mut [u16; N]) -> Result { + let r = T::regs(); + + // Start background receive if it was not already started + if !r.cr2().read().dma() { + self.start()?; + } + + // Clear overrun flag if set. + if r.sr().read().ovr() { + r.sr().modify(|regs| { + regs.set_ovr(false); + // regs.set_eoc(false); + }); + // return self.stop(OverrunError); + } + + loop { + match self.ring_buf.read(buf) { + Ok((0, _)) => {} + Ok((len, _)) => { + return Ok(len); + } + Err(_) => { + return self.stop(OverrunError); + } + } + } + } + + pub async fn read_exact(&mut self, buf: &mut [u16; N]) -> Result { + let r = T::regs(); + + // Start background receive if it was not already started + if !r.cr2().read().dma() { + self.start()?; + } + + // Clear overrun flag if set. + if r.sr().read().ovr() { + r.sr().modify(|regs| { + regs.set_ovr(false); + // regs.set_eoc(false); + }); + // return self.stop(OverrunError); + } + match self.ring_buf.read_exact(buf).await { + Ok(len) => Ok(len), + Err(_) => self.stop(OverrunError), + } + } +} + +impl Drop for RingBufferedAdc<'_, T> { + fn drop(&mut self) { + self.teardown_adc(); + rcc::disable::(); + } +} diff --git a/embassy-stm32/src/adc/v2.rs b/embassy-stm32/src/adc/v2.rs index e3175dff5..ddeb7ea79 100644 --- a/embassy-stm32/src/adc/v2.rs +++ b/embassy-stm32/src/adc/v2.rs @@ -6,6 +6,9 @@ use crate::peripherals::ADC1; use crate::time::Hertz; use crate::{rcc, Peripheral}; +mod ringbuffered_v2; +pub use ringbuffered_v2::{RingBufferedAdc, Sequence}; + /// Default VREF voltage used for sample conversion to millivolts. pub const VREF_DEFAULT_MV: u32 = 3300; /// VREF voltage used for factory calibration of VREFINTCAL register. diff --git a/examples/stm32f4/src/bin/adc_dma.rs b/examples/stm32f4/src/bin/adc_dma.rs new file mode 100644 index 000000000..a2611bb6f --- /dev/null +++ b/examples/stm32f4/src/bin/adc_dma.rs @@ -0,0 +1,59 @@ +#![no_std] +#![no_main] +use cortex_m::singleton; +use defmt::*; +use embassy_executor::Spawner; +use embassy_stm32::adc::RingBufferedAdc; +use embassy_stm32::adc::{Adc, SampleTime, Sequence}; +use embassy_time::{Instant, Timer}; +use {defmt_rtt as _, panic_probe as _}; + +#[embassy_executor::main] +async fn main(_spawner: Spawner) { + const ADC_BUF_SIZE: usize = 1024; + let mut p = embassy_stm32::init(Default::default()); + + let adc_data: &mut [u16; ADC_BUF_SIZE] = singleton!(ADCDAT : [u16; ADC_BUF_SIZE] = [0u16; ADC_BUF_SIZE]).unwrap(); + + let adc = Adc::new(p.ADC1); + + let mut adc: RingBufferedAdc = adc.into_ring_buffered(p.DMA2_CH0, adc_data); + + adc.set_sample_sequence(Sequence::One, &mut p.PA0, SampleTime::CYCLES112); + adc.set_sample_sequence(Sequence::Two, &mut p.PA2, SampleTime::CYCLES112); + adc.set_sample_sequence(Sequence::Three, &mut p.PA1, SampleTime::CYCLES112); + adc.set_sample_sequence(Sequence::Four, &mut p.PA3, SampleTime::CYCLES112); + + // Note that overrun is a big consideration in this implementation. Whatever task is running the adc.read() calls absolutely must circle back around + // to the adc.read() call before the DMA buffer is wrapped around > 1 time. At this point, the overrun is so significant that the context of + // what channel is at what index is lost. The buffer must be cleared and reset. This *is* handled here, but allowing this to happen will cause + // a reduction of performance as each time the buffer is reset, the adc & dma buffer must be restarted. + + // An interrupt executor with a higher priority than other tasks may be a good approach here, allowing this task to wake and read the buffer most + // frequently. + let mut tic = Instant::now(); + let mut buffer1: [u16; 256] = [0u16; 256]; + let _ = adc.start(); + loop { + match adc.read(&mut buffer1).await { + Ok(_data) => { + let toc = Instant::now(); + info!( + "\n adc1: {} dt = {}, n = {}", + buffer1[0..16], + (toc - tic).as_micros(), + _data + ); + tic = toc; + } + Err(e) => { + warn!("Error: {:?}", e); + buffer1 = [0u16; 256]; + let _ = adc.start(); + continue; + } + } + + Timer::after_micros(300).await; + } +} From 27b83fdbcfe7e9e64a8b65fdcb8dc82d6dc3e58c Mon Sep 17 00:00:00 2001 From: seth Date: Mon, 24 Jun 2024 17:15:16 -0700 Subject: [PATCH 517/581] fmt --- examples/stm32f4/src/bin/adc_dma.rs | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/examples/stm32f4/src/bin/adc_dma.rs b/examples/stm32f4/src/bin/adc_dma.rs index a2611bb6f..88822a507 100644 --- a/examples/stm32f4/src/bin/adc_dma.rs +++ b/examples/stm32f4/src/bin/adc_dma.rs @@ -3,8 +3,7 @@ use cortex_m::singleton; use defmt::*; use embassy_executor::Spawner; -use embassy_stm32::adc::RingBufferedAdc; -use embassy_stm32::adc::{Adc, SampleTime, Sequence}; +use embassy_stm32::adc::{Adc, RingBufferedAdc, SampleTime, Sequence}; use embassy_time::{Instant, Timer}; use {defmt_rtt as _, panic_probe as _}; @@ -14,7 +13,7 @@ async fn main(_spawner: Spawner) { let mut p = embassy_stm32::init(Default::default()); let adc_data: &mut [u16; ADC_BUF_SIZE] = singleton!(ADCDAT : [u16; ADC_BUF_SIZE] = [0u16; ADC_BUF_SIZE]).unwrap(); - + let adc = Adc::new(p.ADC1); let mut adc: RingBufferedAdc = adc.into_ring_buffered(p.DMA2_CH0, adc_data); From 7056783fa23eb25629e1e57da0021916a073a432 Mon Sep 17 00:00:00 2001 From: seth Date: Mon, 24 Jun 2024 17:53:59 -0700 Subject: [PATCH 518/581] second adc added to example + API todos completed --- embassy-stm32/src/adc/ringbuffered_v2.rs | 14 +++-------- examples/stm32f4/src/bin/adc_dma.rs | 32 +++++++++++++++++++----- 2 files changed, 29 insertions(+), 17 deletions(-) diff --git a/embassy-stm32/src/adc/ringbuffered_v2.rs b/embassy-stm32/src/adc/ringbuffered_v2.rs index e11311b9a..8c5eb9672 100644 --- a/embassy-stm32/src/adc/ringbuffered_v2.rs +++ b/embassy-stm32/src/adc/ringbuffered_v2.rs @@ -315,7 +315,7 @@ impl<'d, T: Instance> RingBufferedAdc<'d, T> { /// /// Receive in the background is terminated if an error is returned. /// It must then manually be started again by calling `start()` or by re-calling `read()`. - pub async fn read(&mut self, buf: &mut [u16; N]) -> Result { + pub fn read(&mut self, buf: &mut [u16; N]) -> Result { let r = T::regs(); // Start background receive if it was not already started @@ -325,11 +325,7 @@ impl<'d, T: Instance> RingBufferedAdc<'d, T> { // Clear overrun flag if set. if r.sr().read().ovr() { - r.sr().modify(|regs| { - regs.set_ovr(false); - // regs.set_eoc(false); - }); - // return self.stop(OverrunError); + return self.stop(OverrunError); } loop { @@ -355,11 +351,7 @@ impl<'d, T: Instance> RingBufferedAdc<'d, T> { // Clear overrun flag if set. if r.sr().read().ovr() { - r.sr().modify(|regs| { - regs.set_ovr(false); - // regs.set_eoc(false); - }); - // return self.stop(OverrunError); + return self.stop(OverrunError); } match self.ring_buf.read_exact(buf).await { Ok(len) => Ok(len), diff --git a/examples/stm32f4/src/bin/adc_dma.rs b/examples/stm32f4/src/bin/adc_dma.rs index 88822a507..dd19caf1d 100644 --- a/examples/stm32f4/src/bin/adc_dma.rs +++ b/examples/stm32f4/src/bin/adc_dma.rs @@ -13,15 +13,18 @@ async fn main(_spawner: Spawner) { let mut p = embassy_stm32::init(Default::default()); let adc_data: &mut [u16; ADC_BUF_SIZE] = singleton!(ADCDAT : [u16; ADC_BUF_SIZE] = [0u16; ADC_BUF_SIZE]).unwrap(); + let adc_data2: &mut [u16; ADC_BUF_SIZE] = singleton!(ADCDAT2 : [u16; ADC_BUF_SIZE] = [0u16; ADC_BUF_SIZE]).unwrap(); let adc = Adc::new(p.ADC1); + let adc2 = Adc::new(p.ADC2); let mut adc: RingBufferedAdc = adc.into_ring_buffered(p.DMA2_CH0, adc_data); + let mut adc2: RingBufferedAdc = adc2.into_ring_buffered(p.DMA2_CH2, adc_data2); adc.set_sample_sequence(Sequence::One, &mut p.PA0, SampleTime::CYCLES112); adc.set_sample_sequence(Sequence::Two, &mut p.PA2, SampleTime::CYCLES112); - adc.set_sample_sequence(Sequence::Three, &mut p.PA1, SampleTime::CYCLES112); - adc.set_sample_sequence(Sequence::Four, &mut p.PA3, SampleTime::CYCLES112); + adc2.set_sample_sequence(Sequence::One, &mut p.PA1, SampleTime::CYCLES112); + adc2.set_sample_sequence(Sequence::Two, &mut p.PA3, SampleTime::CYCLES112); // Note that overrun is a big consideration in this implementation. Whatever task is running the adc.read() calls absolutely must circle back around // to the adc.read() call before the DMA buffer is wrapped around > 1 time. At this point, the overrun is so significant that the context of @@ -31,10 +34,12 @@ async fn main(_spawner: Spawner) { // An interrupt executor with a higher priority than other tasks may be a good approach here, allowing this task to wake and read the buffer most // frequently. let mut tic = Instant::now(); - let mut buffer1: [u16; 256] = [0u16; 256]; + let mut buffer1 = [0u16; 256]; + let mut buffer2 = [0u16; 256]; let _ = adc.start(); + let _ = adc2.start(); loop { - match adc.read(&mut buffer1).await { + match adc.read_exact(&mut buffer1).await { Ok(_data) => { let toc = Instant::now(); info!( @@ -49,10 +54,25 @@ async fn main(_spawner: Spawner) { warn!("Error: {:?}", e); buffer1 = [0u16; 256]; let _ = adc.start(); - continue; } } - Timer::after_micros(300).await; + match adc2.read_exact(&mut buffer2).await { + Ok(_data) => { + let toc = Instant::now(); + info!( + "\n adc2: {} dt = {}, n = {}", + buffer2[0..16], + (toc - tic).as_micros(), + _data + ); + tic = toc; + } + Err(e) => { + warn!("Error: {:?}", e); + buffer2 = [0u16; 256]; + let _ = adc2.start(); + } + } } } From 6926e9e07154c72d68ef099d5f28178274f86032 Mon Sep 17 00:00:00 2001 From: seth Date: Mon, 24 Jun 2024 23:15:00 -0700 Subject: [PATCH 519/581] CI --- examples/stm32f4/src/bin/adc_dma.rs | 21 +++++++++++++-------- 1 file changed, 13 insertions(+), 8 deletions(-) diff --git a/examples/stm32f4/src/bin/adc_dma.rs b/examples/stm32f4/src/bin/adc_dma.rs index dd19caf1d..992bed573 100644 --- a/examples/stm32f4/src/bin/adc_dma.rs +++ b/examples/stm32f4/src/bin/adc_dma.rs @@ -4,14 +4,19 @@ use cortex_m::singleton; use defmt::*; use embassy_executor::Spawner; use embassy_stm32::adc::{Adc, RingBufferedAdc, SampleTime, Sequence}; -use embassy_time::{Instant, Timer}; +use embassy_stm32::Peripherals; +use embassy_time::Instant; use {defmt_rtt as _, panic_probe as _}; #[embassy_executor::main] -async fn main(_spawner: Spawner) { - const ADC_BUF_SIZE: usize = 1024; - let mut p = embassy_stm32::init(Default::default()); +async fn main(spawner: Spawner) { + let p = embassy_stm32::init(Default::default()); + spawner.must_spawn(adc_task(p)); +} +#[embassy_executor::task] +async fn adc_task(mut p: Peripherals) { + const ADC_BUF_SIZE: usize = 1024; let adc_data: &mut [u16; ADC_BUF_SIZE] = singleton!(ADCDAT : [u16; ADC_BUF_SIZE] = [0u16; ADC_BUF_SIZE]).unwrap(); let adc_data2: &mut [u16; ADC_BUF_SIZE] = singleton!(ADCDAT2 : [u16; ADC_BUF_SIZE] = [0u16; ADC_BUF_SIZE]).unwrap(); @@ -34,8 +39,8 @@ async fn main(_spawner: Spawner) { // An interrupt executor with a higher priority than other tasks may be a good approach here, allowing this task to wake and read the buffer most // frequently. let mut tic = Instant::now(); - let mut buffer1 = [0u16; 256]; - let mut buffer2 = [0u16; 256]; + let mut buffer1 = [0u16; 512]; + let mut buffer2 = [0u16; 512]; let _ = adc.start(); let _ = adc2.start(); loop { @@ -52,7 +57,7 @@ async fn main(_spawner: Spawner) { } Err(e) => { warn!("Error: {:?}", e); - buffer1 = [0u16; 256]; + buffer1 = [0u16; 512]; let _ = adc.start(); } } @@ -70,7 +75,7 @@ async fn main(_spawner: Spawner) { } Err(e) => { warn!("Error: {:?}", e); - buffer2 = [0u16; 256]; + buffer2 = [0u16; 512]; let _ = adc2.start(); } } From 7b9215c8b91a9001d72a2f218b0f9265d82dd3cf Mon Sep 17 00:00:00 2001 From: 9names <60134748+9names@users.noreply.github.com> Date: Tue, 25 Jun 2024 20:33:55 +1000 Subject: [PATCH 520/581] Use published version of reqwless --- examples/rp/Cargo.toml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/examples/rp/Cargo.toml b/examples/rp/Cargo.toml index 0610be0a0..9bd403f02 100644 --- a/examples/rp/Cargo.toml +++ b/examples/rp/Cargo.toml @@ -25,7 +25,7 @@ fixed = "1.23.1" fixed-macro = "1.2" # for web request example -reqwless = { git = "https://github.com/drogue-iot/reqwless", features = ["defmt",]} +reqwless = { version = "0.12.0", features = ["defmt",]} serde = { version = "1.0.203", default-features = false, features = ["derive"] } serde-json-core = "0.5.1" From 14569002816f23d20f7a651ebcfab0a51333aff8 Mon Sep 17 00:00:00 2001 From: 9names <60134748+9names@users.noreply.github.com> Date: Tue, 25 Jun 2024 20:47:27 +1000 Subject: [PATCH 521/581] Replace joke seed with best RNG available --- examples/rp/src/bin/usb_ethernet.rs | 5 ++++- examples/rp/src/bin/wifi_ap_tcp_server.rs | 3 ++- examples/rp/src/bin/wifi_tcp_server.rs | 3 ++- examples/rp/src/bin/wifi_webrequest.rs | 3 ++- 4 files changed, 10 insertions(+), 4 deletions(-) diff --git a/examples/rp/src/bin/usb_ethernet.rs b/examples/rp/src/bin/usb_ethernet.rs index f1b124efa..22dc88d28 100644 --- a/examples/rp/src/bin/usb_ethernet.rs +++ b/examples/rp/src/bin/usb_ethernet.rs @@ -9,6 +9,7 @@ use defmt::*; use embassy_executor::Spawner; use embassy_net::tcp::TcpSocket; use embassy_net::{Stack, StackResources}; +use embassy_rp::clocks::RoscRng; use embassy_rp::peripherals::USB; use embassy_rp::usb::{Driver, InterruptHandler}; use embassy_rp::{bind_interrupts, peripherals}; @@ -16,6 +17,7 @@ use embassy_usb::class::cdc_ncm::embassy_net::{Device, Runner, State as NetState use embassy_usb::class::cdc_ncm::{CdcNcmClass, State}; use embassy_usb::{Builder, Config, UsbDevice}; use embedded_io_async::Write; +use rand::RngCore; use static_cell::StaticCell; use {defmt_rtt as _, panic_probe as _}; @@ -45,6 +47,7 @@ async fn net_task(stack: &'static Stack>) -> ! { #[embassy_executor::main] async fn main(spawner: Spawner) { let p = embassy_rp::init(Default::default()); + let mut rng = RoscRng; // Create the driver, from the HAL. let driver = Driver::new(p.USB, Irqs); @@ -102,7 +105,7 @@ async fn main(spawner: Spawner) { //}); // Generate random seed - let seed = 1234; // guaranteed random, chosen by a fair dice roll + let seed = rng.next_u64(); // Init network stack static STACK: StaticCell>> = StaticCell::new(); diff --git a/examples/rp/src/bin/wifi_ap_tcp_server.rs b/examples/rp/src/bin/wifi_ap_tcp_server.rs index 69ce4e8be..a870a6308 100644 --- a/examples/rp/src/bin/wifi_ap_tcp_server.rs +++ b/examples/rp/src/bin/wifi_ap_tcp_server.rs @@ -40,6 +40,7 @@ async fn main(spawner: Spawner) { info!("Hello World!"); let p = embassy_rp::init(Default::default()); + let mut rng = RoscRng; let fw = include_bytes!("../../../../cyw43-firmware/43439A0.bin"); let clm = include_bytes!("../../../../cyw43-firmware/43439A0_clm.bin"); @@ -74,7 +75,7 @@ async fn main(spawner: Spawner) { }); // Generate random seed - let seed = 0x0123_4567_89ab_cdef; // chosen by fair dice roll. guarenteed to be random. + let seed = rng.next_u64(); // Init network stack static STACK: StaticCell>> = StaticCell::new(); diff --git a/examples/rp/src/bin/wifi_tcp_server.rs b/examples/rp/src/bin/wifi_tcp_server.rs index bbb531807..d77f09290 100644 --- a/examples/rp/src/bin/wifi_tcp_server.rs +++ b/examples/rp/src/bin/wifi_tcp_server.rs @@ -43,6 +43,7 @@ async fn main(spawner: Spawner) { info!("Hello World!"); let p = embassy_rp::init(Default::default()); + let mut rng = RoscRng; let fw = include_bytes!("../../../../cyw43-firmware/43439A0.bin"); let clm = include_bytes!("../../../../cyw43-firmware/43439A0_clm.bin"); @@ -77,7 +78,7 @@ async fn main(spawner: Spawner) { //}); // Generate random seed - let seed = 0x0123_4567_89ab_cdef; // chosen by fair dice roll. guarenteed to be random. + let seed = rng.next_u64(); // Init network stack static STACK: StaticCell>> = StaticCell::new(); diff --git a/examples/rp/src/bin/wifi_webrequest.rs b/examples/rp/src/bin/wifi_webrequest.rs index e0c91df53..319785923 100644 --- a/examples/rp/src/bin/wifi_webrequest.rs +++ b/examples/rp/src/bin/wifi_webrequest.rs @@ -46,6 +46,7 @@ async fn main(spawner: Spawner) { info!("Hello World!"); let p = embassy_rp::init(Default::default()); + let mut rng = RoscRng; let fw = include_bytes!("../../../../cyw43-firmware/43439A0.bin"); let clm = include_bytes!("../../../../cyw43-firmware/43439A0_clm.bin"); @@ -80,7 +81,7 @@ async fn main(spawner: Spawner) { //}); // Generate random seed - let seed = 0x0123_4567_89ab_cdef; // chosen by fair dice roll. guarenteed to be random. + let seed = rng.next_u64(); // Init network stack static STACK: StaticCell>> = StaticCell::new(); From 080b5869dad3d2eca9b290c11cdbf4c0e38b6463 Mon Sep 17 00:00:00 2001 From: 9names <60134748+9names@users.noreply.github.com> Date: Tue, 25 Jun 2024 21:07:09 +1000 Subject: [PATCH 522/581] Fix rngcore imports in examples --- examples/rp/src/bin/wifi_ap_tcp_server.rs | 2 ++ examples/rp/src/bin/wifi_tcp_server.rs | 2 ++ examples/rp/src/bin/wifi_webrequest.rs | 2 ++ 3 files changed, 6 insertions(+) diff --git a/examples/rp/src/bin/wifi_ap_tcp_server.rs b/examples/rp/src/bin/wifi_ap_tcp_server.rs index a870a6308..4fc2690e3 100644 --- a/examples/rp/src/bin/wifi_ap_tcp_server.rs +++ b/examples/rp/src/bin/wifi_ap_tcp_server.rs @@ -13,11 +13,13 @@ use embassy_executor::Spawner; use embassy_net::tcp::TcpSocket; use embassy_net::{Config, Stack, StackResources}; use embassy_rp::bind_interrupts; +use embassy_rp::clocks::RoscRng; use embassy_rp::gpio::{Level, Output}; use embassy_rp::peripherals::{DMA_CH0, PIO0}; use embassy_rp::pio::{InterruptHandler, Pio}; use embassy_time::Duration; use embedded_io_async::Write; +use rand::RngCore; use static_cell::StaticCell; use {defmt_rtt as _, panic_probe as _}; diff --git a/examples/rp/src/bin/wifi_tcp_server.rs b/examples/rp/src/bin/wifi_tcp_server.rs index d77f09290..5575df677 100644 --- a/examples/rp/src/bin/wifi_tcp_server.rs +++ b/examples/rp/src/bin/wifi_tcp_server.rs @@ -13,11 +13,13 @@ use embassy_executor::Spawner; use embassy_net::tcp::TcpSocket; use embassy_net::{Config, Stack, StackResources}; use embassy_rp::bind_interrupts; +use embassy_rp::clocks::RoscRng; use embassy_rp::gpio::{Level, Output}; use embassy_rp::peripherals::{DMA_CH0, PIO0}; use embassy_rp::pio::{InterruptHandler, Pio}; use embassy_time::{Duration, Timer}; use embedded_io_async::Write; +use rand::RngCore; use static_cell::StaticCell; use {defmt_rtt as _, panic_probe as _}; diff --git a/examples/rp/src/bin/wifi_webrequest.rs b/examples/rp/src/bin/wifi_webrequest.rs index 319785923..70b6f0949 100644 --- a/examples/rp/src/bin/wifi_webrequest.rs +++ b/examples/rp/src/bin/wifi_webrequest.rs @@ -14,10 +14,12 @@ use embassy_net::dns::DnsSocket; use embassy_net::tcp::client::{TcpClient, TcpClientState}; use embassy_net::{Config, Stack, StackResources}; use embassy_rp::bind_interrupts; +use embassy_rp::clocks::RoscRng; use embassy_rp::gpio::{Level, Output}; use embassy_rp::peripherals::{DMA_CH0, PIO0}; use embassy_rp::pio::{InterruptHandler, Pio}; use embassy_time::{Duration, Timer}; +use rand::RngCore; use reqwless::client::{HttpClient, TlsConfig, TlsVerify}; use reqwless::request::Method; use serde::Deserialize; From 92343551aa624229137f7f3a14ebb1dac4639a21 Mon Sep 17 00:00:00 2001 From: Dion Dokter Date: Tue, 25 Jun 2024 14:31:15 +0200 Subject: [PATCH 523/581] RP: add option to provide your own boot2 --- embassy-rp/Cargo.toml | 8 ++++++++ embassy-rp/src/lib.rs | 1 + 2 files changed, 9 insertions(+) diff --git a/embassy-rp/Cargo.toml b/embassy-rp/Cargo.toml index 3ba6fe2e7..4f026335f 100644 --- a/embassy-rp/Cargo.toml +++ b/embassy-rp/Cargo.toml @@ -79,6 +79,14 @@ boot2-ram-memcpy = [] boot2-w25q080 = [] ## Use boot2 with support for Winbond W25X10CL SPI flash. boot2-w25x10cl = [] +## Have embassy not provide the boot2 so you can use your own. +## Place your own in the ".boot2" section like: +## ``` +## #[link_section = ".boot2"] +## #[used] +## static BOOT2: [u8; 256] = ...; +## ``` +boot2-none = [] [dependencies] embassy-sync = { version = "0.6.0", path = "../embassy-sync" } diff --git a/embassy-rp/src/lib.rs b/embassy-rp/src/lib.rs index 507d42280..b7e386d4f 100644 --- a/embassy-rp/src/lib.rs +++ b/embassy-rp/src/lib.rs @@ -226,6 +226,7 @@ macro_rules! select_bootloader { } } +#[cfg(not(feature = "boot2-none"))] select_bootloader! { "boot2-at25sf128a" => BOOT_LOADER_AT25SF128A, "boot2-gd25q64cs" => BOOT_LOADER_GD25Q64CS, From 957be1980d721bbae1b7819b81b798051887ac7c Mon Sep 17 00:00:00 2001 From: Dion Dokter Date: Tue, 25 Jun 2024 14:43:30 +0200 Subject: [PATCH 524/581] Fix syntax error? --- embassy-rp/Cargo.toml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/embassy-rp/Cargo.toml b/embassy-rp/Cargo.toml index 4f026335f..447c96b4d 100644 --- a/embassy-rp/Cargo.toml +++ b/embassy-rp/Cargo.toml @@ -84,7 +84,7 @@ boot2-w25x10cl = [] ## ``` ## #[link_section = ".boot2"] ## #[used] -## static BOOT2: [u8; 256] = ...; +## static BOOT2: [u8; 256] = [0; 256]; // Provide your own with e.g. include_bytes! ## ``` boot2-none = [] From 5dbc53167195c9cacad1f1968e30b2bff17bf71d Mon Sep 17 00:00:00 2001 From: Dion Dokter Date: Tue, 25 Jun 2024 16:54:34 +0200 Subject: [PATCH 525/581] RP: Shut up missed warning boot2-none --- embassy-rp/src/lib.rs | 1 + 1 file changed, 1 insertion(+) diff --git a/embassy-rp/src/lib.rs b/embassy-rp/src/lib.rs index b7e386d4f..471e7f8b1 100644 --- a/embassy-rp/src/lib.rs +++ b/embassy-rp/src/lib.rs @@ -210,6 +210,7 @@ embassy_hal_internal::peripherals! { BOOTSEL, } +#[cfg(not(feature = "boot2-none"))] macro_rules! select_bootloader { ( $( $feature:literal => $loader:ident, )+ default => $default:ident ) => { $( From cab17434d5411558e7fb9f260665ec8da88118a9 Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Tue, 25 Jun 2024 22:27:56 +0200 Subject: [PATCH 526/581] tests/nrf: unify, add nrf52832, nrf52833, nrf5340, nrf9160 --- ci.sh | 8 +- tests/{nrf52840 => nrf}/.cargo/config.toml | 2 + tests/nrf/Cargo.toml | 98 +++++++++++++++++++ tests/nrf/build.rs | 37 +++++++ tests/nrf/gen_test.py | 44 +++++++++ tests/nrf/memory-nrf51422.x | 5 + tests/nrf/memory-nrf52832.x | 5 + tests/nrf/memory-nrf52833.x | 5 + .../memory.x => nrf/memory-nrf52840.x} | 0 tests/nrf/memory-nrf5340.x | 5 + tests/nrf/memory-nrf9160.x | 5 + .../src/bin/buffered_uart.rs | 1 + .../src/bin/buffered_uart_full.rs | 1 + .../src/bin/buffered_uart_halves.rs | 1 + .../src/bin/buffered_uart_spam.rs | 1 + .../src/bin/ethernet_enc28j60_perf.rs | 1 + tests/{nrf51422 => nrf}/src/bin/gpio.rs | 9 +- tests/{nrf51422 => nrf}/src/bin/gpiote.rs | 11 ++- tests/{nrf51422 => nrf}/src/bin/timer.rs | 4 +- .../src/bin/wifi_esp_hosted_perf.rs | 1 + tests/nrf/src/common.rs | 65 ++++++++++++ tests/nrf51422/.cargo/config.toml | 9 -- tests/nrf51422/Cargo.toml | 23 ----- tests/nrf51422/build.rs | 17 ---- tests/nrf51422/memory.x | 5 - tests/nrf52840/Cargo.toml | 29 ------ tests/nrf52840/build.rs | 17 ---- tests/nrf52840/src/bin/timer.rs | 24 ----- 28 files changed, 298 insertions(+), 135 deletions(-) rename tests/{nrf52840 => nrf}/.cargo/config.toml (80%) create mode 100644 tests/nrf/Cargo.toml create mode 100644 tests/nrf/build.rs create mode 100644 tests/nrf/gen_test.py create mode 100644 tests/nrf/memory-nrf51422.x create mode 100644 tests/nrf/memory-nrf52832.x create mode 100644 tests/nrf/memory-nrf52833.x rename tests/{nrf52840/memory.x => nrf/memory-nrf52840.x} (100%) create mode 100644 tests/nrf/memory-nrf5340.x create mode 100644 tests/nrf/memory-nrf9160.x rename tests/{nrf52840 => nrf}/src/bin/buffered_uart.rs (98%) rename tests/{nrf52840 => nrf}/src/bin/buffered_uart_full.rs (98%) rename tests/{nrf52840 => nrf}/src/bin/buffered_uart_halves.rs (98%) rename tests/{nrf52840 => nrf}/src/bin/buffered_uart_spam.rs (98%) rename tests/{nrf52840 => nrf}/src/bin/ethernet_enc28j60_perf.rs (98%) rename tests/{nrf51422 => nrf}/src/bin/gpio.rs (71%) rename tests/{nrf51422 => nrf}/src/bin/gpiote.rs (80%) rename tests/{nrf51422 => nrf}/src/bin/timer.rs (93%) rename tests/{nrf52840 => nrf}/src/bin/wifi_esp_hosted_perf.rs (99%) create mode 100644 tests/nrf/src/common.rs delete mode 100644 tests/nrf51422/.cargo/config.toml delete mode 100644 tests/nrf51422/Cargo.toml delete mode 100644 tests/nrf51422/build.rs delete mode 100644 tests/nrf51422/memory.x delete mode 100644 tests/nrf52840/Cargo.toml delete mode 100644 tests/nrf52840/build.rs delete mode 100644 tests/nrf52840/src/bin/timer.rs diff --git a/ci.sh b/ci.sh index 36a6dea30..04877dcd3 100755 --- a/ci.sh +++ b/ci.sh @@ -258,8 +258,12 @@ cargo batch \ --- build --release --manifest-path tests/stm32/Cargo.toml --target thumbv8m.main-none-eabihf --features stm32h503rb --out-dir out/tests/stm32h503rb \ --- build --release --manifest-path tests/stm32/Cargo.toml --target thumbv6m-none-eabi --features stm32u083rc --out-dir out/tests/stm32u083rc \ --- build --release --manifest-path tests/rp/Cargo.toml --target thumbv6m-none-eabi --out-dir out/tests/rpi-pico \ - --- build --release --manifest-path tests/nrf52840/Cargo.toml --target thumbv7em-none-eabi --out-dir out/tests/nrf52840-dk \ - --- build --release --manifest-path tests/nrf51422/Cargo.toml --target thumbv6m-none-eabi --out-dir out/tests/nrf51-dk \ + --- build --release --manifest-path tests/nrf/Cargo.toml --target thumbv6m-none-eabi --features nrf51422 --out-dir out/tests/nrf51422-dk \ + --- build --release --manifest-path tests/nrf/Cargo.toml --target thumbv7em-none-eabi --features nrf52832 --out-dir out/tests/nrf52832-dk \ + --- build --release --manifest-path tests/nrf/Cargo.toml --target thumbv7em-none-eabi --features nrf52833 --out-dir out/tests/nrf52833-dk \ + --- build --release --manifest-path tests/nrf/Cargo.toml --target thumbv7em-none-eabi --features nrf52840 --out-dir out/tests/nrf52840-dk \ + --- build --release --manifest-path tests/nrf/Cargo.toml --target thumbv8m.main-none-eabihf --features nrf5340 --out-dir out/tests/nrf5340-dk \ + --- build --release --manifest-path tests/nrf/Cargo.toml --target thumbv8m.main-none-eabihf --features nrf9160 --out-dir out/tests/nrf9160-dk \ --- build --release --manifest-path tests/riscv32/Cargo.toml --target riscv32imac-unknown-none-elf \ $BUILD_EXTRA diff --git a/tests/nrf52840/.cargo/config.toml b/tests/nrf/.cargo/config.toml similarity index 80% rename from tests/nrf52840/.cargo/config.toml rename to tests/nrf/.cargo/config.toml index 9d6b0313a..8f9bccbc0 100644 --- a/tests/nrf52840/.cargo/config.toml +++ b/tests/nrf/.cargo/config.toml @@ -3,7 +3,9 @@ runner = "teleprobe client run" [build] +#target = "thumbv6m-none-eabi" target = "thumbv7em-none-eabi" +#target = "thumbv8m.main-none-eabihf" [env] DEFMT_LOG = "trace,embassy_hal_internal=debug,embassy_net_esp_hosted=debug,smoltcp=info" diff --git a/tests/nrf/Cargo.toml b/tests/nrf/Cargo.toml new file mode 100644 index 000000000..2faee70e3 --- /dev/null +++ b/tests/nrf/Cargo.toml @@ -0,0 +1,98 @@ +[package] +edition = "2021" +name = "embassy-nrf-examples" +version = "0.1.0" +license = "MIT OR Apache-2.0" + +[dependencies] +teleprobe-meta = "1" + +embassy-futures = { version = "0.1.0", path = "../../embassy-futures" } +embassy-sync = { version = "0.6.0", path = "../../embassy-sync", features = ["defmt", ] } +embassy-executor = { version = "0.5.0", path = "../../embassy-executor", features = ["arch-cortex-m", "executor-thread", "defmt", "task-arena-size-16384", "integrated-timers"] } +embassy-time = { version = "0.3.1", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime"] } +embassy-nrf = { version = "0.1.0", path = "../../embassy-nrf", features = ["defmt", "time-driver-rtc1", "gpiote", "unstable-pac"] } +embedded-io-async = { version = "0.6.1", features = ["defmt-03"] } +embassy-net = { version = "0.4.0", path = "../../embassy-net", features = ["defmt", "tcp", "dhcpv4", "medium-ethernet", ] } +embassy-net-esp-hosted = { version = "0.1.0", path = "../../embassy-net-esp-hosted", features = ["defmt"] } +embassy-net-enc28j60 = { version = "0.1.0", path = "../../embassy-net-enc28j60", features = ["defmt"] } +embedded-hal-async = { version = "1.0" } +embedded-hal-bus = { version = "0.1", features = ["async"] } +static_cell = "2" +perf-client = { path = "../perf-client" } + +defmt = "0.3" +defmt-rtt = "0.4" + +cortex-m = { version = "0.7.6", features = ["critical-section-single-core"] } +cortex-m-rt = "0.7.0" +panic-probe = { version = "0.3", features = ["print-defmt"] } +portable-atomic = { version = "1.6.0" } + +[features] +nrf51422 = ["embassy-nrf/nrf51", "portable-atomic/unsafe-assume-single-core"] +nrf52832 = ["embassy-nrf/nrf52832", "easydma"] +nrf52833 = ["embassy-nrf/nrf52833", "easydma"] +nrf52840 = ["embassy-nrf/nrf52840", "easydma"] +nrf5340 = ["embassy-nrf/nrf5340-app-s", "easydma"] +nrf9160 = ["embassy-nrf/nrf9160-s", "easydma"] + +easydma = [] + +[profile.release] +codegen-units = 1 +debug = 2 +debug-assertions = false +incremental = false +lto = "fat" +opt-level = 's' +overflow-checks = false + +# BEGIN TESTS +# Generated by gen_test.py. DO NOT EDIT. +[[bin]] +name = "buffered_uart" +path = "src/bin/buffered_uart.rs" +required-features = [ "nrf52840",] + +[[bin]] +name = "buffered_uart_full" +path = "src/bin/buffered_uart_full.rs" +required-features = [ "nrf52840",] + +[[bin]] +name = "buffered_uart_halves" +path = "src/bin/buffered_uart_halves.rs" +required-features = [ "nrf52840",] + +[[bin]] +name = "buffered_uart_spam" +path = "src/bin/buffered_uart_spam.rs" +required-features = [ "nrf52840",] + +[[bin]] +name = "ethernet_enc28j60_perf" +path = "src/bin/ethernet_enc28j60_perf.rs" +required-features = [ "nrf52840",] + +[[bin]] +name = "gpio" +path = "src/bin/gpio.rs" +required-features = [] + +[[bin]] +name = "gpiote" +path = "src/bin/gpiote.rs" +required-features = [] + +[[bin]] +name = "timer" +path = "src/bin/timer.rs" +required-features = [] + +[[bin]] +name = "wifi_esp_hosted_perf" +path = "src/bin/wifi_esp_hosted_perf.rs" +required-features = [ "nrf52840",] + +# END TESTS diff --git a/tests/nrf/build.rs b/tests/nrf/build.rs new file mode 100644 index 000000000..3c15cf10f --- /dev/null +++ b/tests/nrf/build.rs @@ -0,0 +1,37 @@ +use std::error::Error; +use std::path::PathBuf; +use std::{env, fs}; + +fn main() -> Result<(), Box> { + let out = PathBuf::from(env::var("OUT_DIR").unwrap()); + + // copy the right memory.x + #[cfg(feature = "nrf51422")] + let memory_x = include_bytes!("memory-nrf51422.x"); + #[cfg(feature = "nrf52832")] + let memory_x = include_bytes!("memory-nrf52832.x"); + #[cfg(feature = "nrf52833")] + let memory_x = include_bytes!("memory-nrf52833.x"); + #[cfg(feature = "nrf52840")] + let memory_x = include_bytes!("memory-nrf52840.x"); + #[cfg(feature = "nrf5340")] + let memory_x = include_bytes!("memory-nrf5340.x"); + #[cfg(feature = "nrf9160")] + let memory_x = include_bytes!("memory-nrf9160.x"); + fs::write(out.join("memory.x"), memory_x).unwrap(); + + // copy main linker script. + fs::write(out.join("link_ram.x"), include_bytes!("../link_ram_cortex_m.x")).unwrap(); + println!("cargo:rustc-link-search={}", out.display()); + println!("cargo:rerun-if-changed=link_ram.x"); + + println!("cargo:rustc-link-arg-bins=--nmagic"); + #[cfg(feature = "nrf51422")] + println!("cargo:rustc-link-arg-bins=-Tlink.x"); + #[cfg(not(feature = "nrf51422"))] + println!("cargo:rustc-link-arg-bins=-Tlink_ram.x"); + println!("cargo:rustc-link-arg-bins=-Tdefmt.x"); + println!("cargo:rustc-link-arg-bins=-Tteleprobe.x"); + + Ok(()) +} diff --git a/tests/nrf/gen_test.py b/tests/nrf/gen_test.py new file mode 100644 index 000000000..daf714376 --- /dev/null +++ b/tests/nrf/gen_test.py @@ -0,0 +1,44 @@ +import os +import toml +from glob import glob + +abspath = os.path.abspath(__file__) +dname = os.path.dirname(abspath) +os.chdir(dname) + +# ======= load test list +tests = {} +for f in sorted(glob('./src/bin/*.rs')): + name = os.path.splitext(os.path.basename(f))[0] + features = [] + with open(f, 'r') as f: + for line in f: + if line.startswith('// required-features:'): + features = [feature.strip() for feature in line.split(':', 2)[1].strip().split(',')] + + tests[name] = features + +# ========= Update Cargo.toml + +things = { + 'bin': [ + { + 'name': f'{name}', + 'path': f'src/bin/{name}.rs', + 'required-features': features, + } + for name, features in tests.items() + ] +} + +SEPARATOR_START = '# BEGIN TESTS\n' +SEPARATOR_END = '# END TESTS\n' +HELP = '# Generated by gen_test.py. DO NOT EDIT.\n' +with open('Cargo.toml', 'r') as f: + data = f.read() +before, data = data.split(SEPARATOR_START, maxsplit=1) +_, after = data.split(SEPARATOR_END, maxsplit=1) +data = before + SEPARATOR_START + HELP + \ + toml.dumps(things) + SEPARATOR_END + after +with open('Cargo.toml', 'w') as f: + f.write(data) diff --git a/tests/nrf/memory-nrf51422.x b/tests/nrf/memory-nrf51422.x new file mode 100644 index 000000000..c140005ce --- /dev/null +++ b/tests/nrf/memory-nrf51422.x @@ -0,0 +1,5 @@ +MEMORY +{ + FLASH : ORIGIN = 0x00000000, LENGTH = 256K + RAM : ORIGIN = 0x20000000, LENGTH = 32K +} diff --git a/tests/nrf/memory-nrf52832.x b/tests/nrf/memory-nrf52832.x new file mode 100644 index 000000000..c140005ce --- /dev/null +++ b/tests/nrf/memory-nrf52832.x @@ -0,0 +1,5 @@ +MEMORY +{ + FLASH : ORIGIN = 0x00000000, LENGTH = 256K + RAM : ORIGIN = 0x20000000, LENGTH = 32K +} diff --git a/tests/nrf/memory-nrf52833.x b/tests/nrf/memory-nrf52833.x new file mode 100644 index 000000000..a4baa2dc4 --- /dev/null +++ b/tests/nrf/memory-nrf52833.x @@ -0,0 +1,5 @@ +MEMORY +{ + FLASH : ORIGIN = 0x00000000, LENGTH = 512K + RAM : ORIGIN = 0x20000000, LENGTH = 64K +} diff --git a/tests/nrf52840/memory.x b/tests/nrf/memory-nrf52840.x similarity index 100% rename from tests/nrf52840/memory.x rename to tests/nrf/memory-nrf52840.x diff --git a/tests/nrf/memory-nrf5340.x b/tests/nrf/memory-nrf5340.x new file mode 100644 index 000000000..58900a7bd --- /dev/null +++ b/tests/nrf/memory-nrf5340.x @@ -0,0 +1,5 @@ +MEMORY +{ + FLASH : ORIGIN = 0x00000000, LENGTH = 1024K + RAM : ORIGIN = 0x20000000, LENGTH = 256K +} diff --git a/tests/nrf/memory-nrf9160.x b/tests/nrf/memory-nrf9160.x new file mode 100644 index 000000000..58900a7bd --- /dev/null +++ b/tests/nrf/memory-nrf9160.x @@ -0,0 +1,5 @@ +MEMORY +{ + FLASH : ORIGIN = 0x00000000, LENGTH = 1024K + RAM : ORIGIN = 0x20000000, LENGTH = 256K +} diff --git a/tests/nrf52840/src/bin/buffered_uart.rs b/tests/nrf/src/bin/buffered_uart.rs similarity index 98% rename from tests/nrf52840/src/bin/buffered_uart.rs rename to tests/nrf/src/bin/buffered_uart.rs index a01d66d85..89314bfc9 100644 --- a/tests/nrf52840/src/bin/buffered_uart.rs +++ b/tests/nrf/src/bin/buffered_uart.rs @@ -1,3 +1,4 @@ +// required-features: nrf52840 #![no_std] #![no_main] teleprobe_meta::target!(b"nrf52840-dk"); diff --git a/tests/nrf52840/src/bin/buffered_uart_full.rs b/tests/nrf/src/bin/buffered_uart_full.rs similarity index 98% rename from tests/nrf52840/src/bin/buffered_uart_full.rs rename to tests/nrf/src/bin/buffered_uart_full.rs index 62edaed25..a7d9a3717 100644 --- a/tests/nrf52840/src/bin/buffered_uart_full.rs +++ b/tests/nrf/src/bin/buffered_uart_full.rs @@ -1,3 +1,4 @@ +// required-features: nrf52840 #![no_std] #![no_main] teleprobe_meta::target!(b"nrf52840-dk"); diff --git a/tests/nrf52840/src/bin/buffered_uart_halves.rs b/tests/nrf/src/bin/buffered_uart_halves.rs similarity index 98% rename from tests/nrf52840/src/bin/buffered_uart_halves.rs rename to tests/nrf/src/bin/buffered_uart_halves.rs index 54a9fef5b..ae1021f04 100644 --- a/tests/nrf52840/src/bin/buffered_uart_halves.rs +++ b/tests/nrf/src/bin/buffered_uart_halves.rs @@ -1,3 +1,4 @@ +// required-features: nrf52840 #![no_std] #![no_main] teleprobe_meta::target!(b"nrf52840-dk"); diff --git a/tests/nrf52840/src/bin/buffered_uart_spam.rs b/tests/nrf/src/bin/buffered_uart_spam.rs similarity index 98% rename from tests/nrf52840/src/bin/buffered_uart_spam.rs rename to tests/nrf/src/bin/buffered_uart_spam.rs index 400c0df99..906723229 100644 --- a/tests/nrf52840/src/bin/buffered_uart_spam.rs +++ b/tests/nrf/src/bin/buffered_uart_spam.rs @@ -1,3 +1,4 @@ +// required-features: nrf52840 #![no_std] #![no_main] teleprobe_meta::target!(b"nrf52840-dk"); diff --git a/tests/nrf52840/src/bin/ethernet_enc28j60_perf.rs b/tests/nrf/src/bin/ethernet_enc28j60_perf.rs similarity index 98% rename from tests/nrf52840/src/bin/ethernet_enc28j60_perf.rs rename to tests/nrf/src/bin/ethernet_enc28j60_perf.rs index 33c2f4235..5f4220b1e 100644 --- a/tests/nrf52840/src/bin/ethernet_enc28j60_perf.rs +++ b/tests/nrf/src/bin/ethernet_enc28j60_perf.rs @@ -1,3 +1,4 @@ +// required-features: nrf52840 #![no_std] #![no_main] teleprobe_meta::target!(b"ak-gwe-r7"); diff --git a/tests/nrf51422/src/bin/gpio.rs b/tests/nrf/src/bin/gpio.rs similarity index 71% rename from tests/nrf51422/src/bin/gpio.rs rename to tests/nrf/src/bin/gpio.rs index 6d5a87d0a..9e809a694 100644 --- a/tests/nrf51422/src/bin/gpio.rs +++ b/tests/nrf/src/bin/gpio.rs @@ -1,19 +1,20 @@ #![no_std] #![no_main] -teleprobe_meta::target!(b"nrf51-dk"); + +#[path = "../common.rs"] +mod common; use defmt::{assert, info}; use embassy_executor::Spawner; use embassy_nrf::gpio::{Input, Level, Output, OutputDrive, Pull}; use embassy_time::Timer; -use {defmt_rtt as _, panic_probe as _}; #[embassy_executor::main] async fn main(_spawner: Spawner) { let p = embassy_nrf::init(Default::default()); - let input = Input::new(p.P0_13, Pull::Up); - let mut output = Output::new(p.P0_14, Level::Low, OutputDrive::Standard); + let input = Input::new(peri!(p, PIN_A), Pull::Up); + let mut output = Output::new(peri!(p, PIN_B), Level::Low, OutputDrive::Standard); output.set_low(); Timer::after_millis(10).await; diff --git a/tests/nrf51422/src/bin/gpiote.rs b/tests/nrf/src/bin/gpiote.rs similarity index 80% rename from tests/nrf51422/src/bin/gpiote.rs rename to tests/nrf/src/bin/gpiote.rs index 330fe993e..0700016d1 100644 --- a/tests/nrf51422/src/bin/gpiote.rs +++ b/tests/nrf/src/bin/gpiote.rs @@ -1,20 +1,21 @@ #![no_std] #![no_main] -teleprobe_meta::target!(b"nrf51-dk"); + +#[path = "../common.rs"] +mod common; use defmt::{assert, info}; use embassy_executor::Spawner; use embassy_futures::join::join; use embassy_nrf::gpio::{Input, Level, Output, OutputDrive, Pull}; use embassy_time::{Duration, Instant, Timer}; -use {defmt_rtt as _, panic_probe as _}; #[embassy_executor::main] async fn main(_spawner: Spawner) { let p = embassy_nrf::init(Default::default()); - let mut input = Input::new(p.P0_13, Pull::Up); - let mut output = Output::new(p.P0_14, Level::Low, OutputDrive::Standard); + let mut input = Input::new(peri!(p, PIN_A), Pull::Up); + let mut output = Output::new(peri!(p, PIN_B), Level::Low, OutputDrive::Standard); let fut1 = async { Timer::after_millis(100).await; @@ -24,6 +25,7 @@ async fn main(_spawner: Spawner) { let start = Instant::now(); input.wait_for_high().await; let dur = Instant::now() - start; + info!("took {} ms", dur.as_millis()); assert!((Duration::from_millis(90)..Duration::from_millis(110)).contains(&dur)); }; @@ -37,6 +39,7 @@ async fn main(_spawner: Spawner) { let start = Instant::now(); input.wait_for_low().await; let dur = Instant::now() - start; + info!("took {} ms", dur.as_millis()); assert!((Duration::from_millis(90)..Duration::from_millis(110)).contains(&dur)); }; diff --git a/tests/nrf51422/src/bin/timer.rs b/tests/nrf/src/bin/timer.rs similarity index 93% rename from tests/nrf51422/src/bin/timer.rs rename to tests/nrf/src/bin/timer.rs index cf9ea41a8..1ae9dd647 100644 --- a/tests/nrf51422/src/bin/timer.rs +++ b/tests/nrf/src/bin/timer.rs @@ -1,6 +1,8 @@ #![no_std] #![no_main] -teleprobe_meta::target!(b"nrf51-dk"); + +#[path = "../common.rs"] +mod common; use defmt::{assert, info}; use embassy_executor::Spawner; diff --git a/tests/nrf52840/src/bin/wifi_esp_hosted_perf.rs b/tests/nrf/src/bin/wifi_esp_hosted_perf.rs similarity index 99% rename from tests/nrf52840/src/bin/wifi_esp_hosted_perf.rs rename to tests/nrf/src/bin/wifi_esp_hosted_perf.rs index b83edddc4..a6c93c8a6 100644 --- a/tests/nrf52840/src/bin/wifi_esp_hosted_perf.rs +++ b/tests/nrf/src/bin/wifi_esp_hosted_perf.rs @@ -1,3 +1,4 @@ +// required-features: nrf52840 #![no_std] #![no_main] teleprobe_meta::target!(b"nrf52840-dk"); diff --git a/tests/nrf/src/common.rs b/tests/nrf/src/common.rs new file mode 100644 index 000000000..79336c5de --- /dev/null +++ b/tests/nrf/src/common.rs @@ -0,0 +1,65 @@ +#![macro_use] + +use {defmt_rtt as _, panic_probe as _}; + +#[cfg(feature = "nrf52832")] +teleprobe_meta::target!(b"nrf52832-dk"); +#[cfg(feature = "nrf52840")] +teleprobe_meta::target!(b"nrf52840-dk"); +#[cfg(feature = "nrf52833")] +teleprobe_meta::target!(b"nrf52833-dk"); +#[cfg(feature = "nrf5340")] +teleprobe_meta::target!(b"nrf5340-dk"); +#[cfg(feature = "nrf9160")] +teleprobe_meta::target!(b"nrf9160-dk"); +#[cfg(feature = "nrf51422")] +teleprobe_meta::target!(b"nrf51-dk"); + +macro_rules! define_peris { + ($($name:ident = $peri:ident,)* $(@irq $irq_name:ident = $irq_code:tt,)*) => { + #[allow(unused_macros)] + macro_rules! peri { + $( + ($p:expr, $name) => { + $p.$peri + }; + )* + } + #[allow(unused_macros)] + macro_rules! irqs { + $( + ($irq_name) => {{ + embassy_nrf::bind_interrupts!(struct Irqs $irq_code); + Irqs + }}; + )* + ( @ dummy ) => {}; + } + + #[allow(unused)] + #[allow(non_camel_case_types)] + pub mod peris { + $( + pub type $name = embassy_nrf::peripherals::$peri; + )* + } + }; +} + +#[cfg(feature = "nrf51422")] +define_peris!(PIN_A = P0_13, PIN_B = P0_14,); + +#[cfg(feature = "nrf52832")] +define_peris!(PIN_A = P0_11, PIN_B = P0_12,); + +#[cfg(feature = "nrf52833")] +define_peris!(PIN_A = P1_01, PIN_B = P1_02,); + +#[cfg(feature = "nrf52840")] +define_peris!(PIN_A = P1_02, PIN_B = P1_03,); + +#[cfg(feature = "nrf5340")] +define_peris!(PIN_A = P1_00, PIN_B = P1_01,); + +#[cfg(feature = "nrf9160")] +define_peris!(PIN_A = P0_00, PIN_B = P0_01,); diff --git a/tests/nrf51422/.cargo/config.toml b/tests/nrf51422/.cargo/config.toml deleted file mode 100644 index 634805633..000000000 --- a/tests/nrf51422/.cargo/config.toml +++ /dev/null @@ -1,9 +0,0 @@ -[target.'cfg(all(target_arch = "arm", target_os = "none"))'] -#runner = "teleprobe local run --chip nRF51422_xxAA --elf" -runner = "teleprobe client run" - -[build] -target = "thumbv6m-none-eabi" - -[env] -DEFMT_LOG = "trace,embassy_hal_internal=debug" diff --git a/tests/nrf51422/Cargo.toml b/tests/nrf51422/Cargo.toml deleted file mode 100644 index 8bfcc2922..000000000 --- a/tests/nrf51422/Cargo.toml +++ /dev/null @@ -1,23 +0,0 @@ -[package] -edition = "2021" -name = "embassy-nrf51-tests" -version = "0.1.0" -license = "MIT OR Apache-2.0" - -[dependencies] -teleprobe-meta = "1" - -embassy-futures = { version = "0.1.0", path = "../../embassy-futures" } -embassy-sync = { version = "0.6.0", path = "../../embassy-sync", features = ["defmt", ] } -embassy-executor = { version = "0.5.0", path = "../../embassy-executor", features = ["arch-cortex-m", "executor-thread", "defmt", "task-arena-size-128", "integrated-timers"] } -embassy-time = { version = "0.3.1", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime"] } -embassy-nrf = { version = "0.1.0", path = "../../embassy-nrf", features = ["defmt", "nrf51", "time-driver-rtc1", "unstable-pac", "time", "gpiote"] } -embedded-io-async = { version = "0.6.1", features = ["defmt-03"] } -embedded-hal-async = { version = "1.0" } - -defmt = "0.3" -defmt-rtt = "0.4" - -cortex-m = { version = "0.7.6", features = ["critical-section-single-core"] } -cortex-m-rt = "0.7.0" -panic-probe = { version = "0.3", features = ["print-defmt"] } diff --git a/tests/nrf51422/build.rs b/tests/nrf51422/build.rs deleted file mode 100644 index 13ebbe4ee..000000000 --- a/tests/nrf51422/build.rs +++ /dev/null @@ -1,17 +0,0 @@ -use std::error::Error; -use std::path::PathBuf; -use std::{env, fs}; - -fn main() -> Result<(), Box> { - let out = PathBuf::from(env::var("OUT_DIR").unwrap()); - fs::write(out.join("memory.x"), include_bytes!("memory.x")).unwrap(); - println!("cargo:rustc-link-search={}", out.display()); - println!("cargo:rerun-if-changed=memory.x"); - - println!("cargo:rustc-link-arg-bins=--nmagic"); - println!("cargo:rustc-link-arg-bins=-Tlink.x"); - println!("cargo:rustc-link-arg-bins=-Tdefmt.x"); - println!("cargo:rustc-link-arg-bins=-Tteleprobe.x"); - - Ok(()) -} diff --git a/tests/nrf51422/memory.x b/tests/nrf51422/memory.x deleted file mode 100644 index a5881e66f..000000000 --- a/tests/nrf51422/memory.x +++ /dev/null @@ -1,5 +0,0 @@ -MEMORY -{ - FLASH : ORIGIN = 0x00000000, LENGTH = 128K - RAM : ORIGIN = 0x20000000, LENGTH = 16K -} diff --git a/tests/nrf52840/Cargo.toml b/tests/nrf52840/Cargo.toml deleted file mode 100644 index 1670b92ad..000000000 --- a/tests/nrf52840/Cargo.toml +++ /dev/null @@ -1,29 +0,0 @@ -[package] -edition = "2021" -name = "embassy-nrf-examples" -version = "0.1.0" -license = "MIT OR Apache-2.0" - -[dependencies] -teleprobe-meta = "1" - -embassy-futures = { version = "0.1.0", path = "../../embassy-futures" } -embassy-sync = { version = "0.6.0", path = "../../embassy-sync", features = ["defmt", ] } -embassy-executor = { version = "0.5.0", path = "../../embassy-executor", features = ["arch-cortex-m", "executor-thread", "defmt", "task-arena-size-16384", "integrated-timers"] } -embassy-time = { version = "0.3.1", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime"] } -embassy-nrf = { version = "0.1.0", path = "../../embassy-nrf", features = ["defmt", "nrf52840", "time-driver-rtc1", "gpiote", "unstable-pac"] } -embedded-io-async = { version = "0.6.1", features = ["defmt-03"] } -embassy-net = { version = "0.4.0", path = "../../embassy-net", features = ["defmt", "tcp", "dhcpv4", "medium-ethernet", ] } -embassy-net-esp-hosted = { version = "0.1.0", path = "../../embassy-net-esp-hosted", features = ["defmt"] } -embassy-net-enc28j60 = { version = "0.1.0", path = "../../embassy-net-enc28j60", features = ["defmt"] } -embedded-hal-async = { version = "1.0" } -embedded-hal-bus = { version = "0.1", features = ["async"] } -static_cell = "2" -perf-client = { path = "../perf-client" } - -defmt = "0.3" -defmt-rtt = "0.4" - -cortex-m = { version = "0.7.6", features = ["critical-section-single-core"] } -cortex-m-rt = "0.7.0" -panic-probe = { version = "0.3", features = ["print-defmt"] } diff --git a/tests/nrf52840/build.rs b/tests/nrf52840/build.rs deleted file mode 100644 index 71c82a70f..000000000 --- a/tests/nrf52840/build.rs +++ /dev/null @@ -1,17 +0,0 @@ -use std::error::Error; -use std::path::PathBuf; -use std::{env, fs}; - -fn main() -> Result<(), Box> { - let out = PathBuf::from(env::var("OUT_DIR").unwrap()); - fs::write(out.join("link_ram.x"), include_bytes!("../link_ram_cortex_m.x")).unwrap(); - println!("cargo:rustc-link-search={}", out.display()); - println!("cargo:rerun-if-changed=link_ram.x"); - - println!("cargo:rustc-link-arg-bins=--nmagic"); - println!("cargo:rustc-link-arg-bins=-Tlink_ram.x"); - println!("cargo:rustc-link-arg-bins=-Tdefmt.x"); - println!("cargo:rustc-link-arg-bins=-Tteleprobe.x"); - - Ok(()) -} diff --git a/tests/nrf52840/src/bin/timer.rs b/tests/nrf52840/src/bin/timer.rs deleted file mode 100644 index 117947a94..000000000 --- a/tests/nrf52840/src/bin/timer.rs +++ /dev/null @@ -1,24 +0,0 @@ -#![no_std] -#![no_main] -teleprobe_meta::target!(b"nrf52840-dk"); - -use defmt::{assert, info}; -use embassy_executor::Spawner; -use embassy_time::{Instant, Timer}; -use {defmt_rtt as _, panic_probe as _}; - -#[embassy_executor::main] -async fn main(_spawner: Spawner) { - let _p = embassy_nrf::init(Default::default()); - info!("Hello World!"); - - let start = Instant::now(); - Timer::after_millis(100).await; - let end = Instant::now(); - let ms = (end - start).as_millis(); - info!("slept for {} ms", ms); - assert!(ms >= 99); - - info!("Test OK"); - cortex_m::asm::bkpt(); -} From 292dbcc991d83851e9bb50b62e0b3fe5acf241ec Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Tue, 25 Jun 2024 22:28:38 +0200 Subject: [PATCH 527/581] nrf/gpiote: fix port1 on nrf5340 --- embassy-nrf/src/gpiote.rs | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/embassy-nrf/src/gpiote.rs b/embassy-nrf/src/gpiote.rs index d7f075722..a74b3157b 100644 --- a/embassy-nrf/src/gpiote.rs +++ b/embassy-nrf/src/gpiote.rs @@ -19,9 +19,9 @@ const CHANNEL_COUNT: usize = 4; /// Amount of GPIOTE channels in the chip. const CHANNEL_COUNT: usize = 8; -#[cfg(any(feature = "nrf52833", feature = "nrf52840"))] +#[cfg(any(feature = "nrf52833", feature = "nrf52840", feature = "_nrf5340"))] const PIN_COUNT: usize = 48; -#[cfg(not(any(feature = "nrf52833", feature = "nrf52840")))] +#[cfg(not(any(feature = "nrf52833", feature = "nrf52840", feature = "_nrf5340")))] const PIN_COUNT: usize = 32; #[allow(clippy::declare_interior_mutable_const)] @@ -67,9 +67,9 @@ pub(crate) fn init(irq_prio: crate::interrupt::Priority) { // no latched GPIO detect in nrf51. #[cfg(not(feature = "_nrf51"))] { - #[cfg(any(feature = "nrf52833", feature = "nrf52840"))] + #[cfg(any(feature = "nrf52833", feature = "nrf52840", feature = "_nrf5340"))] let ports = unsafe { &[&*pac::P0::ptr(), &*pac::P1::ptr()] }; - #[cfg(not(any(feature = "_nrf51", feature = "nrf52833", feature = "nrf52840")))] + #[cfg(not(any(feature = "_nrf51", feature = "nrf52833", feature = "nrf52840", feature = "_nrf5340")))] let ports = unsafe { &[&*pac::P0::ptr()] }; for &p in ports { @@ -130,9 +130,9 @@ unsafe fn handle_gpiote_interrupt() { if g.events_port.read().bits() != 0 { g.events_port.write(|w| w); - #[cfg(any(feature = "nrf52833", feature = "nrf52840"))] + #[cfg(any(feature = "nrf52833", feature = "nrf52840", feature = "_nrf5340"))] let ports = &[&*pac::P0::ptr(), &*pac::P1::ptr()]; - #[cfg(not(any(feature = "_nrf51", feature = "nrf52833", feature = "nrf52840")))] + #[cfg(not(any(feature = "_nrf51", feature = "nrf52833", feature = "nrf52840", feature = "_nrf5340")))] let ports = &[&*pac::P0::ptr()]; #[cfg(feature = "_nrf51")] let ports = unsafe { &[&*pac::GPIO::ptr()] }; @@ -214,7 +214,7 @@ impl<'d> InputChannel<'d> { InputChannelPolarity::None => w.mode().event().polarity().none(), InputChannelPolarity::Toggle => w.mode().event().polarity().toggle(), }; - #[cfg(any(feature = "nrf52833", feature = "nrf52840"))] + #[cfg(any(feature = "nrf52833", feature = "nrf52840", feature = "_nrf5340"))] w.port().bit(match pin.pin.pin.port() { crate::gpio::Port::Port0 => false, crate::gpio::Port::Port1 => true, @@ -288,7 +288,7 @@ impl<'d> OutputChannel<'d> { OutputChannelPolarity::Clear => w.polarity().hi_to_lo(), OutputChannelPolarity::Toggle => w.polarity().toggle(), }; - #[cfg(any(feature = "nrf52833", feature = "nrf52840"))] + #[cfg(any(feature = "nrf52833", feature = "nrf52840", feature = "_nrf5340"))] w.port().bit(match pin.pin.pin.port() { crate::gpio::Port::Port0 => false, crate::gpio::Port::Port1 => true, From c48547b475eb039a9d30f4c1e03d0c9f65cdec18 Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Mon, 17 Jun 2024 22:50:13 +0200 Subject: [PATCH 528/581] nrf: fix wrong order configuring gpios. Docs say "PSEL.RXD, PSEL.RTS, PSEL.RTS, and PSEL.TXD must only be configured when the UARTE is disabled." For some reason nrf52 doesn't care but nrf91 does. --- embassy-nrf/src/buffered_uarte.rs | 3 +++ embassy-nrf/src/uarte.rs | 5 +++-- 2 files changed, 6 insertions(+), 2 deletions(-) diff --git a/embassy-nrf/src/buffered_uarte.rs b/embassy-nrf/src/buffered_uarte.rs index 385d4015e..071c18760 100644 --- a/embassy-nrf/src/buffered_uarte.rs +++ b/embassy-nrf/src/buffered_uarte.rs @@ -304,6 +304,7 @@ impl<'d, U: UarteInstance, T: TimerInstance> BufferedUarte<'d, U, T> { let tx = BufferedUarteTx::new_innerer(unsafe { peri.clone_unchecked() }, txd, cts, tx_buffer); let rx = BufferedUarteRx::new_innerer(peri, timer, ppi_ch1, ppi_ch2, ppi_group, rxd, rts, rx_buffer); + U::regs().enable.write(|w| w.enable().enabled()); U::Interrupt::pend(); unsafe { U::Interrupt::enable() }; @@ -405,6 +406,7 @@ impl<'d, U: UarteInstance> BufferedUarteTx<'d, U> { let this = Self::new_innerer(peri, txd, cts, tx_buffer); + U::regs().enable.write(|w| w.enable().enabled()); U::Interrupt::pend(); unsafe { U::Interrupt::enable() }; @@ -602,6 +604,7 @@ impl<'d, U: UarteInstance, T: TimerInstance> BufferedUarteRx<'d, U, T> { let this = Self::new_innerer(peri, timer, ppi_ch1, ppi_ch2, ppi_group, rxd, rts, rx_buffer); + U::regs().enable.write(|w| w.enable().enabled()); U::Interrupt::pend(); unsafe { U::Interrupt::enable() }; diff --git a/embassy-nrf/src/uarte.rs b/embassy-nrf/src/uarte.rs index fa0a773a8..4cf193617 100644 --- a/embassy-nrf/src/uarte.rs +++ b/embassy-nrf/src/uarte.rs @@ -221,6 +221,7 @@ impl<'d, T: Instance> Uarte<'d, T> { T::Interrupt::unpend(); unsafe { T::Interrupt::enable() }; + r.enable.write(|w| w.enable().enabled()); let s = T::state(); s.tx_rx_refcount.store(2, Ordering::Relaxed); @@ -319,9 +320,7 @@ pub(crate) fn configure(r: &RegisterBlock, config: Config, hardware_flow_control r.psel.cts.write(|w| w.connect().disconnected()); r.psel.rts.write(|w| w.connect().disconnected()); - // Enable apply_workaround_for_enable_anomaly(r); - r.enable.write(|w| w.enable().enabled()); } impl<'d, T: Instance> UarteTx<'d, T> { @@ -369,6 +368,7 @@ impl<'d, T: Instance> UarteTx<'d, T> { T::Interrupt::unpend(); unsafe { T::Interrupt::enable() }; + r.enable.write(|w| w.enable().enabled()); let s = T::state(); s.tx_rx_refcount.store(1, Ordering::Relaxed); @@ -567,6 +567,7 @@ impl<'d, T: Instance> UarteRx<'d, T> { T::Interrupt::unpend(); unsafe { T::Interrupt::enable() }; + r.enable.write(|w| w.enable().enabled()); let s = T::state(); s.tx_rx_refcount.store(1, Ordering::Relaxed); From 1ce9418bca64b0783f6837256bef451312922717 Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Tue, 25 Jun 2024 23:55:07 +0200 Subject: [PATCH 529/581] nrf/buffered_uart: take into account EASYDMA_SIZE. fixes nrf52832 --- embassy-nrf/src/buffered_uarte.rs | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/embassy-nrf/src/buffered_uarte.rs b/embassy-nrf/src/buffered_uarte.rs index 071c18760..8e4064aaa 100644 --- a/embassy-nrf/src/buffered_uarte.rs +++ b/embassy-nrf/src/buffered_uarte.rs @@ -27,7 +27,7 @@ use crate::ppi::{ }; use crate::timer::{Instance as TimerInstance, Timer}; use crate::uarte::{configure, drop_tx_rx, Config, Instance as UarteInstance}; -use crate::{interrupt, pac, Peripheral}; +use crate::{interrupt, pac, Peripheral, EASY_DMA_SIZE}; pub(crate) struct State { tx_buf: RingBuffer, @@ -186,6 +186,7 @@ impl interrupt::typelevel::Handler for Interrupt // If not TXing, start. if s.tx_count.load(Ordering::Relaxed) == 0 { let (ptr, len) = tx.pop_buf(); + let len = len.min(EASY_DMA_SIZE); if len != 0 { //trace!(" irq_tx: starting {:?}", len); s.tx_count.store(len, Ordering::Relaxed); @@ -641,8 +642,8 @@ impl<'d, U: UarteInstance, T: TimerInstance> BufferedUarteRx<'d, U, T> { s.rx_started_count.store(0, Ordering::Relaxed); s.rx_ended_count.store(0, Ordering::Relaxed); s.rx_started.store(false, Ordering::Relaxed); - let len = rx_buffer.len(); - unsafe { s.rx_buf.init(rx_buffer.as_mut_ptr(), len) }; + let rx_len = rx_buffer.len().min(EASY_DMA_SIZE * 2); + unsafe { s.rx_buf.init(rx_buffer.as_mut_ptr(), rx_len) }; // clear errors let errors = r.errorsrc.read().bits(); @@ -663,7 +664,7 @@ impl<'d, U: UarteInstance, T: TimerInstance> BufferedUarteRx<'d, U, T> { // Configure byte counter. let timer = Timer::new_counter(timer); - timer.cc(1).write(rx_buffer.len() as u32 * 2); + timer.cc(1).write(rx_len as u32 * 2); timer.cc(1).short_compare_clear(); timer.clear(); timer.start(); From b870e7f2577781c4d68f61de6ff0e2755267ac1c Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Tue, 25 Jun 2024 23:56:59 +0200 Subject: [PATCH 530/581] tests/nrf: generalize buffereduart tests for all chips. --- tests/nrf/Cargo.toml | 19 ++++----- tests/nrf/src/bin/buffered_uart.rs | 26 ++++++------- tests/nrf/src/bin/buffered_uart_full.rs | 32 ++++++++------- tests/nrf/src/bin/buffered_uart_halves.rs | 27 +++++++------ tests/nrf/src/bin/buffered_uart_spam.rs | 32 +++++++-------- tests/nrf/src/common.rs | 47 ++++++++++++++++++++--- 6 files changed, 108 insertions(+), 75 deletions(-) diff --git a/tests/nrf/Cargo.toml b/tests/nrf/Cargo.toml index 2faee70e3..49e464a90 100644 --- a/tests/nrf/Cargo.toml +++ b/tests/nrf/Cargo.toml @@ -30,14 +30,15 @@ panic-probe = { version = "0.3", features = ["print-defmt"] } portable-atomic = { version = "1.6.0" } [features] -nrf51422 = ["embassy-nrf/nrf51", "portable-atomic/unsafe-assume-single-core"] +nrf51422 = ["embassy-nrf/nrf51", "portable-atomic/unsafe-assume-single-core"] nrf52832 = ["embassy-nrf/nrf52832", "easydma"] -nrf52833 = ["embassy-nrf/nrf52833", "easydma"] -nrf52840 = ["embassy-nrf/nrf52840", "easydma"] -nrf5340 = ["embassy-nrf/nrf5340-app-s", "easydma"] -nrf9160 = ["embassy-nrf/nrf9160-s", "easydma"] +nrf52833 = ["embassy-nrf/nrf52833", "easydma", "two-uarts"] +nrf52840 = ["embassy-nrf/nrf52840", "easydma", "two-uarts"] +nrf5340 = ["embassy-nrf/nrf5340-app-s", "easydma", "two-uarts"] +nrf9160 = ["embassy-nrf/nrf9160-s", "easydma", "two-uarts"] easydma = [] +two-uarts = [] [profile.release] codegen-units = 1 @@ -53,22 +54,22 @@ overflow-checks = false [[bin]] name = "buffered_uart" path = "src/bin/buffered_uart.rs" -required-features = [ "nrf52840",] +required-features = [ "easydma",] [[bin]] name = "buffered_uart_full" path = "src/bin/buffered_uart_full.rs" -required-features = [ "nrf52840",] +required-features = [ "easydma",] [[bin]] name = "buffered_uart_halves" path = "src/bin/buffered_uart_halves.rs" -required-features = [ "nrf52840",] +required-features = [ "two-uarts",] [[bin]] name = "buffered_uart_spam" path = "src/bin/buffered_uart_spam.rs" -required-features = [ "nrf52840",] +required-features = [ "two-uarts",] [[bin]] name = "ethernet_enc28j60_perf" diff --git a/tests/nrf/src/bin/buffered_uart.rs b/tests/nrf/src/bin/buffered_uart.rs index 89314bfc9..04f32832f 100644 --- a/tests/nrf/src/bin/buffered_uart.rs +++ b/tests/nrf/src/bin/buffered_uart.rs @@ -1,19 +1,17 @@ -// required-features: nrf52840 +// required-features: easydma #![no_std] #![no_main] -teleprobe_meta::target!(b"nrf52840-dk"); -use defmt::{assert_eq, *}; +#[path = "../common.rs"] +mod common; + +use defmt::{panic, *}; use embassy_executor::Spawner; use embassy_futures::join::join; use embassy_nrf::buffered_uarte::{self, BufferedUarte}; -use embassy_nrf::{bind_interrupts, peripherals, uarte}; +use embassy_nrf::{peripherals, uarte}; use {defmt_rtt as _, panic_probe as _}; -bind_interrupts!(struct Irqs { - UARTE0_UART0 => buffered_uarte::InterruptHandler; -}); - #[embassy_executor::main] async fn main(_spawner: Spawner) { let mut p = embassy_nrf::init(Default::default()); @@ -27,14 +25,14 @@ async fn main(_spawner: Spawner) { // test teardown + recreate of the buffereduarte works fine. for _ in 0..2 { let u = BufferedUarte::new( - &mut p.UARTE0, + &mut peri!(p, UART0), &mut p.TIMER0, &mut p.PPI_CH0, &mut p.PPI_CH1, &mut p.PPI_GROUP0, - Irqs, - &mut p.P1_03, - &mut p.P1_02, + irqs!(UART0_BUFFERED), + &mut peri!(p, PIN_A), + &mut peri!(p, PIN_B), config.clone(), &mut rx_buffer, &mut tx_buffer, @@ -65,7 +63,9 @@ async fn main(_spawner: Spawner) { let buf = unwrap!(rx.fill_buf().await); for &b in buf { - assert_eq!(b, i as u8); + if b != i as u8 { + panic!("mismatch {} vs {}, index {}", b, i as u8, i); + } i = i + 1; } diff --git a/tests/nrf/src/bin/buffered_uart_full.rs b/tests/nrf/src/bin/buffered_uart_full.rs index a7d9a3717..09353bbe8 100644 --- a/tests/nrf/src/bin/buffered_uart_full.rs +++ b/tests/nrf/src/bin/buffered_uart_full.rs @@ -1,19 +1,17 @@ -// required-features: nrf52840 +// required-features: easydma #![no_std] #![no_main] -teleprobe_meta::target!(b"nrf52840-dk"); + +#[path = "../common.rs"] +mod common; use defmt::{assert_eq, *}; use embassy_executor::Spawner; use embassy_nrf::buffered_uarte::{self, BufferedUarte}; -use embassy_nrf::{bind_interrupts, peripherals, uarte}; +use embassy_nrf::{peripherals, uarte}; use embedded_io_async::{Read, Write}; use {defmt_rtt as _, panic_probe as _}; -bind_interrupts!(struct Irqs { - UARTE0_UART0 => buffered_uarte::InterruptHandler; -}); - #[embassy_executor::main] async fn main(_spawner: Spawner) { let p = embassy_nrf::init(Default::default()); @@ -21,18 +19,18 @@ async fn main(_spawner: Spawner) { config.parity = uarte::Parity::EXCLUDED; config.baudrate = uarte::Baudrate::BAUD1M; - let mut tx_buffer = [0u8; 1024]; - let mut rx_buffer = [0u8; 1024]; + let mut tx_buffer = [0u8; 500]; + let mut rx_buffer = [0u8; 500]; let u = BufferedUarte::new( - p.UARTE0, + peri!(p, UART0), p.TIMER0, p.PPI_CH0, p.PPI_CH1, p.PPI_GROUP0, - Irqs, - p.P1_03, - p.P1_02, + irqs!(UART0_BUFFERED), + peri!(p, PIN_A), + peri!(p, PIN_B), config.clone(), &mut rx_buffer, &mut tx_buffer, @@ -42,22 +40,22 @@ async fn main(_spawner: Spawner) { let (mut rx, mut tx) = u.split(); - let mut buf = [0; 1024]; + let mut buf = [0; 500]; for (j, b) in buf.iter_mut().enumerate() { *b = j as u8; } - // Write 1024b. This causes the rx buffer to get exactly full. + // Write 500b. This causes the rx buffer to get exactly full. unwrap!(tx.write_all(&buf).await); unwrap!(tx.flush().await); - // Read those 1024b. + // Read those 500b. unwrap!(rx.read_exact(&mut buf).await); for (j, b) in buf.iter().enumerate() { assert_eq!(*b, j as u8); } - // The buffer should now be unclogged. Write 1024b again. + // The buffer should now be unclogged. Write 500b again. unwrap!(tx.write_all(&buf).await); unwrap!(tx.flush().await); diff --git a/tests/nrf/src/bin/buffered_uart_halves.rs b/tests/nrf/src/bin/buffered_uart_halves.rs index ae1021f04..bdf5ad726 100644 --- a/tests/nrf/src/bin/buffered_uart_halves.rs +++ b/tests/nrf/src/bin/buffered_uart_halves.rs @@ -1,20 +1,17 @@ -// required-features: nrf52840 +// required-features: two-uarts #![no_std] #![no_main] -teleprobe_meta::target!(b"nrf52840-dk"); + +#[path = "../common.rs"] +mod common; use defmt::{assert_eq, *}; use embassy_executor::Spawner; use embassy_futures::join::join; use embassy_nrf::buffered_uarte::{self, BufferedUarteRx, BufferedUarteTx}; -use embassy_nrf::{bind_interrupts, peripherals, uarte}; +use embassy_nrf::{peripherals, uarte}; use {defmt_rtt as _, panic_probe as _}; -bind_interrupts!(struct Irqs { - UARTE0_UART0 => buffered_uarte::InterruptHandler; - UARTE1 => buffered_uarte::InterruptHandler; -}); - #[embassy_executor::main] async fn main(_spawner: Spawner) { let mut p = embassy_nrf::init(Default::default()); @@ -29,16 +26,22 @@ async fn main(_spawner: Spawner) { for _ in 0..2 { const COUNT: usize = 40_000; - let mut tx = BufferedUarteTx::new(&mut p.UARTE1, Irqs, &mut p.P1_02, config.clone(), &mut tx_buffer); + let mut tx = BufferedUarteTx::new( + &mut peri!(p, UART1), + irqs!(UART1_BUFFERED), + &mut peri!(p, PIN_A), + config.clone(), + &mut tx_buffer, + ); let mut rx = BufferedUarteRx::new( - &mut p.UARTE0, + &mut peri!(p, UART0), &mut p.TIMER0, &mut p.PPI_CH0, &mut p.PPI_CH1, &mut p.PPI_GROUP0, - Irqs, - &mut p.P1_03, + irqs!(UART0_BUFFERED), + &mut peri!(p, PIN_B), config.clone(), &mut rx_buffer, ); diff --git a/tests/nrf/src/bin/buffered_uart_spam.rs b/tests/nrf/src/bin/buffered_uart_spam.rs index 906723229..e8fca452e 100644 --- a/tests/nrf/src/bin/buffered_uart_spam.rs +++ b/tests/nrf/src/bin/buffered_uart_spam.rs @@ -1,26 +1,23 @@ -// required-features: nrf52840 +// required-features: two-uarts #![no_std] #![no_main] -teleprobe_meta::target!(b"nrf52840-dk"); + +#[path = "../common.rs"] +mod common; use core::mem; use core::ptr::NonNull; use defmt::{assert_eq, *}; use embassy_executor::Spawner; -use embassy_nrf::buffered_uarte::{self, BufferedUarte}; +use embassy_nrf::buffered_uarte::{self, BufferedUarteRx}; use embassy_nrf::gpio::{Level, Output, OutputDrive}; use embassy_nrf::ppi::{Event, Ppi, Task}; -use embassy_nrf::uarte::Uarte; -use embassy_nrf::{bind_interrupts, pac, peripherals, uarte}; +use embassy_nrf::uarte::UarteTx; +use embassy_nrf::{pac, peripherals, uarte}; use embassy_time::Timer; use {defmt_rtt as _, panic_probe as _}; -bind_interrupts!(struct Irqs { - UARTE0_UART0 => buffered_uarte::InterruptHandler; - UARTE1 => uarte::InterruptHandler; -}); - #[embassy_executor::main] async fn main(_spawner: Spawner) { let mut p = embassy_nrf::init(Default::default()); @@ -28,23 +25,20 @@ async fn main(_spawner: Spawner) { config.parity = uarte::Parity::EXCLUDED; config.baudrate = uarte::Baudrate::BAUD1M; - let mut tx_buffer = [0u8; 1024]; let mut rx_buffer = [0u8; 1024]; - mem::forget(Output::new(&mut p.P1_02, Level::High, OutputDrive::Standard)); + mem::forget(Output::new(&mut peri!(p, PIN_A), Level::High, OutputDrive::Standard)); - let mut u = BufferedUarte::new( - p.UARTE0, + let mut u = BufferedUarteRx::new( + peri!(p, UART0), p.TIMER0, p.PPI_CH0, p.PPI_CH1, p.PPI_GROUP0, - Irqs, - p.P1_03, - p.P1_04, + irqs!(UART0_BUFFERED), + peri!(p, PIN_B), config.clone(), &mut rx_buffer, - &mut tx_buffer, ); info!("uarte initialized!"); @@ -55,7 +49,7 @@ async fn main(_spawner: Spawner) { // Tx spam in a loop. const NSPAM: usize = 17; static mut TX_BUF: [u8; NSPAM] = [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16]; - let _spam = Uarte::new(p.UARTE1, Irqs, p.P1_01, p.P1_02, config.clone()); + let _spam = UarteTx::new(peri!(p, UART1), irqs!(UART1), peri!(p, PIN_A), config.clone()); let spam_peri: pac::UARTE1 = unsafe { mem::transmute(()) }; let event = unsafe { Event::new_unchecked(NonNull::new_unchecked(&spam_peri.events_endtx as *const _ as _)) }; let task = unsafe { Task::new_unchecked(NonNull::new_unchecked(&spam_peri.tasks_starttx as *const _ as _)) }; diff --git a/tests/nrf/src/common.rs b/tests/nrf/src/common.rs index 79336c5de..ff5299b0f 100644 --- a/tests/nrf/src/common.rs +++ b/tests/nrf/src/common.rs @@ -50,16 +50,53 @@ macro_rules! define_peris { define_peris!(PIN_A = P0_13, PIN_B = P0_14,); #[cfg(feature = "nrf52832")] -define_peris!(PIN_A = P0_11, PIN_B = P0_12,); +define_peris!( + PIN_A = P0_11, PIN_B = P0_12, + UART0 = UARTE0, + @irq UART0 = {UARTE0_UART0 => uarte::InterruptHandler;}, + @irq UART0_BUFFERED = {UARTE0_UART0 => buffered_uarte::InterruptHandler;}, +); #[cfg(feature = "nrf52833")] -define_peris!(PIN_A = P1_01, PIN_B = P1_02,); +define_peris!( + PIN_A = P1_01, PIN_B = P1_02, + UART0 = UARTE0, + UART1 = UARTE1, + @irq UART0 = {UARTE0_UART0 => uarte::InterruptHandler;}, + @irq UART1 = {UARTE1 => uarte::InterruptHandler;}, + @irq UART0_BUFFERED = {UARTE0_UART0 => buffered_uarte::InterruptHandler;}, + @irq UART1_BUFFERED = {UARTE1 => buffered_uarte::InterruptHandler;}, +); #[cfg(feature = "nrf52840")] -define_peris!(PIN_A = P1_02, PIN_B = P1_03,); +define_peris!( + PIN_A = P1_02, PIN_B = P1_03, + UART0 = UARTE0, + UART1 = UARTE1, + @irq UART0 = {UARTE0_UART0 => uarte::InterruptHandler;}, + @irq UART1 = {UARTE1 => uarte::InterruptHandler;}, + @irq UART0_BUFFERED = {UARTE0_UART0 => buffered_uarte::InterruptHandler;}, + @irq UART1_BUFFERED = {UARTE1 => buffered_uarte::InterruptHandler;}, +); #[cfg(feature = "nrf5340")] -define_peris!(PIN_A = P1_00, PIN_B = P1_01,); +define_peris!( + PIN_A = P1_08, PIN_B = P1_09, + UART0 = SERIAL0, + UART1 = SERIAL1, + @irq UART0 = {SERIAL0 => uarte::InterruptHandler;}, + @irq UART1 = {SERIAL1 => uarte::InterruptHandler;}, + @irq UART0_BUFFERED = {SERIAL0 => buffered_uarte::InterruptHandler;}, + @irq UART1_BUFFERED = {SERIAL1 => buffered_uarte::InterruptHandler;}, +); #[cfg(feature = "nrf9160")] -define_peris!(PIN_A = P0_00, PIN_B = P0_01,); +define_peris!( + PIN_A = P0_00, PIN_B = P0_01, + UART0 = SERIAL0, + UART1 = SERIAL1, + @irq UART0 = {UARTE0_SPIM0_SPIS0_TWIM0_TWIS0 => uarte::InterruptHandler;}, + @irq UART1 = {UARTE1_SPIM1_SPIS1_TWIM1_TWIS1 => uarte::InterruptHandler;}, + @irq UART0_BUFFERED = {UARTE0_SPIM0_SPIS0_TWIM0_TWIS0 => buffered_uarte::InterruptHandler;}, + @irq UART1_BUFFERED = {UARTE1_SPIM1_SPIS1_TWIM1_TWIS1 => buffered_uarte::InterruptHandler;}, +); From 9a21f70c9f561bf89bb8b50df2c98aff564d172d Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Tue, 25 Jun 2024 23:57:19 +0200 Subject: [PATCH 531/581] tests/nrf: add non-buffered uart tests. --- tests/nrf/Cargo.toml | 10 +++++++ tests/nrf/src/bin/uart_halves.rs | 41 ++++++++++++++++++++++++++ tests/nrf/src/bin/uart_split.rs | 49 ++++++++++++++++++++++++++++++++ 3 files changed, 100 insertions(+) create mode 100644 tests/nrf/src/bin/uart_halves.rs create mode 100644 tests/nrf/src/bin/uart_split.rs diff --git a/tests/nrf/Cargo.toml b/tests/nrf/Cargo.toml index 49e464a90..c714e8f7e 100644 --- a/tests/nrf/Cargo.toml +++ b/tests/nrf/Cargo.toml @@ -91,6 +91,16 @@ name = "timer" path = "src/bin/timer.rs" required-features = [] +[[bin]] +name = "uart_halves" +path = "src/bin/uart_halves.rs" +required-features = [ "two-uarts",] + +[[bin]] +name = "uart_split" +path = "src/bin/uart_split.rs" +required-features = [ "easydma",] + [[bin]] name = "wifi_esp_hosted_perf" path = "src/bin/wifi_esp_hosted_perf.rs" diff --git a/tests/nrf/src/bin/uart_halves.rs b/tests/nrf/src/bin/uart_halves.rs new file mode 100644 index 000000000..f48ea43a1 --- /dev/null +++ b/tests/nrf/src/bin/uart_halves.rs @@ -0,0 +1,41 @@ +// required-features: two-uarts +#![no_std] +#![no_main] + +#[path = "../common.rs"] +mod common; + +use defmt::{assert_eq, *}; +use embassy_executor::Spawner; +use embassy_futures::join::join; +use embassy_nrf::uarte::{UarteRx, UarteTx}; +use embassy_nrf::{peripherals, uarte}; +use {defmt_rtt as _, panic_probe as _}; + +#[embassy_executor::main] +async fn main(_spawner: Spawner) { + let mut p = embassy_nrf::init(Default::default()); + let mut config = uarte::Config::default(); + config.parity = uarte::Parity::EXCLUDED; + config.baudrate = uarte::Baudrate::BAUD1M; + + let mut tx = UarteTx::new(&mut peri!(p, UART0), irqs!(UART0), &mut peri!(p, PIN_A), config.clone()); + let mut rx = UarteRx::new(&mut peri!(p, UART1), irqs!(UART1), &mut peri!(p, PIN_B), config.clone()); + + let data = [ + 0x42, 0x43, 0x44, 0x45, 0x66, 0x12, 0x23, 0x34, 0x45, 0x19, 0x91, 0xaa, 0xff, 0xa5, 0x5a, 0x77, + ]; + + let tx_fut = async { + tx.write(&data).await.unwrap(); + }; + let rx_fut = async { + let mut buf = [0u8; 16]; + rx.read(&mut buf).await.unwrap(); + assert_eq!(data, buf); + }; + join(rx_fut, tx_fut).await; + + info!("Test OK"); + cortex_m::asm::bkpt(); +} diff --git a/tests/nrf/src/bin/uart_split.rs b/tests/nrf/src/bin/uart_split.rs new file mode 100644 index 000000000..70d8b2e33 --- /dev/null +++ b/tests/nrf/src/bin/uart_split.rs @@ -0,0 +1,49 @@ +// required-features: easydma +#![no_std] +#![no_main] + +#[path = "../common.rs"] +mod common; + +use defmt::{assert_eq, *}; +use embassy_executor::Spawner; +use embassy_futures::join::join; +use embassy_nrf::uarte::Uarte; +use embassy_nrf::{peripherals, uarte}; +use embassy_time::Timer; +use {defmt_rtt as _, panic_probe as _}; + +#[embassy_executor::main] +async fn main(_spawner: Spawner) { + let mut p = embassy_nrf::init(Default::default()); + let mut config = uarte::Config::default(); + config.parity = uarte::Parity::EXCLUDED; + config.baudrate = uarte::Baudrate::BAUD9600; + + let uarte = Uarte::new( + &mut peri!(p, UART0), + irqs!(UART0), + &mut peri!(p, PIN_A), + &mut peri!(p, PIN_B), + config.clone(), + ); + let (mut tx, mut rx) = uarte.split(); + + let data = [ + 0x42, 0x43, 0x44, 0x45, 0x66, 0x12, 0x23, 0x34, 0x45, 0x19, 0x91, 0xaa, 0xff, 0xa5, 0x5a, 0x77, + ]; + + let tx_fut = async { + Timer::after_millis(10).await; + tx.write(&data).await.unwrap(); + }; + let rx_fut = async { + let mut buf = [0u8; 16]; + rx.read(&mut buf).await.unwrap(); + assert_eq!(data, buf); + }; + join(rx_fut, tx_fut).await; + + info!("Test OK"); + cortex_m::asm::bkpt(); +} From a0799bf270010f4e91b0c3eebe487d8bc6fb54fc Mon Sep 17 00:00:00 2001 From: Chen Yuheng <1016867898@qq.com> Date: Thu, 27 Jun 2024 17:04:26 +0800 Subject: [PATCH 532/581] Add adc oversampling support --- embassy-stm32/src/adc/v3.rs | 15 +++++++ examples/stm32g0/src/bin/adc_oversampling.rs | 43 ++++++++++++++++++++ 2 files changed, 58 insertions(+) create mode 100644 examples/stm32g0/src/bin/adc_oversampling.rs diff --git a/embassy-stm32/src/adc/v3.rs b/embassy-stm32/src/adc/v3.rs index 398c57a92..bf7ad242b 100644 --- a/embassy-stm32/src/adc/v3.rs +++ b/embassy-stm32/src/adc/v3.rs @@ -277,6 +277,21 @@ impl<'d, T: Instance> Adc<'d, T> { val } + #[cfg(any(adc_g0, adc_u0))] + pub fn set_oversampling_shift(&mut self, shift: u8) { + T::regs().cfgr2().modify(|reg| reg.set_ovss(shift)); + } + + #[cfg(any(adc_g0, adc_u0))] + pub fn set_oversampling_ratio(&mut self, ratio: u8) { + T::regs().cfgr2().modify(|reg| reg.set_ovsr(ratio)); + } + + #[cfg(any(adc_g0, adc_u0))] + pub fn oversampling_enable(&mut self, enable: bool) { + T::regs().cfgr2().modify(|reg| reg.set_ovse(enable)); + } + fn set_channel_sample_time(_ch: u8, sample_time: SampleTime) { cfg_if! { if #[cfg(any(adc_g0, adc_u0))] { diff --git a/examples/stm32g0/src/bin/adc_oversampling.rs b/examples/stm32g0/src/bin/adc_oversampling.rs new file mode 100644 index 000000000..3c31eb206 --- /dev/null +++ b/examples/stm32g0/src/bin/adc_oversampling.rs @@ -0,0 +1,43 @@ +//! adc oversampling example +//! +//! This example uses adc oversampling to achieve 16bit data + +#![no_std] +#![no_main] + +use defmt::*; +use embassy_executor::Spawner; +use embassy_stm32::adc::{Adc, SampleTime}; +use embassy_time::Timer; +use {defmt_rtt as _, panic_probe as _}; + +#[embassy_executor::main] +async fn main(_spawner: Spawner) { + let p = embassy_stm32::init(Default::default()); + info!("Adc oversample test"); + + let mut adc = Adc::new(p.ADC1); + adc.set_sample_time(SampleTime::CYCLES1_5); + let mut pin = p.PA1; + + // From https://www.st.com/resource/en/reference_manual/rm0444-stm32g0x1-advanced-armbased-32bit-mcus-stmicroelectronics.pdf + // page373 15.8 Oversampler + // Table 76. Maximum output results vs N and M. Grayed values indicates truncation + // 0x00 oversampling ratio X2 + // 0x01 oversampling ratio X4 + // 0x02 oversampling ratio X8 + // 0x03 oversampling ratio X16 + // 0x04 oversampling ratio X32 + // 0x05 oversampling ratio X64 + // 0x06 oversampling ratio X128 + // 0x07 oversampling ratio X256 + adc.set_oversampling_ratio(0x03); + adc.set_oversampling_shift(0b0000); + adc.oversampling_enable(true); + + loop { + let v = adc.read(&mut pin); + info!("--> {} ", v); //max 65520 = 0xFFF0 + Timer::after_millis(100).await; + } +} From e3b495908cda737cadad6ad645d19f0cb2fe98b2 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?J=2E=20Neusch=C3=A4fer?= Date: Thu, 27 Jun 2024 16:48:31 +0200 Subject: [PATCH 533/581] docs: Fix mention of ExtiInput The struct is called ExtiInput, not ExtiButton. --- docs/pages/layer_by_layer.adoc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/docs/pages/layer_by_layer.adoc b/docs/pages/layer_by_layer.adoc index f87291c20..7852d27b7 100644 --- a/docs/pages/layer_by_layer.adoc +++ b/docs/pages/layer_by_layer.adoc @@ -76,7 +76,7 @@ The async version looks very similar to the HAL version, apart from a few minor * The peripheral initialization is done by the main macro, and is handed to the main task. * Before checking the button state, the application is awaiting a transition in the pin state (low -> high or high -> low). -When `button.await_for_any_edge().await` is called, the executor will pause the main task and put the microcontroller in sleep mode, unless there are other tasks that can run. Internally, the Embassy HAL has configured the interrupt handler for the button (in `ExtiButton`), so that whenever an interrupt is raised, the task awaiting the button will be woken up. +When `button.await_for_any_edge().await` is called, the executor will pause the main task and put the microcontroller in sleep mode, unless there are other tasks that can run. Internally, the Embassy HAL has configured the interrupt handler for the button (in `ExtiInput`), so that whenever an interrupt is raised, the task awaiting the button will be woken up. The minimal overhead of the executor and the ability to run multiple tasks "concurrently" combined with the enormous simplification of the application, makes `async` a great fit for embedded. From 0e84bd8a91095c035b1b2fdf0c0d8d95b736cc9f Mon Sep 17 00:00:00 2001 From: David Haig Date: Thu, 27 Jun 2024 20:13:20 +0100 Subject: [PATCH 534/581] Add support for the stm32 ltdc display peripheral --- embassy-stm32/Cargo.toml | 5 +- embassy-stm32/src/ltdc.rs | 493 +++++++++++++++++++++++++--- examples/stm32h7/Cargo.toml | 2 + examples/stm32h7/src/bin/ferris.bmp | Bin 0 -> 6794 bytes examples/stm32h7/src/bin/ltdc.rs | 484 +++++++++++++++++++++++++++ 5 files changed, 933 insertions(+), 51 deletions(-) create mode 100644 examples/stm32h7/src/bin/ferris.bmp create mode 100644 examples/stm32h7/src/bin/ltdc.rs diff --git a/embassy-stm32/Cargo.toml b/embassy-stm32/Cargo.toml index 77b517dba..7a81b705d 100644 --- a/embassy-stm32/Cargo.toml +++ b/embassy-stm32/Cargo.toml @@ -72,7 +72,8 @@ rand_core = "0.6.3" sdio-host = "0.5.0" critical-section = "1.1" #stm32-metapac = { version = "15" } -stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-a8ab0a3421ed0ca4b282f54028a0a2decacd8631" } +#stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-a8ab0a3421ed0ca4b282f54028a0a2decacd8631" } +stm32-metapac = { git = "https://github.com/ninjasource/stm32-data-generated", branch = "stm32-ltdc", commit = "4c902fcd0889619e8af8bc03fa13b45c56fb3540" } vcell = "0.1.3" nb = "1.0.0" @@ -97,7 +98,7 @@ proc-macro2 = "1.0.36" quote = "1.0.15" #stm32-metapac = { version = "15", default-features = false, features = ["metadata"]} -stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-a8ab0a3421ed0ca4b282f54028a0a2decacd8631", default-features = false, features = ["metadata"] } +stm32-metapac = { git = "https://github.com/ninjasource/stm32-data-generated", branch = "stm32-ltdc", commit = "4c902fcd0889619e8af8bc03fa13b45c56fb3540", default-features = false, features = ["metadata"] } [features] default = ["rt"] diff --git a/embassy-stm32/src/ltdc.rs b/embassy-stm32/src/ltdc.rs index 481d77843..adc9b8862 100644 --- a/embassy-stm32/src/ltdc.rs +++ b/embassy-stm32/src/ltdc.rs @@ -1,19 +1,184 @@ -//! LTDC -use core::marker::PhantomData; +//! LTDC - LCD-TFT Display Controller +//! See ST application note AN4861: Introduction to LCD-TFT display controller (LTDC) on STM32 MCUs for high level details +//! This module was tested against the stm32h735g-dk using the RM0468 ST reference manual for detailed register information -use crate::rcc::{self, RccPeripheral}; -use crate::{peripherals, Peripheral}; +use crate::{ + gpio::{AfType, OutputType, Speed}, + interrupt::{self, typelevel::Interrupt}, + peripherals, rcc, Peripheral, +}; +use core::{future::poll_fn, marker::PhantomData, task::Poll}; +use embassy_hal_internal::{into_ref, PeripheralRef}; +use embassy_sync::waitqueue::AtomicWaker; +use stm32_metapac::ltdc::{ + regs::Dccr, + vals::{Bf1, Bf2, Cfuif, Clif, Crrif, Cterrif, Pf, Vbr}, +}; + +static LTDC_WAKER: AtomicWaker = AtomicWaker::new(); + +/// LTDC error +#[derive(Debug, PartialEq, Eq, Clone, Copy)] +#[cfg_attr(feature = "defmt", derive(defmt::Format))] +pub enum Error { + /// FIFO underrun. Generated when a pixel is requested while the FIFO is empty + FifoUnderrun, + /// Transfer error. Generated when a bus error occurs + TransferError, +} + +/// Display configuration parameters +#[derive(Clone, Copy, Debug, PartialEq)] +#[cfg_attr(feature = "defmt", derive(defmt::Format))] +pub struct LtdcConfiguration { + /// Active width in pixels + pub active_width: u16, + /// Active height in pixels + pub active_height: u16, + + /// Horizontal back porch (in units of pixel clock period) + pub h_back_porch: u16, + /// Horizontal front porch (in units of pixel clock period) + pub h_front_porch: u16, + /// Vertical back porch (in units of horizontal scan line) + pub v_back_porch: u16, + /// Vertical front porch (in units of horizontal scan line) + pub v_front_porch: u16, + + /// Horizontal synchronization width (in units of pixel clock period) + pub h_sync: u16, + /// Vertical synchronization height (in units of horizontal scan line) + pub v_sync: u16, + + /// Horizontal synchronization polarity: `false`: active low, `true`: active high + pub h_sync_polarity: PolarityActive, + /// Vertical synchronization polarity: `false`: active low, `true`: active high + pub v_sync_polarity: PolarityActive, + /// Data enable polarity: `false`: active low, `true`: active high + pub data_enable_polarity: PolarityActive, + /// Pixel clock polarity: `false`: falling edge, `true`: rising edge + pub pixel_clock_polarity: PolarityEdge, +} + +/// Edge polarity +#[derive(Clone, Copy, Debug, PartialEq)] +#[cfg_attr(feature = "defmt", derive(defmt::Format))] +pub enum PolarityEdge { + /// Falling edge + FallingEdge, + /// Rising edge + RisingEdge, +} + +/// Active polarity +#[derive(Clone, Copy, Debug, PartialEq)] +#[cfg_attr(feature = "defmt", derive(defmt::Format))] +pub enum PolarityActive { + /// Active low + ActiveLow, + /// Active high + ActiveHigh, +} /// LTDC driver. pub struct Ltdc<'d, T: Instance> { - _peri: PhantomData<&'d mut T>, + _peri: PeripheralRef<'d, T>, +} + +/// LTDC interrupt handler. +pub struct InterruptHandler { + _phantom: PhantomData, +} + +/// 24 bit color +#[derive(Debug, PartialEq, Eq, Clone, Copy, Default)] +#[cfg_attr(feature = "defmt", derive(defmt::Format))] +pub struct RgbColor { + /// Red + pub red: u8, + /// Green + pub green: u8, + /// Blue + pub blue: u8, +} + +/// Layer +#[derive(Debug, PartialEq, Eq, Clone, Copy)] +#[cfg_attr(feature = "defmt", derive(defmt::Format))] +pub struct LtdcLayerConfig { + /// Layer number + pub layer: LtdcLayer, + /// Pixel format + pub pixel_format: PixelFormat, + /// Window left x in pixels + pub window_x0: u16, + /// Window right x in pixels + pub window_x1: u16, + /// Window top y in pixels + pub window_y0: u16, + /// Window bottom y in pixels + pub window_y1: u16, +} + +/// Pixel format +#[repr(u8)] +#[derive(Debug, PartialEq, Eq, Clone, Copy)] +#[cfg_attr(feature = "defmt", derive(defmt::Format))] +pub enum PixelFormat { + /// ARGB8888 + ARGB8888 = Pf::ARGB8888 as u8, + /// RGB888 + RGB888 = Pf::RGB888 as u8, + /// RGB565 + RGB565 = Pf::RGB565 as u8, + /// ARGB1555 + ARGB1555 = Pf::ARGB1555 as u8, + /// ARGB4444 + ARGB4444 = Pf::ARGB4444 as u8, + /// L8 (8-bit luminance) + L8 = Pf::L8 as u8, + /// AL44 (4-bit alpha, 4-bit luminance + AL44 = Pf::AL44 as u8, + /// AL88 (8-bit alpha, 8-bit luminance) + AL88 = Pf::AL88 as u8, +} + +impl PixelFormat { + /// Number of bytes per pixel + pub fn bytes_per_pixel(&self) -> usize { + match self { + PixelFormat::ARGB8888 => 4, + PixelFormat::RGB888 => 3, + PixelFormat::RGB565 | PixelFormat::ARGB4444 | PixelFormat::ARGB1555 | PixelFormat::AL88 => 2, + PixelFormat::AL44 | PixelFormat::L8 => 1, + } + } +} + +/// Ltdc Blending Layer +#[repr(usize)] +#[derive(Debug, PartialEq, Eq, Clone, Copy)] +#[cfg_attr(feature = "defmt", derive(defmt::Format))] +pub enum LtdcLayer { + /// Bottom layer + Layer1 = 0, + /// Top layer + Layer2 = 1, +} + +impl interrupt::typelevel::Handler for InterruptHandler { + unsafe fn on_interrupt() { + cortex_m::asm::dsb(); + Ltdc::::enable_interrupts(false); + LTDC_WAKER.wake(); + } } impl<'d, T: Instance> Ltdc<'d, T> { - /// Note: Full-Duplex modes are not supported at this time + /// Create a new LTDC driver. 8 pins per color channel for blue, green and red pub fn new( - _peri: impl Peripheral

+ 'd, - /* + peri: impl Peripheral

+ 'd, + _irq: impl interrupt::typelevel::Binding> + 'd, clk: impl Peripheral

> + 'd, hsync: impl Peripheral

> + 'd, vsync: impl Peripheral

> + 'd, @@ -41,49 +206,274 @@ impl<'d, T: Instance> Ltdc<'d, T> { r5: impl Peripheral

> + 'd, r6: impl Peripheral

> + 'd, r7: impl Peripheral

> + 'd, - */ ) -> Self { - //into_ref!(clk); - - critical_section::with(|_cs| { - // RM says the pllsaidivr should only be changed when pllsai is off. But this could have other unintended side effects. So let's just give it a try like this. - // According to the debugger, this bit gets set, anyway. - #[cfg(stm32f7)] - stm32_metapac::RCC - .dckcfgr1() - .modify(|w| w.set_pllsaidivr(stm32_metapac::rcc::vals::Pllsaidivr::DIV2)); - - // It is set to RCC_PLLSAIDIVR_2 in ST's BSP example for the STM32469I-DISCO. - #[cfg(not(any(stm32f7, stm32u5)))] - stm32_metapac::RCC - .dckcfgr() - .modify(|w| w.set_pllsaidivr(stm32_metapac::rcc::vals::Pllsaidivr::DIV2)); - }); - rcc::enable_and_reset::(); - //new_pin!(clk, AfType::output(OutputType::PushPull, Speed::VeryHigh)); + into_ref!(peri); + new_pin!(clk, AfType::output(OutputType::PushPull, Speed::VeryHigh)); + new_pin!(hsync, AfType::output(OutputType::PushPull, Speed::VeryHigh)); + new_pin!(vsync, AfType::output(OutputType::PushPull, Speed::VeryHigh)); + new_pin!(b0, AfType::output(OutputType::PushPull, Speed::VeryHigh)); + new_pin!(b1, AfType::output(OutputType::PushPull, Speed::VeryHigh)); + new_pin!(b2, AfType::output(OutputType::PushPull, Speed::VeryHigh)); + new_pin!(b3, AfType::output(OutputType::PushPull, Speed::VeryHigh)); + new_pin!(b4, AfType::output(OutputType::PushPull, Speed::VeryHigh)); + new_pin!(b5, AfType::output(OutputType::PushPull, Speed::VeryHigh)); + new_pin!(b6, AfType::output(OutputType::PushPull, Speed::VeryHigh)); + new_pin!(b7, AfType::output(OutputType::PushPull, Speed::VeryHigh)); + new_pin!(g0, AfType::output(OutputType::PushPull, Speed::VeryHigh)); + new_pin!(g1, AfType::output(OutputType::PushPull, Speed::VeryHigh)); + new_pin!(g2, AfType::output(OutputType::PushPull, Speed::VeryHigh)); + new_pin!(g3, AfType::output(OutputType::PushPull, Speed::VeryHigh)); + new_pin!(g4, AfType::output(OutputType::PushPull, Speed::VeryHigh)); + new_pin!(g5, AfType::output(OutputType::PushPull, Speed::VeryHigh)); + new_pin!(g6, AfType::output(OutputType::PushPull, Speed::VeryHigh)); + new_pin!(g7, AfType::output(OutputType::PushPull, Speed::VeryHigh)); + new_pin!(r0, AfType::output(OutputType::PushPull, Speed::VeryHigh)); + new_pin!(r1, AfType::output(OutputType::PushPull, Speed::VeryHigh)); + new_pin!(r2, AfType::output(OutputType::PushPull, Speed::VeryHigh)); + new_pin!(r3, AfType::output(OutputType::PushPull, Speed::VeryHigh)); + new_pin!(r4, AfType::output(OutputType::PushPull, Speed::VeryHigh)); + new_pin!(r5, AfType::output(OutputType::PushPull, Speed::VeryHigh)); + new_pin!(r6, AfType::output(OutputType::PushPull, Speed::VeryHigh)); + new_pin!(r7, AfType::output(OutputType::PushPull, Speed::VeryHigh)); - // Set Tearing Enable pin according to CubeMx example - //te.set_as_af_pull(te.af_num(), AfType::output(OutputType::PushPull, Speed::Low)); - /* - T::regs().wcr().modify(|w| { - w.set_dsien(true); + Self { _peri: peri } + } + + fn clear_interrupt_flags() { + T::regs().icr().write(|w| { + w.set_cfuif(Cfuif::CLEAR); + w.set_clif(Clif::CLEAR); + w.set_crrif(Crrif::CLEAR); + w.set_cterrif(Cterrif::CLEAR); + }); + } + + fn enable_interrupts(enable: bool) { + T::regs().ier().write(|w| { + w.set_fuie(enable); + w.set_lie(false); // we are not interested in the line interrupt enable event + w.set_rrie(enable); + w.set_terrie(enable) + }); + + // enable interrupts for LTDC peripheral + T::Interrupt::unpend(); + if enable { + unsafe { T::Interrupt::enable() }; + } else { + T::Interrupt::disable() + } + } + + /// Set the current buffer. The async function will return when buffer has been completely copied to the LCD screen + /// frame_buffer_addr is a pointer to memory that should not move (best to make it static) + pub async fn set_buffer(&mut self, layer: LtdcLayer, frame_buffer_addr: *const ()) -> Result<(), Error> { + let mut bits = T::regs().isr().read(); + + // if all clear + if !bits.fuif() && !bits.lif() && !bits.rrif() && !bits.terrif() { + // wait for interrupt + poll_fn(|cx| { + // quick check to avoid registration if already done. + let bits = T::regs().isr().read(); + if bits.fuif() || bits.lif() || bits.rrif() || bits.terrif() { + return Poll::Ready(()); + } + + LTDC_WAKER.register(cx.waker()); + Self::clear_interrupt_flags(); // don't poison the request with old flags + Self::enable_interrupts(true); + + // set the new frame buffer address + let layer = T::regs().layer(layer as usize); + layer.cfbar().modify(|w| w.set_cfbadd(frame_buffer_addr as u32)); + + // configure a shadow reload for the next blanking period + T::regs().srcr().write(|w| { + w.set_vbr(Vbr::RELOAD); }); - */ - Self { _peri: PhantomData } + + // need to check condition after register to avoid a race + // condition that would result in lost notifications. + let bits = T::regs().isr().read(); + if bits.fuif() || bits.lif() || bits.rrif() || bits.terrif() { + Poll::Ready(()) + } else { + Poll::Pending + } + }) + .await; + + // re-read the status register after wait. + bits = T::regs().isr().read(); + } + + let result = if bits.fuif() { + Err(Error::FifoUnderrun) + } else if bits.terrif() { + Err(Error::TransferError) + } else if bits.lif() { + panic!("line interrupt event is disabled") + } else if bits.rrif() { + // register reload flag is expected + Ok(()) + } else { + unreachable!("all interrupt status values checked") + }; + + Self::clear_interrupt_flags(); + result } - /// Set the enable bit in the control register and assert that it has been enabled - pub fn enable(&mut self) { - T::regs().gcr().modify(|w| w.set_ltdcen(true)); - assert!(T::regs().gcr().read().ltdcen()) + /// Initialize the display + pub fn init(&mut self, config: &LtdcConfiguration) { + use stm32_metapac::ltdc::vals::{Depol, Hspol, Pcpol, Vspol}; + let ltdc = T::regs(); + + // check bus access + assert!(ltdc.gcr().read().0 == 0x2220); // reset value + + // configure the HS, VS, DE and PC polarity + ltdc.gcr().modify(|w| { + w.set_hspol(match config.h_sync_polarity { + PolarityActive::ActiveHigh => Hspol::ACTIVEHIGH, + PolarityActive::ActiveLow => Hspol::ACTIVELOW, + }); + + w.set_vspol(match config.v_sync_polarity { + PolarityActive::ActiveHigh => Vspol::ACTIVEHIGH, + PolarityActive::ActiveLow => Vspol::ACTIVELOW, + }); + + w.set_depol(match config.data_enable_polarity { + PolarityActive::ActiveHigh => Depol::ACTIVEHIGH, + PolarityActive::ActiveLow => Depol::ACTIVELOW, + }); + + w.set_pcpol(match config.pixel_clock_polarity { + PolarityEdge::RisingEdge => Pcpol::RISINGEDGE, + PolarityEdge::FallingEdge => Pcpol::FALLINGEDGE, + }); + }); + + // set synchronization pulse width + ltdc.sscr().modify(|w| { + w.set_vsh(config.v_sync - 1); + w.set_hsw(config.h_sync - 1); + }); + + // set accumulated back porch + ltdc.bpcr().modify(|w| { + w.set_avbp(config.v_sync + config.v_back_porch - 1); + w.set_ahbp(config.h_sync + config.h_back_porch - 1); + }); + + // set accumulated active width + let aa_height = config.v_sync + config.v_back_porch + config.active_height - 1; + let aa_width = config.h_sync + config.h_back_porch + config.active_width - 1; + ltdc.awcr().modify(|w| { + w.set_aah(aa_height); + w.set_aaw(aa_width); + }); + + // set total width and height + let total_height: u16 = config.v_sync + config.v_back_porch + config.active_height + config.v_front_porch - 1; + let total_width: u16 = config.h_sync + config.h_back_porch + config.active_width + config.h_front_porch - 1; + ltdc.twcr().modify(|w| { + w.set_totalh(total_height); + w.set_totalw(total_width) + }); + + // set the background color value to black + ltdc.bccr().modify(|w| { + w.set_bcred(0); + w.set_bcgreen(0); + w.set_bcblue(0); + }); + + // enable LTDC by setting LTDCEN bit + ltdc.gcr().modify(|w| { + w.set_ltdcen(true); + }); } - /// Unset the enable bit in the control register and assert that it has been disabled - pub fn disable(&mut self) { - T::regs().gcr().modify(|w| w.set_ltdcen(false)); - assert!(!T::regs().gcr().read().ltdcen()) + /// Enable the layer + /// + /// clut - color look-up table applies to L8, AL44 and AL88 pixel format and will default to greyscale if None supplied and these pixel formats are used + pub fn enable_layer(&mut self, layer_config: &LtdcLayerConfig, clut: Option<&[RgbColor]>) { + let ltdc = T::regs(); + let layer = ltdc.layer(layer_config.layer as usize); + + // 256 color look-up table for L8, AL88 and AL88 pixel formats + if let Some(clut) = clut { + assert_eq!(clut.len(), 256, "Color lookup table must be exactly 256 in length"); + for (index, color) in clut.iter().enumerate() { + layer.clutwr().write(|w| { + w.set_clutadd(index as u8); + w.set_red(color.red); + w.set_green(color.green); + w.set_blue(color.blue); + }); + } + } + + // configure the horizontal start and stop position + let h_win_start = layer_config.window_x0 + ltdc.bpcr().read().ahbp() + 1; + let h_win_stop = layer_config.window_x1 + ltdc.bpcr().read().ahbp(); + layer.whpcr().write(|w| { + w.set_whstpos(h_win_start); + w.set_whsppos(h_win_stop); + }); + + // configure the vertical start and stop position + let v_win_start = layer_config.window_y0 + ltdc.bpcr().read().avbp() + 1; + let v_win_stop = layer_config.window_y1 + ltdc.bpcr().read().avbp(); + layer.wvpcr().write(|w| { + w.set_wvstpos(v_win_start); + w.set_wvsppos(v_win_stop) + }); + + // set the pixel format + layer + .pfcr() + .write(|w| w.set_pf(Pf::from_bits(layer_config.pixel_format as u8))); + + // set the default color value to transparent black + layer.dccr().write_value(Dccr::default()); + + // set the global constant alpha value + let alpha = 0xFF; + layer.cacr().write(|w| w.set_consta(alpha)); + + // set the blending factors. + layer.bfcr().modify(|w| { + w.set_bf1(Bf1::PIXEL); + w.set_bf2(Bf2::PIXEL); + }); + + // calculate framebuffer pixel size in bytes + let bytes_per_pixel = layer_config.pixel_format.bytes_per_pixel() as u16; + let width = layer_config.window_x1 - layer_config.window_x0; + let height = layer_config.window_y1 - layer_config.window_y0; + + // framebuffer pitch and line length + layer.cfblr().modify(|w| { + w.set_cfbp(width * bytes_per_pixel); + w.set_cfbll(width * bytes_per_pixel + 7); + }); + + // framebuffer line number + layer.cfblnr().modify(|w| w.set_cfblnbr(height)); + + // enable LTDC_Layer by setting LEN bit + layer.cr().modify(|w| { + if clut.is_some() { + w.set_cluten(true); + } + w.set_len(true); + }); } } @@ -95,9 +485,12 @@ trait SealedInstance: crate::rcc::SealedRccPeripheral { fn regs() -> crate::pac::ltdc::Ltdc; } -/// DSI instance trait. +/// LTDC instance trait. #[allow(private_bounds)] -pub trait Instance: SealedInstance + RccPeripheral + 'static {} +pub trait Instance: SealedInstance + Peripheral

+ crate::rcc::RccPeripheral + 'static + Send { + /// Interrupt for this LTDC instance. + type Interrupt: interrupt::typelevel::Interrupt; +} pin_trait!(ClkPin, Instance); pin_trait!(HsyncPin, Instance); @@ -128,14 +521,16 @@ pin_trait!(B5Pin, Instance); pin_trait!(B6Pin, Instance); pin_trait!(B7Pin, Instance); -foreach_peripheral!( - (ltdc, $inst:ident) => { - impl crate::ltdc::SealedInstance for peripherals::$inst { +foreach_interrupt!( + ($inst:ident, ltdc, LTDC, GLOBAL, $irq:ident) => { + impl Instance for peripherals::$inst { + type Interrupt = crate::interrupt::typelevel::$irq; + } + + impl SealedInstance for peripherals::$inst { fn regs() -> crate::pac::ltdc::Ltdc { crate::pac::$inst } } - - impl crate::ltdc::Instance for peripherals::$inst {} }; ); diff --git a/examples/stm32h7/Cargo.toml b/examples/stm32h7/Cargo.toml index 0584f3916..6f3007492 100644 --- a/examples/stm32h7/Cargo.toml +++ b/examples/stm32h7/Cargo.toml @@ -34,6 +34,8 @@ stm32-fmc = "0.3.0" embedded-storage = "0.3.1" static_cell = "2" chrono = { version = "^0.4", default-features = false } +embedded-graphics = { version = "0.8.1" } +tinybmp = { version = "0.5" } # cargo build/run [profile.dev] diff --git a/examples/stm32h7/src/bin/ferris.bmp b/examples/stm32h7/src/bin/ferris.bmp new file mode 100644 index 0000000000000000000000000000000000000000..7a222ab84ddd9f2707ca8dcebad84b1b39c21818 GIT binary patch literal 6794 zcmb`L33OD|8OQ(JNnU0$OJ>O|nIvR^V8})iwgjaFsH`H2vdNBYA}T_u7=r{^1}IQL zRKN`(6x0McMUzp1q-luKI(W`lj>IPOV3HPUtHrL?CG_66&B`R_wD+9%?zjHl_wKvz zzB@B!%1$SQwlfZ>qS6d{RM4Xj)bvc74X|j%gBqCw_y)L=0Aw&fZDYnyTPsSvKa;4T z@qpl<@ILJNN$8_Wgep#pIF%W3oDN*P1&Fr-oDF^AozTRmfFz_+Uk2jTX^2mtRVDNX z)LBT-WCDrVAetPg)VWY44nVwSAh^UlsI_@iFNQX85R4WR`sfM}r!9d_TMSL&FmSpO zBUmpCLzH%8FA+E(3tL``ZUB_CLqx~1qsO$pt4Mb)^ayA z<{99u_d;))OKY5tM9WMh*rq|3JPT^ed^!xXkwkk<@&Y;>55Qtx3blO>wAMv1Sr;PS z{vh=B#V}e|z+!m}oMQ>Jwv|w)EQQIw5<17j&^VXD>{tb>Z4LA(tDsF=frQk@piNna z{K5jL(^f<0e1hKN25_nCk(mBC^t897JdK33C!y`T23lt|3{=i5Do3(o8`SBQu%~W> zE^QMWY1JqmT!O@mDkS&a413xR7&5lNp1u>#)VEqjul+4{QWbMK5@-o;no`<&o4kTqi3rFS)u=RZvx~v08>bDmuSuaALeGta} z`{2wzfW(~VV9z`ZL%%~XQ8}6Rj;z;V&OU;qoR^S7`#VOBq`Vp!2fPAH|D#Buhdui( z=yHz1nNtJ(fM39r`x>mYH{5m{=A4sAp+{2g30MZa4JSQ}d2b>)_Y@oh-h(OsEg14n z!<_p*Y_w0IeNz5AunhbFPI@HgorSTm9;TuOSPRa`>c{k1GvFBdIgG>Fkvyam)}dXPJ@)~m4*3$c z;eUi>=vT0pU4x_iI+BOqfN{hZu$Fy|`HL1{!QzE@qH;afZD_!bT|2R&@^kEdb`O?3 zc>|mGe}&_3oSPBYs&^!;CwOp0 z|76MaR3My?J5mE$D0dt`F5tRH%H`#76;X+e#ylrED+2MVm%VmH3*j!~`H_l;NQ204 z)a8tvGH>n1?a!0Dn%xa`HT$+LpEg4Bx&tGjI?T5yS}=DJeaPtwcc5HupeHK>vLtzf z29DmtX*oTJ`v48~s$~aR9>L&AMWn4zNg(T}cao$AxT9H4b0BIX(?c5}p*quo9>@%) zOV3#0<_IsqB88jY$f80UA=^R?R2!&dkW%Js5QkXi8pQ-Q3{HB|9TxSF^P7ZNJ3=f> znZZEWMf4;xMhF*@x#BC(L~Wy7M)IS!h;*J8rg3?sqftXhU)TLKRq%O*kr2761~Ggc zAwyi1>cNr8Jl~=f3b|8y)q+BrHH34y#uFl}8~kAwCvxRyKa31@xqezG=6Kg#2qbs? zOrX+}smUKOi&8Tot6Z*`WTT+^*xMm+?~nq$oYUoUt@x0sZSx7?_O*2h&3obC{c~q6 zoV8%?y?0L-{*uSbtp3(5D)q}k>UuJsCf+_m~>XFZ`yzK6NPB5AI)^lknUuTSZ||* z^$++7^Rfx&dw~koRU7uda^jS`#dFzzO)Q+9uXSDaw7O3o+q1Q*n%-SK%ig78nOmi? zzre9^*e+rD76Dt=#q<7FS9SFfx5q0?YS|yw`+V(Zk5pHSFwcLBlS#i(g+ITp7(~I}<#~6%e7!cn9p(>H zmoO@AoOCPxc4;NdjeMc~a=Cm9usRGBqISI_Qt5fLnB=#~miY=LBt=l_0DI(h196@5 zHFVQCY%z#+_nv)Yi%Usk{4!9Sp;@un7NJ^84=Y?**{@ z@FOzmCqq~#$;!Yi3JvO<_>b=H?!PjwR-BNplYddm6>2br&onXB=QdKO$R%~5I7Rb+ z{2xmBJLBexciln0qn1BY!=usXLmdm2xWg1sxZwYmQodx7XGHGRhrXefFX*e$7#=I> zcLuof!X72^2BkbfBey8k{e@Zv5wch@gk^cyM_m|)+AvSBdg-fwe;RKpJRG20`ud-b ztI`idA6=IEhQw8etSZ4!LH2n&yuOervDSbNZ)A@9Lk;4bM~zx#s(K0%6;nASv`A%{lCl(;i}$X*|Ar* zsC?lQ<&~MN58;w!{Dsv{Zg$k%7{)uflqJo4&<-G+ON6y3Ck7&_E6N`yq4kP)67^?R zRG?%GY>Jejh{mmm#fav+O~ENbH10T-+Y#%dr@&tmUZipbrwGxw^sC=Aog=-Nbf<}G zD&2);DL6%l#wBA1Gr#;Fj#6Btu$jdTn=CwSCI(tmuIL^t?7teL?!vs{mTqzY6eh*s zrn0enm^dTLRzw_ literal 0 HcmV?d00001 diff --git a/examples/stm32h7/src/bin/ltdc.rs b/examples/stm32h7/src/bin/ltdc.rs new file mode 100644 index 000000000..3bd307012 --- /dev/null +++ b/examples/stm32h7/src/bin/ltdc.rs @@ -0,0 +1,484 @@ +#![no_std] +#![no_main] +#![macro_use] +#![allow(static_mut_refs)] + +/// This example demonstrates the LTDC lcd display peripheral and was tested to run on an stm32h735g-dk (embassy-stm32 feature "stm32h735ig" and probe-rs chip "STM32H735IGKx") +/// Even though the dev kit has 16MB of attached PSRAM this example uses the 320KB of internal AXIS RAM found on the mcu itself to make the example more standalone and portable. +/// For this reason a 256 color lookup table had to be used to keep the memory requirement down to an acceptable level. +/// The example bounces a ferris crab bitmap around the screen while blinking an led on another task +/// +use bouncy_box::BouncyBox; +use defmt::{info, unwrap}; +use embassy_executor::Spawner; +use embassy_stm32::{ + bind_interrupts, + gpio::{Level, Output, Speed}, + ltdc::{self, Ltdc, LtdcConfiguration, LtdcLayer, LtdcLayerConfig, PolarityActive, PolarityEdge}, + peripherals, +}; +use embassy_time::{Duration, Timer}; +use embedded_graphics::{ + draw_target::DrawTarget, + geometry::{OriginDimensions, Point, Size}, + image::Image, + pixelcolor::{raw::RawU24, Rgb888}, + prelude::*, + primitives::Rectangle, + Pixel, +}; +use heapless::{Entry, FnvIndexMap}; +use tinybmp::Bmp; +use {defmt_rtt as _, panic_probe as _}; + +const DISPLAY_WIDTH: usize = 480; +const DISPLAY_HEIGHT: usize = 272; +const MY_TASK_POOL_SIZE: usize = 2; + +// the following two display buffers consume 261120 bytes that just about fits into axis ram found on the mcu +// see memory.x linker script +pub static mut FB1: [TargetPixelType; DISPLAY_WIDTH * DISPLAY_HEIGHT] = [0; DISPLAY_WIDTH * DISPLAY_HEIGHT]; +pub static mut FB2: [TargetPixelType; DISPLAY_WIDTH * DISPLAY_HEIGHT] = [0; DISPLAY_WIDTH * DISPLAY_HEIGHT]; + +// a basic memory.x linker script for the stm32h735g-dk is as follows: +/* +MEMORY +{ + FLASH : ORIGIN = 0x08000000, LENGTH = 1024K + RAM : ORIGIN = 0x24000000, LENGTH = 320K +} +*/ + +bind_interrupts!(struct Irqs { + LTDC => ltdc::InterruptHandler; +}); + +const NUM_COLORS: usize = 256; + +#[embassy_executor::main] +async fn main(spawner: Spawner) { + let p = rcc_setup::stm32h735g_init(); + + // blink the led on another task + let led = Output::new(p.PC3, Level::High, Speed::Low); + unwrap!(spawner.spawn(led_task(led))); + + // numbers from STMicroelectronics/STM32CubeH7 STM32H735G-DK C-based example + const RK043FN48H_HSYNC: u16 = 41; // Horizontal synchronization + const RK043FN48H_HBP: u16 = 13; // Horizontal back porch + const RK043FN48H_HFP: u16 = 32; // Horizontal front porch + const RK043FN48H_VSYNC: u16 = 10; // Vertical synchronization + const RK043FN48H_VBP: u16 = 2; // Vertical back porch + const RK043FN48H_VFP: u16 = 2; // Vertical front porch + + let ltdc_config = LtdcConfiguration { + active_width: DISPLAY_WIDTH as _, + active_height: DISPLAY_HEIGHT as _, + h_back_porch: RK043FN48H_HBP - 11, // -11 from MX_LTDC_Init + h_front_porch: RK043FN48H_HFP, + v_back_porch: RK043FN48H_VBP, + v_front_porch: RK043FN48H_VFP, + h_sync: RK043FN48H_HSYNC, + v_sync: RK043FN48H_VSYNC, + h_sync_polarity: PolarityActive::ActiveLow, + v_sync_polarity: PolarityActive::ActiveLow, + data_enable_polarity: PolarityActive::ActiveHigh, + pixel_clock_polarity: PolarityEdge::FallingEdge, + }; + + info!("init ltdc"); + let mut ltdc = Ltdc::new( + p.LTDC, Irqs, p.PG7, p.PC6, p.PA4, p.PG14, p.PD0, p.PD6, p.PA8, p.PE12, p.PA3, p.PB8, p.PB9, p.PB1, p.PB0, + p.PA6, p.PE11, p.PH15, p.PH4, p.PC7, p.PD3, p.PE0, p.PH3, p.PH8, p.PH9, p.PH10, p.PH11, p.PE1, p.PE15, + ); + ltdc.init(<dc_config); + + // we only need to draw on one layer for this example (not to be confused with the double buffer) + info!("enable bottom layer"); + let layer_config = LtdcLayerConfig { + pixel_format: ltdc::PixelFormat::L8, // 1 byte per pixel + layer: LtdcLayer::Layer1, + window_x0: 0, + window_x1: DISPLAY_WIDTH as _, + window_y0: 0, + window_y1: DISPLAY_HEIGHT as _, + }; + + let ferris_bmp: Bmp = Bmp::from_slice(include_bytes!("./ferris.bmp")).unwrap(); + let color_map = build_color_lookup_map(&ferris_bmp); + let clut = build_clut(&color_map); + + // enable the bottom layer with a 256 color lookup table + ltdc.enable_layer(&layer_config, Some(&clut)); + + // Safety: the DoubleBuffer controls access to the statically allocated frame buffers + // and it is the only thing that mutates their content + let mut double_buffer = DoubleBuffer::new( + unsafe { FB1.as_mut() }, + unsafe { FB2.as_mut() }, + layer_config, + color_map, + ); + + // this allows us to perform some simple animation for every frame + let mut bouncy_box = BouncyBox::new( + ferris_bmp.bounding_box(), + Rectangle::new(Point::zero(), Size::new(DISPLAY_WIDTH as u32, DISPLAY_HEIGHT as u32)), + 2, + ); + + loop { + // cpu intensive drawing to the buffer that is NOT currently being copied to the LCD screen + double_buffer.clear(); + let position = bouncy_box.next_point(); + let ferris = Image::new(&ferris_bmp, position); + unwrap!(ferris.draw(&mut double_buffer)); + + // perform async dma data transfer to the lcd screen + unwrap!(double_buffer.swap(&mut ltdc).await); + } +} + +/// builds the color look-up table from all unique colors found in the bitmap. This should be a 256 color indexed bitmap to work. +fn build_color_lookup_map(bmp: &Bmp) -> FnvIndexMap { + let mut color_map: FnvIndexMap = heapless::FnvIndexMap::new(); + let mut counter: u8 = 0; + + // add black to position 0 + color_map.insert(Rgb888::new(0, 0, 0).into_storage(), counter).unwrap(); + counter += 1; + + for Pixel(_point, color) in bmp.pixels() { + let raw = color.into_storage(); + if let Entry::Vacant(v) = color_map.entry(raw) { + v.insert(counter).expect("more than 256 colors detected"); + counter += 1; + } + } + color_map +} + +/// builds the color look-up table from the color map provided +fn build_clut(color_map: &FnvIndexMap) -> [ltdc::RgbColor; NUM_COLORS] { + let mut clut = [ltdc::RgbColor::default(); NUM_COLORS]; + for (color, index) in color_map.iter() { + let color = Rgb888::from(RawU24::new(*color)); + clut[*index as usize] = ltdc::RgbColor { + red: color.r(), + green: color.g(), + blue: color.b(), + }; + } + + clut +} + +#[embassy_executor::task(pool_size = MY_TASK_POOL_SIZE)] +async fn led_task(mut led: Output<'static>) { + let mut counter = 0; + loop { + info!("blink: {}", counter); + counter += 1; + + // on + led.set_low(); + Timer::after(Duration::from_millis(50)).await; + + // off + led.set_high(); + Timer::after(Duration::from_millis(450)).await; + } +} + +pub type TargetPixelType = u8; + +// A simple double buffer +pub struct DoubleBuffer { + buf0: &'static mut [TargetPixelType], + buf1: &'static mut [TargetPixelType], + is_buf0: bool, + layer_config: LtdcLayerConfig, + color_map: FnvIndexMap, +} + +impl DoubleBuffer { + pub fn new( + buf0: &'static mut [TargetPixelType], + buf1: &'static mut [TargetPixelType], + layer_config: LtdcLayerConfig, + color_map: FnvIndexMap, + ) -> Self { + Self { + buf0, + buf1, + is_buf0: true, + layer_config, + color_map, + } + } + + pub fn current(&mut self) -> (&FnvIndexMap, &mut [TargetPixelType]) { + if self.is_buf0 { + (&self.color_map, self.buf0) + } else { + (&self.color_map, self.buf1) + } + } + + pub async fn swap(&mut self, ltdc: &mut Ltdc<'_, T>) -> Result<(), ltdc::Error> { + let (_, buf) = self.current(); + let frame_buffer = buf.as_ptr(); + self.is_buf0 = !self.is_buf0; + ltdc.set_buffer(self.layer_config.layer, frame_buffer as *const _).await + } + + /// Clears the buffer + pub fn clear(&mut self) { + let (color_map, buf) = self.current(); + let black = Rgb888::new(0, 0, 0).into_storage(); + let color_index = color_map.get(&black).expect("no black found in the color map"); + + for a in buf.iter_mut() { + *a = *color_index; // solid black + } + } +} + +// Implement DrawTarget for +impl DrawTarget for DoubleBuffer { + type Color = Rgb888; + type Error = (); + + /// Draw a pixel + fn draw_iter(&mut self, pixels: I) -> Result<(), Self::Error> + where + I: IntoIterator>, + { + let size = self.size(); + let width = size.width as i32; + let height = size.height as i32; + let (color_map, buf) = self.current(); + + for pixel in pixels { + let Pixel(point, color) = pixel; + + if point.x >= 0 && point.y >= 0 && point.x < width && point.y < height { + let index = point.y * width + point.x; + let raw_color = color.into_storage(); + + match color_map.get(&raw_color) { + Some(x) => { + buf[index as usize] = *x; + } + None => panic!("color not found in color map: {}", raw_color), + }; + } else { + // Ignore invalid points + } + } + + Ok(()) + } +} + +impl OriginDimensions for DoubleBuffer { + /// Return the size of the display + fn size(&self) -> Size { + Size::new( + (self.layer_config.window_x1 - self.layer_config.window_x0) as _, + (self.layer_config.window_y1 - self.layer_config.window_y0) as _, + ) + } +} + +mod rcc_setup { + + use embassy_stm32::{rcc::*, Peripherals}; + use embassy_stm32::{ + rcc::{Hse, HseMode}, + time::Hertz, + Config, + }; + + /// Sets up clocks for the stm32h735g mcu + /// change this if you plan to use a different microcontroller + pub fn stm32h735g_init() -> Peripherals { + /* + https://github.com/STMicroelectronics/STM32CubeH7/blob/master/Projects/STM32H735G-DK/Examples/GPIO/GPIO_EXTI/Src/main.c + @brief System Clock Configuration + The system Clock is configured as follow : + System Clock source = PLL (HSE) + SYSCLK(Hz) = 520000000 (CPU Clock) + HCLK(Hz) = 260000000 (AXI and AHBs Clock) + AHB Prescaler = 2 + D1 APB3 Prescaler = 2 (APB3 Clock 130MHz) + D2 APB1 Prescaler = 2 (APB1 Clock 130MHz) + D2 APB2 Prescaler = 2 (APB2 Clock 130MHz) + D3 APB4 Prescaler = 2 (APB4 Clock 130MHz) + HSE Frequency(Hz) = 25000000 + PLL_M = 5 + PLL_N = 104 + PLL_P = 1 + PLL_Q = 4 + PLL_R = 2 + VDD(V) = 3.3 + Flash Latency(WS) = 3 + */ + + // setup power and clocks for an stm32h735g-dk run from an external 25 Mhz external oscillator + let mut config = Config::default(); + config.rcc.hse = Some(Hse { + freq: Hertz::mhz(25), + mode: HseMode::Oscillator, + }); + config.rcc.hsi = None; + config.rcc.csi = false; + config.rcc.pll1 = Some(Pll { + source: PllSource::HSE, + prediv: PllPreDiv::DIV5, // PLL_M + mul: PllMul::MUL104, // PLL_N + divp: Some(PllDiv::DIV1), + divq: Some(PllDiv::DIV4), + divr: Some(PllDiv::DIV2), + }); + // numbers adapted from Drivers/BSP/STM32H735G-DK/stm32h735g_discovery_ospi.c + // MX_OSPI_ClockConfig + config.rcc.pll2 = Some(Pll { + source: PllSource::HSE, + prediv: PllPreDiv::DIV5, // PLL_M + mul: PllMul::MUL80, // PLL_N + divp: Some(PllDiv::DIV5), + divq: Some(PllDiv::DIV2), + divr: Some(PllDiv::DIV2), + }); + // numbers adapted from Drivers/BSP/STM32H735G-DK/stm32h735g_discovery_lcd.c + // MX_LTDC_ClockConfig + config.rcc.pll3 = Some(Pll { + source: PllSource::HSE, + prediv: PllPreDiv::DIV5, // PLL_M + mul: PllMul::MUL160, // PLL_N + divp: Some(PllDiv::DIV2), + divq: Some(PllDiv::DIV2), + divr: Some(PllDiv::DIV83), + }); + config.rcc.voltage_scale = VoltageScale::Scale0; + config.rcc.supply_config = SupplyConfig::DirectSMPS; + config.rcc.sys = Sysclk::PLL1_P; + config.rcc.ahb_pre = AHBPrescaler::DIV2; + config.rcc.apb1_pre = APBPrescaler::DIV2; + config.rcc.apb2_pre = APBPrescaler::DIV2; + config.rcc.apb3_pre = APBPrescaler::DIV2; + config.rcc.apb4_pre = APBPrescaler::DIV2; + let p = embassy_stm32::init(config); + p + } +} + +mod bouncy_box { + use embedded_graphics::{geometry::Point, primitives::Rectangle}; + + enum Direction { + DownLeft, + DownRight, + UpLeft, + UpRight, + } + + pub struct BouncyBox { + direction: Direction, + child_rect: Rectangle, + parent_rect: Rectangle, + current_point: Point, + move_by: usize, + } + + // This calculates the coordinates of a chile rectangle bounced around inside a parent bounded box + impl BouncyBox { + pub fn new(child_rect: Rectangle, parent_rect: Rectangle, move_by: usize) -> Self { + let center_box = parent_rect.center(); + let center_img = child_rect.center(); + let current_point = Point::new(center_box.x - center_img.x / 2, center_box.y - center_img.y / 2); + Self { + direction: Direction::DownRight, + child_rect, + parent_rect, + current_point, + move_by, + } + } + + pub fn next_point(&mut self) -> Point { + let direction = &self.direction; + let img_height = self.child_rect.size.height as i32; + let box_height = self.parent_rect.size.height as i32; + let img_width = self.child_rect.size.width as i32; + let box_width = self.parent_rect.size.width as i32; + let move_by = self.move_by as i32; + + match direction { + Direction::DownLeft => { + self.current_point.x -= move_by; + self.current_point.y += move_by; + + let x_out_of_bounds = self.current_point.x < 0; + let y_out_of_bounds = (self.current_point.y + img_height) > box_height; + + if x_out_of_bounds && y_out_of_bounds { + self.direction = Direction::UpRight + } else if x_out_of_bounds && !y_out_of_bounds { + self.direction = Direction::DownRight + } else if !x_out_of_bounds && y_out_of_bounds { + self.direction = Direction::UpLeft + } + } + Direction::DownRight => { + self.current_point.x += move_by; + self.current_point.y += move_by; + + let x_out_of_bounds = (self.current_point.x + img_width) > box_width; + let y_out_of_bounds = (self.current_point.y + img_height) > box_height; + + if x_out_of_bounds && y_out_of_bounds { + self.direction = Direction::UpLeft + } else if x_out_of_bounds && !y_out_of_bounds { + self.direction = Direction::DownLeft + } else if !x_out_of_bounds && y_out_of_bounds { + self.direction = Direction::UpRight + } + } + Direction::UpLeft => { + self.current_point.x -= move_by; + self.current_point.y -= move_by; + + let x_out_of_bounds = self.current_point.x < 0; + let y_out_of_bounds = self.current_point.y < 0; + + if x_out_of_bounds && y_out_of_bounds { + self.direction = Direction::DownRight + } else if x_out_of_bounds && !y_out_of_bounds { + self.direction = Direction::UpRight + } else if !x_out_of_bounds && y_out_of_bounds { + self.direction = Direction::DownLeft + } + } + Direction::UpRight => { + self.current_point.x += move_by; + self.current_point.y -= move_by; + + let x_out_of_bounds = (self.current_point.x + img_width) > box_width; + let y_out_of_bounds = self.current_point.y < 0; + + if x_out_of_bounds && y_out_of_bounds { + self.direction = Direction::DownLeft + } else if x_out_of_bounds && !y_out_of_bounds { + self.direction = Direction::UpLeft + } else if !x_out_of_bounds && y_out_of_bounds { + self.direction = Direction::DownRight + } + } + } + + self.current_point + } + } +} From 47c7bb2bb539712de7534a7f58ac9685e9894645 Mon Sep 17 00:00:00 2001 From: David Haig Date: Fri, 28 Jun 2024 11:35:38 +0100 Subject: [PATCH 535/581] Updated metapac dependency to latest for LTDC support --- embassy-stm32/Cargo.toml | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/embassy-stm32/Cargo.toml b/embassy-stm32/Cargo.toml index 7a81b705d..d0e7ffd6d 100644 --- a/embassy-stm32/Cargo.toml +++ b/embassy-stm32/Cargo.toml @@ -72,8 +72,7 @@ rand_core = "0.6.3" sdio-host = "0.5.0" critical-section = "1.1" #stm32-metapac = { version = "15" } -#stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-a8ab0a3421ed0ca4b282f54028a0a2decacd8631" } -stm32-metapac = { git = "https://github.com/ninjasource/stm32-data-generated", branch = "stm32-ltdc", commit = "4c902fcd0889619e8af8bc03fa13b45c56fb3540" } +stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-cb8af7b3c2cfb88283e0ce979a318657853434c0" } vcell = "0.1.3" nb = "1.0.0" @@ -98,7 +97,7 @@ proc-macro2 = "1.0.36" quote = "1.0.15" #stm32-metapac = { version = "15", default-features = false, features = ["metadata"]} -stm32-metapac = { git = "https://github.com/ninjasource/stm32-data-generated", branch = "stm32-ltdc", commit = "4c902fcd0889619e8af8bc03fa13b45c56fb3540", default-features = false, features = ["metadata"] } +stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-cb8af7b3c2cfb88283e0ce979a318657853434c0", default-features = false, features = ["metadata"] } [features] default = ["rt"] From ece6203a996207f25db737032d3e0dae3df80b64 Mon Sep 17 00:00:00 2001 From: shufps Date: Fri, 28 Jun 2024 14:42:19 +0200 Subject: [PATCH 536/581] added DDS example --- examples/stm32l0/Cargo.toml | 2 +- examples/stm32l0/src/bin/dds.rs | 117 ++++++++++++++++++++++++++++++++ 2 files changed, 118 insertions(+), 1 deletion(-) create mode 100644 examples/stm32l0/src/bin/dds.rs diff --git a/examples/stm32l0/Cargo.toml b/examples/stm32l0/Cargo.toml index 2c599e7a3..5b0519ac4 100644 --- a/examples/stm32l0/Cargo.toml +++ b/examples/stm32l0/Cargo.toml @@ -6,7 +6,7 @@ license = "MIT OR Apache-2.0" [dependencies] # Change stm32l072cz to your chip name, if necessary. -embassy-stm32 = { version = "0.1.0", path = "../../embassy-stm32", features = ["defmt", "stm32l072cz", "time-driver-any", "exti", "memory-x"] } +embassy-stm32 = { version = "0.1.0", path = "../../embassy-stm32", features = ["defmt", "stm32l072cz", "unstable-pac", "time-driver-any", "exti", "memory-x"] } embassy-sync = { version = "0.6.0", path = "../../embassy-sync", features = ["defmt"] } embassy-executor = { version = "0.5.0", path = "../../embassy-executor", features = ["arch-cortex-m", "executor-thread", "defmt", "integrated-timers"] } embassy-time = { version = "0.3.1", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime", "tick-hz-32_768"] } diff --git a/examples/stm32l0/src/bin/dds.rs b/examples/stm32l0/src/bin/dds.rs new file mode 100644 index 000000000..9759fc8f3 --- /dev/null +++ b/examples/stm32l0/src/bin/dds.rs @@ -0,0 +1,117 @@ +#![no_std] +#![no_main] + +use core::option::Option::Some; +use defmt::info; +use defmt_rtt as _; // global logger +use embassy_executor::Spawner; +use embassy_stm32::gpio::OutputType; +use embassy_stm32::interrupt; +use embassy_stm32::pac; +use embassy_stm32::rcc::*; +use embassy_stm32::time::hz; +use embassy_stm32::timer::low_level::Timer as LLTimer; +use embassy_stm32::timer::low_level::*; +use embassy_stm32::timer::simple_pwm::PwmPin; +use embassy_stm32::timer::Channel; +use embassy_stm32::Config; +use panic_probe as _; + +const DDS_SINE_DATA: [u8; 256] = [ + 0x80, 0x83, 0x86, 0x89, 0x8c, 0x8f, 0x92, 0x95, 0x98, 0x9c, 0x9f, 0xa2, 0xa5, 0xa8, 0xab, 0xae, 0xb0, 0xb3, 0xb6, + 0xb9, 0xbc, 0xbf, 0xc1, 0xc4, 0xc7, 0xc9, 0xcc, 0xce, 0xd1, 0xd3, 0xd5, 0xd8, 0xda, 0xdc, 0xde, 0xe0, 0xe2, 0xe4, + 0xe6, 0xe8, 0xea, 0xec, 0xed, 0xef, 0xf0, 0xf2, 0xf3, 0xf5, 0xf6, 0xf7, 0xf8, 0xf9, 0xfa, 0xfb, 0xfc, 0xfc, 0xfd, + 0xfe, 0xfe, 0xfe, 0xfe, 0xfe, 0xfe, 0xfe, 0xfe, 0xfe, 0xfe, 0xfe, 0xfe, 0xfe, 0xfe, 0xfe, 0xfd, 0xfc, 0xfc, 0xfb, + 0xfa, 0xf9, 0xf8, 0xf7, 0xf6, 0xf5, 0xf3, 0xf2, 0xf0, 0xef, 0xed, 0xec, 0xea, 0xe8, 0xe6, 0xe4, 0xe2, 0xe0, 0xde, + 0xdc, 0xda, 0xd8, 0xd5, 0xd3, 0xd1, 0xce, 0xcc, 0xc9, 0xc7, 0xc4, 0xc1, 0xbf, 0xbc, 0xb9, 0xb6, 0xb3, 0xb0, 0xae, + 0xab, 0xa8, 0xa5, 0xa2, 0x9f, 0x9c, 0x98, 0x95, 0x92, 0x8f, 0x8c, 0x89, 0x86, 0x83, 0x80, 0x7c, 0x79, 0x76, 0x73, + 0x70, 0x6d, 0x6a, 0x67, 0x63, 0x60, 0x5d, 0x5a, 0x57, 0x54, 0x51, 0x4f, 0x4c, 0x49, 0x46, 0x43, 0x40, 0x3e, 0x3b, + 0x38, 0x36, 0x33, 0x31, 0x2e, 0x2c, 0x2a, 0x27, 0x25, 0x23, 0x21, 0x1f, 0x1d, 0x1b, 0x19, 0x17, 0x15, 0x13, 0x12, + 0x10, 0x0f, 0x0d, 0x0c, 0x0a, 0x09, 0x08, 0x07, 0x06, 0x05, 0x04, 0x03, 0x03, 0x02, 0x01, 0x01, 0x01, 0x01, 0x01, + 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x02, 0x03, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, + 0x0a, 0x0c, 0x0d, 0x0f, 0x10, 0x12, 0x13, 0x15, 0x17, 0x19, 0x1b, 0x1d, 0x1f, 0x21, 0x23, 0x25, 0x27, 0x2a, 0x2c, + 0x2e, 0x31, 0x33, 0x36, 0x38, 0x3b, 0x3e, 0x40, 0x43, 0x46, 0x49, 0x4c, 0x4f, 0x51, 0x54, 0x57, 0x5a, 0x5d, 0x60, + 0x63, 0x67, 0x6a, 0x6d, 0x70, 0x73, 0x76, 0x79, 0x7c, +]; + +// frequency: 15625/(256/(DDS_INCR/2**24)) = 999,99999Hz +static mut DDS_INCR: u32 = 0x10624DD2; + +// fractional phase accumulator +static mut DDS_AKKU: u32 = 0x00000000; + +#[interrupt] +fn TIM2() { + unsafe { + // get next value of DDS + DDS_AKKU = DDS_AKKU.wrapping_add(DDS_INCR); + let value = (DDS_SINE_DATA[(DDS_AKKU >> 24) as usize] as u16) << 3; + + // set new output compare value + pac::TIM2.ccr(2).modify(|w| w.set_ccr(value)); + + // reset interrupt flag + pac::TIM2.sr().modify(|r| r.set_uif(false)); + } +} + +#[embassy_executor::main] +async fn main(_spawner: Spawner) { + info!("Hello World!"); + + // configure for 32MHz (HSI16 * 6 / 3) + let mut config = Config::default(); + config.rcc.sys = Sysclk::PLL1_R; + config.rcc.hsi = true; + config.rcc.pll = Some(Pll { + source: PllSource::HSI, + div: PllDiv::DIV3, + mul: PllMul::MUL6, + }); + + let p = embassy_stm32::init(config); + + // setup PWM pin in AF mode + let _ch3 = PwmPin::new_ch3(p.PA2, OutputType::PushPull); + + // initialize timer + let timer = LLTimer::new(p.TIM2); + + // set counting mode + timer.set_counting_mode(CountingMode::EdgeAlignedUp); + + // set pwm sample frequency + timer.set_frequency(hz(15625)); + + // enable outputs + timer.enable_outputs(); + + // start timer + timer.start(); + + // set output compare mode + timer.set_output_compare_mode(Channel::Ch3, OutputCompareMode::PwmMode1); + + // set output compare preload + timer.set_output_compare_preload(Channel::Ch3, true); + + // set output polarity + timer.set_output_polarity(Channel::Ch3, OutputPolarity::ActiveHigh); + + // set compare value + timer.set_compare_value(Channel::Ch3, timer.get_max_compare_value() / 2); + + // enable pwm channel + timer.enable_channel(Channel::Ch3, true); + + // enable timer interrupts + timer.enable_update_interrupt(true); + unsafe { cortex_m::peripheral::NVIC::unmask(interrupt::TIM2) }; + + async { + loop { + embassy_time::Timer::after_millis(5000).await; + } + } + .await; +} From b2a0eb3cb4b9d0f9b4ecc12b6e5437e4616b4aa6 Mon Sep 17 00:00:00 2001 From: shufps Date: Fri, 28 Jun 2024 14:43:39 +0200 Subject: [PATCH 537/581] added comment --- examples/stm32l0/src/bin/dds.rs | 1 + 1 file changed, 1 insertion(+) diff --git a/examples/stm32l0/src/bin/dds.rs b/examples/stm32l0/src/bin/dds.rs index 9759fc8f3..21647a68d 100644 --- a/examples/stm32l0/src/bin/dds.rs +++ b/examples/stm32l0/src/bin/dds.rs @@ -75,6 +75,7 @@ async fn main(_spawner: Spawner) { let _ch3 = PwmPin::new_ch3(p.PA2, OutputType::PushPull); // initialize timer + // we cannot use SimplePWM here because the Time is privately encapsulated let timer = LLTimer::new(p.TIM2); // set counting mode From 2462a22140834e80e63465dabcf8a783e1adb94f Mon Sep 17 00:00:00 2001 From: shufps Date: Fri, 28 Jun 2024 14:52:21 +0200 Subject: [PATCH 538/581] format --- examples/stm32l0/src/bin/dds.rs | 8 +++----- 1 file changed, 3 insertions(+), 5 deletions(-) diff --git a/examples/stm32l0/src/bin/dds.rs b/examples/stm32l0/src/bin/dds.rs index 21647a68d..a54b28a93 100644 --- a/examples/stm32l0/src/bin/dds.rs +++ b/examples/stm32l0/src/bin/dds.rs @@ -2,19 +2,17 @@ #![no_main] use core::option::Option::Some; + use defmt::info; use defmt_rtt as _; // global logger use embassy_executor::Spawner; use embassy_stm32::gpio::OutputType; -use embassy_stm32::interrupt; -use embassy_stm32::pac; use embassy_stm32::rcc::*; use embassy_stm32::time::hz; -use embassy_stm32::timer::low_level::Timer as LLTimer; -use embassy_stm32::timer::low_level::*; +use embassy_stm32::timer::low_level::{Timer as LLTimer, *}; use embassy_stm32::timer::simple_pwm::PwmPin; use embassy_stm32::timer::Channel; -use embassy_stm32::Config; +use embassy_stm32::{interrupt, pac, Config}; use panic_probe as _; const DDS_SINE_DATA: [u8; 256] = [ From 1123e3fd41e7b23dd0507816f1ff67fc0de6b5d1 Mon Sep 17 00:00:00 2001 From: David Haig Date: Fri, 28 Jun 2024 15:12:17 +0100 Subject: [PATCH 539/581] Get dsi_bsp example to compile again --- embassy-stm32/src/ltdc.rs | 224 ++++++++++++++++++------------- examples/stm32h7/src/bin/ltdc.rs | 4 +- 2 files changed, 131 insertions(+), 97 deletions(-) diff --git a/embassy-stm32/src/ltdc.rs b/embassy-stm32/src/ltdc.rs index adc9b8862..64558ee52 100644 --- a/embassy-stm32/src/ltdc.rs +++ b/embassy-stm32/src/ltdc.rs @@ -175,8 +175,31 @@ impl interrupt::typelevel::Handler for InterruptHandl } impl<'d, T: Instance> Ltdc<'d, T> { + // Create a new LTDC driver without specifying color and control pins. This is typically used if you want to drive a display though a DsiHost + /// Note: Full-Duplex modes are not supported at this time + pub fn new(peri: impl Peripheral

+ 'd) -> Self { + critical_section::with(|_cs| { + // RM says the pllsaidivr should only be changed when pllsai is off. But this could have other unintended side effects. So let's just give it a try like this. + // According to the debugger, this bit gets set, anyway. + #[cfg(stm32f7)] + stm32_metapac::RCC + .dckcfgr1() + .modify(|w| w.set_pllsaidivr(stm32_metapac::rcc::vals::Pllsaidivr::DIV2)); + + // It is set to RCC_PLLSAIDIVR_2 in ST's BSP example for the STM32469I-DISCO. + #[cfg(not(any(stm32f7, stm32u5)))] + stm32_metapac::RCC + .dckcfgr() + .modify(|w| w.set_pllsaidivr(stm32_metapac::rcc::vals::Pllsaidivr::DIV2)); + }); + + rcc::enable_and_reset::(); + into_ref!(peri); + Self { _peri: peri } + } + /// Create a new LTDC driver. 8 pins per color channel for blue, green and red - pub fn new( + pub fn new_with_pins( peri: impl Peripheral

+ 'd, _irq: impl interrupt::typelevel::Binding> + 'd, clk: impl Peripheral

> + 'd, @@ -241,93 +264,7 @@ impl<'d, T: Instance> Ltdc<'d, T> { Self { _peri: peri } } - fn clear_interrupt_flags() { - T::regs().icr().write(|w| { - w.set_cfuif(Cfuif::CLEAR); - w.set_clif(Clif::CLEAR); - w.set_crrif(Crrif::CLEAR); - w.set_cterrif(Cterrif::CLEAR); - }); - } - - fn enable_interrupts(enable: bool) { - T::regs().ier().write(|w| { - w.set_fuie(enable); - w.set_lie(false); // we are not interested in the line interrupt enable event - w.set_rrie(enable); - w.set_terrie(enable) - }); - - // enable interrupts for LTDC peripheral - T::Interrupt::unpend(); - if enable { - unsafe { T::Interrupt::enable() }; - } else { - T::Interrupt::disable() - } - } - - /// Set the current buffer. The async function will return when buffer has been completely copied to the LCD screen - /// frame_buffer_addr is a pointer to memory that should not move (best to make it static) - pub async fn set_buffer(&mut self, layer: LtdcLayer, frame_buffer_addr: *const ()) -> Result<(), Error> { - let mut bits = T::regs().isr().read(); - - // if all clear - if !bits.fuif() && !bits.lif() && !bits.rrif() && !bits.terrif() { - // wait for interrupt - poll_fn(|cx| { - // quick check to avoid registration if already done. - let bits = T::regs().isr().read(); - if bits.fuif() || bits.lif() || bits.rrif() || bits.terrif() { - return Poll::Ready(()); - } - - LTDC_WAKER.register(cx.waker()); - Self::clear_interrupt_flags(); // don't poison the request with old flags - Self::enable_interrupts(true); - - // set the new frame buffer address - let layer = T::regs().layer(layer as usize); - layer.cfbar().modify(|w| w.set_cfbadd(frame_buffer_addr as u32)); - - // configure a shadow reload for the next blanking period - T::regs().srcr().write(|w| { - w.set_vbr(Vbr::RELOAD); - }); - - // need to check condition after register to avoid a race - // condition that would result in lost notifications. - let bits = T::regs().isr().read(); - if bits.fuif() || bits.lif() || bits.rrif() || bits.terrif() { - Poll::Ready(()) - } else { - Poll::Pending - } - }) - .await; - - // re-read the status register after wait. - bits = T::regs().isr().read(); - } - - let result = if bits.fuif() { - Err(Error::FifoUnderrun) - } else if bits.terrif() { - Err(Error::TransferError) - } else if bits.lif() { - panic!("line interrupt event is disabled") - } else if bits.rrif() { - // register reload flag is expected - Ok(()) - } else { - unreachable!("all interrupt status values checked") - }; - - Self::clear_interrupt_flags(); - result - } - - /// Initialize the display + /// Initialise and enable the display pub fn init(&mut self, config: &LtdcConfiguration) { use stm32_metapac::ltdc::vals::{Depol, Hspol, Pcpol, Vspol}; let ltdc = T::regs(); @@ -393,16 +330,27 @@ impl<'d, T: Instance> Ltdc<'d, T> { w.set_bcblue(0); }); - // enable LTDC by setting LTDCEN bit - ltdc.gcr().modify(|w| { - w.set_ltdcen(true); - }); + self.enable(); } - /// Enable the layer + /// Set the enable bit in the control register and assert that it has been enabled /// - /// clut - color look-up table applies to L8, AL44 and AL88 pixel format and will default to greyscale if None supplied and these pixel formats are used - pub fn enable_layer(&mut self, layer_config: &LtdcLayerConfig, clut: Option<&[RgbColor]>) { + /// This does need to be called if init has already been called + pub fn enable(&mut self) { + T::regs().gcr().modify(|w| w.set_ltdcen(true)); + assert!(T::regs().gcr().read().ltdcen()) + } + + /// Unset the enable bit in the control register and assert that it has been disabled + pub fn disable(&mut self) { + T::regs().gcr().modify(|w| w.set_ltdcen(false)); + assert!(!T::regs().gcr().read().ltdcen()) + } + + /// Initialise and enable the layer + /// + /// clut - a 256 length color look-up table applies to L8, AL44 and AL88 pixel format and will default to greyscale if `None` supplied and these pixel formats are used + pub fn init_layer(&mut self, layer_config: &LtdcLayerConfig, clut: Option<&[RgbColor]>) { let ltdc = T::regs(); let layer = ltdc.layer(layer_config.layer as usize); @@ -475,6 +423,92 @@ impl<'d, T: Instance> Ltdc<'d, T> { w.set_len(true); }); } + + /// Set the current buffer. The async function will return when buffer has been completely copied to the LCD screen + /// frame_buffer_addr is a pointer to memory that should not move (best to make it static) + pub async fn set_buffer(&mut self, layer: LtdcLayer, frame_buffer_addr: *const ()) -> Result<(), Error> { + let mut bits = T::regs().isr().read(); + + // if all clear + if !bits.fuif() && !bits.lif() && !bits.rrif() && !bits.terrif() { + // wait for interrupt + poll_fn(|cx| { + // quick check to avoid registration if already done. + let bits = T::regs().isr().read(); + if bits.fuif() || bits.lif() || bits.rrif() || bits.terrif() { + return Poll::Ready(()); + } + + LTDC_WAKER.register(cx.waker()); + Self::clear_interrupt_flags(); // don't poison the request with old flags + Self::enable_interrupts(true); + + // set the new frame buffer address + let layer = T::regs().layer(layer as usize); + layer.cfbar().modify(|w| w.set_cfbadd(frame_buffer_addr as u32)); + + // configure a shadow reload for the next blanking period + T::regs().srcr().write(|w| { + w.set_vbr(Vbr::RELOAD); + }); + + // need to check condition after register to avoid a race + // condition that would result in lost notifications. + let bits = T::regs().isr().read(); + if bits.fuif() || bits.lif() || bits.rrif() || bits.terrif() { + Poll::Ready(()) + } else { + Poll::Pending + } + }) + .await; + + // re-read the status register after wait. + bits = T::regs().isr().read(); + } + + let result = if bits.fuif() { + Err(Error::FifoUnderrun) + } else if bits.terrif() { + Err(Error::TransferError) + } else if bits.lif() { + panic!("line interrupt event is disabled") + } else if bits.rrif() { + // register reload flag is expected + Ok(()) + } else { + unreachable!("all interrupt status values checked") + }; + + Self::clear_interrupt_flags(); + result + } + + fn clear_interrupt_flags() { + T::regs().icr().write(|w| { + w.set_cfuif(Cfuif::CLEAR); + w.set_clif(Clif::CLEAR); + w.set_crrif(Crrif::CLEAR); + w.set_cterrif(Cterrif::CLEAR); + }); + } + + fn enable_interrupts(enable: bool) { + T::regs().ier().write(|w| { + w.set_fuie(enable); + w.set_lie(false); // we are not interested in the line interrupt enable event + w.set_rrie(enable); + w.set_terrie(enable) + }); + + // enable interrupts for LTDC peripheral + T::Interrupt::unpend(); + if enable { + unsafe { T::Interrupt::enable() }; + } else { + T::Interrupt::disable() + } + } } impl<'d, T: Instance> Drop for Ltdc<'d, T> { diff --git a/examples/stm32h7/src/bin/ltdc.rs b/examples/stm32h7/src/bin/ltdc.rs index 3bd307012..3b56bbb6c 100644 --- a/examples/stm32h7/src/bin/ltdc.rs +++ b/examples/stm32h7/src/bin/ltdc.rs @@ -87,7 +87,7 @@ async fn main(spawner: Spawner) { }; info!("init ltdc"); - let mut ltdc = Ltdc::new( + let mut ltdc = Ltdc::new_with_pins( p.LTDC, Irqs, p.PG7, p.PC6, p.PA4, p.PG14, p.PD0, p.PD6, p.PA8, p.PE12, p.PA3, p.PB8, p.PB9, p.PB1, p.PB0, p.PA6, p.PE11, p.PH15, p.PH4, p.PC7, p.PD3, p.PE0, p.PH3, p.PH8, p.PH9, p.PH10, p.PH11, p.PE1, p.PE15, ); @@ -109,7 +109,7 @@ async fn main(spawner: Spawner) { let clut = build_clut(&color_map); // enable the bottom layer with a 256 color lookup table - ltdc.enable_layer(&layer_config, Some(&clut)); + ltdc.init_layer(&layer_config, Some(&clut)); // Safety: the DoubleBuffer controls access to the statically allocated frame buffers // and it is the only thing that mutates their content From 79f00e54cc4d13a28c7ccc9a13345bf2f3730f42 Mon Sep 17 00:00:00 2001 From: David Haig Date: Fri, 28 Jun 2024 18:11:34 +0100 Subject: [PATCH 540/581] Moved ltdc example to its own crate --- ci.sh | 1 + embassy-stm32/src/ltdc.rs | 40 ++++++------ examples/stm32h7/Cargo.toml | 2 - examples/stm32h735/.cargo/config.toml | 8 +++ examples/stm32h735/Cargo.toml | 61 ++++++++++++++++++ examples/stm32h735/build.rs | 35 ++++++++++ examples/stm32h735/memory.x | 5 ++ .../{stm32h7 => stm32h735}/src/bin/ferris.bmp | Bin .../{stm32h7 => stm32h735}/src/bin/ltdc.rs | 15 +---- 9 files changed, 134 insertions(+), 33 deletions(-) create mode 100644 examples/stm32h735/.cargo/config.toml create mode 100644 examples/stm32h735/Cargo.toml create mode 100644 examples/stm32h735/build.rs create mode 100644 examples/stm32h735/memory.x rename examples/{stm32h7 => stm32h735}/src/bin/ferris.bmp (100%) rename examples/{stm32h7 => stm32h735}/src/bin/ltdc.rs (98%) diff --git a/ci.sh b/ci.sh index 04877dcd3..8ac9e1ccd 100755 --- a/ci.sh +++ b/ci.sh @@ -201,6 +201,7 @@ cargo batch \ --- build --release --manifest-path examples/stm32g4/Cargo.toml --target thumbv7em-none-eabi --out-dir out/examples/stm32g4 \ --- build --release --manifest-path examples/stm32h5/Cargo.toml --target thumbv8m.main-none-eabihf --out-dir out/examples/stm32h5 \ --- build --release --manifest-path examples/stm32h7/Cargo.toml --target thumbv7em-none-eabi --out-dir out/examples/stm32h7 \ + --- build --release --manifest-path examples/stm32h735/Cargo.toml --target thumbv7em-none-eabi --out-dir out/examples/stm32h735 \ --- build --release --manifest-path examples/stm32h7rs/Cargo.toml --target thumbv7em-none-eabi --out-dir out/examples/stm32h7rs \ --- build --release --manifest-path examples/stm32l0/Cargo.toml --target thumbv6m-none-eabi --out-dir out/examples/stm32l0 \ --- build --release --manifest-path examples/stm32l1/Cargo.toml --target thumbv7m-none-eabi --out-dir out/examples/stm32l1 \ diff --git a/embassy-stm32/src/ltdc.rs b/embassy-stm32/src/ltdc.rs index 64558ee52..564236d6f 100644 --- a/embassy-stm32/src/ltdc.rs +++ b/embassy-stm32/src/ltdc.rs @@ -178,27 +178,13 @@ impl<'d, T: Instance> Ltdc<'d, T> { // Create a new LTDC driver without specifying color and control pins. This is typically used if you want to drive a display though a DsiHost /// Note: Full-Duplex modes are not supported at this time pub fn new(peri: impl Peripheral

+ 'd) -> Self { - critical_section::with(|_cs| { - // RM says the pllsaidivr should only be changed when pllsai is off. But this could have other unintended side effects. So let's just give it a try like this. - // According to the debugger, this bit gets set, anyway. - #[cfg(stm32f7)] - stm32_metapac::RCC - .dckcfgr1() - .modify(|w| w.set_pllsaidivr(stm32_metapac::rcc::vals::Pllsaidivr::DIV2)); - - // It is set to RCC_PLLSAIDIVR_2 in ST's BSP example for the STM32469I-DISCO. - #[cfg(not(any(stm32f7, stm32u5)))] - stm32_metapac::RCC - .dckcfgr() - .modify(|w| w.set_pllsaidivr(stm32_metapac::rcc::vals::Pllsaidivr::DIV2)); - }); - - rcc::enable_and_reset::(); + Self::setup_clocks(); into_ref!(peri); Self { _peri: peri } } /// Create a new LTDC driver. 8 pins per color channel for blue, green and red + #[allow(clippy::too_many_arguments)] pub fn new_with_pins( peri: impl Peripheral

+ 'd, _irq: impl interrupt::typelevel::Binding> + 'd, @@ -230,8 +216,7 @@ impl<'d, T: Instance> Ltdc<'d, T> { r6: impl Peripheral

> + 'd, r7: impl Peripheral

> + 'd, ) -> Self { - rcc::enable_and_reset::(); - + Self::setup_clocks(); into_ref!(peri); new_pin!(clk, AfType::output(OutputType::PushPull, Speed::VeryHigh)); new_pin!(hsync, AfType::output(OutputType::PushPull, Speed::VeryHigh)); @@ -484,6 +469,25 @@ impl<'d, T: Instance> Ltdc<'d, T> { result } + fn setup_clocks() { + critical_section::with(|_cs| { + // RM says the pllsaidivr should only be changed when pllsai is off. But this could have other unintended side effects. So let's just give it a try like this. + // According to the debugger, this bit gets set, anyway. + #[cfg(stm32f7)] + crate::pac::RCC + .dckcfgr1() + .modify(|w| w.set_pllsaidivr(stm32_metapac::rcc::vals::Pllsaidivr::DIV2)); + + // It is set to RCC_PLLSAIDIVR_2 in ST's BSP example for the STM32469I-DISCO. + #[cfg(stm32f4)] + crate::pac::RCC + .dckcfgr() + .modify(|w| w.set_pllsaidivr(stm32_metapac::rcc::vals::Pllsaidivr::DIV2)); + }); + + rcc::enable_and_reset::(); + } + fn clear_interrupt_flags() { T::regs().icr().write(|w| { w.set_cfuif(Cfuif::CLEAR); diff --git a/examples/stm32h7/Cargo.toml b/examples/stm32h7/Cargo.toml index 6f3007492..0584f3916 100644 --- a/examples/stm32h7/Cargo.toml +++ b/examples/stm32h7/Cargo.toml @@ -34,8 +34,6 @@ stm32-fmc = "0.3.0" embedded-storage = "0.3.1" static_cell = "2" chrono = { version = "^0.4", default-features = false } -embedded-graphics = { version = "0.8.1" } -tinybmp = { version = "0.5" } # cargo build/run [profile.dev] diff --git a/examples/stm32h735/.cargo/config.toml b/examples/stm32h735/.cargo/config.toml new file mode 100644 index 000000000..95536c6a8 --- /dev/null +++ b/examples/stm32h735/.cargo/config.toml @@ -0,0 +1,8 @@ +[target.thumbv7em-none-eabihf] +runner = 'probe-rs run --chip STM32H735IGKx' + +[build] +target = "thumbv7em-none-eabihf" # Cortex-M4F and Cortex-M7F (with FPU) + +[env] +DEFMT_LOG = "trace" diff --git a/examples/stm32h735/Cargo.toml b/examples/stm32h735/Cargo.toml new file mode 100644 index 000000000..fc21cc894 --- /dev/null +++ b/examples/stm32h735/Cargo.toml @@ -0,0 +1,61 @@ +[package] +edition = "2021" +name = "embassy-stm32h735-examples" +version = "0.1.0" +license = "MIT OR Apache-2.0" + +[dependencies] +embassy-stm32 = { version = "0.1.0", path = "../../embassy-stm32", features = ["defmt", "stm32h735ig", "time-driver-tim2", "exti", "memory-x", "unstable-pac", "chrono"] } +embassy-sync = { version = "0.6.0", path = "../../embassy-sync", features = ["defmt"] } +embassy-embedded-hal = { version = "0.1.0", path = "../../embassy-embedded-hal" } +embassy-executor = { version = "0.5.0", path = "../../embassy-executor", features = ["task-arena-size-32768", "arch-cortex-m", "executor-thread", "executor-interrupt", "defmt", "integrated-timers"] } +embassy-time = { version = "0.3.1", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime", "tick-hz-32_768"] } +embassy-futures = { version = "0.1.0", path = "../../embassy-futures" } + +defmt = "0.3" +defmt-rtt = "0.4" + +cortex-m = { version = "0.7.6", features = ["inline-asm", "critical-section-single-core"] } +cortex-m-rt = "0.7.0" +panic-probe = { version = "0.3", features = ["print-defmt"] } +heapless = { version = "0.8", default-features = false } +embedded-graphics = { version = "0.8.1" } +tinybmp = { version = "0.5" } + +# cargo build/run +[profile.dev] +codegen-units = 1 +debug = 2 +debug-assertions = true # <- +incremental = false +opt-level = 3 # <- +overflow-checks = true # <- + +# cargo test +[profile.test] +codegen-units = 1 +debug = 2 +debug-assertions = true # <- +incremental = false +opt-level = 3 # <- +overflow-checks = true # <- + +# cargo build/run --release +[profile.release] +codegen-units = 1 +debug = 2 +debug-assertions = false # <- +incremental = false +lto = 'fat' +opt-level = 3 # <- +overflow-checks = false # <- + +# cargo test --release +[profile.bench] +codegen-units = 1 +debug = 2 +debug-assertions = false # <- +incremental = false +lto = 'fat' +opt-level = 3 # <- +overflow-checks = false # <- diff --git a/examples/stm32h735/build.rs b/examples/stm32h735/build.rs new file mode 100644 index 000000000..30691aa97 --- /dev/null +++ b/examples/stm32h735/build.rs @@ -0,0 +1,35 @@ +//! This build script copies the `memory.x` file from the crate root into +//! a directory where the linker can always find it at build time. +//! For many projects this is optional, as the linker always searches the +//! project root directory -- wherever `Cargo.toml` is. However, if you +//! are using a workspace or have a more complicated build setup, this +//! build script becomes required. Additionally, by requesting that +//! Cargo re-run the build script whenever `memory.x` is changed, +//! updating `memory.x` ensures a rebuild of the application with the +//! new memory settings. + +use std::env; +use std::fs::File; +use std::io::Write; +use std::path::PathBuf; + +fn main() { + // Put `memory.x` in our output directory and ensure it's + // on the linker search path. + let out = &PathBuf::from(env::var_os("OUT_DIR").unwrap()); + File::create(out.join("memory.x")) + .unwrap() + .write_all(include_bytes!("memory.x")) + .unwrap(); + println!("cargo:rustc-link-search={}", out.display()); + + // By default, Cargo will re-run a build script whenever + // any file in the project changes. By specifying `memory.x` + // here, we ensure the build script is only re-run when + // `memory.x` is changed. + println!("cargo:rerun-if-changed=memory.x"); + + println!("cargo:rustc-link-arg-bins=--nmagic"); + println!("cargo:rustc-link-arg-bins=-Tlink.x"); + println!("cargo:rustc-link-arg-bins=-Tdefmt.x"); +} diff --git a/examples/stm32h735/memory.x b/examples/stm32h735/memory.x new file mode 100644 index 000000000..3a70d24d2 --- /dev/null +++ b/examples/stm32h735/memory.x @@ -0,0 +1,5 @@ +MEMORY +{ + FLASH : ORIGIN = 0x08000000, LENGTH = 1024K + RAM : ORIGIN = 0x24000000, LENGTH = 320K +} \ No newline at end of file diff --git a/examples/stm32h7/src/bin/ferris.bmp b/examples/stm32h735/src/bin/ferris.bmp similarity index 100% rename from examples/stm32h7/src/bin/ferris.bmp rename to examples/stm32h735/src/bin/ferris.bmp diff --git a/examples/stm32h7/src/bin/ltdc.rs b/examples/stm32h735/src/bin/ltdc.rs similarity index 98% rename from examples/stm32h7/src/bin/ltdc.rs rename to examples/stm32h735/src/bin/ltdc.rs index 3b56bbb6c..5c75a7db1 100644 --- a/examples/stm32h7/src/bin/ltdc.rs +++ b/examples/stm32h735/src/bin/ltdc.rs @@ -36,19 +36,9 @@ const DISPLAY_HEIGHT: usize = 272; const MY_TASK_POOL_SIZE: usize = 2; // the following two display buffers consume 261120 bytes that just about fits into axis ram found on the mcu -// see memory.x linker script pub static mut FB1: [TargetPixelType; DISPLAY_WIDTH * DISPLAY_HEIGHT] = [0; DISPLAY_WIDTH * DISPLAY_HEIGHT]; pub static mut FB2: [TargetPixelType; DISPLAY_WIDTH * DISPLAY_HEIGHT] = [0; DISPLAY_WIDTH * DISPLAY_HEIGHT]; -// a basic memory.x linker script for the stm32h735g-dk is as follows: -/* -MEMORY -{ - FLASH : ORIGIN = 0x08000000, LENGTH = 1024K - RAM : ORIGIN = 0x24000000, LENGTH = 320K -} -*/ - bind_interrupts!(struct Irqs { LTDC => ltdc::InterruptHandler; }); @@ -110,7 +100,7 @@ async fn main(spawner: Spawner) { // enable the bottom layer with a 256 color lookup table ltdc.init_layer(&layer_config, Some(&clut)); - + // Safety: the DoubleBuffer controls access to the statically allocated frame buffers // and it is the only thing that mutates their content let mut double_buffer = DoubleBuffer::new( @@ -369,8 +359,7 @@ mod rcc_setup { config.rcc.apb2_pre = APBPrescaler::DIV2; config.rcc.apb3_pre = APBPrescaler::DIV2; config.rcc.apb4_pre = APBPrescaler::DIV2; - let p = embassy_stm32::init(config); - p + embassy_stm32::init(config) } } From 6edf7b4688361e165c2ea9af03df9725a89a853e Mon Sep 17 00:00:00 2001 From: David Haig Date: Fri, 28 Jun 2024 18:17:17 +0100 Subject: [PATCH 541/581] Applied formatting --- embassy-stm32/src/ltdc.rs | 21 ++++++++------- examples/stm32h735/src/bin/ltdc.rs | 42 +++++++++++++----------------- 2 files changed, 29 insertions(+), 34 deletions(-) diff --git a/embassy-stm32/src/ltdc.rs b/embassy-stm32/src/ltdc.rs index 564236d6f..4c5239971 100644 --- a/embassy-stm32/src/ltdc.rs +++ b/embassy-stm32/src/ltdc.rs @@ -2,18 +2,19 @@ //! See ST application note AN4861: Introduction to LCD-TFT display controller (LTDC) on STM32 MCUs for high level details //! This module was tested against the stm32h735g-dk using the RM0468 ST reference manual for detailed register information -use crate::{ - gpio::{AfType, OutputType, Speed}, - interrupt::{self, typelevel::Interrupt}, - peripherals, rcc, Peripheral, -}; -use core::{future::poll_fn, marker::PhantomData, task::Poll}; +use core::future::poll_fn; +use core::marker::PhantomData; +use core::task::Poll; + use embassy_hal_internal::{into_ref, PeripheralRef}; use embassy_sync::waitqueue::AtomicWaker; -use stm32_metapac::ltdc::{ - regs::Dccr, - vals::{Bf1, Bf2, Cfuif, Clif, Crrif, Cterrif, Pf, Vbr}, -}; +use stm32_metapac::ltdc::regs::Dccr; +use stm32_metapac::ltdc::vals::{Bf1, Bf2, Cfuif, Clif, Crrif, Cterrif, Pf, Vbr}; + +use crate::gpio::{AfType, OutputType, Speed}; +use crate::interrupt::typelevel::Interrupt; +use crate::interrupt::{self}; +use crate::{peripherals, rcc, Peripheral}; static LTDC_WAKER: AtomicWaker = AtomicWaker::new(); diff --git a/examples/stm32h735/src/bin/ltdc.rs b/examples/stm32h735/src/bin/ltdc.rs index 5c75a7db1..a36fdef2c 100644 --- a/examples/stm32h735/src/bin/ltdc.rs +++ b/examples/stm32h735/src/bin/ltdc.rs @@ -11,22 +11,18 @@ use bouncy_box::BouncyBox; use defmt::{info, unwrap}; use embassy_executor::Spawner; -use embassy_stm32::{ - bind_interrupts, - gpio::{Level, Output, Speed}, - ltdc::{self, Ltdc, LtdcConfiguration, LtdcLayer, LtdcLayerConfig, PolarityActive, PolarityEdge}, - peripherals, -}; +use embassy_stm32::gpio::{Level, Output, Speed}; +use embassy_stm32::ltdc::{self, Ltdc, LtdcConfiguration, LtdcLayer, LtdcLayerConfig, PolarityActive, PolarityEdge}; +use embassy_stm32::{bind_interrupts, peripherals}; use embassy_time::{Duration, Timer}; -use embedded_graphics::{ - draw_target::DrawTarget, - geometry::{OriginDimensions, Point, Size}, - image::Image, - pixelcolor::{raw::RawU24, Rgb888}, - prelude::*, - primitives::Rectangle, - Pixel, -}; +use embedded_graphics::draw_target::DrawTarget; +use embedded_graphics::geometry::{OriginDimensions, Point, Size}; +use embedded_graphics::image::Image; +use embedded_graphics::pixelcolor::raw::RawU24; +use embedded_graphics::pixelcolor::Rgb888; +use embedded_graphics::prelude::*; +use embedded_graphics::primitives::Rectangle; +use embedded_graphics::Pixel; use heapless::{Entry, FnvIndexMap}; use tinybmp::Bmp; use {defmt_rtt as _, panic_probe as _}; @@ -100,7 +96,7 @@ async fn main(spawner: Spawner) { // enable the bottom layer with a 256 color lookup table ltdc.init_layer(&layer_config, Some(&clut)); - + // Safety: the DoubleBuffer controls access to the statically allocated frame buffers // and it is the only thing that mutates their content let mut double_buffer = DoubleBuffer::new( @@ -283,12 +279,9 @@ impl OriginDimensions for DoubleBuffer { mod rcc_setup { - use embassy_stm32::{rcc::*, Peripherals}; - use embassy_stm32::{ - rcc::{Hse, HseMode}, - time::Hertz, - Config, - }; + use embassy_stm32::rcc::{Hse, HseMode, *}; + use embassy_stm32::time::Hertz; + use embassy_stm32::{Config, Peripherals}; /// Sets up clocks for the stm32h735g mcu /// change this if you plan to use a different microcontroller @@ -359,12 +352,13 @@ mod rcc_setup { config.rcc.apb2_pre = APBPrescaler::DIV2; config.rcc.apb3_pre = APBPrescaler::DIV2; config.rcc.apb4_pre = APBPrescaler::DIV2; - embassy_stm32::init(config) + embassy_stm32::init(config) } } mod bouncy_box { - use embedded_graphics::{geometry::Point, primitives::Rectangle}; + use embedded_graphics::geometry::Point; + use embedded_graphics::primitives::Rectangle; enum Direction { DownLeft, From 96cdf9c9e046300b76969c39ac950d512e0184ce Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Krzysztof=20Kr=C3=B3lczyk?= Date: Thu, 27 Jun 2024 21:22:16 +0200 Subject: [PATCH 542/581] rp/i2c: add address flexibility and example MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Previous i2c examples are using either blocking Embassy API or e-h traits, this example uses Embassy pub API directly. Signed-off-by: Krzysztof Królczyk --- embassy-rp/src/i2c.rs | 38 +++++------ examples/rp/src/bin/i2c_async_embassy.rs | 85 ++++++++++++++++++++++++ 2 files changed, 101 insertions(+), 22 deletions(-) create mode 100644 examples/rp/src/bin/i2c_async_embassy.rs diff --git a/embassy-rp/src/i2c.rs b/embassy-rp/src/i2c.rs index 10ccca674..10d3c86b3 100644 --- a/embassy-rp/src/i2c.rs +++ b/embassy-rp/src/i2c.rs @@ -313,25 +313,29 @@ impl<'d, T: Instance> I2c<'d, T, Async> { } /// Read from address into buffer using DMA. - pub async fn read_async(&mut self, addr: u16, buffer: &mut [u8]) -> Result<(), Error> { - Self::setup(addr)?; + pub async fn read_async(&mut self, addr: impl Into, buffer: &mut [u8]) -> Result<(), Error> { + Self::setup(addr.into())?; self.read_async_internal(buffer, true, true).await } /// Write to address from buffer using DMA. - pub async fn write_async(&mut self, addr: u16, bytes: impl IntoIterator) -> Result<(), Error> { - Self::setup(addr)?; + pub async fn write_async( + &mut self, + addr: impl Into, + bytes: impl IntoIterator, + ) -> Result<(), Error> { + Self::setup(addr.into())?; self.write_async_internal(bytes, true).await } /// Write to address from bytes and read from address into buffer using DMA. pub async fn write_read_async( &mut self, - addr: u16, + addr: impl Into, bytes: impl IntoIterator, buffer: &mut [u8], ) -> Result<(), Error> { - Self::setup(addr)?; + Self::setup(addr.into())?; self.write_async_internal(bytes, false).await?; self.read_async_internal(buffer, true, true).await } @@ -595,20 +599,20 @@ impl<'d, T: Instance + 'd, M: Mode> I2c<'d, T, M> { // ========================= /// Read from address into buffer blocking caller until done. - pub fn blocking_read(&mut self, address: u8, read: &mut [u8]) -> Result<(), Error> { + pub fn blocking_read(&mut self, address: impl Into, read: &mut [u8]) -> Result<(), Error> { Self::setup(address.into())?; self.read_blocking_internal(read, true, true) // Automatic Stop } /// Write to address from buffer blocking caller until done. - pub fn blocking_write(&mut self, address: u8, write: &[u8]) -> Result<(), Error> { + pub fn blocking_write(&mut self, address: impl Into, write: &[u8]) -> Result<(), Error> { Self::setup(address.into())?; self.write_blocking_internal(write, true) } /// Write to address from bytes and read from address into buffer blocking caller until done. - pub fn blocking_write_read(&mut self, address: u8, write: &[u8], read: &mut [u8]) -> Result<(), Error> { + pub fn blocking_write_read(&mut self, address: impl Into, write: &[u8], read: &mut [u8]) -> Result<(), Error> { Self::setup(address.into())?; self.write_blocking_internal(write, false)?; self.read_blocking_internal(read, true, true) @@ -719,25 +723,15 @@ where T: Instance + 'd, { async fn read(&mut self, address: A, read: &mut [u8]) -> Result<(), Self::Error> { - let addr: u16 = address.into(); - - Self::setup(addr)?; - self.read_async_internal(read, false, true).await + self.read_async(address, read).await } async fn write(&mut self, address: A, write: &[u8]) -> Result<(), Self::Error> { - let addr: u16 = address.into(); - - Self::setup(addr)?; - self.write_async_internal(write.iter().copied(), true).await + self.write_async(address, write.iter().copied()).await } async fn write_read(&mut self, address: A, write: &[u8], read: &mut [u8]) -> Result<(), Self::Error> { - let addr: u16 = address.into(); - - Self::setup(addr)?; - self.write_async_internal(write.iter().cloned(), false).await?; - self.read_async_internal(read, true, true).await + self.write_read_async(address, write.iter().copied(), read).await } async fn transaction( diff --git a/examples/rp/src/bin/i2c_async_embassy.rs b/examples/rp/src/bin/i2c_async_embassy.rs new file mode 100644 index 000000000..a65b71b9f --- /dev/null +++ b/examples/rp/src/bin/i2c_async_embassy.rs @@ -0,0 +1,85 @@ +//! This example shows how to communicate asynchronous using i2c with external chip. +//! +//! It's using embassy's functions directly instead of traits from embedded_hal_async::i2c::I2c. +//! While most of i2c devices are addressed using 7 bits, an extension allows 10 bits too. + +#![no_std] +#![no_main] + +use defmt::*; +use embassy_rp::i2c::InterruptHandler; +use {defmt_rtt as _, panic_probe as _}; + +// Our anonymous hypotetical temperature sensor could be: +// a 12-bit sensor, with 100ms startup time, range of -40*C - 125*C, and precision 0.25*C +// It requires no configuration or calibration, works with all i2c bus speeds, +// never stretches clock or does anything complicated. Replies with one u16. +// It requires only one write to take it out of suspend mode, and stays on. +// Often result would be just on 12 bits, but here we'll simplify it to 16. + +enum UncomplicatedSensorId { + A(UncomplicatedSensorU8), + B(UncomplicatedSensorU16), +} +enum UncomplicatedSensorU8 { + First = 0x48, +} +enum UncomplicatedSensorU16 { + Other = 0x0049, +} + +impl Into for UncomplicatedSensorU16 { + fn into(self) -> u16 { + self as u16 + } +} +impl Into for UncomplicatedSensorU8 { + fn into(self) -> u16 { + 0x48 + } +} +impl From for u16 { + fn from(t: UncomplicatedSensorId) -> Self { + match t { + UncomplicatedSensorId::A(x) => x.into(), + UncomplicatedSensorId::B(x) => x.into(), + } + } +} + +embassy_rp::bind_interrupts!(struct Irqs { + I2C1_IRQ => InterruptHandler; +}); + +#[embassy_executor::main] +async fn main(_task_spawner: embassy_executor::Spawner) { + let p = embassy_rp::init(Default::default()); + let sda = p.PIN_14; + let scl = p.PIN_15; + let config = embassy_rp::i2c::Config::default(); + let mut bus = embassy_rp::i2c::I2c::new_async(p.I2C1, scl, sda, Irqs, config); + + const WAKEYWAKEY: u16 = 0xBABE; + let mut result: [u8; 2] = [0, 0]; + // wait for sensors to initialize + embassy_time::Timer::after(embassy_time::Duration::from_millis(100)).await; + + let _res_1 = bus + .write_async(UncomplicatedSensorU8::First, WAKEYWAKEY.to_be_bytes()) + .await; + let _res_2 = bus + .write_async(UncomplicatedSensorU16::Other, WAKEYWAKEY.to_be_bytes()) + .await; + + loop { + let s1 = UncomplicatedSensorId::A(UncomplicatedSensorU8::First); + let s2 = UncomplicatedSensorId::B(UncomplicatedSensorU16::Other); + let sensors = [s1, s2]; + for sensor in sensors { + if bus.read_async(sensor, &mut result).await.is_ok() { + info!("Result {}", u16::from_be_bytes(result.into())); + } + } + embassy_time::Timer::after(embassy_time::Duration::from_millis(200)).await; + } +} From cbc67469d3faa65c4839657609b8e804bcfd75fd Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?David=20Flemstr=C3=B6m?= Date: Fri, 28 Jun 2024 19:10:59 +0200 Subject: [PATCH 543/581] Route sources of panics to the crate's fmt macros --- embassy-boot-nrf/src/lib.rs | 8 +++++++- embassy-boot-rp/src/lib.rs | 8 +++++++- embassy-boot-stm32/src/lib.rs | 8 +++++++- embassy-boot/src/test_flash/asynch.rs | 2 +- 4 files changed, 22 insertions(+), 4 deletions(-) diff --git a/embassy-boot-nrf/src/lib.rs b/embassy-boot-nrf/src/lib.rs index d53e78895..e5bc870b5 100644 --- a/embassy-boot-nrf/src/lib.rs +++ b/embassy-boot-nrf/src/lib.rs @@ -20,7 +20,13 @@ impl BootLoader { pub fn prepare( config: BootLoaderConfig, ) -> Self { - Self::try_prepare::(config).expect("Boot prepare error") + if let Ok(loader) = Self::try_prepare::(config) { + loader + } else { + // Use explicit panic instead of .expect() to ensure this gets routed via defmt/etc. + // properly + panic!("Boot prepare error") + } } /// Inspect the bootloader state and perform actions required before booting, such as swapping firmware diff --git a/embassy-boot-rp/src/lib.rs b/embassy-boot-rp/src/lib.rs index d0a393bed..3e1731f5e 100644 --- a/embassy-boot-rp/src/lib.rs +++ b/embassy-boot-rp/src/lib.rs @@ -21,7 +21,13 @@ impl BootLoader { pub fn prepare( config: BootLoaderConfig, ) -> Self { - Self::try_prepare::(config).expect("Boot prepare error") + if let Ok(loader) = Self::try_prepare::(config) { + loader + } else { + // Use explicit panic instead of .expect() to ensure this gets routed via defmt/etc. + // properly + panic!("Boot prepare error") + } } /// Inspect the bootloader state and perform actions required before booting, such as swapping firmware diff --git a/embassy-boot-stm32/src/lib.rs b/embassy-boot-stm32/src/lib.rs index 708441835..387cc0ce5 100644 --- a/embassy-boot-stm32/src/lib.rs +++ b/embassy-boot-stm32/src/lib.rs @@ -20,7 +20,13 @@ impl BootLoader { pub fn prepare( config: BootLoaderConfig, ) -> Self { - Self::try_prepare::(config).expect("Boot prepare error") + if let Ok(loader) = Self::try_prepare::(config) { + loader + } else { + // Use explicit panic instead of .expect() to ensure this gets routed via defmt/etc. + // properly + panic!("Boot prepare error") + } } /// Inspect the bootloader state and perform actions required before booting, such as swapping firmware diff --git a/embassy-boot/src/test_flash/asynch.rs b/embassy-boot/src/test_flash/asynch.rs index 3ac9e71ab..c67f2495c 100644 --- a/embassy-boot/src/test_flash/asynch.rs +++ b/embassy-boot/src/test_flash/asynch.rs @@ -43,7 +43,7 @@ where } fn create_partition(mutex: &Mutex) -> Partition { - Partition::new(mutex, 0, mutex.try_lock().unwrap().capacity() as u32) + Partition::new(mutex, 0, unwrap!(mutex.try_lock()).capacity() as u32) } } From 73d937dc332d14c9e6e9bcf3871b99033399f924 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?David=20Flemstr=C3=B6m?= Date: Fri, 28 Jun 2024 21:10:41 +0200 Subject: [PATCH 544/581] Remove implicit bounds checking from rcc module --- embassy-stm32/src/rcc/mod.rs | 30 ++++++++++++++++++++---------- 1 file changed, 20 insertions(+), 10 deletions(-) diff --git a/embassy-stm32/src/rcc/mod.rs b/embassy-stm32/src/rcc/mod.rs index 0bf344c40..c29d31fd9 100644 --- a/embassy-stm32/src/rcc/mod.rs +++ b/embassy-stm32/src/rcc/mod.rs @@ -138,11 +138,17 @@ impl RccInfo { pub(crate) fn enable_and_reset_with_cs(&self, _cs: CriticalSection) { if self.refcount_idx_or_0xff != 0xff { let refcount_idx = self.refcount_idx_or_0xff as usize; - unsafe { - crate::_generated::REFCOUNTS[refcount_idx] += 1; - } - if unsafe { crate::_generated::REFCOUNTS[refcount_idx] } > 1 { - return; + + // Use .get_mut instead of []-operator so that we control how bounds checks happen. + // Otherwise, core::fmt will be pulled in here in order to format the integer in the + // out-of-bounds error. + if let Some(refcount) = unsafe { crate::_generated::REFCOUNTS }.get_mut(refcount_idx) { + *refcount += 1; + if *refcount > 1 { + return; + } + } else { + panic!("refcount_idx out of bounds: {}", refcount_idx) } } @@ -196,11 +202,15 @@ impl RccInfo { pub(crate) fn disable_with_cs(&self, _cs: CriticalSection) { if self.refcount_idx_or_0xff != 0xff { let refcount_idx = self.refcount_idx_or_0xff as usize; - unsafe { - crate::_generated::REFCOUNTS[refcount_idx] -= 1; - } - if unsafe { crate::_generated::REFCOUNTS[refcount_idx] } > 0 { - return; + + // Use .get_mut instead of []-operator so that we control how bounds checks happen. + // Otherwise, core::fmt will be pulled in here in order to format the integer in the + // out-of-bounds error. + if let Some(refcount) = unsafe { crate::_generated::REFCOUNTS }.get_mut(refcount_idx) { + *refcount -= 1; + if *refcount > 0 { + return; + } } } From 2f750a82bf15327958bd0a31f05714f3528edcc4 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?David=20Flemstr=C3=B6m?= Date: Fri, 28 Jun 2024 21:50:51 +0200 Subject: [PATCH 545/581] Swat some other occurrences of .unwrap() that pull in panicing infra --- embassy-stm32/src/can/bxcan/registers.rs | 20 ++++++++------------ embassy-stm32/src/flash/asynch.rs | 2 +- embassy-stm32/src/flash/common.rs | 2 +- embassy-stm32/src/flash/f0.rs | 2 +- embassy-stm32/src/flash/f1f3.rs | 2 +- embassy-stm32/src/flash/f4.rs | 8 ++++---- embassy-stm32/src/flash/f7.rs | 2 +- embassy-stm32/src/flash/g.rs | 2 +- embassy-stm32/src/flash/h50.rs | 2 +- embassy-stm32/src/flash/h7.rs | 6 +++--- embassy-stm32/src/flash/l.rs | 2 +- embassy-stm32/src/flash/u0.rs | 2 +- embassy-stm32/src/flash/u5.rs | 2 +- 13 files changed, 25 insertions(+), 29 deletions(-) diff --git a/embassy-stm32/src/can/bxcan/registers.rs b/embassy-stm32/src/can/bxcan/registers.rs index 5f3d70e25..c5de1c683 100644 --- a/embassy-stm32/src/can/bxcan/registers.rs +++ b/embassy-stm32/src/can/bxcan/registers.rs @@ -299,9 +299,9 @@ impl Registers { mb.tdtr().write(|w| w.set_dlc(frame.header().len() as u8)); mb.tdlr() - .write(|w| w.0 = u32::from_ne_bytes(frame.data()[0..4].try_into().unwrap())); + .write(|w| w.0 = u32::from_ne_bytes(unwrap!(frame.data()[0..4].try_into()))); mb.tdhr() - .write(|w| w.0 = u32::from_ne_bytes(frame.data()[4..8].try_into().unwrap())); + .write(|w| w.0 = u32::from_ne_bytes(unwrap!(frame.data()[4..8].try_into()))); let id: IdReg = frame.id().into(); mb.tir().write(|w| { w.0 = id.0; @@ -321,7 +321,7 @@ impl Registers { data[4..8].copy_from_slice(&mb.tdhr().read().0.to_ne_bytes()); let len = mb.tdtr().read().dlc(); - Some(Frame::new(Header::new(id.id(), len, id.rtr()), &data).unwrap()) + Some(unwrap!(Frame::new(Header::new(id.id(), len, id.rtr()), &data))) } else { // Abort request failed because the frame was already sent (or being sent) on // the bus. All mailboxes are now free. This can happen for small prescaler @@ -404,12 +404,12 @@ impl Registers { let rir = fifo.rir().read(); let id: embedded_can::Id = if rir.ide() == Ide::STANDARD { - embedded_can::StandardId::new(rir.stid()).unwrap().into() + unwrap!(embedded_can::StandardId::new(rir.stid())).into() } else { let stid = (rir.stid() & 0x7FF) as u32; let exid = rir.exid() & 0x3FFFF; let id = (stid << 18) | (exid); - embedded_can::ExtendedId::new(id).unwrap().into() + unwrap!(embedded_can::ExtendedId::new(id)).into() }; let rdtr = fifo.rdtr().read(); let data_len = rdtr.dlc(); @@ -422,7 +422,7 @@ impl Registers { data[0..4].copy_from_slice(&fifo.rdlr().read().0.to_ne_bytes()); data[4..8].copy_from_slice(&fifo.rdhr().read().0.to_ne_bytes()); - let frame = Frame::new(Header::new(id, data_len, rtr), &data).unwrap(); + let frame = unwrap!(Frame::new(Header::new(id, data_len, rtr), &data)); let envelope = Envelope { ts, frame }; rfr.modify(|v| v.set_rfom(true)); @@ -484,13 +484,9 @@ impl IdReg { /// Returns the identifier. fn id(self) -> embedded_can::Id { if self.is_extended() { - embedded_can::ExtendedId::new(self.0 >> Self::EXTENDED_SHIFT) - .unwrap() - .into() + unwrap!(embedded_can::ExtendedId::new(self.0 >> Self::EXTENDED_SHIFT)).into() } else { - embedded_can::StandardId::new((self.0 >> Self::STANDARD_SHIFT) as u16) - .unwrap() - .into() + unwrap!(embedded_can::StandardId::new((self.0 >> Self::STANDARD_SHIFT) as u16)).into() } } diff --git a/embassy-stm32/src/flash/asynch.rs b/embassy-stm32/src/flash/asynch.rs index 97eaece81..9468ac632 100644 --- a/embassy-stm32/src/flash/asynch.rs +++ b/embassy-stm32/src/flash/asynch.rs @@ -117,7 +117,7 @@ pub(super) async unsafe fn write_chunked(base: u32, size: u32, offset: u32, byte family::lock(); }); - family::write(address, chunk.try_into().unwrap()).await?; + family::write(address, unwrap!(chunk.try_into())).await?; address += WRITE_SIZE as u32; } Ok(()) diff --git a/embassy-stm32/src/flash/common.rs b/embassy-stm32/src/flash/common.rs index f8561edb3..8ec4bb2a1 100644 --- a/embassy-stm32/src/flash/common.rs +++ b/embassy-stm32/src/flash/common.rs @@ -125,7 +125,7 @@ pub(super) unsafe fn write_chunk_unlocked(address: u32, chunk: &[u8]) -> Result< family::lock(); }); - family::blocking_write(address, chunk.try_into().unwrap()) + family::blocking_write(address, unwrap!(chunk.try_into())) } pub(super) unsafe fn write_chunk_with_critical_section(address: u32, chunk: &[u8]) -> Result<(), Error> { diff --git a/embassy-stm32/src/flash/f0.rs b/embassy-stm32/src/flash/f0.rs index e2f135208..402312f68 100644 --- a/embassy-stm32/src/flash/f0.rs +++ b/embassy-stm32/src/flash/f0.rs @@ -37,7 +37,7 @@ pub(crate) unsafe fn disable_blocking_write() { pub(crate) unsafe fn blocking_write(start_address: u32, buf: &[u8; WRITE_SIZE]) -> Result<(), Error> { let mut address = start_address; for chunk in buf.chunks(2) { - write_volatile(address as *mut u16, u16::from_le_bytes(chunk.try_into().unwrap())); + write_volatile(address as *mut u16, u16::from_le_bytes(unwrap!(chunk.try_into()))); address += chunk.len() as u32; // prevents parallelism errors diff --git a/embassy-stm32/src/flash/f1f3.rs b/embassy-stm32/src/flash/f1f3.rs index b16354a74..e66842e31 100644 --- a/embassy-stm32/src/flash/f1f3.rs +++ b/embassy-stm32/src/flash/f1f3.rs @@ -37,7 +37,7 @@ pub(crate) unsafe fn disable_blocking_write() { pub(crate) unsafe fn blocking_write(start_address: u32, buf: &[u8; WRITE_SIZE]) -> Result<(), Error> { let mut address = start_address; for chunk in buf.chunks(2) { - write_volatile(address as *mut u16, u16::from_le_bytes(chunk.try_into().unwrap())); + write_volatile(address as *mut u16, u16::from_le_bytes(unwrap!(chunk.try_into()))); address += chunk.len() as u32; // prevents parallelism errors diff --git a/embassy-stm32/src/flash/f4.rs b/embassy-stm32/src/flash/f4.rs index 2634fba37..d0bb957ee 100644 --- a/embassy-stm32/src/flash/f4.rs +++ b/embassy-stm32/src/flash/f4.rs @@ -277,7 +277,7 @@ pub(crate) unsafe fn blocking_write(start_address: u32, buf: &[u8; WRITE_SIZE]) unsafe fn write_start(start_address: u32, buf: &[u8; WRITE_SIZE]) { let mut address = start_address; for val in buf.chunks(4) { - write_volatile(address as *mut u32, u32::from_le_bytes(val.try_into().unwrap())); + write_volatile(address as *mut u32, u32::from_le_bytes(unwrap!(val.try_into()))); address += val.len() as u32; // prevents parallelism errors @@ -379,7 +379,7 @@ fn get_result(sr: Sr) -> Result<(), Error> { } fn save_data_cache_state() { - let dual_bank = get_flash_regions().last().unwrap().bank == FlashBank::Bank2; + let dual_bank = unwrap!(get_flash_regions().last()).bank == FlashBank::Bank2; if dual_bank { // Disable data cache during write/erase if there are two banks, see errata 2.2.12 let dcen = pac::FLASH.acr().read().dcen(); @@ -391,7 +391,7 @@ fn save_data_cache_state() { } fn restore_data_cache_state() { - let dual_bank = get_flash_regions().last().unwrap().bank == FlashBank::Bank2; + let dual_bank = unwrap!(get_flash_regions().last()).bank == FlashBank::Bank2; if dual_bank { // Restore data cache if it was enabled let dcen = DATA_CACHE_WAS_ENABLED.load(Ordering::Relaxed); @@ -410,7 +410,7 @@ pub(crate) fn assert_not_corrupted_read(end_address: u32) { #[allow(unused)] let second_bank_read = - get_flash_regions().last().unwrap().bank == FlashBank::Bank2 && end_address > (FLASH_SIZE / 2) as u32; + unwrap!(get_flash_regions().last()).bank == FlashBank::Bank2 && end_address > (FLASH_SIZE / 2) as u32; #[cfg(any( feature = "stm32f427ai", diff --git a/embassy-stm32/src/flash/f7.rs b/embassy-stm32/src/flash/f7.rs index 72de0b445..09ebe9db9 100644 --- a/embassy-stm32/src/flash/f7.rs +++ b/embassy-stm32/src/flash/f7.rs @@ -40,7 +40,7 @@ pub(crate) unsafe fn disable_blocking_write() { pub(crate) unsafe fn blocking_write(start_address: u32, buf: &[u8; WRITE_SIZE]) -> Result<(), Error> { let mut address = start_address; for val in buf.chunks(4) { - write_volatile(address as *mut u32, u32::from_le_bytes(val.try_into().unwrap())); + write_volatile(address as *mut u32, u32::from_le_bytes(unwrap!(val.try_into()))); address += val.len() as u32; // prevents parallelism errors diff --git a/embassy-stm32/src/flash/g.rs b/embassy-stm32/src/flash/g.rs index 6a5adc941..01a0c603f 100644 --- a/embassy-stm32/src/flash/g.rs +++ b/embassy-stm32/src/flash/g.rs @@ -41,7 +41,7 @@ pub(crate) unsafe fn disable_blocking_write() { pub(crate) unsafe fn blocking_write(start_address: u32, buf: &[u8; WRITE_SIZE]) -> Result<(), Error> { let mut address = start_address; for val in buf.chunks(4) { - write_volatile(address as *mut u32, u32::from_le_bytes(val.try_into().unwrap())); + write_volatile(address as *mut u32, u32::from_le_bytes(unwrap!(val.try_into()))); address += val.len() as u32; // prevents parallelism errors diff --git a/embassy-stm32/src/flash/h50.rs b/embassy-stm32/src/flash/h50.rs index 56ea7a421..82e77d130 100644 --- a/embassy-stm32/src/flash/h50.rs +++ b/embassy-stm32/src/flash/h50.rs @@ -44,7 +44,7 @@ pub(crate) unsafe fn disable_blocking_write() { pub(crate) unsafe fn blocking_write(start_address: u32, buf: &[u8; WRITE_SIZE]) -> Result<(), Error> { let mut address = start_address; for val in buf.chunks(4) { - write_volatile(address as *mut u32, u32::from_le_bytes(val.try_into().unwrap())); + write_volatile(address as *mut u32, u32::from_le_bytes(unwrap!(val.try_into()))); address += val.len() as u32; // prevents parallelism errors diff --git a/embassy-stm32/src/flash/h7.rs b/embassy-stm32/src/flash/h7.rs index e32a82eef..254915381 100644 --- a/embassy-stm32/src/flash/h7.rs +++ b/embassy-stm32/src/flash/h7.rs @@ -62,7 +62,7 @@ pub(crate) unsafe fn blocking_write(start_address: u32, buf: &[u8; WRITE_SIZE]) let mut res = None; let mut address = start_address; for val in buf.chunks(4) { - write_volatile(address as *mut u32, u32::from_le_bytes(val.try_into().unwrap())); + write_volatile(address as *mut u32, u32::from_le_bytes(unwrap!(val.try_into()))); address += val.len() as u32; res = Some(blocking_wait_ready(bank)); @@ -71,7 +71,7 @@ pub(crate) unsafe fn blocking_write(start_address: u32, buf: &[u8; WRITE_SIZE]) w.set_eop(true); } }); - if res.unwrap().is_err() { + if unwrap!(res).is_err() { break; } } @@ -82,7 +82,7 @@ pub(crate) unsafe fn blocking_write(start_address: u32, buf: &[u8; WRITE_SIZE]) bank.cr().write(|w| w.set_pg(false)); - res.unwrap() + unwrap!(res) } pub(crate) unsafe fn blocking_erase_sector(sector: &FlashSector) -> Result<(), Error> { diff --git a/embassy-stm32/src/flash/l.rs b/embassy-stm32/src/flash/l.rs index b14224bff..a0bfeb395 100644 --- a/embassy-stm32/src/flash/l.rs +++ b/embassy-stm32/src/flash/l.rs @@ -63,7 +63,7 @@ pub(crate) unsafe fn disable_blocking_write() { pub(crate) unsafe fn blocking_write(start_address: u32, buf: &[u8; WRITE_SIZE]) -> Result<(), Error> { let mut address = start_address; for val in buf.chunks(4) { - write_volatile(address as *mut u32, u32::from_le_bytes(val.try_into().unwrap())); + write_volatile(address as *mut u32, u32::from_le_bytes(unwrap!(val.try_into()))); address += val.len() as u32; // prevents parallelism errors diff --git a/embassy-stm32/src/flash/u0.rs b/embassy-stm32/src/flash/u0.rs index dfc5a2f76..bfdbd15a5 100644 --- a/embassy-stm32/src/flash/u0.rs +++ b/embassy-stm32/src/flash/u0.rs @@ -41,7 +41,7 @@ pub(crate) unsafe fn disable_blocking_write() { pub(crate) unsafe fn blocking_write(start_address: u32, buf: &[u8; WRITE_SIZE]) -> Result<(), Error> { let mut address = start_address; for val in buf.chunks(4) { - write_volatile(address as *mut u32, u32::from_le_bytes(val.try_into().unwrap())); + write_volatile(address as *mut u32, u32::from_le_bytes(unwrap!(val.try_into()))); address += val.len() as u32; // prevents parallelism errors diff --git a/embassy-stm32/src/flash/u5.rs b/embassy-stm32/src/flash/u5.rs index ddd4d73ff..0601017ce 100644 --- a/embassy-stm32/src/flash/u5.rs +++ b/embassy-stm32/src/flash/u5.rs @@ -56,7 +56,7 @@ pub(crate) unsafe fn disable_blocking_write() { pub(crate) unsafe fn blocking_write(start_address: u32, buf: &[u8; WRITE_SIZE]) -> Result<(), Error> { let mut address = start_address; for val in buf.chunks(4) { - write_volatile(address as *mut u32, u32::from_le_bytes(val.try_into().unwrap())); + write_volatile(address as *mut u32, u32::from_le_bytes(unwrap!(val.try_into()))); address += val.len() as u32; // prevents parallelism errors From 114dda2fd1afb37d2b563b9ac5018830ad7b6d4f Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?David=20Flemstr=C3=B6m?= Date: Sat, 29 Jun 2024 01:34:07 +0200 Subject: [PATCH 546/581] Avoid accidental copy of static var before creating mut ref --- embassy-stm32/src/rcc/mod.rs | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/embassy-stm32/src/rcc/mod.rs b/embassy-stm32/src/rcc/mod.rs index c29d31fd9..360df93ae 100644 --- a/embassy-stm32/src/rcc/mod.rs +++ b/embassy-stm32/src/rcc/mod.rs @@ -142,7 +142,7 @@ impl RccInfo { // Use .get_mut instead of []-operator so that we control how bounds checks happen. // Otherwise, core::fmt will be pulled in here in order to format the integer in the // out-of-bounds error. - if let Some(refcount) = unsafe { crate::_generated::REFCOUNTS }.get_mut(refcount_idx) { + if let Some(refcount) = unsafe { crate::_generated::REFCOUNTS.get_mut(refcount_idx) } { *refcount += 1; if *refcount > 1 { return; @@ -206,7 +206,7 @@ impl RccInfo { // Use .get_mut instead of []-operator so that we control how bounds checks happen. // Otherwise, core::fmt will be pulled in here in order to format the integer in the // out-of-bounds error. - if let Some(refcount) = unsafe { crate::_generated::REFCOUNTS }.get_mut(refcount_idx) { + if let Some(refcount) = unsafe { crate::_generated::REFCOUNTS.get_mut(refcount_idx) } { *refcount -= 1; if *refcount > 0 { return; From 662e97f7b5dafc652bf82ec8b57df1d99126407a Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?David=20Flemstr=C3=B6m?= Date: Sat, 29 Jun 2024 01:37:35 +0200 Subject: [PATCH 547/581] Panic on index-out-of-bounds when releasing RCC node --- embassy-stm32/src/rcc/mod.rs | 2 ++ 1 file changed, 2 insertions(+) diff --git a/embassy-stm32/src/rcc/mod.rs b/embassy-stm32/src/rcc/mod.rs index 360df93ae..024c63cf5 100644 --- a/embassy-stm32/src/rcc/mod.rs +++ b/embassy-stm32/src/rcc/mod.rs @@ -211,6 +211,8 @@ impl RccInfo { if *refcount > 0 { return; } + } else { + panic!("refcount_idx out of bounds: {}", refcount_idx) } } From 1d1fc9afeac268a4b6d2cd9b9e5788226c79eca8 Mon Sep 17 00:00:00 2001 From: Eekle <96976531+Eekle@users.noreply.github.com> Date: Sun, 30 Jun 2024 11:03:29 +0200 Subject: [PATCH 548/581] Add async and blocking variants --- embassy-stm32/src/tsc/mod.rs | 203 +++++++++++++++++++++-------------- 1 file changed, 120 insertions(+), 83 deletions(-) diff --git a/embassy-stm32/src/tsc/mod.rs b/embassy-stm32/src/tsc/mod.rs index d5da2529f..cd7ae4a53 100644 --- a/embassy-stm32/src/tsc/mod.rs +++ b/embassy-stm32/src/tsc/mod.rs @@ -93,6 +93,23 @@ pub enum Error { Test, } +/// Async acquisition API marker +pub struct Async; +/// Blocking acquisition API marker +pub struct Blocking; + +trait SealedDriverKind {} + +impl SealedDriverKind for Async {} +impl SealedDriverKind for Blocking {} + +#[allow(private_bounds)] +/// Driver variant marker for the TSC peripheral +pub trait DriverKind: SealedDriverKind {} + +impl DriverKind for Async {} +impl DriverKind for Blocking {} + /// TSC interrupt handler. pub struct InterruptHandler { _phantom: PhantomData, @@ -505,7 +522,7 @@ pub enum G7 {} pub enum G8 {} /// TSC driver -pub struct Tsc<'d, T: Instance> { +pub struct Tsc<'d, T: Instance, K: DriverKind> { _peri: PeripheralRef<'d, T>, _g1: Option>, _g2: Option>, @@ -519,13 +536,103 @@ pub struct Tsc<'d, T: Instance> { _g8: Option>, state: State, config: Config, + _kind: PhantomData, } -impl<'d, T: Instance> Tsc<'d, T> { - /// Create new TSC driver - pub fn new( +impl<'d, T: Instance> Tsc<'d, T, Async> { + /// Create a Tsc instance that can be awaited for completion + pub fn new_async( peri: impl Peripheral

+ 'd, + g1: Option>, + g2: Option>, + g3: Option>, + g4: Option>, + g5: Option>, + g6: Option>, + #[cfg(any(tsc_v2, tsc_v3))] g7: Option>, + #[cfg(tsc_v3)] g8: Option>, + config: Config, _irq: impl interrupt::typelevel::Binding> + 'd, + ) -> Self { + // Need to check valid pin configuration input + let g1 = g1.filter(|b| b.check_group().is_ok()); + let g2 = g2.filter(|b| b.check_group().is_ok()); + let g3 = g3.filter(|b| b.check_group().is_ok()); + let g4 = g4.filter(|b| b.check_group().is_ok()); + let g5 = g5.filter(|b| b.check_group().is_ok()); + let g6 = g6.filter(|b| b.check_group().is_ok()); + #[cfg(any(tsc_v2, tsc_v3))] + let g7 = g7.filter(|b| b.check_group().is_ok()); + #[cfg(tsc_v3)] + let g8 = g8.filter(|b| b.check_group().is_ok()); + + match Self::check_shields( + &g1, + &g2, + &g3, + &g4, + &g5, + &g6, + #[cfg(any(tsc_v2, tsc_v3))] + &g7, + #[cfg(tsc_v3)] + &g8, + ) { + Ok(()) => Self::new_inner( + peri, + g1, + g2, + g3, + g4, + g5, + g6, + #[cfg(any(tsc_v2, tsc_v3))] + g7, + #[cfg(tsc_v3)] + g8, + config, + ), + Err(_) => Self::new_inner( + peri, + None, + None, + None, + None, + None, + None, + #[cfg(any(tsc_v2, tsc_v3))] + None, + #[cfg(tsc_v3)] + None, + config, + ), + } + } + /// Asyncronously wait for the end of an acquisition + pub async fn pend_for_acquisition(&mut self) { + poll_fn(|cx| match self.get_state() { + State::Busy => { + T::waker().register(cx.waker()); + T::regs().ier().write(|w| w.set_eoaie(true)); + if self.get_state() != State::Busy { + T::regs().ier().write(|w| w.set_eoaie(false)); + return Poll::Ready(()); + } + Poll::Pending + } + _ => { + T::regs().ier().write(|w| w.set_eoaie(false)); + Poll::Ready(()) + } + }) + .await; + } +} + +impl<'d, T: Instance> Tsc<'d, T, Blocking> { + /// Create a Tsc instance that must be polled for completion + pub fn new_blocking( + peri: impl Peripheral

+ 'd, g1: Option>, g2: Option>, g3: Option>, @@ -590,7 +697,14 @@ impl<'d, T: Instance> Tsc<'d, T> { ), } } + /// Wait for end of acquisition + pub fn poll_for_acquisition(&mut self) { + while self.get_state() == State::Busy {} + } +} +impl<'d, T: Instance, K: DriverKind> Tsc<'d, T, K> { + /// Create new TSC driver fn check_shields( g1: &Option>, g2: &Option>, @@ -754,6 +868,7 @@ impl<'d, T: Instance> Tsc<'d, T> { _g8: g8, state: State::Ready, config, + _kind: PhantomData, } } @@ -784,33 +899,6 @@ impl<'d, T: Instance> Tsc<'d, T> { }); } - /// Start charge transfer acquisition with interrupts enabled - pub fn start_it(&mut self) { - self.state = State::Busy; - - // Enable interrupts - T::regs().ier().modify(|w| { - w.set_eoaie(true); - w.set_mceie(self.config.max_count_interrupt); - }); - - // Clear flags - T::regs().icr().modify(|w| { - w.set_eoaic(true); - w.set_mceic(true); - }); - - // Set the touch sensing IOs not acquired to the default mode - T::regs().cr().modify(|w| { - w.set_iodef(self.config.io_default_mode); - }); - - // Start the acquisition - T::regs().cr().modify(|w| { - w.set_start(true); - }); - } - /// Stop charge transfer acquisition pub fn stop(&mut self) { T::regs().cr().modify(|w| { @@ -831,57 +919,6 @@ impl<'d, T: Instance> Tsc<'d, T> { self.state = State::Ready; } - /// Stop charge transfer acquisition and clear interrupts - pub fn stop_it(&mut self) { - T::regs().cr().modify(|w| { - w.set_start(false); - }); - - // Set the touch sensing IOs in low power mode - T::regs().cr().modify(|w| { - w.set_iodef(false); - }); - - // Disable interrupts - T::regs().ier().modify(|w| { - w.set_eoaie(false); - w.set_mceie(false); - }); - - // Clear flags - T::regs().icr().modify(|w| { - w.set_eoaic(true); - w.set_mceic(true); - }); - - self.state = State::Ready; - } - - /// Wait for end of acquisition - pub fn poll_for_acquisition(&mut self) { - while self.get_state() == State::Busy {} - } - - /// Asyncronously wait for the end of an acquisition - pub async fn pend_for_acquisition(&mut self) { - poll_fn(|cx| match self.get_state() { - State::Busy => { - T::waker().register(cx.waker()); - T::regs().ier().write(|w| w.set_eoaie(true)); - if self.get_state() != State::Busy { - T::regs().ier().write(|w| w.set_eoaie(false)); - return Poll::Ready(()); - } - Poll::Pending - } - _ => { - T::regs().ier().write(|w| w.set_eoaie(false)); - Poll::Ready(()) - } - }) - .await; - } - /// Get current state of acquisition pub fn get_state(&mut self) -> State { if self.state == State::Busy { @@ -932,7 +969,7 @@ impl<'d, T: Instance> Tsc<'d, T> { } } -impl<'d, T: Instance> Drop for Tsc<'d, T> { +impl<'d, T: Instance, K: DriverKind> Drop for Tsc<'d, T, K> { fn drop(&mut self) { rcc::disable::(); } From 67f5b8d974c23854676cff3a6797cf4aaf41a402 Mon Sep 17 00:00:00 2001 From: Eekle <96976531+Eekle@users.noreply.github.com> Date: Sun, 30 Jun 2024 11:06:32 +0200 Subject: [PATCH 549/581] Update example --- examples/stm32u5/src/bin/tsc.rs | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/examples/stm32u5/src/bin/tsc.rs b/examples/stm32u5/src/bin/tsc.rs index db85fb158..eb15d275a 100644 --- a/examples/stm32u5/src/bin/tsc.rs +++ b/examples/stm32u5/src/bin/tsc.rs @@ -50,9 +50,8 @@ async fn main(_spawner: embassy_executor::Spawner) { g7.set_io2(context.PE3, PinType::Sample); g7.set_io3(context.PE4, PinType::Channel); - let mut touch_controller = tsc::Tsc::new( + let mut touch_controller = tsc::Tsc::new_async( context.TSC, - Irqs, Some(g1), Some(g2), None, @@ -62,6 +61,7 @@ async fn main(_spawner: embassy_executor::Spawner) { Some(g7), None, config, + Irqs, ); touch_controller.discharge_io(true); From c3be54f96b2a7e9039f4d12bbd97217dd65969d7 Mon Sep 17 00:00:00 2001 From: trepidacious Date: Sun, 30 Jun 2024 17:47:04 +0100 Subject: [PATCH 550/581] Add check for closed connection to `read_ready()` --- embassy-net/src/tcp.rs | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/embassy-net/src/tcp.rs b/embassy-net/src/tcp.rs index 906102bbf..4d6dc92de 100644 --- a/embassy-net/src/tcp.rs +++ b/embassy-net/src/tcp.rs @@ -587,7 +587,7 @@ mod embedded_io_impls { impl<'d> embedded_io_async::ReadReady for TcpSocket<'d> { fn read_ready(&mut self) -> Result { - Ok(self.io.with(|s, _| s.can_recv())) + Ok(self.io.with(|s, _| s.can_recv() || !s.may_recv())) } } From c4b88b57812da85b6952300509736fd02a4640fa Mon Sep 17 00:00:00 2001 From: Josh Junon Date: Sat, 29 Jun 2024 01:17:27 +0200 Subject: [PATCH 551/581] wiznet: add version check to initialization sequence --- embassy-net-wiznet/src/chip/mod.rs | 7 +++ embassy-net-wiznet/src/chip/w5100s.rs | 3 + embassy-net-wiznet/src/chip/w5500.rs | 3 + embassy-net-wiznet/src/device.rs | 62 ++++++++++++++++++- embassy-net-wiznet/src/lib.rs | 10 +-- .../rp/src/bin/ethernet_w5500_multisocket.rs | 3 +- .../rp/src/bin/ethernet_w5500_tcp_client.rs | 3 +- .../rp/src/bin/ethernet_w5500_tcp_server.rs | 3 +- examples/rp/src/bin/ethernet_w5500_udp.rs | 3 +- examples/stm32f4/src/bin/eth_w5500.rs | 4 +- tests/rp/src/bin/ethernet_w5100s_perf.rs | 3 +- 11 files changed, 93 insertions(+), 11 deletions(-) diff --git a/embassy-net-wiznet/src/chip/mod.rs b/embassy-net-wiznet/src/chip/mod.rs index e1f963d95..2e7a9ed6c 100644 --- a/embassy-net-wiznet/src/chip/mod.rs +++ b/embassy-net-wiznet/src/chip/mod.rs @@ -8,10 +8,17 @@ pub use w5100s::W5100S; pub(crate) trait SealedChip { type Address; + /// The version of the chip as reported by the VERSIONR register. + /// This is used to verify that the chip is supported by the driver, + /// and that SPI communication is working. + const CHIP_VERSION: u8; + const COMMON_MODE: Self::Address; const COMMON_MAC: Self::Address; const COMMON_SOCKET_INTR: Self::Address; const COMMON_PHY_CFG: Self::Address; + const COMMON_VERSION: Self::Address; + const SOCKET_MODE: Self::Address; const SOCKET_COMMAND: Self::Address; const SOCKET_RXBUF_SIZE: Self::Address; diff --git a/embassy-net-wiznet/src/chip/w5100s.rs b/embassy-net-wiznet/src/chip/w5100s.rs index 23ce3ed83..4c4b7ab16 100644 --- a/embassy-net-wiznet/src/chip/w5100s.rs +++ b/embassy-net-wiznet/src/chip/w5100s.rs @@ -11,10 +11,13 @@ impl super::Chip for W5100S {} impl super::SealedChip for W5100S { type Address = u16; + const CHIP_VERSION: u8 = 0x51; + const COMMON_MODE: Self::Address = 0x00; const COMMON_MAC: Self::Address = 0x09; const COMMON_SOCKET_INTR: Self::Address = 0x16; const COMMON_PHY_CFG: Self::Address = 0x3c; + const COMMON_VERSION: Self::Address = 0x80; const SOCKET_MODE: Self::Address = SOCKET_BASE + 0x00; const SOCKET_COMMAND: Self::Address = SOCKET_BASE + 0x01; diff --git a/embassy-net-wiznet/src/chip/w5500.rs b/embassy-net-wiznet/src/chip/w5500.rs index 12e610ea2..5cfcb94e4 100644 --- a/embassy-net-wiznet/src/chip/w5500.rs +++ b/embassy-net-wiznet/src/chip/w5500.rs @@ -15,10 +15,13 @@ impl super::Chip for W5500 {} impl super::SealedChip for W5500 { type Address = (RegisterBlock, u16); + const CHIP_VERSION: u8 = 0x04; + const COMMON_MODE: Self::Address = (RegisterBlock::Common, 0x00); const COMMON_MAC: Self::Address = (RegisterBlock::Common, 0x09); const COMMON_SOCKET_INTR: Self::Address = (RegisterBlock::Common, 0x18); const COMMON_PHY_CFG: Self::Address = (RegisterBlock::Common, 0x2E); + const COMMON_VERSION: Self::Address = (RegisterBlock::Common, 0x39); const SOCKET_MODE: Self::Address = (RegisterBlock::Socket0, 0x00); const SOCKET_COMMAND: Self::Address = (RegisterBlock::Socket0, 0x01); diff --git a/embassy-net-wiznet/src/device.rs b/embassy-net-wiznet/src/device.rs index 43f9512a3..d2b6bb0c3 100644 --- a/embassy-net-wiznet/src/device.rs +++ b/embassy-net-wiznet/src/device.rs @@ -24,9 +24,57 @@ pub(crate) struct WiznetDevice { _phantom: PhantomData, } +/// Error type when initializing a new Wiznet device +pub enum InitError { + /// Error occurred when sending or receiving SPI data + SpiError(SE), + /// The chip returned a version that isn't expected or supported + InvalidChipVersion { + /// The version that is supported + expected: u8, + /// The version that was returned by the chip + actual: u8, + }, +} + +impl From for InitError { + fn from(e: SE) -> Self { + InitError::SpiError(e) + } +} + +impl core::fmt::Debug for InitError +where + SE: core::fmt::Debug, +{ + fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { + match self { + InitError::SpiError(e) => write!(f, "SpiError({:?})", e), + InitError::InvalidChipVersion { expected, actual } => { + write!(f, "InvalidChipVersion {{ expected: {}, actual: {} }}", expected, actual) + } + } + } +} + +#[cfg(feature = "defmt")] +impl defmt::Format for InitError +where + SE: defmt::Format, +{ + fn format(&self, f: defmt::Formatter) { + match self { + InitError::SpiError(e) => defmt::write!(f, "SpiError({})", e), + InitError::InvalidChipVersion { expected, actual } => { + defmt::write!(f, "InvalidChipVersion {{ expected: {}, actual: {} }}", expected, actual) + } + } + } +} + impl WiznetDevice { /// Create and initialize the driver - pub async fn new(spi: SPI, mac_addr: [u8; 6]) -> Result { + pub async fn new(spi: SPI, mac_addr: [u8; 6]) -> Result> { let mut this = Self { spi, _phantom: PhantomData, @@ -35,6 +83,18 @@ impl WiznetDevice { // Reset device this.bus_write(C::COMMON_MODE, &[0x80]).await?; + // Check the version of the chip + let mut version = [0]; + this.bus_read(C::COMMON_VERSION, &mut version).await?; + if version[0] != C::CHIP_VERSION { + #[cfg(feature = "defmt")] + defmt::error!("invalid chip version: {} (expected {})", version[0], C::CHIP_VERSION); + return Err(InitError::InvalidChipVersion { + actual: version[0], + expected: C::CHIP_VERSION, + }); + } + // Enable interrupt pin this.bus_write(C::COMMON_SOCKET_INTR, &[0x01]).await?; // Enable receive interrupt diff --git a/embassy-net-wiznet/src/lib.rs b/embassy-net-wiznet/src/lib.rs index 90102196a..3fbd4c741 100644 --- a/embassy-net-wiznet/src/lib.rs +++ b/embassy-net-wiznet/src/lib.rs @@ -15,6 +15,7 @@ use embedded_hal_async::digital::Wait; use embedded_hal_async::spi::SpiDevice; use crate::chip::Chip; +pub use crate::device::InitError; use crate::device::WiznetDevice; // If you change this update the docs of State @@ -105,7 +106,7 @@ pub async fn new<'a, const N_RX: usize, const N_TX: usize, C: Chip, SPI: SpiDevi spi_dev: SPI, int: INT, mut reset: RST, -) -> (Device<'a>, Runner<'a, C, SPI, INT, RST>) { +) -> Result<(Device<'a>, Runner<'a, C, SPI, INT, RST>), InitError> { // Reset the chip. reset.set_low().ok(); // Ensure the reset is registered. @@ -116,10 +117,11 @@ pub async fn new<'a, const N_RX: usize, const N_TX: usize, C: Chip, SPI: SpiDevi // Slowest is w5100s which is 100ms, so let's just wait that. Timer::after_millis(100).await; - let mac = WiznetDevice::new(spi_dev, mac_addr).await.unwrap(); + let mac = WiznetDevice::new(spi_dev, mac_addr).await?; let (runner, device) = ch::new(&mut state.ch_state, ch::driver::HardwareAddress::Ethernet(mac_addr)); - ( + + Ok(( device, Runner { ch: runner, @@ -127,5 +129,5 @@ pub async fn new<'a, const N_RX: usize, const N_TX: usize, C: Chip, SPI: SpiDevi int, _reset: reset, }, - ) + )) } diff --git a/examples/rp/src/bin/ethernet_w5500_multisocket.rs b/examples/rp/src/bin/ethernet_w5500_multisocket.rs index bd52cadca..def26b53d 100644 --- a/examples/rp/src/bin/ethernet_w5500_multisocket.rs +++ b/examples/rp/src/bin/ethernet_w5500_multisocket.rs @@ -63,7 +63,8 @@ async fn main(spawner: Spawner) { w5500_int, w5500_reset, ) - .await; + .await + .unwrap(); unwrap!(spawner.spawn(ethernet_task(runner))); // Generate random seed diff --git a/examples/rp/src/bin/ethernet_w5500_tcp_client.rs b/examples/rp/src/bin/ethernet_w5500_tcp_client.rs index 3e4fbd2e6..6c4a78361 100644 --- a/examples/rp/src/bin/ethernet_w5500_tcp_client.rs +++ b/examples/rp/src/bin/ethernet_w5500_tcp_client.rs @@ -66,7 +66,8 @@ async fn main(spawner: Spawner) { w5500_int, w5500_reset, ) - .await; + .await + .unwrap(); unwrap!(spawner.spawn(ethernet_task(runner))); // Generate random seed diff --git a/examples/rp/src/bin/ethernet_w5500_tcp_server.rs b/examples/rp/src/bin/ethernet_w5500_tcp_server.rs index 5532851f3..30a3a7463 100644 --- a/examples/rp/src/bin/ethernet_w5500_tcp_server.rs +++ b/examples/rp/src/bin/ethernet_w5500_tcp_server.rs @@ -65,7 +65,8 @@ async fn main(spawner: Spawner) { w5500_int, w5500_reset, ) - .await; + .await + .unwrap(); unwrap!(spawner.spawn(ethernet_task(runner))); // Generate random seed diff --git a/examples/rp/src/bin/ethernet_w5500_udp.rs b/examples/rp/src/bin/ethernet_w5500_udp.rs index adb1d8941..1613ed887 100644 --- a/examples/rp/src/bin/ethernet_w5500_udp.rs +++ b/examples/rp/src/bin/ethernet_w5500_udp.rs @@ -63,7 +63,8 @@ async fn main(spawner: Spawner) { w5500_int, w5500_reset, ) - .await; + .await + .unwrap(); unwrap!(spawner.spawn(ethernet_task(runner))); // Generate random seed diff --git a/examples/stm32f4/src/bin/eth_w5500.rs b/examples/stm32f4/src/bin/eth_w5500.rs index c51111110..3c770a873 100644 --- a/examples/stm32f4/src/bin/eth_w5500.rs +++ b/examples/stm32f4/src/bin/eth_w5500.rs @@ -80,7 +80,9 @@ async fn main(spawner: Spawner) -> ! { let mac_addr = [0x02, 234, 3, 4, 82, 231]; static STATE: StaticCell> = StaticCell::new(); let state = STATE.init(State::<2, 2>::new()); - let (device, runner) = embassy_net_wiznet::new(mac_addr, state, spi, w5500_int, w5500_reset).await; + let (device, runner) = embassy_net_wiznet::new(mac_addr, state, spi, w5500_int, w5500_reset) + .await + .unwrap(); unwrap!(spawner.spawn(ethernet_task(runner))); let config = embassy_net::Config::dhcpv4(Default::default()); diff --git a/tests/rp/src/bin/ethernet_w5100s_perf.rs b/tests/rp/src/bin/ethernet_w5100s_perf.rs index 5d5547773..4b04571bd 100644 --- a/tests/rp/src/bin/ethernet_w5100s_perf.rs +++ b/tests/rp/src/bin/ethernet_w5100s_perf.rs @@ -59,7 +59,8 @@ async fn main(spawner: Spawner) { w5500_int, w5500_reset, ) - .await; + .await + .unwrap(); unwrap!(spawner.spawn(ethernet_task(runner))); // Generate random seed From 0b8a8e54dc4a00af2016a1dd14640773af10b3e6 Mon Sep 17 00:00:00 2001 From: Ulf Lilleengen Date: Mon, 1 Jul 2024 10:22:39 +0200 Subject: [PATCH 552/581] expose enabling and disabling irq for triggers --- embassy-nrf/src/egu.rs | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/embassy-nrf/src/egu.rs b/embassy-nrf/src/egu.rs index c0cde8330..204446d29 100644 --- a/embassy-nrf/src/egu.rs +++ b/embassy-nrf/src/egu.rs @@ -77,6 +77,24 @@ impl<'d, T: Instance> Trigger<'d, T> { let regs = T::regs(); Event::from_reg(®s.events_triggered[nr]) } + + /// Enable interrupts for this trigger + pub fn enable_interrupt(&mut self) { + let regs = T::regs(); + unsafe { + regs.intenset + .modify(|r, w| w.bits(r.bits() | (1 << self.number as usize))) + }; + } + + /// Enable interrupts for this trigger + pub fn disable_interrupt(&mut self) { + let regs = T::regs(); + unsafe { + regs.intenclr + .modify(|r, w| w.bits(r.bits() | (1 << self.number as usize))) + }; + } } /// Represents a trigger within an EGU. From 27652798c72d16cbcf2245ae7d4bd4574001ef1f Mon Sep 17 00:00:00 2001 From: seth Date: Mon, 1 Jul 2024 06:44:47 -0700 Subject: [PATCH 553/581] fix typo, add spaces after // --- embassy-stm32/src/adc/ringbuffered_v2.rs | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/embassy-stm32/src/adc/ringbuffered_v2.rs b/embassy-stm32/src/adc/ringbuffered_v2.rs index 8c5eb9672..fb29d9a8c 100644 --- a/embassy-stm32/src/adc/ringbuffered_v2.rs +++ b/embassy-stm32/src/adc/ringbuffered_v2.rs @@ -170,7 +170,7 @@ impl<'d, T: Instance> RingBufferedAdc<'d, T> { Self::start_adc(); } - //Check the sequence is long enough + // Check the sequence is long enough T::regs().sqr1().modify(|r| { let prev: Sequence = r.l().into(); if prev < sequence { @@ -182,10 +182,10 @@ impl<'d, T: Instance> RingBufferedAdc<'d, T> { } }); - //Set this GPIO as an analog input. + // Set this GPIO as an analog input. channel.setup(); - //Set the channel in the right sequence field. + // Set the channel in the right sequence field. match sequence { Sequence::One => T::regs().sqr3().modify(|w| w.set_sq(0, channel.channel())), Sequence::Two => T::regs().sqr3().modify(|w| w.set_sq(1, channel.channel())), @@ -260,7 +260,7 @@ impl<'d, T: Instance> RingBufferedAdc<'d, T> { let r = T::regs(); - //Enable ADC + // Enable ADC let was_on = Self::is_on(); if !was_on { r.cr2().modify(|reg| { @@ -298,7 +298,7 @@ impl<'d, T: Instance> RingBufferedAdc<'d, T> { w.set_eocs(vals::Eocs::EACHCONVERSION); }); - //Being ADC conversions + // Begin ADC conversions T::regs().cr2().modify(|reg| { reg.set_adon(true); reg.set_swstart(true); From 7884babb9d1557549e5732d6ab42a4f4c28f25e7 Mon Sep 17 00:00:00 2001 From: Giona Imperatori Date: Mon, 1 Jul 2024 17:20:42 +0200 Subject: [PATCH 554/581] feat(pwm): allow specifying OutputDrive for PWM channels --- embassy-nrf/CHANGELOG.md | 1 + embassy-nrf/src/pwm.rs | 58 ++++++++++++++++++++++++++++++++++++---- 2 files changed, 54 insertions(+), 5 deletions(-) diff --git a/embassy-nrf/CHANGELOG.md b/embassy-nrf/CHANGELOG.md index 773a1a108..6f07a8c6d 100644 --- a/embassy-nrf/CHANGELOG.md +++ b/embassy-nrf/CHANGELOG.md @@ -24,6 +24,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0 - spi: Add support for configuring bit order for bus - pwm: Expose `pwm::PWM_CLK_HZ` and add `is_enabled` method - gpio: Drop GPIO Pin generics (API break) +- pwm: Allow specifying OutputDrive for PWM channels ## 0.1.0 - 2024-01-12 diff --git a/embassy-nrf/src/pwm.rs b/embassy-nrf/src/pwm.rs index 12057f7dd..a2853de3f 100644 --- a/embassy-nrf/src/pwm.rs +++ b/embassy-nrf/src/pwm.rs @@ -6,7 +6,7 @@ use core::sync::atomic::{compiler_fence, Ordering}; use embassy_hal_internal::{into_ref, PeripheralRef}; -use crate::gpio::{AnyPin, Pin as GpioPin, PselBits, SealedPin as _}; +use crate::gpio::{convert_drive, AnyPin, OutputDrive, Pin as GpioPin, PselBits, SealedPin as _}; use crate::ppi::{Event, Task}; use crate::util::slice_in_ram_or; use crate::{interrupt, pac, Peripheral}; @@ -128,19 +128,23 @@ impl<'d, T: Instance> SequencePwm<'d, T> { if let Some(pin) = &ch0 { pin.set_low(); - pin.conf().write(|w| w.dir().output()); + pin.conf() + .write(|w| w.dir().output().drive().variant(convert_drive(config.ch0_drive))); } if let Some(pin) = &ch1 { pin.set_low(); - pin.conf().write(|w| w.dir().output()); + pin.conf() + .write(|w| w.dir().output().drive().variant(convert_drive(config.ch1_drive))); } if let Some(pin) = &ch2 { pin.set_low(); - pin.conf().write(|w| w.dir().output()); + pin.conf() + .write(|w| w.dir().output().drive().variant(convert_drive(config.ch2_drive))); } if let Some(pin) = &ch3 { pin.set_low(); - pin.conf().write(|w| w.dir().output()); + pin.conf() + .write(|w| w.dir().output().drive().variant(convert_drive(config.ch3_drive))); } r.psel.out[0].write(|w| unsafe { w.bits(ch0.psel_bits()) }); @@ -319,6 +323,14 @@ pub struct Config { pub prescaler: Prescaler, /// How a sequence is read from RAM and is spread to the compare register pub sequence_load: SequenceLoad, + /// Drive strength for the channel 0 line. + pub ch0_drive: OutputDrive, + /// Drive strength for the channel 1 line. + pub ch1_drive: OutputDrive, + /// Drive strength for the channel 2 line. + pub ch2_drive: OutputDrive, + /// Drive strength for the channel 3 line. + pub ch3_drive: OutputDrive, } impl Default for Config { @@ -328,6 +340,10 @@ impl Default for Config { max_duty: 1000, prescaler: Prescaler::Div16, sequence_load: SequenceLoad::Common, + ch0_drive: OutputDrive::Standard, + ch1_drive: OutputDrive::Standard, + ch2_drive: OutputDrive::Standard, + ch3_drive: OutputDrive::Standard, } } } @@ -815,6 +831,38 @@ impl<'d, T: Instance> SimplePwm<'d, T> { let max_duty = self.max_duty() as u32; clk / max_duty } + + /// Sets the PWM-Channel0 output drive strength + #[inline(always)] + pub fn set_ch0_drive(&self, drive: OutputDrive) { + if let Some(pin) = &self.ch0 { + pin.conf().write(|w| w.drive().variant(convert_drive(drive))); + } + } + + /// Sets the PWM-Channel1 output drive strength + #[inline(always)] + pub fn set_ch1_drive(&self, drive: OutputDrive) { + if let Some(pin) = &self.ch1 { + pin.conf().write(|w| w.drive().variant(convert_drive(drive))); + } + } + + /// Sets the PWM-Channel2 output drive strength + #[inline(always)] + pub fn set_ch2_drive(&self, drive: OutputDrive) { + if let Some(pin) = &self.ch2 { + pin.conf().write(|w| w.drive().variant(convert_drive(drive))); + } + } + + /// Sets the PWM-Channel3 output drive strength + #[inline(always)] + pub fn set_ch3_drive(&self, drive: OutputDrive) { + if let Some(pin) = &self.ch3 { + pin.conf().write(|w| w.drive().variant(convert_drive(drive))); + } + } } impl<'a, T: Instance> Drop for SimplePwm<'a, T> { From f418006508380fa40058b896a753cdafbf9bdc86 Mon Sep 17 00:00:00 2001 From: Giona Imperatori Date: Mon, 1 Jul 2024 18:06:14 +0200 Subject: [PATCH 555/581] fixup! feat(pwm): allow specifying OutputDrive for PWM channels --- embassy-nrf/src/pwm.rs | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/embassy-nrf/src/pwm.rs b/embassy-nrf/src/pwm.rs index a2853de3f..8e8f166d7 100644 --- a/embassy-nrf/src/pwm.rs +++ b/embassy-nrf/src/pwm.rs @@ -836,7 +836,7 @@ impl<'d, T: Instance> SimplePwm<'d, T> { #[inline(always)] pub fn set_ch0_drive(&self, drive: OutputDrive) { if let Some(pin) = &self.ch0 { - pin.conf().write(|w| w.drive().variant(convert_drive(drive))); + pin.conf().modify(|_, w| w.drive().variant(convert_drive(drive))); } } @@ -844,7 +844,7 @@ impl<'d, T: Instance> SimplePwm<'d, T> { #[inline(always)] pub fn set_ch1_drive(&self, drive: OutputDrive) { if let Some(pin) = &self.ch1 { - pin.conf().write(|w| w.drive().variant(convert_drive(drive))); + pin.conf().modify(|_, w| w.drive().variant(convert_drive(drive))); } } @@ -852,7 +852,7 @@ impl<'d, T: Instance> SimplePwm<'d, T> { #[inline(always)] pub fn set_ch2_drive(&self, drive: OutputDrive) { if let Some(pin) = &self.ch2 { - pin.conf().write(|w| w.drive().variant(convert_drive(drive))); + pin.conf().modify(|_, w| w.drive().variant(convert_drive(drive))); } } @@ -860,7 +860,7 @@ impl<'d, T: Instance> SimplePwm<'d, T> { #[inline(always)] pub fn set_ch3_drive(&self, drive: OutputDrive) { if let Some(pin) = &self.ch3 { - pin.conf().write(|w| w.drive().variant(convert_drive(drive))); + pin.conf().modify(|_, w| w.drive().variant(convert_drive(drive))); } } } From abe7f9921e4b04b8341396c2681730ed3aa59d90 Mon Sep 17 00:00:00 2001 From: trepidacious Date: Mon, 1 Jul 2024 20:59:27 +0100 Subject: [PATCH 556/581] Update `ReadReady` and `WriteReady` implementations Update `ReadReady` for `TcpReader` to match implementation for `TcpSocket` Update `WriteReady` implementations to use `can_recv()` rather than `may_recv()`, since this will check that the transmit buffer is not full. --- embassy-net/src/tcp.rs | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/embassy-net/src/tcp.rs b/embassy-net/src/tcp.rs index 4d6dc92de..74eff9dae 100644 --- a/embassy-net/src/tcp.rs +++ b/embassy-net/src/tcp.rs @@ -603,7 +603,7 @@ mod embedded_io_impls { impl<'d> embedded_io_async::WriteReady for TcpSocket<'d> { fn write_ready(&mut self) -> Result { - Ok(self.io.with(|s, _| s.may_send())) + Ok(self.io.with(|s, _| s.can_send())) } } @@ -619,7 +619,7 @@ mod embedded_io_impls { impl<'d> embedded_io_async::ReadReady for TcpReader<'d> { fn read_ready(&mut self) -> Result { - Ok(self.io.with(|s, _| s.can_recv())) + Ok(self.io.with(|s, _| s.can_recv() || !s.may_recv())) } } @@ -639,7 +639,7 @@ mod embedded_io_impls { impl<'d> embedded_io_async::WriteReady for TcpWriter<'d> { fn write_ready(&mut self) -> Result { - Ok(self.io.with(|s, _| s.may_send())) + Ok(self.io.with(|s, _| s.can_send())) } } } From a862334daef1986d41d8873324821dfce37c70b6 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?=D0=A0=D0=BE=D0=BC=D0=B0=D0=BD=20=D0=9A=D1=80=D0=B8=D0=B2?= =?UTF-8?q?=D0=B5=D0=BD=D0=BA=D0=BE=D0=B2?= Date: Thu, 23 May 2024 12:42:41 +0400 Subject: [PATCH 557/581] STM32 Half-Duplex: fix sequential reads and writes --- embassy-stm32/src/usart/mod.rs | 45 +++++++++++++++++++++++----------- 1 file changed, 31 insertions(+), 14 deletions(-) diff --git a/embassy-stm32/src/usart/mod.rs b/embassy-stm32/src/usart/mod.rs index 5754f783e..7ed3793a1 100644 --- a/embassy-stm32/src/usart/mod.rs +++ b/embassy-stm32/src/usart/mod.rs @@ -371,9 +371,12 @@ impl<'d> UartTx<'d, Async> { pub async fn write(&mut self, buffer: &[u8]) -> Result<(), Error> { let r = self.info.regs; - // Disable Receiver for Half-Duplex mode - if r.cr3().read().hdsel() { - r.cr1().modify(|reg| reg.set_re(false)); + // Enable Transmitter and disable Receiver for Half-Duplex mode + let mut cr1 = r.cr1().read(); + if r.cr3().read().hdsel() && !cr1.te() { + cr1.set_te(true); + cr1.set_re(false); + r.cr1().write_value(cr1); } let ch = self.tx_dma.as_mut().unwrap(); @@ -474,9 +477,12 @@ impl<'d, M: Mode> UartTx<'d, M> { pub fn blocking_write(&mut self, buffer: &[u8]) -> Result<(), Error> { let r = self.info.regs; - // Disable Receiver for Half-Duplex mode - if r.cr3().read().hdsel() { - r.cr1().modify(|reg| reg.set_re(false)); + // Enable Transmitter and disable Receiver for Half-Duplex mode + let mut cr1 = r.cr1().read(); + if r.cr3().read().hdsel() && !cr1.te() { + cr1.set_te(true); + cr1.set_re(false); + r.cr1().write_value(cr1); } for &b in buffer { @@ -561,8 +567,9 @@ impl<'d> UartRx<'d, Async> { ) -> Result { let r = self.info.regs; - // Call flush for Half-Duplex mode. It prevents reading of bytes which have just been written. - if r.cr3().read().hdsel() { + // Call flush for Half-Duplex mode if some bytes were written and flush was not called. + // It prevents reading of bytes which have just been written. + if r.cr3().read().hdsel() && r.cr1().read().te() { blocking_flush(self.info)?; } @@ -898,8 +905,9 @@ impl<'d, M: Mode> UartRx<'d, M> { pub fn blocking_read(&mut self, buffer: &mut [u8]) -> Result<(), Error> { let r = self.info.regs; - // Call flush for Half-Duplex mode. It prevents reading of bytes which have just been written. - if r.cr3().read().hdsel() { + // Call flush for Half-Duplex mode if some bytes were written and flush was not called. + // It prevents reading of bytes which have just been written. + if r.cr3().read().hdsel() && r.cr1().read().te() { blocking_flush(self.info)?; } @@ -1481,10 +1489,19 @@ fn configure( r.cr1().write(|w| { // enable uart w.set_ue(true); - // enable transceiver - w.set_te(enable_tx); - // enable receiver - w.set_re(enable_rx); + + if config.half_duplex { + // The te and re bits will be set by write, read and flush methods. + // Receiver should be enabled by default for Half-Duplex. + w.set_te(false); + w.set_re(true); + } else { + // enable transceiver + w.set_te(enable_tx); + // enable receiver + w.set_re(enable_rx); + } + // configure word size // if using odd or even parity it must be configured to 9bits w.set_m0(if config.parity != Parity::ParityNone { From 8cbb64226b802ed6ad7fc4d40bb002a32389aa3a Mon Sep 17 00:00:00 2001 From: Andres Vahter Date: Mon, 1 Jul 2024 15:07:26 +0300 Subject: [PATCH 558/581] update stm32-metapac --- embassy-stm32/Cargo.toml | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/embassy-stm32/Cargo.toml b/embassy-stm32/Cargo.toml index d0e7ffd6d..523bacb11 100644 --- a/embassy-stm32/Cargo.toml +++ b/embassy-stm32/Cargo.toml @@ -72,7 +72,7 @@ rand_core = "0.6.3" sdio-host = "0.5.0" critical-section = "1.1" #stm32-metapac = { version = "15" } -stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-cb8af7b3c2cfb88283e0ce979a318657853434c0" } +stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-e0cfd165fd8fffaa0df66a35eeca83b228496645" } vcell = "0.1.3" nb = "1.0.0" @@ -97,7 +97,7 @@ proc-macro2 = "1.0.36" quote = "1.0.15" #stm32-metapac = { version = "15", default-features = false, features = ["metadata"]} -stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-cb8af7b3c2cfb88283e0ce979a318657853434c0", default-features = false, features = ["metadata"] } +stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-e0cfd165fd8fffaa0df66a35eeca83b228496645", default-features = false, features = ["metadata"] } [features] default = ["rt"] From 1f30ad595b9ac2f3cdf1ecaa24e6d96d16286a16 Mon Sep 17 00:00:00 2001 From: Andres Vahter Date: Tue, 2 Jul 2024 09:21:27 +0300 Subject: [PATCH 559/581] stm32 ringbuffered adc: fix for metapac changes --- embassy-stm32/src/adc/ringbuffered_v2.rs | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/embassy-stm32/src/adc/ringbuffered_v2.rs b/embassy-stm32/src/adc/ringbuffered_v2.rs index fb29d9a8c..bc8ef2d13 100644 --- a/embassy-stm32/src/adc/ringbuffered_v2.rs +++ b/embassy-stm32/src/adc/ringbuffered_v2.rs @@ -291,7 +291,7 @@ impl<'d, T: Instance> RingBufferedAdc<'d, T> { // Enable DMA mode w.set_dma(true); // Enable continuous conversions - w.set_cont(vals::Cont::CONTINUOUS); + w.set_cont(true); // DMA requests are issues as long as DMA=1 and data are converted. w.set_dds(vals::Dds::CONTINUOUS); // EOC flag is set at the end of each conversion. From 8f52ee469eb282d55ed74dc08b71c1e994aa8ba5 Mon Sep 17 00:00:00 2001 From: Ulf Lilleengen Date: Tue, 2 Jul 2024 12:37:36 +0200 Subject: [PATCH 560/581] make some embassy-boot asserts const --- embassy-boot/src/boot_loader.rs | 11 +++++++---- 1 file changed, 7 insertions(+), 4 deletions(-) diff --git a/embassy-boot/src/boot_loader.rs b/embassy-boot/src/boot_loader.rs index a38558056..789fa34c1 100644 --- a/embassy-boot/src/boot_loader.rs +++ b/embassy-boot/src/boot_loader.rs @@ -235,12 +235,15 @@ impl BootLoader Result { + const { + assert!(Self::PAGE_SIZE % ACTIVE::WRITE_SIZE as u32 == 0); + assert!(Self::PAGE_SIZE % ACTIVE::ERASE_SIZE as u32 == 0); + assert!(Self::PAGE_SIZE % DFU::WRITE_SIZE as u32 == 0); + assert!(Self::PAGE_SIZE % DFU::ERASE_SIZE as u32 == 0); + } + // Ensure we have enough progress pages to store copy progress assert_eq!(0, Self::PAGE_SIZE % aligned_buf.len() as u32); - assert_eq!(0, Self::PAGE_SIZE % ACTIVE::WRITE_SIZE as u32); - assert_eq!(0, Self::PAGE_SIZE % ACTIVE::ERASE_SIZE as u32); - assert_eq!(0, Self::PAGE_SIZE % DFU::WRITE_SIZE as u32); - assert_eq!(0, Self::PAGE_SIZE % DFU::ERASE_SIZE as u32); assert!(aligned_buf.len() >= STATE::WRITE_SIZE); assert_eq!(0, aligned_buf.len() % ACTIVE::WRITE_SIZE); assert_eq!(0, aligned_buf.len() % DFU::WRITE_SIZE); From b88e1a5d7180871d7e8564a3060b50e166602902 Mon Sep 17 00:00:00 2001 From: Andres Vahter Date: Tue, 2 Jul 2024 15:22:50 +0300 Subject: [PATCH 561/581] stm32 ringbuffered adc docs --- embassy-stm32/src/adc/ringbuffered_v2.rs | 70 +++++++++++++++++++++++- 1 file changed, 68 insertions(+), 2 deletions(-) diff --git a/embassy-stm32/src/adc/ringbuffered_v2.rs b/embassy-stm32/src/adc/ringbuffered_v2.rs index fb29d9a8c..82b67c533 100644 --- a/embassy-stm32/src/adc/ringbuffered_v2.rs +++ b/embassy-stm32/src/adc/ringbuffered_v2.rs @@ -91,6 +91,15 @@ pub struct RingBufferedAdc<'d, T: Instance> { } impl<'d, T: Instance> Adc<'d, T> { + /// Configures the ADC to use a DMA ring buffer for continuous data acquisition. + /// + /// The `dma_buf` should be large enough to prevent buffer overflow, allowing sufficient time to read out measurements. + /// The length of the `dma_buf` should be a multiple of the ADC channel count. + /// For example, if 3 channels are measured, its length can be 3 * 40 = 120 measurements. + /// + /// `read_exact` method is used to read out measurements from the DMA ring buffer, and its buffer should be exactly half of the `dma_buf` length. + /// + /// [`read_exact`]: #method.read_exact pub fn into_ring_buffered( self, dma: impl Peripheral

> + 'd, @@ -214,6 +223,7 @@ impl<'d, T: Instance> RingBufferedAdc<'d, T> { Self::start_adc(); } + /// Turns on ADC if it is not already turned on and starts continuous DMA transfer. pub fn start(&mut self) -> Result<(), OverrunError> { self.ring_buf.clear(); @@ -227,6 +237,11 @@ impl<'d, T: Instance> RingBufferedAdc<'d, T> { Err(err) } + /// Stops DMA transfer. + /// It does not turn off ADC. + /// Calling `start` restarts continuous DMA transfer. + /// + /// [`start`]: #method.start pub fn teardown_adc(&mut self) { // Stop the DMA transfer self.ring_buf.request_stop(); @@ -341,7 +356,58 @@ impl<'d, T: Instance> RingBufferedAdc<'d, T> { } } - pub async fn read_exact(&mut self, buf: &mut [u16; N]) -> Result { + /// Reads measurements from the DMA ring buffer. + /// + /// This method fills the provided `measurements` array with ADC readings. + /// The length of the `measurements` array should be exactly half of the DMA buffer length. + /// Because interrupts are only generated if half or full DMA transfer completes. + /// + /// Each call to `read_exact` will populate the `measurements` array in the same order as the channels defined with `set_sample_sequence`. + /// There will be many sequences worth of measurements in this array because it only returns if at least half of the DMA buffer is filled. + /// For example if 3 channels are sampled `measurements` contain: `[sq0 sq1 sq3 sq0 sq1 sq3 sq0 sq1 sq3 sq0 sq1 sq3..]`. + /// + /// If an error is returned, it indicates a DMA overrun, and the process must be restarted by calling `start` again. + /// + /// By default, the ADC fills the DMA buffer as quickly as possible. To control the sample rate, call `teardown_adc` after each readout, and then start the DMA again at the desired interval. + /// Note that even if using `teardown_adc` to control sample rate, with each call to `read_exact`, measurements equivalent to half the size of the DMA buffer are still collected. + /// + /// Example: + /// ```rust,ignore + /// const DMA_BUF_LEN: usize = 120; + /// let adc_dma_buf = [0u16; DMA_BUF_LEN]; + /// let mut adc: RingBufferedAdc = adc.into_ring_buffered(p.DMA2_CH0, adc_dma_buf); + /// + /// adc.set_sample_sequence(Sequence::One, &mut p.PA0, SampleTime::CYCLES112); + /// adc.set_sample_sequence(Sequence::Two, &mut p.PA1, SampleTime::CYCLES112); + /// adc.set_sample_sequence(Sequence::Three, &mut p.PA2, SampleTime::CYCLES112); + /// + /// adc.start.unwrap(); + /// let mut measurements = [0u16; DMA_BUF_LEN / 2]; + /// loop { + /// match adc.read_exact(&mut measurements).await { + /// Ok(_) => { + /// defmt::info!("adc1: {}", measurements); + /// // Only needed to manually control sample rate. + /// adc.teardown_adc(); + /// } + /// Err(e) => { + /// defmt::warn!("Error: {:?}", e); + /// // DMA overflow, restart ADC. + /// let _ = adc.start(); + /// } + /// } + /// + /// // Manually control sample rate. + /// Timer::after_millis(100).await; + /// let _ = adc.start(); + /// } + /// ``` + /// + /// + /// [`set_sample_sequence`]: #method.set_sample_sequence + /// [`teardown_adc`]: #method.teardown_adc + /// [`start`]: #method.start + pub async fn read_exact(&mut self, measurements: &mut [u16; N]) -> Result { let r = T::regs(); // Start background receive if it was not already started @@ -353,7 +419,7 @@ impl<'d, T: Instance> RingBufferedAdc<'d, T> { if r.sr().read().ovr() { return self.stop(OverrunError); } - match self.ring_buf.read_exact(buf).await { + match self.ring_buf.read_exact(measurements).await { Ok(len) => Ok(len), Err(_) => self.stop(OverrunError), } From dd69efe70804f57c17adb45602798dad617cb41d Mon Sep 17 00:00:00 2001 From: Andres Vahter Date: Tue, 2 Jul 2024 16:56:19 +0300 Subject: [PATCH 562/581] stm32 ringbuffered adc: add buf size assert --- embassy-stm32/src/adc/ringbuffered_v2.rs | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/embassy-stm32/src/adc/ringbuffered_v2.rs b/embassy-stm32/src/adc/ringbuffered_v2.rs index 82b67c533..3f5277a9d 100644 --- a/embassy-stm32/src/adc/ringbuffered_v2.rs +++ b/embassy-stm32/src/adc/ringbuffered_v2.rs @@ -408,6 +408,12 @@ impl<'d, T: Instance> RingBufferedAdc<'d, T> { /// [`teardown_adc`]: #method.teardown_adc /// [`start`]: #method.start pub async fn read_exact(&mut self, measurements: &mut [u16; N]) -> Result { + assert_eq!( + self.ring_buf.capacity() / 2, + N, + "Buffer size must be half the size of the ring buffer" + ); + let r = T::regs(); // Start background receive if it was not already started From 02b096915fbf138602e2ad8c6e1d85d531882daf Mon Sep 17 00:00:00 2001 From: Alexandros Liarokapis Date: Fri, 21 Jun 2024 23:37:58 +0300 Subject: [PATCH 563/581] add asynchrous sequence read support to adc v4 --- embassy-stm32/build.rs | 1 + embassy-stm32/src/adc/v4.rs | 139 ++++++++++++++++++++++++++++++++---- 2 files changed, 127 insertions(+), 13 deletions(-) diff --git a/embassy-stm32/build.rs b/embassy-stm32/build.rs index 24e2226a2..df866b5ff 100644 --- a/embassy-stm32/build.rs +++ b/embassy-stm32/build.rs @@ -1182,6 +1182,7 @@ fn main() { (("adc", "ADC1"), quote!(crate::adc::RxDma)), (("adc", "ADC2"), quote!(crate::adc::RxDma)), (("adc", "ADC3"), quote!(crate::adc::RxDma)), + (("adc", "ADC4"), quote!(crate::adc::RxDma)), (("ucpd", "RX"), quote!(crate::ucpd::RxDma)), (("ucpd", "TX"), quote!(crate::ucpd::TxDma)), (("usart", "RX"), quote!(crate::usart::RxDma)), diff --git a/embassy-stm32/src/adc/v4.rs b/embassy-stm32/src/adc/v4.rs index 50db646fe..f4b62d80e 100644 --- a/embassy-stm32/src/adc/v4.rs +++ b/embassy-stm32/src/adc/v4.rs @@ -1,8 +1,12 @@ #[allow(unused)] use pac::adc::vals::{Adcaldif, Boost, Difsel, Exten, Pcsel}; +use pac::adc::vals::{Adstp, Dmngt}; use pac::adccommon::vals::Presc; -use super::{blocking_delay_us, Adc, AdcChannel, Instance, Resolution, SampleTime}; +use super::{ + blocking_delay_us, Adc, AdcChannel, AnyAdcChannel, Instance, Resolution, RxDma, SampleTime, SealedAdcChannel, +}; +use crate::dma::Transfer; use crate::time::Hertz; use crate::{pac, rcc, Peripheral}; @@ -34,7 +38,7 @@ const VBAT_CHANNEL: u8 = 17; /// Internal voltage reference channel. pub struct VrefInt; impl AdcChannel for VrefInt {} -impl super::SealedAdcChannel for VrefInt { +impl SealedAdcChannel for VrefInt { fn channel(&self) -> u8 { VREF_CHANNEL } @@ -43,7 +47,7 @@ impl super::SealedAdcChannel for VrefInt { /// Internal temperature channel. pub struct Temperature; impl AdcChannel for Temperature {} -impl super::SealedAdcChannel for Temperature { +impl SealedAdcChannel for Temperature { fn channel(&self) -> u8 { TEMP_CHANNEL } @@ -52,7 +56,7 @@ impl super::SealedAdcChannel for Temperature { /// Internal battery voltage channel. pub struct Vbat; impl AdcChannel for Vbat {} -impl super::SealedAdcChannel for Vbat { +impl SealedAdcChannel for Vbat { fn channel(&self) -> u8 { VBAT_CHANNEL } @@ -247,6 +251,11 @@ impl<'d, T: Instance> Adc<'d, T> { self.sample_time = sample_time; } + /// Get the ADC sample time. + pub fn sample_time(&self) -> SampleTime { + self.sample_time + } + /// Set the ADC resolution. pub fn set_resolution(&mut self, resolution: Resolution) { T::regs().cfgr().modify(|reg| reg.set_res(resolution.into())); @@ -273,25 +282,120 @@ impl<'d, T: Instance> Adc<'d, T> { /// Read an ADC channel. pub fn read(&mut self, channel: &mut impl AdcChannel) -> u16 { - channel.setup(); - - self.read_channel(channel.channel()) + self.read_channel(channel) } - fn read_channel(&mut self, channel: u8) -> u16 { - // Configure channel - Self::set_channel_sample_time(channel, self.sample_time); + /// Asynchronously read from sequence of ADC channels. + pub async fn read_async( + &mut self, + rx_dma: &mut impl RxDma, + sequence: impl ExactSizeIterator, SampleTime)>, + data: &mut [u16], + ) { + assert!(sequence.len() != 0, "Asynchronous read sequence cannot be empty"); + + assert!( + sequence.len() <= 16, + "Asynchronous read sequence cannot be more than 16 in length" + ); + + // Ensure no conversions are ongoing + Self::cancel_conversions(); + + // Set sequence length + T::regs().sqr1().modify(|w| { + w.set_l(sequence.len() as u8 - 1); + }); + + // Configure channels and ranks + for (i, (channel, sample_time)) in sequence.enumerate() { + Self::configure_channel(channel, sample_time); + match i { + 0..=3 => { + T::regs().sqr1().modify(|w| { + w.set_sq(i, channel.channel()); + }); + } + 4..=8 => { + T::regs().sqr2().modify(|w| { + w.set_sq(i - 4, channel.channel()); + }); + } + 9..=13 => { + T::regs().sqr3().modify(|w| { + w.set_sq(i - 9, channel.channel()); + }); + } + 14..=15 => { + T::regs().sqr4().modify(|w| { + w.set_sq(i - 14, channel.channel()); + }); + } + _ => unreachable!(), + } + } + + // Set continuous mode with oneshot dma. + // Clear overrun flag before starting transfer. + + T::regs().isr().modify(|reg| { + reg.set_ovr(true); + }); + T::regs().cfgr().modify(|reg| { + reg.set_cont(true); + reg.set_dmngt(Dmngt::DMA_ONESHOT); + }); + + let request = rx_dma.request(); + let transfer = unsafe { + Transfer::new_read( + rx_dma, + request, + T::regs().dr().as_ptr() as *mut u16, + data, + Default::default(), + ) + }; + + // Start conversion + T::regs().cr().modify(|reg| { + reg.set_adstart(true); + }); + + // Wait for conversion sequence to finish. + transfer.await; + + // Ensure conversions are finished. + Self::cancel_conversions(); + + // Reset configuration. + T::regs().cfgr().modify(|reg| { + reg.set_cont(false); + reg.set_dmngt(Dmngt::from_bits(0)); + }); + } + + fn configure_channel(channel: &mut impl AdcChannel, sample_time: SampleTime) { + channel.setup(); + + let channel = channel.channel(); + + Self::set_channel_sample_time(channel, sample_time); #[cfg(stm32h7)] { T::regs().cfgr2().modify(|w| w.set_lshift(0)); T::regs() .pcsel() - .write(|w| w.set_pcsel(channel as _, Pcsel::PRESELECTED)); + .modify(|w| w.set_pcsel(channel as _, Pcsel::PRESELECTED)); } + } - T::regs().sqr1().write(|reg| { - reg.set_sq(0, channel); + fn read_channel(&mut self, channel: &mut impl AdcChannel) -> u16 { + Self::configure_channel(channel, self.sample_time); + + T::regs().sqr1().modify(|reg| { + reg.set_sq(0, channel.channel()); reg.set_l(0); }); @@ -306,4 +410,13 @@ impl<'d, T: Instance> Adc<'d, T> { T::regs().smpr(1).modify(|reg| reg.set_smp((ch - 10) as _, sample_time)); } } + + fn cancel_conversions() { + if T::regs().cr().read().adstart() && !T::regs().cr().read().addis() { + T::regs().cr().modify(|reg| { + reg.set_adstp(Adstp::STOP); + }); + while T::regs().cr().read().adstart() {} + } + } } From 70061e74b2b4e4ca513bcefa5c3bebbb52538e5d Mon Sep 17 00:00:00 2001 From: Alexandros Liarokapis Date: Wed, 26 Jun 2024 19:06:20 +0300 Subject: [PATCH 564/581] add async dma read example --- examples/stm32h7/src/bin/adc_dma.rs | 76 +++++++++++++++++++++++++++++ 1 file changed, 76 insertions(+) create mode 100644 examples/stm32h7/src/bin/adc_dma.rs diff --git a/examples/stm32h7/src/bin/adc_dma.rs b/examples/stm32h7/src/bin/adc_dma.rs new file mode 100644 index 000000000..6c0240453 --- /dev/null +++ b/examples/stm32h7/src/bin/adc_dma.rs @@ -0,0 +1,76 @@ +#![no_std] +#![no_main] + +use defmt::*; +use embassy_executor::Spawner; +use embassy_stm32::adc::{Adc, AdcChannel as _, SampleTime}; +use embassy_stm32::Config; +use embassy_time::Timer; +use {defmt_rtt as _, panic_probe as _}; + +#[link_section = ".ram_d3"] +static mut DMA_BUF: [u16; 2] = [0; 2]; + +#[embassy_executor::main] +async fn main(_spawner: Spawner) { + let mut read_buffer = unsafe { &mut DMA_BUF[..] }; + + let mut config = Config::default(); + { + use embassy_stm32::rcc::*; + config.rcc.hsi = Some(HSIPrescaler::DIV1); + config.rcc.csi = true; + config.rcc.pll1 = Some(Pll { + source: PllSource::HSI, + prediv: PllPreDiv::DIV4, + mul: PllMul::MUL50, + divp: Some(PllDiv::DIV2), + divq: Some(PllDiv::DIV8), // SPI1 cksel defaults to pll1_q + divr: None, + }); + config.rcc.pll2 = Some(Pll { + source: PllSource::HSI, + prediv: PllPreDiv::DIV4, + mul: PllMul::MUL50, + divp: Some(PllDiv::DIV8), // 100mhz + divq: None, + divr: None, + }); + config.rcc.sys = Sysclk::PLL1_P; // 400 Mhz + config.rcc.ahb_pre = AHBPrescaler::DIV2; // 200 Mhz + config.rcc.apb1_pre = APBPrescaler::DIV2; // 100 Mhz + config.rcc.apb2_pre = APBPrescaler::DIV2; // 100 Mhz + config.rcc.apb3_pre = APBPrescaler::DIV2; // 100 Mhz + config.rcc.apb4_pre = APBPrescaler::DIV2; // 100 Mhz + config.rcc.voltage_scale = VoltageScale::Scale1; + config.rcc.mux.adcsel = mux::Adcsel::PLL2_P; + } + let p = embassy_stm32::init(config); + + info!("Hello World!"); + + let mut adc = Adc::new(p.ADC3); + + let mut dma = p.DMA1_CH1; + let mut vrefint_channel = adc.enable_vrefint().degrade_adc(); + let mut pc0 = p.PC0.degrade_adc(); + + loop { + adc.read_async( + &mut dma, + [ + (&mut vrefint_channel, SampleTime::CYCLES387_5), + (&mut pc0, SampleTime::CYCLES810_5), + ] + .into_iter(), + &mut read_buffer, + ) + .await; + + let vrefint = read_buffer[0]; + let measured = read_buffer[1]; + info!("vrefint: {}", vrefint); + info!("measured: {}", measured); + Timer::after_millis(500).await; + } +} From 5e2fd8623a01e8c026ba2057dd017b4d4bca3acb Mon Sep 17 00:00:00 2001 From: Andres Vahter Date: Wed, 26 Jun 2024 23:50:12 +0300 Subject: [PATCH 565/581] stm32 adc v3 read_async --- embassy-stm32/src/adc/v3.rs | 192 +++++++++++++++++++++++++++++++++--- 1 file changed, 176 insertions(+), 16 deletions(-) diff --git a/embassy-stm32/src/adc/v3.rs b/embassy-stm32/src/adc/v3.rs index 398c57a92..559751555 100644 --- a/embassy-stm32/src/adc/v3.rs +++ b/embassy-stm32/src/adc/v3.rs @@ -1,8 +1,10 @@ use cfg_if::cfg_if; use embassy_hal_internal::into_ref; -use super::blocking_delay_us; -use crate::adc::{Adc, AdcChannel, Instance, Resolution, SampleTime}; +use super::{ + blocking_delay_us, Adc, AdcChannel, AnyAdcChannel, Instance, Resolution, RxDma, SampleTime, SealedAdcChannel, +}; +use crate::dma::Transfer; use crate::{rcc, Peripheral}; /// Default VREF voltage used for sample conversion to millivolts. @@ -12,7 +14,7 @@ pub const VREF_CALIB_MV: u32 = 3000; pub struct VrefInt; impl AdcChannel for VrefInt {} -impl super::SealedAdcChannel for VrefInt { +impl SealedAdcChannel for VrefInt { fn channel(&self) -> u8 { cfg_if! { if #[cfg(adc_g0)] { @@ -31,7 +33,7 @@ impl super::SealedAdcChannel for VrefInt { pub struct Temperature; impl AdcChannel for Temperature {} -impl super::SealedAdcChannel for Temperature { +impl SealedAdcChannel for Temperature { fn channel(&self) -> u8 { cfg_if! { if #[cfg(adc_g0)] { @@ -50,7 +52,7 @@ impl super::SealedAdcChannel for Temperature { pub struct Vbat; impl AdcChannel for Vbat {} -impl super::SealedAdcChannel for Vbat { +impl SealedAdcChannel for Vbat { fn channel(&self) -> u8 { cfg_if! { if #[cfg(adc_g0)] { @@ -101,6 +103,7 @@ impl<'d, T: Instance> Adc<'d, T> { reg.set_advregen(true); }); + // If this is false then each ADC_CHSELR bit enables an input channel. #[cfg(any(adc_g0, adc_u0))] T::regs().cfgr1().modify(|reg| { reg.set_chselrmod(false); @@ -124,6 +127,28 @@ impl<'d, T: Instance> Adc<'d, T> { } } + // Enable ADC only when it is not already running. + fn enable(&mut self) { + // Make sure bits are off + while T::regs().cr().read().addis() { + // spin + } + + if !T::regs().cr().read().aden() { + // Enable ADC + T::regs().isr().modify(|reg| { + reg.set_adrdy(true); + }); + T::regs().cr().modify(|reg| { + reg.set_aden(true); + }); + + while !T::regs().isr().read().adrdy() { + // spin + } + } + } + pub fn enable_vrefint(&self) -> VrefInt { #[cfg(not(any(adc_g0, adc_u0)))] T::common_regs().ccr().modify(|reg| { @@ -181,10 +206,17 @@ impl<'d, T: Instance> Adc<'d, T> { Vbat {} } + /// Set the ADC sample time. pub fn set_sample_time(&mut self, sample_time: SampleTime) { self.sample_time = sample_time; } + /// Get the ADC sample time. + pub fn sample_time(&self) -> SampleTime { + self.sample_time + } + + /// Set the ADC resolution. pub fn set_resolution(&mut self, resolution: Resolution) { #[cfg(not(any(adc_g0, adc_u0)))] T::regs().cfgr().modify(|reg| reg.set_res(resolution.into())); @@ -220,24 +252,139 @@ impl<'d, T: Instance> Adc<'d, T> { T::regs().dr().read().0 as u16 } + /// Read an ADC channel. pub fn read(&mut self, channel: &mut impl AdcChannel) -> u16 { - // Make sure bits are off - while T::regs().cr().read().addis() { - // spin + self.read_channel(channel) + } + + /// Asynchronously read from sequence of ADC channels. + pub async fn read_async( + &mut self, + rx_dma: &mut impl RxDma, + sequence: impl ExactSizeIterator, SampleTime)>, + data: &mut [u16], + ) { + assert!(sequence.len() != 0, "Asynchronous read sequence cannot be empty"); + + assert!( + sequence.len() <= 16, + "Asynchronous read sequence cannot be more than 16 in length" + ); + + // Ensure no conversions are ongoing and ADC is enabled. + Self::cancel_conversions(); + self.enable(); + + // Set sequence length + #[cfg(not(any(adc_g0, adc_u0)))] + T::regs().sqr1().modify(|w| { + w.set_l(sequence.len() as u8 - 1); + }); + + #[cfg(any(adc_g0, adc_u0))] + let mut channel_mask = 0; + + // Configure channels and ranks + for (_i, (channel, sample_time)) in sequence.enumerate() { + Self::configure_channel(channel, sample_time); + + // Each channel is sampled according to sequence + #[cfg(not(any(adc_g0, adc_u0)))] + match _i { + 0..=3 => { + T::regs().sqr1().modify(|w| { + w.set_sq(_i, channel.channel()); + }); + } + 4..=8 => { + T::regs().sqr2().modify(|w| { + w.set_sq(_i - 4, channel.channel()); + }); + } + 9..=13 => { + T::regs().sqr3().modify(|w| { + w.set_sq(_i - 9, channel.channel()); + }); + } + 14..=15 => { + T::regs().sqr4().modify(|w| { + w.set_sq(_i - 14, channel.channel()); + }); + } + _ => unreachable!(), + } + + #[cfg(any(adc_g0, adc_u0))] + { + channel_mask |= 1 << channel.channel(); + } } - // Enable ADC + // On G0 and U0 enabled channels are sampled from 0 to last channel. + // It is possible to add up to 8 sequences if CHSELRMOD = 1. + // However for supporting more than 8 channels alternative CHSELRMOD = 0 approach is used. + #[cfg(any(adc_g0, adc_u0))] + T::regs().chselr().modify(|reg| { + reg.set_chsel(channel_mask); + }); + + // Set continuous mode with oneshot dma. + // Clear overrun flag before starting transfer. T::regs().isr().modify(|reg| { - reg.set_adrdy(true); + reg.set_ovr(true); }); + + #[cfg(not(any(adc_g0, adc_u0)))] + T::regs().cfgr().modify(|reg| { + reg.set_discen(false); + reg.set_cont(true); + // Oneshot mode + reg.set_dmacfg(false); + reg.set_dmaen(true); + }); + #[cfg(any(adc_g0, adc_u0))] + T::regs().cfgr1().modify(|reg| { + reg.set_discen(false); + reg.set_cont(true); + // Oneshot mode + reg.set_dmacfg(false); + reg.set_dmaen(true); + }); + + let request = rx_dma.request(); + let transfer = unsafe { + Transfer::new_read( + rx_dma, + request, + T::regs().dr().as_ptr() as *mut u16, + data, + Default::default(), + ) + }; + + // Start conversion T::regs().cr().modify(|reg| { - reg.set_aden(true); + reg.set_adstart(true); }); - while !T::regs().isr().read().adrdy() { - // spin - } + // Wait for conversion sequence to finish. + transfer.await; + // Ensure conversions are finished. + Self::cancel_conversions(); + + // Reset configuration. + #[cfg(not(any(adc_g0, adc_u0)))] + T::regs().cfgr().modify(|reg| { + reg.set_cont(false); + }); + #[cfg(any(adc_g0, adc_u0))] + T::regs().cfgr1().modify(|reg| { + reg.set_cont(false); + }); + } + + fn configure_channel(channel: &mut impl AdcChannel, sample_time: SampleTime) { // RM0492, RM0481, etc. // "This option bit must be set to 1 when ADCx_INP0 or ADCx_INN1 channel is selected." #[cfg(adc_h5)] @@ -246,7 +393,12 @@ impl<'d, T: Instance> Adc<'d, T> { } // Configure channel - Self::set_channel_sample_time(channel.channel(), self.sample_time); + Self::set_channel_sample_time(channel.channel(), sample_time); + } + + fn read_channel(&mut self, channel: &mut impl AdcChannel) -> u16 { + self.enable(); + Self::configure_channel(channel, self.sample_time); // Select channel #[cfg(not(any(adc_g0, adc_u0)))] @@ -262,7 +414,6 @@ impl<'d, T: Instance> Adc<'d, T> { // STM32G4: Section 2.7.3 #[cfg(any(rcc_l4, rcc_g4))] let _ = self.convert(); - let val = self.convert(); T::regs().cr().modify(|reg| reg.set_addis(true)); @@ -294,4 +445,13 @@ impl<'d, T: Instance> Adc<'d, T> { } } } + + fn cancel_conversions() { + if T::regs().cr().read().adstart() && !T::regs().cr().read().addis() { + T::regs().cr().modify(|reg| { + reg.set_adstp(true); + }); + while T::regs().cr().read().adstart() {} + } + } } From c120efad5bbd7f95615e913100874d27c34cb389 Mon Sep 17 00:00:00 2001 From: Andres Vahter Date: Tue, 2 Jul 2024 14:23:44 +0300 Subject: [PATCH 566/581] stm32 adc read_async: add asserts for buf len --- embassy-stm32/src/adc/v3.rs | 10 +++++++--- embassy-stm32/src/adc/v4.rs | 9 ++++++--- 2 files changed, 13 insertions(+), 6 deletions(-) diff --git a/embassy-stm32/src/adc/v3.rs b/embassy-stm32/src/adc/v3.rs index 559751555..afdfc4e4c 100644 --- a/embassy-stm32/src/adc/v3.rs +++ b/embassy-stm32/src/adc/v3.rs @@ -262,10 +262,13 @@ impl<'d, T: Instance> Adc<'d, T> { &mut self, rx_dma: &mut impl RxDma, sequence: impl ExactSizeIterator, SampleTime)>, - data: &mut [u16], + readings: &mut [u16], ) { assert!(sequence.len() != 0, "Asynchronous read sequence cannot be empty"); - + assert!( + sequence.len() == readings.len(), + "Sequence length must be equal to readings length" + ); assert!( sequence.len() <= 16, "Asynchronous read sequence cannot be more than 16 in length" @@ -357,7 +360,7 @@ impl<'d, T: Instance> Adc<'d, T> { rx_dma, request, T::regs().dr().as_ptr() as *mut u16, - data, + readings, Default::default(), ) }; @@ -431,6 +434,7 @@ impl<'d, T: Instance> Adc<'d, T> { fn set_channel_sample_time(_ch: u8, sample_time: SampleTime) { cfg_if! { if #[cfg(any(adc_g0, adc_u0))] { + // On G0 and U6 all channels use the same sampling time. T::regs().smpr().modify(|reg| reg.set_smp1(sample_time.into())); } else if #[cfg(adc_h5)] { match _ch { diff --git a/embassy-stm32/src/adc/v4.rs b/embassy-stm32/src/adc/v4.rs index f4b62d80e..4261b9b14 100644 --- a/embassy-stm32/src/adc/v4.rs +++ b/embassy-stm32/src/adc/v4.rs @@ -290,10 +290,13 @@ impl<'d, T: Instance> Adc<'d, T> { &mut self, rx_dma: &mut impl RxDma, sequence: impl ExactSizeIterator, SampleTime)>, - data: &mut [u16], + readings: &mut [u16], ) { assert!(sequence.len() != 0, "Asynchronous read sequence cannot be empty"); - + assert!( + sequence.len() == readings.len(), + "Sequence length must be equal to readings length" + ); assert!( sequence.len() <= 16, "Asynchronous read sequence cannot be more than 16 in length" @@ -352,7 +355,7 @@ impl<'d, T: Instance> Adc<'d, T> { rx_dma, request, T::regs().dr().as_ptr() as *mut u16, - data, + readings, Default::default(), ) }; From a4e62314af50d58eb42689e095ffc4a117aad35d Mon Sep 17 00:00:00 2001 From: Andres Vahter Date: Tue, 2 Jul 2024 17:15:22 +0300 Subject: [PATCH 567/581] stm32: adc v3: fix for newest pac --- embassy-stm32/src/adc/v3.rs | 9 ++++----- embassy-stm32/src/adc/v4.rs | 3 +-- 2 files changed, 5 insertions(+), 7 deletions(-) diff --git a/embassy-stm32/src/adc/v3.rs b/embassy-stm32/src/adc/v3.rs index afdfc4e4c..6703268ee 100644 --- a/embassy-stm32/src/adc/v3.rs +++ b/embassy-stm32/src/adc/v3.rs @@ -1,11 +1,12 @@ use cfg_if::cfg_if; use embassy_hal_internal::into_ref; +use pac::adc::vals::Dmacfg; use super::{ blocking_delay_us, Adc, AdcChannel, AnyAdcChannel, Instance, Resolution, RxDma, SampleTime, SealedAdcChannel, }; use crate::dma::Transfer; -use crate::{rcc, Peripheral}; +use crate::{pac, rcc, Peripheral}; /// Default VREF voltage used for sample conversion to millivolts. pub const VREF_DEFAULT_MV: u32 = 3300; @@ -341,16 +342,14 @@ impl<'d, T: Instance> Adc<'d, T> { T::regs().cfgr().modify(|reg| { reg.set_discen(false); reg.set_cont(true); - // Oneshot mode - reg.set_dmacfg(false); + reg.set_dmacfg(Dmacfg::ONESHOT); reg.set_dmaen(true); }); #[cfg(any(adc_g0, adc_u0))] T::regs().cfgr1().modify(|reg| { reg.set_discen(false); reg.set_cont(true); - // Oneshot mode - reg.set_dmacfg(false); + reg.set_dmacfg(Dmacfg::ONESHOT); reg.set_dmaen(true); }); diff --git a/embassy-stm32/src/adc/v4.rs b/embassy-stm32/src/adc/v4.rs index 4261b9b14..344bf89af 100644 --- a/embassy-stm32/src/adc/v4.rs +++ b/embassy-stm32/src/adc/v4.rs @@ -1,6 +1,5 @@ #[allow(unused)] -use pac::adc::vals::{Adcaldif, Boost, Difsel, Exten, Pcsel}; -use pac::adc::vals::{Adstp, Dmngt}; +use pac::adc::vals::{Adcaldif, Adstp, Boost, Difsel, Dmngt, Exten, Pcsel}; use pac::adccommon::vals::Presc; use super::{ From d4ff7616f952bc801390e46bb3163b63cc01828d Mon Sep 17 00:00:00 2001 From: Andres Vahter Date: Tue, 2 Jul 2024 17:35:15 +0300 Subject: [PATCH 568/581] stm32 ringbuffered adc docs improvements --- embassy-stm32/src/adc/ringbuffered_v2.rs | 17 +++++++---------- 1 file changed, 7 insertions(+), 10 deletions(-) diff --git a/embassy-stm32/src/adc/ringbuffered_v2.rs b/embassy-stm32/src/adc/ringbuffered_v2.rs index 3f5277a9d..8df224783 100644 --- a/embassy-stm32/src/adc/ringbuffered_v2.rs +++ b/embassy-stm32/src/adc/ringbuffered_v2.rs @@ -93,11 +93,12 @@ pub struct RingBufferedAdc<'d, T: Instance> { impl<'d, T: Instance> Adc<'d, T> { /// Configures the ADC to use a DMA ring buffer for continuous data acquisition. /// - /// The `dma_buf` should be large enough to prevent buffer overflow, allowing sufficient time to read out measurements. + /// The `dma_buf` should be large enough to prevent DMA buffer overrun. /// The length of the `dma_buf` should be a multiple of the ADC channel count. /// For example, if 3 channels are measured, its length can be 3 * 40 = 120 measurements. /// /// `read_exact` method is used to read out measurements from the DMA ring buffer, and its buffer should be exactly half of the `dma_buf` length. + /// It is critical to call `read_exact` frequently to prevent DMA buffer overrun. /// /// [`read_exact`]: #method.read_exact pub fn into_ring_buffered( @@ -358,18 +359,17 @@ impl<'d, T: Instance> RingBufferedAdc<'d, T> { /// Reads measurements from the DMA ring buffer. /// - /// This method fills the provided `measurements` array with ADC readings. - /// The length of the `measurements` array should be exactly half of the DMA buffer length. - /// Because interrupts are only generated if half or full DMA transfer completes. + /// This method fills the provided `measurements` array with ADC readings from the DMA buffer. + /// The length of the `measurements` array should be exactly half of the DMA buffer length. Because interrupts are only generated if half or full DMA transfer completes. /// /// Each call to `read_exact` will populate the `measurements` array in the same order as the channels defined with `set_sample_sequence`. /// There will be many sequences worth of measurements in this array because it only returns if at least half of the DMA buffer is filled. /// For example if 3 channels are sampled `measurements` contain: `[sq0 sq1 sq3 sq0 sq1 sq3 sq0 sq1 sq3 sq0 sq1 sq3..]`. /// - /// If an error is returned, it indicates a DMA overrun, and the process must be restarted by calling `start` again. + /// If an error is returned, it indicates a DMA overrun, and the process must be restarted by calling `start` or `read_exact` again. /// /// By default, the ADC fills the DMA buffer as quickly as possible. To control the sample rate, call `teardown_adc` after each readout, and then start the DMA again at the desired interval. - /// Note that even if using `teardown_adc` to control sample rate, with each call to `read_exact`, measurements equivalent to half the size of the DMA buffer are still collected. + /// Note that even if using `teardown_adc` to control the sample rate, with each call to `read_exact`, measurements equivalent to half the size of the DMA buffer are still collected. /// /// Example: /// ```rust,ignore @@ -381,7 +381,6 @@ impl<'d, T: Instance> RingBufferedAdc<'d, T> { /// adc.set_sample_sequence(Sequence::Two, &mut p.PA1, SampleTime::CYCLES112); /// adc.set_sample_sequence(Sequence::Three, &mut p.PA2, SampleTime::CYCLES112); /// - /// adc.start.unwrap(); /// let mut measurements = [0u16; DMA_BUF_LEN / 2]; /// loop { /// match adc.read_exact(&mut measurements).await { @@ -392,14 +391,12 @@ impl<'d, T: Instance> RingBufferedAdc<'d, T> { /// } /// Err(e) => { /// defmt::warn!("Error: {:?}", e); - /// // DMA overflow, restart ADC. - /// let _ = adc.start(); + /// // DMA overrun, next call to `read_exact` restart ADC. /// } /// } /// /// // Manually control sample rate. /// Timer::after_millis(100).await; - /// let _ = adc.start(); /// } /// ``` /// From d3f8905e938eecfe7789841c6232cb34b5f43a20 Mon Sep 17 00:00:00 2001 From: Eekle <96976531+Eekle@users.noreply.github.com> Date: Tue, 2 Jul 2024 20:46:05 +0200 Subject: [PATCH 569/581] Use crate level PeriMode --- embassy-stm32/src/tsc/mod.rs | 24 ++++-------------------- 1 file changed, 4 insertions(+), 20 deletions(-) diff --git a/embassy-stm32/src/tsc/mod.rs b/embassy-stm32/src/tsc/mod.rs index cd7ae4a53..5cb58e918 100644 --- a/embassy-stm32/src/tsc/mod.rs +++ b/embassy-stm32/src/tsc/mod.rs @@ -75,6 +75,7 @@ pub use enums::*; use crate::gpio::{AfType, AnyPin, OutputType, Speed}; use crate::interrupt::typelevel::Interrupt; +use crate::mode::{Async, Blocking, Mode as PeriMode}; use crate::rcc::{self, RccPeripheral}; use crate::{interrupt, peripherals, Peripheral}; @@ -93,23 +94,6 @@ pub enum Error { Test, } -/// Async acquisition API marker -pub struct Async; -/// Blocking acquisition API marker -pub struct Blocking; - -trait SealedDriverKind {} - -impl SealedDriverKind for Async {} -impl SealedDriverKind for Blocking {} - -#[allow(private_bounds)] -/// Driver variant marker for the TSC peripheral -pub trait DriverKind: SealedDriverKind {} - -impl DriverKind for Async {} -impl DriverKind for Blocking {} - /// TSC interrupt handler. pub struct InterruptHandler { _phantom: PhantomData, @@ -522,7 +506,7 @@ pub enum G7 {} pub enum G8 {} /// TSC driver -pub struct Tsc<'d, T: Instance, K: DriverKind> { +pub struct Tsc<'d, T: Instance, K: PeriMode> { _peri: PeripheralRef<'d, T>, _g1: Option>, _g2: Option>, @@ -703,7 +687,7 @@ impl<'d, T: Instance> Tsc<'d, T, Blocking> { } } -impl<'d, T: Instance, K: DriverKind> Tsc<'d, T, K> { +impl<'d, T: Instance, K: PeriMode> Tsc<'d, T, K> { /// Create new TSC driver fn check_shields( g1: &Option>, @@ -969,7 +953,7 @@ impl<'d, T: Instance, K: DriverKind> Tsc<'d, T, K> { } } -impl<'d, T: Instance, K: DriverKind> Drop for Tsc<'d, T, K> { +impl<'d, T: Instance, K: PeriMode> Drop for Tsc<'d, T, K> { fn drop(&mut self) { rcc::disable::(); } From 9e4e536769e8bf35ecd43efac58d0655a77e5d58 Mon Sep 17 00:00:00 2001 From: Justus K Date: Tue, 2 Jul 2024 16:39:24 +0200 Subject: [PATCH 570/581] Better panic message when peripheral clock is not enabled --- embassy-stm32/build.rs | 22 +++++++++++++++------- 1 file changed, 15 insertions(+), 7 deletions(-) diff --git a/embassy-stm32/build.rs b/embassy-stm32/build.rs index 24e2226a2..14db0504b 100644 --- a/embassy-stm32/build.rs +++ b/embassy-stm32/build.rs @@ -475,13 +475,21 @@ fn main() { } impl<'a> ClockGen<'a> { - fn gen_clock(&mut self, name: &str) -> TokenStream { + fn gen_clock(&mut self, peripheral: &str, name: &str) -> TokenStream { let clock_name = format_ident!("{}", name.to_ascii_lowercase()); self.clock_names.insert(name.to_ascii_lowercase()); - quote!( unsafe { crate::rcc::get_freqs().#clock_name.unwrap() } ) + quote!(unsafe { + unwrap!( + crate::rcc::get_freqs().#clock_name, + "peripheral '{}' is configured to use the '{}' clock, which is not running. \ + Either enable it in 'config.rcc' or change 'config.rcc.mux' to use another clock", + #peripheral, + #name + ) + }) } - fn gen_mux(&mut self, mux: &PeripheralRccRegister) -> TokenStream { + fn gen_mux(&mut self, peripheral: &str, mux: &PeripheralRccRegister) -> TokenStream { let ir = &self.rcc_registers.ir; let fieldset_name = mux.register.to_ascii_lowercase(); let fieldset = ir @@ -506,9 +514,9 @@ fn main() { for v in enumm.variants.iter().filter(|v| v.name != "DISABLE") { let variant_name = format_ident!("{}", v.name); let expr = if let Some(mux) = self.chained_muxes.get(&v.name) { - self.gen_mux(mux) + self.gen_mux(peripheral, mux) } else { - self.gen_clock(v.name) + self.gen_clock(peripheral, v.name) }; match_arms.extend(quote! { crate::pac::rcc::vals::#enum_name::#variant_name => #expr, @@ -586,8 +594,8 @@ fn main() { }; let clock_frequency = match &rcc.kernel_clock { - PeripheralRccKernelClock::Mux(mux) => clock_gen.gen_mux(mux), - PeripheralRccKernelClock::Clock(clock) => clock_gen.gen_clock(clock), + PeripheralRccKernelClock::Mux(mux) => clock_gen.gen_mux(p.name, mux), + PeripheralRccKernelClock::Clock(clock) => clock_gen.gen_clock(p.name, clock), }; // A refcount leak can result if the same field is shared by peripherals with different stop modes From a07702ba7bde8410b224e80afb6aa7a93f1fb375 Mon Sep 17 00:00:00 2001 From: Ulf Lilleengen Date: Wed, 3 Jul 2024 09:03:25 +0200 Subject: [PATCH 571/581] fix cancellation hanging on event never occuring - The end event is not triggered by stop and might therefor never occur - Clear the end_event after operation is done instead of disabled --- embassy-nrf/src/radio/ble.rs | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/embassy-nrf/src/radio/ble.rs b/embassy-nrf/src/radio/ble.rs index 93003fb19..0fae54f52 100644 --- a/embassy-nrf/src/radio/ble.rs +++ b/embassy-nrf/src/radio/ble.rs @@ -347,12 +347,10 @@ impl<'d, T: Instance> Radio<'d, T> { trace!("radio drop: stopping"); r.intenclr.write(|w| w.end().clear()); - r.events_end.reset(); r.tasks_stop.write(|w| unsafe { w.bits(1) }); - // The docs don't explicitly mention any event to acknowledge the stop task - while r.events_end.read().bits() == 0 {} + r.events_end.reset(); trace!("radio drop: stopped"); }); @@ -382,7 +380,7 @@ impl<'d, T: Instance> Radio<'d, T> { .await; compiler_fence(Ordering::SeqCst); - r.events_disabled.reset(); // ACK + r.events_end.reset(); // ACK // Everthing ends fine, so it disable the drop drop.defuse(); From b07570fce5341b2b16aaa77ab1b1043362ed2e2c Mon Sep 17 00:00:00 2001 From: Ulf Lilleengen Date: Wed, 3 Jul 2024 09:04:47 +0200 Subject: [PATCH 572/581] remove unused logging --- embassy-nrf/src/radio/ble.rs | 3 --- 1 file changed, 3 deletions(-) diff --git a/embassy-nrf/src/radio/ble.rs b/embassy-nrf/src/radio/ble.rs index 0fae54f52..4f0b0641f 100644 --- a/embassy-nrf/src/radio/ble.rs +++ b/embassy-nrf/src/radio/ble.rs @@ -335,8 +335,6 @@ impl<'d, T: Instance> Radio<'d, T> { } async fn trigger_and_wait_end(&mut self, trigger: impl FnOnce()) { - //self.trace_state(); - let r = T::regs(); let s = T::state(); @@ -366,7 +364,6 @@ impl<'d, T: Instance> Radio<'d, T> { // Trigger the transmission trigger(); - // self.trace_state(); // On poll check if interrupt happen poll_fn(|cx| { From 09cfa28a218a65cf756ffde4403806aa7e2613ed Mon Sep 17 00:00:00 2001 From: Andres Vahter Date: Wed, 3 Jul 2024 10:59:20 +0300 Subject: [PATCH 573/581] stm32g0: add adc_dma example --- examples/stm32g0/src/bin/adc_dma.rs | 44 +++++++++++++++++++++++++++++ 1 file changed, 44 insertions(+) create mode 100644 examples/stm32g0/src/bin/adc_dma.rs diff --git a/examples/stm32g0/src/bin/adc_dma.rs b/examples/stm32g0/src/bin/adc_dma.rs new file mode 100644 index 000000000..42d1e729b --- /dev/null +++ b/examples/stm32g0/src/bin/adc_dma.rs @@ -0,0 +1,44 @@ +#![no_std] +#![no_main] + +use defmt::*; +use embassy_executor::Spawner; +use embassy_stm32::adc::{Adc, AdcChannel as _, SampleTime}; +use embassy_time::Timer; +use {defmt_rtt as _, panic_probe as _}; + +static mut DMA_BUF: [u16; 2] = [0; 2]; + +#[embassy_executor::main] +async fn main(_spawner: Spawner) { + let mut read_buffer = unsafe { &mut DMA_BUF[..] }; + + let p = embassy_stm32::init(Default::default()); + + info!("Hello World!"); + + let mut adc = Adc::new(p.ADC1); + + let mut dma = p.DMA1_CH1; + let mut vrefint_channel = adc.enable_vrefint().degrade_adc(); + let mut pa0 = p.PA0.degrade_adc(); + + loop { + adc.read_async( + &mut dma, + [ + (&mut vrefint_channel, SampleTime::CYCLES160_5), + (&mut pa0, SampleTime::CYCLES160_5), + ] + .into_iter(), + &mut read_buffer, + ) + .await; + + let vrefint = read_buffer[0]; + let measured = read_buffer[1]; + info!("vrefint: {}", vrefint); + info!("measured: {}", measured); + Timer::after_millis(500).await; + } +} From f851081e09982a3edefd23082bb23143a0172464 Mon Sep 17 00:00:00 2001 From: Andres Vahter Date: Wed, 3 Jul 2024 14:39:10 +0300 Subject: [PATCH 574/581] stm32 adc: introduce blocking_read --- embassy-stm32/src/adc/g4.rs | 2 +- embassy-stm32/src/adc/ringbuffered_v2.rs | 20 ++++++------- embassy-stm32/src/adc/v2.rs | 2 +- embassy-stm32/src/adc/v3.rs | 30 ++++++++++++++++++-- embassy-stm32/src/adc/v4.rs | 30 ++++++++++++++++++-- examples/stm32f4/src/bin/adc.rs | 8 +++--- examples/stm32f4/src/bin/adc_dma.rs | 4 +-- examples/stm32f7/src/bin/adc.rs | 4 +-- examples/stm32g0/src/bin/adc.rs | 4 +-- examples/stm32g0/src/bin/adc_dma.rs | 2 +- examples/stm32g0/src/bin/adc_oversampling.rs | 2 +- examples/stm32g4/src/bin/adc.rs | 2 +- examples/stm32h7/src/bin/adc.rs | 4 +-- examples/stm32h7/src/bin/adc_dma.rs | 2 +- examples/stm32l4/src/bin/adc.rs | 2 +- examples/stm32u0/src/bin/adc.rs | 2 +- tests/stm32/src/bin/dac.rs | 4 +-- 17 files changed, 86 insertions(+), 38 deletions(-) diff --git a/embassy-stm32/src/adc/g4.rs b/embassy-stm32/src/adc/g4.rs index 6569361fe..c1e584f59 100644 --- a/embassy-stm32/src/adc/g4.rs +++ b/embassy-stm32/src/adc/g4.rs @@ -258,7 +258,7 @@ impl<'d, T: Instance> Adc<'d, T> { } /// Read an ADC pin. - pub fn read(&mut self, channel: &mut impl AdcChannel) -> u16 { + pub fn blocking_read(&mut self, channel: &mut impl AdcChannel) -> u16 { channel.setup(); self.read_channel(channel.channel()) diff --git a/embassy-stm32/src/adc/ringbuffered_v2.rs b/embassy-stm32/src/adc/ringbuffered_v2.rs index 92b34c3fd..3b064044e 100644 --- a/embassy-stm32/src/adc/ringbuffered_v2.rs +++ b/embassy-stm32/src/adc/ringbuffered_v2.rs @@ -97,10 +97,10 @@ impl<'d, T: Instance> Adc<'d, T> { /// The length of the `dma_buf` should be a multiple of the ADC channel count. /// For example, if 3 channels are measured, its length can be 3 * 40 = 120 measurements. /// - /// `read_exact` method is used to read out measurements from the DMA ring buffer, and its buffer should be exactly half of the `dma_buf` length. - /// It is critical to call `read_exact` frequently to prevent DMA buffer overrun. + /// `read` method is used to read out measurements from the DMA ring buffer, and its buffer should be exactly half of the `dma_buf` length. + /// It is critical to call `read` frequently to prevent DMA buffer overrun. /// - /// [`read_exact`]: #method.read_exact + /// [`read`]: #method.read pub fn into_ring_buffered( self, dma: impl Peripheral

> + 'd, @@ -331,7 +331,7 @@ impl<'d, T: Instance> RingBufferedAdc<'d, T> { /// /// Receive in the background is terminated if an error is returned. /// It must then manually be started again by calling `start()` or by re-calling `read()`. - pub fn read(&mut self, buf: &mut [u16; N]) -> Result { + pub fn blocking_read(&mut self, buf: &mut [u16; N]) -> Result { let r = T::regs(); // Start background receive if it was not already started @@ -362,14 +362,14 @@ impl<'d, T: Instance> RingBufferedAdc<'d, T> { /// This method fills the provided `measurements` array with ADC readings from the DMA buffer. /// The length of the `measurements` array should be exactly half of the DMA buffer length. Because interrupts are only generated if half or full DMA transfer completes. /// - /// Each call to `read_exact` will populate the `measurements` array in the same order as the channels defined with `set_sample_sequence`. + /// Each call to `read` will populate the `measurements` array in the same order as the channels defined with `set_sample_sequence`. /// There will be many sequences worth of measurements in this array because it only returns if at least half of the DMA buffer is filled. /// For example if 3 channels are sampled `measurements` contain: `[sq0 sq1 sq3 sq0 sq1 sq3 sq0 sq1 sq3 sq0 sq1 sq3..]`. /// - /// If an error is returned, it indicates a DMA overrun, and the process must be restarted by calling `start` or `read_exact` again. + /// If an error is returned, it indicates a DMA overrun, and the process must be restarted by calling `start` or `read` again. /// /// By default, the ADC fills the DMA buffer as quickly as possible. To control the sample rate, call `teardown_adc` after each readout, and then start the DMA again at the desired interval. - /// Note that even if using `teardown_adc` to control the sample rate, with each call to `read_exact`, measurements equivalent to half the size of the DMA buffer are still collected. + /// Note that even if using `teardown_adc` to control the sample rate, with each call to `read`, measurements equivalent to half the size of the DMA buffer are still collected. /// /// Example: /// ```rust,ignore @@ -383,7 +383,7 @@ impl<'d, T: Instance> RingBufferedAdc<'d, T> { /// /// let mut measurements = [0u16; DMA_BUF_LEN / 2]; /// loop { - /// match adc.read_exact(&mut measurements).await { + /// match adc.read(&mut measurements).await { /// Ok(_) => { /// defmt::info!("adc1: {}", measurements); /// // Only needed to manually control sample rate. @@ -391,7 +391,7 @@ impl<'d, T: Instance> RingBufferedAdc<'d, T> { /// } /// Err(e) => { /// defmt::warn!("Error: {:?}", e); - /// // DMA overrun, next call to `read_exact` restart ADC. + /// // DMA overrun, next call to `read` restarts ADC. /// } /// } /// @@ -404,7 +404,7 @@ impl<'d, T: Instance> RingBufferedAdc<'d, T> { /// [`set_sample_sequence`]: #method.set_sample_sequence /// [`teardown_adc`]: #method.teardown_adc /// [`start`]: #method.start - pub async fn read_exact(&mut self, measurements: &mut [u16; N]) -> Result { + pub async fn read(&mut self, measurements: &mut [u16; N]) -> Result { assert_eq!( self.ring_buf.capacity() / 2, N, diff --git a/embassy-stm32/src/adc/v2.rs b/embassy-stm32/src/adc/v2.rs index ddeb7ea79..842a5ee6d 100644 --- a/embassy-stm32/src/adc/v2.rs +++ b/embassy-stm32/src/adc/v2.rs @@ -178,7 +178,7 @@ where T::regs().dr().read().0 as u16 } - pub fn read(&mut self, channel: &mut impl AdcChannel) -> u16 { + pub fn blocking_read(&mut self, channel: &mut impl AdcChannel) -> u16 { channel.setup(); // Configure ADC diff --git a/embassy-stm32/src/adc/v3.rs b/embassy-stm32/src/adc/v3.rs index c876bffea..9441e42ff 100644 --- a/embassy-stm32/src/adc/v3.rs +++ b/embassy-stm32/src/adc/v3.rs @@ -254,12 +254,36 @@ impl<'d, T: Instance> Adc<'d, T> { } /// Read an ADC channel. - pub fn read(&mut self, channel: &mut impl AdcChannel) -> u16 { + pub fn blocking_read(&mut self, channel: &mut impl AdcChannel) -> u16 { self.read_channel(channel) } - /// Asynchronously read from sequence of ADC channels. - pub async fn read_async( + /// Read one or multiple ADC channels using DMA. + /// + /// `sequence` iterator and `readings` must have the same length. + /// + /// Example + /// ```rust,ignore + /// use embassy_stm32::adc::{Adc, AdcChannel} + /// + /// let mut adc = Adc::new(p.ADC1); + /// let mut adc_pin0 = p.PA0.degrade_adc(); + /// let mut adc_pin1 = p.PA1.degrade_adc(); + /// let mut measurements = [0u16; 2]; + /// + /// adc.read_async( + /// p.DMA1_CH2, + /// [ + /// (&mut *adc_pin0, SampleTime::CYCLES160_5), + /// (&mut *adc_pin1, SampleTime::CYCLES160_5), + /// ] + /// .into_iter(), + /// &mut measurements, + /// ) + /// .await; + /// defmt::info!("measurements: {}", measurements); + /// ``` + pub async fn read( &mut self, rx_dma: &mut impl RxDma, sequence: impl ExactSizeIterator, SampleTime)>, diff --git a/embassy-stm32/src/adc/v4.rs b/embassy-stm32/src/adc/v4.rs index 7db6fa4a2..63b5b58ea 100644 --- a/embassy-stm32/src/adc/v4.rs +++ b/embassy-stm32/src/adc/v4.rs @@ -318,12 +318,36 @@ impl<'d, T: Instance> Adc<'d, T> { } /// Read an ADC channel. - pub fn read(&mut self, channel: &mut impl AdcChannel) -> u16 { + pub fn blocking_read(&mut self, channel: &mut impl AdcChannel) -> u16 { self.read_channel(channel) } - /// Asynchronously read from sequence of ADC channels. - pub async fn read_async( + /// Read one or multiple ADC channels using DMA. + /// + /// `sequence` iterator and `readings` must have the same length. + /// + /// Example + /// ```rust,ignore + /// use embassy_stm32::adc::{Adc, AdcChannel} + /// + /// let mut adc = Adc::new(p.ADC1); + /// let mut adc_pin0 = p.PA0.degrade_adc(); + /// let mut adc_pin2 = p.PA2.degrade_adc(); + /// let mut measurements = [0u16; 2]; + /// + /// adc.read_async( + /// p.DMA2_CH0, + /// [ + /// (&mut *adc_pin0, SampleTime::CYCLES112), + /// (&mut *adc_pin2, SampleTime::CYCLES112), + /// ] + /// .into_iter(), + /// &mut measurements, + /// ) + /// .await; + /// defmt::info!("measurements: {}", measurements); + /// ``` + pub async fn read( &mut self, rx_dma: &mut impl RxDma, sequence: impl ExactSizeIterator, SampleTime)>, diff --git a/examples/stm32f4/src/bin/adc.rs b/examples/stm32f4/src/bin/adc.rs index 9473b7b7f..423d29225 100644 --- a/examples/stm32f4/src/bin/adc.rs +++ b/examples/stm32f4/src/bin/adc.rs @@ -23,7 +23,7 @@ async fn main(_spawner: Spawner) { // Startup delay can be combined to the maximum of either delay.delay_us(Temperature::start_time_us().max(VrefInt::start_time_us())); - let vrefint_sample = adc.read(&mut vrefint); + let vrefint_sample = adc.blocking_read(&mut vrefint); let convert_to_millivolts = |sample| { // From http://www.st.com/resource/en/datasheet/DM00071990.pdf @@ -50,16 +50,16 @@ async fn main(_spawner: Spawner) { loop { // Read pin - let v = adc.read(&mut pin); + let v = adc.blocking_read(&mut pin); info!("PC1: {} ({} mV)", v, convert_to_millivolts(v)); // Read internal temperature - let v = adc.read(&mut temp); + let v = adc.blocking_read(&mut temp); let celcius = convert_to_celcius(v); info!("Internal temp: {} ({} C)", v, celcius); // Read internal voltage reference - let v = adc.read(&mut vrefint); + let v = adc.blocking_read(&mut vrefint); info!("VrefInt: {}", v); Timer::after_millis(100).await; diff --git a/examples/stm32f4/src/bin/adc_dma.rs b/examples/stm32f4/src/bin/adc_dma.rs index 992bed573..43a761e6d 100644 --- a/examples/stm32f4/src/bin/adc_dma.rs +++ b/examples/stm32f4/src/bin/adc_dma.rs @@ -44,7 +44,7 @@ async fn adc_task(mut p: Peripherals) { let _ = adc.start(); let _ = adc2.start(); loop { - match adc.read_exact(&mut buffer1).await { + match adc.read(&mut buffer1).await { Ok(_data) => { let toc = Instant::now(); info!( @@ -62,7 +62,7 @@ async fn adc_task(mut p: Peripherals) { } } - match adc2.read_exact(&mut buffer2).await { + match adc2.read(&mut buffer2).await { Ok(_data) => { let toc = Instant::now(); info!( diff --git a/examples/stm32f7/src/bin/adc.rs b/examples/stm32f7/src/bin/adc.rs index 641157960..6689e3b5d 100644 --- a/examples/stm32f7/src/bin/adc.rs +++ b/examples/stm32f7/src/bin/adc.rs @@ -16,7 +16,7 @@ async fn main(_spawner: Spawner) { let mut pin = p.PA3; let mut vrefint = adc.enable_vrefint(); - let vrefint_sample = adc.read(&mut vrefint); + let vrefint_sample = adc.blocking_read(&mut vrefint); let convert_to_millivolts = |sample| { // From http://www.st.com/resource/en/datasheet/DM00273119.pdf // 6.3.27 Reference voltage @@ -26,7 +26,7 @@ async fn main(_spawner: Spawner) { }; loop { - let v = adc.read(&mut pin); + let v = adc.blocking_read(&mut pin); info!("--> {} - {} mV", v, convert_to_millivolts(v)); Timer::after_millis(100).await; } diff --git a/examples/stm32g0/src/bin/adc.rs b/examples/stm32g0/src/bin/adc.rs index a35119e3d..6c7f3b48a 100644 --- a/examples/stm32g0/src/bin/adc.rs +++ b/examples/stm32g0/src/bin/adc.rs @@ -17,7 +17,7 @@ async fn main(_spawner: Spawner) { let mut pin = p.PA1; let mut vrefint = adc.enable_vrefint(); - let vrefint_sample = adc.read(&mut vrefint); + let vrefint_sample = adc.blocking_read(&mut vrefint); let convert_to_millivolts = |sample| { // From https://www.st.com/resource/en/datasheet/stm32g031g8.pdf // 6.3.3 Embedded internal reference voltage @@ -27,7 +27,7 @@ async fn main(_spawner: Spawner) { }; loop { - let v = adc.read(&mut pin); + let v = adc.blocking_read(&mut pin); info!("--> {} - {} mV", v, convert_to_millivolts(v)); Timer::after_millis(100).await; } diff --git a/examples/stm32g0/src/bin/adc_dma.rs b/examples/stm32g0/src/bin/adc_dma.rs index 42d1e729b..3713e5a21 100644 --- a/examples/stm32g0/src/bin/adc_dma.rs +++ b/examples/stm32g0/src/bin/adc_dma.rs @@ -24,7 +24,7 @@ async fn main(_spawner: Spawner) { let mut pa0 = p.PA0.degrade_adc(); loop { - adc.read_async( + adc.read( &mut dma, [ (&mut vrefint_channel, SampleTime::CYCLES160_5), diff --git a/examples/stm32g0/src/bin/adc_oversampling.rs b/examples/stm32g0/src/bin/adc_oversampling.rs index 3c31eb206..9c5dd872a 100644 --- a/examples/stm32g0/src/bin/adc_oversampling.rs +++ b/examples/stm32g0/src/bin/adc_oversampling.rs @@ -36,7 +36,7 @@ async fn main(_spawner: Spawner) { adc.oversampling_enable(true); loop { - let v = adc.read(&mut pin); + let v = adc.blocking_read(&mut pin); info!("--> {} ", v); //max 65520 = 0xFFF0 Timer::after_millis(100).await; } diff --git a/examples/stm32g4/src/bin/adc.rs b/examples/stm32g4/src/bin/adc.rs index 3de38cbd6..adca846d8 100644 --- a/examples/stm32g4/src/bin/adc.rs +++ b/examples/stm32g4/src/bin/adc.rs @@ -32,7 +32,7 @@ async fn main(_spawner: Spawner) { adc.set_sample_time(SampleTime::CYCLES24_5); loop { - let measured = adc.read(&mut p.PA7); + let measured = adc.blocking_read(&mut p.PA7); info!("measured: {}", measured); Timer::after_millis(500).await; } diff --git a/examples/stm32h7/src/bin/adc.rs b/examples/stm32h7/src/bin/adc.rs index e9a857a74..98504ddf6 100644 --- a/examples/stm32h7/src/bin/adc.rs +++ b/examples/stm32h7/src/bin/adc.rs @@ -51,9 +51,9 @@ async fn main(_spawner: Spawner) { let mut vrefint_channel = adc.enable_vrefint(); loop { - let vrefint = adc.read(&mut vrefint_channel); + let vrefint = adc.blocking_read(&mut vrefint_channel); info!("vrefint: {}", vrefint); - let measured = adc.read(&mut p.PC0); + let measured = adc.blocking_read(&mut p.PC0); info!("measured: {}", measured); Timer::after_millis(500).await; } diff --git a/examples/stm32h7/src/bin/adc_dma.rs b/examples/stm32h7/src/bin/adc_dma.rs index 6c0240453..0b905d227 100644 --- a/examples/stm32h7/src/bin/adc_dma.rs +++ b/examples/stm32h7/src/bin/adc_dma.rs @@ -56,7 +56,7 @@ async fn main(_spawner: Spawner) { let mut pc0 = p.PC0.degrade_adc(); loop { - adc.read_async( + adc.read( &mut dma, [ (&mut vrefint_channel, SampleTime::CYCLES387_5), diff --git a/examples/stm32l4/src/bin/adc.rs b/examples/stm32l4/src/bin/adc.rs index 7a89334e0..c557ac6d7 100644 --- a/examples/stm32l4/src/bin/adc.rs +++ b/examples/stm32l4/src/bin/adc.rs @@ -23,7 +23,7 @@ fn main() -> ! { let mut channel = p.PC0; loop { - let v = adc.read(&mut channel); + let v = adc.blocking_read(&mut channel); info!("--> {}", v); } } diff --git a/examples/stm32u0/src/bin/adc.rs b/examples/stm32u0/src/bin/adc.rs index 4410448f1..c8252e4e1 100644 --- a/examples/stm32u0/src/bin/adc.rs +++ b/examples/stm32u0/src/bin/adc.rs @@ -23,7 +23,7 @@ fn main() -> ! { let mut channel = p.PC0; loop { - let v = adc.read(&mut channel); + let v = adc.blocking_read(&mut channel); info!("--> {}", v); embassy_time::block_for(Duration::from_millis(200)); } diff --git a/tests/stm32/src/bin/dac.rs b/tests/stm32/src/bin/dac.rs index 06501ab14..86a68c530 100644 --- a/tests/stm32/src/bin/dac.rs +++ b/tests/stm32/src/bin/dac.rs @@ -38,7 +38,7 @@ async fn main(_spawner: Spawner) { dac.set(Value::Bit8(0)); // Now wait a little to obtain a stable value Timer::after_millis(30).await; - let offset = adc.read(&mut adc_pin); + let offset = adc.blocking_read(&mut adc_pin); for v in 0..=255 { // First set the DAC output value @@ -49,7 +49,7 @@ async fn main(_spawner: Spawner) { Timer::after_millis(30).await; // Need to steal the peripherals here because PA4 is obviously in use already - let measured = adc.read(&mut unsafe { embassy_stm32::Peripherals::steal() }.PA4); + let measured = adc.blocking_read(&mut unsafe { embassy_stm32::Peripherals::steal() }.PA4); // Calibrate and normalize the measurement to get close to the dac_output_val let measured_normalized = ((measured as i32 - offset as i32) / normalization_factor) as i16; From 4ecdf31f9b887c4427ff06b70744ef438502f989 Mon Sep 17 00:00:00 2001 From: Dickless <37750743+Dicklessgreat@users.noreply.github.com> Date: Fri, 5 Jul 2024 02:33:30 +0900 Subject: [PATCH 575/581] add SAI example --- examples/stm32h7/Cargo.toml | 1 + examples/stm32h7/src/bin/sai.rs | 189 ++++++++++++++++++++++++++++++++ 2 files changed, 190 insertions(+) create mode 100644 examples/stm32h7/src/bin/sai.rs diff --git a/examples/stm32h7/Cargo.toml b/examples/stm32h7/Cargo.toml index 0584f3916..78343b74f 100644 --- a/examples/stm32h7/Cargo.toml +++ b/examples/stm32h7/Cargo.toml @@ -34,6 +34,7 @@ stm32-fmc = "0.3.0" embedded-storage = "0.3.1" static_cell = "2" chrono = { version = "^0.4", default-features = false } +grounded = "0.2.0" # cargo build/run [profile.dev] diff --git a/examples/stm32h7/src/bin/sai.rs b/examples/stm32h7/src/bin/sai.rs new file mode 100644 index 000000000..ef8479979 --- /dev/null +++ b/examples/stm32h7/src/bin/sai.rs @@ -0,0 +1,189 @@ +//! Daisy Seed rev.7(with PCM3060 codec) +//! https://electro-smith.com/products/daisy-seed +#![no_std] +#![no_main] + +use defmt_rtt as _; +use embassy_executor::Spawner; +use embassy_stm32 as hal; +use grounded::uninit::GroundedArrayCell; +use hal::rcc::*; +use hal::sai::*; +use hal::time::Hertz; +use panic_probe as _; + +const BLOCK_LENGTH: usize = 32; // 32 samples +const HALF_DMA_BUFFER_LENGTH: usize = BLOCK_LENGTH * 2; // 2 channels +const DMA_BUFFER_LENGTH: usize = HALF_DMA_BUFFER_LENGTH * 2; // 2 half-blocks +const SAMPLE_RATE: u32 = 48000; + +//DMA buffer must be in special region. Refer https://embassy.dev/book/#_stm32_bdma_only_working_out_of_some_ram_regions +#[link_section = ".sram1_bss"] +static mut TX_BUFFER: GroundedArrayCell = GroundedArrayCell::uninit(); +#[link_section = ".sram1_bss"] +static mut RX_BUFFER: GroundedArrayCell = GroundedArrayCell::uninit(); + +#[embassy_executor::main] +async fn main(_spawner: Spawner) { + let mut config = hal::Config::default(); + config.rcc.pll1 = Some(Pll { + source: PllSource::HSE, + prediv: PllPreDiv::DIV4, + mul: PllMul::MUL200, + divp: Some(PllDiv::DIV2), + divq: Some(PllDiv::DIV5), + divr: Some(PllDiv::DIV2), + }); + config.rcc.pll3 = Some(Pll { + source: PllSource::HSE, + prediv: PllPreDiv::DIV6, + mul: PllMul::MUL295, + divp: Some(PllDiv::DIV16), + divq: Some(PllDiv::DIV4), + divr: Some(PllDiv::DIV32), + }); + config.rcc.sys = Sysclk::PLL1_P; + config.rcc.mux.sai1sel = hal::pac::rcc::vals::Saisel::PLL3_P; + config.rcc.ahb_pre = AHBPrescaler::DIV2; // 200 Mhz + config.rcc.apb1_pre = APBPrescaler::DIV2; // 100 Mhz + config.rcc.apb2_pre = APBPrescaler::DIV2; // 100 Mhz + config.rcc.apb3_pre = APBPrescaler::DIV2; // 100 Mhz + config.rcc.apb4_pre = APBPrescaler::DIV2; // 100 Mhz + config.rcc.hse = Some(Hse { + freq: Hertz::mhz(16), + mode: HseMode::Oscillator, + }); + + let p = hal::init(config); + + let (sub_block_tx, sub_block_rx) = hal::sai::split_subblocks(p.SAI1); + let kernel_clock = hal::rcc::frequency::().0; + let mclk_div = mclk_div_from_u8((kernel_clock / (SAMPLE_RATE * 256)) as u8); + + let mut tx_config = hal::sai::Config::default(); + tx_config.mode = Mode::Master; + tx_config.tx_rx = TxRx::Transmitter; + tx_config.sync_output = true; + tx_config.clock_strobe = ClockStrobe::Falling; + tx_config.master_clock_divider = mclk_div; + tx_config.stereo_mono = StereoMono::Stereo; + tx_config.data_size = DataSize::Data24; + tx_config.bit_order = BitOrder::MsbFirst; + tx_config.frame_sync_polarity = FrameSyncPolarity::ActiveHigh; + tx_config.frame_sync_offset = FrameSyncOffset::OnFirstBit; + tx_config.frame_length = 64; + tx_config.frame_sync_active_level_length = embassy_stm32::sai::word::U7(32); + tx_config.fifo_threshold = FifoThreshold::Quarter; + + let mut rx_config = tx_config.clone(); + rx_config.mode = Mode::Slave; + rx_config.tx_rx = TxRx::Receiver; + rx_config.sync_input = SyncInput::Internal; + rx_config.clock_strobe = ClockStrobe::Rising; + rx_config.sync_output = false; + + let tx_buffer: &mut [u32] = unsafe { + TX_BUFFER.initialize_all_copied(0); + let (ptr, len) = TX_BUFFER.get_ptr_len(); + core::slice::from_raw_parts_mut(ptr, len) + }; + + let mut sai_transmitter = Sai::new_asynchronous_with_mclk( + sub_block_tx, + p.PE5, + p.PE6, + p.PE4, + p.PE2, + p.DMA1_CH0, + tx_buffer, + tx_config, + ); + + let rx_buffer: &mut [u32] = unsafe { + RX_BUFFER.initialize_all_copied(0); + let (ptr, len) = RX_BUFFER.get_ptr_len(); + core::slice::from_raw_parts_mut(ptr, len) + }; + + let mut sai_receiver = + Sai::new_synchronous(sub_block_rx, p.PE3, p.DMA1_CH1, rx_buffer, rx_config); + + sai_receiver.start(); + sai_transmitter.start(); + + let mut buf = [0u32; HALF_DMA_BUFFER_LENGTH]; + + loop { + sai_receiver.read(&mut buf).await.unwrap(); + sai_transmitter.write(&buf).await.unwrap(); + } +} + +const fn mclk_div_from_u8(v: u8) -> MasterClockDivider { + match v { + 1 => MasterClockDivider::Div1, + 2 => MasterClockDivider::Div2, + 3 => MasterClockDivider::Div3, + 4 => MasterClockDivider::Div4, + 5 => MasterClockDivider::Div5, + 6 => MasterClockDivider::Div6, + 7 => MasterClockDivider::Div7, + 8 => MasterClockDivider::Div8, + 9 => MasterClockDivider::Div9, + 10 => MasterClockDivider::Div10, + 11 => MasterClockDivider::Div11, + 12 => MasterClockDivider::Div12, + 13 => MasterClockDivider::Div13, + 14 => MasterClockDivider::Div14, + 15 => MasterClockDivider::Div15, + 16 => MasterClockDivider::Div16, + 17 => MasterClockDivider::Div17, + 18 => MasterClockDivider::Div18, + 19 => MasterClockDivider::Div19, + 20 => MasterClockDivider::Div20, + 21 => MasterClockDivider::Div21, + 22 => MasterClockDivider::Div22, + 23 => MasterClockDivider::Div23, + 24 => MasterClockDivider::Div24, + 25 => MasterClockDivider::Div25, + 26 => MasterClockDivider::Div26, + 27 => MasterClockDivider::Div27, + 28 => MasterClockDivider::Div28, + 29 => MasterClockDivider::Div29, + 30 => MasterClockDivider::Div30, + 31 => MasterClockDivider::Div31, + 32 => MasterClockDivider::Div32, + 33 => MasterClockDivider::Div33, + 34 => MasterClockDivider::Div34, + 35 => MasterClockDivider::Div35, + 36 => MasterClockDivider::Div36, + 37 => MasterClockDivider::Div37, + 38 => MasterClockDivider::Div38, + 39 => MasterClockDivider::Div39, + 40 => MasterClockDivider::Div40, + 41 => MasterClockDivider::Div41, + 42 => MasterClockDivider::Div42, + 43 => MasterClockDivider::Div43, + 44 => MasterClockDivider::Div44, + 45 => MasterClockDivider::Div45, + 46 => MasterClockDivider::Div46, + 47 => MasterClockDivider::Div47, + 48 => MasterClockDivider::Div48, + 49 => MasterClockDivider::Div49, + 50 => MasterClockDivider::Div50, + 51 => MasterClockDivider::Div51, + 52 => MasterClockDivider::Div52, + 53 => MasterClockDivider::Div53, + 54 => MasterClockDivider::Div54, + 55 => MasterClockDivider::Div55, + 56 => MasterClockDivider::Div56, + 57 => MasterClockDivider::Div57, + 58 => MasterClockDivider::Div58, + 59 => MasterClockDivider::Div59, + 60 => MasterClockDivider::Div60, + 61 => MasterClockDivider::Div61, + 62 => MasterClockDivider::Div62, + 63 => MasterClockDivider::Div63, + _ => panic!(), + } +} From 49546abfec8dd8a9a610c82ec5ef11adba8b5f04 Mon Sep 17 00:00:00 2001 From: Dickless <37750743+Dicklessgreat@users.noreply.github.com> Date: Fri, 5 Jul 2024 03:17:04 +0900 Subject: [PATCH 576/581] rustfmt --- examples/stm32h7/src/bin/sai.rs | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/examples/stm32h7/src/bin/sai.rs b/examples/stm32h7/src/bin/sai.rs index ef8479979..7f57c4949 100644 --- a/examples/stm32h7/src/bin/sai.rs +++ b/examples/stm32h7/src/bin/sai.rs @@ -105,8 +105,7 @@ async fn main(_spawner: Spawner) { core::slice::from_raw_parts_mut(ptr, len) }; - let mut sai_receiver = - Sai::new_synchronous(sub_block_rx, p.PE3, p.DMA1_CH1, rx_buffer, rx_config); + let mut sai_receiver = Sai::new_synchronous(sub_block_rx, p.PE3, p.DMA1_CH1, rx_buffer, rx_config); sai_receiver.start(); sai_transmitter.start(); From 4f649caa8155c5031592d74c2b5e94f400332a88 Mon Sep 17 00:00:00 2001 From: Dickless <37750743+Dicklessgreat@users.noreply.github.com> Date: Fri, 5 Jul 2024 03:29:25 +0900 Subject: [PATCH 577/581] cargo +nightly fmt --- examples/stm32h7/src/bin/sai.rs | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/examples/stm32h7/src/bin/sai.rs b/examples/stm32h7/src/bin/sai.rs index 7f57c4949..f6735e235 100644 --- a/examples/stm32h7/src/bin/sai.rs +++ b/examples/stm32h7/src/bin/sai.rs @@ -3,14 +3,12 @@ #![no_std] #![no_main] -use defmt_rtt as _; use embassy_executor::Spawner; -use embassy_stm32 as hal; use grounded::uninit::GroundedArrayCell; use hal::rcc::*; use hal::sai::*; use hal::time::Hertz; -use panic_probe as _; +use {defmt_rtt as _, embassy_stm32 as hal, panic_probe as _}; const BLOCK_LENGTH: usize = 32; // 32 samples const HALF_DMA_BUFFER_LENGTH: usize = BLOCK_LENGTH * 2; // 2 channels From b90eef293ba36bfeaba85ec5f8396021fd282130 Mon Sep 17 00:00:00 2001 From: Dickless <37750743+Dicklessgreat@users.noreply.github.com> Date: Sat, 6 Jul 2024 17:36:22 +0900 Subject: [PATCH 578/581] [#2905 #2904] Replaced static raw array with GroundedArrayCell --- examples/stm32h7/src/bin/spi_bdma.rs | 12 +++++++++--- 1 file changed, 9 insertions(+), 3 deletions(-) diff --git a/examples/stm32h7/src/bin/spi_bdma.rs b/examples/stm32h7/src/bin/spi_bdma.rs index b2e941078..65f498506 100644 --- a/examples/stm32h7/src/bin/spi_bdma.rs +++ b/examples/stm32h7/src/bin/spi_bdma.rs @@ -10,18 +10,24 @@ use embassy_executor::Executor; use embassy_stm32::mode::Async; use embassy_stm32::time::mhz; use embassy_stm32::{spi, Config}; +use grounded::uninit::GroundedArrayCell; use heapless::String; use static_cell::StaticCell; use {defmt_rtt as _, panic_probe as _}; // Defined in memory.x #[link_section = ".ram_d3"] -static mut RAM_D3: [u8; 64 * 1024] = [0u8; 64 * 1024]; +static mut RAM_D3: GroundedArrayCell = GroundedArrayCell::uninit(); #[embassy_executor::task] async fn main_task(mut spi: spi::Spi<'static, Async>) { - let read_buffer = unsafe { &mut RAM_D3[0..128] }; - let write_buffer = unsafe { &mut RAM_D3[128..256] }; + let (read_buffer, write_buffer) = unsafe { + RAM_D3.initialize_all_copied(0); + ( + RAM_D3.get_subslice_mut_unchecked(0, 128), + RAM_D3.get_subslice_mut_unchecked(128, 128), + ) + }; for n in 0u32.. { let mut write: String<128> = String::new(); From 3408e1ddbf7076e119307ae04dce4a9ddf922f34 Mon Sep 17 00:00:00 2001 From: Dickless <37750743+Dicklessgreat@users.noreply.github.com> Date: Sun, 7 Jul 2024 04:39:39 +0900 Subject: [PATCH 579/581] Fixed to reserve as much space as it uses. --- examples/stm32h7/src/bin/spi_bdma.rs | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/examples/stm32h7/src/bin/spi_bdma.rs b/examples/stm32h7/src/bin/spi_bdma.rs index 65f498506..43fb6b41c 100644 --- a/examples/stm32h7/src/bin/spi_bdma.rs +++ b/examples/stm32h7/src/bin/spi_bdma.rs @@ -17,7 +17,7 @@ use {defmt_rtt as _, panic_probe as _}; // Defined in memory.x #[link_section = ".ram_d3"] -static mut RAM_D3: GroundedArrayCell = GroundedArrayCell::uninit(); +static mut RAM_D3: GroundedArrayCell = GroundedArrayCell::uninit(); #[embassy_executor::task] async fn main_task(mut spi: spi::Spi<'static, Async>) { From 87f66343493a5ae99f0f9b27602b96524111c94a Mon Sep 17 00:00:00 2001 From: kalkyl Date: Mon, 8 Jul 2024 13:58:36 +0200 Subject: [PATCH 580/581] Add example for sharing things between tasks --- examples/rp/src/bin/sharing.rs | 140 +++++++++++++++++++++++++++++++++ 1 file changed, 140 insertions(+) create mode 100644 examples/rp/src/bin/sharing.rs diff --git a/examples/rp/src/bin/sharing.rs b/examples/rp/src/bin/sharing.rs new file mode 100644 index 000000000..0761500ef --- /dev/null +++ b/examples/rp/src/bin/sharing.rs @@ -0,0 +1,140 @@ +//! This example shows some common strategies for sharing resources between tasks. + +#![no_std] +#![no_main] + +use core::cell::{Cell, RefCell}; +use core::sync::atomic::{AtomicU32, Ordering}; + +use cortex_m_rt::entry; +use defmt::info; +use embassy_executor::{Executor, InterruptExecutor}; +use embassy_rp::clocks::RoscRng; +use embassy_rp::interrupt::{InterruptExt, Priority}; +use embassy_rp::peripherals::UART0; +use embassy_rp::uart::{self, InterruptHandler, UartTx}; +use embassy_rp::{bind_interrupts, interrupt}; +use embassy_sync::blocking_mutex::raw::CriticalSectionRawMutex; +use embassy_sync::{blocking_mutex, mutex}; +use embassy_time::{Duration, Ticker}; +use rand::RngCore; +use static_cell::{ConstStaticCell, StaticCell}; +use {defmt_rtt as _, panic_probe as _}; + +type UartMutex = mutex::Mutex>; + +struct MyType { + inner: u32, +} + +static EXECUTOR_HI: InterruptExecutor = InterruptExecutor::new(); +static EXECUTOR_LOW: StaticCell = StaticCell::new(); + +// Use Atomics for simple values +static ATOMIC: AtomicU32 = AtomicU32::new(0); + +// Use blocking Mutex with Cell/RefCell for sharing non-async things +static MUTEX_BLOCKING: blocking_mutex::Mutex> = + blocking_mutex::Mutex::new(RefCell::new(MyType { inner: 0 })); + +bind_interrupts!(struct Irqs { + UART0_IRQ => InterruptHandler; +}); + +#[interrupt] +unsafe fn SWI_IRQ_0() { + EXECUTOR_HI.on_interrupt() +} + +#[entry] +fn main() -> ! { + let p = embassy_rp::init(Default::default()); + info!("Here we go!"); + + let uart = UartTx::new(p.UART0, p.PIN_0, p.DMA_CH0, uart::Config::default()); + // Use the async Mutex for sharing async things (built-in interior mutability) + static UART: StaticCell = StaticCell::new(); + let uart = UART.init(mutex::Mutex::new(uart)); + + // High-priority executor: runs in interrupt mode + interrupt::SWI_IRQ_0.set_priority(Priority::P3); + let spawner = EXECUTOR_HI.start(interrupt::SWI_IRQ_0); + spawner.must_spawn(task_a(uart)); + + // Low priority executor: runs in thread mode + let executor = EXECUTOR_LOW.init(Executor::new()); + executor.run(|spawner| { + // No Mutex needed when sharing between tasks running on the same executor + + // Use Cell for Copy-types + static CELL: ConstStaticCell> = ConstStaticCell::new(Cell::new([0; 4])); + let cell = CELL.take(); + + // Use RefCell for &mut access + static REF_CELL: ConstStaticCell> = ConstStaticCell::new(RefCell::new(MyType { inner: 0 })); + let ref_cell = REF_CELL.take(); + + spawner.must_spawn(task_b(uart, cell, ref_cell)); + spawner.must_spawn(task_c(cell, ref_cell)); + }); +} + +#[embassy_executor::task] +async fn task_a(uart: &'static UartMutex) { + let mut ticker = Ticker::every(Duration::from_secs(1)); + loop { + let random = RoscRng.next_u32(); + + { + let mut uart = uart.lock().await; + uart.write(b"task a").await.unwrap(); + // The uart lock is released when it goes out of scope + } + + ATOMIC.store(random, Ordering::Relaxed); + + MUTEX_BLOCKING.lock(|x| x.borrow_mut().inner = random); + + ticker.next().await; + } +} + +#[embassy_executor::task] +async fn task_b(uart: &'static UartMutex, cell: &'static Cell<[u8; 4]>, ref_cell: &'static RefCell) { + let mut ticker = Ticker::every(Duration::from_secs(1)); + loop { + let random = RoscRng.next_u32(); + + uart.lock().await.write(b"task b").await.unwrap(); + + cell.set(random.to_be_bytes()); + + ref_cell.borrow_mut().inner = random; + + ticker.next().await; + } +} + +#[embassy_executor::task] +async fn task_c(cell: &'static Cell<[u8; 4]>, ref_cell: &'static RefCell) { + let mut ticker = Ticker::every(Duration::from_secs(1)); + loop { + info!("======================="); + + let atomic = ATOMIC.load(Ordering::Relaxed); + info!("atomic: {}", atomic); + + MUTEX_BLOCKING.lock(|x| { + let val = x.borrow().inner; + info!("blocking mutex: {}", val); + }); + + let cell_val = cell.get(); + info!("cell: {:?}", cell_val); + + let ref_cell_val = ref_cell.borrow().inner; + info!("ref_cell: {:?}", ref_cell_val); + + ticker.next().await; + } +} From 028ca55f9ca3bfa2e4aa99b16bc0e0e29241fe70 Mon Sep 17 00:00:00 2001 From: kalkyl Date: Mon, 8 Jul 2024 17:16:35 +0200 Subject: [PATCH 581/581] Add more docs and cross-links --- docs/pages/faq.adoc | 3 ++- docs/pages/sharing_peripherals.adoc | 2 ++ examples/rp/src/bin/sharing.rs | 22 ++++++++++++++++------ 3 files changed, 20 insertions(+), 7 deletions(-) diff --git a/docs/pages/faq.adoc b/docs/pages/faq.adoc index a2f56a539..fc1316062 100644 --- a/docs/pages/faq.adoc +++ b/docs/pages/faq.adoc @@ -352,7 +352,8 @@ There are two main ways to handle concurrency in Embassy: In general, either of these approaches will work. The main differences of these approaches are: -When using **separate tasks**, each task needs its own RAM allocation, so there's a little overhead for each task, so one task that does three things will likely be a little bit smaller than three tasks that do one thing (not a lot, probably a couple dozen bytes). In contrast, with **multiple futures in one task**, you don't need multiple task allocations, and it will generally be easier to share data, or use borrowed resources, inside of a single task. +When using **separate tasks**, each task needs its own RAM allocation, so there's a little overhead for each task, so one task that does three things will likely be a little bit smaller than three tasks that do one thing (not a lot, probably a couple dozen bytes). In contrast, with **multiple futures in one task**, you don't need multiple task allocations, and it will generally be easier to share data, or use borrowed resources, inside of a single task. +An example showcasing some methods for sharing things between tasks link:https://github.com/embassy-rs/embassy/blob/main/examples/rp/src/bin/sharing.rs[can be found here]. But when it comes to "waking" tasks, for example when a data transfer is complete or a button is pressed, it's faster to wake a dedicated task, because that task does not need to check which future is actually ready. `join` and `select` must check ALL of the futures they are managing to see which one (or which ones) are ready to do more work. This is because all Rust executors (like Embassy or Tokio) only have the ability to wake tasks, not specific futures. This means you will use slightly less CPU time juggling futures when using dedicated tasks. diff --git a/docs/pages/sharing_peripherals.adoc b/docs/pages/sharing_peripherals.adoc index 6bcd56b01..ebd899c4e 100644 --- a/docs/pages/sharing_peripherals.adoc +++ b/docs/pages/sharing_peripherals.adoc @@ -126,3 +126,5 @@ async fn toggle_led(control: Sender<'static, ThreadModeRawMutex, LedState, 64>, This example replaces the Mutex with a Channel, and uses another task (the main loop) to drive the LED. The advantage of this approach is that only a single task references the peripheral, separating concerns. However, using a Mutex has a lower overhead and might be necessary if you need to ensure that the operation is completed before continuing to do other work in your task. + +An example showcasing more methods for sharing link:https://github.com/embassy-rs/embassy/blob/main/examples/rp/src/bin/sharing.rs[can be found here]. \ No newline at end of file diff --git a/examples/rp/src/bin/sharing.rs b/examples/rp/src/bin/sharing.rs index 0761500ef..5416e20ce 100644 --- a/examples/rp/src/bin/sharing.rs +++ b/examples/rp/src/bin/sharing.rs @@ -1,4 +1,14 @@ //! This example shows some common strategies for sharing resources between tasks. +//! +//! We demonstrate five different ways of sharing, covering different use cases: +//! - Atomics: This method is used for simple values, such as bool and u8..u32 +//! - Blocking Mutex: This is used for sharing non-async things, using Cell/RefCell for interior mutability. +//! - Async Mutex: This is used for sharing async resources, where you need to hold the lock across await points. +//! The async Mutex has interior mutability built-in, so no RefCell is needed. +//! - Cell: For sharing Copy types between tasks running on the same executor. +//! - RefCell: When you want &mut access to a value shared between tasks running on the same executor. +//! +//! More information: https://embassy.dev/book/#_sharing_peripherals_between_tasks #![no_std] #![no_main] @@ -21,7 +31,7 @@ use rand::RngCore; use static_cell::{ConstStaticCell, StaticCell}; use {defmt_rtt as _, panic_probe as _}; -type UartMutex = mutex::Mutex>; +type UartAsyncMutex = mutex::Mutex>; struct MyType { inner: u32, @@ -53,7 +63,7 @@ fn main() -> ! { let uart = UartTx::new(p.UART0, p.PIN_0, p.DMA_CH0, uart::Config::default()); // Use the async Mutex for sharing async things (built-in interior mutability) - static UART: StaticCell = StaticCell::new(); + static UART: StaticCell = StaticCell::new(); let uart = UART.init(mutex::Mutex::new(uart)); // High-priority executor: runs in interrupt mode @@ -80,7 +90,7 @@ fn main() -> ! { } #[embassy_executor::task] -async fn task_a(uart: &'static UartMutex) { +async fn task_a(uart: &'static UartAsyncMutex) { let mut ticker = Ticker::every(Duration::from_secs(1)); loop { let random = RoscRng.next_u32(); @@ -100,7 +110,7 @@ async fn task_a(uart: &'static UartMutex) { } #[embassy_executor::task] -async fn task_b(uart: &'static UartMutex, cell: &'static Cell<[u8; 4]>, ref_cell: &'static RefCell) { +async fn task_b(uart: &'static UartAsyncMutex, cell: &'static Cell<[u8; 4]>, ref_cell: &'static RefCell) { let mut ticker = Ticker::every(Duration::from_secs(1)); loop { let random = RoscRng.next_u32(); @@ -121,8 +131,8 @@ async fn task_c(cell: &'static Cell<[u8; 4]>, ref_cell: &'static RefCell loop { info!("======================="); - let atomic = ATOMIC.load(Ordering::Relaxed); - info!("atomic: {}", atomic); + let atomic_val = ATOMIC.load(Ordering::Relaxed); + info!("atomic: {}", atomic_val); MUTEX_BLOCKING.lock(|x| { let val = x.borrow().inner;