From d2a2734752ed276123a15b58fd8f50c3b531f62d Mon Sep 17 00:00:00 2001
From: xoviat <xoviat@users.noreply.github.com>
Date: Sun, 1 Oct 2023 09:37:42 -0500
Subject: [PATCH] nrf, rp: update set_config

---
 embassy-nrf/src/spim.rs | 7 +++++--
 embassy-nrf/src/spis.rs | 7 +++++--
 embassy-nrf/src/twim.rs | 7 +++++--
 embassy-rp/src/spi.rs   | 5 ++++-
 4 files changed, 19 insertions(+), 7 deletions(-)

diff --git a/embassy-nrf/src/spim.rs b/embassy-nrf/src/spim.rs
index 4828af43e..caf681d99 100644
--- a/embassy-nrf/src/spim.rs
+++ b/embassy-nrf/src/spim.rs
@@ -176,7 +176,7 @@ impl<'d, T: Instance> Spim<'d, T> {
         let mut spim = Self { _p: spim };
 
         // Apply runtime peripheral configuration
-        Self::set_config(&mut spim, &config);
+        Self::set_config(&mut spim, &config).unwrap();
 
         // Disable all events interrupts
         r.intenclr.write(|w| unsafe { w.bits(0xFFFF_FFFF) });
@@ -566,7 +566,8 @@ mod eha {
 
 impl<'d, T: Instance> SetConfig for Spim<'d, T> {
     type Config = Config;
-    fn set_config(&mut self, config: &Self::Config) {
+    type ConfigError = ();
+    fn set_config(&mut self, config: &Self::Config) -> Result<(), Self::ConfigError> {
         let r = T::regs();
         // Configure mode.
         let mode = config.mode;
@@ -604,5 +605,7 @@ impl<'d, T: Instance> SetConfig for Spim<'d, T> {
         // Set over-read character
         let orc = config.orc;
         r.orc.write(|w| unsafe { w.orc().bits(orc) });
+
+        Ok(())
     }
 }
diff --git a/embassy-nrf/src/spis.rs b/embassy-nrf/src/spis.rs
index e695ba6b7..e202c6c27 100644
--- a/embassy-nrf/src/spis.rs
+++ b/embassy-nrf/src/spis.rs
@@ -172,7 +172,7 @@ impl<'d, T: Instance> Spis<'d, T> {
         let mut spis = Self { _p: spis };
 
         // Apply runtime peripheral configuration
-        Self::set_config(&mut spis, &config);
+        Self::set_config(&mut spis, &config).unwrap();
 
         // Disable all events interrupts.
         r.intenclr.write(|w| unsafe { w.bits(0xFFFF_FFFF) });
@@ -467,7 +467,8 @@ macro_rules! impl_spis {
 
 impl<'d, T: Instance> SetConfig for Spis<'d, T> {
     type Config = Config;
-    fn set_config(&mut self, config: &Self::Config) {
+    type ConfigError = ();
+    fn set_config(&mut self, config: &Self::Config) -> Result<(), Self::ConfigError> {
         let r = T::regs();
         // Configure mode.
         let mode = config.mode;
@@ -509,5 +510,7 @@ impl<'d, T: Instance> SetConfig for Spis<'d, T> {
         // Configure auto-acquire on 'transfer end' event.
         let auto_acquire = config.auto_acquire;
         r.shorts.write(|w| w.end_acquire().bit(auto_acquire));
+
+        Ok(())
     }
 }
diff --git a/embassy-nrf/src/twim.rs b/embassy-nrf/src/twim.rs
index fe38fb102..919bb4ab2 100644
--- a/embassy-nrf/src/twim.rs
+++ b/embassy-nrf/src/twim.rs
@@ -170,7 +170,7 @@ impl<'d, T: Instance> Twim<'d, T> {
         let mut twim = Self { _p: twim };
 
         // Apply runtime peripheral configuration
-        Self::set_config(&mut twim, &config);
+        Self::set_config(&mut twim, &config).unwrap();
 
         // Disable all events interrupts
         r.intenclr.write(|w| unsafe { w.bits(0xFFFF_FFFF) });
@@ -890,9 +890,12 @@ mod eha {
 
 impl<'d, T: Instance> SetConfig for Twim<'d, T> {
     type Config = Config;
-    fn set_config(&mut self, config: &Self::Config) {
+    type ConfigError = ();
+    fn set_config(&mut self, config: &Self::Config) -> Result<(), Self::ConfigError> {
         let r = T::regs();
         r.frequency
             .write(|w| unsafe { w.frequency().bits(config.frequency as u32) });
+
+        Ok(())
     }
 }
diff --git a/embassy-rp/src/spi.rs b/embassy-rp/src/spi.rs
index 46c440b84..a59ce8419 100644
--- a/embassy-rp/src/spi.rs
+++ b/embassy-rp/src/spi.rs
@@ -597,7 +597,8 @@ mod eha {
 
 impl<'d, T: Instance, M: Mode> SetConfig for Spi<'d, T, M> {
     type Config = Config;
-    fn set_config(&mut self, config: &Self::Config) {
+    type ConfigError = ();
+    fn set_config(&mut self, config: &Self::Config) -> Result<(), ()> {
         let p = self.inner.regs();
         let (presc, postdiv) = calc_prescs(config.frequency);
         p.cpsr().write(|w| w.set_cpsdvsr(presc));
@@ -607,5 +608,7 @@ impl<'d, T: Instance, M: Mode> SetConfig for Spi<'d, T, M> {
             w.set_sph(config.phase == Phase::CaptureOnSecondTransition);
             w.set_scr(postdiv);
         });
+
+        Ok(())
     }
 }