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Match embedded-hal api
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@ -81,23 +81,45 @@ impl<'d, T: GeneralInstance4Channel> SimplePwmChannel<'d, T> {
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/// Get max duty value.
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///
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/// This value depends on the configured frequency and the timer's clock rate from RCC.
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pub fn get_max_duty(&self) -> u32 {
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self.timer.get_max_compare_value() + 1
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pub fn max_duty_cycle(&self) -> u16 {
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unwrap!(self.timer.get_max_compare_value().checked_add(1))
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}
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/// Set the duty for a given channel.
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///
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/// The value ranges from 0 for 0% duty, to [`get_max_duty`](Self::get_max_duty) for 100% duty, both included.
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pub fn set_duty(&mut self, duty: u32) {
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assert!(duty <= self.get_max_duty());
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self.timer.set_compare_value(self.channel, duty)
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/// The value ranges from 0 for 0% duty, to [`max_duty_cycle`](Self::max_duty_cycle) for 100% duty, both included.
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pub fn set_duty_cycle(&mut self, duty: u16) {
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assert!(duty <= (*self).max_duty_cycle());
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self.timer.set_compare_value(self.channel, duty.into())
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}
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fn set_duty_cycle_fully_off(&mut self) {
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self.set_duty_cycle(0);
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}
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fn set_duty_cycle_fully_on(&mut self) {
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self.set_duty_cycle((*self).max_duty_cycle());
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}
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fn set_duty_cycle_fraction(&mut self, num: u16, denom: u16) {
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assert!(denom != 0);
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assert!(num <= denom);
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let duty = u32::from(num) * u32::from(self.max_duty_cycle()) / u32::from(denom);
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// This is safe because we know that `num <= denom`, so `duty <= self.max_duty_cycle()` (u16)
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#[allow(clippy::cast_possible_truncation)]
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self.set_duty_cycle(duty as u16);
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}
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fn set_duty_cycle_percent(&mut self, percent: u8) {
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self.set_duty_cycle_fraction(u16::from(percent), 100)
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}
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/// Get the duty for a given channel.
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///
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/// The value ranges from 0 for 0% duty, to [`get_max_duty`](Self::get_max_duty) for 100% duty, both included.
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pub fn get_duty(&self) -> u32 {
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self.timer.get_compare_value(self.channel)
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/// The value ranges from 0 for 0% duty, to [`max_duty_cycle`](Self::max_duty_cycle) for 100% duty, both included.
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pub fn get_duty(&self) -> u16 {
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unwrap!(self.timer.get_compare_value(self.channel).try_into())
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}
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/// Set the output polarity for a given channel.
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@ -123,25 +145,6 @@ pub struct SimplePwmChannels<'d, T: GeneralInstance4Channel> {
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pub ch4: SimplePwmChannel<'d, T>,
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}
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impl<'d, T: GeneralInstance4Channel> embedded_hal_1::pwm::ErrorType for SimplePwmChannel<'d, T> {
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type Error = core::convert::Infallible;
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}
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impl<'d, T: GeneralInstance4Channel> embedded_hal_1::pwm::SetDutyCycle for SimplePwmChannel<'d, T> {
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fn max_duty_cycle(&self) -> u16 {
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// TODO: panics if CCR is 0xFFFF
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// TODO: rename get_max_duty to max_duty_cycle
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unwrap!(self.get_max_duty().try_into())
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}
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fn set_duty_cycle(&mut self, duty: u16) -> Result<(), Self::Error> {
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self.set_duty(duty.into());
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Ok(())
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}
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// TODO: default methods?
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}
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/// Simple PWM driver.
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pub struct SimplePwm<'d, T: GeneralInstance4Channel> {
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inner: Timer<'d, T>,
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@ -253,6 +256,7 @@ impl<'d, T: GeneralInstance4Channel> SimplePwm<'d, T> {
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/// Note: when you call this, the max duty value changes, so you will have to
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/// call `set_duty` on all channels with the duty calculated based on the new max duty.
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pub fn set_frequency(&mut self, freq: Hertz) {
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// TODO: prevent ARR = u16::MAX?
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let multiplier = if self.inner.get_counting_mode().is_center_aligned() {
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2u8
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} else {
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@ -264,8 +268,8 @@ impl<'d, T: GeneralInstance4Channel> SimplePwm<'d, T> {
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/// Get max duty value.
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///
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/// This value depends on the configured frequency and the timer's clock rate from RCC.
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pub fn get_max_duty(&self) -> u32 {
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self.inner.get_max_compare_value() + 1
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pub fn max_duty_cycle(&self) -> u16 {
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unwrap!(self.inner.get_max_compare_value().checked_add(1))
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}
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/// Generate a sequence of PWM waveform
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@ -323,7 +327,7 @@ impl<'d, T: GeneralInstance4Channel> SimplePwm<'d, T> {
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self.channel(channel).disable();
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}
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self.channel(channel).set_duty(original_duty_state);
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self.channel(channel).set_duty_cycle(original_duty_state);
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// Since DMA is closed before timer update event trigger DMA is turn off,
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// this can almost always trigger a DMA FIFO error.
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@ -399,7 +403,7 @@ macro_rules! impl_waveform_chx {
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self.channel(cc_channel).disable();
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}
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self.channel(cc_channel).set_duty(original_duty_state);
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self.channel(cc_channel).set_duty_cycle(original_duty_state);
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// Since DMA is closed before timer Capture Compare Event trigger DMA is turn off,
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// this can almost always trigger a DMA FIFO error.
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@ -423,6 +427,41 @@ impl_waveform_chx!(waveform_ch2, Ch2Dma, Ch2);
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impl_waveform_chx!(waveform_ch3, Ch3Dma, Ch3);
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impl_waveform_chx!(waveform_ch4, Ch4Dma, Ch4);
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impl<'d, T: GeneralInstance4Channel> embedded_hal_1::pwm::ErrorType for SimplePwmChannel<'d, T> {
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type Error = core::convert::Infallible;
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}
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impl<'d, T: GeneralInstance4Channel> embedded_hal_1::pwm::SetDutyCycle for SimplePwmChannel<'d, T> {
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fn max_duty_cycle(&self) -> u16 {
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self.max_duty_cycle()
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}
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fn set_duty_cycle(&mut self, duty: u16) -> Result<(), Self::Error> {
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self.set_duty_cycle(duty);
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Ok(())
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}
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fn set_duty_cycle_fully_off(&mut self) -> Result<(), Self::Error> {
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self.set_duty_cycle_fully_off();
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Ok(())
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}
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fn set_duty_cycle_fully_on(&mut self) -> Result<(), Self::Error> {
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self.set_duty_cycle_fully_on();
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Ok(())
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}
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fn set_duty_cycle_fraction(&mut self, num: u16, denom: u16) -> Result<(), Self::Error> {
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self.set_duty_cycle_fraction(num, denom);
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Ok(())
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}
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fn set_duty_cycle_percent(&mut self, percent: u8) -> Result<(), Self::Error> {
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self.set_duty_cycle_percent(percent);
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Ok(())
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}
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}
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impl<'d, T: GeneralInstance4Channel> embedded_hal_02::Pwm for SimplePwm<'d, T> {
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type Channel = Channel;
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type Time = Hertz;
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@ -449,7 +488,7 @@ impl<'d, T: GeneralInstance4Channel> embedded_hal_02::Pwm for SimplePwm<'d, T> {
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}
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fn set_duty(&mut self, channel: Self::Channel, duty: Self::Duty) {
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assert!(duty <= self.get_max_duty());
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assert!(duty <= self.max_duty_cycle() as u32);
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self.inner.set_compare_value(channel, duty)
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}
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