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https://github.com/embassy-rs/embassy.git
synced 2024-11-28 01:32:37 +00:00
feat: change SOF timer to input capture
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parent
36292ada62
commit
cc4b5ae9cb
@ -222,25 +222,24 @@ fn TIM2() {
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critical_section::with(|cs| {
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// Read timer counter.
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let ticks = TIMER.borrow(cs).borrow().as_ref().unwrap().regs_gp32().cnt().read();
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let timer = TIMER.borrow(cs).borrow().as_ref().unwrap().regs_gp32();
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let status = timer.sr().read();
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const CHANNEL_INDEX: usize = 0;
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if status.ccif(CHANNEL_INDEX) {
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let ticks = timer.ccr(CHANNEL_INDEX).read();
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*FRAME_COUNT += 1;
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if *FRAME_COUNT >= FEEDBACK_REFRESH_PERIOD.frame_count() {
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*FRAME_COUNT = 0;
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FEEDBACK_SIGNAL.signal(ticks.wrapping_sub(*LAST_TICKS));
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*LAST_TICKS = ticks;
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}
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};
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// Clear trigger interrupt flag.
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TIMER
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.borrow(cs)
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.borrow_mut()
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.as_mut()
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.unwrap()
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.regs_gp32()
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.sr()
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.modify(|r| r.set_tif(false));
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// Count up frames and emit a signal, when the refresh period is reached (here, every 8 ms).
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*FRAME_COUNT += 1;
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if *FRAME_COUNT >= FEEDBACK_REFRESH_PERIOD.frame_count() {
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*FRAME_COUNT = 0;
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FEEDBACK_SIGNAL.signal(ticks.wrapping_sub(*LAST_TICKS));
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*LAST_TICKS = ticks;
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}
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timer.sr().modify(|r| r.set_tif(false));
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});
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}
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@ -355,8 +354,21 @@ async fn main(spawner: Spawner) {
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let mut tim2 = timer::low_level::Timer::new(p.TIM2);
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tim2.set_tick_freq(Hertz(FEEDBACK_COUNTER_TICK_RATE));
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tim2.set_trigger_source(timer::low_level::TriggerSource::ITR1); // The USB SOF signal.
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tim2.set_slave_mode(timer::low_level::SlaveMode::TRIGGER_MODE);
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tim2.regs_gp16().dier().modify(|r| r.set_tie(true)); // Enable the trigger interrupt.
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const TIMER_CHANNEL: timer::Channel = timer::Channel::Ch1;
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tim2.set_input_ti_selection(TIMER_CHANNEL, timer::low_level::InputTISelection::TRC);
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tim2.set_input_capture_prescaler(TIMER_CHANNEL, 0);
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tim2.set_input_capture_filter(TIMER_CHANNEL, timer::low_level::FilterValue::FCK_INT_N2);
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// Reset all interrupt flags.
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tim2.regs_gp32().sr().write(|r| r.0 = 0);
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// Enable routing of SOF to the timer.
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tim2.regs_gp32().or().write(|r| *r = 0b10 << 10);
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tim2.enable_channel(TIMER_CHANNEL, true);
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tim2.enable_input_interrupt(TIMER_CHANNEL, true);
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tim2.start();
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TIMER.lock(|p| p.borrow_mut().replace(tim2));
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@ -94,6 +94,8 @@ async fn feedback_handler<'d, T: usb::Instance + 'd>(
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let value = value as u32;
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debug!("Feedback value: {}", value);
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packet.push(value as u8).unwrap();
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packet.push((value >> 8) as u8).unwrap();
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packet.push((value >> 16) as u8).unwrap();
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@ -215,25 +217,24 @@ fn TIM5() {
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critical_section::with(|cs| {
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// Read timer counter.
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let ticks = TIMER.borrow(cs).borrow().as_ref().unwrap().regs_gp32().cnt().read();
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let timer = TIMER.borrow(cs).borrow().as_ref().unwrap().regs_gp32();
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let status = timer.sr().read();
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const CHANNEL_INDEX: usize = 0;
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if status.ccif(CHANNEL_INDEX) {
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let ticks = timer.ccr(CHANNEL_INDEX).read();
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*FRAME_COUNT += 1;
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if *FRAME_COUNT >= FEEDBACK_REFRESH_PERIOD.frame_count() {
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*FRAME_COUNT = 0;
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FEEDBACK_SIGNAL.signal(ticks.wrapping_sub(*LAST_TICKS));
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*LAST_TICKS = ticks;
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}
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};
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// Clear trigger interrupt flag.
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TIMER
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.borrow(cs)
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.borrow_mut()
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.as_mut()
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.unwrap()
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.regs_gp32()
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.sr()
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.modify(|r| r.set_tif(false));
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// Count up frames and emit a signal, when the refresh period is reached (here, every 8 ms).
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*FRAME_COUNT += 1;
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if *FRAME_COUNT >= FEEDBACK_REFRESH_PERIOD.frame_count() {
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*FRAME_COUNT = 0;
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FEEDBACK_SIGNAL.signal(ticks.wrapping_sub(*LAST_TICKS));
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*LAST_TICKS = ticks;
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}
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timer.sr().modify(|r| r.set_tif(false));
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});
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}
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@ -347,8 +348,18 @@ async fn main(spawner: Spawner) {
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let mut tim5 = timer::low_level::Timer::new(p.TIM5);
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tim5.set_tick_freq(Hertz(FEEDBACK_COUNTER_TICK_RATE));
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tim5.set_trigger_source(timer::low_level::TriggerSource::ITR12); // The USB SOF signal.
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tim5.set_slave_mode(timer::low_level::SlaveMode::TRIGGER_MODE);
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tim5.regs_gp16().dier().modify(|r| r.set_tie(true)); // Enable the trigger interrupt.
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const TIMER_CHANNEL: timer::Channel = timer::Channel::Ch1;
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tim5.set_input_ti_selection(TIMER_CHANNEL, timer::low_level::InputTISelection::TRC);
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tim5.set_input_capture_prescaler(TIMER_CHANNEL, 0);
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tim5.set_input_capture_filter(TIMER_CHANNEL, timer::low_level::FilterValue::FCK_INT_N2);
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// Reset all interrupt flags.
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tim5.regs_gp32().sr().write(|r| r.0 = 0);
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tim5.enable_channel(TIMER_CHANNEL, true);
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tim5.enable_input_interrupt(TIMER_CHANNEL, true);
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tim5.start();
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TIMER.lock(|p| p.borrow_mut().replace(tim5));
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