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Merge pull request #2859 from bsodmike/add_trace_logging_for_uart
Add trace logging for USART
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commit
b7479e36e1
@ -1270,8 +1270,14 @@ fn configure(
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let (mul, brr_min, brr_max) = match kind {
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#[cfg(any(usart_v3, usart_v4))]
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Kind::Lpuart => (256, 0x300, 0x10_0000),
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Kind::Uart => (1, 0x10, 0x1_0000),
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Kind::Lpuart => {
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trace!("USART: Kind::Lpuart");
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(256, 0x300, 0x10_0000)
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}
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Kind::Uart => {
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trace!("USART: Kind::Uart");
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(1, 0x10, 0x1_0000)
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}
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};
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fn calculate_brr(baud: u32, pclk: u32, presc: u32, mul: u32) -> u32 {
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@ -1374,21 +1380,35 @@ fn configure(
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// configure word size
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// if using odd or even parity it must be configured to 9bits
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w.set_m0(if config.parity != Parity::ParityNone {
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trace!("USART: m0: vals::M0::BIT9");
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vals::M0::BIT9
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} else {
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trace!("USART: m0: vals::M0::BIT8");
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vals::M0::BIT8
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});
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// configure parity
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w.set_pce(config.parity != Parity::ParityNone);
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w.set_ps(match config.parity {
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Parity::ParityOdd => vals::Ps::ODD,
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Parity::ParityEven => vals::Ps::EVEN,
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_ => vals::Ps::EVEN,
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Parity::ParityOdd => {
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trace!("USART: set_ps: vals::Ps::ODD");
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vals::Ps::ODD
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}
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Parity::ParityEven => {
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trace!("USART: set_ps: vals::Ps::EVEN");
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vals::Ps::EVEN
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}
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_ => {
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trace!("USART: set_ps: vals::Ps::EVEN");
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vals::Ps::EVEN
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}
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});
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#[cfg(not(usart_v1))]
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w.set_over8(vals::Over8::from_bits(over8 as _));
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#[cfg(usart_v4)]
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w.set_fifoen(true);
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{
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trace!("USART: set_fifoen: true (usart_v4)");
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w.set_fifoen(true);
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}
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});
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Ok(())
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