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rustfmt
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1759027949
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@ -2,13 +2,13 @@
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use core::future::{poll_fn, Future};
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use core::pin::Pin;
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use core::sync::atomic::{fence, AtomicUsize, Ordering, AtomicBool};
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use core::sync::atomic::{fence, AtomicBool, AtomicUsize, Ordering};
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use core::task::{Context, Poll, Waker};
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use embassy_hal_internal::{into_ref, Peripheral, PeripheralRef};
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use embassy_sync::waitqueue::AtomicWaker;
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use super::ringbuffer::{DmaCtrl, ReadableDmaRingBuffer, self};
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use super::ringbuffer::{self, DmaCtrl, ReadableDmaRingBuffer};
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use super::word::{Word, WordSize};
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use super::{AnyChannel, Channel, Dir, Request, STATE};
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use crate::interrupt::typelevel::Interrupt;
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@ -113,7 +113,9 @@ impl AnyChannel {
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if circ {
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// wake the future for the half-transfer event
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if sr.htf() {
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ch.fcr().write(|w| { w.set_htf(true); });
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ch.fcr().write(|w| {
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w.set_htf(true);
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});
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state.waker.wake();
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return;
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}
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@ -381,7 +383,6 @@ impl<'a> Future for Transfer<'a> {
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}
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}
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/// Dma control interface for this DMA Type
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struct DmaCtrlImpl<'a> {
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channel: PeripheralRef<'a, AnyChannel>,
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@ -444,12 +445,12 @@ impl RingBuffer {
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Dir::MemoryToPeripheral => {
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w.set_uda(false);
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w.set_usa(true);
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},
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}
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Dir::PeripheralToMemory => {
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w.set_uda(true);
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w.set_usa(false);
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},
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}
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}
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// lower 16 bits of the memory address
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@ -600,7 +601,6 @@ impl<'a, W: Word> ReadableRingBuffer<'a, W> {
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RingBuffer::request_suspend(&info.dma.ch(info.num));
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}
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/// Request the transfer to stop. Use is_running() to see when the transfer is complete.
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pub fn request_stop(&mut self) {
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let info = self.channel.info();
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