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stm32/usart: disconnect pins of RingBufferedUartRx on drop
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parent
41711195e3
commit
ade27b7f21
@ -4,10 +4,12 @@ use core::sync::atomic::{compiler_fence, Ordering};
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use core::task::Poll;
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use embassy_embedded_hal::SetConfig;
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use embassy_hal_internal::PeripheralRef;
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use futures_util::future::{select, Either};
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use super::{clear_interrupt_flags, rdr, reconfigure, sr, Config, ConfigError, Error, Info, State, UartRx};
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use crate::dma::ReadableRingBuffer;
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use crate::gpio::{AnyPin, SealedPin as _};
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use crate::mode::Async;
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use crate::time::Hertz;
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use crate::usart::{Regs, Sr};
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@ -19,6 +21,8 @@ pub struct RingBufferedUartRx<'d> {
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info: &'static Info,
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state: &'static State,
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kernel_clock: Hertz,
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rx: Option<PeripheralRef<'d, AnyPin>>,
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rts: Option<PeripheralRef<'d, AnyPin>>,
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ring_buf: ReadableRingBuffer<'d, u8>,
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}
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@ -49,6 +53,8 @@ impl<'d> UartRx<'d, Async> {
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let state = self.state;
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let kernel_clock = self.kernel_clock;
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let ring_buf = unsafe { ReadableRingBuffer::new(rx_dma, request, rdr(info.regs), dma_buf, opts) };
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let rx = unsafe { self.rx.as_ref().map(|x| x.clone_unchecked()) };
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let rts = unsafe { self.rts.as_ref().map(|x| x.clone_unchecked()) };
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// Don't disable the clock
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mem::forget(self);
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@ -57,6 +63,8 @@ impl<'d> UartRx<'d, Async> {
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info,
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state,
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kernel_clock,
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rx,
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rts,
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ring_buf,
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}
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}
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@ -221,6 +229,8 @@ impl<'d> RingBufferedUartRx<'d> {
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impl Drop for RingBufferedUartRx<'_> {
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fn drop(&mut self) {
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self.teardown_uart();
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self.rx.as_ref().map(|x| x.set_as_disconnected());
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self.rts.as_ref().map(|x| x.set_as_disconnected());
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super::drop_tx_rx(self.info, self.state);
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}
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}
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