mirror of
https://github.com/embassy-rs/embassy.git
synced 2024-11-26 00:32:33 +00:00
Introduce "peripheral" abstraction to share state between main and interrupt.
This commit is contained in:
parent
4ce51795f2
commit
ace4f40f80
@ -20,8 +20,4 @@ rustflags = [
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]
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[build]
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# Pick ONE of these compilation targets
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# target = "thumbv6m-none-eabi" # Cortex-M0 and Cortex-M0+
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# target = "thumbv7m-none-eabi" # Cortex-M3
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# target = "thumbv7em-none-eabi" # Cortex-M4 and Cortex-M7 (no FPU)
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target = "thumbv7em-none-eabihf" # Cortex-M4F and Cortex-M7F (with FPU)
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target = "thumbv7em-none-eabi"
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@ -8,15 +8,17 @@ use example_common::*;
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use cortex_m_rt::entry;
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use defmt::panic;
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use futures::pin_mut;
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use nrf52840_hal::gpio;
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use embassy::executor::{task, Executor};
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use embassy::io::{AsyncBufRead, AsyncBufReadExt, AsyncWrite, AsyncWriteExt};
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use embassy::io::{AsyncBufReadExt, AsyncWriteExt};
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use embassy::util::Forever;
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use embassy_nrf::buffered_uarte;
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use embassy_nrf::interrupt;
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static mut TX_BUFFER: [u8; 4096] = [0; 4096];
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static mut RX_BUFFER: [u8; 4096] = [0; 4096];
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#[task]
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async fn run() {
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let p = unwrap!(embassy_nrf::pac::Peripherals::take());
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@ -34,14 +36,15 @@ async fn run() {
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};
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let irq = interrupt::take!(UARTE0_UART0);
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let u = buffered_uarte::BufferedUarte::new(
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let mut u = buffered_uarte::BufferedUarte::new(
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p.UARTE0,
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irq,
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unsafe { &mut RX_BUFFER },
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unsafe { &mut TX_BUFFER },
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pins,
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buffered_uarte::Parity::EXCLUDED,
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buffered_uarte::Baudrate::BAUD115200,
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);
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pin_mut!(u);
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info!("uarte initialized!");
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@ -4,107 +4,29 @@
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//!
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//! - nrf52832: Section 35
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//! - nrf52840: Section 6.34
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use core::cell::UnsafeCell;
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use core::cmp::min;
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use core::marker::PhantomPinned;
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use core::marker::PhantomData;
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use core::mem;
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use core::ops::Deref;
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use core::pin::Pin;
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use core::ptr;
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use core::sync::atomic::{compiler_fence, Ordering};
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use core::task::{Context, Poll};
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use embassy::io::{AsyncBufRead, AsyncWrite, Result};
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use embassy::util::WakerRegistration;
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use embedded_hal::digital::v2::OutputPin;
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use crate::fmt::{assert, panic, todo, *};
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use crate::fmt::{panic, todo, *};
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use crate::hal::gpio::Port as GpioPort;
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use crate::interrupt::{self, CriticalSection, OwnedInterrupt};
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use crate::interrupt::{self, OwnedInterrupt};
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use crate::pac;
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use crate::pac::uarte0;
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use crate::util::peripheral;
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use crate::util::ring_buffer::RingBuffer;
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// Re-export SVD variants to allow user to directly set values
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pub use crate::hal::uarte::Pins;
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pub use uarte0::{baudrate::BAUDRATE_A as Baudrate, config::PARITY_A as Parity};
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const RINGBUF_SIZE: usize = 512;
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struct RingBuf {
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buf: [u8; RINGBUF_SIZE],
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start: usize,
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end: usize,
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empty: bool,
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}
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impl RingBuf {
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fn new() -> Self {
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RingBuf {
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buf: [0; RINGBUF_SIZE],
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start: 0,
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end: 0,
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empty: true,
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}
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}
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fn push_buf(&mut self) -> &mut [u8] {
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if self.start == self.end && !self.empty {
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trace!(" ringbuf: push_buf empty");
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return &mut self.buf[..0];
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}
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let n = if self.start <= self.end {
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RINGBUF_SIZE - self.end
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} else {
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self.start - self.end
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};
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trace!(" ringbuf: push_buf {:?}..{:?}", self.end, self.end + n);
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&mut self.buf[self.end..self.end + n]
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}
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fn push(&mut self, n: usize) {
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trace!(" ringbuf: push {:?}", n);
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if n == 0 {
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return;
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}
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self.end = Self::wrap(self.end + n);
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self.empty = false;
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}
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fn pop_buf(&mut self) -> &mut [u8] {
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if self.empty {
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trace!(" ringbuf: pop_buf empty");
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return &mut self.buf[..0];
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}
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let n = if self.end <= self.start {
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RINGBUF_SIZE - self.start
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} else {
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self.end - self.start
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};
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trace!(" ringbuf: pop_buf {:?}..{:?}", self.start, self.start + n);
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&mut self.buf[self.start..self.start + n]
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}
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fn pop(&mut self, n: usize) {
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trace!(" ringbuf: pop {:?}", n);
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if n == 0 {
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return;
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}
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self.start = Self::wrap(self.start + n);
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self.empty = self.start == self.end;
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}
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fn wrap(n: usize) -> usize {
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assert!(n <= RINGBUF_SIZE);
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if n == RINGBUF_SIZE {
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0
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} else {
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n
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}
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}
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}
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#[derive(Copy, Clone, Debug, PartialEq)]
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enum RxState {
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Idle,
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@ -126,28 +48,12 @@ enum TxState {
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/// are disabled before using `Uarte`. See product specification:
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/// - nrf52832: Section 15.2
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/// - nrf52840: Section 6.1.2
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pub struct BufferedUarte<T: Instance> {
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started: bool,
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state: UnsafeCell<UarteState<T>>,
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pub struct BufferedUarte<'a, T: Instance> {
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reg: peripheral::Registration<State<'a, T>>,
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wtf: PhantomData<&'a ()>,
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}
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// public because it needs to be used in Instance::{get_state, set_state}, but
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// should not be used outside the module
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#[doc(hidden)]
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pub struct UarteState<T: Instance> {
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inner: T,
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irq: T::Interrupt,
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rx: RingBuf,
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rx_state: RxState,
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rx_waker: WakerRegistration,
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tx: RingBuf,
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tx_state: TxState,
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tx_waker: WakerRegistration,
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_pin: PhantomPinned,
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}
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impl<'a, T: Instance> Unpin for BufferedUarte<'a, T> {}
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#[cfg(any(feature = "52833", feature = "52840"))]
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fn port_bit(port: GpioPort) -> bool {
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@ -157,10 +63,12 @@ fn port_bit(port: GpioPort) -> bool {
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}
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}
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impl<T: Instance> BufferedUarte<T> {
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impl<'a, T: Instance> BufferedUarte<'a, T> {
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pub fn new(
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uarte: T,
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irq: T::Interrupt,
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rx_buffer: &'a mut [u8],
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tx_buffer: &'a mut [u8],
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mut pins: Pins,
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parity: Parity,
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baudrate: Baudrate,
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@ -218,87 +126,79 @@ impl<T: Instance> BufferedUarte<T> {
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// Configure frequency
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uarte.baudrate.write(|w| w.baudrate().variant(baudrate));
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irq.pend();
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BufferedUarte {
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started: false,
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state: UnsafeCell::new(UarteState {
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inner: uarte,
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reg: peripheral::Registration::new(
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irq,
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State {
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inner: uarte,
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rx: RingBuf::new(),
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rx_state: RxState::Idle,
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rx_waker: WakerRegistration::new(),
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rx: RingBuffer::new(rx_buffer),
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rx_state: RxState::Idle,
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rx_waker: WakerRegistration::new(),
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tx: RingBuf::new(),
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tx_state: TxState::Idle,
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tx_waker: WakerRegistration::new(),
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_pin: PhantomPinned,
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}),
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tx: RingBuffer::new(tx_buffer),
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tx_state: TxState::Idle,
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tx_waker: WakerRegistration::new(),
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},
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),
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wtf: PhantomData,
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}
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}
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fn with_state<'a, R>(
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self: Pin<&'a mut Self>,
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f: impl FnOnce(Pin<&'a mut UarteState<T>>) -> R,
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) -> R {
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let Self { state, started } = unsafe { self.get_unchecked_mut() };
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interrupt::free(|cs| {
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let ptr = state.get();
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if !*started {
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T::set_state(cs, ptr);
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*started = true;
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// safety: safe because critical section ensures only one *mut UartState
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// exists at the same time.
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unsafe { Pin::new_unchecked(&mut *ptr) }.start();
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}
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// safety: safe because critical section ensures only one *mut UartState
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// exists at the same time.
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f(unsafe { Pin::new_unchecked(&mut *ptr) })
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})
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}
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}
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impl<T: Instance> Drop for BufferedUarte<T> {
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impl<'a, T: Instance> Drop for BufferedUarte<'a, T> {
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fn drop(&mut self) {
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// stop DMA before dropping, because DMA is using the buffer in `self`.
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todo!()
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}
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}
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impl<T: Instance> AsyncBufRead for BufferedUarte<T> {
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impl<'a, T: Instance> AsyncBufRead for BufferedUarte<'a, T> {
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fn poll_fill_buf(self: Pin<&mut Self>, cx: &mut Context<'_>) -> Poll<Result<&[u8]>> {
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self.with_state(|s| s.poll_fill_buf(cx))
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let this = unsafe { self.get_unchecked_mut() };
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this.reg.with(|state, _| {
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let z: Poll<Result<&[u8]>> = state.poll_fill_buf(cx);
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let z: Poll<Result<&[u8]>> = unsafe { mem::transmute(z) };
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z
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})
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}
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fn consume(self: Pin<&mut Self>, amt: usize) {
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self.with_state(|s| s.consume(amt))
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}
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}
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impl<T: Instance> AsyncWrite for BufferedUarte<T> {
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fn poll_write(self: Pin<&mut Self>, cx: &mut Context<'_>, buf: &[u8]) -> Poll<Result<usize>> {
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self.with_state(|s| s.poll_write(cx, buf))
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}
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}
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impl<T: Instance> UarteState<T> {
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pub fn start(self: Pin<&mut Self>) {
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self.irq.set_handler(|| unsafe {
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interrupt::free(|cs| T::get_state(cs).as_mut().unwrap().on_interrupt());
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});
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self.irq.pend();
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self.irq.enable();
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}
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fn poll_fill_buf(self: Pin<&mut Self>, cx: &mut Context<'_>) -> Poll<Result<&[u8]>> {
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let this = unsafe { self.get_unchecked_mut() };
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this.reg.with(|state, irq| state.consume(irq, amt))
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}
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}
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impl<'a, T: Instance> AsyncWrite for BufferedUarte<'a, T> {
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fn poll_write(self: Pin<&mut Self>, cx: &mut Context<'_>, buf: &[u8]) -> Poll<Result<usize>> {
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let this = unsafe { self.get_unchecked_mut() };
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this.reg.with(|state, irq| state.poll_write(irq, cx, buf))
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}
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}
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// ====================================
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// ====================================
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// ====================================
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// public because it needs to be used in Instance trait, but
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// should not be used outside the module
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#[doc(hidden)]
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pub struct State<'a, T: Instance> {
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inner: T,
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rx: RingBuffer<'a>,
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rx_state: RxState,
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rx_waker: WakerRegistration,
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tx: RingBuffer<'a>,
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tx_state: TxState,
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tx_waker: WakerRegistration,
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}
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impl<'a, T: Instance> State<'a, T> {
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fn poll_fill_buf(&mut self, cx: &mut Context<'_>) -> Poll<Result<&[u8]>> {
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// Conservative compiler fence to prevent optimizations that do not
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// take in to account actions by DMA. The fence has been placed here,
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// before any DMA action has started
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@ -306,7 +206,7 @@ impl<T: Instance> UarteState<T> {
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trace!("poll_read");
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// We have data ready in buffer? Return it.
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let buf = this.rx.pop_buf();
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let buf = self.rx.pop_buf();
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if buf.len() != 0 {
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trace!(" got {:?} {:?}", buf.as_ptr() as u32, buf.len());
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return Poll::Ready(Ok(buf));
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@ -314,38 +214,40 @@ impl<T: Instance> UarteState<T> {
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trace!(" empty");
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if this.rx_state == RxState::ReceivingReady {
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if self.rx_state == RxState::ReceivingReady {
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trace!(" stopping");
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this.rx_state = RxState::Stopping;
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this.inner.tasks_stoprx.write(|w| unsafe { w.bits(1) });
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self.rx_state = RxState::Stopping;
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self.inner.tasks_stoprx.write(|w| unsafe { w.bits(1) });
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}
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this.rx_waker.register(cx.waker());
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self.rx_waker.register(cx.waker());
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Poll::Pending
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}
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fn consume(self: Pin<&mut Self>, amt: usize) {
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let this = unsafe { self.get_unchecked_mut() };
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fn consume(&mut self, irq: &mut T::Interrupt, amt: usize) {
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trace!("consume {:?}", amt);
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this.rx.pop(amt);
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this.irq.pend();
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self.rx.pop(amt);
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irq.pend();
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}
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fn poll_write(self: Pin<&mut Self>, cx: &mut Context<'_>, buf: &[u8]) -> Poll<Result<usize>> {
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let this = unsafe { self.get_unchecked_mut() };
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fn poll_write(
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&mut self,
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irq: &mut T::Interrupt,
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cx: &mut Context<'_>,
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buf: &[u8],
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) -> Poll<Result<usize>> {
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trace!("poll_write: {:?}", buf.len());
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let tx_buf = this.tx.push_buf();
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let tx_buf = self.tx.push_buf();
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if tx_buf.len() == 0 {
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trace!("poll_write: pending");
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this.tx_waker.register(cx.waker());
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self.tx_waker.register(cx.waker());
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return Poll::Pending;
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}
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let n = min(tx_buf.len(), buf.len());
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tx_buf[..n].copy_from_slice(&buf[..n]);
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this.tx.push(n);
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self.tx.push(n);
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trace!("poll_write: queued {:?}", n);
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@ -354,10 +256,17 @@ impl<T: Instance> UarteState<T> {
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// before any DMA action has started
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compiler_fence(Ordering::SeqCst);
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this.irq.pend();
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irq.pend();
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Poll::Ready(Ok(n))
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}
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}
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impl<'a, T: Instance> peripheral::State for State<'a, T> {
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type Interrupt = T::Interrupt;
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fn store<'b>() -> &'b peripheral::Store<Self> {
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unsafe { mem::transmute(T::storage()) }
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}
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fn on_interrupt(&mut self) {
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trace!("irq: start");
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@ -505,39 +414,27 @@ mod private {
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impl Sealed for crate::pac::UARTE1 {}
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}
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pub trait Instance: Deref<Target = uarte0::RegisterBlock> + Sized + private::Sealed {
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pub trait Instance:
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Deref<Target = uarte0::RegisterBlock> + Sized + private::Sealed + 'static
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{
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type Interrupt: OwnedInterrupt;
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#[doc(hidden)]
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fn get_state(_cs: &CriticalSection) -> *mut UarteState<Self>;
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#[doc(hidden)]
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fn set_state(_cs: &CriticalSection, state: *mut UarteState<Self>);
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fn storage() -> &'static peripheral::Store<State<'static, Self>>;
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}
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static mut UARTE0_STATE: *mut UarteState<crate::pac::UARTE0> = ptr::null_mut();
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#[cfg(any(feature = "52833", feature = "52840", feature = "9160"))]
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static mut UARTE1_STATE: *mut UarteState<crate::pac::UARTE1> = ptr::null_mut();
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impl Instance for crate::pac::UARTE0 {
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impl Instance for pac::UARTE0 {
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type Interrupt = interrupt::UARTE0_UART0Interrupt;
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fn get_state(_cs: &CriticalSection) -> *mut UarteState<Self> {
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unsafe { UARTE0_STATE } // Safe because of CriticalSection
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}
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fn set_state(_cs: &CriticalSection, state: *mut UarteState<Self>) {
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unsafe { UARTE0_STATE = state } // Safe because of CriticalSection
|
||||
fn storage() -> &'static peripheral::Store<State<'static, Self>> {
|
||||
static STORAGE: peripheral::Store<State<'static, crate::pac::UARTE0>> =
|
||||
peripheral::Store::uninit();
|
||||
&STORAGE
|
||||
}
|
||||
}
|
||||
|
||||
#[cfg(any(feature = "52833", feature = "52840", feature = "9160"))]
|
||||
impl Instance for crate::pac::UARTE1 {
|
||||
impl Instance for pac::UARTE1 {
|
||||
type Interrupt = interrupt::UARTE1Interrupt;
|
||||
|
||||
fn get_state(_cs: &CriticalSection) -> *mut UarteState<Self> {
|
||||
unsafe { UARTE1_STATE } // Safe because of CriticalSection
|
||||
}
|
||||
fn set_state(_cs: &CriticalSection, state: *mut UarteState<Self>) {
|
||||
unsafe { UARTE1_STATE = state } // Safe because of CriticalSection
|
||||
fn storage() -> &'static peripheral::Store<State<'static, Self>> {
|
||||
static STORAGE: peripheral::Store<State<'static, crate::pac::UARTE1>> =
|
||||
peripheral::Store::uninit();
|
||||
&STORAGE
|
||||
}
|
||||
}
|
||||
|
@ -50,6 +50,7 @@ pub use nrf52840_hal as hal;
|
||||
|
||||
// This mod MUST go first, so that the others see its macros.
|
||||
pub(crate) mod fmt;
|
||||
pub(crate) mod util;
|
||||
|
||||
pub mod buffered_uarte;
|
||||
pub mod gpiote;
|
||||
|
2
embassy-nrf/src/util/mod.rs
Normal file
2
embassy-nrf/src/util/mod.rs
Normal file
@ -0,0 +1,2 @@
|
||||
pub mod peripheral;
|
||||
pub mod ring_buffer;
|
107
embassy-nrf/src/util/peripheral.rs
Normal file
107
embassy-nrf/src/util/peripheral.rs
Normal file
@ -0,0 +1,107 @@
|
||||
use core::mem;
|
||||
use core::mem::MaybeUninit;
|
||||
use core::ptr;
|
||||
use core::sync::atomic::{compiler_fence, Ordering};
|
||||
use core::{cell::UnsafeCell, marker::PhantomData};
|
||||
|
||||
use crate::interrupt::OwnedInterrupt;
|
||||
|
||||
pub struct Store<T>(MaybeUninit<UnsafeCell<T>>);
|
||||
impl<T> Store<T> {
|
||||
pub const fn uninit() -> Self {
|
||||
Self(MaybeUninit::uninit())
|
||||
}
|
||||
|
||||
unsafe fn as_mut_ptr(&self) -> *mut T {
|
||||
(*self.0.as_ptr()).get()
|
||||
}
|
||||
|
||||
unsafe fn as_mut(&self) -> &mut T {
|
||||
&mut *self.as_mut_ptr()
|
||||
}
|
||||
|
||||
unsafe fn write(&self, val: T) {
|
||||
ptr::write(self.as_mut_ptr(), val)
|
||||
}
|
||||
|
||||
unsafe fn drop_in_place(&self) {
|
||||
ptr::drop_in_place(self.as_mut_ptr())
|
||||
}
|
||||
|
||||
unsafe fn read(&self) -> T {
|
||||
ptr::read(self.as_mut_ptr())
|
||||
}
|
||||
}
|
||||
unsafe impl<T> Send for Store<T> {}
|
||||
unsafe impl<T> Sync for Store<T> {}
|
||||
|
||||
pub trait State: Sized {
|
||||
type Interrupt: OwnedInterrupt;
|
||||
fn on_interrupt(&mut self);
|
||||
#[doc(hidden)]
|
||||
fn store<'a>() -> &'a Store<Self>;
|
||||
}
|
||||
|
||||
pub struct Registration<P: State> {
|
||||
irq: P::Interrupt,
|
||||
not_send: PhantomData<*mut P>,
|
||||
}
|
||||
|
||||
impl<P: State> Registration<P> {
|
||||
pub fn new(irq: P::Interrupt, state: P) -> Self {
|
||||
// safety:
|
||||
// - No other PeripheralRegistration can already exist because we have the owned interrupt
|
||||
// - therefore, storage is uninitialized
|
||||
// - therefore it's safe to overwrite it without dropping the previous contents
|
||||
unsafe { P::store().write(state) }
|
||||
|
||||
irq.set_handler(|| {
|
||||
// safety:
|
||||
// - If a PeripheralRegistration instance exists, P::storage() is initialized.
|
||||
// - It's OK to get a &mut to it since the irq is disabled.
|
||||
unsafe { P::store().as_mut() }.on_interrupt();
|
||||
});
|
||||
|
||||
compiler_fence(Ordering::SeqCst);
|
||||
irq.enable();
|
||||
|
||||
Self {
|
||||
irq,
|
||||
not_send: PhantomData,
|
||||
}
|
||||
}
|
||||
|
||||
pub fn with<R>(&mut self, f: impl FnOnce(&mut P, &mut P::Interrupt) -> R) -> R {
|
||||
self.irq.disable();
|
||||
compiler_fence(Ordering::SeqCst);
|
||||
|
||||
// safety:
|
||||
// - If a PeripheralRegistration instance exists, P::storage() is initialized.
|
||||
// - It's OK to get a &mut to it since the irq is disabled.
|
||||
let r = f(unsafe { P::store().as_mut() }, &mut self.irq);
|
||||
|
||||
compiler_fence(Ordering::SeqCst);
|
||||
self.irq.enable();
|
||||
|
||||
r
|
||||
}
|
||||
|
||||
pub fn free(self) -> (P::Interrupt, P) {
|
||||
let irq = unsafe { ptr::read(&self.irq) };
|
||||
irq.disable();
|
||||
irq.set_handler(|| ());
|
||||
mem::forget(self);
|
||||
let storage = P::store();
|
||||
(irq, unsafe { storage.read() })
|
||||
}
|
||||
}
|
||||
|
||||
impl<P: State> Drop for Registration<P> {
|
||||
fn drop(&mut self) {
|
||||
self.irq.disable();
|
||||
self.irq.set_handler(|| ());
|
||||
|
||||
let storage = P::store();
|
||||
unsafe { storage.drop_in_place() };
|
||||
}
|
||||
}
|
80
embassy-nrf/src/util/ring_buffer.rs
Normal file
80
embassy-nrf/src/util/ring_buffer.rs
Normal file
@ -0,0 +1,80 @@
|
||||
use crate::fmt::{assert, panic, todo, *};
|
||||
|
||||
pub struct RingBuffer<'a> {
|
||||
buf: &'a mut [u8],
|
||||
start: usize,
|
||||
end: usize,
|
||||
empty: bool,
|
||||
}
|
||||
|
||||
impl<'a> RingBuffer<'a> {
|
||||
pub fn new(buf: &'a mut [u8]) -> Self {
|
||||
Self {
|
||||
buf,
|
||||
start: 0,
|
||||
end: 0,
|
||||
empty: true,
|
||||
}
|
||||
}
|
||||
|
||||
pub fn push_buf(&mut self) -> &mut [u8] {
|
||||
if self.start == self.end && !self.empty {
|
||||
trace!(" ringbuf: push_buf empty");
|
||||
return &mut self.buf[..0];
|
||||
}
|
||||
|
||||
let n = if self.start <= self.end {
|
||||
self.buf.len() - self.end
|
||||
} else {
|
||||
self.start - self.end
|
||||
};
|
||||
|
||||
trace!(" ringbuf: push_buf {:?}..{:?}", self.end, self.end + n);
|
||||
&mut self.buf[self.end..self.end + n]
|
||||
}
|
||||
|
||||
pub fn push(&mut self, n: usize) {
|
||||
trace!(" ringbuf: push {:?}", n);
|
||||
if n == 0 {
|
||||
return;
|
||||
}
|
||||
|
||||
self.end = self.wrap(self.end + n);
|
||||
self.empty = false;
|
||||
}
|
||||
|
||||
pub fn pop_buf(&mut self) -> &mut [u8] {
|
||||
if self.empty {
|
||||
trace!(" ringbuf: pop_buf empty");
|
||||
return &mut self.buf[..0];
|
||||
}
|
||||
|
||||
let n = if self.end <= self.start {
|
||||
self.buf.len() - self.start
|
||||
} else {
|
||||
self.end - self.start
|
||||
};
|
||||
|
||||
trace!(" ringbuf: pop_buf {:?}..{:?}", self.start, self.start + n);
|
||||
&mut self.buf[self.start..self.start + n]
|
||||
}
|
||||
|
||||
pub fn pop(&mut self, n: usize) {
|
||||
trace!(" ringbuf: pop {:?}", n);
|
||||
if n == 0 {
|
||||
return;
|
||||
}
|
||||
|
||||
self.start = self.wrap(self.start + n);
|
||||
self.empty = self.start == self.end;
|
||||
}
|
||||
|
||||
fn wrap(&self, n: usize) -> usize {
|
||||
assert!(n <= self.buf.len());
|
||||
if n == self.buf.len() {
|
||||
0
|
||||
} else {
|
||||
n
|
||||
}
|
||||
}
|
||||
}
|
Loading…
Reference in New Issue
Block a user