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i2c-v2: Implement write_vectored
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parent
f2e78e9c34
commit
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@ -14,6 +14,7 @@ pub enum Error {
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Timeout,
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Crc,
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Overrun,
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ZeroLengthTransfer,
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}
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pub(crate) mod sealed {
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@ -325,6 +325,66 @@ impl<'d, T: Instance> I2c<'d, T> {
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}
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Ok(())
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}
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pub fn write_vectored(&mut self, address: u8, bytes: &[&[u8]]) -> Result<(), Error> {
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if bytes.is_empty() {
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return Err(Error::ZeroLengthTransfer);
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}
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let first_length = bytes[0].len();
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let last_slice_index = bytes.len() - 1;
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self.master_write(
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address,
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first_length.min(255),
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Stop::Software,
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(first_length > 255) || (last_slice_index != 0),
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);
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for (idx, slice) in bytes.iter().enumerate() {
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let slice_len = slice.len();
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let completed_chunks = slice_len / 255;
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let total_chunks = if completed_chunks * 255 == slice_len {
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completed_chunks
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} else {
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completed_chunks + 1
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};
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let last_chunk_idx = total_chunks.saturating_sub(1);
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if idx != 0 {
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self.master_continue(
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slice_len.min(255),
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(idx != last_slice_index) || (slice_len > 255),
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);
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}
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for (number, chunk) in slice.chunks(255).enumerate() {
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if number != 0 {
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self.master_continue(
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chunk.len(),
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(number != last_chunk_idx) || (idx != last_slice_index),
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);
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}
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for byte in chunk {
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// Wait until we are allowed to send data
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// (START has been ACKed or last byte when
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// through)
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self.wait_txe()?;
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// Put byte on the wire
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//self.i2c.txdr.write(|w| w.txdata().bits(*byte));
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unsafe {
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T::regs().txdr().write(|w| w.set_txdata(*byte));
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}
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}
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}
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}
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// Wait until the write finishes
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self.wait_tc()?;
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self.master_stop();
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Ok(())
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}
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}
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impl<'d, T: Instance> Read for I2c<'d, T> {
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