rp: remove mod sealed.

This commit is contained in:
Dario Nieuwenhuis 2024-04-05 00:35:25 +02:00
parent ab85eb4b60
commit a84b33995e
13 changed files with 189 additions and 216 deletions

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@ -8,8 +8,7 @@ use core::task::Poll;
use embassy_hal_internal::{into_ref, PeripheralRef}; use embassy_hal_internal::{into_ref, PeripheralRef};
use embassy_sync::waitqueue::AtomicWaker; use embassy_sync::waitqueue::AtomicWaker;
use crate::gpio::sealed::Pin as GpioPin; use crate::gpio::{self, AnyPin, Pull, SealedPin as GpioPin};
use crate::gpio::{self, AnyPin, Pull};
use crate::interrupt::typelevel::Binding; use crate::interrupt::typelevel::Binding;
use crate::interrupt::InterruptExt; use crate::interrupt::InterruptExt;
use crate::peripherals::{ADC, ADC_TEMP_SENSOR}; use crate::peripherals::{ADC, ADC_TEMP_SENSOR};
@ -334,29 +333,28 @@ impl interrupt::typelevel::Handler<interrupt::typelevel::ADC_IRQ_FIFO> for Inter
} }
} }
mod sealed { trait SealedAdcSample: crate::dma::Word {}
pub trait AdcSample: crate::dma::Word {} trait SealedAdcChannel {}
pub trait AdcChannel {}
}
/// ADC sample. /// ADC sample.
pub trait AdcSample: sealed::AdcSample {} #[allow(private_bounds)]
pub trait AdcSample: SealedAdcSample {}
impl sealed::AdcSample for u16 {} impl SealedAdcSample for u16 {}
impl AdcSample for u16 {} impl AdcSample for u16 {}
impl sealed::AdcSample for u8 {} impl SealedAdcSample for u8 {}
impl AdcSample for u8 {} impl AdcSample for u8 {}
/// ADC channel. /// ADC channel.
pub trait AdcChannel: sealed::AdcChannel {} #[allow(private_bounds)]
pub trait AdcChannel: SealedAdcChannel {}
/// ADC pin. /// ADC pin.
pub trait AdcPin: AdcChannel + gpio::Pin {} pub trait AdcPin: AdcChannel + gpio::Pin {}
macro_rules! impl_pin { macro_rules! impl_pin {
($pin:ident, $channel:expr) => { ($pin:ident, $channel:expr) => {
impl sealed::AdcChannel for peripherals::$pin {} impl SealedAdcChannel for peripherals::$pin {}
impl AdcChannel for peripherals::$pin {} impl AdcChannel for peripherals::$pin {}
impl AdcPin for peripherals::$pin {} impl AdcPin for peripherals::$pin {}
}; };
@ -367,5 +365,5 @@ impl_pin!(PIN_27, 1);
impl_pin!(PIN_28, 2); impl_pin!(PIN_28, 2);
impl_pin!(PIN_29, 3); impl_pin!(PIN_29, 3);
impl sealed::AdcChannel for peripherals::ADC_TEMP_SENSOR {} impl SealedAdcChannel for peripherals::ADC_TEMP_SENSOR {}
impl AdcChannel for peripherals::ADC_TEMP_SENSOR {} impl AdcChannel for peripherals::ADC_TEMP_SENSOR {}

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@ -6,8 +6,7 @@ use core::sync::atomic::{AtomicU16, AtomicU32, Ordering};
use embassy_hal_internal::{into_ref, PeripheralRef}; use embassy_hal_internal::{into_ref, PeripheralRef};
use pac::clocks::vals::*; use pac::clocks::vals::*;
use crate::gpio::sealed::Pin; use crate::gpio::{AnyPin, SealedPin};
use crate::gpio::AnyPin;
use crate::pac::common::{Reg, RW}; use crate::pac::common::{Reg, RW};
use crate::{pac, reset, Peripheral}; use crate::{pac, reset, Peripheral};
@ -788,14 +787,14 @@ impl_gpinpin!(PIN_20, 20, 0);
impl_gpinpin!(PIN_22, 22, 1); impl_gpinpin!(PIN_22, 22, 1);
/// General purpose clock input driver. /// General purpose clock input driver.
pub struct Gpin<'d, T: Pin> { pub struct Gpin<'d, T: GpinPin> {
gpin: PeripheralRef<'d, AnyPin>, gpin: PeripheralRef<'d, AnyPin>,
_phantom: PhantomData<T>, _phantom: PhantomData<T>,
} }
impl<'d, T: Pin> Gpin<'d, T> { impl<'d, T: GpinPin> Gpin<'d, T> {
/// Create new gpin driver. /// Create new gpin driver.
pub fn new<P: GpinPin>(gpin: impl Peripheral<P = P> + 'd) -> Gpin<'d, P> { pub fn new(gpin: impl Peripheral<P = T> + 'd) -> Self {
into_ref!(gpin); into_ref!(gpin);
gpin.gpio().ctrl().write(|w| w.set_funcsel(0x08)); gpin.gpio().ctrl().write(|w| w.set_funcsel(0x08));
@ -811,7 +810,7 @@ impl<'d, T: Pin> Gpin<'d, T> {
// } // }
} }
impl<'d, T: Pin> Drop for Gpin<'d, T> { impl<'d, T: GpinPin> Drop for Gpin<'d, T> {
fn drop(&mut self) { fn drop(&mut self) {
self.gpin self.gpin
.gpio() .gpio()

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@ -208,14 +208,12 @@ pub(crate) const CHANNEL_COUNT: usize = 12;
const NEW_AW: AtomicWaker = AtomicWaker::new(); const NEW_AW: AtomicWaker = AtomicWaker::new();
static CHANNEL_WAKERS: [AtomicWaker; CHANNEL_COUNT] = [NEW_AW; CHANNEL_COUNT]; static CHANNEL_WAKERS: [AtomicWaker; CHANNEL_COUNT] = [NEW_AW; CHANNEL_COUNT];
mod sealed { trait SealedChannel {}
pub trait Channel {} trait SealedWord {}
pub trait Word {}
}
/// DMA channel interface. /// DMA channel interface.
pub trait Channel: Peripheral<P = Self> + sealed::Channel + Into<AnyChannel> + Sized + 'static { #[allow(private_bounds)]
pub trait Channel: Peripheral<P = Self> + SealedChannel + Into<AnyChannel> + Sized + 'static {
/// Channel number. /// Channel number.
fn number(&self) -> u8; fn number(&self) -> u8;
@ -231,26 +229,27 @@ pub trait Channel: Peripheral<P = Self> + sealed::Channel + Into<AnyChannel> + S
} }
/// DMA word. /// DMA word.
pub trait Word: sealed::Word { #[allow(private_bounds)]
pub trait Word: SealedWord {
/// Word size. /// Word size.
fn size() -> vals::DataSize; fn size() -> vals::DataSize;
} }
impl sealed::Word for u8 {} impl SealedWord for u8 {}
impl Word for u8 { impl Word for u8 {
fn size() -> vals::DataSize { fn size() -> vals::DataSize {
vals::DataSize::SIZE_BYTE vals::DataSize::SIZE_BYTE
} }
} }
impl sealed::Word for u16 {} impl SealedWord for u16 {}
impl Word for u16 { impl Word for u16 {
fn size() -> vals::DataSize { fn size() -> vals::DataSize {
vals::DataSize::SIZE_HALFWORD vals::DataSize::SIZE_HALFWORD
} }
} }
impl sealed::Word for u32 {} impl SealedWord for u32 {}
impl Word for u32 { impl Word for u32 {
fn size() -> vals::DataSize { fn size() -> vals::DataSize {
vals::DataSize::SIZE_WORD vals::DataSize::SIZE_WORD
@ -264,7 +263,7 @@ pub struct AnyChannel {
impl_peripheral!(AnyChannel); impl_peripheral!(AnyChannel);
impl sealed::Channel for AnyChannel {} impl SealedChannel for AnyChannel {}
impl Channel for AnyChannel { impl Channel for AnyChannel {
fn number(&self) -> u8 { fn number(&self) -> u8 {
self.number self.number
@ -273,7 +272,7 @@ impl Channel for AnyChannel {
macro_rules! channel { macro_rules! channel {
($name:ident, $num:expr) => { ($name:ident, $num:expr) => {
impl sealed::Channel for peripherals::$name {} impl SealedChannel for peripherals::$name {}
impl Channel for peripherals::$name { impl Channel for peripherals::$name {
fn number(&self) -> u8 { fn number(&self) -> u8 {
$num $num

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@ -903,22 +903,22 @@ pub(crate) unsafe fn in_ram(operation: impl FnOnce()) -> Result<(), Error> {
Ok(()) Ok(())
} }
mod sealed { trait SealedInstance {}
pub trait Instance {} trait SealedMode {}
pub trait Mode {}
}
/// Flash instance. /// Flash instance.
pub trait Instance: sealed::Instance {} #[allow(private_bounds)]
pub trait Instance: SealedInstance {}
/// Flash mode. /// Flash mode.
pub trait Mode: sealed::Mode {} #[allow(private_bounds)]
pub trait Mode: SealedMode {}
impl sealed::Instance for FLASH {} impl SealedInstance for FLASH {}
impl Instance for FLASH {} impl Instance for FLASH {}
macro_rules! impl_mode { macro_rules! impl_mode {
($name:ident) => { ($name:ident) => {
impl sealed::Mode for $name {} impl SealedMode for $name {}
impl Mode for $name {} impl Mode for $name {}
}; };
} }

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@ -8,7 +8,6 @@ use core::task::{Context, Poll};
use embassy_hal_internal::{impl_peripheral, into_ref, PeripheralRef}; use embassy_hal_internal::{impl_peripheral, into_ref, PeripheralRef};
use embassy_sync::waitqueue::AtomicWaker; use embassy_sync::waitqueue::AtomicWaker;
use self::sealed::Pin as _;
use crate::interrupt::InterruptExt; use crate::interrupt::InterruptExt;
use crate::pac::common::{Reg, RW}; use crate::pac::common::{Reg, RW};
use crate::pac::SIO; use crate::pac::SIO;
@ -802,68 +801,65 @@ impl<'w> Drop for DormantWake<'w> {
} }
} }
pub(crate) mod sealed { pub(crate) trait SealedPin: Sized {
use super::*; fn pin_bank(&self) -> u8;
pub trait Pin: Sized { #[inline]
fn pin_bank(&self) -> u8; fn _pin(&self) -> u8 {
self.pin_bank() & 0x1f
}
#[inline] #[inline]
fn _pin(&self) -> u8 { fn _bank(&self) -> Bank {
self.pin_bank() & 0x1f match self.pin_bank() >> 5 {
#[cfg(feature = "qspi-as-gpio")]
1 => Bank::Qspi,
_ => Bank::Bank0,
} }
}
#[inline] fn io(&self) -> pac::io::Io {
fn _bank(&self) -> Bank { match self._bank() {
match self.pin_bank() >> 5 { Bank::Bank0 => crate::pac::IO_BANK0,
#[cfg(feature = "qspi-as-gpio")] #[cfg(feature = "qspi-as-gpio")]
1 => Bank::Qspi, Bank::Qspi => crate::pac::IO_QSPI,
_ => Bank::Bank0,
}
} }
}
fn io(&self) -> pac::io::Io { fn gpio(&self) -> pac::io::Gpio {
match self._bank() { self.io().gpio(self._pin() as _)
Bank::Bank0 => crate::pac::IO_BANK0, }
#[cfg(feature = "qspi-as-gpio")]
Bank::Qspi => crate::pac::IO_QSPI,
}
}
fn gpio(&self) -> pac::io::Gpio { fn pad_ctrl(&self) -> Reg<pac::pads::regs::GpioCtrl, RW> {
self.io().gpio(self._pin() as _) let block = match self._bank() {
} Bank::Bank0 => crate::pac::PADS_BANK0,
#[cfg(feature = "qspi-as-gpio")]
Bank::Qspi => crate::pac::PADS_QSPI,
};
block.gpio(self._pin() as _)
}
fn pad_ctrl(&self) -> Reg<pac::pads::regs::GpioCtrl, RW> { fn sio_out(&self) -> pac::sio::Gpio {
let block = match self._bank() { SIO.gpio_out(self._bank() as _)
Bank::Bank0 => crate::pac::PADS_BANK0, }
#[cfg(feature = "qspi-as-gpio")]
Bank::Qspi => crate::pac::PADS_QSPI,
};
block.gpio(self._pin() as _)
}
fn sio_out(&self) -> pac::sio::Gpio { fn sio_oe(&self) -> pac::sio::Gpio {
SIO.gpio_out(self._bank() as _) SIO.gpio_oe(self._bank() as _)
} }
fn sio_oe(&self) -> pac::sio::Gpio { fn sio_in(&self) -> Reg<u32, RW> {
SIO.gpio_oe(self._bank() as _) SIO.gpio_in(self._bank() as _)
} }
fn sio_in(&self) -> Reg<u32, RW> { fn int_proc(&self) -> pac::io::Int {
SIO.gpio_in(self._bank() as _) let proc = SIO.cpuid().read();
} self.io().int_proc(proc as _)
fn int_proc(&self) -> pac::io::Int {
let proc = SIO.cpuid().read();
self.io().int_proc(proc as _)
}
} }
} }
/// Interface for a Pin that can be configured by an [Input] or [Output] driver, or converted to an [AnyPin]. /// Interface for a Pin that can be configured by an [Input] or [Output] driver, or converted to an [AnyPin].
pub trait Pin: Peripheral<P = Self> + Into<AnyPin> + sealed::Pin + Sized + 'static { #[allow(private_bounds)]
pub trait Pin: Peripheral<P = Self> + Into<AnyPin> + SealedPin + Sized + 'static {
/// Degrade to a generic pin struct /// Degrade to a generic pin struct
fn degrade(self) -> AnyPin { fn degrade(self) -> AnyPin {
AnyPin { AnyPin {
@ -903,7 +899,7 @@ impl AnyPin {
impl_peripheral!(AnyPin); impl_peripheral!(AnyPin);
impl Pin for AnyPin {} impl Pin for AnyPin {}
impl sealed::Pin for AnyPin { impl SealedPin for AnyPin {
fn pin_bank(&self) -> u8 { fn pin_bank(&self) -> u8 {
self.pin_bank self.pin_bank
} }
@ -914,7 +910,7 @@ impl sealed::Pin for AnyPin {
macro_rules! impl_pin { macro_rules! impl_pin {
($name:ident, $bank:expr, $pin_num:expr) => { ($name:ident, $bank:expr, $pin_num:expr) => {
impl Pin for peripherals::$name {} impl Pin for peripherals::$name {}
impl sealed::Pin for peripherals::$name { impl SealedPin for peripherals::$name {
#[inline] #[inline]
fn pin_bank(&self) -> u8 { fn pin_bank(&self) -> u8 {
($bank as u8) * 32 + $pin_num ($bank as u8) * 32 + $pin_num

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@ -784,34 +784,24 @@ pub fn i2c_reserved_addr(addr: u16) -> bool {
((addr & 0x78) == 0 || (addr & 0x78) == 0x78) && addr != 0 ((addr & 0x78) == 0 || (addr & 0x78) == 0x78) && addr != 0
} }
mod sealed { pub(crate) trait SealedInstance {
use embassy_sync::waitqueue::AtomicWaker; const TX_DREQ: u8;
const RX_DREQ: u8;
use crate::interrupt; fn regs() -> crate::pac::i2c::I2c;
fn reset() -> crate::pac::resets::regs::Peripherals;
pub trait Instance { fn waker() -> &'static AtomicWaker;
const TX_DREQ: u8;
const RX_DREQ: u8;
type Interrupt: interrupt::typelevel::Interrupt;
fn regs() -> crate::pac::i2c::I2c;
fn reset() -> crate::pac::resets::regs::Peripherals;
fn waker() -> &'static AtomicWaker;
}
pub trait Mode {}
pub trait SdaPin<T: Instance> {}
pub trait SclPin<T: Instance> {}
} }
trait SealedMode {}
/// Driver mode. /// Driver mode.
pub trait Mode: sealed::Mode {} #[allow(private_bounds)]
pub trait Mode: SealedMode {}
macro_rules! impl_mode { macro_rules! impl_mode {
($name:ident) => { ($name:ident) => {
impl sealed::Mode for $name {} impl SealedMode for $name {}
impl Mode for $name {} impl Mode for $name {}
}; };
} }
@ -825,16 +815,18 @@ impl_mode!(Blocking);
impl_mode!(Async); impl_mode!(Async);
/// I2C instance. /// I2C instance.
pub trait Instance: sealed::Instance {} #[allow(private_bounds)]
pub trait Instance: SealedInstance {
/// Interrupt for this peripheral.
type Interrupt: interrupt::typelevel::Interrupt;
}
macro_rules! impl_instance { macro_rules! impl_instance {
($type:ident, $irq:ident, $reset:ident, $tx_dreq:expr, $rx_dreq:expr) => { ($type:ident, $irq:ident, $reset:ident, $tx_dreq:expr, $rx_dreq:expr) => {
impl sealed::Instance for peripherals::$type { impl SealedInstance for peripherals::$type {
const TX_DREQ: u8 = $tx_dreq; const TX_DREQ: u8 = $tx_dreq;
const RX_DREQ: u8 = $rx_dreq; const RX_DREQ: u8 = $rx_dreq;
type Interrupt = crate::interrupt::typelevel::$irq;
#[inline] #[inline]
fn regs() -> pac::i2c::I2c { fn regs() -> pac::i2c::I2c {
pac::$type pac::$type
@ -854,7 +846,9 @@ macro_rules! impl_instance {
&WAKER &WAKER
} }
} }
impl Instance for peripherals::$type {} impl Instance for peripherals::$type {
type Interrupt = crate::interrupt::typelevel::$irq;
}
}; };
} }
@ -862,13 +856,12 @@ impl_instance!(I2C0, I2C0_IRQ, set_i2c0, 32, 33);
impl_instance!(I2C1, I2C1_IRQ, set_i2c1, 34, 35); impl_instance!(I2C1, I2C1_IRQ, set_i2c1, 34, 35);
/// SDA pin. /// SDA pin.
pub trait SdaPin<T: Instance>: sealed::SdaPin<T> + crate::gpio::Pin {} pub trait SdaPin<T: Instance>: crate::gpio::Pin {}
/// SCL pin. /// SCL pin.
pub trait SclPin<T: Instance>: sealed::SclPin<T> + crate::gpio::Pin {} pub trait SclPin<T: Instance>: crate::gpio::Pin {}
macro_rules! impl_pin { macro_rules! impl_pin {
($pin:ident, $instance:ident, $function:ident) => { ($pin:ident, $instance:ident, $function:ident) => {
impl sealed::$function<peripherals::$instance> for peripherals::$pin {}
impl $function<peripherals::$instance> for peripherals::$pin {} impl $function<peripherals::$instance> for peripherals::$pin {}
}; };
} }

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@ -15,8 +15,7 @@ use pac::pio::vals::SmExecctrlStatusSel;
use pio::{Program, SideSet, Wrap}; use pio::{Program, SideSet, Wrap};
use crate::dma::{Channel, Transfer, Word}; use crate::dma::{Channel, Transfer, Word};
use crate::gpio::sealed::Pin as SealedPin; use crate::gpio::{self, AnyPin, Drive, Level, Pull, SealedPin, SlewRate};
use crate::gpio::{self, AnyPin, Drive, Level, Pull, SlewRate};
use crate::interrupt::typelevel::{Binding, Handler, Interrupt}; use crate::interrupt::typelevel::{Binding, Handler, Interrupt};
use crate::pac::dma::vals::TreqSel; use crate::pac::dma::vals::TreqSel;
use crate::relocate::RelocatedProgram; use crate::relocate::RelocatedProgram;
@ -695,6 +694,12 @@ impl<'d, PIO: Instance + 'd, const SM: usize> StateMachine<'d, PIO, SM> {
} }
} }
/// Set the clock divider for this state machine.
pub fn set_clock_divider(&mut self, clock_divider: FixedU32<U8>) {
let sm = Self::this_sm();
sm.clkdiv().write(|w| w.0 = clock_divider.to_bits() << 8);
}
#[inline(always)] #[inline(always)]
fn this_sm() -> crate::pac::pio::StateMachine { fn this_sm() -> crate::pac::pio::StateMachine {
PIO::PIO.sm(SM) PIO::PIO.sm(SM)
@ -1148,49 +1153,47 @@ fn on_pio_drop<PIO: Instance>() {
} }
} }
mod sealed { trait SealedInstance {
use super::*; const PIO_NO: u8;
const PIO: &'static crate::pac::pio::Pio;
const FUNCSEL: crate::pac::io::vals::Gpio0ctrlFuncsel;
pub trait PioPin {} #[inline]
fn wakers() -> &'static Wakers {
const NEW_AW: AtomicWaker = AtomicWaker::new();
static WAKERS: Wakers = Wakers([NEW_AW; 12]);
pub trait Instance { &WAKERS
const PIO_NO: u8; }
const PIO: &'static crate::pac::pio::Pio;
const FUNCSEL: crate::pac::io::vals::Gpio0ctrlFuncsel;
type Interrupt: crate::interrupt::typelevel::Interrupt;
#[inline] #[inline]
fn wakers() -> &'static Wakers { fn state() -> &'static State {
const NEW_AW: AtomicWaker = AtomicWaker::new(); static STATE: State = State {
static WAKERS: Wakers = Wakers([NEW_AW; 12]); users: AtomicU8::new(0),
used_pins: AtomicU32::new(0),
};
&WAKERS &STATE
}
#[inline]
fn state() -> &'static State {
static STATE: State = State {
users: AtomicU8::new(0),
used_pins: AtomicU32::new(0),
};
&STATE
}
} }
} }
/// PIO instance. /// PIO instance.
pub trait Instance: sealed::Instance + Sized + Unpin {} #[allow(private_bounds)]
pub trait Instance: SealedInstance + Sized + Unpin {
/// Interrupt for this peripheral.
type Interrupt: crate::interrupt::typelevel::Interrupt;
}
macro_rules! impl_pio { macro_rules! impl_pio {
($name:ident, $pio:expr, $pac:ident, $funcsel:ident, $irq:ident) => { ($name:ident, $pio:expr, $pac:ident, $funcsel:ident, $irq:ident) => {
impl sealed::Instance for peripherals::$name { impl SealedInstance for peripherals::$name {
const PIO_NO: u8 = $pio; const PIO_NO: u8 = $pio;
const PIO: &'static pac::pio::Pio = &pac::$pac; const PIO: &'static pac::pio::Pio = &pac::$pac;
const FUNCSEL: pac::io::vals::Gpio0ctrlFuncsel = pac::io::vals::Gpio0ctrlFuncsel::$funcsel; const FUNCSEL: pac::io::vals::Gpio0ctrlFuncsel = pac::io::vals::Gpio0ctrlFuncsel::$funcsel;
}
impl Instance for peripherals::$name {
type Interrupt = crate::interrupt::typelevel::$irq; type Interrupt = crate::interrupt::typelevel::$irq;
} }
impl Instance for peripherals::$name {}
}; };
} }
@ -1198,12 +1201,11 @@ impl_pio!(PIO0, 0, PIO0, PIO0_0, PIO0_IRQ_0);
impl_pio!(PIO1, 1, PIO1, PIO1_0, PIO1_IRQ_0); impl_pio!(PIO1, 1, PIO1, PIO1_0, PIO1_IRQ_0);
/// PIO pin. /// PIO pin.
pub trait PioPin: sealed::PioPin + gpio::Pin {} pub trait PioPin: gpio::Pin {}
macro_rules! impl_pio_pin { macro_rules! impl_pio_pin {
($( $pin:ident, )*) => { ($( $pin:ident, )*) => {
$( $(
impl sealed::PioPin for peripherals::$pin {}
impl PioPin for peripherals::$pin {} impl PioPin for peripherals::$pin {}
)* )*
}; };

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@ -6,8 +6,7 @@ use fixed::FixedU16;
use pac::pwm::regs::{ChDiv, Intr}; use pac::pwm::regs::{ChDiv, Intr};
use pac::pwm::vals::Divmode; use pac::pwm::vals::Divmode;
use crate::gpio::sealed::Pin as _; use crate::gpio::{AnyPin, Pin as GpioPin, SealedPin as _};
use crate::gpio::{AnyPin, Pin as GpioPin};
use crate::{pac, peripherals, RegExt}; use crate::{pac, peripherals, RegExt};
/// The configuration of a PWM slice. /// The configuration of a PWM slice.
@ -300,12 +299,11 @@ impl<'d, T: Slice> Drop for Pwm<'d, T> {
} }
} }
mod sealed { trait SealedSlice {}
pub trait Slice {}
}
/// PWM Slice. /// PWM Slice.
pub trait Slice: Peripheral<P = Self> + sealed::Slice + Sized + 'static { #[allow(private_bounds)]
pub trait Slice: Peripheral<P = Self> + SealedSlice + Sized + 'static {
/// Slice number. /// Slice number.
fn number(&self) -> u8; fn number(&self) -> u8;
@ -317,7 +315,7 @@ pub trait Slice: Peripheral<P = Self> + sealed::Slice + Sized + 'static {
macro_rules! slice { macro_rules! slice {
($name:ident, $num:expr) => { ($name:ident, $num:expr) => {
impl sealed::Slice for peripherals::$name {} impl SealedSlice for peripherals::$name {}
impl Slice for peripherals::$name { impl Slice for peripherals::$name {
fn number(&self) -> u8 { fn number(&self) -> u8 {
$num $num

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@ -188,16 +188,15 @@ pub enum RtcError {
NotRunning, NotRunning,
} }
mod sealed { trait SealedInstance {
pub trait Instance { fn regs(&self) -> crate::pac::rtc::Rtc;
fn regs(&self) -> crate::pac::rtc::Rtc;
}
} }
/// RTC peripheral instance. /// RTC peripheral instance.
pub trait Instance: sealed::Instance {} #[allow(private_bounds)]
pub trait Instance: SealedInstance {}
impl sealed::Instance for crate::peripherals::RTC { impl SealedInstance for crate::peripherals::RTC {
fn regs(&self) -> crate::pac::rtc::Rtc { fn regs(&self) -> crate::pac::rtc::Rtc {
crate::pac::RTC crate::pac::RTC
} }

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@ -7,8 +7,7 @@ use embassy_hal_internal::{into_ref, PeripheralRef};
pub use embedded_hal_02::spi::{Phase, Polarity}; pub use embedded_hal_02::spi::{Phase, Polarity};
use crate::dma::{AnyChannel, Channel}; use crate::dma::{AnyChannel, Channel};
use crate::gpio::sealed::Pin as _; use crate::gpio::{AnyPin, Pin as GpioPin, SealedPin as _};
use crate::gpio::{AnyPin, Pin as GpioPin};
use crate::{pac, peripherals, Peripheral}; use crate::{pac, peripherals, Peripheral};
/// SPI errors. /// SPI errors.
@ -443,28 +442,26 @@ impl<'d, T: Instance> Spi<'d, T, Async> {
} }
} }
mod sealed { trait SealedMode {}
use super::*;
pub trait Mode {} trait SealedInstance {
const TX_DREQ: u8;
const RX_DREQ: u8;
pub trait Instance { fn regs(&self) -> pac::spi::Spi;
const TX_DREQ: u8;
const RX_DREQ: u8;
fn regs(&self) -> pac::spi::Spi;
}
} }
/// Mode. /// Mode.
pub trait Mode: sealed::Mode {} #[allow(private_bounds)]
pub trait Mode: SealedMode {}
/// SPI instance trait. /// SPI instance trait.
pub trait Instance: sealed::Instance {} #[allow(private_bounds)]
pub trait Instance: SealedInstance {}
macro_rules! impl_instance { macro_rules! impl_instance {
($type:ident, $irq:ident, $tx_dreq:expr, $rx_dreq:expr) => { ($type:ident, $irq:ident, $tx_dreq:expr, $rx_dreq:expr) => {
impl sealed::Instance for peripherals::$type { impl SealedInstance for peripherals::$type {
const TX_DREQ: u8 = $tx_dreq; const TX_DREQ: u8 = $tx_dreq;
const RX_DREQ: u8 = $rx_dreq; const RX_DREQ: u8 = $rx_dreq;
@ -527,7 +524,7 @@ impl_pin!(PIN_29, SPI1, CsPin);
macro_rules! impl_mode { macro_rules! impl_mode {
($name:ident) => { ($name:ident) => {
impl sealed::Mode for $name {} impl SealedMode for $name {}
impl Mode for $name {} impl Mode for $name {}
}; };
} }

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@ -12,8 +12,7 @@ use pac::uart::regs::Uartris;
use crate::clocks::clk_peri_freq; use crate::clocks::clk_peri_freq;
use crate::dma::{AnyChannel, Channel}; use crate::dma::{AnyChannel, Channel};
use crate::gpio::sealed::Pin; use crate::gpio::{AnyPin, SealedPin};
use crate::gpio::AnyPin;
use crate::interrupt::typelevel::{Binding, Interrupt}; use crate::interrupt::typelevel::{Binding, Interrupt};
use crate::pac::io::vals::{Inover, Outover}; use crate::pac::io::vals::{Inover, Outover};
use crate::{interrupt, pac, peripherals, Peripheral, RegExt}; use crate::{interrupt, pac, peripherals, Peripheral, RegExt};
@ -1107,35 +1106,26 @@ impl<'d, T: Instance, M: Mode> embedded_hal_nb::serial::Write for Uart<'d, T, M>
} }
} }
mod sealed { trait SealedMode {}
use super::*;
pub trait Mode {} trait SealedInstance {
const TX_DREQ: u8;
const RX_DREQ: u8;
pub trait Instance { fn regs() -> pac::uart::Uart;
const TX_DREQ: u8;
const RX_DREQ: u8;
type Interrupt: interrupt::typelevel::Interrupt; fn buffered_state() -> &'static buffered::State;
fn regs() -> pac::uart::Uart; fn dma_state() -> &'static DmaState;
fn buffered_state() -> &'static buffered::State;
fn dma_state() -> &'static DmaState;
}
pub trait TxPin<T: Instance> {}
pub trait RxPin<T: Instance> {}
pub trait CtsPin<T: Instance> {}
pub trait RtsPin<T: Instance> {}
} }
/// UART mode. /// UART mode.
pub trait Mode: sealed::Mode {} #[allow(private_bounds)]
pub trait Mode: SealedMode {}
macro_rules! impl_mode { macro_rules! impl_mode {
($name:ident) => { ($name:ident) => {
impl sealed::Mode for $name {} impl SealedMode for $name {}
impl Mode for $name {} impl Mode for $name {}
}; };
} }
@ -1149,16 +1139,18 @@ impl_mode!(Blocking);
impl_mode!(Async); impl_mode!(Async);
/// UART instance. /// UART instance.
pub trait Instance: sealed::Instance {} #[allow(private_bounds)]
pub trait Instance: SealedInstance {
/// Interrupt for this instance.
type Interrupt: interrupt::typelevel::Interrupt;
}
macro_rules! impl_instance { macro_rules! impl_instance {
($inst:ident, $irq:ident, $tx_dreq:expr, $rx_dreq:expr) => { ($inst:ident, $irq:ident, $tx_dreq:expr, $rx_dreq:expr) => {
impl sealed::Instance for peripherals::$inst { impl SealedInstance for peripherals::$inst {
const TX_DREQ: u8 = $tx_dreq; const TX_DREQ: u8 = $tx_dreq;
const RX_DREQ: u8 = $rx_dreq; const RX_DREQ: u8 = $rx_dreq;
type Interrupt = crate::interrupt::typelevel::$irq;
fn regs() -> pac::uart::Uart { fn regs() -> pac::uart::Uart {
pac::$inst pac::$inst
} }
@ -1176,7 +1168,9 @@ macro_rules! impl_instance {
&STATE &STATE
} }
} }
impl Instance for peripherals::$inst {} impl Instance for peripherals::$inst {
type Interrupt = crate::interrupt::typelevel::$irq;
}
}; };
} }
@ -1184,17 +1178,16 @@ impl_instance!(UART0, UART0_IRQ, 20, 21);
impl_instance!(UART1, UART1_IRQ, 22, 23); impl_instance!(UART1, UART1_IRQ, 22, 23);
/// Trait for TX pins. /// Trait for TX pins.
pub trait TxPin<T: Instance>: sealed::TxPin<T> + crate::gpio::Pin {} pub trait TxPin<T: Instance>: crate::gpio::Pin {}
/// Trait for RX pins. /// Trait for RX pins.
pub trait RxPin<T: Instance>: sealed::RxPin<T> + crate::gpio::Pin {} pub trait RxPin<T: Instance>: crate::gpio::Pin {}
/// Trait for Clear To Send (CTS) pins. /// Trait for Clear To Send (CTS) pins.
pub trait CtsPin<T: Instance>: sealed::CtsPin<T> + crate::gpio::Pin {} pub trait CtsPin<T: Instance>: crate::gpio::Pin {}
/// Trait for Request To Send (RTS) pins. /// Trait for Request To Send (RTS) pins.
pub trait RtsPin<T: Instance>: sealed::RtsPin<T> + crate::gpio::Pin {} pub trait RtsPin<T: Instance>: crate::gpio::Pin {}
macro_rules! impl_pin { macro_rules! impl_pin {
($pin:ident, $instance:ident, $function:ident) => { ($pin:ident, $instance:ident, $function:ident) => {
impl sealed::$function<peripherals::$instance> for peripherals::$pin {}
impl $function<peripherals::$instance> for peripherals::$pin {} impl $function<peripherals::$instance> for peripherals::$pin {}
}; };
} }

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@ -14,20 +14,19 @@ use embassy_usb_driver::{
use crate::interrupt::typelevel::{Binding, Interrupt}; use crate::interrupt::typelevel::{Binding, Interrupt};
use crate::{interrupt, pac, peripherals, Peripheral, RegExt}; use crate::{interrupt, pac, peripherals, Peripheral, RegExt};
pub(crate) mod sealed { trait SealedInstance {
pub trait Instance { fn regs() -> crate::pac::usb::Usb;
fn regs() -> crate::pac::usb::Usb; fn dpram() -> crate::pac::usb_dpram::UsbDpram;
fn dpram() -> crate::pac::usb_dpram::UsbDpram;
}
} }
/// USB peripheral instance. /// USB peripheral instance.
pub trait Instance: sealed::Instance + 'static { #[allow(private_bounds)]
pub trait Instance: SealedInstance + 'static {
/// Interrupt for this peripheral. /// Interrupt for this peripheral.
type Interrupt: interrupt::typelevel::Interrupt; type Interrupt: interrupt::typelevel::Interrupt;
} }
impl crate::usb::sealed::Instance for peripherals::USB { impl crate::usb::SealedInstance for peripherals::USB {
fn regs() -> pac::usb::Usb { fn regs() -> pac::usb::Usb {
pac::USBCTRL_REGS pac::USBCTRL_REGS
} }

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@ -69,7 +69,7 @@ impl<'d, T: Instance, const SM: usize> PioStepper<'d, T, SM> {
let clock_divider: FixedU32<U8> = (125_000_000 / (freq * 136)).to_fixed(); let clock_divider: FixedU32<U8> = (125_000_000 / (freq * 136)).to_fixed();
assert!(clock_divider <= 65536, "clkdiv must be <= 65536"); assert!(clock_divider <= 65536, "clkdiv must be <= 65536");
assert!(clock_divider >= 1, "clkdiv must be >= 1"); assert!(clock_divider >= 1, "clkdiv must be >= 1");
T::PIO.sm(SM).clkdiv().write(|w| w.0 = clock_divider.to_bits() << 8); self.sm.set_clock_divider(clock_divider);
self.sm.clkdiv_restart(); self.sm.clkdiv_restart();
} }