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stm32/spi,crc: update for new PAC

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This commit is contained in:
Michael Zill 2024-04-09 06:56:15 +02:00 committed by Dario Nieuwenhuis
parent b1902957c9
commit 9f4d320d67
4 changed files with 34 additions and 15 deletions
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4
embassy-stm32/Cargo.toml
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@ -70,7 +70,7 @@ rand_core = "0.6.3"
sdio-host = "0.5.0"
critical-section = "1.1"
#stm32-metapac = { version = "15" }
stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-2b7ec569a5510c324693f0515ac8ea20b12917a9" }
stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-0c4baf478324e19741c7a9795ab0aa8217c3691c" }
vcell = "0.1.3"
nb = "1.0.0"
@ -96,7 +96,7 @@ proc-macro2 = "1.0.36"
quote = "1.0.15"
#stm32-metapac = { version = "15", default-features = false, features = ["metadata"]}
stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-2b7ec569a5510c324693f0515ac8ea20b12917a9", default-features = false, features = ["metadata"]}
stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-0c4baf478324e19741c7a9795ab0aa8217c3691c", default-features = false, features = ["metadata"]}
[features]
default = ["rt"]

12
embassy-stm32/src/crc/v1.rs
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@ -32,6 +32,9 @@ impl<'d> Crc<'d> {
/// Feeds a word to the peripheral and returns the current CRC value
pub fn feed_word(&mut self, word: u32) -> u32 {
// write a single byte to the device, and return the result
#[cfg(not(crc_v1))]
PAC_CRC.dr32().write_value(word);
#[cfg(crc_v1)]
PAC_CRC.dr().write_value(word);
self.read()
}
@ -39,6 +42,9 @@ impl<'d> Crc<'d> {
/// Feed a slice of words to the peripheral and return the result.
pub fn feed_words(&mut self, words: &[u32]) -> u32 {
for word in words {
#[cfg(not(crc_v1))]
PAC_CRC.dr32().write_value(*word);
#[cfg(crc_v1)]
PAC_CRC.dr().write_value(*word);
}
@ -46,6 +52,12 @@ impl<'d> Crc<'d> {
}
/// Read the CRC result value.
#[cfg(not(crc_v1))]
pub fn read(&self) -> u32 {
PAC_CRC.dr32().read()
}
/// Read the CRC result value.
#[cfg(crc_v1)]
pub fn read(&self) -> u32 {
PAC_CRC.dr().read()
}

16
embassy-stm32/src/crc/v2v3.rs
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@ -136,7 +136,7 @@ impl<'d> Crc<'d> {
/// Feeds a byte into the CRC peripheral. Returns the computed checksum.
pub fn feed_byte(&mut self, byte: u8) -> u32 {
PAC_CRC.dr8().write_value(byte);
PAC_CRC.dr().read()
PAC_CRC.dr32().read()
}
/// Feeds an slice of bytes into the CRC peripheral. Returns the computed checksum.
@ -144,30 +144,30 @@ impl<'d> Crc<'d> {
for byte in bytes {
PAC_CRC.dr8().write_value(*byte);
}
PAC_CRC.dr().read()
PAC_CRC.dr32().read()
}
/// Feeds a halfword into the CRC peripheral. Returns the computed checksum.
pub fn feed_halfword(&mut self, halfword: u16) -> u32 {
PAC_CRC.dr16().write_value(halfword);
PAC_CRC.dr().read()
PAC_CRC.dr32().read()
}
/// Feeds an slice of halfwords into the CRC peripheral. Returns the computed checksum.
pub fn feed_halfwords(&mut self, halfwords: &[u16]) -> u32 {
for halfword in halfwords {
PAC_CRC.dr16().write_value(*halfword);
}
PAC_CRC.dr().read()
PAC_CRC.dr32().read()
}
/// Feeds a words into the CRC peripheral. Returns the computed checksum.
pub fn feed_word(&mut self, word: u32) -> u32 {
PAC_CRC.dr().write_value(word as u32);
PAC_CRC.dr().read()
PAC_CRC.dr32().write_value(word as u32);
PAC_CRC.dr32().read()
}
/// Feeds an slice of words into the CRC peripheral. Returns the computed checksum.
pub fn feed_words(&mut self, words: &[u32]) -> u32 {
for word in words {
PAC_CRC.dr().write_value(*word as u32);
PAC_CRC.dr32().write_value(*word as u32);
}
PAC_CRC.dr().read()
PAC_CRC.dr32().read()
}
}

17
embassy-stm32/src/spi/mod.rs
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@ -735,18 +735,22 @@ trait RegsExt {
impl RegsExt for Regs {
fn tx_ptr<W>(&self) -> *mut W {
#[cfg(not(any(spi_v3, spi_v4, spi_v5)))]
#[cfg(any(spi_v1, spi_f1))]
let dr = self.dr();
#[cfg(spi_v2)]
let dr = self.dr16();
#[cfg(any(spi_v3, spi_v4, spi_v5))]
let dr = self.txdr();
let dr = self.txdr32();
dr.as_ptr() as *mut W
}
fn rx_ptr<W>(&self) -> *mut W {
#[cfg(not(any(spi_v3, spi_v4, spi_v5)))]
#[cfg(any(spi_v1, spi_f1))]
let dr = self.dr();
#[cfg(spi_v2)]
let dr = self.dr16();
#[cfg(any(spi_v3, spi_v4, spi_v5))]
let dr = self.rxdr();
let dr = self.rxdr32();
dr.as_ptr() as *mut W
}
}
@ -815,11 +819,14 @@ fn spin_until_rx_ready(regs: Regs) -> Result<(), Error> {
fn flush_rx_fifo(regs: Regs) {
#[cfg(not(any(spi_v3, spi_v4, spi_v5)))]
while regs.sr().read().rxne() {
#[cfg(spi_v1)]
let _ = regs.dr().read();
#[cfg(spi_v2)]
let _ = regs.dr16().read();
}
#[cfg(any(spi_v3, spi_v4, spi_v5))]
while regs.sr().read().rxp() {
let _ = regs.rxdr().read();
let _ = regs.rxdr32().read();
}
}