mirror of
https://github.com/embassy-rs/embassy.git
synced 2024-11-25 00:02:28 +00:00
stm32/usb: add support for 32bit usbram.
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52cab3a9f4
commit
9f28d80977
@ -60,7 +60,7 @@ sdio-host = "0.5.0"
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embedded-sdmmc = { git = "https://github.com/embassy-rs/embedded-sdmmc-rs", rev = "46d1b1c2ff13e31e282ec1e352421721694f126a", optional = true }
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critical-section = "1.1"
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atomic-polyfill = "1.0.1"
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stm32-metapac = "3"
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stm32-metapac = "4"
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vcell = "0.1.3"
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bxcan = "0.7.0"
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nb = "1.0.0"
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@ -75,7 +75,7 @@ critical-section = { version = "1.1", features = ["std"] }
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[build-dependencies]
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proc-macro2 = "1.0.36"
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quote = "1.0.15"
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stm32-metapac = { version = "3", default-features = false, features = ["metadata"]}
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stm32-metapac = { version = "4", default-features = false, features = ["metadata"]}
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[features]
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default = ["stm32-metapac/rt"]
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@ -12,22 +12,29 @@ use embassy_usb_driver as driver;
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use embassy_usb_driver::{
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Direction, EndpointAddress, EndpointAllocError, EndpointError, EndpointInfo, EndpointType, Event, Unsupported,
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};
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use pac::common::{Reg, RW};
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use pac::usb::vals::{EpType, Stat};
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use super::{DmPin, DpPin, Instance};
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use crate::gpio::sealed::AFType;
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use crate::interrupt::InterruptExt;
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use crate::pac::usb::regs;
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use crate::pac::usb::vals::{EpType, Stat};
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use crate::pac::USBRAM;
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use crate::rcc::sealed::RccPeripheral;
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use crate::{pac, Peripheral};
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use crate::Peripheral;
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const EP_COUNT: usize = 8;
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#[cfg(any(usb_v1_x1, usb_v1_x2))]
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const EP_MEMORY_SIZE: usize = 512;
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#[cfg(not(any(usb_v1_x1, usb_v1_x2)))]
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const EP_MEMORY_SIZE: usize = 1024;
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#[cfg(any(usbram_16x1_512, usbram_16x2_512))]
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const USBRAM_SIZE: usize = 512;
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#[cfg(usbram_16x2_1024)]
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const USBRAM_SIZE: usize = 1024;
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#[cfg(usbram_32_2048)]
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const USBRAM_SIZE: usize = 2048;
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#[cfg(not(usbram_32_2048))]
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const USBRAM_ALIGN: usize = 2;
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#[cfg(usbram_32_2048)]
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const USBRAM_ALIGN: usize = 4;
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const NEW_AW: AtomicWaker = AtomicWaker::new();
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static BUS_WAKER: AtomicWaker = NEW_AW;
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@ -57,25 +64,60 @@ fn invariant(mut r: regs::Epr) -> regs::Epr {
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r
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}
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fn align_len_up(len: u16) -> u16 {
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((len as usize + USBRAM_ALIGN - 1) / USBRAM_ALIGN * USBRAM_ALIGN) as u16
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}
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// Returns (actual_len, len_bits)
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fn calc_out_len(len: u16) -> (u16, u16) {
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match len {
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2..=62 => ((len + 1) / 2 * 2, ((len + 1) / 2) << 10),
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63..=480 => ((len + 31) / 32 * 32, (((len + 31) / 32 - 1) << 10) | 0x8000),
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// NOTE: this could be 2..=62 with 16bit USBRAM, but not with 32bit. Limit it to 60 for simplicity.
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2..=60 => (align_len_up(len), align_len_up(len) / 2 << 10),
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61..=1024 => ((len + 31) / 32 * 32, (((len + 31) / 32 - 1) << 10) | 0x8000),
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_ => panic!("invalid OUT length {}", len),
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}
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}
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fn ep_in_addr<T: Instance>(index: usize) -> Reg<u16, RW> {
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T::regs().ep_mem(index * 4 + 0)
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#[cfg(not(usbram_32_2048))]
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mod btable {
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use super::*;
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pub(super) unsafe fn write_in<T: Instance>(index: usize, addr: u16) {
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USBRAM.mem(index * 4 + 0).write_value(addr);
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}
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pub(super) unsafe fn write_in_len<T: Instance>(index: usize, _addr: u16, len: u16) {
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USBRAM.mem(index * 4 + 1).write_value(len);
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}
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pub(super) unsafe fn write_out<T: Instance>(index: usize, addr: u16, max_len_bits: u16) {
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USBRAM.mem(index * 4 + 2).write_value(addr);
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USBRAM.mem(index * 4 + 3).write_value(max_len_bits);
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}
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pub(super) unsafe fn read_out_len<T: Instance>(index: usize) -> u16 {
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USBRAM.mem(index * 4 + 3).read()
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}
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}
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fn ep_in_len<T: Instance>(index: usize) -> Reg<u16, RW> {
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T::regs().ep_mem(index * 4 + 1)
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}
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fn ep_out_addr<T: Instance>(index: usize) -> Reg<u16, RW> {
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T::regs().ep_mem(index * 4 + 2)
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}
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fn ep_out_len<T: Instance>(index: usize) -> Reg<u16, RW> {
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T::regs().ep_mem(index * 4 + 3)
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#[cfg(usbram_32_2048)]
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mod btable {
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use super::*;
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pub(super) unsafe fn write_in<T: Instance>(_index: usize, _addr: u16) {}
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pub(super) unsafe fn write_in_len<T: Instance>(index: usize, addr: u16, len: u16) {
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USBRAM.mem(index * 2).write_value((addr as u32) | ((len as u32) << 16));
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}
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pub(super) unsafe fn write_out<T: Instance>(index: usize, addr: u16, max_len_bits: u16) {
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USBRAM
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.mem(index * 2 + 1)
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.write_value((addr as u32) | ((max_len_bits as u32) << 16));
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}
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pub(super) unsafe fn read_out_len<T: Instance>(index: usize) -> u16 {
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(USBRAM.mem(index * 2 + 1).read() >> 16) as u16
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}
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}
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struct EndpointBuffer<T: Instance> {
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@ -87,23 +129,25 @@ struct EndpointBuffer<T: Instance> {
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impl<T: Instance> EndpointBuffer<T> {
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fn read(&mut self, buf: &mut [u8]) {
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assert!(buf.len() <= self.len as usize);
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for i in 0..((buf.len() + 1) / 2) {
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let val = unsafe { T::regs().ep_mem(self.addr as usize / 2 + i).read() };
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buf[i * 2] = val as u8;
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if i * 2 + 1 < buf.len() {
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buf[i * 2 + 1] = (val >> 8) as u8;
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}
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for i in 0..(buf.len() + USBRAM_ALIGN - 1) / USBRAM_ALIGN {
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let val = unsafe { USBRAM.mem(self.addr as usize / USBRAM_ALIGN + i).read() };
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let n = USBRAM_ALIGN.min(buf.len() - i * USBRAM_ALIGN);
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buf[i * USBRAM_ALIGN..][..n].copy_from_slice(&val.to_le_bytes()[..n]);
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}
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}
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fn write(&mut self, buf: &[u8]) {
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assert!(buf.len() <= self.len as usize);
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for i in 0..((buf.len() + 1) / 2) {
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let mut val = buf[i * 2] as u16;
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if i * 2 + 1 < buf.len() {
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val |= (buf[i * 2 + 1] as u16) << 8;
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}
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unsafe { T::regs().ep_mem(self.addr as usize / 2 + i).write_value(val) };
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for i in 0..(buf.len() + USBRAM_ALIGN - 1) / USBRAM_ALIGN {
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let mut val = [0u8; USBRAM_ALIGN];
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let n = USBRAM_ALIGN.min(buf.len() - i * USBRAM_ALIGN);
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val[..n].copy_from_slice(&buf[i * USBRAM_ALIGN..][..n]);
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#[cfg(not(usbram_32_2048))]
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let val = u16::from_le_bytes(val);
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#[cfg(usbram_32_2048)]
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let val = u32::from_le_bytes(val);
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unsafe { USBRAM.mem(self.addr as usize / USBRAM_ALIGN + i).write_value(val) };
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}
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}
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}
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@ -139,8 +183,7 @@ impl<'d, T: Instance> Driver<'d, T> {
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#[cfg(stm32l5)]
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unsafe {
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crate::peripherals::PWR::enable();
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pac::PWR.cr2().modify(|w| w.set_usv(true));
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crate::pac::PWR.cr2().modify(|w| w.set_usv(true));
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}
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unsafe {
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@ -256,8 +299,9 @@ impl<'d, T: Instance> Driver<'d, T> {
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}
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fn alloc_ep_mem(&mut self, len: u16) -> u16 {
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assert!(len as usize % USBRAM_ALIGN == 0);
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let addr = self.ep_mem_free;
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if addr + len > EP_MEMORY_SIZE as _ {
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if addr + len > USBRAM_SIZE as _ {
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panic!("Endpoint memory full");
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}
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self.ep_mem_free += len;
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@ -306,10 +350,7 @@ impl<'d, T: Instance> Driver<'d, T> {
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let addr = self.alloc_ep_mem(len);
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trace!(" len_bits = {:04x}", len_bits);
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unsafe {
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ep_out_addr::<T>(index).write_value(addr);
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ep_out_len::<T>(index).write_value(len_bits);
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}
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unsafe { btable::write_out::<T>(index, addr, len_bits) }
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EndpointBuffer {
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addr,
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@ -321,13 +362,11 @@ impl<'d, T: Instance> Driver<'d, T> {
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assert!(!ep.used_in);
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ep.used_in = true;
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let len = (max_packet_size + 1) / 2 * 2;
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let len = align_len_up(max_packet_size);
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let addr = self.alloc_ep_mem(len);
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unsafe {
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ep_in_addr::<T>(index).write_value(addr);
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// ep_in_len is written when actually TXing packets.
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}
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unsafe { btable::write_in::<T>(index, addr) }
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EndpointBuffer {
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addr,
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@ -398,7 +437,7 @@ impl<'d, T: Instance> driver::Driver<'d> for Driver<'d, T> {
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w.set_ctrm(true);
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});
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#[cfg(usb_v3)]
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#[cfg(any(usb_v3, usb_v4))]
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regs.bcdr().write(|w| w.set_dppu(true))
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}
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@ -633,12 +672,12 @@ impl<'d, T: Instance, D> Endpoint<'d, T, D> {
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fn write_data(&mut self, buf: &[u8]) {
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let index = self.info.addr.index();
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self.buf.write(buf);
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unsafe { ep_in_len::<T>(index).write_value(buf.len() as _) };
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unsafe { btable::write_in_len::<T>(index, self.buf.addr, buf.len() as _) }
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}
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fn read_data(&mut self, buf: &mut [u8]) -> Result<usize, EndpointError> {
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let index = self.info.addr.index();
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let rx_len = unsafe { ep_out_len::<T>(index).read() as usize } & 0x3FF;
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let rx_len = unsafe { btable::read_out_len::<T>(index) as usize } & 0x3FF;
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trace!("READ DONE, rx_len = {}", rx_len);
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if rx_len > buf.len() {
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return Err(EndpointError::BufferOverflow);
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