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Merge pull request #3139 from igiona/AllowDrivingStrengthInPwm
feat(pwm): allow specifying OutputDrive for PWM channels
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92eb6011d6
@ -24,6 +24,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0
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- spi: Add support for configuring bit order for bus
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- spi: Add support for configuring bit order for bus
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- pwm: Expose `pwm::PWM_CLK_HZ` and add `is_enabled` method
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- pwm: Expose `pwm::PWM_CLK_HZ` and add `is_enabled` method
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- gpio: Drop GPIO Pin generics (API break)
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- gpio: Drop GPIO Pin generics (API break)
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- pwm: Allow specifying OutputDrive for PWM channels
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## 0.1.0 - 2024-01-12
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## 0.1.0 - 2024-01-12
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@ -6,7 +6,7 @@ use core::sync::atomic::{compiler_fence, Ordering};
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use embassy_hal_internal::{into_ref, PeripheralRef};
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use embassy_hal_internal::{into_ref, PeripheralRef};
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use crate::gpio::{AnyPin, Pin as GpioPin, PselBits, SealedPin as _};
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use crate::gpio::{convert_drive, AnyPin, OutputDrive, Pin as GpioPin, PselBits, SealedPin as _};
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use crate::ppi::{Event, Task};
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use crate::ppi::{Event, Task};
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use crate::util::slice_in_ram_or;
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use crate::util::slice_in_ram_or;
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use crate::{interrupt, pac, Peripheral};
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use crate::{interrupt, pac, Peripheral};
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@ -128,19 +128,23 @@ impl<'d, T: Instance> SequencePwm<'d, T> {
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if let Some(pin) = &ch0 {
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if let Some(pin) = &ch0 {
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pin.set_low();
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pin.set_low();
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pin.conf().write(|w| w.dir().output());
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pin.conf()
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.write(|w| w.dir().output().drive().variant(convert_drive(config.ch0_drive)));
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}
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}
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if let Some(pin) = &ch1 {
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if let Some(pin) = &ch1 {
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pin.set_low();
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pin.set_low();
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pin.conf().write(|w| w.dir().output());
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pin.conf()
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.write(|w| w.dir().output().drive().variant(convert_drive(config.ch1_drive)));
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}
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}
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if let Some(pin) = &ch2 {
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if let Some(pin) = &ch2 {
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pin.set_low();
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pin.set_low();
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pin.conf().write(|w| w.dir().output());
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pin.conf()
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.write(|w| w.dir().output().drive().variant(convert_drive(config.ch2_drive)));
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}
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}
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if let Some(pin) = &ch3 {
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if let Some(pin) = &ch3 {
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pin.set_low();
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pin.set_low();
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pin.conf().write(|w| w.dir().output());
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pin.conf()
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.write(|w| w.dir().output().drive().variant(convert_drive(config.ch3_drive)));
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}
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}
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r.psel.out[0].write(|w| unsafe { w.bits(ch0.psel_bits()) });
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r.psel.out[0].write(|w| unsafe { w.bits(ch0.psel_bits()) });
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@ -319,6 +323,14 @@ pub struct Config {
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pub prescaler: Prescaler,
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pub prescaler: Prescaler,
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/// How a sequence is read from RAM and is spread to the compare register
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/// How a sequence is read from RAM and is spread to the compare register
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pub sequence_load: SequenceLoad,
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pub sequence_load: SequenceLoad,
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/// Drive strength for the channel 0 line.
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pub ch0_drive: OutputDrive,
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/// Drive strength for the channel 1 line.
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pub ch1_drive: OutputDrive,
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/// Drive strength for the channel 2 line.
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pub ch2_drive: OutputDrive,
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/// Drive strength for the channel 3 line.
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pub ch3_drive: OutputDrive,
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}
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}
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impl Default for Config {
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impl Default for Config {
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@ -328,6 +340,10 @@ impl Default for Config {
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max_duty: 1000,
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max_duty: 1000,
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prescaler: Prescaler::Div16,
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prescaler: Prescaler::Div16,
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sequence_load: SequenceLoad::Common,
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sequence_load: SequenceLoad::Common,
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ch0_drive: OutputDrive::Standard,
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ch1_drive: OutputDrive::Standard,
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ch2_drive: OutputDrive::Standard,
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ch3_drive: OutputDrive::Standard,
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}
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}
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}
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}
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}
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}
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@ -815,6 +831,38 @@ impl<'d, T: Instance> SimplePwm<'d, T> {
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let max_duty = self.max_duty() as u32;
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let max_duty = self.max_duty() as u32;
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clk / max_duty
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clk / max_duty
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}
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}
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/// Sets the PWM-Channel0 output drive strength
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#[inline(always)]
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pub fn set_ch0_drive(&self, drive: OutputDrive) {
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if let Some(pin) = &self.ch0 {
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pin.conf().modify(|_, w| w.drive().variant(convert_drive(drive)));
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}
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}
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/// Sets the PWM-Channel1 output drive strength
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#[inline(always)]
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pub fn set_ch1_drive(&self, drive: OutputDrive) {
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if let Some(pin) = &self.ch1 {
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pin.conf().modify(|_, w| w.drive().variant(convert_drive(drive)));
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}
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}
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/// Sets the PWM-Channel2 output drive strength
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#[inline(always)]
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pub fn set_ch2_drive(&self, drive: OutputDrive) {
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if let Some(pin) = &self.ch2 {
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pin.conf().modify(|_, w| w.drive().variant(convert_drive(drive)));
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}
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}
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/// Sets the PWM-Channel3 output drive strength
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#[inline(always)]
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pub fn set_ch3_drive(&self, drive: OutputDrive) {
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if let Some(pin) = &self.ch3 {
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pin.conf().modify(|_, w| w.drive().variant(convert_drive(drive)));
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}
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}
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}
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}
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impl<'a, T: Instance> Drop for SimplePwm<'a, T> {
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impl<'a, T: Instance> Drop for SimplePwm<'a, T> {
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