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This fixes 2 issues where STM32 BXCAN would hang
1. If one received frames under an `interrupt_free` section, in my case `init` in RTIC, the RX IRQ will fire and clear it's enable bit after `interrupt_free` is complete. There is no frame to read so RX is now unconditionally disabled forever. 2. On clearing of RX IRQ, TX stops silently. This happens due to the use of `write` instead of `modify` when modifying IRQ enable bits. Solution 1: Enable RX IRQs on every call to `try_read` that return no data. This solution also solves the issue of very delayed handling of the RX IRQ which would cause the same issue. Solution 2: Use `modify` instead of `write`.
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8f27349745
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@ -893,7 +893,7 @@ impl RxMode {
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RxFifo::Fifo0 => 0usize,
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RxFifo::Fifo0 => 0usize,
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RxFifo::Fifo1 => 1usize,
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RxFifo::Fifo1 => 1usize,
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};
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};
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T::regs().ier().write(|w| {
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T::regs().ier().modify(|w| {
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w.set_fmpie(fifo_idx, false);
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w.set_fmpie(fifo_idx, false);
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});
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});
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waker.wake();
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waker.wake();
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@ -936,18 +936,22 @@ impl RxMode {
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Self::NonBuffered(_) => {
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Self::NonBuffered(_) => {
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let registers = &info.regs;
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let registers = &info.regs;
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if let Some(msg) = registers.receive_fifo(RxFifo::Fifo0) {
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if let Some(msg) = registers.receive_fifo(RxFifo::Fifo0) {
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registers.0.ier().write(|w| {
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registers.0.ier().modify(|w| {
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w.set_fmpie(0, true);
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w.set_fmpie(0, true);
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});
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});
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Ok(msg)
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Ok(msg)
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} else if let Some(msg) = registers.receive_fifo(RxFifo::Fifo1) {
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} else if let Some(msg) = registers.receive_fifo(RxFifo::Fifo1) {
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registers.0.ier().write(|w| {
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registers.0.ier().modify(|w| {
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w.set_fmpie(1, true);
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w.set_fmpie(1, true);
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});
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});
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Ok(msg)
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Ok(msg)
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} else if let Some(err) = registers.curr_error() {
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} else if let Some(err) = registers.curr_error() {
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Err(TryReadError::BusError(err))
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Err(TryReadError::BusError(err))
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} else {
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} else {
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registers.0.ier().modify(|w| {
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w.set_fmpie(0, true);
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w.set_fmpie(1, true);
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});
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Err(TryReadError::Empty)
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Err(TryReadError::Empty)
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}
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}
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}
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}
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