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Fix rng clock
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parent
a5f754238b
commit
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@ -3,6 +3,7 @@
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use defmt::*;
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use embassy_executor::Spawner;
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use embassy_stm32::rcc::mux::Clk48sel;
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use embassy_stm32::rng::Rng;
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use embassy_stm32::{bind_interrupts, peripherals, rng, Config};
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use {defmt_rtt as _, panic_probe as _};
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@ -26,6 +27,8 @@ async fn main(_spawner: Spawner) {
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divr: Some(PllRDiv::DIV2), // 112 / 2 = 56 MHz
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});
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config.rcc.sys = Sysclk::PLL1_R;
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config.rcc.hsi48 = Some(Hsi48Config { sync_from_usb: false }); // needed for RNG
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config.rcc.mux.clk48sel = Clk48sel::HSI48; // needed for RNG (or use MSI or PLLQ if you want)
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}
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let p = embassy_stm32::init(config);
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@ -33,7 +36,6 @@ async fn main(_spawner: Spawner) {
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info!("Hello World!");
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let mut rng = Rng::new(p.RNG, Irqs);
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info!("Hello World 2!");
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let mut buf = [0u8; 16];
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unwrap!(rng.async_fill_bytes(&mut buf).await);
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