From 9031ce7fa78b899d13e4b0966e57c5684adcd6e1 Mon Sep 17 00:00:00 2001
From: Nick <10801854+valleyflowerbear@users.noreply.github.com>
Date: Wed, 29 May 2024 06:29:25 +0100
Subject: [PATCH] rp: fix watchdog CTRL register getting overwritten

---
 embassy-rp/src/watchdog.rs | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/embassy-rp/src/watchdog.rs b/embassy-rp/src/watchdog.rs
index f1e986ec7..229a306fe 100644
--- a/embassy-rp/src/watchdog.rs
+++ b/embassy-rp/src/watchdog.rs
@@ -46,7 +46,7 @@ impl Watchdog {
     /// or when JTAG is accessing bus fabric
     pub fn pause_on_debug(&mut self, pause: bool) {
         let watchdog = pac::WATCHDOG;
-        watchdog.ctrl().write(|w| {
+        watchdog.ctrl().modify(|w| {
             w.set_pause_dbg0(pause);
             w.set_pause_dbg1(pause);
             w.set_pause_jtag(pause);
@@ -60,7 +60,7 @@ impl Watchdog {
 
     fn enable(&self, bit: bool) {
         let watchdog = pac::WATCHDOG;
-        watchdog.ctrl().write(|w| w.set_enable(bit))
+        watchdog.ctrl().modify(|w| w.set_enable(bit))
     }
 
     // Configure which hardware will be reset by the watchdog