Merge pull request #162 from bobmcwhirter/cargo_features

Generate some chip features by peripherals.

embassy-stm32/Cargo.toml

@@ -26,296 +26,300 @@ defmt-debug = [ ]
 defmt-info = [ ]
 defmt-warn = [ ]
 defmt-error = [ ]
+_syscfg_f4 = []
+_syscfg_l4 = []
+_usart_v1 = []
+_rng_v1 = []
 
 # BEGIN GENERATED FEATURES
-stm32f401cb = []
+stm32f401cb = [ "_syscfg_f4", "_usart_v1",]
-stm32f401cc = []
+stm32f401cc = [ "_syscfg_f4", "_usart_v1",]
-stm32f401cd = []
+stm32f401cd = [ "_syscfg_f4", "_usart_v1",]
-stm32f401ce = []
+stm32f401ce = [ "_syscfg_f4", "_usart_v1",]
-stm32f401rb = []
+stm32f401rb = [ "_syscfg_f4", "_usart_v1",]
-stm32f401rc = []
+stm32f401rc = [ "_syscfg_f4", "_usart_v1",]
-stm32f401rd = []
+stm32f401rd = [ "_syscfg_f4", "_usart_v1",]
-stm32f401re = []
+stm32f401re = [ "_syscfg_f4", "_usart_v1",]
-stm32f401vb = []
+stm32f401vb = [ "_syscfg_f4", "_usart_v1",]
-stm32f401vc = []
+stm32f401vc = [ "_syscfg_f4", "_usart_v1",]
-stm32f401vd = []
+stm32f401vd = [ "_syscfg_f4", "_usart_v1",]
-stm32f401ve = []
+stm32f401ve = [ "_syscfg_f4", "_usart_v1",]
-stm32f405oe = []
+stm32f405oe = [ "_syscfg_f4", "_rng_v1", "_usart_v1",]
-stm32f405og = []
+stm32f405og = [ "_syscfg_f4", "_rng_v1", "_usart_v1",]
-stm32f405rg = []
+stm32f405rg = [ "_syscfg_f4", "_rng_v1", "_usart_v1",]
-stm32f405vg = []
+stm32f405vg = [ "_syscfg_f4", "_rng_v1", "_usart_v1",]
-stm32f405zg = []
+stm32f405zg = [ "_syscfg_f4", "_rng_v1", "_usart_v1",]
-stm32f407ie = []
+stm32f407ie = [ "_syscfg_f4", "_rng_v1", "_usart_v1",]
-stm32f407ig = []
+stm32f407ig = [ "_syscfg_f4", "_rng_v1", "_usart_v1",]
-stm32f407ve = []
+stm32f407ve = [ "_syscfg_f4", "_rng_v1", "_usart_v1",]
-stm32f407vg = []
+stm32f407vg = [ "_syscfg_f4", "_rng_v1", "_usart_v1",]
-stm32f407ze = []
+stm32f407ze = [ "_syscfg_f4", "_rng_v1", "_usart_v1",]
-stm32f407zg = []
+stm32f407zg = [ "_syscfg_f4", "_rng_v1", "_usart_v1",]
-stm32f410c8 = []
+stm32f410c8 = [ "_syscfg_f4", "_rng_v1", "_usart_v1",]
-stm32f410cb = []
+stm32f410cb = [ "_syscfg_f4", "_rng_v1", "_usart_v1",]
-stm32f410r8 = []
+stm32f410r8 = [ "_syscfg_f4", "_rng_v1", "_usart_v1",]
-stm32f410rb = []
+stm32f410rb = [ "_syscfg_f4", "_rng_v1", "_usart_v1",]
-stm32f410t8 = []
+stm32f410t8 = [ "_syscfg_f4", "_rng_v1", "_usart_v1",]
-stm32f410tb = []
+stm32f410tb = [ "_syscfg_f4", "_rng_v1", "_usart_v1",]
-stm32f411cc = []
+stm32f411cc = [ "_syscfg_f4", "_usart_v1",]
-stm32f411ce = []
+stm32f411ce = [ "_syscfg_f4", "_usart_v1",]
-stm32f411rc = []
+stm32f411rc = [ "_syscfg_f4", "_usart_v1",]
-stm32f411re = []
+stm32f411re = [ "_syscfg_f4", "_usart_v1",]
-stm32f411vc = []
+stm32f411vc = [ "_syscfg_f4", "_usart_v1",]
-stm32f411ve = []
+stm32f411ve = [ "_syscfg_f4", "_usart_v1",]
-stm32f412ce = []
+stm32f412ce = [ "_syscfg_f4", "_rng_v1", "_usart_v1",]
-stm32f412cg = []
+stm32f412cg = [ "_syscfg_f4", "_rng_v1", "_usart_v1",]
-stm32f412re = []
+stm32f412re = [ "_syscfg_f4", "_rng_v1", "_usart_v1",]
-stm32f412rg = []
+stm32f412rg = [ "_syscfg_f4", "_rng_v1", "_usart_v1",]
-stm32f412ve = []
+stm32f412ve = [ "_syscfg_f4", "_rng_v1", "_usart_v1",]
-stm32f412vg = []
+stm32f412vg = [ "_syscfg_f4", "_rng_v1", "_usart_v1",]
-stm32f412ze = []
+stm32f412ze = [ "_syscfg_f4", "_rng_v1", "_usart_v1",]
-stm32f412zg = []
+stm32f412zg = [ "_syscfg_f4", "_rng_v1", "_usart_v1",]
-stm32f413cg = []
+stm32f413cg = [ "_syscfg_f4", "_rng_v1", "_usart_v1",]
-stm32f413ch = []
+stm32f413ch = [ "_syscfg_f4", "_rng_v1", "_usart_v1",]
-stm32f413mg = []
+stm32f413mg = [ "_syscfg_f4", "_rng_v1", "_usart_v1",]
-stm32f413mh = []
+stm32f413mh = [ "_syscfg_f4", "_rng_v1", "_usart_v1",]
-stm32f413rg = []
+stm32f413rg = [ "_syscfg_f4", "_rng_v1", "_usart_v1",]
-stm32f413rh = []
+stm32f413rh = [ "_syscfg_f4", "_rng_v1", "_usart_v1",]
-stm32f413vg = []
+stm32f413vg = [ "_syscfg_f4", "_rng_v1", "_usart_v1",]
-stm32f413vh = []
+stm32f413vh = [ "_syscfg_f4", "_rng_v1", "_usart_v1",]
-stm32f413zg = []
+stm32f413zg = [ "_syscfg_f4", "_rng_v1", "_usart_v1",]
-stm32f413zh = []
+stm32f413zh = [ "_syscfg_f4", "_rng_v1", "_usart_v1",]
-stm32f415og = []
+stm32f415og = [ "_syscfg_f4", "_rng_v1", "_usart_v1",]
-stm32f415rg = []
+stm32f415rg = [ "_syscfg_f4", "_rng_v1", "_usart_v1",]
-stm32f415vg = []
+stm32f415vg = [ "_syscfg_f4", "_rng_v1", "_usart_v1",]
-stm32f415zg = []
+stm32f415zg = [ "_syscfg_f4", "_rng_v1", "_usart_v1",]
-stm32f417ie = []
+stm32f417ie = [ "_syscfg_f4", "_rng_v1", "_usart_v1",]
-stm32f417ig = []
+stm32f417ig = [ "_syscfg_f4", "_rng_v1", "_usart_v1",]
-stm32f417ve = []
+stm32f417ve = [ "_syscfg_f4", "_rng_v1", "_usart_v1",]
-stm32f417vg = []
+stm32f417vg = [ "_syscfg_f4", "_rng_v1", "_usart_v1",]
-stm32f417ze = []
+stm32f417ze = [ "_syscfg_f4", "_rng_v1", "_usart_v1",]
-stm32f417zg = []
+stm32f417zg = [ "_syscfg_f4", "_rng_v1", "_usart_v1",]
-stm32f423ch = []
+stm32f423ch = [ "_syscfg_f4", "_rng_v1", "_usart_v1",]
-stm32f423mh = []
+stm32f423mh = [ "_syscfg_f4", "_rng_v1", "_usart_v1",]
-stm32f423rh = []
+stm32f423rh = [ "_syscfg_f4", "_rng_v1", "_usart_v1",]
-stm32f423vh = []
+stm32f423vh = [ "_syscfg_f4", "_rng_v1", "_usart_v1",]
-stm32f423zh = []
+stm32f423zh = [ "_syscfg_f4", "_rng_v1", "_usart_v1",]
-stm32f427ag = []
+stm32f427ag = [ "_syscfg_f4", "_rng_v1", "_usart_v1",]
-stm32f427ai = []
+stm32f427ai = [ "_syscfg_f4", "_rng_v1", "_usart_v1",]
-stm32f427ig = []
+stm32f427ig = [ "_syscfg_f4", "_rng_v1", "_usart_v1",]
-stm32f427ii = []
+stm32f427ii = [ "_syscfg_f4", "_rng_v1", "_usart_v1",]
-stm32f427vg = []
+stm32f427vg = [ "_syscfg_f4", "_rng_v1", "_usart_v1",]
-stm32f427vi = []
+stm32f427vi = [ "_syscfg_f4", "_rng_v1", "_usart_v1",]
-stm32f427zg = []
+stm32f427zg = [ "_syscfg_f4", "_rng_v1", "_usart_v1",]
-stm32f427zi = []
+stm32f427zi = [ "_syscfg_f4", "_rng_v1", "_usart_v1",]
-stm32f429ag = []
+stm32f429ag = [ "_syscfg_f4", "_rng_v1", "_usart_v1",]
-stm32f429ai = []
+stm32f429ai = [ "_syscfg_f4", "_rng_v1", "_usart_v1",]
-stm32f429be = []
+stm32f429be = [ "_syscfg_f4", "_rng_v1", "_usart_v1",]
-stm32f429bg = []
+stm32f429bg = [ "_syscfg_f4", "_rng_v1", "_usart_v1",]
-stm32f429bi = []
+stm32f429bi = [ "_syscfg_f4", "_rng_v1", "_usart_v1",]
-stm32f429ie = []
+stm32f429ie = [ "_syscfg_f4", "_rng_v1", "_usart_v1",]
-stm32f429ig = []
+stm32f429ig = [ "_syscfg_f4", "_rng_v1", "_usart_v1",]
-stm32f429ii = []
+stm32f429ii = [ "_syscfg_f4", "_rng_v1", "_usart_v1",]
-stm32f429ne = []
+stm32f429ne = [ "_syscfg_f4", "_rng_v1", "_usart_v1",]
-stm32f429ng = []
+stm32f429ng = [ "_syscfg_f4", "_rng_v1", "_usart_v1",]
-stm32f429ni = []
+stm32f429ni = [ "_syscfg_f4", "_rng_v1", "_usart_v1",]
-stm32f429ve = []
+stm32f429ve = [ "_syscfg_f4", "_rng_v1", "_usart_v1",]
-stm32f429vg = []
+stm32f429vg = [ "_syscfg_f4", "_rng_v1", "_usart_v1",]
-stm32f429vi = []
+stm32f429vi = [ "_syscfg_f4", "_rng_v1", "_usart_v1",]
-stm32f429ze = []
+stm32f429ze = [ "_syscfg_f4", "_rng_v1", "_usart_v1",]
-stm32f429zg = []
+stm32f429zg = [ "_syscfg_f4", "_rng_v1", "_usart_v1",]
-stm32f429zi = []
+stm32f429zi = [ "_syscfg_f4", "_rng_v1", "_usart_v1",]
-stm32f437ai = []
+stm32f437ai = [ "_syscfg_f4", "_rng_v1", "_usart_v1",]
-stm32f437ig = []
+stm32f437ig = [ "_syscfg_f4", "_rng_v1", "_usart_v1",]
-stm32f437ii = []
+stm32f437ii = [ "_syscfg_f4", "_rng_v1", "_usart_v1",]
-stm32f437vg = []
+stm32f437vg = [ "_syscfg_f4", "_rng_v1", "_usart_v1",]
-stm32f437vi = []
+stm32f437vi = [ "_syscfg_f4", "_rng_v1", "_usart_v1",]
-stm32f437zg = []
+stm32f437zg = [ "_syscfg_f4", "_rng_v1", "_usart_v1",]
-stm32f437zi = []
+stm32f437zi = [ "_syscfg_f4", "_rng_v1", "_usart_v1",]
-stm32f439ai = []
+stm32f439ai = [ "_syscfg_f4", "_rng_v1", "_usart_v1",]
-stm32f439bg = []
+stm32f439bg = [ "_syscfg_f4", "_rng_v1", "_usart_v1",]
-stm32f439bi = []
+stm32f439bi = [ "_syscfg_f4", "_rng_v1", "_usart_v1",]
-stm32f439ig = []
+stm32f439ig = [ "_syscfg_f4", "_rng_v1", "_usart_v1",]
-stm32f439ii = []
+stm32f439ii = [ "_syscfg_f4", "_rng_v1", "_usart_v1",]
-stm32f439ng = []
+stm32f439ng = [ "_syscfg_f4", "_rng_v1", "_usart_v1",]
-stm32f439ni = []
+stm32f439ni = [ "_syscfg_f4", "_rng_v1", "_usart_v1",]
-stm32f439vg = []
+stm32f439vg = [ "_syscfg_f4", "_rng_v1", "_usart_v1",]
-stm32f439vi = []
+stm32f439vi = [ "_syscfg_f4", "_rng_v1", "_usart_v1",]
-stm32f439zg = []
+stm32f439zg = [ "_syscfg_f4", "_rng_v1", "_usart_v1",]
-stm32f439zi = []
+stm32f439zi = [ "_syscfg_f4", "_rng_v1", "_usart_v1",]
-stm32f446mc = []
+stm32f446mc = [ "_syscfg_f4", "_usart_v1",]
-stm32f446me = []
+stm32f446me = [ "_syscfg_f4", "_usart_v1",]
-stm32f446rc = []
+stm32f446rc = [ "_syscfg_f4", "_usart_v1",]
-stm32f446re = []
+stm32f446re = [ "_syscfg_f4", "_usart_v1",]
-stm32f446vc = []
+stm32f446vc = [ "_syscfg_f4", "_usart_v1",]
-stm32f446ve = []
+stm32f446ve = [ "_syscfg_f4", "_usart_v1",]
-stm32f446zc = []
+stm32f446zc = [ "_syscfg_f4", "_usart_v1",]
-stm32f446ze = []
+stm32f446ze = [ "_syscfg_f4", "_usart_v1",]
-stm32f469ae = []
+stm32f469ae = [ "_syscfg_f4", "_rng_v1", "_usart_v1",]
-stm32f469ag = []
+stm32f469ag = [ "_syscfg_f4", "_rng_v1", "_usart_v1",]
-stm32f469ai = []
+stm32f469ai = [ "_syscfg_f4", "_rng_v1", "_usart_v1",]
-stm32f469be = []
+stm32f469be = [ "_syscfg_f4", "_rng_v1", "_usart_v1",]
-stm32f469bg = []
+stm32f469bg = [ "_syscfg_f4", "_rng_v1", "_usart_v1",]
-stm32f469bi = []
+stm32f469bi = [ "_syscfg_f4", "_rng_v1", "_usart_v1",]
-stm32f469ie = []
+stm32f469ie = [ "_syscfg_f4", "_rng_v1", "_usart_v1",]
-stm32f469ig = []
+stm32f469ig = [ "_syscfg_f4", "_rng_v1", "_usart_v1",]
-stm32f469ii = []
+stm32f469ii = [ "_syscfg_f4", "_rng_v1", "_usart_v1",]
-stm32f469ne = []
+stm32f469ne = [ "_syscfg_f4", "_rng_v1", "_usart_v1",]
-stm32f469ng = []
+stm32f469ng = [ "_syscfg_f4", "_rng_v1", "_usart_v1",]
-stm32f469ni = []
+stm32f469ni = [ "_syscfg_f4", "_rng_v1", "_usart_v1",]
-stm32f469ve = []
+stm32f469ve = [ "_syscfg_f4", "_rng_v1", "_usart_v1",]
-stm32f469vg = []
+stm32f469vg = [ "_syscfg_f4", "_rng_v1", "_usart_v1",]
-stm32f469vi = []
+stm32f469vi = [ "_syscfg_f4", "_rng_v1", "_usart_v1",]
-stm32f469ze = []
+stm32f469ze = [ "_syscfg_f4", "_rng_v1", "_usart_v1",]
-stm32f469zg = []
+stm32f469zg = [ "_syscfg_f4", "_rng_v1", "_usart_v1",]
-stm32f469zi = []
+stm32f469zi = [ "_syscfg_f4", "_rng_v1", "_usart_v1",]
-stm32f479ag = []
+stm32f479ag = [ "_syscfg_f4", "_rng_v1", "_usart_v1",]
-stm32f479ai = []
+stm32f479ai = [ "_syscfg_f4", "_rng_v1", "_usart_v1",]
-stm32f479bg = []
+stm32f479bg = [ "_syscfg_f4", "_rng_v1", "_usart_v1",]
-stm32f479bi = []
+stm32f479bi = [ "_syscfg_f4", "_rng_v1", "_usart_v1",]
-stm32f479ig = []
+stm32f479ig = [ "_syscfg_f4", "_rng_v1", "_usart_v1",]
-stm32f479ii = []
+stm32f479ii = [ "_syscfg_f4", "_rng_v1", "_usart_v1",]
-stm32f479ng = []
+stm32f479ng = [ "_syscfg_f4", "_rng_v1", "_usart_v1",]
-stm32f479ni = []
+stm32f479ni = [ "_syscfg_f4", "_rng_v1", "_usart_v1",]
-stm32f479vg = []
+stm32f479vg = [ "_syscfg_f4", "_rng_v1", "_usart_v1",]
-stm32f479vi = []
+stm32f479vi = [ "_syscfg_f4", "_rng_v1", "_usart_v1",]
-stm32f479zg = []
+stm32f479zg = [ "_syscfg_f4", "_rng_v1", "_usart_v1",]
-stm32f479zi = []
+stm32f479zi = [ "_syscfg_f4", "_rng_v1", "_usart_v1",]
-stm32l412c8 = []
+stm32l412c8 = [ "_rng_v1", "_syscfg_l4",]
-stm32l412cb = []
+stm32l412cb = [ "_rng_v1", "_syscfg_l4",]
-stm32l412k8 = []
+stm32l412k8 = [ "_rng_v1", "_syscfg_l4",]
-stm32l412kb = []
+stm32l412kb = [ "_rng_v1", "_syscfg_l4",]
-stm32l412r8 = []
+stm32l412r8 = [ "_rng_v1", "_syscfg_l4",]
-stm32l412rb = []
+stm32l412rb = [ "_rng_v1", "_syscfg_l4",]
-stm32l412t8 = []
+stm32l412t8 = [ "_rng_v1", "_syscfg_l4",]
-stm32l412tb = []
+stm32l412tb = [ "_rng_v1", "_syscfg_l4",]
-stm32l422cb = []
+stm32l422cb = [ "_rng_v1", "_syscfg_l4",]
-stm32l422kb = []
+stm32l422kb = [ "_rng_v1", "_syscfg_l4",]
-stm32l422rb = []
+stm32l422rb = [ "_rng_v1", "_syscfg_l4",]
-stm32l422tb = []
+stm32l422tb = [ "_rng_v1", "_syscfg_l4",]
-stm32l431cb = []
+stm32l431cb = [ "_rng_v1", "_syscfg_l4",]
-stm32l431cc = []
+stm32l431cc = [ "_rng_v1", "_syscfg_l4",]
-stm32l431kb = []
+stm32l431kb = [ "_rng_v1", "_syscfg_l4",]
-stm32l431kc = []
+stm32l431kc = [ "_rng_v1", "_syscfg_l4",]
-stm32l431rb = []
+stm32l431rb = [ "_rng_v1", "_syscfg_l4",]
-stm32l431rc = []
+stm32l431rc = [ "_rng_v1", "_syscfg_l4",]
-stm32l431vc = []
+stm32l431vc = [ "_rng_v1", "_syscfg_l4",]
-stm32l432kb = []
+stm32l432kb = [ "_rng_v1", "_syscfg_l4",]
-stm32l432kc = []
+stm32l432kc = [ "_rng_v1", "_syscfg_l4",]
-stm32l433cb = []
+stm32l433cb = [ "_rng_v1", "_syscfg_l4",]
-stm32l433cc = []
+stm32l433cc = [ "_rng_v1", "_syscfg_l4",]
-stm32l433rb = []
+stm32l433rb = [ "_rng_v1", "_syscfg_l4",]
-stm32l433rc = []
+stm32l433rc = [ "_rng_v1", "_syscfg_l4",]
-stm32l433vc = []
+stm32l433vc = [ "_rng_v1", "_syscfg_l4",]
-stm32l442kc = []
+stm32l442kc = [ "_rng_v1", "_syscfg_l4",]
-stm32l443cc = []
+stm32l443cc = [ "_rng_v1", "_syscfg_l4",]
-stm32l443rc = []
+stm32l443rc = [ "_rng_v1", "_syscfg_l4",]
-stm32l443vc = []
+stm32l443vc = [ "_rng_v1", "_syscfg_l4",]
-stm32l451cc = []
+stm32l451cc = [ "_rng_v1", "_syscfg_l4",]
-stm32l451ce = []
+stm32l451ce = [ "_rng_v1", "_syscfg_l4",]
-stm32l451rc = []
+stm32l451rc = [ "_rng_v1", "_syscfg_l4",]
-stm32l451re = []
+stm32l451re = [ "_rng_v1", "_syscfg_l4",]
-stm32l451vc = []
+stm32l451vc = [ "_rng_v1", "_syscfg_l4",]
-stm32l451ve = []
+stm32l451ve = [ "_rng_v1", "_syscfg_l4",]
-stm32l452cc = []
+stm32l452cc = [ "_rng_v1", "_syscfg_l4",]
-stm32l452ce = []
+stm32l452ce = [ "_rng_v1", "_syscfg_l4",]
-stm32l452rc = []
+stm32l452rc = [ "_rng_v1", "_syscfg_l4",]
-stm32l452re = []
+stm32l452re = [ "_rng_v1", "_syscfg_l4",]
-stm32l452vc = []
+stm32l452vc = [ "_rng_v1", "_syscfg_l4",]
-stm32l452ve = []
+stm32l452ve = [ "_rng_v1", "_syscfg_l4",]
-stm32l462ce = []
+stm32l462ce = [ "_rng_v1", "_syscfg_l4",]
-stm32l462re = []
+stm32l462re = [ "_rng_v1", "_syscfg_l4",]
-stm32l462ve = []
+stm32l462ve = [ "_rng_v1", "_syscfg_l4",]
-stm32l471qe = []
+stm32l471qe = [ "_rng_v1", "_syscfg_l4",]
-stm32l471qg = []
+stm32l471qg = [ "_rng_v1", "_syscfg_l4",]
-stm32l471re = []
+stm32l471re = [ "_rng_v1", "_syscfg_l4",]
-stm32l471rg = []
+stm32l471rg = [ "_rng_v1", "_syscfg_l4",]
-stm32l471ve = []
+stm32l471ve = [ "_rng_v1", "_syscfg_l4",]
-stm32l471vg = []
+stm32l471vg = [ "_rng_v1", "_syscfg_l4",]
-stm32l471ze = []
+stm32l471ze = [ "_rng_v1", "_syscfg_l4",]
-stm32l471zg = []
+stm32l471zg = [ "_rng_v1", "_syscfg_l4",]
-stm32l475rc = []
+stm32l475rc = [ "_rng_v1", "_syscfg_l4",]
-stm32l475re = []
+stm32l475re = [ "_rng_v1", "_syscfg_l4",]
-stm32l475rg = []
+stm32l475rg = [ "_rng_v1", "_syscfg_l4",]
-stm32l475vc = []
+stm32l475vc = [ "_rng_v1", "_syscfg_l4",]
-stm32l475ve = []
+stm32l475ve = [ "_rng_v1", "_syscfg_l4",]
-stm32l475vg = []
+stm32l475vg = [ "_rng_v1", "_syscfg_l4",]
-stm32l476je = []
+stm32l476je = [ "_rng_v1", "_syscfg_l4",]
-stm32l476jg = []
+stm32l476jg = [ "_rng_v1", "_syscfg_l4",]
-stm32l476me = []
+stm32l476me = [ "_rng_v1", "_syscfg_l4",]
-stm32l476mg = []
+stm32l476mg = [ "_rng_v1", "_syscfg_l4",]
-stm32l476qe = []
+stm32l476qe = [ "_rng_v1", "_syscfg_l4",]
-stm32l476qg = []
+stm32l476qg = [ "_rng_v1", "_syscfg_l4",]
-stm32l476rc = []
+stm32l476rc = [ "_rng_v1", "_syscfg_l4",]
-stm32l476re = []
+stm32l476re = [ "_rng_v1", "_syscfg_l4",]
-stm32l476rg = []
+stm32l476rg = [ "_rng_v1", "_syscfg_l4",]
-stm32l476vc = []
+stm32l476vc = [ "_rng_v1", "_syscfg_l4",]
-stm32l476ve = []
+stm32l476ve = [ "_rng_v1", "_syscfg_l4",]
-stm32l476vg = []
+stm32l476vg = [ "_rng_v1", "_syscfg_l4",]
-stm32l476ze = []
+stm32l476ze = [ "_rng_v1", "_syscfg_l4",]
-stm32l476zg = []
+stm32l476zg = [ "_rng_v1", "_syscfg_l4",]
-stm32l485jc = []
+stm32l485jc = [ "_rng_v1", "_syscfg_l4",]
-stm32l485je = []
+stm32l485je = [ "_rng_v1", "_syscfg_l4",]
-stm32l486jg = []
+stm32l486jg = [ "_rng_v1", "_syscfg_l4",]
-stm32l486qg = []
+stm32l486qg = [ "_rng_v1", "_syscfg_l4",]
-stm32l486rg = []
+stm32l486rg = [ "_rng_v1", "_syscfg_l4",]
-stm32l486vg = []
+stm32l486vg = [ "_rng_v1", "_syscfg_l4",]
-stm32l486zg = []
+stm32l486zg = [ "_rng_v1", "_syscfg_l4",]
-stm32l496ae = []
+stm32l496ae = [ "_rng_v1", "_syscfg_l4",]
-stm32l496ag = []
+stm32l496ag = [ "_rng_v1", "_syscfg_l4",]
-stm32l496qe = []
+stm32l496qe = [ "_rng_v1", "_syscfg_l4",]
-stm32l496qg = []
+stm32l496qg = [ "_rng_v1", "_syscfg_l4",]
-stm32l496re = []
+stm32l496re = [ "_rng_v1", "_syscfg_l4",]
-stm32l496rg = []
+stm32l496rg = [ "_rng_v1", "_syscfg_l4",]
-stm32l496ve = []
+stm32l496ve = [ "_rng_v1", "_syscfg_l4",]
-stm32l496vg = []
+stm32l496vg = [ "_rng_v1", "_syscfg_l4",]
-stm32l496wg = []
+stm32l496wg = [ "_rng_v1", "_syscfg_l4",]
-stm32l496ze = []
+stm32l496ze = [ "_rng_v1", "_syscfg_l4",]
-stm32l496zg = []
+stm32l496zg = [ "_rng_v1", "_syscfg_l4",]
-stm32l4a6ag = []
+stm32l4a6ag = [ "_rng_v1", "_syscfg_l4",]
-stm32l4a6qg = []
+stm32l4a6qg = [ "_rng_v1", "_syscfg_l4",]
-stm32l4a6rg = []
+stm32l4a6rg = [ "_rng_v1", "_syscfg_l4",]
-stm32l4a6vg = []
+stm32l4a6vg = [ "_rng_v1", "_syscfg_l4",]
-stm32l4a6zg = []
+stm32l4a6zg = [ "_rng_v1", "_syscfg_l4",]
-stm32l4p5ae = []
+stm32l4p5ae = [ "_rng_v1", "_syscfg_l4",]
-stm32l4p5ag = []
+stm32l4p5ag = [ "_rng_v1", "_syscfg_l4",]
-stm32l4p5ce = []
+stm32l4p5ce = [ "_rng_v1", "_syscfg_l4",]
-stm32l4p5cg = []
+stm32l4p5cg = [ "_rng_v1", "_syscfg_l4",]
-stm32l4p5qe = []
+stm32l4p5qe = [ "_rng_v1", "_syscfg_l4",]
-stm32l4p5qg = []
+stm32l4p5qg = [ "_rng_v1", "_syscfg_l4",]
-stm32l4p5re = []
+stm32l4p5re = [ "_rng_v1", "_syscfg_l4",]
-stm32l4p5rg = []
+stm32l4p5rg = [ "_rng_v1", "_syscfg_l4",]
-stm32l4p5ve = []
+stm32l4p5ve = [ "_rng_v1", "_syscfg_l4",]
-stm32l4p5vg = []
+stm32l4p5vg = [ "_rng_v1", "_syscfg_l4",]
-stm32l4p5ze = []
+stm32l4p5ze = [ "_rng_v1", "_syscfg_l4",]
-stm32l4p5zg = []
+stm32l4p5zg = [ "_rng_v1", "_syscfg_l4",]
-stm32l4q5ag = []
+stm32l4q5ag = [ "_rng_v1", "_syscfg_l4",]
-stm32l4q5cg = []
+stm32l4q5cg = [ "_rng_v1", "_syscfg_l4",]
-stm32l4q5qg = []
+stm32l4q5qg = [ "_rng_v1", "_syscfg_l4",]
-stm32l4q5rg = []
+stm32l4q5rg = [ "_rng_v1", "_syscfg_l4",]
-stm32l4q5vg = []
+stm32l4q5vg = [ "_rng_v1", "_syscfg_l4",]
-stm32l4q5zg = []
+stm32l4q5zg = [ "_rng_v1", "_syscfg_l4",]
-stm32l4r5ag = []
+stm32l4r5ag = [ "_rng_v1", "_syscfg_l4",]
-stm32l4r5ai = []
+stm32l4r5ai = [ "_rng_v1", "_syscfg_l4",]
-stm32l4r5qg = []
+stm32l4r5qg = [ "_rng_v1", "_syscfg_l4",]
-stm32l4r5qi = []
+stm32l4r5qi = [ "_rng_v1", "_syscfg_l4",]
-stm32l4r5vg = []
+stm32l4r5vg = [ "_rng_v1", "_syscfg_l4",]
-stm32l4r5vi = []
+stm32l4r5vi = [ "_rng_v1", "_syscfg_l4",]
-stm32l4r5zg = []
+stm32l4r5zg = [ "_rng_v1", "_syscfg_l4",]
-stm32l4r5zi = []
+stm32l4r5zi = [ "_rng_v1", "_syscfg_l4",]
-stm32l4r7ai = []
+stm32l4r7ai = [ "_rng_v1", "_syscfg_l4",]
-stm32l4r7vi = []
+stm32l4r7vi = [ "_rng_v1", "_syscfg_l4",]
-stm32l4r7zi = []
+stm32l4r7zi = [ "_rng_v1", "_syscfg_l4",]
-stm32l4r9ag = []
+stm32l4r9ag = [ "_rng_v1", "_syscfg_l4",]
-stm32l4r9ai = []
+stm32l4r9ai = [ "_rng_v1", "_syscfg_l4",]
-stm32l4r9vg = []
+stm32l4r9vg = [ "_rng_v1", "_syscfg_l4",]
-stm32l4r9vi = []
+stm32l4r9vi = [ "_rng_v1", "_syscfg_l4",]
-stm32l4r9zg = []
+stm32l4r9zg = [ "_rng_v1", "_syscfg_l4",]
-stm32l4r9zi = []
+stm32l4r9zi = [ "_rng_v1", "_syscfg_l4",]
-stm32l4s5ai = []
+stm32l4s5ai = [ "_rng_v1", "_syscfg_l4",]
-stm32l4s5qi = []
+stm32l4s5qi = [ "_rng_v1", "_syscfg_l4",]
-stm32l4s5vi = []
+stm32l4s5vi = [ "_rng_v1", "_syscfg_l4",]
-stm32l4s5zi = []
+stm32l4s5zi = [ "_rng_v1", "_syscfg_l4",]
-stm32l4s7ai = []
+stm32l4s7ai = [ "_rng_v1", "_syscfg_l4",]
-stm32l4s7vi = []
+stm32l4s7vi = [ "_rng_v1", "_syscfg_l4",]
-stm32l4s7zi = []
+stm32l4s7zi = [ "_rng_v1", "_syscfg_l4",]
-stm32l4s9ai = []
+stm32l4s9ai = [ "_rng_v1", "_syscfg_l4",]
-stm32l4s9vi = []
+stm32l4s9vi = [ "_rng_v1", "_syscfg_l4",]
-stm32l4s9zi = []
+stm32l4s9zi = [ "_rng_v1", "_syscfg_l4",]
 # END GENERATED FEATURES

embassy-stm32/gen.py

@@ -19,6 +19,7 @@ for f in sorted(glob('stm32-data/data/chips/*.yaml')):
     with open(f, 'r') as f:
         chip = yaml.load(f, Loader=yaml.SafeLoader)
     chip['name'] = chip['name'].lower()
+    chip['features'] = []
     print(chip['name'])
     chips[chip['name']] = chip
 
@@ -39,21 +40,6 @@ with open('src/chip/mod.rs', 'w') as f:
     f.write('mod chip;\n')
     f.write('pub use chip::*;\n')
 
-# ========= Update Cargo features
-
-features = {name: [] for name, chip in chips.items()}
-
-SEPARATOR_START = '# BEGIN GENERATED FEATURES\n'
-SEPARATOR_END = '# END GENERATED FEATURES\n'
-
-with open('Cargo.toml', 'r') as f:
-    cargo = f.read()
-before, cargo = cargo.split(SEPARATOR_START, maxsplit=1)
-_, after = cargo.split(SEPARATOR_END, maxsplit=1)
-cargo = before + SEPARATOR_START + toml.dumps(features) + SEPARATOR_END + after
-with open('Cargo.toml', 'w') as f:
-    f.write(cargo)
-
 # ========= Generate per-chip mod
 
 for chip in chips.values():
@@ -93,6 +79,7 @@ for chip in chips.values():
             continue
 
         if peri['block'] in ('usart_v1/USART', 'usart_v1/UART'):
+            chip['features'].append("_usart_v1")
             impls.append(f'impl_usart!({name}, 0x{peri["address"]:x});')
             for pin, funcs in af.items():
                 if pin in pins:
@@ -109,6 +96,13 @@ for chip in chips.values():
 
         if peri['block'] == 'rng_v1/RNG':
             impls.append(f'impl_rng!(0x{peri["address"]:x});')
+            chip['features'].append("_rng_v1")
+
+        if peri['block'] == 'syscfg_f4/SYSCFG':
+            chip['features'].append("_syscfg_f4")
+
+        if peri['block'] == 'syscfg_l4/SYSCFG':
+            chip['features'].append("_syscfg_l4")
 
     irq_variants = []
     irq_vectors = []
@@ -174,5 +168,22 @@ for chip in chips.values():
             f.write(i)
 
 
+
+# ========= Update Cargo features
+
+features = {name: list(set(chip['features'])) for name, chip in chips.items()}
+
+SEPARATOR_START = '# BEGIN GENERATED FEATURES\n'
+SEPARATOR_END = '# END GENERATED FEATURES\n'
+
+with open('Cargo.toml', 'r') as f:
+    cargo = f.read()
+before, cargo = cargo.split(SEPARATOR_START, maxsplit=1)
+_, after = cargo.split(SEPARATOR_END, maxsplit=1)
+cargo = before + SEPARATOR_START + toml.dumps(features) + SEPARATOR_END + after
+with open('Cargo.toml', 'w') as f:
+    f.write(cargo)
+
+
 # format
 os.system('rustfmt src/chip/*')