mirror of
https://github.com/embassy-rs/embassy.git
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tests: Use unified link_ram_cortex_m.x file for all Cortex M targets
This commit is contained in:
parent
17346fdfc2
commit
890ceae4e5
@ -4,7 +4,7 @@ use std::{env, fs};
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fn main() -> Result<(), Box<dyn Error>> {
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let out = PathBuf::from(env::var("OUT_DIR").unwrap());
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fs::write(out.join("link_ram.x"), include_bytes!("link_ram.x")).unwrap();
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fs::write(out.join("link_ram.x"), include_bytes!("../link_ram_cortex_m.x")).unwrap();
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println!("cargo:rustc-link-search={}", out.display());
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println!("cargo:rerun-if-changed=link_ram.x");
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@ -4,7 +4,7 @@ use std::{env, fs};
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fn main() -> Result<(), Box<dyn Error>> {
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let out = PathBuf::from(env::var("OUT_DIR").unwrap());
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fs::write(out.join("link_ram.x"), include_bytes!("link_ram.x")).unwrap();
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fs::write(out.join("link_ram.x"), include_bytes!("../link_ram_cortex_m.x")).unwrap();
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println!("cargo:rustc-link-search={}", out.display());
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println!("cargo:rerun-if-changed=link_ram.x");
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@ -1,255 +0,0 @@
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/* ##### EMBASSY NOTE
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Originally from https://github.com/rust-embedded/cortex-m-rt/blob/master/link.x.in
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Adjusted to put everything in RAM
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*/
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/* # Developer notes
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- Symbols that start with a double underscore (__) are considered "private"
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- Symbols that start with a single underscore (_) are considered "semi-public"; they can be
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overridden in a user linker script, but should not be referred from user code (e.g. `extern "C" {
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static mut __sbss }`).
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- `EXTERN` forces the linker to keep a symbol in the final binary. We use this to make sure a
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symbol if not dropped if it appears in or near the front of the linker arguments and "it's not
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needed" by any of the preceding objects (linker arguments)
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- `PROVIDE` is used to provide default values that can be overridden by a user linker script
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- On alignment: it's important for correctness that the VMA boundaries of both .bss and .data *and*
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the LMA of .data are all 4-byte aligned. These alignments are assumed by the RAM initialization
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routine. There's also a second benefit: 4-byte aligned boundaries means that you won't see
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"Address (..) is out of bounds" in the disassembly produced by `objdump`.
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*/
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/* Provides information about the memory layout of the device */
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MEMORY {
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RAM : ORIGIN = 0x20000000, LENGTH = 256K
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}
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/* # Entry point = reset vector */
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EXTERN(__RESET_VECTOR);
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EXTERN(Reset);
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ENTRY(Reset);
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/* # Exception vectors */
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/* This is effectively weak aliasing at the linker level */
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/* The user can override any of these aliases by defining the corresponding symbol themselves (cf.
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the `exception!` macro) */
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EXTERN(__EXCEPTIONS); /* depends on all the these PROVIDED symbols */
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EXTERN(DefaultHandler);
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PROVIDE(NonMaskableInt = DefaultHandler);
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EXTERN(HardFaultTrampoline);
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PROVIDE(MemoryManagement = DefaultHandler);
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PROVIDE(BusFault = DefaultHandler);
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PROVIDE(UsageFault = DefaultHandler);
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PROVIDE(SecureFault = DefaultHandler);
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PROVIDE(SVCall = DefaultHandler);
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PROVIDE(DebugMonitor = DefaultHandler);
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PROVIDE(PendSV = DefaultHandler);
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PROVIDE(SysTick = DefaultHandler);
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PROVIDE(DefaultHandler = DefaultHandler_);
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PROVIDE(HardFault = HardFault_);
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/* # Interrupt vectors */
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EXTERN(__INTERRUPTS); /* `static` variable similar to `__EXCEPTIONS` */
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/* # Pre-initialization function */
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/* If the user overrides this using the `pre_init!` macro or by creating a `__pre_init` function,
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then the function this points to will be called before the RAM is initialized. */
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PROVIDE(__pre_init = DefaultPreInit);
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/* # Sections */
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SECTIONS
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{
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PROVIDE(_stack_start = ORIGIN(RAM) + LENGTH(RAM));
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/* ## Sections in RAM */
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/* ### Vector table */
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.vector_table ORIGIN(RAM) :
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{
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/* Initial Stack Pointer (SP) value */
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LONG(_stack_start);
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/* Reset vector */
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KEEP(*(.vector_table.reset_vector)); /* this is the `__RESET_VECTOR` symbol */
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__reset_vector = .;
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/* Exceptions */
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KEEP(*(.vector_table.exceptions)); /* this is the `__EXCEPTIONS` symbol */
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__eexceptions = .;
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/* Device specific interrupts */
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KEEP(*(.vector_table.interrupts)); /* this is the `__INTERRUPTS` symbol */
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} > RAM
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PROVIDE(_stext = ADDR(.vector_table) + SIZEOF(.vector_table));
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/* ### .text */
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.text _stext :
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{
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__stext = .;
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*(.Reset);
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*(.text .text.*);
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/* The HardFaultTrampoline uses the `b` instruction to enter `HardFault`,
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so must be placed close to it. */
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*(.HardFaultTrampoline);
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*(.HardFault.*);
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. = ALIGN(4); /* Pad .text to the alignment to workaround overlapping load section bug in old lld */
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__etext = .;
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} > RAM
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/* ### .rodata */
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.rodata : ALIGN(4)
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{
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. = ALIGN(4);
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__srodata = .;
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*(.rodata .rodata.*);
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/* 4-byte align the end (VMA) of this section.
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This is required by LLD to ensure the LMA of the following .data
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section will have the correct alignment. */
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. = ALIGN(4);
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__erodata = .;
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} > RAM
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/* ## Sections in RAM */
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/* ### .data */
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.data : ALIGN(4)
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{
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. = ALIGN(4);
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__sdata = .;
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__edata = .;
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*(.data .data.*);
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. = ALIGN(4); /* 4-byte align the end (VMA) of this section */
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} > RAM
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/* Allow sections from user `memory.x` injected using `INSERT AFTER .data` to
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* use the .data loading mechanism by pushing __edata. Note: do not change
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* output region or load region in those user sections! */
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. = ALIGN(4);
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/* LMA of .data */
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__sidata = LOADADDR(.data);
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/* ### .gnu.sgstubs
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This section contains the TrustZone-M veneers put there by the Arm GNU linker. */
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/* Security Attribution Unit blocks must be 32 bytes aligned. */
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/* Note that this pads the RAM usage to 32 byte alignment. */
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.gnu.sgstubs : ALIGN(32)
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{
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. = ALIGN(32);
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__veneer_base = .;
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*(.gnu.sgstubs*)
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. = ALIGN(32);
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__veneer_limit = .;
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} > RAM
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/* ### .bss */
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.bss (NOLOAD) : ALIGN(4)
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{
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. = ALIGN(4);
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__sbss = .;
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*(.bss .bss.*);
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*(COMMON); /* Uninitialized C statics */
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. = ALIGN(4); /* 4-byte align the end (VMA) of this section */
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} > RAM
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/* Allow sections from user `memory.x` injected using `INSERT AFTER .bss` to
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* use the .bss zeroing mechanism by pushing __ebss. Note: do not change
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* output region or load region in those user sections! */
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. = ALIGN(4);
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__ebss = .;
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/* ### .uninit */
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.uninit (NOLOAD) : ALIGN(4)
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{
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. = ALIGN(4);
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__suninit = .;
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*(.uninit .uninit.*);
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. = ALIGN(4);
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__euninit = .;
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} > RAM
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/* Place the heap right after `.uninit` in RAM */
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PROVIDE(__sheap = __euninit);
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/* ## .got */
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/* Dynamic relocations are unsupported. This section is only used to detect relocatable code in
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the input files and raise an error if relocatable code is found */
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.got (NOLOAD) :
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{
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KEEP(*(.got .got.*));
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}
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/* ## Discarded sections */
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/DISCARD/ :
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{
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/* Unused exception related info that only wastes space */
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*(.ARM.exidx);
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*(.ARM.exidx.*);
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*(.ARM.extab.*);
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}
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}
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/* Do not exceed this mark in the error messages below | */
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/* # Alignment checks */
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ASSERT(ORIGIN(RAM) % 4 == 0, "
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ERROR(cortex-m-rt): the start of the RAM region must be 4-byte aligned");
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ASSERT(__sdata % 4 == 0 && __edata % 4 == 0, "
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BUG(cortex-m-rt): .data is not 4-byte aligned");
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ASSERT(__sidata % 4 == 0, "
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BUG(cortex-m-rt): the LMA of .data is not 4-byte aligned");
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ASSERT(__sbss % 4 == 0 && __ebss % 4 == 0, "
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BUG(cortex-m-rt): .bss is not 4-byte aligned");
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ASSERT(__sheap % 4 == 0, "
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BUG(cortex-m-rt): start of .heap is not 4-byte aligned");
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/* # Position checks */
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/* ## .vector_table */
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ASSERT(__reset_vector == ADDR(.vector_table) + 0x8, "
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BUG(cortex-m-rt): the reset vector is missing");
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ASSERT(__eexceptions == ADDR(.vector_table) + 0x40, "
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BUG(cortex-m-rt): the exception vectors are missing");
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ASSERT(SIZEOF(.vector_table) > 0x40, "
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ERROR(cortex-m-rt): The interrupt vectors are missing.
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Possible solutions, from most likely to less likely:
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- Link to a svd2rust generated device crate
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- Check that you actually use the device/hal/bsp crate in your code
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- Disable the 'device' feature of cortex-m-rt to build a generic application (a dependency
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may be enabling it)
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- Supply the interrupt handlers yourself. Check the documentation for details.");
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/* ## .text */
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ASSERT(ADDR(.vector_table) + SIZEOF(.vector_table) <= _stext, "
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ERROR(cortex-m-rt): The .text section can't be placed inside the .vector_table section
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Set _stext to an address greater than the end of .vector_table (See output of `nm`)");
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ASSERT(_stext + SIZEOF(.text) < ORIGIN(RAM) + LENGTH(RAM), "
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ERROR(cortex-m-rt): The .text section must be placed inside the RAM memory.
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Set _stext to an address smaller than 'ORIGIN(RAM) + LENGTH(RAM)'");
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/* # Other checks */
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ASSERT(SIZEOF(.got) == 0, "
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ERROR(cortex-m-rt): .got section detected in the input object files
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Dynamic relocations are not supported. If you are linking to C code compiled using
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the 'cc' crate then modify your build script to compile the C code _without_
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the -fPIC flag. See the documentation of the `cc::Build.pic` method for details.");
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/* Do not exceed this mark in the error messages above | */
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/* Provides weak aliases (cf. PROVIDED) for device specific interrupt handlers */
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/* This will usually be provided by a device crate generated using svd2rust (see `device.x`) */
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INCLUDE device.x
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4
tests/rp/memory.x
Normal file
4
tests/rp/memory.x
Normal file
@ -0,0 +1,4 @@
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/* Provides information about the memory layout of the device */
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MEMORY {
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RAM : ORIGIN = 0x20000000, LENGTH = 256K
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}
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@ -4,7 +4,7 @@ use std::{env, fs};
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fn main() -> Result<(), Box<dyn Error>> {
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let out = PathBuf::from(env::var("OUT_DIR").unwrap());
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fs::write(out.join("link_ram.x"), include_bytes!("link_ram.x")).unwrap();
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fs::write(out.join("link_ram.x"), include_bytes!("../link_ram_cortex_m.x")).unwrap();
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println!("cargo:rustc-link-search={}", out.display());
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println!("cargo:rustc-link-arg-bins=--nmagic");
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@ -1,254 +0,0 @@
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/* ##### EMBASSY NOTE
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Originally from https://github.com/rust-embedded/cortex-m-rt/blob/master/link.x.in
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Adjusted to put everything in RAM
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*/
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/* # Developer notes
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- Symbols that start with a double underscore (__) are considered "private"
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- Symbols that start with a single underscore (_) are considered "semi-public"; they can be
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overridden in a user linker script, but should not be referred from user code (e.g. `extern "C" {
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static mut __sbss }`).
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- `EXTERN` forces the linker to keep a symbol in the final binary. We use this to make sure a
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symbol if not dropped if it appears in or near the front of the linker arguments and "it's not
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needed" by any of the preceding objects (linker arguments)
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- `PROVIDE` is used to provide default values that can be overridden by a user linker script
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- On alignment: it's important for correctness that the VMA boundaries of both .bss and .data *and*
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the LMA of .data are all 4-byte aligned. These alignments are assumed by the RAM initialization
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routine. There's also a second benefit: 4-byte aligned boundaries means that you won't see
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"Address (..) is out of bounds" in the disassembly produced by `objdump`.
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*/
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/* Provides information about the memory layout of the device */
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/* This will be provided by the user (see `memory.x`) or by a Board Support Crate */
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INCLUDE memory.x
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/* # Entry point = reset vector */
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EXTERN(__RESET_VECTOR);
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EXTERN(Reset);
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ENTRY(Reset);
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/* # Exception vectors */
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/* This is effectively weak aliasing at the linker level */
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/* The user can override any of these aliases by defining the corresponding symbol themselves (cf.
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the `exception!` macro) */
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EXTERN(__EXCEPTIONS); /* depends on all the these PROVIDED symbols */
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EXTERN(DefaultHandler);
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PROVIDE(NonMaskableInt = DefaultHandler);
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EXTERN(HardFaultTrampoline);
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PROVIDE(MemoryManagement = DefaultHandler);
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PROVIDE(BusFault = DefaultHandler);
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PROVIDE(UsageFault = DefaultHandler);
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PROVIDE(SecureFault = DefaultHandler);
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PROVIDE(SVCall = DefaultHandler);
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PROVIDE(DebugMonitor = DefaultHandler);
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PROVIDE(PendSV = DefaultHandler);
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PROVIDE(SysTick = DefaultHandler);
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PROVIDE(DefaultHandler = DefaultHandler_);
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PROVIDE(HardFault = HardFault_);
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/* # Interrupt vectors */
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EXTERN(__INTERRUPTS); /* `static` variable similar to `__EXCEPTIONS` */
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/* # Pre-initialization function */
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/* If the user overrides this using the `pre_init!` macro or by creating a `__pre_init` function,
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then the function this points to will be called before the RAM is initialized. */
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PROVIDE(__pre_init = DefaultPreInit);
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/* # Sections */
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SECTIONS
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{
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PROVIDE(_stack_start = ORIGIN(RAM) + LENGTH(RAM));
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/* ## Sections in RAM */
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/* ### Vector table */
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.vector_table ORIGIN(RAM) :
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{
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/* Initial Stack Pointer (SP) value */
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LONG(_stack_start);
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/* Reset vector */
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KEEP(*(.vector_table.reset_vector)); /* this is the `__RESET_VECTOR` symbol */
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__reset_vector = .;
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/* Exceptions */
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KEEP(*(.vector_table.exceptions)); /* this is the `__EXCEPTIONS` symbol */
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__eexceptions = .;
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/* Device specific interrupts */
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KEEP(*(.vector_table.interrupts)); /* this is the `__INTERRUPTS` symbol */
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} > RAM
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PROVIDE(_stext = ADDR(.vector_table) + SIZEOF(.vector_table));
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/* ### .text */
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.text _stext :
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{
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__stext = .;
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*(.Reset);
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*(.text .text.*);
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/* The HardFaultTrampoline uses the `b` instruction to enter `HardFault`,
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so must be placed close to it. */
|
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*(.HardFaultTrampoline);
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*(.HardFault.*);
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. = ALIGN(4); /* Pad .text to the alignment to workaround overlapping load section bug in old lld */
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__etext = .;
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} > RAM
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/* ### .rodata */
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.rodata : ALIGN(4)
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{
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. = ALIGN(4);
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__srodata = .;
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*(.rodata .rodata.*);
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|
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/* 4-byte align the end (VMA) of this section.
|
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This is required by LLD to ensure the LMA of the following .data
|
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section will have the correct alignment. */
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. = ALIGN(4);
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__erodata = .;
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} > RAM
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/* ## Sections in RAM */
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/* ### .data */
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.data : ALIGN(4)
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{
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. = ALIGN(4);
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__sdata = .;
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__edata = .;
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*(.data .data.*);
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. = ALIGN(4); /* 4-byte align the end (VMA) of this section */
|
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} > RAM
|
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/* Allow sections from user `memory.x` injected using `INSERT AFTER .data` to
|
||||
* use the .data loading mechanism by pushing __edata. Note: do not change
|
||||
* output region or load region in those user sections! */
|
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. = ALIGN(4);
|
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|
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/* LMA of .data */
|
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__sidata = LOADADDR(.data);
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|
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/* ### .gnu.sgstubs
|
||||
This section contains the TrustZone-M veneers put there by the Arm GNU linker. */
|
||||
/* Security Attribution Unit blocks must be 32 bytes aligned. */
|
||||
/* Note that this pads the RAM usage to 32 byte alignment. */
|
||||
.gnu.sgstubs : ALIGN(32)
|
||||
{
|
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. = ALIGN(32);
|
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__veneer_base = .;
|
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*(.gnu.sgstubs*)
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. = ALIGN(32);
|
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__veneer_limit = .;
|
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} > RAM
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|
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/* ### .bss */
|
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.bss (NOLOAD) : ALIGN(4)
|
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{
|
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. = ALIGN(4);
|
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__sbss = .;
|
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*(.bss .bss.*);
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*(COMMON); /* Uninitialized C statics */
|
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. = ALIGN(4); /* 4-byte align the end (VMA) of this section */
|
||||
} > RAM
|
||||
/* Allow sections from user `memory.x` injected using `INSERT AFTER .bss` to
|
||||
* use the .bss zeroing mechanism by pushing __ebss. Note: do not change
|
||||
* output region or load region in those user sections! */
|
||||
. = ALIGN(4);
|
||||
__ebss = .;
|
||||
|
||||
/* ### .uninit */
|
||||
.uninit (NOLOAD) : ALIGN(4)
|
||||
{
|
||||
. = ALIGN(4);
|
||||
__suninit = .;
|
||||
*(.uninit .uninit.*);
|
||||
. = ALIGN(4);
|
||||
__euninit = .;
|
||||
} > RAM
|
||||
|
||||
/* Place the heap right after `.uninit` in RAM */
|
||||
PROVIDE(__sheap = __euninit);
|
||||
|
||||
/* ## .got */
|
||||
/* Dynamic relocations are unsupported. This section is only used to detect relocatable code in
|
||||
the input files and raise an error if relocatable code is found */
|
||||
.got (NOLOAD) :
|
||||
{
|
||||
KEEP(*(.got .got.*));
|
||||
}
|
||||
|
||||
/* ## Discarded sections */
|
||||
/DISCARD/ :
|
||||
{
|
||||
/* Unused exception related info that only wastes space */
|
||||
*(.ARM.exidx);
|
||||
*(.ARM.exidx.*);
|
||||
*(.ARM.extab.*);
|
||||
}
|
||||
}
|
||||
|
||||
/* Do not exceed this mark in the error messages below | */
|
||||
/* # Alignment checks */
|
||||
ASSERT(ORIGIN(RAM) % 4 == 0, "
|
||||
ERROR(cortex-m-rt): the start of the RAM region must be 4-byte aligned");
|
||||
|
||||
ASSERT(__sdata % 4 == 0 && __edata % 4 == 0, "
|
||||
BUG(cortex-m-rt): .data is not 4-byte aligned");
|
||||
|
||||
ASSERT(__sidata % 4 == 0, "
|
||||
BUG(cortex-m-rt): the LMA of .data is not 4-byte aligned");
|
||||
|
||||
ASSERT(__sbss % 4 == 0 && __ebss % 4 == 0, "
|
||||
BUG(cortex-m-rt): .bss is not 4-byte aligned");
|
||||
|
||||
ASSERT(__sheap % 4 == 0, "
|
||||
BUG(cortex-m-rt): start of .heap is not 4-byte aligned");
|
||||
|
||||
/* # Position checks */
|
||||
|
||||
/* ## .vector_table */
|
||||
ASSERT(__reset_vector == ADDR(.vector_table) + 0x8, "
|
||||
BUG(cortex-m-rt): the reset vector is missing");
|
||||
|
||||
ASSERT(__eexceptions == ADDR(.vector_table) + 0x40, "
|
||||
BUG(cortex-m-rt): the exception vectors are missing");
|
||||
|
||||
ASSERT(SIZEOF(.vector_table) > 0x40, "
|
||||
ERROR(cortex-m-rt): The interrupt vectors are missing.
|
||||
Possible solutions, from most likely to less likely:
|
||||
- Link to a svd2rust generated device crate
|
||||
- Check that you actually use the device/hal/bsp crate in your code
|
||||
- Disable the 'device' feature of cortex-m-rt to build a generic application (a dependency
|
||||
may be enabling it)
|
||||
- Supply the interrupt handlers yourself. Check the documentation for details.");
|
||||
|
||||
/* ## .text */
|
||||
ASSERT(ADDR(.vector_table) + SIZEOF(.vector_table) <= _stext, "
|
||||
ERROR(cortex-m-rt): The .text section can't be placed inside the .vector_table section
|
||||
Set _stext to an address greater than the end of .vector_table (See output of `nm`)");
|
||||
|
||||
ASSERT(_stext + SIZEOF(.text) < ORIGIN(RAM) + LENGTH(RAM), "
|
||||
ERROR(cortex-m-rt): The .text section must be placed inside the RAM memory.
|
||||
Set _stext to an address smaller than 'ORIGIN(RAM) + LENGTH(RAM)'");
|
||||
|
||||
/* # Other checks */
|
||||
ASSERT(SIZEOF(.got) == 0, "
|
||||
ERROR(cortex-m-rt): .got section detected in the input object files
|
||||
Dynamic relocations are not supported. If you are linking to C code compiled using
|
||||
the 'cc' crate then modify your build script to compile the C code _without_
|
||||
the -fPIC flag. See the documentation of the `cc::Build.pic` method for details.");
|
||||
/* Do not exceed this mark in the error messages above | */
|
||||
|
||||
|
||||
/* Provides weak aliases (cf. PROVIDED) for device specific interrupt handlers */
|
||||
/* This will usually be provided by a device crate generated using svd2rust (see `device.x`) */
|
||||
INCLUDE device.x
|
Loading…
Reference in New Issue
Block a user