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https://github.com/embassy-rs/embassy.git
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cleanup for PR
This commit is contained in:
Bruno Bousquet
parent
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commit
7b04b0166b
@ -1,17 +1,9 @@
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[target.'cfg(all(target_arch = "arm", target_os = "none"))']
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[target.'cfg(all(target_arch = "arm", target_os = "none"))']
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# replace STM32F429ZITx with your chip as listed in `probe-rs chip list`
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# replace STM32F429ZITx with your chip as listed in `probe-rs chip list`
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# runner = "probe-rs run --chip STM32F429ZITx"
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runner = "probe-rs run --chip STM32F429ZITx"
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runner = "arm-none-eabi-gdb -q -x openocd.gdb"
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[build]
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[build]
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# Pick ONE of these default compilation targets
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target = "thumbv7em-none-eabi"
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# target = "thumbv6m-none-eabi" # Cortex-M0 and Cortex-M0+
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# target = "thumbv7m-none-eabi" # Cortex-M3
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# target = "thumbv7em-none-eabi" # Cortex-M4 and Cortex-M7 (no FPU)
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target = "thumbv7em-none-eabihf" # Cortex-M4F and Cortex-M7F (with FPU)
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# target = "thumbv8m.base-none-eabi" # Cortex-M23
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# target = "thumbv8m.main-none-eabi" # Cortex-M33 (no FPU)
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# target = "thumbv8m.main-none-eabihf" # Cortex-M33 (with FPU)
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[env]
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[env]
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DEFMT_LOG = "trace"
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DEFMT_LOG = "trace"
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109
examples/stm32f4/.vscode/README.md
vendored
109
examples/stm32f4/.vscode/README.md
vendored
@ -1,109 +0,0 @@
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# VS Code Configuration
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Example configurations for debugging programs in-editor with VS Code.
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This directory contains configurations for two platforms:
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- `LM3S6965EVB` on QEMU
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- `STM32F303x` via OpenOCD
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## Required Extensions
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If you have the `code` command in your path, you can run the following commands to install the necessary extensions.
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```sh
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code --install-extension rust-lang.rust-analyzer
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code --install-extension marus25.cortex-debug
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```
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Otherwise, you can use the Extensions view to search for and install them, or go directly to their marketplace pages and click the "Install" button.
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- [Rust Language Server (rust-analyzer)](https://marketplace.visualstudio.com/items?itemName=rust-lang.rust-analyzer)
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- [Cortex-Debug](https://marketplace.visualstudio.com/items?itemName=marus25.cortex-debug)
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## Use
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The quickstart comes with two debug configurations.
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Both are configured to build the project, using the default settings from `.cargo/config`, prior to starting a debug session.
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1. QEMU: Starts a debug session using an emulation of the `LM3S6965EVB` mcu.
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- This works on a fresh `cargo generate` without modification of any of the settings described above.
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- Semihosting output will be written to the Output view `Adapter Output`.
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- `ITM` logging does not work with QEMU emulation.
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2. OpenOCD: Starts a debug session for a `STM32F3DISCOVERY` board (or any `STM32F303x` running at 8MHz).
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- Follow the instructions above for configuring the build with `.cargo/config` and the `memory.x` linker script.
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- `ITM` output will be written to the Output view `SWO: ITM [port: 0, type: console]` output.
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### Git
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Files in the `.vscode/` directory are `.gitignore`d by default because many files that may end up in the `.vscode/` directory should not be committed and shared.
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If you would like to save this debug configuration to your repository and share it with your team, you'll need to explicitly `git add` the files to your repository.
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```sh
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git add -f .vscode/launch.json
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git add -f .vscode/tasks.json
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git add -f .vscode/*.svd
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```
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## Customizing for other targets
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For full documentation, see the [Cortex-Debug][cortex-debug] repository.
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### Device
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Some configurations use this to automatically find the SVD file.
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Replace this with the part number for your device.
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```json
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"device": "STM32F303VCT6",
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```
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### OpenOCD Config Files
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The `configFiles` property specifies a list of files to pass to OpenOCD.
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```json
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"configFiles": [
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"interface/stlink-v2-1.cfg",
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"target/stm32f3x.cfg"
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],
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```
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See the [OpenOCD config docs][openocd-config] for more information and the [OpenOCD repository for available configuration files][openocd-repo].
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### SVD
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The SVD file is a standard way of describing all registers and peripherals of an ARM Cortex-M mCU.
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Cortex-Debug needs this file to display the current register values for the peripherals on the device.
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You can probably find the SVD for your device on the vendor's website.
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For example, the STM32F3DISCOVERY board uses an mcu from the `STM32F303x` line of processors.
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All the SVD files for the STM32F3 series are available on [ST's Website][stm32f3].
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Download the [stm32f3 SVD pack][stm32f3-svd], and copy the `STM32F303.svd` file into `.vscode/`.
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This line of the config tells the Cortex-Debug plug in where to find the file.
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```json
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"svdFile": "${workspaceRoot}/.vscode/STM32F303.svd",
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```
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For other processors, simply copy the correct `*.svd` file into the project and update the config accordingly.
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### CPU Frequency
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If your device is running at a frequency other than 8MHz, you'll need to modify this line of `launch.json` for the `ITM` output to work correctly.
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```json
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"cpuFrequency": 8000000,
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```
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### Other GDB Servers
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For information on setting up GDB servers other than OpenOCD, see the [Cortex-Debug repository][cortex-debug].
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[cortex-debug]: https://github.com/Marus/cortex-debug
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[stm32f3]: https://www.st.com/content/st_com/en/products/microcontrollers-microprocessors/stm32-32-bit-arm-cortex-mcus/stm32-mainstream-mcus/stm32f3-series.html#resource
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[stm32f3-svd]: https://www.st.com/resource/en/svd/stm32f3_svd.zip
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[openocd-config]: http://openocd.org/doc/html/Config-File-Guidelines.html
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[openocd-repo]: https://sourceforge.net/p/openocd/code/ci/master/tree/tcl/
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17
examples/stm32f4/.vscode/extensions.json
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17
examples/stm32f4/.vscode/extensions.json
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{
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// See https://go.microsoft.com/fwlink/?LinkId=827846 to learn about workspace recommendations.
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// Extension identifier format: ${publisher}.${name}. Example: vscode.csharp
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// List of extensions which should be recommended for users of this workspace.
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"recommendations": [
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"rust-lang.rust-analyzer",
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"marus25.cortex-debug",
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"usernamehw.errorlens",
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"tamasfe.even-better-toml",
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"serayuzgur.crates"
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],
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// List of extensions recommended by VS Code that should not be recommended for users of this workspace.
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"unwantedRecommendations": [
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]
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}
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33
examples/stm32f4/.vscode/launch.json
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33
examples/stm32f4/.vscode/launch.json
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{
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/*
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* Requires the Rust Language Server (rust-analyzer) and Cortex-Debug extensions
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* https://marketplace.visualstudio.com/items?itemName=rust-lang.rust-analyzer
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* https://marketplace.visualstudio.com/items?itemName=marus25.cortex-debug
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*/
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"version": "0.2.0",
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"configurations": [
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{
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/* Configuration for the STM32F446 Discovery board */
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"type": "cortex-debug",
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"request": "launch",
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"name": "Debug (OpenOCD)",
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"servertype": "openocd",
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"cwd": "${workspaceRoot}",
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"preLaunchTask": "Cargo Build (debug)",
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"runToEntryPoint": "main",
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"executable": "./target/thumbv7em-none-eabihf/debug/input_capture",
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/* Run `cargo build --example itm` and uncomment this line to run itm example */
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// "executable": "./target/thumbv7em-none-eabihf/debug/examples/itm",
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"device": "STM32F446RET6",
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"configFiles": [
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"interface/stlink.cfg",
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"target/stm32f4x.cfg"
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],
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"postLaunchCommands": [
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"monitor arm semihosting enable"
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],
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"postRestartCommands": [],
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"postResetCommands": [],
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}
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]
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}
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43
examples/stm32f4/.vscode/tasks.json
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43
examples/stm32f4/.vscode/tasks.json
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{
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// See https://go.microsoft.com/fwlink/?LinkId=733558
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// for the documentation about the tasks.json format
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"version": "2.0.0",
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"tasks": [
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{
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/*
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* This is the default cargo build task,
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* but we need to provide a label for it,
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* so we can invoke it from the debug launcher.
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*/
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"label": "Cargo Build (debug)",
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"type": "process",
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"command": "cargo",
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"args": ["build", "--bin", "input_capture"],
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"problemMatcher": [
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"$rustc"
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],
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"group": {
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"kind": "build",
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"isDefault": true
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}
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},
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{
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"label": "Cargo Build (release)",
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"type": "process",
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"command": "cargo",
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"args": ["build", "--release"],
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"problemMatcher": [
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"$rustc"
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],
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"group": "build"
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},
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{
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"label": "Cargo Clean",
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"type": "process",
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"command": "cargo",
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"args": ["clean"],
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"problemMatcher": [],
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"group": "build"
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},
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]
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}
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@ -6,7 +6,7 @@ license = "MIT OR Apache-2.0"
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[dependencies]
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[dependencies]
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# Change stm32f429zi to your chip name, if necessary.
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# Change stm32f429zi to your chip name, if necessary.
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embassy-stm32 = { version = "0.1.0", path = "../../embassy-stm32", features = ["defmt", "stm32f446re", "unstable-pac", "memory-x", "time-driver-any", "exti", "chrono"] }
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embassy-stm32 = { version = "0.1.0", path = "../../embassy-stm32", features = ["defmt", "stm32f429zi", "unstable-pac", "memory-x", "time-driver-any", "exti", "chrono"] }
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embassy-sync = { version = "0.5.0", path = "../../embassy-sync", features = ["defmt"] }
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embassy-sync = { version = "0.5.0", path = "../../embassy-sync", features = ["defmt"] }
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embassy-executor = { version = "0.5.0", path = "../../embassy-executor", features = ["task-arena-size-32768", "arch-cortex-m", "executor-thread", "executor-interrupt", "defmt", "integrated-timers"] }
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embassy-executor = { version = "0.5.0", path = "../../embassy-executor", features = ["task-arena-size-32768", "arch-cortex-m", "executor-thread", "executor-interrupt", "defmt", "integrated-timers"] }
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embassy-time = { version = "0.3.0", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime", "tick-hz-32_768"] }
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embassy-time = { version = "0.3.0", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime", "tick-hz-32_768"] }
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@ -1,5 +0,0 @@
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# Sample OpenOCD configuration for the STM32F3DISCOVERY development board
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source [find interface/stlink.cfg]
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source [find target/stm32f4x.cfg]
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@ -1,40 +0,0 @@
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target extended-remote :3333
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# print demangled symbols
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set print asm-demangle on
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# set backtrace limit to not have infinite backtrace loops
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set backtrace limit 32
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# detect unhandled exceptions, hard faults and panics
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break DefaultHandler
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break HardFault
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break rust_begin_unwind
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# # run the next few lines so the panic message is printed immediately
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# # the number needs to be adjusted for your panic handler
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# commands $bpnum
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# next 4
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# end
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# *try* to stop at the user entry point (it might be gone due to inlining)
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break main
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monitor arm semihosting enable
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# # send captured ITM to the file itm.fifo
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# # (the microcontroller SWO pin must be connected to the programmer SWO pin)
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# # 8000000 must match the core clock frequency
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# monitor tpiu config internal itm.txt uart off 8000000
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# # OR: make the microcontroller SWO pin output compatible with UART (8N1)
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# # 8000000 must match the core clock frequency
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# # 2000000 is the frequency of the SWO pin
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# monitor tpiu config external uart off 8000000 2000000
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# # enable ITM port 0
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# monitor itm port 0 on
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load
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# start the process but immediately halt the processor
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stepi
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Loading…
Reference in New Issue
Block a user