cleanup for PR

This commit is contained in:
Bruno Bousquet 2024-05-05 23:05:06 -04:00
parent 29d6fa0a4a
commit 7b04b0166b
8 changed files with 3 additions and 258 deletions

View File

@ -1,17 +1,9 @@
[target.'cfg(all(target_arch = "arm", target_os = "none"))']
# replace STM32F429ZITx with your chip as listed in `probe-rs chip list`
# runner = "probe-rs run --chip STM32F429ZITx"
runner = "arm-none-eabi-gdb -q -x openocd.gdb"
runner = "probe-rs run --chip STM32F429ZITx"
[build]
# Pick ONE of these default compilation targets
# target = "thumbv6m-none-eabi" # Cortex-M0 and Cortex-M0+
# target = "thumbv7m-none-eabi" # Cortex-M3
# target = "thumbv7em-none-eabi" # Cortex-M4 and Cortex-M7 (no FPU)
target = "thumbv7em-none-eabihf" # Cortex-M4F and Cortex-M7F (with FPU)
# target = "thumbv8m.base-none-eabi" # Cortex-M23
# target = "thumbv8m.main-none-eabi" # Cortex-M33 (no FPU)
# target = "thumbv8m.main-none-eabihf" # Cortex-M33 (with FPU)
target = "thumbv7em-none-eabi"
[env]
DEFMT_LOG = "trace"

View File

@ -1,109 +0,0 @@
# VS Code Configuration
Example configurations for debugging programs in-editor with VS Code.
This directory contains configurations for two platforms:
- `LM3S6965EVB` on QEMU
- `STM32F303x` via OpenOCD
## Required Extensions
If you have the `code` command in your path, you can run the following commands to install the necessary extensions.
```sh
code --install-extension rust-lang.rust-analyzer
code --install-extension marus25.cortex-debug
```
Otherwise, you can use the Extensions view to search for and install them, or go directly to their marketplace pages and click the "Install" button.
- [Rust Language Server (rust-analyzer)](https://marketplace.visualstudio.com/items?itemName=rust-lang.rust-analyzer)
- [Cortex-Debug](https://marketplace.visualstudio.com/items?itemName=marus25.cortex-debug)
## Use
The quickstart comes with two debug configurations.
Both are configured to build the project, using the default settings from `.cargo/config`, prior to starting a debug session.
1. QEMU: Starts a debug session using an emulation of the `LM3S6965EVB` mcu.
- This works on a fresh `cargo generate` without modification of any of the settings described above.
- Semihosting output will be written to the Output view `Adapter Output`.
- `ITM` logging does not work with QEMU emulation.
2. OpenOCD: Starts a debug session for a `STM32F3DISCOVERY` board (or any `STM32F303x` running at 8MHz).
- Follow the instructions above for configuring the build with `.cargo/config` and the `memory.x` linker script.
- `ITM` output will be written to the Output view `SWO: ITM [port: 0, type: console]` output.
### Git
Files in the `.vscode/` directory are `.gitignore`d by default because many files that may end up in the `.vscode/` directory should not be committed and shared.
If you would like to save this debug configuration to your repository and share it with your team, you'll need to explicitly `git add` the files to your repository.
```sh
git add -f .vscode/launch.json
git add -f .vscode/tasks.json
git add -f .vscode/*.svd
```
## Customizing for other targets
For full documentation, see the [Cortex-Debug][cortex-debug] repository.
### Device
Some configurations use this to automatically find the SVD file.
Replace this with the part number for your device.
```json
"device": "STM32F303VCT6",
```
### OpenOCD Config Files
The `configFiles` property specifies a list of files to pass to OpenOCD.
```json
"configFiles": [
"interface/stlink-v2-1.cfg",
"target/stm32f3x.cfg"
],
```
See the [OpenOCD config docs][openocd-config] for more information and the [OpenOCD repository for available configuration files][openocd-repo].
### SVD
The SVD file is a standard way of describing all registers and peripherals of an ARM Cortex-M mCU.
Cortex-Debug needs this file to display the current register values for the peripherals on the device.
You can probably find the SVD for your device on the vendor's website.
For example, the STM32F3DISCOVERY board uses an mcu from the `STM32F303x` line of processors.
All the SVD files for the STM32F3 series are available on [ST's Website][stm32f3].
Download the [stm32f3 SVD pack][stm32f3-svd], and copy the `STM32F303.svd` file into `.vscode/`.
This line of the config tells the Cortex-Debug plug in where to find the file.
```json
"svdFile": "${workspaceRoot}/.vscode/STM32F303.svd",
```
For other processors, simply copy the correct `*.svd` file into the project and update the config accordingly.
### CPU Frequency
If your device is running at a frequency other than 8MHz, you'll need to modify this line of `launch.json` for the `ITM` output to work correctly.
```json
"cpuFrequency": 8000000,
```
### Other GDB Servers
For information on setting up GDB servers other than OpenOCD, see the [Cortex-Debug repository][cortex-debug].
[cortex-debug]: https://github.com/Marus/cortex-debug
[stm32f3]: https://www.st.com/content/st_com/en/products/microcontrollers-microprocessors/stm32-32-bit-arm-cortex-mcus/stm32-mainstream-mcus/stm32f3-series.html#resource
[stm32f3-svd]: https://www.st.com/resource/en/svd/stm32f3_svd.zip
[openocd-config]: http://openocd.org/doc/html/Config-File-Guidelines.html
[openocd-repo]: https://sourceforge.net/p/openocd/code/ci/master/tree/tcl/

View File

@ -1,17 +0,0 @@
{
// See https://go.microsoft.com/fwlink/?LinkId=827846 to learn about workspace recommendations.
// Extension identifier format: ${publisher}.${name}. Example: vscode.csharp
// List of extensions which should be recommended for users of this workspace.
"recommendations": [
"rust-lang.rust-analyzer",
"marus25.cortex-debug",
"usernamehw.errorlens",
"tamasfe.even-better-toml",
"serayuzgur.crates"
],
// List of extensions recommended by VS Code that should not be recommended for users of this workspace.
"unwantedRecommendations": [
]
}

View File

@ -1,33 +0,0 @@
{
/*
* Requires the Rust Language Server (rust-analyzer) and Cortex-Debug extensions
* https://marketplace.visualstudio.com/items?itemName=rust-lang.rust-analyzer
* https://marketplace.visualstudio.com/items?itemName=marus25.cortex-debug
*/
"version": "0.2.0",
"configurations": [
{
/* Configuration for the STM32F446 Discovery board */
"type": "cortex-debug",
"request": "launch",
"name": "Debug (OpenOCD)",
"servertype": "openocd",
"cwd": "${workspaceRoot}",
"preLaunchTask": "Cargo Build (debug)",
"runToEntryPoint": "main",
"executable": "./target/thumbv7em-none-eabihf/debug/input_capture",
/* Run `cargo build --example itm` and uncomment this line to run itm example */
// "executable": "./target/thumbv7em-none-eabihf/debug/examples/itm",
"device": "STM32F446RET6",
"configFiles": [
"interface/stlink.cfg",
"target/stm32f4x.cfg"
],
"postLaunchCommands": [
"monitor arm semihosting enable"
],
"postRestartCommands": [],
"postResetCommands": [],
}
]
}

View File

@ -1,43 +0,0 @@
{
// See https://go.microsoft.com/fwlink/?LinkId=733558
// for the documentation about the tasks.json format
"version": "2.0.0",
"tasks": [
{
/*
* This is the default cargo build task,
* but we need to provide a label for it,
* so we can invoke it from the debug launcher.
*/
"label": "Cargo Build (debug)",
"type": "process",
"command": "cargo",
"args": ["build", "--bin", "input_capture"],
"problemMatcher": [
"$rustc"
],
"group": {
"kind": "build",
"isDefault": true
}
},
{
"label": "Cargo Build (release)",
"type": "process",
"command": "cargo",
"args": ["build", "--release"],
"problemMatcher": [
"$rustc"
],
"group": "build"
},
{
"label": "Cargo Clean",
"type": "process",
"command": "cargo",
"args": ["clean"],
"problemMatcher": [],
"group": "build"
},
]
}

View File

@ -6,7 +6,7 @@ license = "MIT OR Apache-2.0"
[dependencies]
# Change stm32f429zi to your chip name, if necessary.
embassy-stm32 = { version = "0.1.0", path = "../../embassy-stm32", features = ["defmt", "stm32f446re", "unstable-pac", "memory-x", "time-driver-any", "exti", "chrono"] }
embassy-stm32 = { version = "0.1.0", path = "../../embassy-stm32", features = ["defmt", "stm32f429zi", "unstable-pac", "memory-x", "time-driver-any", "exti", "chrono"] }
embassy-sync = { version = "0.5.0", path = "../../embassy-sync", features = ["defmt"] }
embassy-executor = { version = "0.5.0", path = "../../embassy-executor", features = ["task-arena-size-32768", "arch-cortex-m", "executor-thread", "executor-interrupt", "defmt", "integrated-timers"] }
embassy-time = { version = "0.3.0", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime", "tick-hz-32_768"] }

View File

@ -1,5 +0,0 @@
# Sample OpenOCD configuration for the STM32F3DISCOVERY development board
source [find interface/stlink.cfg]
source [find target/stm32f4x.cfg]

View File

@ -1,40 +0,0 @@
target extended-remote :3333
# print demangled symbols
set print asm-demangle on
# set backtrace limit to not have infinite backtrace loops
set backtrace limit 32
# detect unhandled exceptions, hard faults and panics
break DefaultHandler
break HardFault
break rust_begin_unwind
# # run the next few lines so the panic message is printed immediately
# # the number needs to be adjusted for your panic handler
# commands $bpnum
# next 4
# end
# *try* to stop at the user entry point (it might be gone due to inlining)
break main
monitor arm semihosting enable
# # send captured ITM to the file itm.fifo
# # (the microcontroller SWO pin must be connected to the programmer SWO pin)
# # 8000000 must match the core clock frequency
# monitor tpiu config internal itm.txt uart off 8000000
# # OR: make the microcontroller SWO pin output compatible with UART (8N1)
# # 8000000 must match the core clock frequency
# # 2000000 is the frequency of the SWO pin
# monitor tpiu config external uart off 8000000 2000000
# # enable ITM port 0
# monitor itm port 0 on
load
# start the process but immediately halt the processor
stepi