Moved ltdc example to its own crate

ci.sh

@@ -201,6 +201,7 @@ cargo batch \
     --- build --release --manifest-path examples/stm32g4/Cargo.toml --target thumbv7em-none-eabi --out-dir out/examples/stm32g4 \
     --- build --release --manifest-path examples/stm32h5/Cargo.toml --target thumbv8m.main-none-eabihf --out-dir out/examples/stm32h5 \
     --- build --release --manifest-path examples/stm32h7/Cargo.toml --target thumbv7em-none-eabi --out-dir out/examples/stm32h7 \
+    --- build --release --manifest-path examples/stm32h735/Cargo.toml --target thumbv7em-none-eabi --out-dir out/examples/stm32h735 \
     --- build --release --manifest-path examples/stm32h7rs/Cargo.toml --target thumbv7em-none-eabi --out-dir out/examples/stm32h7rs \
     --- build --release --manifest-path examples/stm32l0/Cargo.toml --target thumbv6m-none-eabi --out-dir out/examples/stm32l0 \
     --- build --release --manifest-path examples/stm32l1/Cargo.toml --target thumbv7m-none-eabi --out-dir out/examples/stm32l1 \

embassy-stm32/src/ltdc.rs

@@ -178,27 +178,13 @@ impl<'d, T: Instance> Ltdc<'d, T> {
     // Create a new LTDC driver without specifying color and control pins. This is typically used if you want to drive a display though a DsiHost
     /// Note: Full-Duplex modes are not supported at this time
     pub fn new(peri: impl Peripheral<P = T> + 'd) -> Self {
-        critical_section::with(|_cs| {
+        Self::setup_clocks();
-            // RM says the pllsaidivr should only be changed when pllsai is off. But this could have other unintended side effects. So let's just give it a try like this.
-            // According to the debugger, this bit gets set, anyway.
-            #[cfg(stm32f7)]
-            stm32_metapac::RCC
-                .dckcfgr1()
-                .modify(|w| w.set_pllsaidivr(stm32_metapac::rcc::vals::Pllsaidivr::DIV2));
-
-            // It is set to RCC_PLLSAIDIVR_2 in ST's BSP example for the STM32469I-DISCO.
-            #[cfg(not(any(stm32f7, stm32u5)))]
-            stm32_metapac::RCC
-                .dckcfgr()
-                .modify(|w| w.set_pllsaidivr(stm32_metapac::rcc::vals::Pllsaidivr::DIV2));
-        });
-
-        rcc::enable_and_reset::<T>();
         into_ref!(peri);
         Self { _peri: peri }
     }
 
     /// Create a new LTDC driver. 8 pins per color channel for blue, green and red
+    #[allow(clippy::too_many_arguments)]
     pub fn new_with_pins(
         peri: impl Peripheral<P = T> + 'd,
         _irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd,
@@ -230,8 +216,7 @@ impl<'d, T: Instance> Ltdc<'d, T> {
         r6: impl Peripheral<P = impl R6Pin<T>> + 'd,
         r7: impl Peripheral<P = impl R7Pin<T>> + 'd,
     ) -> Self {
-        rcc::enable_and_reset::<T>();
+        Self::setup_clocks();
-
         into_ref!(peri);
         new_pin!(clk, AfType::output(OutputType::PushPull, Speed::VeryHigh));
         new_pin!(hsync, AfType::output(OutputType::PushPull, Speed::VeryHigh));
@@ -484,6 +469,25 @@ impl<'d, T: Instance> Ltdc<'d, T> {
         result
     }
 
+    fn setup_clocks() {
+        critical_section::with(|_cs| {
+            // RM says the pllsaidivr should only be changed when pllsai is off. But this could have other unintended side effects. So let's just give it a try like this.
+            // According to the debugger, this bit gets set, anyway.
+            #[cfg(stm32f7)]
+            crate::pac::RCC
+                .dckcfgr1()
+                .modify(|w| w.set_pllsaidivr(stm32_metapac::rcc::vals::Pllsaidivr::DIV2));
+
+            // It is set to RCC_PLLSAIDIVR_2 in ST's BSP example for the STM32469I-DISCO.
+            #[cfg(stm32f4)]
+            crate::pac::RCC
+                .dckcfgr()
+                .modify(|w| w.set_pllsaidivr(stm32_metapac::rcc::vals::Pllsaidivr::DIV2));
+        });
+
+        rcc::enable_and_reset::<T>();
+    }
+
     fn clear_interrupt_flags() {
         T::regs().icr().write(|w| {
             w.set_cfuif(Cfuif::CLEAR);

examples/stm32h7/Cargo.toml

@@ -34,8 +34,6 @@ stm32-fmc = "0.3.0"
 embedded-storage = "0.3.1"
 static_cell = "2"
 chrono = { version = "^0.4", default-features = false }
-embedded-graphics = { version = "0.8.1" }
-tinybmp = { version = "0.5" }
 
 # cargo build/run
 [profile.dev]

examples/stm32h735/.cargo/config.toml

@@ -0,0 +1,8 @@
+[target.thumbv7em-none-eabihf]
+runner = 'probe-rs run --chip STM32H735IGKx'
+
+[build]
+target = "thumbv7em-none-eabihf" # Cortex-M4F and Cortex-M7F (with FPU)
+
+[env]
+DEFMT_LOG = "trace"

examples/stm32h735/Cargo.toml

@@ -0,0 +1,61 @@
+[package]
+edition = "2021"
+name = "embassy-stm32h735-examples"
+version = "0.1.0"
+license = "MIT OR Apache-2.0"
+
+[dependencies]
+embassy-stm32 = { version = "0.1.0", path = "../../embassy-stm32", features = ["defmt", "stm32h735ig", "time-driver-tim2", "exti", "memory-x", "unstable-pac", "chrono"] }
+embassy-sync = { version = "0.6.0", path = "../../embassy-sync", features = ["defmt"] }
+embassy-embedded-hal = { version = "0.1.0", path = "../../embassy-embedded-hal" }
+embassy-executor = { version = "0.5.0", path = "../../embassy-executor", features = ["task-arena-size-32768", "arch-cortex-m", "executor-thread", "executor-interrupt", "defmt", "integrated-timers"] }
+embassy-time = { version = "0.3.1", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime", "tick-hz-32_768"] }
+embassy-futures = { version = "0.1.0", path = "../../embassy-futures" }
+
+defmt = "0.3"
+defmt-rtt = "0.4"
+
+cortex-m = { version = "0.7.6", features = ["inline-asm", "critical-section-single-core"] }
+cortex-m-rt = "0.7.0"
+panic-probe = { version = "0.3", features = ["print-defmt"] }
+heapless = { version = "0.8", default-features = false }
+embedded-graphics = { version = "0.8.1" }
+tinybmp = { version = "0.5" }
+
+# cargo build/run
+[profile.dev]
+codegen-units = 1
+debug = 2
+debug-assertions = true # <-
+incremental = false
+opt-level = 3 # <-
+overflow-checks = true # <-
+
+# cargo test
+[profile.test]
+codegen-units = 1
+debug = 2
+debug-assertions = true # <-
+incremental = false
+opt-level = 3 # <-
+overflow-checks = true # <-
+
+# cargo build/run --release
+[profile.release]
+codegen-units = 1
+debug = 2
+debug-assertions = false # <-
+incremental = false
+lto = 'fat'
+opt-level = 3 # <-
+overflow-checks = false # <-
+
+# cargo test --release
+[profile.bench]
+codegen-units = 1
+debug = 2
+debug-assertions = false # <-
+incremental = false
+lto = 'fat'
+opt-level = 3 # <-
+overflow-checks = false # <-

examples/stm32h735/build.rs

@@ -0,0 +1,35 @@
+//! This build script copies the `memory.x` file from the crate root into
+//! a directory where the linker can always find it at build time.
+//! For many projects this is optional, as the linker always searches the
+//! project root directory -- wherever `Cargo.toml` is. However, if you
+//! are using a workspace or have a more complicated build setup, this
+//! build script becomes required. Additionally, by requesting that
+//! Cargo re-run the build script whenever `memory.x` is changed,
+//! updating `memory.x` ensures a rebuild of the application with the
+//! new memory settings.
+
+use std::env;
+use std::fs::File;
+use std::io::Write;
+use std::path::PathBuf;
+
+fn main() {
+    // Put `memory.x` in our output directory and ensure it's
+    // on the linker search path.
+    let out = &PathBuf::from(env::var_os("OUT_DIR").unwrap());
+    File::create(out.join("memory.x"))
+        .unwrap()
+        .write_all(include_bytes!("memory.x"))
+        .unwrap();
+    println!("cargo:rustc-link-search={}", out.display());
+
+    // By default, Cargo will re-run a build script whenever
+    // any file in the project changes. By specifying `memory.x`
+    // here, we ensure the build script is only re-run when
+    // `memory.x` is changed.
+    println!("cargo:rerun-if-changed=memory.x");
+
+    println!("cargo:rustc-link-arg-bins=--nmagic");
+    println!("cargo:rustc-link-arg-bins=-Tlink.x");
+    println!("cargo:rustc-link-arg-bins=-Tdefmt.x");
+}

examples/stm32h735/memory.x

@@ -0,0 +1,5 @@
+MEMORY
+{
+    FLASH    : ORIGIN = 0x08000000, LENGTH = 1024K
+    RAM      : ORIGIN = 0x24000000, LENGTH = 320K
+}

examples/stm32h735/src/bin/ltdc.rs

@@ -36,19 +36,9 @@ const DISPLAY_HEIGHT: usize = 272;
 const MY_TASK_POOL_SIZE: usize = 2;
 
 // the following two display buffers consume 261120 bytes that just about fits into axis ram found on the mcu
-// see memory.x linker script
 pub static mut FB1: [TargetPixelType; DISPLAY_WIDTH * DISPLAY_HEIGHT] = [0; DISPLAY_WIDTH * DISPLAY_HEIGHT];
 pub static mut FB2: [TargetPixelType; DISPLAY_WIDTH * DISPLAY_HEIGHT] = [0; DISPLAY_WIDTH * DISPLAY_HEIGHT];
 
-// a basic memory.x linker script for the stm32h735g-dk is as follows:
-/*
-MEMORY
-{
-    FLASH    : ORIGIN = 0x08000000, LENGTH = 1024K
-    RAM      : ORIGIN = 0x24000000, LENGTH = 320K
-}
-*/
-
 bind_interrupts!(struct Irqs {
     LTDC => ltdc::InterruptHandler<peripherals::LTDC>;
 });
@@ -110,7 +100,7 @@ async fn main(spawner: Spawner) {
 
     // enable the bottom layer with a 256 color lookup table
     ltdc.init_layer(&layer_config, Some(&clut));
-
+    
     // Safety: the DoubleBuffer controls access to the statically allocated frame buffers
     // and it is the only thing that mutates their content
     let mut double_buffer = DoubleBuffer::new(
@@ -369,8 +359,7 @@ mod rcc_setup {
         config.rcc.apb2_pre = APBPrescaler::DIV2;
         config.rcc.apb3_pre = APBPrescaler::DIV2;
         config.rcc.apb4_pre = APBPrescaler::DIV2;
-        let p = embassy_stm32::init(config);
+        embassy_stm32::init(config)        
-        p
     }
 }