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Fix CI, rename private feature, address comments from dirbaio.

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This commit is contained in:
Caleb Jamison 2024-08-12 04:32:31 -04:00
parent 9dc4375f18
commit 778241fd71
15 changed files with 112 additions and 89 deletions
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14
embassy-rp/Cargo.toml
View File

@ -14,8 +14,9 @@ src_base = "https://github.com/embassy-rs/embassy/blob/embassy-rp-v$VERSION/emba
src_base_git = "https://github.com/embassy-rs/embassy/blob/$COMMIT/embassy-rp/src/"
features = ["defmt", "unstable-pac", "time-driver"]
flavors = [
{ name = "rp2040", target = "thumbv6m-none-eabi" },
{ name = "rp235x", target = "thumbv8m.main-none-eabi" },
{ name = "rp2040", target = "thumbv6m-none-eabi", features = ["rp2040"] },
{ name = "rp235xa", target = "thumbv8m.main-none-eabi", features = ["rp235xa"] },
{ name = "rp235xb", target = "thumbv8m.main-none-eabi", features = ["rp235xb"] },
]
[package.metadata.docs.rs]
@ -89,10 +90,13 @@ boot2-w25x10cl = []
## ```
boot2-none = []
## Configure the hal for use with the rp2040
rp2040 = ["rp-pac/rp2040"]
rp235x = ["rp-pac/rp235x"]
rp235xa = ["rp235x"]
rp235xb = ["rp235x"]
_rp235x = ["rp-pac/rp235x"]
## Configure the hal for use with the rp235xA
rp235xa = ["_rp235x"]
## Configure the hal for use with the rp235xB
rp235xb = ["_rp235x"]
# Add a binary-info header block containing picotool-compatible metadata.
#

4
embassy-rp/src/adc.rs
View File

@ -35,7 +35,7 @@ impl<'p> Channel<'p> {
pub fn new_pin(pin: impl Peripheral<P = impl AdcPin + 'p> + 'p, pull: Pull) -> Self {
into_ref!(pin);
pin.pad_ctrl().modify(|w| {
#[cfg(feature = "rp235x")]
#[cfg(feature = "_rp235x")]
w.set_iso(false);
// manual says:
//
@ -234,7 +234,7 @@ impl<'d> Adc<'d, Async> {
) -> Result<(), Error> {
#[cfg(feature = "rp2040")]
let mut rrobin = 0_u8;
#[cfg(feature = "rp235x")]
#[cfg(feature = "_rp235x")]
let mut rrobin = 0_u16;
for c in channels {
rrobin |= 1 << c;

12
embassy-rp/src/binary_info/mod.rs
View File

@ -4,13 +4,12 @@
//! and "rt" features:
//!
//! ```
//! # use rp235x_hal as hal;
//! #[link_section = ".bi_entries"]
//! #[used]
//! pub static PICOTOOL_ENTRIES: [hal::binary_info::EntryAddr; 3] = [
//! hal::binary_info_rp_program_name!(c"Program Name Here"),
//! hal::binary_info_rp_cargo_version!(),
//! hal::binary_info_int!(hal::binary_info::make_tag(b"JP"), 0x0000_0001, 0x12345678),
//! pub static PICOTOOL_ENTRIES: [embassy_rp::binary_info::EntryAddr; 3] = [
//! embassy_rp::binary_info_rp_program_name!(c"Program Name Here"),
//! embassy_rp::binary_info_rp_cargo_version!(),
//! embassy_rp::binary_info_int!(embassy_rp::binary_info::make_tag(b"JP"), 0x0000_0001, 0x12345678),
//! ];
//! ```
@ -163,8 +162,7 @@ pub const fn rp_boot2_name(value: &'static core::ffi::CStr) -> StringEntry {
/// Create a tag from two ASCII letters.
///
/// ```
/// # use rp235x_hal as hal;
/// let tag = hal::binary_info::make_tag(b"RP");
/// let tag = embassy_rp::binary_info::make_tag(b"RP");
/// assert_eq!(tag, 0x5052);
/// ```
pub const fn make_tag(c: &[u8; 2]) -> u16 {

21
embassy-rp/src/clocks.rs
View File

@ -311,10 +311,10 @@ pub struct SysClkConfig {
#[cfg(feature = "rp2040")]
pub div_frac: u8,
/// SYS clock divider.
#[cfg(feature = "rp235x")]
#[cfg(feature = "_rp235x")]
pub div_int: u16,
/// SYS clock fraction.
#[cfg(feature = "rp235x")]
#[cfg(feature = "_rp235x")]
pub div_frac: u16,
}
@ -430,12 +430,12 @@ pub(crate) unsafe fn init(config: ClockConfig) {
c.clk_sys_ctrl().modify(|w| w.set_src(ClkSysCtrlSrc::CLK_REF));
#[cfg(feature = "rp2040")]
while c.clk_sys_selected().read() != 1 {}
#[cfg(feature = "rp235x")]
#[cfg(feature = "_rp235x")]
while c.clk_sys_selected().read() != pac::clocks::regs::ClkSysSelected(1) {}
c.clk_ref_ctrl().modify(|w| w.set_src(ClkRefCtrlSrc::ROSC_CLKSRC_PH));
#[cfg(feature = "rp2040")]
while c.clk_ref_selected().read() != 1 {}
#[cfg(feature = "rp235x")]
#[cfg(feature = "_rp235x")]
while c.clk_ref_selected().read() != pac::clocks::regs::ClkRefSelected(1) {}
// Reset the PLLs
@ -506,7 +506,7 @@ pub(crate) unsafe fn init(config: ClockConfig) {
});
#[cfg(feature = "rp2040")]
while c.clk_ref_selected().read() != (1 << ref_src as u32) {}
#[cfg(feature = "rp235x")]
#[cfg(feature = "_rp235x")]
while c.clk_ref_selected().read() != pac::clocks::regs::ClkRefSelected(1 << ref_src as u32) {}
c.clk_ref_div().write(|w| {
w.set_int(config.ref_clk.div);
@ -539,7 +539,7 @@ pub(crate) unsafe fn init(config: ClockConfig) {
c.clk_sys_ctrl().write(|w| w.set_src(ClkSysCtrlSrc::CLK_REF));
#[cfg(feature = "rp2040")]
while c.clk_sys_selected().read() != (1 << ClkSysCtrlSrc::CLK_REF as u32) {}
#[cfg(feature = "rp235x")]
#[cfg(feature = "_rp235x")]
while c.clk_sys_selected().read() != pac::clocks::regs::ClkSysSelected(1 << ClkSysCtrlSrc::CLK_REF as u32) {}
}
c.clk_sys_ctrl().write(|w| {
@ -549,7 +549,7 @@ pub(crate) unsafe fn init(config: ClockConfig) {
#[cfg(feature = "rp2040")]
while c.clk_sys_selected().read() != (1 << sys_src as u32) {}
#[cfg(feature = "rp235x")]
#[cfg(feature = "_rp235x")]
while c.clk_sys_selected().read() != pac::clocks::regs::ClkSysSelected(1 << sys_src as u32) {}
c.clk_sys_div().write(|w| {
@ -661,7 +661,7 @@ pub(crate) unsafe fn init(config: ClockConfig) {
}
// rp235x specific clocks
#[cfg(feature = "rp235x")]
#[cfg(feature = "_rp235x")]
{
// TODO hstx clock
peris.set_hstx(false);
@ -903,7 +903,8 @@ pub enum GpoutSrc {
/// ADC.
Adc = ClkGpoutCtrlAuxsrc::CLK_ADC as _,
// RTC.
//Rtc = ClkGpoutCtrlAuxsrc::CLK_RTC as _,
#[cfg(feature = "rp2040")]
Rtc = ClkGpoutCtrlAuxsrc::CLK_RTC as _,
/// REF.
Ref = ClkGpoutCtrlAuxsrc::CLK_REF as _,
}
@ -934,7 +935,7 @@ impl<'d, T: GpoutPin> Gpout<'d, T> {
}
/// Set clock divider.
#[cfg(feature = "rp235x")]
#[cfg(feature = "_rp235x")]
pub fn set_div(&self, int: u16, frac: u16) {
let c = pac::CLOCKS;
c.clk_gpout_div(self.gpout.number()).write(|w| {

13
embassy-rp/src/dma.rs
View File

@ -147,7 +147,7 @@ fn copy_inner<'a, C: Channel>(
p.trans_count().write(|w| {
*w = len as u32;
});
#[cfg(feature = "rp235x")]
#[cfg(feature = "_rp235x")]
p.trans_count().write(|w| {
w.set_mode(0.into());
w.set_count(len as u32);
@ -208,7 +208,10 @@ impl<'a, C: Channel> Future for Transfer<'a, C> {
}
}
#[cfg(feature = "rp2040")]
pub(crate) const CHANNEL_COUNT: usize = 12;
#[cfg(feature = "_rp235x")]
pub(crate) const CHANNEL_COUNT: usize = 16;
const NEW_AW: AtomicWaker = AtomicWaker::new();
static CHANNEL_WAKERS: [AtomicWaker; CHANNEL_COUNT] = [NEW_AW; CHANNEL_COUNT];
@ -303,11 +306,11 @@ channel!(DMA_CH8, 8);
channel!(DMA_CH9, 9);
channel!(DMA_CH10, 10);
channel!(DMA_CH11, 11);
#[cfg(feature = "rp235x")]
#[cfg(feature = "_rp235x")]
channel!(DMA_CH12, 12);
#[cfg(feature = "rp235x")]
#[cfg(feature = "_rp235x")]
channel!(DMA_CH13, 13);
#[cfg(feature = "rp235x")]
#[cfg(feature = "_rp235x")]
channel!(DMA_CH14, 14);
#[cfg(feature = "rp235x")]
#[cfg(feature = "_rp235x")]
channel!(DMA_CH15, 15);

14
embassy-rp/src/flash.rs
View File

@ -669,8 +669,10 @@ mod ram_helpers {
#[inline(never)]
#[link_section = ".data.ram_func"]
#[cfg(feature = "rp235x")]
unsafe fn write_flash_inner(_addr: u32, _len: u32, _data: Option<&[u8]>, _ptrs: *const FlashFunctionPointers) {}
#[cfg(feature = "_rp235x")]
unsafe fn write_flash_inner(_addr: u32, _len: u32, _data: Option<&[u8]>, _ptrs: *const FlashFunctionPointers) {
todo!();
}
#[repr(C)]
struct FlashCommand {
@ -891,8 +893,10 @@ mod ram_helpers {
#[inline(never)]
#[link_section = ".data.ram_func"]
#[cfg(feature = "rp235x")]
unsafe fn read_flash_inner(_cmd: FlashCommand, _ptrs: *const FlashFunctionPointers) {}
#[cfg(feature = "_rp235x")]
unsafe fn read_flash_inner(_cmd: FlashCommand, _ptrs: *const FlashFunctionPointers) {
todo!();
}
}
/// Make sure to uphold the contract points with rp2040-flash.
@ -906,7 +910,7 @@ pub(crate) unsafe fn in_ram(operation: impl FnOnce()) -> Result<(), Error> {
}
// Make sure CORE1 is paused during the entire duration of the RAM function
//crate::multicore::pause_core1();
crate::multicore::pause_core1();
critical_section::with(|_| {
// Wait for all DMA channels in flash to finish before ram operation

17
embassy-rp/src/gpio.rs
View File

@ -14,7 +14,12 @@ use crate::pac::SIO;
use crate::{interrupt, pac, peripherals, Peripheral, RegExt};
const NEW_AW: AtomicWaker = AtomicWaker::new();
#[cfg(any(feature = "rp2040", feature = "rp235xa"))]
const BANK0_PIN_COUNT: usize = 30;
#[cfg(feature = "rp235xb")]
const BANK0_PIN_COUNT: usize = 48;
static BANK0_WAKERS: [AtomicWaker; BANK0_PIN_COUNT] = [NEW_AW; BANK0_PIN_COUNT];
#[cfg(feature = "qspi-as-gpio")]
const QSPI_PIN_COUNT: usize = 6;
@ -180,7 +185,7 @@ impl<'d> Input<'d> {
}
/// Set the pin's pad isolation
#[cfg(feature = "rp235x")]
#[cfg(feature = "_rp235x")]
#[inline]
pub fn set_pad_isolation(&mut self, isolate: bool) {
self.pin.set_pad_isolation(isolate)
@ -422,7 +427,7 @@ impl<'d> Output<'d> {
}
/// Set the pin's pad isolation
#[cfg(feature = "rp235x")]
#[cfg(feature = "_rp235x")]
#[inline]
pub fn set_pad_isolation(&mut self, isolate: bool) {
self.pin.set_pad_isolation(isolate)
@ -555,7 +560,7 @@ impl<'d> OutputOpenDrain<'d> {
}
/// Set the pin's pad isolation
#[cfg(feature = "rp235x")]
#[cfg(feature = "_rp235x")]
#[inline]
pub fn set_pad_isolation(&mut self, isolate: bool) {
self.pin.set_pad_isolation(isolate)
@ -581,7 +586,7 @@ impl<'d> Flex<'d> {
into_ref!(pin);
pin.pad_ctrl().write(|w| {
#[cfg(feature = "rp235x")]
#[cfg(feature = "_rp235x")]
w.set_iso(false);
w.set_ie(true);
});
@ -589,7 +594,7 @@ impl<'d> Flex<'d> {
pin.gpio().ctrl().write(|w| {
#[cfg(feature = "rp2040")]
w.set_funcsel(pac::io::vals::Gpio0ctrlFuncsel::SIO_0 as _);
#[cfg(feature = "rp235x")]
#[cfg(feature = "_rp235x")]
w.set_funcsel(pac::io::vals::Gpio0ctrlFuncsel::SIOB_PROC_0 as _);
});
@ -788,7 +793,7 @@ impl<'d> Flex<'d> {
}
/// Set the pin's pad isolation
#[cfg(feature = "rp235x")]
#[cfg(feature = "_rp235x")]
#[inline]
pub fn set_pad_isolation(&mut self, isolate: bool) {
self.pin.pad_ctrl().modify(|w| {

2
embassy-rp/src/i2c.rs
View File

@ -363,7 +363,7 @@ where
{
pin.gpio().ctrl().write(|w| w.set_funcsel(3));
pin.pad_ctrl().write(|w| {
#[cfg(feature = "rp235x")]
#[cfg(feature = "_rp235x")]
w.set_iso(false);
w.set_schmitt(true);
w.set_slewfast(false);

18
embassy-rp/src/lib.rs
View File

@ -15,9 +15,9 @@ mod critical_section_impl;
mod intrinsics;
pub mod adc;
#[cfg(feature = "rp235x")]
#[cfg(feature = "_rp235x")]
pub mod binary_info;
#[cfg(feature = "rp235x")]
#[cfg(feature = "_rp235x")]
pub mod block;
#[cfg(feature = "rp2040")]
pub mod bootsel;
@ -92,7 +92,7 @@ embassy_hal_internal::interrupt_mod!(
SWI_IRQ_5,
);
#[cfg(feature = "rp235x")]
#[cfg(feature = "_rp235x")]
embassy_hal_internal::interrupt_mod!(
TIMER0_IRQ_0,
TIMER0_IRQ_1,
@ -267,7 +267,7 @@ embassy_hal_internal::peripherals! {
BOOTSEL,
}
#[cfg(feature = "rp235x")]
#[cfg(feature = "_rp235x")]
embassy_hal_internal::peripherals! {
PIN_0,
PIN_1,
@ -497,7 +497,7 @@ fn install_stack_guard(stack_bottom: *mut usize) -> Result<(), ()> {
Ok(())
}
#[cfg(feature = "rp235x")]
#[cfg(all(feature = "_rp235x", armv8m))]
#[inline(always)]
fn install_stack_guard(stack_bottom: *mut usize) -> Result<(), ()> {
let core = unsafe { cortex_m::Peripherals::steal() };
@ -515,6 +515,14 @@ fn install_stack_guard(stack_bottom: *mut usize) -> Result<(), ()> {
Ok(())
}
// This is to hack around cortex_m defaulting to ARMv7 when building tests,
// so the compile fails when we try to use ARMv8 peripherals.
#[cfg(all(feature = "_rp235x", not(armv8m)))]
#[inline(always)]
fn install_stack_guard(stack_bottom: *mut usize) -> Result<(), ()> {
Ok(())
}
/// HAL configuration for RP.
pub mod config {
use crate::clocks::ClockConfig;

4
embassy-rp/src/multicore.rs
View File

@ -109,7 +109,7 @@ unsafe fn SIO_IRQ_PROC1() {
}
}
#[cfg(all(feature = "rt", feature = "rp235x"))]
#[cfg(all(feature = "rt", feature = "_rp235x"))]
#[interrupt]
#[link_section = ".data.ram_func"]
unsafe fn SIO_IRQ_FIFO() {
@ -164,7 +164,7 @@ where
unsafe {
interrupt::SIO_IRQ_PROC1.enable()
};
#[cfg(feature = "rp235x")]
#[cfg(feature = "_rp235x")]
unsafe {
interrupt::SIO_IRQ_FIFO.enable()
};

16
embassy-rp/src/pio/mod.rs
View File

@ -354,7 +354,7 @@ impl<'d, PIO: Instance, const SM: usize> StateMachineRx<'d, PIO, SM> {
p.read_addr().write_value(PIO::PIO.rxf(SM).as_ptr() as u32);
#[cfg(feature = "rp2040")]
p.trans_count().write(|w| *w = data.len() as u32);
#[cfg(feature = "rp235x")]
#[cfg(feature = "_rp235x")]
p.trans_count().write(|w| w.set_count(data.len() as u32));
compiler_fence(Ordering::SeqCst);
p.ctrl_trig().write(|w| {
@ -439,7 +439,7 @@ impl<'d, PIO: Instance, const SM: usize> StateMachineTx<'d, PIO, SM> {
p.write_addr().write_value(PIO::PIO.txf(SM).as_ptr() as u32);
#[cfg(feature = "rp2040")]
p.trans_count().write(|w| *w = data.len() as u32);
#[cfg(feature = "rp235x")]
#[cfg(feature = "_rp235x")]
p.trans_count().write(|w| w.set_count(data.len() as u32));
compiler_fence(Ordering::SeqCst);
p.ctrl_trig().write(|w| {
@ -529,7 +529,7 @@ pub struct PinConfig {
/// Comparison level or IRQ index for the MOV x, STATUS instruction.
#[derive(Clone, Copy, Debug, PartialEq, Eq, PartialOrd, Ord)]
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
#[cfg(feature = "rp235x")]
#[cfg(feature = "_rp235x")]
pub enum StatusN {
/// IRQ flag in this PIO block
This(u8),
@ -539,14 +539,14 @@ pub enum StatusN {
Higher(u8),
}
#[cfg(feature = "rp235x")]
#[cfg(feature = "_rp235x")]
impl Default for StatusN {
fn default() -> Self {
Self::This(0)
}
}
#[cfg(feature = "rp235x")]
#[cfg(feature = "_rp235x")]
impl Into<crate::pac::pio::vals::ExecctrlStatusN> for StatusN {
fn into(self) -> crate::pac::pio::vals::ExecctrlStatusN {
let x = match self {
@ -576,7 +576,7 @@ pub struct Config<'d, PIO: Instance> {
#[cfg(feature = "rp2040")]
pub status_n: u8,
// This cfg probably shouldn't be required, but the SVD for the 2040 doesn't have the enum
#[cfg(feature = "rp235x")]
#[cfg(feature = "_rp235x")]
/// Status comparison level.
pub status_n: StatusN,
exec: ExecConfig,
@ -709,7 +709,7 @@ impl<'d, PIO: Instance + 'd, const SM: usize> StateMachine<'d, PIO, SM> {
w.set_out_sticky(config.out_sticky);
w.set_wrap_top(config.exec.wrap_top);
w.set_wrap_bottom(config.exec.wrap_bottom);
#[cfg(feature = "rp235x")]
#[cfg(feature = "_rp235x")]
w.set_status_sel(match config.status_sel {
StatusSource::TxFifoLevel => pac::pio::vals::ExecctrlStatusSel::TXLEVEL,
StatusSource::RxFifoLevel => pac::pio::vals::ExecctrlStatusSel::RXLEVEL,
@ -1250,7 +1250,7 @@ macro_rules! impl_pio {
impl_pio!(PIO0, 0, PIO0, PIO0_0, PIO0_IRQ_0);
impl_pio!(PIO1, 1, PIO1, PIO1_0, PIO1_IRQ_0);
#[cfg(feature = "rp235x")]
#[cfg(feature = "_rp235x")]
impl_pio!(PIO2, 2, PIO2, PIO2_0, PIO2_IRQ_0);
/// PIO pin.

10
embassy-rp/src/pwm.rs
View File

@ -110,7 +110,7 @@ impl<'d> Pwm<'d> {
if let Some(pin) = &b {
pin.gpio().ctrl().write(|w| w.set_funcsel(4));
pin.pad_ctrl().modify(|w| {
#[cfg(feature = "rp235x")]
#[cfg(feature = "_rp235x")]
w.set_iso(false);
w.set_pue(b_pull == Pull::Up);
w.set_pde(b_pull == Pull::Down);
@ -365,13 +365,13 @@ slice!(PWM_SLICE5, 5);
slice!(PWM_SLICE6, 6);
slice!(PWM_SLICE7, 7);
#[cfg(feature = "rp235x")]
#[cfg(feature = "_rp235x")]
slice!(PWM_SLICE8, 8);
#[cfg(feature = "rp235x")]
#[cfg(feature = "_rp235x")]
slice!(PWM_SLICE9, 9);
#[cfg(feature = "rp235x")]
#[cfg(feature = "_rp235x")]
slice!(PWM_SLICE10, 10);
#[cfg(feature = "rp235x")]
#[cfg(feature = "_rp235x")]
slice!(PWM_SLICE11, 11);
/// PWM Channel A.

8
embassy-rp/src/spi.rs
View File

@ -107,7 +107,7 @@ impl<'d, T: Instance, M: Mode> Spi<'d, T, M> {
if let Some(pin) = &clk {
pin.gpio().ctrl().write(|w| w.set_funcsel(1));
pin.pad_ctrl().write(|w| {
#[cfg(feature = "rp235x")]
#[cfg(feature = "_rp235x")]
w.set_iso(false);
w.set_schmitt(true);
w.set_slewfast(false);
@ -120,7 +120,7 @@ impl<'d, T: Instance, M: Mode> Spi<'d, T, M> {
if let Some(pin) = &mosi {
pin.gpio().ctrl().write(|w| w.set_funcsel(1));
pin.pad_ctrl().write(|w| {
#[cfg(feature = "rp235x")]
#[cfg(feature = "_rp235x")]
w.set_iso(false);
w.set_schmitt(true);
w.set_slewfast(false);
@ -133,7 +133,7 @@ impl<'d, T: Instance, M: Mode> Spi<'d, T, M> {
if let Some(pin) = &miso {
pin.gpio().ctrl().write(|w| w.set_funcsel(1));
pin.pad_ctrl().write(|w| {
#[cfg(feature = "rp235x")]
#[cfg(feature = "_rp235x")]
w.set_iso(false);
w.set_schmitt(true);
w.set_slewfast(false);
@ -146,7 +146,7 @@ impl<'d, T: Instance, M: Mode> Spi<'d, T, M> {
if let Some(pin) = &cs {
pin.gpio().ctrl().write(|w| w.set_funcsel(1));
pin.pad_ctrl().write(|w| {
#[cfg(feature = "rp235x")]
#[cfg(feature = "_rp235x")]
w.set_iso(false);
w.set_schmitt(true);
w.set_slewfast(false);

12
embassy-rp/src/time_driver.rs
View File

@ -8,7 +8,7 @@ use embassy_sync::blocking_mutex::Mutex;
use embassy_time_driver::{AlarmHandle, Driver};
#[cfg(feature = "rp2040")]
use pac::TIMER;
#[cfg(feature = "rp235x")]
#[cfg(feature = "_rp235x")]
use pac::TIMER0 as TIMER;
use crate::interrupt::InterruptExt;
@ -155,7 +155,7 @@ pub unsafe fn init() {
interrupt::TIMER_IRQ_2.enable();
interrupt::TIMER_IRQ_3.enable();
}
#[cfg(feature = "rp235x")]
#[cfg(feature = "_rp235x")]
{
interrupt::TIMER0_IRQ_0.enable();
interrupt::TIMER0_IRQ_1.enable();
@ -188,25 +188,25 @@ fn TIMER_IRQ_3() {
DRIVER.check_alarm(3)
}
#[cfg(all(feature = "rt", feature = "rp235x"))]
#[cfg(all(feature = "rt", feature = "_rp235x"))]
#[interrupt]
fn TIMER0_IRQ_0() {
DRIVER.check_alarm(0)
}
#[cfg(all(feature = "rt", feature = "rp235x"))]
#[cfg(all(feature = "rt", feature = "_rp235x"))]
#[interrupt]
fn TIMER0_IRQ_1() {
DRIVER.check_alarm(1)
}
#[cfg(all(feature = "rt", feature = "rp235x"))]
#[cfg(all(feature = "rt", feature = "_rp235x"))]
#[interrupt]
fn TIMER0_IRQ_2() {
DRIVER.check_alarm(2)
}
#[cfg(all(feature = "rt", feature = "rp235x"))]
#[cfg(all(feature = "rt", feature = "_rp235x"))]
#[interrupt]
fn TIMER0_IRQ_3() {
DRIVER.check_alarm(3)

36
embassy-rp/src/uart/mod.rs
View File

@ -852,7 +852,7 @@ impl<'d, T: Instance + 'd, M: Mode> Uart<'d, T, M> {
});
});
pin.pad_ctrl().write(|w| {
#[cfg(feature = "rp235x")]
#[cfg(feature = "_rp235x")]
w.set_iso(false);
w.set_ie(true);
});
@ -875,7 +875,7 @@ impl<'d, T: Instance + 'd, M: Mode> Uart<'d, T, M> {
});
});
pin.pad_ctrl().write(|w| {
#[cfg(feature = "rp235x")]
#[cfg(feature = "_rp235x")]
w.set_iso(false);
w.set_ie(true);
});
@ -890,7 +890,7 @@ impl<'d, T: Instance + 'd, M: Mode> Uart<'d, T, M> {
});
});
pin.pad_ctrl().write(|w| {
#[cfg(feature = "rp235x")]
#[cfg(feature = "_rp235x")]
w.set_iso(false);
w.set_ie(true);
});
@ -905,7 +905,7 @@ impl<'d, T: Instance + 'd, M: Mode> Uart<'d, T, M> {
});
});
pin.pad_ctrl().write(|w| {
#[cfg(feature = "rp235x")]
#[cfg(feature = "_rp235x")]
w.set_iso(false);
w.set_ie(true);
});
@ -1371,33 +1371,33 @@ impl_pin!(PIN_28, UART0, TxPin);
impl_pin!(PIN_29, UART0, RxPin);
// Additional functions added by all 2350s
#[cfg(feature = "rp235x")]
#[cfg(feature = "_rp235x")]
impl_pin!(PIN_2, UART0, TxPin);
#[cfg(feature = "rp235x")]
#[cfg(feature = "_rp235x")]
impl_pin!(PIN_3, UART0, RxPin);
#[cfg(feature = "rp235x")]
#[cfg(feature = "_rp235x")]
impl_pin!(PIN_6, UART1, TxPin);
#[cfg(feature = "rp235x")]
#[cfg(feature = "_rp235x")]
impl_pin!(PIN_7, UART1, RxPin);
#[cfg(feature = "rp235x")]
#[cfg(feature = "_rp235x")]
impl_pin!(PIN_10, UART1, TxPin);
#[cfg(feature = "rp235x")]
#[cfg(feature = "_rp235x")]
impl_pin!(PIN_11, UART1, RxPin);
#[cfg(feature = "rp235x")]
#[cfg(feature = "_rp235x")]
impl_pin!(PIN_14, UART0, TxPin);
#[cfg(feature = "rp235x")]
#[cfg(feature = "_rp235x")]
impl_pin!(PIN_15, UART0, RxPin);
#[cfg(feature = "rp235x")]
#[cfg(feature = "_rp235x")]
impl_pin!(PIN_18, UART0, TxPin);
#[cfg(feature = "rp235x")]
#[cfg(feature = "_rp235x")]
impl_pin!(PIN_19, UART0, RxPin);
#[cfg(feature = "rp235x")]
#[cfg(feature = "_rp235x")]
impl_pin!(PIN_22, UART1, TxPin);
#[cfg(feature = "rp235x")]
#[cfg(feature = "_rp235x")]
impl_pin!(PIN_23, UART1, RxPin);
#[cfg(feature = "rp235x")]
#[cfg(feature = "_rp235x")]
impl_pin!(PIN_26, UART1, TxPin);
#[cfg(feature = "rp235x")]
#[cfg(feature = "_rp235x")]
impl_pin!(PIN_27, UART1, RxPin);
// Additional pins added by larger 2350 packages.