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stm32l0: cleanup exti
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parent
4a38e7eb2b
commit
7743c8305b
@ -105,11 +105,13 @@ pub trait PinWithInterrupt: private::Sealed {
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}
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macro_rules! exti {
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($($PER:ident => ($set:ident, $pin:ident),)+) => {
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($set:ident, [
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$($INT:ident => $pin:ident,)+
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]) => {
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$(
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impl<T> private::Sealed for gpio::$set::$pin<T> {}
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impl<T> PinWithInterrupt for gpio::$set::$pin<T> {
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type Interrupt = interrupt::$PER;
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type Interrupt = interrupt::$INT;
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fn port(&self) -> gpio::Port {
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self.port()
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}
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@ -118,107 +120,108 @@ macro_rules! exti {
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}
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}
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)+
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}
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};
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}
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exti! {
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EXTI0_1 => (gpioa, PA0),
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EXTI0_1 => (gpioa, PA1),
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EXTI2_3 => (gpioa, PA2),
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EXTI2_3 => (gpioa, PA3),
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EXTI4_15 => (gpioa, PA4),
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EXTI4_15 => (gpioa, PA5),
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EXTI4_15 => (gpioa, PA6),
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EXTI4_15 => (gpioa, PA7),
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EXTI4_15 => (gpioa, PA8),
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EXTI4_15 => (gpioa, PA9),
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EXTI4_15 => (gpioa, PA10),
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EXTI4_15 => (gpioa, PA11),
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EXTI4_15 => (gpioa, PA12),
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EXTI4_15 => (gpioa, PA13),
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EXTI4_15 => (gpioa, PA14),
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EXTI4_15 => (gpioa, PA15),
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}
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exti!(gpioa, [
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EXTI0_1 => PA0,
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EXTI0_1 => PA1,
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EXTI2_3 => PA2,
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EXTI2_3 => PA3,
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EXTI4_15 => PA4,
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EXTI4_15 => PA5,
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EXTI4_15 => PA6,
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EXTI4_15 => PA7,
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EXTI4_15 => PA8,
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EXTI4_15 => PA9,
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EXTI4_15 => PA10,
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EXTI4_15 => PA11,
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EXTI4_15 => PA12,
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EXTI4_15 => PA13,
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EXTI4_15 => PA14,
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EXTI4_15 => PA15,
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]);
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exti! {
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EXTI0_1 => (gpiob, PB0),
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EXTI0_1 => (gpiob, PB1),
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EXTI2_3 => (gpiob, PB2),
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EXTI2_3 => (gpiob, PB3),
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EXTI4_15 => (gpiob, PB4),
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EXTI4_15 => (gpiob, PB5),
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EXTI4_15 => (gpiob, PB6),
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EXTI4_15 => (gpiob, PB7),
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EXTI4_15 => (gpiob, PB8),
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EXTI4_15 => (gpiob, PB9),
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EXTI4_15 => (gpiob, PB10),
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EXTI4_15 => (gpiob, PB11),
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EXTI4_15 => (gpiob, PB12),
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EXTI4_15 => (gpiob, PB13),
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EXTI4_15 => (gpiob, PB14),
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EXTI4_15 => (gpiob, PB15),
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}
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exti!(gpiob, [
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EXTI0_1 => PB0,
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EXTI0_1 => PB1,
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EXTI2_3 => PB2,
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EXTI2_3 => PB3,
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EXTI4_15 => PB4,
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EXTI4_15 => PB5,
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EXTI4_15 => PB6,
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EXTI4_15 => PB7,
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EXTI4_15 => PB8,
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EXTI4_15 => PB9,
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EXTI4_15 => PB10,
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EXTI4_15 => PB11,
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EXTI4_15 => PB12,
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EXTI4_15 => PB13,
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EXTI4_15 => PB14,
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EXTI4_15 => PB15,
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]);
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exti! {
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EXTI0_1 => (gpioc, PC0),
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EXTI0_1 => (gpioc, PC1),
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EXTI2_3 => (gpioc, PC2),
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EXTI2_3 => (gpioc, PC3),
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EXTI4_15 => (gpioc, PC4),
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EXTI4_15 => (gpioc, PC5),
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EXTI4_15 => (gpioc, PC6),
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EXTI4_15 => (gpioc, PC7),
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EXTI4_15 => (gpioc, PC8),
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EXTI4_15 => (gpioc, PC9),
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EXTI4_15 => (gpioc, PC10),
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EXTI4_15 => (gpioc, PC11),
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EXTI4_15 => (gpioc, PC12),
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EXTI4_15 => (gpioc, PC13),
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EXTI4_15 => (gpioc, PC14),
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EXTI4_15 => (gpioc, PC15),
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}
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exti!(gpioc, [
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EXTI0_1 => PC0,
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EXTI0_1 => PC1,
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EXTI2_3 => PC2,
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EXTI2_3 => PC3,
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EXTI4_15 => PC4,
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EXTI4_15 => PC5,
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EXTI4_15 => PC6,
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EXTI4_15 => PC7,
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EXTI4_15 => PC8,
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EXTI4_15 => PC9,
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EXTI4_15 => PC10,
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EXTI4_15 => PC11,
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EXTI4_15 => PC12,
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EXTI4_15 => PC13,
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EXTI4_15 => PC14,
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EXTI4_15 => PC15,
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]);
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exti! {
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EXTI0_1 => (gpiod, PD0),
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EXTI0_1 => (gpiod, PD1),
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EXTI2_3 => (gpiod, PD2),
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EXTI2_3 => (gpiod, PD3),
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EXTI4_15 => (gpiod, PD4),
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EXTI4_15 => (gpiod, PD5),
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EXTI4_15 => (gpiod, PD6),
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EXTI4_15 => (gpiod, PD7),
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EXTI4_15 => (gpiod, PD8),
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EXTI4_15 => (gpiod, PD9),
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EXTI4_15 => (gpiod, PD10),
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EXTI4_15 => (gpiod, PD11),
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EXTI4_15 => (gpiod, PD12),
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EXTI4_15 => (gpiod, PD13),
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EXTI4_15 => (gpiod, PD14),
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EXTI4_15 => (gpiod, PD15),
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}
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exti!(gpiod, [
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EXTI0_1 => PD0,
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EXTI0_1 => PD1,
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EXTI2_3 => PD2,
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EXTI2_3 => PD3,
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EXTI4_15 => PD4,
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EXTI4_15 => PD5,
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EXTI4_15 => PD6,
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EXTI4_15 => PD7,
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EXTI4_15 => PD8,
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EXTI4_15 => PD9,
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EXTI4_15 => PD10,
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EXTI4_15 => PD11,
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EXTI4_15 => PD12,
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EXTI4_15 => PD13,
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EXTI4_15 => PD14,
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EXTI4_15 => PD15,
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]);
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exti! {
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EXTI0_1 => (gpioe, PE0),
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EXTI0_1 => (gpioe, PE1),
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EXTI2_3 => (gpioe, PE2),
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EXTI2_3 => (gpioe, PE3),
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EXTI4_15 => (gpioe, PE4),
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EXTI4_15 => (gpioe, PE5),
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EXTI4_15 => (gpioe, PE6),
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EXTI4_15 => (gpioe, PE7),
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EXTI4_15 => (gpioe, PE8),
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EXTI4_15 => (gpioe, PE9),
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EXTI4_15 => (gpioe, PE10),
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EXTI4_15 => (gpioe, PE11),
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EXTI4_15 => (gpioe, PE12),
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EXTI4_15 => (gpioe, PE13),
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EXTI4_15 => (gpioe, PE14),
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EXTI4_15 => (gpioe, PE15),
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}
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exti!(gpioe, [
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EXTI0_1 => PE0,
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EXTI0_1 => PE1,
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EXTI2_3 => PE2,
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EXTI2_3 => PE3,
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EXTI4_15 => PE4,
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EXTI4_15 => PE5,
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EXTI4_15 => PE6,
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EXTI4_15 => PE7,
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EXTI4_15 => PE8,
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EXTI4_15 => PE9,
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EXTI4_15 => PE10,
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EXTI4_15 => PE11,
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EXTI4_15 => PE12,
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EXTI4_15 => PE13,
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EXTI4_15 => PE14,
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EXTI4_15 => PE15,
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]);
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exti! {
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EXTI0_1 => (gpioh, PH0),
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EXTI0_1 => (gpioh, PH1),
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EXTI4_15 => (gpioh, PH9),
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EXTI4_15 => (gpioh, PH10),
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}
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exti!(gpioh, [
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EXTI0_1 => PH0,
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EXTI0_1 => PH1,
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EXTI4_15 => PH9,
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EXTI4_15 => PH10,
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]);
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