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stm32/bd: consolidate enable_rtc
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b315c28d4e
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70a5221b2e
@ -87,13 +87,14 @@ impl BackupDomain {
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}
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#[cfg(any(
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rtc_v2f0, rtc_v2f2, rtc_v2f3, rtc_v2f4, rtc_v2f7, rtc_v2h7, rtc_v2l0, rtc_v2l1, rtc_v2l4, rtc_v2wb
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rtc_v2f0, rtc_v2f2, rtc_v2f3, rtc_v2f4, rtc_v2f7, rtc_v2h7, rtc_v2l0, rtc_v2l1, rtc_v2l4, rtc_v2wb, rtc_v3,
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rtc_v3u5
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))]
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#[allow(dead_code)]
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pub fn enable_rtc() {
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let reg = Self::read();
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#[cfg(any(rtc_v2h7, rtc_v2l4, rtc_v2wb))]
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#[cfg(any(rtc_v2h7, rtc_v2l4, rtc_v2wb, rtc_v3, rtc_v3u5))]
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assert!(!reg.lsecsson(), "RTC is not compatible with LSE CSS, yet.");
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if !reg.rtcen() {
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@ -102,47 +103,21 @@ impl BackupDomain {
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Self::modify(|w| {
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// Reset
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#[cfg(not(any(rtc_v2l0, rtc_v2l1)))]
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#[cfg(not(any(rtc_v2l0, rtc_v2l1, rtc_v2f2)))]
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w.set_bdrst(false);
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w.set_rtcen(true);
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w.set_rtcsel(reg.rtcsel());
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// Restore bcdr
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#[cfg(any(rtc_v2l4, rtc_v2wb))]
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#[cfg(any(rtc_v2l4, rtc_v2wb, rtc_v3, rtc_v3u5))]
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w.set_lscosel(reg.lscosel());
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#[cfg(any(rtc_v2l4, rtc_v2wb))]
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#[cfg(any(rtc_v2l4, rtc_v2wb, rtc_v3, rtc_v3u5))]
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w.set_lscoen(reg.lscoen());
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w.set_lseon(reg.lseon());
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#[cfg(any(rtc_v2f0, rtc_v2f7, rtc_v2h7, rtc_v2l4, rtc_v2wb))]
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w.set_lsedrv(reg.lsedrv());
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w.set_lsebyp(reg.lsebyp());
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});
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}
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}
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#[cfg(any(rtc_v3, rtc_v3u5))]
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#[allow(dead_code)]
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pub fn enable_rtc() {
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let reg = Self::read();
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assert!(!reg.lsecsson(), "RTC is not compatible with LSE CSS, yet.");
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if !reg.rtcen() {
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Self::modify(|w| w.set_bdrst(true));
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Self::modify(|w| {
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w.set_bdrst(false);
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w.set_rtcen(true);
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w.set_rtcsel(reg.rtcsel());
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// Restore bcdr
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w.set_lscosel(reg.lscosel());
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w.set_lscoen(reg.lscoen());
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w.set_lseon(reg.lseon());
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#[cfg(any(rtc_v2f0, rtc_v2f7, rtc_v2h7, rtc_v2l4, rtc_v2wb, rtc_v3, rtc_v3u5))]
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w.set_lsedrv(reg.lsedrv());
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w.set_lsebyp(reg.lsebyp());
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});
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