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https://github.com/embassy-rs/embassy.git
synced 2024-11-25 00:02:28 +00:00
stm32 adc: use fn blocking_delay_us(us: u32)
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@ -4,6 +4,7 @@ use core::task::Poll;
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use embassy_hal_internal::into_ref;
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use super::blocking_delay_us;
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use crate::adc::{Adc, AdcPin, Instance, SampleTime};
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use crate::time::Hertz;
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use crate::{interrupt, Peripheral};
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@ -54,11 +55,7 @@ impl<'d, T: Instance> Adc<'d, T> {
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// 11.4: Before starting a calibration, the ADC must have been in power-on state (ADON bit = ‘1’)
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// for at least two ADC clock cycles.
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let us = (1_000_000 * 2) / Self::freq().0 + 1;
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#[cfg(time)]
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embassy_time::block_for(embassy_time::Duration::from_micros(us));
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#[cfg(not(time))]
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cortex_m::asm::delay(unsafe { crate::rcc::get_freqs() }.sys.unwrap().0 / (1000_000 / us));
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blocking_delay_us((1_000_000 * 2) / Self::freq().0 + 1);
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// Reset calibration
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T::regs().cr2().modify(|reg| reg.set_rstcal(true));
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@ -73,11 +70,7 @@ impl<'d, T: Instance> Adc<'d, T> {
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}
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// One cycle after calibration
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let us = (1_000_000 * 1) / Self::freq().0 + 1;
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#[cfg(time)]
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embassy_time::block_for(embassy_time::Duration::from_micros(us));
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#[cfg(not(time))]
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cortex_m::asm::delay(unsafe { crate::rcc::get_freqs() }.sys.unwrap().0 / (1000_000 / us));
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blocking_delay_us((1_000_000 * 1) / Self::freq().0 + 1);
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Self {
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adc,
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@ -4,6 +4,7 @@ use core::task::Poll;
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use embassy_hal_internal::into_ref;
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use super::blocking_delay_us;
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use crate::adc::{Adc, AdcPin, Instance, SampleTime};
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use crate::interrupt::typelevel::Interrupt;
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use crate::time::Hertz;
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@ -69,10 +70,7 @@ impl<'d, T: Instance> Adc<'d, T> {
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T::regs().cr().modify(|w| w.set_advregen(vals::Advregen::ENABLED));
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// Wait for the regulator to stabilize
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#[cfg(time)]
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embassy_time::block_for(embassy_time::Duration::from_micros(10));
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#[cfg(not(time))]
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cortex_m::asm::delay(unsafe { crate::rcc::get_freqs() }.sys.unwrap().0 / 100_000);
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blocking_delay_us(10);
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assert!(!T::regs().cr().read().aden());
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@ -83,11 +81,7 @@ impl<'d, T: Instance> Adc<'d, T> {
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while T::regs().cr().read().adcal() {}
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// Wait more than 4 clock cycles after adcal is cleared (RM0364 p. 223).
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let us = (1_000_000 * 4) / Self::freq().0 + 1;
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#[cfg(time)]
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embassy_time::block_for(embassy_time::Duration::from_micros(us));
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#[cfg(not(time))]
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cortex_m::asm::delay(unsafe { crate::rcc::get_freqs() }.sys.unwrap().0 / (1000_000 / us));
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blocking_delay_us((1_000_000 * 4) / Self::freq().0 + 1);
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// Enable the adc
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T::regs().cr().modify(|w| w.set_aden(true));
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@ -69,6 +69,15 @@ trait SealedInternalChannel<T> {
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fn channel(&self) -> u8;
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}
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/// Performs a busy-wait delay for a specified number of microseconds.
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#[allow(unused)]
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pub(crate) fn blocking_delay_us(us: u32) {
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#[cfg(time)]
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embassy_time::block_for(embassy_time::Duration::from_micros(us));
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#[cfg(not(time))]
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cortex_m::asm::delay(unsafe { crate::rcc::get_freqs() }.sys.unwrap().0 * us / 1_000_000);
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}
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/// ADC instance.
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#[cfg(not(any(adc_f1, adc_v1, adc_l0, adc_v2, adc_v3, adc_v4, adc_f3, adc_f3_v1_1, adc_g0, adc_h5)))]
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#[allow(private_bounds)]
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@ -6,6 +6,7 @@ use embassy_hal_internal::into_ref;
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#[cfg(adc_l0)]
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use stm32_metapac::adc::vals::Ckmode;
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use super::blocking_delay_us;
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use crate::adc::{Adc, AdcPin, Instance, Resolution, SampleTime};
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use crate::interrupt::typelevel::Interrupt;
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use crate::peripherals::ADC;
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@ -72,10 +73,7 @@ impl<'d, T: Instance> Adc<'d, T> {
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//
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// Table 57. ADC characteristics
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// tstab = 14 * 1/fadc
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#[cfg(time)]
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embassy_time::block_for(embassy_time::Duration::from_micros(1));
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#[cfg(not(time))]
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cortex_m::asm::delay(unsafe { crate::rcc::get_freqs() }.sys.unwrap().0 / 1000_000);
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blocking_delay_us(1);
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// set default PCKL/2 on L0s because HSI is disabled in the default clock config
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#[cfg(adc_l0)]
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@ -128,10 +126,7 @@ impl<'d, T: Instance> Adc<'d, T> {
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// Table 28. Embedded internal reference voltage
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// tstart = 10μs
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T::regs().ccr().modify(|reg| reg.set_vrefen(true));
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#[cfg(time)]
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embassy_time::block_for(embassy_time::Duration::from_micros(10));
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#[cfg(not(time))]
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cortex_m::asm::delay(unsafe { crate::rcc::get_freqs() }.sys.unwrap().0 / 100_000);
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blocking_delay_us(10);
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Vref
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}
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@ -142,10 +137,7 @@ impl<'d, T: Instance> Adc<'d, T> {
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// tstart ≤ 10μs
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// ts_temp ≥ 4μs
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T::regs().ccr().modify(|reg| reg.set_tsen(true));
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#[cfg(time)]
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embassy_time::block_for(embassy_time::Duration::from_micros(10));
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#[cfg(not(time))]
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cortex_m::asm::delay(unsafe { crate::rcc::get_freqs() }.sys.unwrap().0 / 100_000);
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blocking_delay_us(10);
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Temperature
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}
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@ -1,5 +1,6 @@
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use embassy_hal_internal::into_ref;
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use super::blocking_delay_us;
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use crate::adc::{Adc, AdcPin, Instance, Resolution, SampleTime};
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use crate::peripherals::ADC1;
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use crate::time::Hertz;
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@ -103,10 +104,7 @@ where
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reg.set_adon(true);
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});
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#[cfg(time)]
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embassy_time::block_for(embassy_time::Duration::from_micros(5));
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#[cfg(not(time))]
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cortex_m::asm::delay(unsafe { crate::rcc::get_freqs() }.sys.unwrap().0 / 200_000);
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blocking_delay_us(3);
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Self {
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adc,
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@ -1,6 +1,7 @@
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use cfg_if::cfg_if;
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use embassy_hal_internal::into_ref;
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use super::blocking_delay_us;
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use crate::adc::{Adc, AdcPin, Instance, Resolution, SampleTime};
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use crate::Peripheral;
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@ -87,10 +88,7 @@ impl<'d, T: Instance> Adc<'d, T> {
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reg.set_chselrmod(false);
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});
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#[cfg(time)]
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embassy_time::block_for(embassy_time::Duration::from_micros(20));
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#[cfg(not(time))]
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cortex_m::asm::delay(unsafe { crate::rcc::get_freqs() }.sys.unwrap().0 / 50_000);
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blocking_delay_us(20);
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T::regs().cr().modify(|reg| {
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reg.set_adcal(true);
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@ -100,10 +98,7 @@ impl<'d, T: Instance> Adc<'d, T> {
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// spin
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}
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#[cfg(time)]
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embassy_time::block_for(embassy_time::Duration::from_micros(1));
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#[cfg(not(time))]
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cortex_m::asm::delay(unsafe { crate::rcc::get_freqs() }.sys.unwrap().0 / 1000_000);
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blocking_delay_us(1);
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Self {
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adc,
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@ -123,10 +118,7 @@ impl<'d, T: Instance> Adc<'d, T> {
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// "Table 24. Embedded internal voltage reference" states that it takes a maximum of 12 us
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// to stabilize the internal voltage reference.
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#[cfg(time)]
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embassy_time::block_for(embassy_time::Duration::from_micros(20));
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#[cfg(not(time))]
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cortex_m::asm::delay(unsafe { crate::rcc::get_freqs() }.sys.unwrap().0 / 50_000);
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blocking_delay_us(15);
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VrefInt {}
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}
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@ -2,7 +2,7 @@
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use pac::adc::vals::{Adcaldif, Boost, Difsel, Exten, Pcsel};
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use pac::adccommon::vals::Presc;
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use super::{Adc, AdcPin, Instance, InternalChannel, Resolution, SampleTime};
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use super::{blocking_delay_us, Adc, AdcPin, Instance, InternalChannel, Resolution, SampleTime};
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use crate::time::Hertz;
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use crate::{pac, Peripheral};
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@ -164,10 +164,7 @@ impl<'d, T: Instance> Adc<'d, T> {
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s.configure_differential_inputs();
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s.calibrate();
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#[cfg(time)]
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embassy_time::block_for(embassy_time::Duration::from_micros(1));
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#[cfg(not(time))]
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cortex_m::asm::delay(unsafe { crate::rcc::get_freqs() }.sys.unwrap().0 / 1000_000);
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blocking_delay_us(1);
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s.enable();
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s.configure();
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@ -181,10 +178,7 @@ impl<'d, T: Instance> Adc<'d, T> {
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reg.set_advregen(true);
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});
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#[cfg(time)]
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embassy_time::block_for(embassy_time::Duration::from_micros(10));
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#[cfg(not(time))]
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cortex_m::asm::delay(unsafe { crate::rcc::get_freqs() }.sys.unwrap().0 / 100_000);
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blocking_delay_us(10);
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}
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fn configure_differential_inputs(&mut self) {
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