mirror of
https://github.com/embassy-rs/embassy.git
synced 2024-11-22 06:42:32 +00:00
Wait until there's enough space in tx buffer, remove busy wait for completed send
This commit is contained in:
parent
bbd687fcb0
commit
6c1137177f
@ -123,31 +123,14 @@ impl<SPI: SpiDevice> W5500<SPI> {
|
|||||||
|
|
||||||
/// Write an ethernet frame to the device. Returns number of bytes written
|
/// Write an ethernet frame to the device. Returns number of bytes written
|
||||||
pub async fn write_frame(&mut self, frame: &[u8]) -> Result<usize, SPI::Error> {
|
pub async fn write_frame(&mut self, frame: &[u8]) -> Result<usize, SPI::Error> {
|
||||||
let max_size = socket::get_tx_free_size(&mut self.bus).await? as usize;
|
while socket::get_tx_free_size(&mut self.bus).await? < frame.len() as u16 {}
|
||||||
|
|
||||||
let write_data = if frame.len() < max_size {
|
|
||||||
frame
|
|
||||||
} else {
|
|
||||||
&frame[..max_size]
|
|
||||||
};
|
|
||||||
|
|
||||||
let write_ptr = socket::get_tx_write_ptr(&mut self.bus).await?;
|
let write_ptr = socket::get_tx_write_ptr(&mut self.bus).await?;
|
||||||
self.bus
|
self.bus
|
||||||
.write_frame(RegisterBlock::TxBuf, write_ptr, write_data)
|
.write_frame(RegisterBlock::TxBuf, write_ptr, frame)
|
||||||
.await?;
|
.await?;
|
||||||
socket::set_tx_write_ptr(
|
socket::set_tx_write_ptr(&mut self.bus, write_ptr.wrapping_add(frame.len() as u16)).await?;
|
||||||
&mut self.bus,
|
|
||||||
write_ptr.wrapping_add(write_data.len() as u16),
|
|
||||||
)
|
|
||||||
.await?;
|
|
||||||
|
|
||||||
socket::reset_interrupt(&mut self.bus, socket::Interrupt::SendOk).await?;
|
|
||||||
socket::command(&mut self.bus, socket::Command::Send).await?;
|
socket::command(&mut self.bus, socket::Command::Send).await?;
|
||||||
// Wait for TX to complete
|
Ok(frame.len())
|
||||||
while !socket::is_interrupt(&mut self.bus, socket::Interrupt::SendOk).await? {}
|
|
||||||
socket::reset_interrupt(&mut self.bus, socket::Interrupt::SendOk).await?;
|
|
||||||
|
|
||||||
Ok(write_data.len())
|
|
||||||
}
|
}
|
||||||
|
|
||||||
pub async fn is_link_up(&mut self) -> bool {
|
pub async fn is_link_up(&mut self) -> bool {
|
||||||
|
@ -22,7 +22,6 @@ pub enum Command {
|
|||||||
pub const INTR: u16 = 0x02;
|
pub const INTR: u16 = 0x02;
|
||||||
#[repr(u8)]
|
#[repr(u8)]
|
||||||
pub enum Interrupt {
|
pub enum Interrupt {
|
||||||
SendOk = 0b010000_u8,
|
|
||||||
Receive = 0b00100_u8,
|
Receive = 0b00100_u8,
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -34,16 +33,6 @@ pub async fn reset_interrupt<SPI: SpiDevice>(
|
|||||||
bus.write_frame(RegisterBlock::Socket0, INTR, &data).await
|
bus.write_frame(RegisterBlock::Socket0, INTR, &data).await
|
||||||
}
|
}
|
||||||
|
|
||||||
pub async fn is_interrupt<SPI: SpiDevice>(
|
|
||||||
bus: &mut SpiInterface<SPI>,
|
|
||||||
code: Interrupt,
|
|
||||||
) -> Result<bool, SPI::Error> {
|
|
||||||
let mut data = [0u8];
|
|
||||||
bus.read_frame(RegisterBlock::Socket0, INTR, &mut data)
|
|
||||||
.await?;
|
|
||||||
Ok(data[0] & code as u8 != 0)
|
|
||||||
}
|
|
||||||
|
|
||||||
pub async fn get_tx_write_ptr<SPI: SpiDevice>(
|
pub async fn get_tx_write_ptr<SPI: SpiDevice>(
|
||||||
bus: &mut SpiInterface<SPI>,
|
bus: &mut SpiInterface<SPI>,
|
||||||
) -> Result<u16, SPI::Error> {
|
) -> Result<u16, SPI::Error> {
|
||||||
|
Loading…
Reference in New Issue
Block a user