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re-export SetDutyCycle for user convenience
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@ -1,7 +1,7 @@
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//! Pulse Width Modulation (PWM)
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use embassy_hal_internal::{into_ref, Peripheral, PeripheralRef};
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use embedded_hal_1::pwm::{Error, ErrorKind, ErrorType, SetDutyCycle};
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use embedded_hal_1::pwm::{Error, ErrorKind, ErrorType};
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use fixed::traits::ToFixed;
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use fixed::FixedU16;
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use pac::pwm::regs::{ChDiv, Intr};
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@ -10,6 +10,8 @@ use pac::pwm::vals::Divmode;
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use crate::gpio::{AnyPin, Pin as GpioPin, Pull, SealedPin as _};
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use crate::{pac, peripherals, RegExt};
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pub use embedded_hal_1::pwm::SetDutyCycle;
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/// The configuration of a PWM slice.
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/// Note the period in clock cycles of a slice can be computed as:
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/// `(top + 1) * (phase_correct ? 1 : 2) * divider`
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@ -113,9 +115,7 @@ impl<'d> SetDutyCycle for Pwm<'d> {
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}
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fn set_duty_cycle(&mut self, duty: u16) -> Result<(), Self::Error> {
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info!("duty {}",&duty);
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let max_duty = self.max_duty_cycle();
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info!("max duty {}", &max_duty);
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if duty > max_duty {
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return Err(PwmError::InvalidDutyCycle);
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}
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